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Differential D137076

[LLVM][AArch64] Add SME2 to +all disassembler feature
AbandonedPublic

Authored by DavidSpickett on Oct 31 2022, 5:03 AM.

Details

Reviewers
lenary
CarolineConcatto
Summary

Add tests for SME, its extra features and SME2.

Diff Detail

Revision Contents

PathSize
llvm/
lib/
Target/
AArch64/
2 lines
test/
MC/
Disassembler/
AArch64/
16 lines

Diff 471972

llvm/lib/Target/AArch64/AArch64InstrInfo.td

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 139 Lines • ▼ Show 20 Linesdef HasSVE2BitPerm : Predicate<"Subtarget->hasSVE2BitPerm()">,
AssemblerPredicateWithAll<(all_of FeatureSVE2BitPerm), "sve2-bitperm">; AssemblerPredicateWithAll<(all_of FeatureSVE2BitPerm), "sve2-bitperm">;
def HasSME : Predicate<"Subtarget->hasSME()">, def HasSME : Predicate<"Subtarget->hasSME()">,
AssemblerPredicateWithAll<(all_of FeatureSME), "sme">; AssemblerPredicateWithAll<(all_of FeatureSME), "sme">;
def HasSMEF64F64 : Predicate<"Subtarget->hasSMEF64F64()">, def HasSMEF64F64 : Predicate<"Subtarget->hasSMEF64F64()">,
AssemblerPredicateWithAll<(all_of FeatureSMEF64F64), "sme-f64f64">; AssemblerPredicateWithAll<(all_of FeatureSMEF64F64), "sme-f64f64">;
def HasSMEI16I64 : Predicate<"Subtarget->hasSMEI16I64()">, def HasSMEI16I64 : Predicate<"Subtarget->hasSMEI16I64()">,
AssemblerPredicateWithAll<(all_of FeatureSMEI16I64), "sme-i16i64">; AssemblerPredicateWithAll<(all_of FeatureSMEI16I64), "sme-i16i64">;
def HasSME2 : Predicate<"Subtarget->hasSME2()">, def HasSME2 : Predicate<"Subtarget->hasSME2()">,
AssemblerPredicate<(all_of FeatureSME2), "sme2">; AssemblerPredicateWithAll<(all_of FeatureSME2), "sme2">;
// A subset of SVE(2) instructions are legal in Streaming SVE execution mode, // A subset of SVE(2) instructions are legal in Streaming SVE execution mode,
// they should be enabled if either has been specified. // they should be enabled if either has been specified.
def HasSVEorSME def HasSVEorSME
: Predicate<"Subtarget->hasSVE() || Subtarget->hasSME()">, : Predicate<"Subtarget->hasSVE() || Subtarget->hasSME()">,
AssemblerPredicateWithAll<(any_of FeatureSVE, FeatureSME), AssemblerPredicateWithAll<(any_of FeatureSVE, FeatureSME),
"sve or sme">; "sve or sme">;
def HasSVE2orSME def HasSVE2orSME
: Predicate<"Subtarget->hasSVE2() || Subtarget->hasSME()">, : Predicate<"Subtarget->hasSVE2() || Subtarget->hasSME()">,
▲ Show 20 Lines • Show All 8,301 Lines • Show Last 20 Lines

llvm/test/MC/Disassembler/AArch64/mattr-all.txt

Show All 33 Lines
## armv9a rme ## armv9a rme
# CHECK: mrs x0, MFAR_EL3 # CHECK: mrs x0, MFAR_EL3
[0xa0,0x60,0x3e,0xd5] [0xa0,0x60,0x3e,0xd5]
## predres (to make sure sysreg aliases work) ## predres (to make sure sysreg aliases work)
# CHECK: cfp rctx, x0 # CHECK: cfp rctx, x0
[0x80,0x73,0x0b,0xd5] [0x80,0x73,0x0b,0xd5]
## sme
# CHECK: addha za0.s, p0/m, p0/m, z0.s
[0x00,0x00,0x90,0xc0]
## smef64
# CHECK: fmopa za0.d, p0/m, p0/m, z0.d, z0.d
[0x00,0x00,0xc0,0x80]
## smei64
# CHECK: addha za0.d, p0/m, p0/m, z0.d
[0x00,0x00,0xd0,0xc0]
## sme2
# CHECK: add { z0.h, z1.h }, { z0.h, z1.h }, z0.h
[0x00,0xa3,0x60,0xc1]
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