[Systemz/z/OS] Introduce CCAssignToRegAndStack to calling convention

[yusra.syeda]

Summary

This patch introduces new action CCAssignToRegAndStack, which makes code more readable.

[Kai]

Since this change is potential useful for other platforms, it would be nice to also mention CCAssignToRegAndStack in WritingAnLLVMBackend.txt (in the bullet list at the end of chapter "Calling Conventions").

[uweigand]

From a SystemZ perspective this looks good to me (and a clear readability enhancement). I'd still like to hear comments from other backend maintainers whether this common tablegen feature might be useful to them as well ...

FYI @craig.topper @t.p.northover @asl @kazu

[uweigand]

FYI @nemanjai

[yusra.syeda]

Update documentation for CCAssignToRegAndStack in WritingAnLLVMBackend.rst

[asl]

It seems reasonable to me. Even if it is only used on a single platform, it is small enough from maintenance perspective to have it.

[uweigand]

Given Anton's comment, and since nobody else objected, I'm going to approve this. It is indeed a nice improvement for our backend. LGTM.

llvm/docs/WritingAnLLVMBackend.rst

 .. code-block:: text
 
   def RetCC_X86_32 : CallingConv<[
     CCIfCC<"CallingConv::Fast", CCDelegateTo<RetCC_X86_32_Fast>>,
     CCIfCC<"CallingConv::X86_SSECall", CCDelegateTo<RetCC_X86_32_SSE>>,
     CCDelegateTo<RetCC_X86_32_C>
   ]>;
 
+``CCAssignToRegAndStack`` is the same as ``CCAssignToReg``, but also allocates
+a stack slot, when some register is used. Basically, it works like:
+``CCIf<CCAssignToReg<regList>, CCAssignToStack<size, align>>``.
+
+.. code-block:: text
+
+  class CCAssignToRegAndStack<list<Register> regList, int size, int align>
+      : CCAssignToReg<regList> {
+    int Size = size;
+    int Align = align;
+  }
+
 Other calling convention interfaces include:
 
 * ``CCIf <predicate, action>`` --- If the predicate matches, apply the action.
 
 * ``CCIfInReg <action>`` --- If the argument is marked with the "``inreg``"
   attribute, then apply the action.
 
 * ``CCIfNest <action>`` --- If the argument is marked with the "``nest``"

llvm/include/llvm/Target/TargetCallingConv.td

 class CCAssignToStackWithShadow<int size,
                                 int align,
                                 list<Register> shadowList> : CCAction {
   int Size = size;
   int Align = align;
   list<Register> ShadowRegList = shadowList;
 }
 
+/// CCAssignToRegAndStack - Same as CCAssignToReg, but also allocates a stack
+/// slot, when some register is used. Basically, it works like:
+/// CCIf<CCAssignToReg<regList>, CCAssignToStack<size, align>>.
+class CCAssignToRegAndStack<list<Register> regList, int size, int align>
+    : CCAssignToReg<regList> {
+  int Size = size;
+  int Align = align;
+}
+
 /// CCPassByVal - This action always matches: it assigns the value to a stack
 /// slot to implement ByVal aggregate parameter passing. Size and alignment
 /// specify the minimum size and alignment for the stack slot.
 class CCPassByVal<int size, int align> : CCAction {
   int Size = size;
   int Align = align;
 }
 

llvm/lib/Target/SystemZ/SystemZCallingConv.h

namespace SystemZ {
   const unsigned ELFNumArgFPRs = 4;
   extern const MCPhysReg ELFArgFPRs[ELFNumArgFPRs];
 
   const unsigned XPLINK64NumArgGPRs = 3;
   extern const MCPhysReg XPLINK64ArgGPRs[XPLINK64NumArgGPRs];
 
   const unsigned XPLINK64NumArgFPRs = 4;
   extern const MCPhysReg XPLINK64ArgFPRs[XPLINK64NumArgFPRs];
-
-  const unsigned XPLINK64NumArgVRs = 8;
-  extern const MCPhysReg XPLINK64ArgVRs[XPLINK64NumArgVRs];
 } // end namespace SystemZ
 
 class SystemZCCState : public CCState {
 private:
   /// Records whether the value was a fixed argument.
   /// See ISD::OutputArg::IsFixed.
   SmallVector<bool, 4> ArgIsFixed;
 
else
       State.addLoc(
           CCValAssign::getCustomMem(ValNo, ValVT, Offset, LocVT, LocInfo));
     return true;
   }
 
   return false;
 }
 
-inline bool CC_XPLINK64_Shadow_Stack(unsigned &ValNo, MVT &ValVT, MVT &LocVT,
-                                     CCValAssign::LocInfo &LocInfo,
-                                     ISD::ArgFlagsTy &ArgFlags,
-                                     CCState &State) {
-  ArrayRef<MCPhysReg> RegList;
-
-  switch (LocVT.SimpleTy) {
-  case MVT::i64:
-    RegList = SystemZ::XPLINK64ArgGPRs;
-    break;
-  case MVT::v16i8:
-  case MVT::v8i16:
-  case MVT::v4i32:
-  case MVT::v2i64:
-  case MVT::v4f32:
-  case MVT::v2f64:
-    RegList = SystemZ::XPLINK64ArgVRs;
-    break;
-  case MVT::f32:
-  case MVT::f64:
-  case MVT::f128:
-    RegList = SystemZ::XPLINK64ArgFPRs;
-    break;
-  default:
-    return false;
-  }
-
-  unsigned UnallocatedRegisterIndex = State.getFirstUnallocated(RegList);
-  // Every time we can allocate a register, allocate on the stack.
-  if (UnallocatedRegisterIndex < RegList.size())
-    State.AllocateStack(LocVT.getSizeInBits() / 8, Align(8));
-
-  return false;
-}
-
 inline bool RetCC_SystemZ_Error(unsigned &, MVT &, MVT &,
                                 CCValAssign::LocInfo &, ISD::ArgFlagsTy &,
                                 CCState &) {
   llvm_unreachable("Return value calling convention currently unsupported.");
 }
 
 inline bool CC_SystemZ_Error(unsigned &, MVT &, MVT &, CCValAssign::LocInfo &,
                              ISD::ArgFlagsTy &, CCState &) {

llvm/lib/Target/SystemZ/SystemZCallingConv.cpp

 const MCPhysReg SystemZ::XPLINK64ArgGPRs[SystemZ::XPLINK64NumArgGPRs] = {
     SystemZ::R1D, SystemZ::R2D, SystemZ::R3D
 };
 
 // The XPLINK64 ABI-defined param passing floating point registers
 const MCPhysReg SystemZ::XPLINK64ArgFPRs[SystemZ::XPLINK64NumArgFPRs] = {
     SystemZ::F0D, SystemZ::F2D, SystemZ::F4D, SystemZ::F6D
 };
-
-const MCPhysReg SystemZ::XPLINK64ArgVRs[SystemZ::XPLINK64NumArgVRs] = {
-    SystemZ::V24, SystemZ::V25, SystemZ::V26, SystemZ::V27,
-    SystemZ::V28, SystemZ::V29, SystemZ::V30, SystemZ::V31};

llvm/lib/Target/SystemZ/SystemZCallingConv.td

def CC_SystemZ_XPLINK64 : CallingConv<[
 
   // First i128 values. These are already split into two i64 here,
   // so we have to use a custom handler and assign into registers, if possible
   // We need to deal with this first
   CCIfType<[i64], CCCustom<"CC_SystemZ_I128Indirect">>,
   // The first 3 integer arguments are passed in registers R1D-R3D.
   // The rest will be passed in the user area. The address offset of the user
   // area can be found in register R4D.
-  CCIfType<[i64], CCCustom<"CC_XPLINK64_Shadow_Stack">>,
-  CCIfType<[i64], CCAssignToReg<[R1D, R2D, R3D]>>,
+  CCIfType<[i64], CCAssignToRegAndStack<[R1D, R2D, R3D], 8, 8>>,
 
-  // The first 8 named vector arguments are passed in V24-V31.  Sub-128 vectors
+  // The first 8 named vector arguments are passed in V24-V31. Sub-128 vectors
   // are passed in the same way, but they're widened to one of these types
   // during type legalization.
   CCIfSubtarget<"hasVector()",
     CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
-             CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Reg">>>>,
   CCIfSubtarget<"hasVector()",
     CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
-             CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Stack">>>>,
-  CCIfSubtarget<"hasVector()",
-    CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],
-             CCIfFixed<CCAssignToReg<[V24, V25, V26, V27,
-                                      V28, V29, V30, V31]>>>>,
+              CCIfFixed<CCAssignToRegAndStack<[V24, V25, V26, V27,
+                                               V28, V29, V30, V31], 16, 8>>>>,
 
-  // The first 4 named  float and double arguments are passed in registers FPR0-FPR6.
-  // The rest will be passed in the user area.
+  // The first 4 named float and double arguments are passed in registers
+  // FPR0-FPR6. The rest will be passed in the user area.
   CCIfType<[f32, f64], CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Reg">>>,
-  CCIfType<[f32, f64], CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Stack">>>,
-  CCIfType<[f32], CCIfFixed<CCAssignToReg<[F0S, F2S, F4S, F6S]>>>,
-  CCIfType<[f64], CCIfFixed<CCAssignToReg<[F0D, F2D, F4D, F6D]>>>,
+  CCIfType<[f32], CCIfFixed<CCAssignToRegAndStack<[F0S, F2S, F4S, F6S], 4, 8>>>,
+  CCIfType<[f64], CCIfFixed<CCAssignToRegAndStack<[F0D, F2D, F4D, F6D], 8, 8>>>,
+
   // The first 2 long double arguments are passed in register FPR0/FPR2
   // and FPR4/FPR6. The rest will be passed in the user area.
   CCIfType<[f128], CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Reg">>>,
-  CCIfType<[f128], CCIfFixed<CCCustom<"CC_XPLINK64_Shadow_Stack">>>,
-  CCIfType<[f128], CCIfFixed<CCAssignToReg<[F0Q, F4Q]>>>,
+  CCIfType<[f128], CCIfFixed<CCAssignToRegAndStack<[F0Q, F4Q], 16, 8>>>,
 
   // Other arguments are passed in 8-byte-aligned 8-byte stack slots.
   CCIfType<[i32, i64, f32, f64], CCAssignToStack<8, 8>>,
   // Other f128 arguments are passed in 8-byte-aligned 16-byte stack slots.
   CCIfType<[f128], CCAssignToStack<16, 8>>,
   // Vector arguments are passed in 8-byte-alinged 16-byte stack slots too.
   CCIfSubtarget<"hasVector()",
     CCIfType<[v16i8, v8i16, v4i32, v2i64, v4f32, v2f64],

llvm/utils/TableGen/CallingConvEmitter.cpp

if (Action->isSubClassOf("CCPredicateAction")) {
     O << IndentStr << "}\n";
   } else {
     if (Action->isSubClassOf("CCDelegateTo")) {
       Record *CC = Action->getValueAsDef("CC");
       O << IndentStr << "if (!" << CC->getName()
         << "(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State))\n"
         << IndentStr << "  return false;\n";
       DelegateToMap[CurrentAction].insert(CC->getName().str());
-    } else if (Action->isSubClassOf("CCAssignToReg")) {
+    } else if (Action->isSubClassOf("CCAssignToReg") ||
+               Action->isSubClassOf("CCAssignToRegAndStack")) {
       ListInit *RegList = Action->getValueAsListInit("RegList");
       if (RegList->size() == 1) {
         std::string Name = getQualifiedName(RegList->getElementAsRecord(0));
         O << IndentStr << "if (unsigned Reg = State.AllocateReg(" << Name
           << ")) {\n";
         if (SwiftAction)
           AssignedSwiftRegsMap[CurrentAction].insert(Name);
         else
if (Action->isSubClassOf("CCDelegateTo")) {
           O << LS << Name;
         }
         O << "\n" << IndentStr << "};\n";
         O << IndentStr << "if (unsigned Reg = State.AllocateReg(RegList"
           << Counter << ")) {\n";
       }
       O << IndentStr << "  State.addLoc(CCValAssign::getReg(ValNo, ValVT, "
         << "Reg, LocVT, LocInfo));\n";
+      if (Action->isSubClassOf("CCAssignToRegAndStack")) {
+        int Size = Action->getValueAsInt("Size");
+        int Align = Action->getValueAsInt("Align");
+        O << IndentStr << "  (void)State.AllocateStack(";
+        if (Size)
+          O << Size << ", ";
+        else
+          O << "\n"
+            << IndentStr
+            << "  State.getMachineFunction().getDataLayout()."
+               "getTypeAllocSize(EVT(LocVT).getTypeForEVT(State.getContext())),"
+               " ";
+        if (Align)
+          O << "Align(" << Align << ")";
+        else
+          O << "\n"
+            << IndentStr
+            << "  State.getMachineFunction().getDataLayout()."
+               "getABITypeAlign(EVT(LocVT).getTypeForEVT(State.getContext()"
+               "))";
+        O << ");\n";
+      }
       O << IndentStr << "  return false;\n";
       O << IndentStr << "}\n";
     } else if (Action->isSubClassOf("CCAssignToRegWithShadow")) {
       ListInit *RegList = Action->getValueAsListInit("RegList");
       ListInit *ShadowRegList = Action->getValueAsListInit("ShadowRegList");
       if (!ShadowRegList->empty() && ShadowRegList->size() != RegList->size())
         PrintFatalError(Action->getLoc(),
                         "Invalid length of list of shadowed registers");