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[RISCV] [NFC] Add tests for vector load/store overloaded intrinsics of FP16
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Authored by Chenbing.Zheng on Mar 30 2022, 3:17 AM.

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Chenbing.Zheng created this revision.Mar 30 2022, 3:17 AM
Herald added a project: Restricted Project. · View Herald TranscriptMar 30 2022, 3:17 AM
Chenbing.Zheng requested review of this revision.Mar 30 2022, 3:17 AM

These tests files are already too long and have been timing out in phabricator. @4vtomat has a patch D122370 to split them up.

These tests files are already too long and have been timing out in phabricator. @4vtomat has a patch D122370 to split them up.

OK, I will follow it.

Chenbing.Zheng abandoned this revision.May 18 2022, 12:50 AM
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vloxseg_mask.c