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[RISCV] [NFC] Add tests for vector load/store overloaded intrinsics of FP16 AbandonedPublic Authored by Chenbing.Zheng on Mar 30 2022, 3:17 AM.
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Diff 419088 clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vloxei.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vloxseg_mask.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlseg.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vlsseg.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vluxei.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vluxseg_mask.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsoxei.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsoxseg_mask.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsseg.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vssseg.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsuxei.c
clang/test/CodeGen/RISCV/rvv-intrinsics-overloaded/vsuxseg_mask.c
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