[X86] Set frame-setup/frame-destroy on prologue/epilogue CFI instructions

[MaskRay]

Summary

This approach is used by AArch64/RISCV to make frame-setup/frame-destroy
instructions contiguous instead of being interleaved by CFI instructions. Code
checking MBBI->getFlag(MachineInstr::FrameSetup) || MBBI->isCFIInstruction()
can be simplified to just check FrameSetup.

This helps get all CFI instructions in the prologue, which can be handy to use
.cfi_remember_state/.cfi_restore_state to decrease unwind table size.

[RKSimon]

pre-commit the tests?

llvm/test/CodeGen/X86/cfi-xmm.ll

31

Include the ret line?

; PEI-NEXT:    RET 0

[MaskRay]

rebase

[RKSimon]

LGTM

llvm/lib/Target/X86/X86FrameLowering.h

public:
   /// We want to place the local stack objects in some sort of sensible order.
   /// The heuristic we use is to try and pack them according to static number
   /// of uses and size in order to minimize code size.
   void orderFrameObjects(const MachineFunction &MF,
                          SmallVectorImpl<int> &ObjectsToAllocate) const override;
 
   /// Wraps up getting a CFI index and building a MachineInstr for it.
   void BuildCFI(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
-                const DebugLoc &DL, const MCCFIInstruction &CFIInst) const;
+                const DebugLoc &DL, const MCCFIInstruction &CFIInst,
+                MachineInstr::MIFlag Flag = MachineInstr::NoFlags) const;
 
   /// Sets up EBP and optionally ESI based on the incoming EBP value.  Only
   /// needed for 32-bit. Used in funclet prologues and at catchret destinations.
   MachineBasicBlock::iterator
   restoreWin32EHStackPointers(MachineBasicBlock &MBB,
                               MachineBasicBlock::iterator MBBI,
                               const DebugLoc &DL, bool RestoreSP = false) const;
 

llvm/lib/Target/X86/X86FrameLowering.cpp

if (!doMergeWithPrevious)
     MBBI = skipDebugInstructionsForward(PI, MBB.end());
 
   return Offset;
 }
 
 void X86FrameLowering::BuildCFI(MachineBasicBlock &MBB,
                                 MachineBasicBlock::iterator MBBI,
                                 const DebugLoc &DL,
-                                const MCCFIInstruction &CFIInst) const {
+                                const MCCFIInstruction &CFIInst,
+                                MachineInstr::MIFlag Flag) const {
   MachineFunction &MF = *MBB.getParent();
   unsigned CFIIndex = MF.addFrameInst(CFIInst);
   BuildMI(MBB, MBBI, DL, TII.get(TargetOpcode::CFI_INSTRUCTION))
-      .addCFIIndex(CFIIndex);
+      .addCFIIndex(CFIIndex)
+      .setMIFlag(Flag);
 }
 
 /// Emits Dwarf Info specifying offsets of callee saved registers and
 /// frame pointer. This is called only when basic block sections are enabled.
 void X86FrameLowering::emitCalleeSavedFrameMovesFullCFA(
     MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const {
   MachineFunction &MF = *MBB.getParent();
   if (!hasFP(MF)) {
BuildMI(MBB, MBBI, DL, TII.get(Is64Bit ? X86::PUSH64r : X86::PUSH32r))
       .addReg(MachineFramePtr, RegState::Kill)
       .setMIFlag(MachineInstr::FrameSetup);
 
     if (NeedsDwarfCFI) {
       // Mark the place where EBP/RBP was saved.
       // Define the current CFA rule to use the provided offset.
       assert(StackSize);
       BuildCFI(MBB, MBBI, DL,
-               MCCFIInstruction::cfiDefCfaOffset(nullptr, -2 * stackGrowth));
+               MCCFIInstruction::cfiDefCfaOffset(nullptr, -2 * stackGrowth),
+               MachineInstr::FrameSetup);
 
       // Change the rule for the FramePtr to be an "offset" rule.
       unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
-      BuildCFI(MBB, MBBI, DL, MCCFIInstruction::createOffset(
-                                  nullptr, DwarfFramePtr, 2 * stackGrowth));
+      BuildCFI(MBB, MBBI, DL,
+               MCCFIInstruction::createOffset(nullptr, DwarfFramePtr,
+                                              2 * stackGrowth),
+               MachineInstr::FrameSetup);
     }
 
     if (NeedsWinCFI) {
       HasWinCFI = true;
       BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))
           .addImm(FramePtr)
           .setMIFlag(MachineInstr::FrameSetup);
     }
if (!IsFunclet) {
               .setMIFlag(MachineInstr::FrameSetup);
 
         if (NeedsDwarfCFI) {
           // Mark effective beginning of when frame pointer becomes valid.
           // Define the current CFA to use the EBP/RBP register.
           unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
           BuildCFI(
               MBB, MBBI, DL,
-              MCCFIInstruction::createDefCfaRegister(nullptr, DwarfFramePtr));
+              MCCFIInstruction::createDefCfaRegister(nullptr, DwarfFramePtr),
+              MachineInstr::FrameSetup);
         }
 
         if (NeedsWinFPO) {
           // .cv_fpo_setframe $FramePtr
           HasWinCFI = true;
           BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_SetFrame))
               .addImm(FramePtr)
               .addImm(0)
while (MBBI != MBB.end() &&
     Register Reg = MBBI->getOperand(0).getReg();
     ++MBBI;
 
     if (!HasFP && NeedsDwarfCFI) {
       // Mark callee-saved push instruction.
       // Define the current CFA rule to use the provided offset.
       assert(StackSize);
       BuildCFI(MBB, MBBI, DL,
-               MCCFIInstruction::cfiDefCfaOffset(nullptr, -StackOffset));
+               MCCFIInstruction::cfiDefCfaOffset(nullptr, -StackOffset),
+               MachineInstr::FrameSetup);
       StackOffset += stackGrowth;
     }
 
     if (NeedsWinCFI) {
       HasWinCFI = true;
       BuildMI(MBB, MBBI, DL, TII.get(X86::SEH_PushReg))
           .addImm(Reg)
           .setMIFlag(MachineInstr::FrameSetup);
void X86FrameLowering::emitPrologue(MachineFunction &MF,
 
   if (((!HasFP && NumBytes) || PushedRegs) && NeedsDwarfCFI) {
     // Mark end of stack pointer adjustment.
     if (!HasFP && NumBytes) {
       // Define the current CFA rule to use the provided offset.
       assert(StackSize);
       BuildCFI(
           MBB, MBBI, DL,
-          MCCFIInstruction::cfiDefCfaOffset(nullptr, StackSize - stackGrowth));
+          MCCFIInstruction::cfiDefCfaOffset(nullptr, StackSize - stackGrowth),
+          MachineInstr::FrameSetup);
     }
 
     // Emit DWARF info specifying the offsets of the callee-saved registers.
     emitCalleeSavedFrameMoves(MBB, MBBI, DL, true);
   }
 
   // X86 Interrupt handling function cannot assume anything about the direction
   // flag (DF in EFLAGS register). Clear this flag by creating "cld" instruction
if (X86FI->hasSwiftAsyncContext()) {
           .addImm(60)
           .setMIFlag(MachineInstr::FrameDestroy);
     }
 
     if (NeedsDwarfCFI) {
       unsigned DwarfStackPtr =
           TRI->getDwarfRegNum(Is64Bit ? X86::RSP : X86::ESP, true);
       BuildCFI(MBB, MBBI, DL,
-               MCCFIInstruction::cfiDefCfa(nullptr, DwarfStackPtr, SlotSize));
+               MCCFIInstruction::cfiDefCfa(nullptr, DwarfStackPtr, SlotSize),
+               MachineInstr::FrameDestroy);
       if (!MBB.succ_empty() && !MBB.isReturnBlock()) {
         unsigned DwarfFramePtr = TRI->getDwarfRegNum(MachineFramePtr, true);
         BuildCFI(MBB, AfterPop, DL,
-                 MCCFIInstruction::createRestore(nullptr, DwarfFramePtr));
+                 MCCFIInstruction::createRestore(nullptr, DwarfFramePtr),
+                 MachineInstr::FrameDestroy);
         --MBBI;
         --AfterPop;
       }
       --MBBI;
     }
   }
 
   MachineBasicBlock::iterator FirstCSPop = MBBI;
if (((TRI->hasStackRealignment(MF)) || MFI.hasVarSizedObjects()) &&
     }
   } else if (NumBytes) {
     // Adjust stack pointer back: ESP += numbytes.
     emitSPUpdate(MBB, MBBI, DL, NumBytes, /*InEpilogue=*/true);
     if (!HasFP && NeedsDwarfCFI) {
       // Define the current CFA rule to use the provided offset.
       BuildCFI(MBB, MBBI, DL,
                MCCFIInstruction::cfiDefCfaOffset(
-                   nullptr, CSSize + TailCallArgReserveSize + SlotSize));
+                   nullptr, CSSize + TailCallArgReserveSize + SlotSize),
+               MachineInstr::FrameDestroy);
     }
     --MBBI;
   }
 
   // Windows unwinder will not invoke function's exception handler if IP is
   // either in prologue or in epilogue.  This behavior causes a problem when a
   // call immediately precedes an epilogue, because the return address points
   // into the epilogue.  To cope with that, we insert an epilogue marker here,
if (!HasFP && NeedsDwarfCFI) {
     // Define the current CFA rule to use the provided offset.
     while (MBBI != MBB.end()) {
       MachineBasicBlock::iterator PI = MBBI;
       unsigned Opc = PI->getOpcode();
       ++MBBI;
       if (Opc == X86::POP32r || Opc == X86::POP64r) {
         Offset += SlotSize;
         BuildCFI(MBB, MBBI, DL,
-                 MCCFIInstruction::cfiDefCfaOffset(nullptr, -Offset));
+                 MCCFIInstruction::cfiDefCfaOffset(nullptr, -Offset),
+                 MachineInstr::FrameDestroy);
       }
     }
   }
 
   // Emit DWARF info specifying the restores of the callee-saved registers.
   // For epilogue with return inside or being other block without successor,
   // no need to generate .cfi_restore for callee-saved registers.
   if (NeedsDwarfCFI && !MBB.succ_empty())

llvm/test/CodeGen/X86/cfi-xmm.ll

 ; CHECK:   addq    $40, %rsp
 ; CHECK:   retq
 ; CHECK:   .cfi_endproc
 
 ; PEI-LABEL: name: _Z1fv
 ; PEI:         $rsp = frame-setup SUB64ri8 $rsp, 40, implicit-def dead $eflags
 ; PEI-NEXT:    frame-setup MOVAPSmr $rsp, 1, $noreg, 16, $noreg, killed $xmm15 :: (store (s128) into %fixed-stack.1)
 ; PEI-NEXT:    frame-setup MOVAPSmr $rsp, 1, $noreg, 0, $noreg, killed $xmm10 :: (store (s128) into %fixed-stack.0)
-; PEI-NEXT:    {{^ +}}CFI_INSTRUCTION def_cfa_offset 48
+; PEI-NEXT:    frame-setup CFI_INSTRUCTION def_cfa_offset 48
 ; PEI-NEXT:    {{^ +}}CFI_INSTRUCTION offset $xmm10, -48
 ; PEI-NEXT:    {{^ +}}CFI_INSTRUCTION offset $xmm15, -32
 ; PEI-NEXT:    INLINEASM {{.*}}
 ; PEI-NEXT:    $xmm10 = MOVAPSrm $rsp, 1, $noreg, 0, $noreg :: (load (s128) from %fixed-stack.0)
 ; PEI-NEXT:    $xmm15 = MOVAPSrm $rsp, 1, $noreg, 16, $noreg :: (load (s128) from %fixed-stack.1)
 ; PEI-NEXT:    $rsp = frame-destroy ADD64ri8 $rsp, 40, implicit-def dead $eflags
 ; PEI-NEXT:    RET 0

llvm/test/CodeGen/X86/epilogue-cfi-fp.ll

 
 ; CHECK-LABEL:   foo:
 ; CHECK:         popl %ebp
 ; CHECK-NEXT:    .cfi_def_cfa %esp, 4
 ; CHECK-NEXT:    retl
 
 ; PEI-LABEL: name: foo
 ; PEI:         $ebp = frame-destroy POP32r implicit-def $esp, implicit $esp
-; PEI-NEXT:    {{^ +}}CFI_INSTRUCTION def_cfa $esp, 4
+; PEI-NEXT:    frame-destroy CFI_INSTRUCTION def_cfa $esp, 4
 ; PEI-NEXT:    RET 0, killed $eax
 
 entry:
   %i.addr = alloca i32, align 4
   %j.addr = alloca i32, align 4
   %k.addr = alloca i32, align 4
   %l.addr = alloca i32, align 4
   %m.addr = alloca i32, align 4

llvm/test/CodeGen/X86/push-cfi.ll

 ; LINUX-NEXT: call
 ; LINUX-NEXT: addl $16, %esp
 ; LINUX: .cfi_adjust_cfa_offset -16
 ; DARWIN-NOT: .cfi_escape
 ; DARWIN-NOT: pushl
 
 ; PEI-LABEL: name: test1_nofp
 ; PEI:         $esp = frame-setup SUB32ri8 $esp, 12, implicit-def dead $eflags
-; PEI-NEXT:    {{^ +}}CFI_INSTRUCTION def_cfa_offset 16
+; PEI-NEXT:    frame-setup CFI_INSTRUCTION def_cfa_offset 16
 ; PEI-NOT:     frame-setup CFI_INSTRUCTION
 ; PEI:         ...
 define void @test1_nofp() #0 personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*) {
 entry:
   invoke void @good(i32 1, i32 2, i32 3, i32 4)
           to label %continue unwind label %cleanup
 continue:
   ret void

llvm/test/CodeGen/X86/throws-cfi-fp.ll

 ; CHECK:         popq %rbp
 ; CHECK-NEXT:    .cfi_def_cfa %rsp, 8
 ; CHECK-NEXT:    retq
 ; CHECK-NEXT:    .LBB0_1:
 ; CHECK-NEXT:    .cfi_def_cfa %rbp, 16
 
 ; PEI-LABEL: name: _Z6throwsv
 ; PEI:         frame-setup PUSH64r killed $rbp, implicit-def $rsp, implicit $rsp
-; PEI-NEXT:    {{^ +}}CFI_INSTRUCTION def_cfa_offset 16
-; PEI-NEXT:    {{^ +}}CFI_INSTRUCTION offset $rbp, -16
+; PEI-NEXT:    frame-setup CFI_INSTRUCTION def_cfa_offset 16
+; PEI-NEXT:    frame-setup CFI_INSTRUCTION offset $rbp, -16
 ; PEI-NEXT:    $rbp = frame-setup MOV64rr $rsp
-; PEI-NEXT:    {{^ +}}CFI_INSTRUCTION def_cfa_register $rbp
+; PEI-NEXT:    frame-setup CFI_INSTRUCTION def_cfa_register $rbp
 ; PEI-NEXT:    frame-setup PUSH64r killed $rbx, implicit-def $rsp, implicit $rsp
 ; PEI-NEXT:    frame-setup PUSH64r undef $rax, implicit-def $rsp, implicit $rsp
 ; PEI-NEXT:    {{^ +}}CFI_INSTRUCTION offset $rbx, -24
 ; PEI:         bb.4.try.cont:
 ; PEI-NEXT:      $rsp = frame-destroy ADD64ri8 $rsp, 8, implicit-def dead $eflags
 ; PEI-NEXT:      $rbx = frame-destroy POP64r implicit-def $rsp, implicit $rsp
 ; PEI-NEXT:      $rbp = frame-destroy POP64r implicit-def $rsp, implicit $rsp
-; PEI-NEXT:      {{^ +}}CFI_INSTRUCTION def_cfa $rsp, 8
+; PEI-NEXT:      frame-destroy CFI_INSTRUCTION def_cfa $rsp, 8
 ; PEI-NEXT:      RET 0
 
 entry:
   %.b5 = load i1, i1* @_ZL11ShouldThrow, align 1
   br i1 %.b5, label %if.then, label %try.cont
 
 if.then:                                          ; preds = %entry
   %exception = tail call i8* @__cxa_allocate_exception(i64 4)