[mlir] Remove the deprecated ODS Op verifier/parser/printer code blocks

[rriddle]

Summary

These have been deprecated for ~1 month now and can be removed.

flang/include/flang/Optimizer/Dialect/FIROps.td

let description = [{
 
     The example creates an array shaped ssa value. The array is rank 1, extent
     10, and each element has type `!fir.type<T>`.
   }];
 
   let results = (outs AnyType:$intype);
 
   let assemblyFormat = "type($intype) attr-dict";
   
-  let verifier = [{
-    // allow `undef : ref<T>` since it is a possible from transformations
-    return mlir::success();
-  }];
+  // Note: we allow `undef : ref<T>` since it is a possible from transformations.
+  let hasVerifier = 0;
 }
 
 def fir_ZeroOp : fir_OneResultOp<"zero_bits", [NoSideEffect]> {
   let summary = "explicit polymorphic zero value of some type";
   let description = [{
     Constructs an ssa-value of the specified type with a value of zero for all
     bits.
 
[{
       $_state.addAttribute(getOperandSegmentSizeAttr(),
         $_builder.getI32VectorAttr({1, 0, sumArgs}));
       $_state.addAttribute(getTargetOffsetAttr(),
         $_builder.getI32VectorAttr(argOffs));
       $_state.addAttributes(attributes);
     }]
   >];
 
-  let parser = [{
-    mlir::OpAsmParser::OperandType selector;
-    mlir::Type type;
-    if (parseSelector(parser, result, selector, type))
-      return mlir::failure();
-
-    llvm::SmallVector<mlir::Attribute> ivalues;
-    llvm::SmallVector<mlir::Block *> dests;
-    llvm::SmallVector<llvm::SmallVector<mlir::Value>> destArgs;
-    while (true) {
-      mlir::Attribute ivalue; // Integer or Unit
-      mlir::Block *dest;
-      llvm::SmallVector<mlir::Value> destArg;
-      mlir::NamedAttrList temp;
-      if (parser.parseAttribute(ivalue, "i", temp) ||
-          parser.parseComma() ||
-          parser.parseSuccessorAndUseList(dest, destArg))
-        return mlir::failure();
-      ivalues.push_back(ivalue);
-      dests.push_back(dest);
-      destArgs.push_back(destArg);
-      if (!parser.parseOptionalRSquare())
-        break;
-      if (parser.parseComma())
-        return mlir::failure();
-    }
-    auto &bld = parser.getBuilder();
-    result.addAttribute(getCasesAttr(), bld.getArrayAttr(ivalues));
-    llvm::SmallVector<int32_t> argOffs;
-    int32_t sumArgs = 0;
-    const auto count = dests.size();
-    for (std::remove_const_t<decltype(count)> i = 0; i != count; ++i) {
-      result.addSuccessors(dests[i]);
-      result.addOperands(destArgs[i]);
-      auto argSize = destArgs[i].size();
-      argOffs.push_back(argSize);
-      sumArgs += argSize;
-    }
-    result.addAttribute(getOperandSegmentSizeAttr(),
-                        bld.getI32VectorAttr({1, 0, sumArgs}));
-    result.addAttribute(getTargetOffsetAttr(), bld.getI32VectorAttr(argOffs));
-    return mlir::success();
-  }];
-
-  let printer = [{
-    p << ' ';
-    p.printOperand(getSelector());
-    p << " : " << getSelector().getType() << " [";
-    auto cases =
-        (*this)->getAttrOfType<mlir::ArrayAttr>(getCasesAttr()).getValue();
-    auto count = getNumConditions();
-    for (decltype(count) i = 0; i != count; ++i) {
-      if (i)
-        p << ", ";
-      auto &attr = cases[i];
-      if (auto intAttr = attr.dyn_cast_or_null<mlir::IntegerAttr>())
-        p << intAttr.getValue();
-      else
-        p.printAttribute(attr);
-      p << ", ";
-      printSuccessorAtIndex(p, i);
-    }
-    p << ']';
-    p.printOptionalAttrDict((*this)->getAttrs(), {getCasesAttr(),
-        getCompareOffsetAttr(), getTargetOffsetAttr(),
-        getOperandSegmentSizeAttr()});
-  }];
-
-  let verifier = [{
-    if (!(getSelector().getType().isa<mlir::IntegerType>() ||
-          getSelector().getType().isa<mlir::IndexType>() ||
-          getSelector().getType().isa<fir::IntegerType>()))
-      return emitOpError("must be an integer");
-    auto cases =
-        (*this)->getAttrOfType<mlir::ArrayAttr>(getCasesAttr()).getValue();
-    auto count = getNumDest();
-    if (count == 0)
-      return emitOpError("must have at least one successor");
-    if (getNumConditions() != count)
-      return emitOpError("number of cases and targets don't match");
-    if (targetOffsetSize() != count)
-      return emitOpError("incorrect number of successor operand groups");
-    for (decltype(count) i = 0; i != count; ++i) {
-      auto &attr = cases[i];
-      if (!(attr.isa<mlir::IntegerAttr>() || attr.isa<mlir::UnitAttr>()))
-        return emitOpError("invalid case alternative");
-    }
-    return mlir::success();
-  }];
-
+  let hasCustomAssemblyFormat = 1;
+  let hasVerifier = 1;
   let extraClassDeclaration = extraSwitchClassDeclaration;
 }
 
 def fir_SelectOp : fir_IntegralSwitchTerminatorOp<"select"> {
   let summary = "a multiway branch";
 
   let description = [{
     A multiway branch terminator with similar semantics to C's `switch`
def fir_ResultOp : fir_Op<"result",
   let hasVerifier = 1;
 }
 
 def FirRegionTerminator : SingleBlockImplicitTerminator<"ResultOp">;
 
 class region_Op<string mnemonic, list<Trait> traits = []> :
     fir_Op<mnemonic,
     !listconcat(traits, [FirRegionTerminator, RecursiveSideEffects])> {
-  let printer = "return ::print(p, *this);";
-  let verifier = "return ::verify(*this);";
-  let parser = "return ::parse$cppClass(parser, result);";
+  let hasCustomAssemblyFormat = 1;
+  let hasVerifier = 1;
 }
 
 def fir_DoLoopOp : region_Op<"do_loop",
     [DeclareOpInterfaceMethods<LoopLikeOpInterface>]> {
   let summary = "generalized loop operation";
   let description = [{
     Generalized high-level looping construct. This operation is similar to
     MLIR's `scf.for`.

flang/lib/Optimizer/Dialect/FIROps.cpp

void fir::IterWhileOp::build(mlir::OpBuilder &builder,
   bodyRegion->front().addArgument(builder.getIndexType(), result.location);
   bodyRegion->front().addArgument(iterate.getType(), result.location);
   bodyRegion->front().addArguments(
       iterArgs.getTypes(),
       SmallVector<Location>(iterArgs.size(), result.location));
   result.addAttributes(attributes);
 }
 
-static mlir::ParseResult parseIterWhileOp(mlir::OpAsmParser &parser,
-                                          mlir::OperationState &result) {
+mlir::ParseResult IterWhileOp::parse(mlir::OpAsmParser &parser,
   auto &builder = parser.getBuilder();
   mlir::OpAsmParser::OperandType inductionVariable, lb, ub, step;
   if (parser.parseLParen() || parser.parseRegionArgument(inductionVariable) ||
       parser.parseEqual())
     return mlir::failure();
 
   // Parse loop bounds.
   auto indexType = builder.getIndexType();
mlir::ParseResult IterWhileOp::parse(mlir::OpAsmParser &parser,
   if (parser.parseRegion(*body, regionArgs, argTypes))
     return failure();
 
   fir::IterWhileOp::ensureTerminator(*body, builder, result.location);
 
   return mlir::success();
 }
 
-static mlir::LogicalResult verify(fir::IterWhileOp op) {
+mlir::LogicalResult fir::IterWhileOp::verify() {
   // Check that the body defines as single block argument for the induction
   // variable.
-  auto *body = op.getBody();
+  auto *body = getBody();
   if (!body->getArgument(1).getType().isInteger(1))
-    return op.emitOpError(
+    return emitOpError(
         "expected body second argument to be an index argument for "
         "the induction variable");
   if (!body->getArgument(0).getType().isIndex())
-    return op.emitOpError(
+    return emitOpError(
         "expected body first argument to be an index argument for "
         "the induction variable");
 
-  auto opNumResults = op.getNumResults();
-  if (op.getFinalValue()) {
+  auto opNumResults = getNumResults();
+  if (getFinalValue()) {
     // Result type must be "(index, i1, ...)".
-    if (!op.getResult(0).getType().isa<mlir::IndexType>())
-      return op.emitOpError("result #0 expected to be index");
-    if (!op.getResult(1).getType().isSignlessInteger(1))
-      return op.emitOpError("result #1 expected to be i1");
+    if (!getResult(0).getType().isa<mlir::IndexType>())
+      return emitOpError("result #0 expected to be index");
+    if (!getResult(1).getType().isSignlessInteger(1))
+      return emitOpError("result #1 expected to be i1");
     opNumResults--;
   } else {
     // iterate_while always returns the early exit induction value.
     // Result type must be "(i1, ...)"
-    if (!op.getResult(0).getType().isSignlessInteger(1))
-      return op.emitOpError("result #0 expected to be i1");
+    if (!getResult(0).getType().isSignlessInteger(1))
+      return emitOpError("result #0 expected to be i1");
   }
   if (opNumResults == 0)
     return mlir::failure();
-  if (op.getNumIterOperands() != opNumResults)
-    return op.emitOpError(
+  if (getNumIterOperands() != opNumResults)
+    return emitOpError(
         "mismatch in number of loop-carried values and defined values");
-  if (op.getNumRegionIterArgs() != opNumResults)
-    return op.emitOpError(
+  if (getNumRegionIterArgs() != opNumResults)
+    return emitOpError(
         "mismatch in number of basic block args and defined values");
-  auto iterOperands = op.getIterOperands();
-  auto iterArgs = op.getRegionIterArgs();
-  auto opResults =
-      op.getFinalValue() ? op.getResults().drop_front() : op.getResults();
+  auto iterOperands = getIterOperands();
+  auto iterArgs = getRegionIterArgs();
+  auto opResults = getFinalValue() ? getResults().drop_front() : getResults();
   unsigned i = 0;
   for (auto e : llvm::zip(iterOperands, iterArgs, opResults)) {
     if (std::get<0>(e).getType() != std::get<2>(e).getType())
-      return op.emitOpError() << "types mismatch between " << i
-                              << "th iter operand and defined value";
+      return emitOpError() << "types mismatch between " << i
     if (std::get<1>(e).getType() != std::get<2>(e).getType())
-      return op.emitOpError() << "types mismatch between " << i
-                              << "th iter region arg and defined value";
+      return emitOpError() << "types mismatch between " << i
 
     i++;
   }
   return mlir::success();
 }
 
-static void print(mlir::OpAsmPrinter &p, fir::IterWhileOp op) {
-  p << " (" << op.getInductionVar() << " = " << op.getLowerBound() << " to "
-    << op.getUpperBound() << " step " << op.getStep() << ") and (";
-  assert(op.hasIterOperands());
-  auto regionArgs = op.getRegionIterArgs();
-  auto operands = op.getIterOperands();
+void fir::IterWhileOp::print(mlir::OpAsmPrinter &p) {
+  p << " (" << getInductionVar() << " = " << getLowerBound() << " to "
+    << getUpperBound() << " step " << getStep() << ") and (";
+  assert(hasIterOperands());
+  auto regionArgs = getRegionIterArgs();
+  auto operands = getIterOperands();
   p << regionArgs.front() << " = " << *operands.begin() << ")";
   if (regionArgs.size() > 1) {
     p << " iter_args(";
     llvm::interleaveComma(
         llvm::zip(regionArgs.drop_front(), operands.drop_front()), p,
         [&](auto it) { p << std::get<0>(it) << " = " << std::get<1>(it); });
     p << ") -> (";
     llvm::interleaveComma(
-        llvm::drop_begin(op.getResultTypes(), op.getFinalValue() ? 0 : 1), p);
+        llvm::drop_begin(getResultTypes(), getFinalValue() ? 0 : 1), p);
     p << ")";
-  } else if (op.getFinalValue()) {
-    p << " -> (" << op.getResultTypes() << ')';
+  } else if (getFinalValue()) {
+    p << " -> (" << getResultTypes() << ')';
   }
-  p.printOptionalAttrDictWithKeyword(op->getAttrs(),
-                                     {op.getFinalValueAttrNameStr()});
+  p.printOptionalAttrDictWithKeyword((*this)->getAttrs(),
+                                     {getFinalValueAttrNameStr()});
   p << ' ';
-  p.printRegion(op.getRegion(), /*printEntryBlockArgs=*/false,
+  p.printRegion(getRegion(), /*printEntryBlockArgs=*/false,
                 /*printBlockTerminators=*/true);
 }
 
 mlir::Region &fir::IterWhileOp::getLoopBody() { return getRegion(); }
 
 bool fir::IterWhileOp::isDefinedOutsideOfLoop(mlir::Value value) {
   return !getRegion().isAncestor(value.getParentRegion());
 }
bodyRegion->front().addArguments(
       iterArgs.getTypes(),
       SmallVector<Location>(iterArgs.size(), result.location));
   if (unordered)
     result.addAttribute(getUnorderedAttrName(result.name),
                         builder.getUnitAttr());
   result.addAttributes(attributes);
 }
 
-static mlir::ParseResult parseDoLoopOp(mlir::OpAsmParser &parser,
+mlir::ParseResult fir::DoLoopOp::parse(mlir::OpAsmParser &parser,
                                        mlir::OperationState &result) {
   auto &builder = parser.getBuilder();
   mlir::OpAsmParser::OperandType inductionVariable, lb, ub, step;
   // Parse the induction variable followed by '='.
   if (parser.parseRegionArgument(inductionVariable) || parser.parseEqual())
     return mlir::failure();
 
   // Parse loop bounds.
fir::DoLoopOp fir::getForInductionVarOwner(mlir::Value val) {
   auto ivArg = val.dyn_cast<mlir::BlockArgument>();
   if (!ivArg)
     return {};
   assert(ivArg.getOwner() && "unlinked block argument");
   auto *containingInst = ivArg.getOwner()->getParentOp();
   return dyn_cast_or_null<fir::DoLoopOp>(containingInst);
 }
 
-// Lifted from loop.loop
-static mlir::LogicalResult verify(fir::DoLoopOp op) {
+// Lifted from loloop
+mlir::LogicalResult fir::DoLoopOp::verify() {
   // Check that the body defines as single block argument for the induction
   // variable.
-  auto *body = op.getBody();
+  auto *body = getBody();
   if (!body->getArgument(0).getType().isIndex())
-    return op.emitOpError(
+    return emitOpError(
         "expected body first argument to be an index argument for "
         "the induction variable");
 
-  auto opNumResults = op.getNumResults();
+  auto opNumResults = getNumResults();
   if (opNumResults == 0)
     return success();
 
-  if (op.getFinalValue()) {
-    if (op.getUnordered())
-      return op.emitOpError("unordered loop has no final value");
+  if (getFinalValue()) {
+    if (getUnordered())
+      return emitOpError("unordered loop has no final value");
     opNumResults--;
   }
-  if (op.getNumIterOperands() != opNumResults)
-    return op.emitOpError(
+  if (getNumIterOperands() != opNumResults)
+    return emitOpError(
         "mismatch in number of loop-carried values and defined values");
-  if (op.getNumRegionIterArgs() != opNumResults)
-    return op.emitOpError(
+  if (getNumRegionIterArgs() != opNumResults)
+    return emitOpError(
         "mismatch in number of basic block args and defined values");
-  auto iterOperands = op.getIterOperands();
-  auto iterArgs = op.getRegionIterArgs();
-  auto opResults =
-      op.getFinalValue() ? op.getResults().drop_front() : op.getResults();
+  auto iterOperands = getIterOperands();
+  auto iterArgs = getRegionIterArgs();
+  auto opResults = getFinalValue() ? getResults().drop_front() : getResults();
   unsigned i = 0;
   for (auto e : llvm::zip(iterOperands, iterArgs, opResults)) {
     if (std::get<0>(e).getType() != std::get<2>(e).getType())
-      return op.emitOpError() << "types mismatch between " << i
-                              << "th iter operand and defined value";
+      return emitOpError() << "types mismatch between " << i
     if (std::get<1>(e).getType() != std::get<2>(e).getType())
-      return op.emitOpError() << "types mismatch between " << i
-                              << "th iter region arg and defined value";
+      return emitOpError() << "types mismatch between " << i
 
     i++;
   }
   return success();
 }
 
-static void print(mlir::OpAsmPrinter &p, fir::DoLoopOp op) {
+void fir::DoLoopOp::print(mlir::OpAsmPrinter &p) {
   bool printBlockTerminators = false;
-  p << ' ' << op.getInductionVar() << " = " << op.getLowerBound() << " to "
-    << op.getUpperBound() << " step " << op.getStep();
-  if (op.getUnordered())
+  p << ' ' << getInductionVar() << " = " << getLowerBound() << " to "
+    << getUpperBound() << " step " << getStep();
+  if (getUnordered())
     p << " unordered";
-  if (op.hasIterOperands()) {
+  if (hasIterOperands()) {
     p << " iter_args(";
-    auto regionArgs = op.getRegionIterArgs();
-    auto operands = op.getIterOperands();
+    auto regionArgs = getRegionIterArgs();
+    auto operands = getIterOperands();
     llvm::interleaveComma(llvm::zip(regionArgs, operands), p, [&](auto it) {
       p << std::get<0>(it) << " = " << std::get<1>(it);
     });
-    p << ") -> (" << op.getResultTypes() << ')';
+    p << ") -> (" << getResultTypes() << ')';
     printBlockTerminators = true;
-  } else if (op.getFinalValue()) {
-    p << " -> " << op.getResultTypes();
+  } else if (getFinalValue()) {
+    p << " -> " << getResultTypes();
     printBlockTerminators = true;
   }
-  p.printOptionalAttrDictWithKeyword(op->getAttrs(),
+  p.printOptionalAttrDictWithKeyword((*this)->getAttrs(),
                                      {"unordered", "finalValue"});
   p << ' ';
-  p.printRegion(op.getRegion(), /*printEntryBlockArgs=*/false,
+  p.printRegion(getRegion(), /*printEntryBlockArgs=*/false,
                 printBlockTerminators);
 }
 
 mlir::Region &fir::DoLoopOp::getLoopBody() { return getRegion(); }
 
 bool fir::DoLoopOp::isDefinedOutsideOfLoop(mlir::Value value) {
   return !getRegion().isAncestor(value.getParentRegion());
 }
return getSubOperands(
       pos, operands, targetOffsetAttr.getValue().cast<DenseIntElementsAttr>(),
       mlir::MutableOperandRange::OperandSegment(pos, targetOffsetAttr));
 }
 
 static unsigned denseElementsSize(mlir::DenseIntElementsAttr attr) {
   return attr.getNumElements();
 }
 
+template <typename OpT>
+static LogicalResult verifyIntegralSwitchTerminator(OpT op) {
+  if (!(op.getSelector().getType().template isa<mlir::IntegerType>() ||
+        op.getSelector().getType().template isa<mlir::IndexType>() ||
+        op.getSelector().getType().template isa<fir::IntegerType>()))
+    return op.emitOpError("must be an integer");
+  auto cases =
+      op->template getAttrOfType<mlir::ArrayAttr>(op.getCasesAttr()).getValue();
+  auto count = op.getNumDest();
+  if (count == 0)
+    return op.emitOpError("must have at least one successor");
+  if (op.getNumConditions() != count)
+    return op.emitOpError("number of cases and targets don't match");
+  if (op.targetOffsetSize() != count)
+    return op.emitOpError("incorrect number of successor operand groups");
+  for (decltype(count) i = 0; i != count; ++i) {
+    if (!(cases[i].template isa<mlir::IntegerAttr, mlir::UnitAttr>()))
+      return op.emitOpError("invalid case alternative");
+  }
+  return mlir::success();
+}
+
+static mlir::ParseResult parseIntegralSwitchTerminator(
+    mlir::OpAsmParser &parser, mlir::OperationState &result,
+    llvm::StringRef casesAttr, llvm::StringRef operandSegmentAttr) {
+  mlir::OpAsmParser::OperandType selector;
+  mlir::Type type;
+  if (parseSelector(parser, result, selector, type))
+    return mlir::failure();
+
+  llvm::SmallVector<mlir::Attribute> ivalues;
+  llvm::SmallVector<mlir::Block *> dests;
+  llvm::SmallVector<llvm::SmallVector<mlir::Value>> destArgs;
+  while (true) {
+    mlir::Attribute ivalue; // Integer or Unit
+    mlir::Block *dest;
+    llvm::SmallVector<mlir::Value> destArg;
+    mlir::NamedAttrList temp;
+    if (parser.parseAttribute(ivalue, "i", temp) || parser.parseComma() ||
+        parser.parseSuccessorAndUseList(dest, destArg))
+      return mlir::failure();
+    ivalues.push_back(ivalue);
+    dests.push_back(dest);
+    destArgs.push_back(destArg);
+    if (!parser.parseOptionalRSquare())
+      break;
+    if (parser.parseComma())
+      return mlir::failure();
+  }
+  auto &bld = parser.getBuilder();
+  result.addAttribute(casesAttr, bld.getArrayAttr(ivalues));
+  llvm::SmallVector<int32_t> argOffs;
+  int32_t sumArgs = 0;
+  const auto count = dests.size();
+  for (std::remove_const_t<decltype(count)> i = 0; i != count; ++i) {
+    result.addSuccessors(dests[i]);
+    result.addOperands(destArgs[i]);
+    auto argSize = destArgs[i].size();
+    argOffs.push_back(argSize);
+    sumArgs += argSize;
+  }
+  result.addAttribute(operandSegmentAttr,
+                      bld.getI32VectorAttr({1, 0, sumArgs}));
+  result.addAttribute(getTargetOffsetAttr(), bld.getI32VectorAttr(argOffs));
+  return mlir::success();
+}
+
+template <typename OpT>
+static void printIntegralSwitchTerminator(OpT op, mlir::OpAsmPrinter &p) {
+  p << ' ';
+  p.printOperand(op.getSelector());
+  p << " : " << op.getSelector().getType() << " [";
+  auto cases =
+      op->template getAttrOfType<mlir::ArrayAttr>(op.getCasesAttr()).getValue();
+  auto count = op.getNumConditions();
+  for (decltype(count) i = 0; i != count; ++i) {
+    if (i)
+      p << ", ";
+    auto &attr = cases[i];
+    if (auto intAttr = attr.template dyn_cast_or_null<mlir::IntegerAttr>())
+      p << intAttr.getValue();
+    else
+      p.printAttribute(attr);
+    p << ", ";
+    op.printSuccessorAtIndex(p, i);
+  }
+  p << ']';
+  p.printOptionalAttrDict(
+      op->getAttrs(), {op.getCasesAttr(), getCompareOffsetAttr(),
+                       getTargetOffsetAttr(), op.getOperandSegmentSizeAttr()});
+}
+
 llvm::Optional<mlir::OperandRange> fir::SelectOp::getCompareOperands(unsigned) {
   return {};
 }
 
 llvm::Optional<llvm::ArrayRef<mlir::Value>>
 fir::SelectOp::getCompareOperands(llvm::ArrayRef<mlir::Value>, unsigned) {
   return {};
 }
fir::SelectOp::getSuccessorOperands(mlir::ValueRange operands, unsigned oper) {
   return {getSubOperands(oper, getSubOperands(2, operands, segments), a)};
 }
 
 unsigned fir::SelectOp::targetOffsetSize() {
   return denseElementsSize((*this)->getAttrOfType<mlir::DenseIntElementsAttr>(
       getTargetOffsetAttr()));
 }
 
+mlir::LogicalResult fir::SelectOp::verify() {
+  return verifyIntegralSwitchTerminator(*this);
+}
+
+mlir::ParseResult fir::SelectOp::parse(mlir::OpAsmParser &parser,
+                                       mlir::OperationState &result) {
+  return parseIntegralSwitchTerminator(parser, result, getCasesAttr(),
+                                       getOperandSegmentSizeAttr());
+}
+
+void fir::SelectOp::print(mlir::OpAsmPrinter &p) {
+  printIntegralSwitchTerminator(*this, p);
+}
+
 //===----------------------------------------------------------------------===//
 // SelectCaseOp
 //===----------------------------------------------------------------------===//
 
 llvm::Optional<mlir::OperandRange>
 fir::SelectCaseOp::getCompareOperands(unsigned cond) {
   auto a = (*this)->getAttrOfType<mlir::DenseIntElementsAttr>(
       getCompareOffsetAttr());
fir::SelectRankOp::getSuccessorOperands(mlir::ValueRange operands,
   return {getSubOperands(oper, getSubOperands(2, operands, segments), a)};
 }
 
 unsigned fir::SelectRankOp::targetOffsetSize() {
   return denseElementsSize((*this)->getAttrOfType<mlir::DenseIntElementsAttr>(
       getTargetOffsetAttr()));
 }
 
+LogicalResult fir::SelectRankOp::verify() {
+  return verifyIntegralSwitchTerminator(*this);
+}
+
+mlir::ParseResult fir::SelectRankOp::parse(mlir::OpAsmParser &parser,
+                                           mlir::OperationState &result) {
+  return parseIntegralSwitchTerminator(parser, result, getCasesAttr(),
+                                       getOperandSegmentSizeAttr());
+}
+
+void fir::SelectRankOp::print(mlir::OpAsmPrinter &p) {
+  printIntegralSwitchTerminator(*this, p);
+}
+
 //===----------------------------------------------------------------------===//
 // SelectTypeOp
 //===----------------------------------------------------------------------===//
 
 llvm::Optional<mlir::OperandRange>
 fir::SelectTypeOp::getCompareOperands(unsigned) {
   return {};
 }
void fir::IfOp::build(mlir::OpBuilder &builder, OperationState &result,
   mlir::Region *elseRegion = result.addRegion();
   if (withElseRegion) {
     elseRegion->push_back(new mlir::Block());
     if (resultTypes.empty())
       IfOp::ensureTerminator(*elseRegion, builder, result.location);
   }
 }
 
-static mlir::ParseResult parseIfOp(OpAsmParser &parser,
+mlir::ParseResult fir::IfOp::parse(OpAsmParser &parser,
                                    OperationState &result) {
   result.regions.reserve(2);
   mlir::Region *thenRegion = result.addRegion();
   mlir::Region *elseRegion = result.addRegion();
 
   auto &builder = parser.getBuilder();
   OpAsmParser::OperandType cond;
   mlir::Type i1Type = builder.getIntegerType(1);
mlir::ParseResult fir::IfOp::parse(OpAsmParser &parser,
   }
 
   // Parse the optional attribute list.
   if (parser.parseOptionalAttrDict(result.attributes))
     return mlir::failure();
   return mlir::success();
 }
 
-static LogicalResult verify(fir::IfOp op) {
-  if (op.getNumResults() != 0 && op.getElseRegion().empty())
-    return op.emitOpError("must have an else block if defining values");
+LogicalResult fir::IfOp::verify() {
+  if (getNumResults() != 0 && getElseRegion().empty())
+    return emitOpError("must have an else block if defining values");
 
   return mlir::success();
 }
 
-static void print(mlir::OpAsmPrinter &p, fir::IfOp op) {
+void fir::IfOp::print(mlir::OpAsmPrinter &p) {
   bool printBlockTerminators = false;
-  p << ' ' << op.getCondition();
-  if (!op.getResults().empty()) {
-    p << " -> (" << op.getResultTypes() << ')';
+  p << ' ' << getCondition();
+  if (!getResults().empty()) {
+    p << " -> (" << getResultTypes() << ')';
     printBlockTerminators = true;
   }
   p << ' ';
-  p.printRegion(op.getThenRegion(), /*printEntryBlockArgs=*/false,
+  p.printRegion(getThenRegion(), /*printEntryBlockArgs=*/false,
                 printBlockTerminators);
 
   // Print the 'else' regions if it exists and has a block.
-  auto &otherReg = op.getElseRegion();
+  auto &otherReg = getElseRegion();
   if (!otherReg.empty()) {
     p << " else ";
     p.printRegion(otherReg, /*printEntryBlockArgs=*/false,
                   printBlockTerminators);
   }
-  p.printOptionalAttrDict(op->getAttrs());
+  p.printOptionalAttrDict((*this)->getAttrs());
 }
 
 void fir::IfOp::resultToSourceOps(llvm::SmallVectorImpl<mlir::Value> &results,
                                   unsigned resultNum) {
   auto *term = getThenRegion().front().getTerminator();
   if (resultNum < term->getNumOperands())
     results.push_back(term->getOperand(resultNum));
   term = getElseRegion().front().getTerminator();

mlir/include/mlir/Dialect/GPU/GPUOps.td

let extraClassDeclaration = [{
     MemRefType getType() { return memref().getType().cast<MemRefType>(); }
   }];
 
   let assemblyFormat = [{
     custom<AsyncDependencies>(type($asyncToken), $asyncDependencies) ` `
     `(` $dynamicSizes `)` (`` `[` $symbolOperands^ `]`)? attr-dict `:` type($memref)
   }];
 
-  let verifier = [{ return ::verify(*this); }];
+  let hasVerifier = 1;
   let hasCanonicalizer = 1;
 }
 
 def GPU_DeallocOp : GPU_Op<"dealloc", [GPU_AsyncOpInterface]> {
 
   let summary = "GPU memory deallocation operation";
 
   let description = [{

mlir/include/mlir/IR/OpBase.td

class Op<Dialect dialect, string mnemonic, list<Trait> props = []> {
   //                   ArrayRef<NamedAttribute> attributes);
   // ```
   list<OpBuilder> builders = ?;
 
   // Avoid generating default build functions.  Custom builders must be
   // provided.
   bit skipDefaultBuilders = 0;
 
-  // Custom parser and printer.
-  // NOTE: These fields are deprecated in favor of `assemblyFormat` or
-  // `hasCustomAssemblyFormat`, and are slated for deletion.
-  code parser = ?;
-  code printer = ?;
-
   // Custom assembly format.
   /// This field corresponds to a declarative description of the assembly format
   /// for this operation. If populated, the `hasCustomAssemblyFormat` field is
   /// ignored.
   string assemblyFormat = ?;
   /// This field indicates that the operation has a custom assembly format
   /// implemented in C++. When set to `1` a `parse` and `print` method are generated
   /// on the operation class. The operation should implement these methods to
class Op<Dialect dialect, string mnemonic, list<Trait> props = []> {
   // verified and which associate with regions (aside from those verified by the
   // traits). If set to `1`, an additional `LogicalResult verifyRegions()`
   // declaration will be generated on the operation class. The operation should
   // implement this method and verify the additional necessary invariants
   // associated with regions. Note that this method is invoked after all the
   // region ops are verified.
   bit hasRegionVerifier = 0;
 
-  // A custom code block corresponding to the extra verification code of the
-  // operation.
-  // NOTE: This field is deprecated in favor of `hasVerifier` and is slated for
-  // deletion.
-  code verifier = ?;
-
   // Whether this op has associated canonicalization patterns.
   bit hasCanonicalizer = 0;
 
   // Whether this op has a static "canonicalize" method to perform "match and
   // rewrite patterns".
   bit hasCanonicalizeMethod = 0;
 
   // Whether this op has a folder.

mlir/lib/Dialect/GPU/IR/GPUDialect.cpp

LogicalResult MemsetOp::fold(ArrayRef<Attribute> operands,
                              SmallVectorImpl<::mlir::OpFoldResult> &results) {
   return foldMemRefCast(*this);
 }
 
 //===----------------------------------------------------------------------===//
 // GPU_AllocOp
 //===----------------------------------------------------------------------===//
 
-static LogicalResult verify(AllocOp op) {
-  auto memRefType = op.memref().getType().cast<MemRefType>();
+LogicalResult AllocOp::verify() {
+  auto memRefType = memref().getType().cast<MemRefType>();
 
-  if (static_cast<int64_t>(op.dynamicSizes().size()) !=
+  if (static_cast<int64_t>(dynamicSizes().size()) !=
       memRefType.getNumDynamicDims())
-    return op.emitOpError("dimension operand count does not equal memref "
-                          "dynamic dimension count");
+    return emitOpError("dimension operand count does not equal memref "
 
   unsigned numSymbols = 0;
   if (!memRefType.getLayout().isIdentity())
     numSymbols = memRefType.getLayout().getAffineMap().getNumSymbols();
-  if (op.symbolOperands().size() != numSymbols)
-    return op.emitOpError("symbol operand count does not equal memref symbol "
-                          "count");
+  if (symbolOperands().size() != numSymbols) {
+    return emitOpError(
+        "symbol operand count does not equal memref symbol count");
+  }
 
   return success();
 }
 
 namespace {
 
 /// Folding of memref.dim(gpu.alloc(%size), %idx) -> %size similar to
 /// `memref::AllocOp`.

mlir/tools/mlir-tblgen/OpDefinitionsGen.cpp

void OpEmitter::genTypeInterfaceMethods() {
   body << "  return ::mlir::success();";
 }
 
 void OpEmitter::genParser() {
   if (hasStringAttribute(def, "assemblyFormat"))
     return;
 
   bool hasCppFormat = def.getValueAsBit("hasCustomAssemblyFormat");
-  if (!hasStringAttribute(def, "parser") && !hasCppFormat)
+  if (!hasCppFormat)
     return;
 
   SmallVector<MethodParameter> paramList;
   paramList.emplace_back("::mlir::OpAsmParser &", "parser");
   paramList.emplace_back("::mlir::OperationState &", "result");
 
-  // If this uses the cpp format, only generate a declaration.
-  if (hasCppFormat) {
-    auto *method = opClass.declareStaticMethod("::mlir::ParseResult", "parse",
-                                               std::move(paramList));
-    ERROR_IF_PRUNED(method, "parse", op);
-    return;
-  }
-
-  PrintNote(op.getLoc(),
-            "`parser` and `printer` fields are deprecated and will be removed, "
-            "please use the `hasCustomAssemblyFormat` field instead");
-
-  auto *method = opClass.addStaticMethod("::mlir::ParseResult", "parse",
-                                         std::move(paramList));
-  ERROR_IF_PRUNED(method, "parse", op);
-
-  FmtContext fctx;
-  fctx.addSubst("cppClass", opClass.getClassName());
-  auto parser = def.getValueAsString("parser").ltrim().rtrim(" \t\v\f\r");
-  method->body() << "  " << tgfmt(parser, &fctx);
 }
 
 void OpEmitter::genPrinter() {
   if (hasStringAttribute(def, "assemblyFormat"))
     return;
 
-  // If this uses the cpp format, only generate a declaration.
-  if (def.getValueAsBit("hasCustomAssemblyFormat")) {
-    auto *method = opClass.declareMethod(
-        "void", "print", MethodParameter("::mlir::OpAsmPrinter &", "p"));
-    ERROR_IF_PRUNED(method, "print", op);
+  // Check to see if this op uses a c++ format.
+  if (!def.getValueAsBit("hasCustomAssemblyFormat"))
     return;
-  }
-
-  auto *valueInit = def.getValueInit("printer");
-  StringInit *stringInit = dyn_cast<StringInit>(valueInit);
-  if (!stringInit)
-    return;
-
-  auto *method = opClass.addMethod(
+  auto *method = opClass.declareMethod(
       "void", "print", MethodParameter("::mlir::OpAsmPrinter &", "p"));
   ERROR_IF_PRUNED(method, "print", op);
-  FmtContext fctx;
-  fctx.addSubst("cppClass", opClass.getClassName());
-  auto printer = stringInit->getValue().ltrim().rtrim(" \t\v\f\r");
-  method->body() << "  " << tgfmt(printer, &fctx);
 }
 
 /// Generate verification on native traits requiring attributes.
 static void genNativeTraitAttrVerifier(MethodBody &body,
                                        const OpOrAdaptorHelper &emitHelper) {
   // Check that the variadic segment sizes attribute exists and contains the
   // expected number of elements.
   //
void OpEmitter::genVerifier() {
   genSuccessorVerifier(implBody);
 
   implBody << "  return ::mlir::success();\n";
 
   // TODO: Some places use the `verifyInvariants` to do operation verification.
   // This may not act as their expectation because this doesn't call any
   // verifiers of native/interface traits. Needs to review those use cases and
   // see if we should use the mlir::verify() instead.
-  auto *valueInit = def.getValueInit("verifier");
-  StringInit *stringInit = dyn_cast<StringInit>(valueInit);
-  bool hasCustomVerifyCodeBlock = stringInit && !stringInit->getValue().empty();
-
   auto *method = opClass.addMethod("::mlir::LogicalResult", "verifyInvariants");
   ERROR_IF_PRUNED(method, "verifyInvariants", op);
   auto &body = method->body();
-  if (hasCustomVerifyCodeBlock || def.getValueAsBit("hasVerifier")) {
+  if (def.getValueAsBit("hasVerifier")) {
     body << "  if(::mlir::succeeded(verifyInvariantsImpl()) && "
             "::mlir::succeeded(verify()))\n";
     body << "    return ::mlir::success();\n";
     body << "  return ::mlir::failure();";
   } else {
     body << "  return verifyInvariantsImpl();";
   }
 }
 
 void OpEmitter::genCustomVerifier() {
-  auto *valueInit = def.getValueInit("verifier");
-  StringInit *stringInit = dyn_cast<StringInit>(valueInit);
-  bool hasCustomVerifyCodeBlock = stringInit && !stringInit->getValue().empty();
-
   if (def.getValueAsBit("hasVerifier")) {
     auto *method = opClass.declareMethod("::mlir::LogicalResult", "verify");
     ERROR_IF_PRUNED(method, "verify", op);
   } else if (def.getValueAsBit("hasRegionVerifier")) {
     auto *method =
         opClass.declareMethod("::mlir::LogicalResult", "verifyRegions");
     ERROR_IF_PRUNED(method, "verifyRegions", op);
-  } else if (hasCustomVerifyCodeBlock) {
-    auto *method = opClass.addMethod("::mlir::LogicalResult", "verify");
-    ERROR_IF_PRUNED(method, "verify", op);
-    auto &body = method->body();
-
-    FmtContext fctx;
-    fctx.addSubst("cppClass", opClass.getClassName());
-    auto printer = stringInit->getValue().ltrim().rtrim(" \t\v\f\r");
-    body << "  " << tgfmt(printer, &fctx);
   }
 }
 
 void OpEmitter::genOperandResultVerifier(MethodBody &body,
                                          Operator::const_value_range values,
                                          StringRef valueKind) {
   // Check that an optional value is at most 1 element.
   //