[AArch64] Fix legalization of v1f64 strict_fsetcc and strict_fsetccs

[john.brawn]

Summary

These operations are scalarized but the result type v1i1 isn't which needs special handling (the same as is done for the non-strict versions of these operations).

[dmgreen]

This does look like it's doing the same as other similar operations now. Unless anyone else has any comments, this LGTM.

llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

SDValue DAGTypeLegalizer::ScalarizeVecRes_StrictFPOp(SDNode *N) {
   SmallVector<SDValue, 4> Opers(NumOpers);
 
   // The Chain is the first operand.
   Opers[0] = Chain;
 
   // Now process the remaining operands.
   for (unsigned i = 1; i < NumOpers; ++i) {
     SDValue Oper = N->getOperand(i);
+    EVT OperVT = Oper.getValueType();
 
-    if (Oper.getValueType().isVector())
+    if (OperVT.isVector()) {
+      if (getTypeAction(OperVT) == TargetLowering::TypeScalarizeVector)
         Oper = GetScalarizedVector(Oper);
+      else
+        Oper = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl,
+                           OperVT.getVectorElementType(), Oper,
+                           DAG.getVectorIdxConstant(0, dl));
+    }
 
     Opers[i] = Oper;
   }
 
   SDValue Result = DAG.getNode(N->getOpcode(), dl, DAG.getVTList(ValueVTs),
                                Opers, N->getFlags());
 
   // Legalize the chain result - switch anything that used the old chain to

llvm/test/CodeGen/AArch64/fpconv-vector-op-scalarize-strict.ll

-; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=aarch64-apple-darwin | FileCheck %s
-
-; Check that the legalizer doesn't crash when scalarizing FP conversion
-; instructions' operands.  The operands are all illegal on AArch64,
-; ensuring they are legalized.  The results are all legal.
-
-define <1 x double> @test_sitofp(<1 x i1> %in) #0 {
-; CHECK-LABEL: test_sitofp:
-; CHECK:       ; %bb.0: ; %entry
-; CHECK-NEXT:    sbfx w8, w0, #0, #1
-; CHECK-NEXT:    scvtf d0, w8
-; CHECK-NEXT:    ret
-entry:
-  %0 = call <1 x double> @llvm.experimental.constrained.sitofp.v1f64.v1i1(<1 x i1> %in, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
-  ret <1 x double> %0
-}
-
-define <1 x double> @test_uitofp(<1 x i1> %in) #0 {
-; CHECK-LABEL: test_uitofp:
-; CHECK:       ; %bb.0: ; %entry
-; CHECK-NEXT:    and w8, w0, #0x1
-; CHECK-NEXT:    ucvtf d0, w8
-; CHECK-NEXT:    ret
-entry:
-  %0 = call <1 x double> @llvm.experimental.constrained.uitofp.v1f64.v1i1(<1 x i1> %in, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
-  ret <1 x double> %0
-}
-
-attributes #0 = { strictfp }
-
-declare <1 x double> @llvm.experimental.constrained.sitofp.v1f64.v1i1(<1 x i1>, metadata, metadata)
-declare <1 x double> @llvm.experimental.constrained.uitofp.v1f64.v1i1(<1 x i1>, metadata, metadata)

llvm/test/CodeGen/AArch64/vector-op-scalarize-strict.ll

+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=aarch64-apple-darwin | FileCheck %s
+
+; Check that the legalizer doesn't crash when scalarizing FP instructions'
+; operands or results. In each test either the result or the operand are
+; illegal on AArch64, though not both.
+
+define <1 x double> @test_sitofp(<1 x i1> %in) #0 {
+; CHECK-LABEL: test_sitofp:
+; CHECK:       ; %bb.0: ; %entry
+; CHECK-NEXT:    sbfx w8, w0, #0, #1
+; CHECK-NEXT:    scvtf d0, w8
+; CHECK-NEXT:    ret
+entry:
+  %0 = call <1 x double> @llvm.experimental.constrained.sitofp.v1f64.v1i1(<1 x i1> %in, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
+  ret <1 x double> %0
+}
+
+define <1 x double> @test_uitofp(<1 x i1> %in) #0 {
+; CHECK-LABEL: test_uitofp:
+; CHECK:       ; %bb.0: ; %entry
+; CHECK-NEXT:    and w8, w0, #0x1
+; CHECK-NEXT:    ucvtf d0, w8
+; CHECK-NEXT:    ret
+entry:
+  %0 = call <1 x double> @llvm.experimental.constrained.uitofp.v1f64.v1i1(<1 x i1> %in, metadata !"round.dynamic", metadata !"fpexcept.strict") #0
+  ret <1 x double> %0
+}
+
+define <1 x i1> @test_fcmp(<1 x double> %x, <1 x double> %y) #0 {
+; CHECK-LABEL: test_fcmp:
+; CHECK:       ; %bb.0: ; %entry
+; CHECK-NEXT:    fcmp d0, d1
+; CHECK-NEXT:    cset w8, eq
+; CHECK-NEXT:    csinc w0, w8, wzr, vc
+; CHECK-NEXT:    ret
+entry:
+  %conv = tail call <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double> %x, <1 x double> %y, metadata !"ueq", metadata !"fpexcept.strict")
+  ret <1 x i1> %conv
+}
+
+define <1 x i1> @test_fcmps(<1 x double> %x, <1 x double> %y) #0 {
+; CHECK-LABEL: test_fcmps:
+; CHECK:       ; %bb.0: ; %entry
+; CHECK-NEXT:    fcmpe d0, d1
+; CHECK-NEXT:    cset w8, eq
+; CHECK-NEXT:    csinc w0, w8, wzr, vc
+; CHECK-NEXT:    ret
+entry:
+  %conv = tail call <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double> %x, <1 x double> %y, metadata !"ueq", metadata !"fpexcept.strict")
+  ret <1 x i1> %conv
+}
+
+attributes #0 = { strictfp }
+
+declare <1 x double> @llvm.experimental.constrained.sitofp.v1f64.v1i1(<1 x i1>, metadata, metadata)
+declare <1 x double> @llvm.experimental.constrained.uitofp.v1f64.v1i1(<1 x i1>, metadata, metadata)
+declare <1 x i1> @llvm.experimental.constrained.fcmp.v1f64(<1 x double>, <1 x double>, metadata, metadata) #0
+declare <1 x i1> @llvm.experimental.constrained.fcmps.v1f64(<1 x double>, <1 x double>, metadata, metadata) #0