[mlir] Move trait to InferTypeOpInterface

[jpienaar]

Summary

Step towards removing the hardcoded behavior of this trait (from ODS to Python bindings) and to instead use common interface.

[rriddle]

mlir/include/mlir/Interfaces/InferTypeOpInterface.td

182

Is this implying that SameOperandsAndResultType shouldn't be a trait, and should instead imply a specific implementation of InferTypeOpInterface?

mlir/test/Dialect/SPIRV/IR/bit-ops.mlir

28–32

typo: verificaiton

Also, Can you expand this TODO? It isn't obvious what the ideal state is.

62

Same here and elsewhere.

[jpienaar]

mlir/include/mlir/Interfaces/InferTypeOpInterface.td

182

Yes, and most places we can simply remove it. Now I will probably still keep it as a trait as folks are indexing of it. Most cases won't need it, and then this trait would just implement the methods required for InferTypeOpInterface.

[jpienaar]

Fix typos and make TODOs more explicit

[jpienaar]

mlir/include/mlir/Interfaces/InferTypeOpInterface.td

182

(to expand: it'll become an OpTraitList ODS side, C++ we'll still have it as a trait but the op will also have the infer type interface and most special casing can be removed)

[rriddle]

LG, directing more thing towards InferTypeOpInterface seems good in general.

[rriddle]

Please fix flang as well, looks like it's broken by this.

[jpienaar]

Updating flang and standalone example

flang/include/flang/Optimizer/Dialect/FIRDialect.td

 //===----------------------------------------------------------------------===//
 
 #ifndef FORTRAN_DIALECT_FIR_DIALECT
 #define FORTRAN_DIALECT_FIR_DIALECT
 
 include "mlir/IR/SymbolInterfaces.td"
 include "mlir/Interfaces/CallInterfaces.td"
 include "mlir/Interfaces/ControlFlowInterfaces.td"
+include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/LoopLikeInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 
 def fir_Dialect : Dialect {
   let name = "fir";
   let cppNamespace = "::fir";
 }
 
 #endif // FORTRAN_DIALECT_FIR_DIALECT

mlir/examples/standalone/include/Standalone/StandaloneOps.td

 //===- StandaloneOps.td - Standalone dialect ops -----------*- tablegen -*-===//
 //
 // This file is licensed under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef STANDALONE_OPS
 #define STANDALONE_OPS
 
 include "Standalone/StandaloneDialect.td"
+include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 
 def Standalone_FooOp : Standalone_Op<"foo", [NoSideEffect,
                                              SameOperandsAndResultType]> {
     let summary = "Illustrates how to define an operation.";
     let description = [{
         The `standalone.foo` operation illustrates how to define a new
         operation in a dialect. It uses an operation trait to declare that it

mlir/include/mlir/Dialect/Arithmetic/IR/ArithmeticOps.td

 //===- ArithmeticOps.td - Arithmetic op definitions --------*- tablegen -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef ARITHMETIC_OPS
 #define ARITHMETIC_OPS
 
 include "mlir/Dialect/Arithmetic/IR/ArithmeticBase.td"
 include "mlir/Interfaces/CastInterfaces.td"
+include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 include "mlir/Interfaces/VectorInterfaces.td"
 include "mlir/IR/OpAsmInterface.td"
 
 // Base class for Arithmetic dialect ops. Ops in this dialect have no side
 // effects and can be applied element-wise to vectors and tensors.
 class Arith_Op<string mnemonic, list<OpTrait> traits = []> :
     Op<Arithmetic_Dialect, mnemonic, traits # [NoSideEffect,

mlir/include/mlir/Dialect/Complex/IR/ComplexOps.td

 //===- ComplexOps.td - Complex op definitions ----------------*- tablegen -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef COMPLEX_OPS
 #define COMPLEX_OPS
 
 include "mlir/Dialect/Complex/IR/ComplexBase.td"
+include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 
 class Complex_Op<string mnemonic, list<OpTrait> traits = []>
     : Op<Complex_Dialect, mnemonic, traits>;
 
 // Base class for standard arithmetic operations on complex numbers with a
 // floating-point element type. These operations take two operands and return
 // one result, all of which must be complex numbers of the same type.
let description = [{
 
     ```mlir
     %a = complex.eq %b, %c : complex<f32>
     ```
   }];
 
   let arguments = (ins Complex<AnyFloat>:$lhs, Complex<AnyFloat>:$rhs);
   let results = (outs I1:$result);
-  let builders = [
-    OpBuilder<(ins "Value":$lhs, "Value":$rhs), [{
-      build($_builder, $_state, $_builder.getI1Type(), lhs, rhs);
-    }]>];
 
   let assemblyFormat = "$lhs `,` $rhs  attr-dict `:` type($lhs)";
 }
 
 //===----------------------------------------------------------------------===//
 // ExpOp
 //===----------------------------------------------------------------------===//
 
let description = [{
 
     ```mlir
     %a = complex.neq %b, %c : complex<f32>
     ```
   }];
 
   let arguments = (ins Complex<AnyFloat>:$lhs, Complex<AnyFloat>:$rhs);
   let results = (outs I1:$result);
-  let builders = [
-    OpBuilder<(ins "Value":$lhs, "Value":$rhs), [{
-      build($_builder, $_state, $_builder.getI1Type(), lhs, rhs);
-    }]>];
 
   let assemblyFormat = "$lhs `,` $rhs  attr-dict `:` type($lhs)";
 }
 
 //===----------------------------------------------------------------------===//
 // ReOp
 //===----------------------------------------------------------------------===//
 

mlir/include/mlir/Dialect/GPU/GPUDialect.h

 #include "mlir/Dialect/DLTI/Traits.h"
 #include "mlir/IR/Builders.h"
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/IR/Dialect.h"
 #include "mlir/IR/FunctionSupport.h"
 #include "mlir/IR/OpDefinition.h"
 #include "mlir/IR/OpImplementation.h"
 #include "mlir/IR/SymbolTable.h"
+#include "mlir/Interfaces/InferTypeOpInterface.h"
 #include "mlir/Interfaces/SideEffectInterfaces.h"
 
 namespace mlir {
 class FuncOp;
 
 namespace gpu {
 
 /// Utility class for the GPU dialect to represent triples of `Value`s

mlir/include/mlir/Dialect/GPU/GPUOps.td

 #ifndef GPU_OPS
 #define GPU_OPS
 
 include "mlir/Dialect/DLTI/DLTIBase.td"
 include "mlir/Dialect/GPU/GPUBase.td"
 include "mlir/Dialect/LLVMIR/LLVMOpBase.td"
 include "mlir/IR/SymbolInterfaces.td"
 include "mlir/Interfaces/DataLayoutInterfaces.td"
+include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 
 //===----------------------------------------------------------------------===//
 // GPU Dialect operations.
 //===----------------------------------------------------------------------===//
 
 class GPU_Op<string mnemonic, list<OpTrait> traits = []> :
     Op<GPU_Dialect, mnemonic, traits>;

mlir/include/mlir/Dialect/LLVMIR/LLVMDialect.h

 #include "mlir/Dialect/LLVMIR/LLVMTypes.h"
 #include "mlir/IR/BuiltinOps.h"
 #include "mlir/IR/Dialect.h"
 #include "mlir/IR/OpDefinition.h"
 #include "mlir/IR/OpImplementation.h"
 #include "mlir/IR/TypeSupport.h"
 #include "mlir/IR/Types.h"
 #include "mlir/Interfaces/ControlFlowInterfaces.h"
+#include "mlir/Interfaces/InferTypeOpInterface.h"
 #include "mlir/Interfaces/SideEffectInterfaces.h"
 #include "llvm/IR/DerivedTypes.h"
 #include "llvm/IR/LLVMContext.h"
 #include "llvm/IR/Module.h"
 #include "llvm/IR/Type.h"
 
 #include "mlir/Dialect/LLVMIR/LLVMOpsEnums.h.inc"
 

mlir/include/mlir/Dialect/LLVMIR/LLVMOps.td

 
 #ifndef LLVMIR_OPS
 #define LLVMIR_OPS
 
 include "mlir/Dialect/LLVMIR/LLVMOpBase.td"
 include "mlir/Dialect/LLVMIR/LLVMOpsInterfaces.td"
 include "mlir/IR/SymbolInterfaces.td"
 include "mlir/Interfaces/ControlFlowInterfaces.td"
+include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 
 def FMFnnan     : BitEnumAttrCase<"nnan", 0x1>;
 def FMFninf     : BitEnumAttrCase<"ninf", 0x2>;
 def FMFnsz      : BitEnumAttrCase<"nsz", 0x4>;
 def FMFarcp     : BitEnumAttrCase<"arcp", 0x8>;
 def FMFcontract : BitEnumAttrCase<"contract", 0x10>;
 def FMFafn      : BitEnumAttrCase<"afn", 0x20>;

 def LLVM_SelectOp
     : LLVM_Op<"select",
           [NoSideEffect, AllTypesMatch<["trueValue", "falseValue", "res"]>]>,
       LLVM_Builder<
           "$res = builder.CreateSelect($condition, $trueValue, $falseValue);"> {
   let arguments = (ins LLVM_ScalarOrVectorOf<I1>:$condition,
                    LLVM_Type:$trueValue, LLVM_Type:$falseValue);
   let results = (outs LLVM_Type:$res);
-  let builders = [
-    OpBuilder<(ins "Value":$condition, "Value":$lhs, "Value":$rhs),
-    [{
-      build($_builder, $_state, lhs.getType(), condition, lhs, rhs);
-    }]>];
   let assemblyFormat = "operands attr-dict `:` type($condition) `,` type($res)";
 }
 def LLVM_FreezeOp : LLVM_Op<"freeze", [SameOperandsAndResultType]> {
   let arguments = (ins LLVM_Type:$val);
   let results = (outs LLVM_Type:$res);
   let builders = [LLVM_OneResultOpBuilder];
   let assemblyFormat = "$val attr-dict `:` type($val)";
   string llvmBuilder = "builder.CreateFreeze($val);";

mlir/include/mlir/Dialect/Math/IR/MathOps.td

 //===- MathOps.td - Math op definitions --------------------*- tablegen -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef MATH_OPS
 #define MATH_OPS
 
 include "mlir/Dialect/Math/IR/MathBase.td"
+include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/VectorInterfaces.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 
 // Base class for math dialect ops. Ops in this dialect have no side effects and
 // can be applied element-wise to vectors and tensors.
 class Math_Op<string mnemonic, list<OpTrait> traits = []> :
     Op<Math_Dialect, mnemonic, traits # [NoSideEffect,
     DeclareOpInterfaceMethods<VectorUnrollOpInterface>] #

mlir/include/mlir/Dialect/Quant/QuantOps.td

 //===- QuantOps.td - Quantization operation definition -----*- tablegen -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This is the operation definition file for Quantization.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef DIALECT_QUANT_QUANT_OPS_
 #define DIALECT_QUANT_QUANT_OPS_
 
 include "mlir/Dialect/Quant/QuantOpsBase.td"
+include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 
 //===----------------------------------------------------------------------===//
 // Base classes
 //===----------------------------------------------------------------------===//
 
 class quant_Op<string mnemonic, list<OpTrait> traits> :
     Op<Quantization_Dialect, mnemonic, traits>;

mlir/include/mlir/Dialect/SPIRV/IR/SPIRVArithmeticOps.td

 // to "3.32.13. Arithmetic Instructions" of the SPIR-V specification.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef MLIR_DIALECT_SPIRV_IR_ARITHMETIC_OPS
 #define MLIR_DIALECT_SPIRV_IR_ARITHMETIC_OPS
 
 include "mlir/Dialect/SPIRV/IR/SPIRVBase.td"
+include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 
 class SPV_ArithmeticBinaryOp<string mnemonic, Type type,
                        list<OpTrait> traits = []> :
       // Operands type same as result type.
       SPV_BinaryOp<mnemonic, type, type,
                    !listconcat(traits,
                                [NoSideEffect, SameOperandsAndResultType])> {

mlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td

let arguments = (ins
     SPV_SelectType:$true_value,
     SPV_SelectType:$false_value
   );
 
   let results = (outs
     SPV_SelectType:$result
   );
 
-  let builders = [
-    OpBuilder<(ins "Value":$cond, "Value":$trueValue, "Value":$falseValue)>];
-
   let assemblyFormat = [{
     operands attr-dict `:` type($condition) `,` type($result)
   }];
 }
 
 // -----
 
 def SPV_UGreaterThanOp : SPV_LogicalBinaryOp<"UGreaterThan",

mlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td

def SPV_GroupNonUniformElectOp : SPV_Op<"GroupNonUniformElect", []> {
   let arguments = (ins
     SPV_ScopeAttr:$execution_scope
   );
 
   let results = (outs
     SPV_Bool:$result
   );
 
-  let builders = [OpBuilder<(ins "spirv::Scope")>];
-
   let assemblyFormat = "$execution_scope attr-dict `:` type($result)";
 }
 
 // -----
 
 def SPV_GroupNonUniformFAddOp : SPV_GroupNonUniformArithmeticOp<"GroupNonUniformFAdd", SPV_Float, []> {
   let summary = [{
     A floating point add group operation of all Value operands contributed

mlir/include/mlir/Dialect/SPIRV/IR/SPIRVOps.h

 #define MLIR_DIALECT_SPIRV_IR_SPIRVOPS_H_
 
 #include "mlir/Dialect/SPIRV/IR/SPIRVAttributes.h"
 #include "mlir/Dialect/SPIRV/IR/SPIRVOpTraits.h"
 #include "mlir/Dialect/SPIRV/IR/SPIRVTypes.h"
 #include "mlir/IR/BuiltinOps.h"
 #include "mlir/IR/OpImplementation.h"
 #include "mlir/Interfaces/ControlFlowInterfaces.h"
+#include "mlir/Interfaces/InferTypeOpInterface.h"
 #include "mlir/Interfaces/SideEffectInterfaces.h"
 #include "llvm/Support/PointerLikeTypeTraits.h"
 
 // TableGen'erated operation interfaces for querying versions, extensions, and
 // capabilities.
 #include "mlir/Dialect/SPIRV/IR/SPIRVAvailability.h.inc"
 
 namespace mlir {

mlir/include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td

 //===- SparseTensorOps.td - Sparse tensor dialect ops ------*- tablegen -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef SPARSETENSOR_OPS
 #define SPARSETENSOR_OPS
 
 include "mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.td"
 include "mlir/Dialect/SparseTensor/IR/SparseTensorBase.td"
+include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 
 //===----------------------------------------------------------------------===//
 // Base class.
 //===----------------------------------------------------------------------===//
 
 class SparseTensor_Op<string mnemonic, list<OpTrait> traits = []>
   : Op<SparseTensor_Dialect, mnemonic, traits> {

mlir/include/mlir/Dialect/StandardOps/IR/Ops.h

 #include "mlir/Dialect/Arithmetic/IR/Arithmetic.h"
 #include "mlir/IR/Builders.h"
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/IR/Dialect.h"
 #include "mlir/IR/OpImplementation.h"
 #include "mlir/Interfaces/CallInterfaces.h"
 #include "mlir/Interfaces/CastInterfaces.h"
 #include "mlir/Interfaces/ControlFlowInterfaces.h"
+#include "mlir/Interfaces/InferTypeOpInterface.h"
 #include "mlir/Interfaces/SideEffectInterfaces.h"
 #include "mlir/Interfaces/VectorInterfaces.h"
 
 // Pull in all enum type definitions and utility function declarations.
 #include "mlir/Dialect/StandardOps/IR/OpsEnums.h.inc"
 
 namespace mlir {
 class AffineMap;

mlir/include/mlir/Dialect/StandardOps/IR/Ops.td

 #define STANDARD_OPS
 
 include "mlir/Dialect/StandardOps/IR/StandardOpsBase.td"
 include "mlir/IR/OpAsmInterface.td"
 include "mlir/IR/SymbolInterfaces.td"
 include "mlir/Interfaces/CallInterfaces.td"
 include "mlir/Interfaces/CastInterfaces.td"
 include "mlir/Interfaces/ControlFlowInterfaces.td"
+include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 include "mlir/Interfaces/VectorInterfaces.td"
 
 def StandardOps_Dialect : Dialect {
   let name = "std";
   let cppNamespace = "::mlir";
   let dependentDialects = ["arith::ArithmeticDialect"];
   let hasConstantMaterializer = 1;
let description = [{
     ```
   }];
 
   let arguments = (ins AnyTypeOf<[AnyRankedOrUnrankedMemRef, AnyTensor],
                                  "any memref or tensor type">:$memrefOrTensor);
   let results = (outs Index);
   let verifier = ?;
 
-  let builders = [
-    OpBuilder<(ins "Value":$tensor), [{
-      auto indexType = $_builder.getIndexType();
-      build($_builder, $_state, indexType, tensor);
-    }]>];
-
   let hasFolder = 1;
   let assemblyFormat = "$memrefOrTensor attr-dict `:` type($memrefOrTensor)";
 }
 
 //===----------------------------------------------------------------------===//
 // ReturnOp
 //===----------------------------------------------------------------------===//
 
let description = [{
     ```
   }];
 
   let arguments = (ins BoolLike:$condition,
                        AnyType:$true_value,
                        AnyType:$false_value);
   let results = (outs AnyType:$result);
 
-  let builders = [
-    OpBuilder<(ins "Value":$condition, "Value":$trueValue,
-      "Value":$falseValue), [{
-      $_state.addOperands({condition, trueValue, falseValue});
-      $_state.addTypes(trueValue.getType());
-    }]>];
-
   let hasCanonicalizer = 1;
   let hasFolder = 1;
 }
 
 //===----------------------------------------------------------------------===//
 // SplatOp
 //===----------------------------------------------------------------------===//
 

mlir/include/mlir/Dialect/X86Vector/X86Vector.td

 //===-- X86VectorOps.td - X86Vector dialect operation defs -*- tablegen -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file defines the basic operations for the X86Vector dialect.
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef X86VECTOR_OPS
 #define X86VECTOR_OPS
 
+include "mlir/Interfaces/InferTypeOpInterface.td"
 include "mlir/Interfaces/SideEffectInterfaces.td"
 include "mlir/Dialect/LLVMIR/LLVMOpBase.td"
 
 //===----------------------------------------------------------------------===//
 // X86Vector dialect definition
 //===----------------------------------------------------------------------===//
 
 def X86Vector_Dialect : Dialect {

mlir/include/mlir/Dialect/X86Vector/X86VectorDialect.h

 
 #ifndef MLIR_DIALECT_X86VECTOR_X86VECTORDIALECT_H_
 #define MLIR_DIALECT_X86VECTOR_X86VECTORDIALECT_H_
 
 #include "mlir/IR/BuiltinTypes.h"
 #include "mlir/IR/Dialect.h"
 #include "mlir/IR/OpDefinition.h"
 #include "mlir/IR/OpImplementation.h"
+#include "mlir/Interfaces/InferTypeOpInterface.h"
 #include "mlir/Interfaces/SideEffectInterfaces.h"
 
 #include "mlir/Dialect/X86Vector/X86VectorDialect.h.inc"
 
 #define GET_OP_CLASSES
 #include "mlir/Dialect/X86Vector/X86Vector.h.inc"
 
 #endif // MLIR_DIALECT_X86VECTOR_X86VECTORDIALECT_H_

mlir/include/mlir/IR/OpBase.td

 // Op results are float or vectors/tensors thereof.
 def ResultsAreFloatLike : NativeOpTrait<"ResultsAreFloatLike">;
 // Op has the same operand type.
 def SameTypeOperands : NativeOpTrait<"SameTypeOperands">;
 // Op has same shape for all operands.
 def SameOperandsShape : NativeOpTrait<"SameOperandsShape">;
 // Op has same operand and result shape.
 def SameOperandsAndResultShape : NativeOpTrait<"SameOperandsAndResultShape">;
-// Op has the same operand and result type.
-def SameOperandsAndResultType : NativeOpTrait<"SameOperandsAndResultType">;
 // Op has the same element type (or type itself, if scalar) for all operands.
 def SameOperandsElementType : NativeOpTrait<"SameOperandsElementType">;
 // Op has the same operand and result element type (or type itself, if scalar).
 def SameOperandsAndResultElementType :
   NativeOpTrait<"SameOperandsAndResultElementType">;
 // Op is a terminator.
 def Terminator : NativeOpTrait<"IsTerminator">;
 // Op can be safely normalized in the presence of MemRefs with

mlir/include/mlir/Interfaces/InferTypeOpInterface.td

InterfaceMethod<
       /*retTy=*/"::mlir::LogicalResult",
       /*methodName=*/"reifyResultShapes",
       /*args=*/(ins "::mlir::OpBuilder &":$builder,
         "::mlir::ReifiedRankedShapedTypeDims &":$reifiedReturnShapes)
     >
   ];
 }
 
+// Op has the same operand and result type.
+// TODO: Change from hard coded to utilizing type inference trait.
+def SameOperandsAndResultType : NativeOpTrait<"SameOperandsAndResultType">;
+
 #endif // MLIR_INFERTYPEOPINTERFACE

mlir/lib/Dialect/LLVMIR/CMakeLists.txt

add_mlir_dialect_library(MLIRLLVMIR
   BitReader
   BitWriter
   Core
 
   LINK_LIBS PUBLIC
   MLIRCallInterfaces
   MLIRControlFlowInterfaces
   MLIRDataLayoutInterfaces
+  MLIRInferTypeOpInterface
   MLIRIR
   MLIRSideEffectInterfaces
   MLIRSupport
   )
 
 add_mlir_dialect_library(MLIRNVVMIR
   IR/NVVMDialect.cpp
 

mlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp

static LogicalResult verify(spirv::SubgroupBlockWriteINTELOp blockWriteOp) {
 
   return success();
 }
 
 //===----------------------------------------------------------------------===//
 // spv.GroupNonUniformElectOp
 //===----------------------------------------------------------------------===//
 
-void spirv::GroupNonUniformElectOp::build(OpBuilder &builder,
-                                          OperationState &state,
-                                          spirv::Scope scope) {
-  build(builder, state, builder.getI1Type(), scope);
-}
-
 static LogicalResult verify(spirv::GroupNonUniformElectOp groupOp) {
   spirv::Scope scope = groupOp.execution_scope();
   if (scope != spirv::Scope::Workgroup && scope != spirv::Scope::Subgroup)
     return groupOp.emitOpError(
         "execution scope must be 'Workgroup' or 'Subgroup'");
 
   return success();
 }
static LogicalResult verify(spirv::ReturnValueOp retValOp) {
   // Verification is performed in spv.func op.
   return success();
 }
 
 //===----------------------------------------------------------------------===//
 // spv.Select
 //===----------------------------------------------------------------------===//
 
-void spirv::SelectOp::build(OpBuilder &builder, OperationState &state,
-                            Value cond, Value trueValue, Value falseValue) {
-  build(builder, state, trueValue.getType(), cond, trueValue, falseValue);
-}
-
 static LogicalResult verify(spirv::SelectOp op) {
   if (auto conditionTy = op.condition().getType().dyn_cast<VectorType>()) {
     auto resultVectorTy = op.result().getType().dyn_cast<VectorType>();
     if (!resultVectorTy) {
       return op.emitOpError("result expected to be of vector type when "
                             "condition is of vector type");
     }
     if (resultVectorTy.getNumElements() != conditionTy.getNumElements()) {

mlir/lib/Dialect/StandardOps/CMakeLists.txt

 add_mlir_dialect_library(MLIRStandard
   IR/Ops.cpp
   Utils/Utils.cpp
 
   ADDITIONAL_HEADER_DIRS
   ${MLIR_MAIN_INCLUDE_DIR}/mlir/Dialect/StandardOps
 
   DEPENDS
   MLIRStandardOpsIncGen
 
   LINK_LIBS PUBLIC
   MLIRArithmetic
   MLIRCallInterfaces
   MLIRCastInterfaces
   MLIRControlFlowInterfaces
+  MLIRInferTypeOpInterface
   MLIRIR
   MLIRSideEffectInterfaces
   MLIRVectorInterfaces
   )
 
 add_subdirectory(Transforms)

mlir/lib/Dialect/X86Vector/IR/X86VectorDialect.cpp

 //
 //===----------------------------------------------------------------------===//
 
 #include "mlir/Dialect/X86Vector/X86VectorDialect.h"
 #include "mlir/Dialect/LLVMIR/LLVMTypes.h"
 #include "mlir/IR/Builders.h"
 #include "mlir/IR/OpImplementation.h"
 #include "mlir/IR/TypeUtilities.h"
+#include "mlir/Interfaces/InferTypeOpInterface.h"
 
 using namespace mlir;
 
 #include "mlir/Dialect/X86Vector/X86VectorDialect.cpp.inc"
 
 void x86vector::X86VectorDialect::initialize() {
   addOperations<
 #define GET_OP_LIST

mlir/test/Dialect/SPIRV/IR/bit-ops.mlir

func @bit_field_insert_vec(%base: vector<3xi32>, %insert: vector<3xi32>, %offset: i32, %count: i16) -> vector<3xi32> {
   // CHECK: {{%.*}} = spv.BitFieldInsert {{%.*}}, {{%.*}}, {{%.*}}, {{%.*}} : vector<3xi32>, i32, i16
   %0 = spv.BitFieldInsert %base, %insert, %offset, %count : vector<3xi32>, i32, i16
   spv.ReturnValue %0 : vector<3xi32>
 }
 
 // -----
 
 func @bit_field_insert_invalid_insert_type(%base: vector<3xi32>, %insert: vector<2xi32>, %offset: i32, %count: i16) -> vector<3xi32> {
-  // expected-error @+1 {{all of {base, insert, result} have same type}}
+  // TODO: expand post change in verification order. This is currently only
+  // verifying that the type verification is failing but not the specific error
+  // message. In final state the error should refer to mismatch in base and
+  // insert.
+  // expected-error @+1 {{type}}
   %0 = "spv.BitFieldInsert" (%base, %insert, %offset, %count) : (vector<3xi32>, vector<2xi32>, i32, i16) -> vector<3xi32>
   spv.ReturnValue %0 : vector<3xi32>
 }
 
 // -----
 
 //===----------------------------------------------------------------------===//
 // spv.BitFieldSExtract
func @bit_field_u_extract_vec(%base: vector<3xi32>, %offset: i8, %count: i8) -> vector<3xi32> {
   // CHECK: {{%.*}} = spv.BitFieldUExtract {{%.*}}, {{%.*}}, {{%.*}} : vector<3xi32>, i8, i8
   %0 = spv.BitFieldUExtract %base, %offset, %count : vector<3xi32>, i8, i8
   spv.ReturnValue %0 : vector<3xi32>
 }
 
 // -----
 
 func @bit_field_u_extract_invalid_result_type(%base: vector<3xi32>, %offset: i32, %count: i16) -> vector<4xi32> {
-  // expected-error @+1 {{failed to verify that all of {base, result} have same type}}
+  // expected-error @+1 {{inferred type(s) 'vector<3xi32>' are incompatible with return type(s) of operation 'vector<4xi32>'}}
   %0 = "spv.BitFieldUExtract" (%base, %offset, %count) : (vector<3xi32>, i32, i16) -> vector<4xi32>
   spv.ReturnValue %0 : vector<4xi32>
 }
 
 // -----
 
 //===----------------------------------------------------------------------===//
 // spv.BitReverse

mlir/test/Dialect/SPIRV/IR/logical-ops.mlir

func @select_op(%arg1: vector<4xi1>) -> () {
   return
 }
 
 // -----
 
 func @select_op(%arg1: vector<4xi1>) -> () {
   %0 = spv.Constant dense<[2.0, 3.0, 4.0]> : vector<3xf32>
   %1 = spv.Constant dense<[5, 6, 7]> : vector<3xi32>
-  // expected-error @+1 {{all of {true_value, false_value, result} have same type}}
+  // TODO: expand post change in verification order. This is currently only
+  // verifying that the type verification is failing but not the specific error
+  // message. In final state the error should refer to mismatch in true_value and
+  // false_value.
+  // expected-error @+1 {{type}}
   %2 = "spv.Select"(%arg1, %1, %0) : (vector<4xi1>, vector<3xi32>, vector<3xf32>) -> vector<3xi32>
   return
 }
 
 // -----
 
 //===----------------------------------------------------------------------===//
 // spv.SGreaterThan

mlir/test/IR/invalid-ops.mlir

^bb0(%cond : i32, %t : i32, %f : i32):
   // expected-error@+1 {{op operand #0 must be bool-like}}
   %r = "std.select"(%cond, %t, %f) : (i32, i32, i32) -> i32
 }
 
 // -----
 
 func @func_with_ops(i1, i32, i64) {
 ^bb0(%cond : i1, %t : i32, %f : i64):
-  // expected-error@+1 {{all of {true_value, false_value, result} have same type}}
+  // TODO: expand post change in verification order. This is currently only
+  // verifying that the type verification is failing but not the specific error
+  // message. In final state the error should refer to mismatch in true_value and
+  // false_value.
+  // expected-error@+1 {{type}}
   %r = "std.select"(%cond, %t, %f) : (i1, i32, i64) -> i32
 }
 
 // -----
 
 func @func_with_ops(vector<12xi1>, vector<42xi32>, vector<42xi32>) {
 ^bb0(%cond : vector<12xi1>, %t : vector<42xi32>, %f : vector<42xi32>):
   // expected-error@+1 {{all non-scalar operands/results must have the same shape and base type}}

utils/bazel/llvm-project-overlay/mlir/BUILD.bazel

 # X86Vector dialect.
 ##---------------------------------------------------------------------------##
 
 td_library(
     name = "X86VectorTdFiles",
     srcs = ["include/mlir/Dialect/X86Vector/X86Vector.td"],
     includes = ["include"],
     deps = [
+        ":InferTypeOpInterfaceTdFiles",
         ":LLVMOpsTdFiles",
         ":SideEffectInterfacesTdFiles",
     ],
 )
 
 gentbl_cc_library(
     name = "X86VectorIncGen",
     strip_include_prefix = "include",

 
 cc_library(
     name = "X86Vector",
     srcs = ["lib/Dialect/X86Vector/IR/X86VectorDialect.cpp"],
     hdrs = ["include/mlir/Dialect/X86Vector/X86VectorDialect.h"],
     includes = ["include"],
     deps = [
         ":IR",
+        ":InferTypeOpInterface",
         ":LLVMDialect",
         ":SideEffectInterfaces",
         ":X86VectorIncGen",
         "//llvm:Core",
         "//llvm:Support",
     ],
 )
 
td_library(
     name = "SparseTensorTdFiles",
     srcs = [
         "include/mlir/Dialect/SparseTensor/IR/SparseTensorAttrDefs.td",
         "include/mlir/Dialect/SparseTensor/IR/SparseTensorBase.td",
         "include/mlir/Dialect/SparseTensor/IR/SparseTensorOps.td",
     ],
     includes = ["include"],
     deps = [
+        ":InferTypeOpInterfaceTdFiles",
         ":OpBaseTdFiles",
         ":SideEffectInterfacesTdFiles",
     ],
 )
 
 gentbl_cc_library(
     name = "SparseTensorAttrDefsIncGen",
     strip_include_prefix = "include",
cc_library(
     srcs = glob([
         "lib/Dialect/SparseTensor/IR/*.cpp",
     ]),
     hdrs = ["include/mlir/Dialect/SparseTensor/IR/SparseTensor.h"],
     includes = ["include"],
     deps = [
         ":ArithmeticDialect",
         ":IR",
+        ":InferTypeOpInterface",
         ":SideEffectInterfaces",
         ":SparseTensorAttrDefsIncGen",
         ":SparseTensorOpsIncGen",
         ":SparseTensorUtils",
         ":StandardOps",
         "//llvm:Support",
     ],
 )
srcs = [
         "include/mlir/Dialect/StandardOps/IR/Ops.td",
         "include/mlir/Dialect/StandardOps/IR/StandardOpsBase.td",
     ],
     includes = ["include"],
     deps = [
         ":CallInterfacesTdFiles",
         ":CastInterfacesTdFiles",
         ":ControlFlowInterfacesTdFiles",
+        ":InferTypeOpInterfaceTdFiles",
         ":OpBaseTdFiles",
         ":SideEffectInterfacesTdFiles",
         ":VectorInterfacesTdFiles",
     ],
 )
 
 gentbl_cc_library(
     name = "StandardOpsIncGen",
cc_library(
     includes = ["include"],
     deps = [
         ":ArithmeticDialect",
         ":CallOpInterfaces",
         ":CastOpInterfaces",
         ":CommonFolders",
         ":ControlFlowInterfaces",
         ":IR",
+        ":InferTypeOpInterface",
         ":SideEffectInterfaces",
         ":StandardOpsIncGen",
         ":Support",
         ":VectorInterfaces",
         "//llvm:Support",
     ],
 )
 
hdrs = glob(
             "include/mlir/Dialect/LLVMIR/*X86Vector*.h",
         ],
     ),
     includes = ["include"],
     deps = [
         ":ControlFlowInterfaces",
         ":DataLayoutInterfaces",
         ":IR",
+        ":InferTypeOpInterface",
         ":LLVMDialectAttributesIncGen",
         ":LLVMDialectInterfaceIncGen",
         ":LLVMOpsIncGen",
         ":SideEffectInterfaces",
         ":Support",
         "//llvm:AsmParser",
         "//llvm:BitReader",
         "//llvm:BitWriter",
cc_library(
     hdrs = ["include/mlir/Dialect/GPU/GPUDialect.h"],
     includes = ["include"],
     deps = [
         ":ArithmeticDialect",
         ":DLTIDialect",
         ":GPUBaseIncGen",
         ":GPUOpsIncGen",
         ":IR",
+        ":InferTypeOpInterface",
         ":LLVMDialect",
         ":MemRefDialect",
         ":SideEffectInterfaces",
         ":StandardOps",
         ":Support",
         "//llvm:Support",
     ],
 )
td_library(
     srcs = [
         "include/mlir/Dialect/LLVMIR/LLVMOpBase.td",
         "include/mlir/Dialect/LLVMIR/LLVMOps.td",
         "include/mlir/Dialect/LLVMIR/LLVMOpsInterfaces.td",
     ],
     includes = ["include"],
     deps = [
         ":ControlFlowInterfacesTdFiles",
+        ":InferTypeOpInterfaceTdFiles",
         ":OpBaseTdFiles",
         ":SideEffectInterfacesTdFiles",
     ],
 )
 
 cc_library(
     name = "GPUCommonTransforms",
     srcs = [

 
 td_library(
     name = "SPIRVOpsTdFiles",
     srcs = glob(["include/mlir/Dialect/SPIRV/IR/*.td"]),
     includes = ["include"],
     deps = [
         ":CallInterfacesTdFiles",
         ":ControlFlowInterfacesTdFiles",
+        ":InferTypeOpInterfaceTdFiles",
         ":OpBaseTdFiles",
         ":SideEffectInterfacesTdFiles",
     ],
 )
 
 gentbl_cc_library(
     name = "SPIRVOpsIncGen",
     strip_include_prefix = "include",
cc_library(
     hdrs = glob([
         "include/mlir/Dialect/SPIRV/IR/*.h",
     ]),
     includes = ["include"],
     deps = [
         ":CommonFolders",
         ":ControlFlowInterfaces",
         ":IR",
+        ":InferTypeOpInterface",
         ":Parser",
         ":Pass",
         ":SPIRVAttrUtilsGen",
         ":SPIRVAvailabilityIncGen",
         ":SPIRVCanonicalizationIncGen",
         ":SPIRVOpsIncGen",
         ":SPIRVSerializationGen",
         ":SPIRVTargetAndABIStructGen",

 td_library(
     name = "QuantizationOpsTdFiles",
     srcs = [
         "include/mlir/Dialect/Quant/QuantOps.td",
         "include/mlir/Dialect/Quant/QuantOpsBase.td",
     ],
     includes = ["include"],
     deps = [
+        ":InferTypeOpInterfaceTdFiles",
         ":OpBaseTdFiles",
         ":SideEffectInterfacesTdFiles",
     ],
 )
 
 gentbl_cc_library(
     name = "QuantOpsIncGen",
     strip_include_prefix = "include",

 td_library(
     name = "ComplexOpsTdFiles",
     srcs = [
         "include/mlir/Dialect/Complex/IR/ComplexBase.td",
         "include/mlir/Dialect/Complex/IR/ComplexOps.td",
     ],
     includes = ["include"],
     deps = [
+        ":InferTypeOpInterfaceTdFiles",
         ":OpBaseTdFiles",
         ":SideEffectInterfacesTdFiles",
     ],
 )
 
 gentbl_cc_library(
     name = "ComplexBaseIncGen",
     strip_include_prefix = "include",
td_library(
     name = "ArithmeticOpsTdFiles",
     srcs = [
         "include/mlir/Dialect/Arithmetic/IR/ArithmeticBase.td",
         "include/mlir/Dialect/Arithmetic/IR/ArithmeticOps.td",
     ],
     includes = ["include"],
     deps = [
         ":CastInterfacesTdFiles",
+        ":InferTypeOpInterfaceTdFiles",
         ":OpBaseTdFiles",
         ":SideEffectInterfacesTdFiles",
         ":VectorInterfacesTdFiles",
     ],
 )
 
 gentbl_cc_library(
     name = "ArithmeticBaseIncGen",

 td_library(
     name = "MathOpsTdFiles",
     srcs = [
         "include/mlir/Dialect/Math/IR/MathBase.td",
         "include/mlir/Dialect/Math/IR/MathOps.td",
     ],
     includes = ["include"],
     deps = [
+        ":InferTypeOpInterfaceTdFiles",
         ":OpBaseTdFiles",
         ":SideEffectInterfacesTdFiles",
         ":VectorInterfacesTdFiles",
     ],
 )
 
 gentbl_cc_library(
     name = "MathBaseIncGen",