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Differential D113017

[AMDGPU] Avoid copying dead subregisters in copyPhysReg
Needs ReviewPublic

Authored by foad on Nov 2 2021, 6:56 AM.
This revision needs review, but there are no reviewers specified.

Details

Reviewers
None
Summary

When SIInstrInfo::copyPhysReg splits a multi-dword (superregister) copy
into individual dword (subregister) copies, use LivePhysRegs info to
avoid copying dead subregisters.

This fixes a liveness problem where the superregister copy source may
have been only partially defined (which is allowed) but one of the
resulting subregister copy sources would be completely undefined (which
is not allowed by the machine verifier).

This replaces the previous workaround, which was to add implicit
superregister use/def operands to all the subregister copy instructions,
which caused false dependencies between them and restricted the freedom
of post-RA scheduling and other late codegen passes.

Diff Detail

Event Timeline

foad created this revision.Nov 2 2021, 6:56 AM
Herald added subscribers: wenlei, kerbowa, arphaman and 11 others. · View Herald TranscriptNov 2 2021, 6:56 AM
foad requested review of this revision.Nov 2 2021, 6:56 AM
Herald added a project: Restricted Project. · View Herald TranscriptNov 2 2021, 6:56 AM
Herald added subscribers: llvm-commits, wdng. · View Herald Transcript
foad added a parent revision: D113016: [CodeGen] Track physical register liveness in ExpandPostRAPseudos.Nov 2 2021, 6:58 AM
Harbormaster completed remote builds in B131965: Diff 384081.Nov 2 2021, 7:17 AM
foad added a comment.Nov 5 2021, 8:49 AM

Some stats from compiling a corpus of 10,000 graphics shaders:

  • 57 of them (mostly compute shaders) actually have some redundant mov instructions removed
  • 2,000 of them have other codegen differences due to post-ra scheduling being less constrained
  • average compile time is slower by 0.7%
kito-cheng added a subscriber: kito-cheng.Jun 28 2022, 3:25 AM
Herald added a project: Restricted Project. · View Herald TranscriptJun 28 2022, 3:25 AM
Herald added subscribers: kosarev, jsilvanus. · View Herald Transcript
arsenm added a comment.Jun 28 2022, 5:56 AM

I wonder if we would be better off trying to break these copies into individual subregister pieces before we discard liveness information. Recomputing physreg liveness all over the place isn't exactly cheap

llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
909–910

I don't understand how you can simply skip here

foad added inline comments.Jul 7 2022, 7:00 AM
llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
909–910

It's copying a dead subreg, so there's no need to insert any copy instruction.

jrbyrnes added a subscriber: jrbyrnes.Jan 19 2023, 5:01 PM
Herald added a subscriber: StephenFan. · View Herald TranscriptJan 19 2023, 5:01 PM

Revision Contents

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Diff 384081

llvm/lib/Target/AMDGPU/SIInstrInfo.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 498 Lines • ▼ Show 20 Linesstatic void reportIllegalCopy(const SIInstrInfo *TII, MachineBasicBlock &MBB,
C.diagnose(IllegalCopy); C.diagnose(IllegalCopy);
BuildMI(MBB, MI, DL, TII->get(AMDGPU::SI_ILLEGAL_COPY), DestReg) BuildMI(MBB, MI, DL, TII->get(AMDGPU::SI_ILLEGAL_COPY), DestReg)
.addReg(SrcReg, getKillRegState(KillSrc)); .addReg(SrcReg, getKillRegState(KillSrc));
} }
/// Handle copying from SGPR to AGPR, or from AGPR to AGPR. It is not possible /// Handle copying from SGPR to AGPR, or from AGPR to AGPR. It is not possible
/// to directly copy, so an intermediate VGPR needs to be used. /// to directly copy, so an intermediate VGPR needs to be used.
static void indirectCopyToAGPR(const SIInstrInfo &TII, static void indirectCopyToAGPR(const SIInstrInfo &TII,
Lint: Pre-merge checks
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clang-format: please reformat the code

-static void indirectCopyToAGPR(const SIInstrInfo &TII,
-                               MachineBasicBlock &MBB,
+static void indirectCopyToAGPR(const SIInstrInfo &TII, MachineBasicBlock &MBB,
Lint: Pre-merge checks: clang-format: please reformat the code ``` -static void indirectCopyToAGPR(const SIInstrInfo…
MachineBasicBlock &MBB, MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, MachineBasicBlock::iterator MI,
const DebugLoc &DL, MCRegister DestReg, const DebugLoc &DL, MCRegister DestReg,
MCRegister SrcReg, bool KillSrc, MCRegister SrcReg, bool KillSrc,
RegScavenger &RS, RegScavenger &RS) {
Register ImpDefSuperReg = Register(),
Register ImpUseSuperReg = Register()) {
const SIRegisterInfo &RI = TII.getRegisterInfo(); const SIRegisterInfo &RI = TII.getRegisterInfo();
assert(AMDGPU::SReg_32RegClass.contains(SrcReg) || assert(AMDGPU::SReg_32RegClass.contains(SrcReg) ||
AMDGPU::AGPR_32RegClass.contains(SrcReg)); AMDGPU::AGPR_32RegClass.contains(SrcReg));
// First try to find defining accvgpr_write to avoid temporary registers. // First try to find defining accvgpr_write to avoid temporary registers.
for (auto Def = MI, E = MBB.begin(); Def != E; ) { for (auto Def = MI, E = MBB.begin(); Def != E; ) {
--Def; --Def;
Show All 14 Lines if (DefOp.isReg()) {
SafeToPropagate = false; SafeToPropagate = false;
if (!SafeToPropagate) if (!SafeToPropagate)
break; break;
DefOp.setIsKill(false); DefOp.setIsKill(false);
} }
MachineInstrBuilder Builder =
BuildMI(MBB, MI, DL, TII.get(AMDGPU::V_ACCVGPR_WRITE_B32_e64), DestReg) BuildMI(MBB, MI, DL, TII.get(AMDGPU::V_ACCVGPR_WRITE_B32_e64), DestReg)
.add(DefOp); .add(DefOp);
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clang-format: please reformat the code

-      .add(DefOp);
+        .add(DefOp);
Lint: Pre-merge checks: clang-format: please reformat the code ``` - .add(DefOp); + .add(DefOp); ```
if (ImpDefSuperReg)
Builder.addReg(ImpDefSuperReg, RegState::Define | RegState::Implicit);
if (ImpUseSuperReg) {
Builder.addReg(ImpUseSuperReg,
getKillRegState(KillSrc) | RegState::Implicit);
}
return; return;
} }
RS.enterBasicBlock(MBB); RS.enterBasicBlock(MBB);
RS.forward(MI); RS.forward(MI);
// Ideally we want to have three registers for a long reg_sequence copy // Ideally we want to have three registers for a long reg_sequence copy
// to hide 2 waitstates between v_mov_b32 and accvgpr_write. // to hide 2 waitstates between v_mov_b32 and accvgpr_write.
Show All 24 Linesstatic void indirectCopyToAGPR(const SIInstrInfo &TII,
// Insert copy to temporary VGPR. // Insert copy to temporary VGPR.
unsigned TmpCopyOp = AMDGPU::V_MOV_B32_e32; unsigned TmpCopyOp = AMDGPU::V_MOV_B32_e32;
if (AMDGPU::AGPR_32RegClass.contains(SrcReg)) { if (AMDGPU::AGPR_32RegClass.contains(SrcReg)) {
TmpCopyOp = AMDGPU::V_ACCVGPR_READ_B32_e64; TmpCopyOp = AMDGPU::V_ACCVGPR_READ_B32_e64;
} else { } else {
assert(AMDGPU::SReg_32RegClass.contains(SrcReg)); assert(AMDGPU::SReg_32RegClass.contains(SrcReg));
} }
MachineInstrBuilder UseBuilder = BuildMI(MBB, MI, DL, TII.get(TmpCopyOp), Tmp) BuildMI(MBB, MI, DL, TII.get(TmpCopyOp), Tmp)
.addReg(SrcReg, getKillRegState(KillSrc)); .addReg(SrcReg, getKillRegState(KillSrc));
Lint: Pre-merge checks
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clang-format: please reformat the code

-    .addReg(SrcReg, getKillRegState(KillSrc));
+      .addReg(SrcReg, getKillRegState(KillSrc));
Lint: Pre-merge checks: clang-format: please reformat the code ``` - .addReg(SrcReg, getKillRegState(KillSrc)); +…
if (ImpUseSuperReg) {
UseBuilder.addReg(ImpUseSuperReg,
getKillRegState(KillSrc) | RegState::Implicit);
}
MachineInstrBuilder DefBuilder BuildMI(MBB, MI, DL, TII.get(AMDGPU::V_ACCVGPR_WRITE_B32_e64), DestReg)
= BuildMI(MBB, MI, DL, TII.get(AMDGPU::V_ACCVGPR_WRITE_B32_e64), DestReg)
.addReg(Tmp, RegState::Kill); .addReg(Tmp, RegState::Kill);
Lint: Pre-merge checks
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clang-format: please reformat the code

-    .addReg(Tmp, RegState::Kill);
+      .addReg(Tmp, RegState::Kill);
Lint: Pre-merge checks: clang-format: please reformat the code ``` - .addReg(Tmp, RegState::Kill); + .addReg…
if (ImpDefSuperReg)
DefBuilder.addReg(ImpDefSuperReg, RegState::Define | RegState::Implicit);
} }
static void expandSGPRCopy(const SIInstrInfo &TII, MachineBasicBlock &MBB, static void expandSGPRCopy(const SIInstrInfo &TII, MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, const DebugLoc &DL, MachineBasicBlock::iterator MI, const DebugLoc &DL,
MCRegister DestReg, MCRegister SrcReg, bool KillSrc, MCRegister DestReg, MCRegister SrcReg, bool KillSrc,
const TargetRegisterClass *RC, bool Forward) { const TargetRegisterClass *RC, bool Forward) {
const SIRegisterInfo &RI = TII.getRegisterInfo(); const SIRegisterInfo &RI = TII.getRegisterInfo();
ArrayRef<int16_t> BaseIndices = RI.getRegSplitParts(RC, 4); ArrayRef<int16_t> BaseIndices = RI.getRegSplitParts(RC, 4);
MachineBasicBlock::iterator I = MI; MachineBasicBlock::iterator I = MI;
MachineInstr *FirstMI = nullptr, *LastMI = nullptr;
for (unsigned Idx = 0; Idx < BaseIndices.size(); ++Idx) { for (unsigned Idx = 0; Idx < BaseIndices.size(); ++Idx) {
int16_t SubIdx = BaseIndices[Idx]; int16_t SubIdx = BaseIndices[Idx];
Register Reg = RI.getSubReg(DestReg, SubIdx); Register Reg = RI.getSubReg(DestReg, SubIdx);
unsigned Opcode = AMDGPU::S_MOV_B32; unsigned Opcode = AMDGPU::S_MOV_B32;
// Is SGPR aligned? If so try to combine with next. // Is SGPR aligned? If so try to combine with next.
Register Src = RI.getSubReg(SrcReg, SubIdx); Register Src = RI.getSubReg(SrcReg, SubIdx);
bool AlignedDest = ((Reg - AMDGPU::SGPR0) % 2) == 0; bool AlignedDest = ((Reg - AMDGPU::SGPR0) % 2) == 0;
bool AlignedSrc = ((Src - AMDGPU::SGPR0) % 2) == 0; bool AlignedSrc = ((Src - AMDGPU::SGPR0) % 2) == 0;
if (AlignedDest && AlignedSrc && (Idx + 1 < BaseIndices.size())) { if (AlignedDest && AlignedSrc && (Idx + 1 < BaseIndices.size())) {
// Can use SGPR64 copy // Can use SGPR64 copy
unsigned Channel = RI.getChannelFromSubReg(SubIdx); unsigned Channel = RI.getChannelFromSubReg(SubIdx);
SubIdx = RI.getSubRegFromChannel(Channel, 2); SubIdx = RI.getSubRegFromChannel(Channel, 2);
Opcode = AMDGPU::S_MOV_B64; Opcode = AMDGPU::S_MOV_B64;
Idx++; Idx++;
} }
LastMI = BuildMI(MBB, I, DL, TII.get(Opcode), RI.getSubReg(DestReg, SubIdx)) BuildMI(MBB, I, DL, TII.get(Opcode), RI.getSubReg(DestReg, SubIdx))
.addReg(RI.getSubReg(SrcReg, SubIdx)) .addReg(RI.getSubReg(SrcReg, SubIdx), getKillRegState(KillSrc));
Lint: Pre-merge checks
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clang-format: please reformat the code

-      .addReg(RI.getSubReg(SrcReg, SubIdx), getKillRegState(KillSrc));
+        .addReg(RI.getSubReg(SrcReg, SubIdx), getKillRegState(KillSrc));
Lint: Pre-merge checks: clang-format: please reformat the code ``` - .addReg(RI.getSubReg(SrcReg, SubIdx)…
.addReg(SrcReg, RegState::Implicit);
if (!FirstMI)
FirstMI = LastMI;
if (!Forward) if (!Forward)
I--; I--;
} }
assert(FirstMI && LastMI);
if (!Forward)
std::swap(FirstMI, LastMI);
FirstMI->addOperand(
MachineOperand::CreateReg(DestReg, true /*IsDef*/, true /*IsImp*/));
if (KillSrc)
LastMI->addRegisterKilled(SrcReg, &RI);
} }
void SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB, void SIInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MI, MachineBasicBlock::iterator MI,
const DebugLoc &DL, MCRegister DestReg, const DebugLoc &DL, MCRegister DestReg,
MCRegister SrcReg, bool KillSrc, MCRegister SrcReg, bool KillSrc,
const LivePhysRegs &LiveRegs) const { const LivePhysRegs &LiveRegs) const {
const TargetRegisterClass *RC = RI.getPhysRegClass(DestReg); const TargetRegisterClass *RC = RI.getPhysRegClass(DestReg);
▲ Show 20 Lines • Show All 201 Lines • ▼ Show 20 Lines if (Size == 16) {
// First implicit operand is $exec. // First implicit operand is $exec.
MIB->tieOperands(0, MIB->getNumOperands() - 1); MIB->tieOperands(0, MIB->getNumOperands() - 1);
return; return;
} }
const TargetRegisterClass *SrcRC = RI.getPhysRegClass(SrcReg); const TargetRegisterClass *SrcRC = RI.getPhysRegClass(SrcReg);
if (RC == RI.getVGPR64Class() && (SrcRC == RC || RI.isSGPRClass(SrcRC))) { if (RC == RI.getVGPR64Class() && (SrcRC == RC || RI.isSGPRClass(SrcRC))) {
if (ST.hasPackedFP32Ops()) { if (ST.hasPackedFP32Ops()) {
BuildMI(MBB, MI, DL, get(AMDGPU::V_PK_MOV_B32), DestReg) BuildMI(MBB, MI, DL, get(AMDGPU::V_PK_MOV_B32), DestReg)
Lint: Pre-merge checks
Inline Actions

clang-format: please reformat the code

-        .addImm(SISrcMods::OP_SEL_1)
-        .addReg(SrcReg, getKillRegState(KillSrc))
-        .addImm(SISrcMods::OP_SEL_0 | SISrcMods::OP_SEL_1)
-        .addReg(SrcReg, getKillRegState(KillSrc))
-        .addImm(0) // op_sel_lo
-        .addImm(0) // op_sel_hi
-        .addImm(0) // neg_lo
-        .addImm(0) // neg_hi
-        .addImm(0); // clamp
+          .addImm(SISrcMods::OP_SEL_1)

8 diff lines are omitted. See full path.

Lint: Pre-merge checks: clang-format: please reformat the code ``` - .addImm(SISrcMods::OP_SEL_1) - .
.addImm(SISrcMods::OP_SEL_1) .addImm(SISrcMods::OP_SEL_1)
.addReg(SrcReg) .addReg(SrcReg, getKillRegState(KillSrc))
.addImm(SISrcMods::OP_SEL_0 | SISrcMods::OP_SEL_1) .addImm(SISrcMods::OP_SEL_0 | SISrcMods::OP_SEL_1)
.addReg(SrcReg) .addReg(SrcReg, getKillRegState(KillSrc))
.addImm(0) // op_sel_lo .addImm(0) // op_sel_lo
.addImm(0) // op_sel_hi .addImm(0) // op_sel_hi
.addImm(0) // neg_lo .addImm(0) // neg_lo
.addImm(0) // neg_hi .addImm(0) // neg_hi
.addImm(0) // clamp .addImm(0); // clamp
.addReg(SrcReg, getKillRegState(KillSrc) | RegState::Implicit);
return; return;
} }
} }
const bool Forward = RI.getHWRegIndex(DestReg) <= RI.getHWRegIndex(SrcReg); const bool Forward = RI.getHWRegIndex(DestReg) <= RI.getHWRegIndex(SrcReg);
if (RI.isSGPRClass(RC)) { if (RI.isSGPRClass(RC)) {
if (!RI.isSGPRClass(SrcRC)) { if (!RI.isSGPRClass(SrcRC)) {
reportIllegalCopy(this, MBB, MI, DL, DestReg, SrcReg, KillSrc); reportIllegalCopy(this, MBB, MI, DL, DestReg, SrcReg, KillSrc);
Show All 30 Lines if (Opcode == AMDGPU::INSTRUCTION_LIST_END)
RS.reset(new RegScavenger()); RS.reset(new RegScavenger());
ArrayRef<int16_t> SubIndices = RI.getRegSplitParts(RC, EltSize); ArrayRef<int16_t> SubIndices = RI.getRegSplitParts(RC, EltSize);
// If there is an overlap, we can't kill the super-register on the last // If there is an overlap, we can't kill the super-register on the last
// instruction, since it will also kill the components made live by this def. // instruction, since it will also kill the components made live by this def.
const bool CanKillSuperReg = KillSrc && !RI.regsOverlap(SrcReg, DestReg); const bool CanKillSuperReg = KillSrc && !RI.regsOverlap(SrcReg, DestReg);
MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
for (unsigned Idx = 0; Idx < SubIndices.size(); ++Idx) { for (unsigned Idx = 0; Idx < SubIndices.size(); ++Idx) {
unsigned SubIdx; unsigned SubIdx;
if (Forward) if (Forward)
SubIdx = SubIndices[Idx]; SubIdx = SubIndices[Idx];
else else
SubIdx = SubIndices[SubIndices.size() - Idx - 1]; SubIdx = SubIndices[SubIndices.size() - Idx - 1];
bool UseKill = CanKillSuperReg && Idx == SubIndices.size() - 1; bool UseKill = CanKillSuperReg && Idx == SubIndices.size() - 1;
if (Opcode == AMDGPU::INSTRUCTION_LIST_END) {
Register ImpDefSuper = Idx == 0 ? Register(DestReg) : Register();
Register ImpUseSuper = SrcReg;
indirectCopyToAGPR(*this, MBB, MI, DL, RI.getSubReg(DestReg, SubIdx),
RI.getSubReg(SrcReg, SubIdx), UseKill, *RS,
ImpDefSuper, ImpUseSuper);
} else if (Opcode == AMDGPU::V_PK_MOV_B32) {
Register DstSubReg = RI.getSubReg(DestReg, SubIdx); Register DstSubReg = RI.getSubReg(DestReg, SubIdx);
Register SrcSubReg = RI.getSubReg(SrcReg, SubIdx); Register SrcSubReg = RI.getSubReg(SrcReg, SubIdx);
MachineInstrBuilder MIB =
if (LiveRegs.available(MRI, SrcSubReg))
continue;
arsenmUnsubmitted
Not Done
ReplyInline Actions

I don't understand how you can simply skip here

arsenm: I don't understand how you can simply skip here
foadAuthorUnsubmitted
Done
ReplyInline Actions

It's copying a dead subreg, so there's no need to insert any copy instruction.

foad: It's copying a dead subreg, so there's no need to insert any copy instruction.
if (Opcode == AMDGPU::INSTRUCTION_LIST_END) {
Lint: Pre-merge checks
Inline Actions

clang-format: please reformat the code

-      indirectCopyToAGPR(*this, MBB, MI, DL, DstSubReg,
-                         SrcSubReg, UseKill, *RS);
+      indirectCopyToAGPR(*this, MBB, MI, DL, DstSubReg, SrcSubReg, UseKill,
+                         *RS);
Lint: Pre-merge checks: clang-format: please reformat the code ``` - indirectCopyToAGPR(*this, MBB, MI, DL…
indirectCopyToAGPR(*this, MBB, MI, DL, DstSubReg,
SrcSubReg, UseKill, *RS);
} else if (Opcode == AMDGPU::V_PK_MOV_B32) {
BuildMI(MBB, MI, DL, get(AMDGPU::V_PK_MOV_B32), DstSubReg) BuildMI(MBB, MI, DL, get(AMDGPU::V_PK_MOV_B32), DstSubReg)
Lint: Pre-merge checks
Inline Actions

clang-format: please reformat the code

-        .addImm(SISrcMods::OP_SEL_1)
-        .addReg(SrcSubReg, getKillRegState(UseKill))
-        .addImm(SISrcMods::OP_SEL_0 | SISrcMods::OP_SEL_1)
-        .addReg(SrcSubReg, getKillRegState(UseKill))
-        .addImm(0) // op_sel_lo
-        .addImm(0) // op_sel_hi
-        .addImm(0) // neg_lo
-        .addImm(0) // neg_hi
-        .addImm(0); // clamp
+          .addImm(SISrcMods::OP_SEL_1)

8 diff lines are omitted. See full path.

Lint: Pre-merge checks: clang-format: please reformat the code ``` - .addImm(SISrcMods::OP_SEL_1) - .
.addImm(SISrcMods::OP_SEL_1) .addImm(SISrcMods::OP_SEL_1)
.addReg(SrcSubReg) .addReg(SrcSubReg, getKillRegState(UseKill))
.addImm(SISrcMods::OP_SEL_0 | SISrcMods::OP_SEL_1) .addImm(SISrcMods::OP_SEL_0 | SISrcMods::OP_SEL_1)
.addReg(SrcSubReg) .addReg(SrcSubReg, getKillRegState(UseKill))
.addImm(0) // op_sel_lo .addImm(0) // op_sel_lo
.addImm(0) // op_sel_hi .addImm(0) // op_sel_hi
.addImm(0) // neg_lo .addImm(0) // neg_lo
.addImm(0) // neg_hi .addImm(0) // neg_hi
.addImm(0) // clamp .addImm(0); // clamp
.addReg(SrcReg, getKillRegState(UseKill) | RegState::Implicit); } else {
if (Idx == 0) BuildMI(MBB, MI, DL, get(Opcode), DstSubReg)
Lint: Pre-merge checks
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clang-format: please reformat the code

-        .addReg(SrcSubReg, getKillRegState(UseKill));
+          .addReg(SrcSubReg, getKillRegState(UseKill));
Lint: Pre-merge checks: clang-format: please reformat the code ``` - .addReg(SrcSubReg, getKillRegState…
MIB.addReg(DestReg, RegState::Define | RegState::Implicit); .addReg(SrcSubReg, getKillRegState(UseKill));
} else {
MachineInstrBuilder Builder =
BuildMI(MBB, MI, DL, get(Opcode), RI.getSubReg(DestReg, SubIdx))
.addReg(RI.getSubReg(SrcReg, SubIdx));
if (Idx == 0)
Builder.addReg(DestReg, RegState::Define | RegState::Implicit);
Builder.addReg(SrcReg, getKillRegState(UseKill) | RegState::Implicit);
} }
} }
} }
int SIInstrInfo::commuteOpcode(unsigned Opcode) const { int SIInstrInfo::commuteOpcode(unsigned Opcode) const {
int NewOpc; int NewOpc;
// Try to map original to commuted opcode // Try to map original to commuted opcode
▲ Show 20 Lines • Show All 764 Lines • ▼ Show 20 Lines if (SrcOp.isImm()) {
.addImm(SISrcMods::OP_SEL_1) .addImm(SISrcMods::OP_SEL_1)
.addImm(Lo.getSExtValue()) .addImm(Lo.getSExtValue())
.addImm(0) // op_sel_lo .addImm(0) // op_sel_lo
.addImm(0) // op_sel_hi .addImm(0) // op_sel_hi
.addImm(0) // neg_lo .addImm(0) // neg_lo
.addImm(0) // neg_hi .addImm(0) // neg_hi
.addImm(0); // clamp .addImm(0); // clamp
} else { } else {
BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstLo) BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstLo)
Lint: Pre-merge checks
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clang-format: please reformat the code

-          .addImm(Lo.getSExtValue());
+            .addImm(Lo.getSExtValue());
Lint: Pre-merge checks: clang-format: please reformat the code ``` - .addImm(Lo.getSExtValue()); + .
.addImm(Lo.getSExtValue()) .addImm(Lo.getSExtValue());
.addReg(Dst, RegState::Implicit | RegState::Define);
BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstHi) BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstHi)
Lint: Pre-merge checks
Inline Actions

clang-format: please reformat the code

-          .addImm(Hi.getSExtValue());
+            .addImm(Hi.getSExtValue());
Lint: Pre-merge checks: clang-format: please reformat the code ``` - .addImm(Hi.getSExtValue()); + .
.addImm(Hi.getSExtValue()) .addImm(Hi.getSExtValue());
.addReg(Dst, RegState::Implicit | RegState::Define);
} }
} else { } else {
assert(SrcOp.isReg()); assert(SrcOp.isReg());
if (ST.hasPackedFP32Ops() && if (ST.hasPackedFP32Ops() &&
!RI.isAGPR(MBB.getParent()->getRegInfo(), SrcOp.getReg())) { !RI.isAGPR(MBB.getParent()->getRegInfo(), SrcOp.getReg())) {
BuildMI(MBB, MI, DL, get(AMDGPU::V_PK_MOV_B32), Dst) BuildMI(MBB, MI, DL, get(AMDGPU::V_PK_MOV_B32), Dst)
.addImm(SISrcMods::OP_SEL_1) // src0_mod .addImm(SISrcMods::OP_SEL_1) // src0_mod
.addReg(SrcOp.getReg()) .addReg(SrcOp.getReg())
.addImm(SISrcMods::OP_SEL_0 | SISrcMods::OP_SEL_1) // src1_mod .addImm(SISrcMods::OP_SEL_0 | SISrcMods::OP_SEL_1) // src1_mod
.addReg(SrcOp.getReg()) .addReg(SrcOp.getReg())
.addImm(0) // op_sel_lo .addImm(0) // op_sel_lo
.addImm(0) // op_sel_hi .addImm(0) // op_sel_hi
.addImm(0) // neg_lo .addImm(0) // neg_lo
.addImm(0) // neg_hi .addImm(0) // neg_hi
.addImm(0); // clamp .addImm(0); // clamp
} else { } else {
BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstLo) BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstLo)
Lint: Pre-merge checks
Inline Actions

clang-format: please reformat the code

-          .addReg(RI.getSubReg(SrcOp.getReg(), AMDGPU::sub0));
+            .addReg(RI.getSubReg(SrcOp.getReg(), AMDGPU::sub0));
Lint: Pre-merge checks: clang-format: please reformat the code ``` - .addReg(RI.getSubReg(SrcOp.getReg()…
.addReg(RI.getSubReg(SrcOp.getReg(), AMDGPU::sub0)) .addReg(RI.getSubReg(SrcOp.getReg(), AMDGPU::sub0));
.addReg(Dst, RegState::Implicit | RegState::Define);
BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstHi) BuildMI(MBB, MI, DL, get(AMDGPU::V_MOV_B32_e32), DstHi)
Lint: Pre-merge checks
Inline Actions

clang-format: please reformat the code

-          .addReg(RI.getSubReg(SrcOp.getReg(), AMDGPU::sub1));
+            .addReg(RI.getSubReg(SrcOp.getReg(), AMDGPU::sub1));
Lint: Pre-merge checks: clang-format: please reformat the code ``` - .addReg(RI.getSubReg(SrcOp.getReg()…
.addReg(RI.getSubReg(SrcOp.getReg(), AMDGPU::sub1)) .addReg(RI.getSubReg(SrcOp.getReg(), AMDGPU::sub1));
.addReg(Dst, RegState::Implicit | RegState::Define);
} }
} }
MI.eraseFromParent(); MI.eraseFromParent();
break; break;
} }
case AMDGPU::V_MOV_B64_DPP_PSEUDO: { case AMDGPU::V_MOV_B64_DPP_PSEUDO: {
expandMovDPP64(MI); expandMovDPP64(MI);
break; break;
} }
case AMDGPU::S_MOV_B64_IMM_PSEUDO: { case AMDGPU::S_MOV_B64_IMM_PSEUDO: {
const MachineOperand &SrcOp = MI.getOperand(1); const MachineOperand &SrcOp = MI.getOperand(1);
assert(!SrcOp.isFPImm()); assert(!SrcOp.isFPImm());
APInt Imm(64, SrcOp.getImm()); APInt Imm(64, SrcOp.getImm());
if (Imm.isIntN(32) || isInlineConstant(Imm)) { if (Imm.isIntN(32) || isInlineConstant(Imm)) {
MI.setDesc(get(AMDGPU::S_MOV_B64)); MI.setDesc(get(AMDGPU::S_MOV_B64));
break; break;
} }
Register Dst = MI.getOperand(0).getReg(); Register Dst = MI.getOperand(0).getReg();
Register DstLo = RI.getSubReg(Dst, AMDGPU::sub0); Register DstLo = RI.getSubReg(Dst, AMDGPU::sub0);
Register DstHi = RI.getSubReg(Dst, AMDGPU::sub1); Register DstHi = RI.getSubReg(Dst, AMDGPU::sub1);
APInt Lo(32, Imm.getLoBits(32).getZExtValue()); APInt Lo(32, Imm.getLoBits(32).getZExtValue());
APInt Hi(32, Imm.getHiBits(32).getZExtValue()); APInt Hi(32, Imm.getHiBits(32).getZExtValue());
BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B32), DstLo) BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B32), DstLo)
Lint: Pre-merge checks
Inline Actions

clang-format: please reformat the code

-      .addImm(Lo.getSExtValue());
+        .addImm(Lo.getSExtValue());
Lint: Pre-merge checks: clang-format: please reformat the code ``` - .addImm(Lo.getSExtValue()); + .addImm…
.addImm(Lo.getSExtValue()) .addImm(Lo.getSExtValue());
.addReg(Dst, RegState::Implicit | RegState::Define);
BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B32), DstHi) BuildMI(MBB, MI, DL, get(AMDGPU::S_MOV_B32), DstHi)
Lint: Pre-merge checks
Inline Actions

clang-format: please reformat the code

-      .addImm(Hi.getSExtValue());
+        .addImm(Hi.getSExtValue());
Lint: Pre-merge checks: clang-format: please reformat the code ``` - .addImm(Hi.getSExtValue()); + .addImm…
.addImm(Hi.getSExtValue()) .addImm(Hi.getSExtValue());
.addReg(Dst, RegState::Implicit | RegState::Define);
MI.eraseFromParent(); MI.eraseFromParent();
break; break;
} }
case AMDGPU::V_SET_INACTIVE_B32: { case AMDGPU::V_SET_INACTIVE_B32: {
unsigned NotOpc = ST.isWave32() ? AMDGPU::S_NOT_B32 : AMDGPU::S_NOT_B64; unsigned NotOpc = ST.isWave32() ? AMDGPU::S_NOT_B32 : AMDGPU::S_NOT_B64;
unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC; unsigned Exec = ST.isWave32() ? AMDGPU::EXEC_LO : AMDGPU::EXEC;
auto FirstNot = BuildMI(MBB, MI, DL, get(NotOpc), Exec).addReg(Exec); auto FirstNot = BuildMI(MBB, MI, DL, get(NotOpc), Exec).addReg(Exec);
FirstNot->addRegisterDead(AMDGPU::SCC, TRI); // SCC is overwritten FirstNot->addRegisterDead(AMDGPU::SCC, TRI); // SCC is overwritten
▲ Show 20 Lines • Show All 6,462 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/atomic_optimizations_mul_one.ll

Show First 20 Lines • Show All 83 Lines • ▼ Show 20 Lines
; GCN-NEXT: v_mov_b32_e32 v1, s6 ; GCN-NEXT: v_mov_b32_e32 v1, s6
; GCN-NEXT: v_mov_b32_e32 v2, 0 ; GCN-NEXT: v_mov_b32_e32 v2, 0
; GCN-NEXT: buffer_atomic_add v1, v2, s[0:3], 0 idxen glc ; GCN-NEXT: buffer_atomic_add v1, v2, s[0:3], 0 idxen glc
; GCN-NEXT: BB1_2: ; GCN-NEXT: BB1_2:
; GCN-NEXT: s_or_b64 exec, exec, s[4:5] ; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: v_readfirstlane_b32 s4, v1 ; GCN-NEXT: v_readfirstlane_b32 s4, v1
; GCN-NEXT: v_add_i32_e32 v4, vcc, s4, v0 ; GCN-NEXT: v_add_i32_e32 v4, vcc, s4, v0
; GCN-NEXT: s_waitcnt expcnt(0)
; GCN-NEXT: v_mov_b32_e32 v0, s0 ; GCN-NEXT: v_mov_b32_e32 v0, s0
; GCN-NEXT: s_waitcnt expcnt(0)
; GCN-NEXT: v_mov_b32_e32 v1, s1 ; GCN-NEXT: v_mov_b32_e32 v1, s1
; GCN-NEXT: v_mov_b32_e32 v2, s2 ; GCN-NEXT: v_mov_b32_e32 v2, s2
; GCN-NEXT: v_mov_b32_e32 v3, s3 ; GCN-NEXT: v_mov_b32_e32 v3, s3
; GCN-NEXT: buffer_store_format_xyzw v[0:3], v4, s[0:3], 0 idxen ; GCN-NEXT: buffer_store_format_xyzw v[0:3], v4, s[0:3], 0 idxen
; GCN-NEXT: s_endpgm ; GCN-NEXT: s_endpgm
.entry: .entry:
%a = call i32 @llvm.amdgcn.struct.buffer.atomic.add.i32(i32 1, <4 x i32> %arg, i32 0, i32 0, i32 0, i32 0) %a = call i32 @llvm.amdgcn.struct.buffer.atomic.add.i32(i32 1, <4 x i32> %arg, i32 0, i32 0, i32 0, i32 0)
call void @llvm.amdgcn.struct.buffer.store.format.v4i32(<4 x i32> %arg, <4 x i32> %arg, i32 %a, i32 0, i32 0, i32 0) call void @llvm.amdgcn.struct.buffer.store.format.v4i32(<4 x i32> %arg, <4 x i32> %arg, i32 %a, i32 0, i32 0, i32 0)
▲ Show 20 Lines • Show All 76 Lines • ▼ Show 20 Lines
; GCN-NEXT: v_mov_b32_e32 v1, s6 ; GCN-NEXT: v_mov_b32_e32 v1, s6
; GCN-NEXT: v_mov_b32_e32 v2, 0 ; GCN-NEXT: v_mov_b32_e32 v2, 0
; GCN-NEXT: buffer_atomic_sub v1, v2, s[0:3], 0 idxen glc ; GCN-NEXT: buffer_atomic_sub v1, v2, s[0:3], 0 idxen glc
; GCN-NEXT: BB3_2: ; GCN-NEXT: BB3_2:
; GCN-NEXT: s_or_b64 exec, exec, s[4:5] ; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: v_readfirstlane_b32 s4, v1 ; GCN-NEXT: v_readfirstlane_b32 s4, v1
; GCN-NEXT: v_sub_i32_e32 v4, vcc, s4, v0 ; GCN-NEXT: v_sub_i32_e32 v4, vcc, s4, v0
; GCN-NEXT: s_waitcnt expcnt(0)
; GCN-NEXT: v_mov_b32_e32 v0, s0 ; GCN-NEXT: v_mov_b32_e32 v0, s0
; GCN-NEXT: s_waitcnt expcnt(0)
; GCN-NEXT: v_mov_b32_e32 v1, s1 ; GCN-NEXT: v_mov_b32_e32 v1, s1
; GCN-NEXT: v_mov_b32_e32 v2, s2 ; GCN-NEXT: v_mov_b32_e32 v2, s2
; GCN-NEXT: v_mov_b32_e32 v3, s3 ; GCN-NEXT: v_mov_b32_e32 v3, s3
; GCN-NEXT: buffer_store_format_xyzw v[0:3], v4, s[0:3], 0 idxen ; GCN-NEXT: buffer_store_format_xyzw v[0:3], v4, s[0:3], 0 idxen
; GCN-NEXT: s_endpgm ; GCN-NEXT: s_endpgm
.entry: .entry:
%a = call i32 @llvm.amdgcn.struct.buffer.atomic.sub.i32(i32 1, <4 x i32> %arg, i32 0, i32 0, i32 0, i32 0) %a = call i32 @llvm.amdgcn.struct.buffer.atomic.sub.i32(i32 1, <4 x i32> %arg, i32 0, i32 0, i32 0, i32 0)
call void @llvm.amdgcn.struct.buffer.store.format.v4i32(<4 x i32> %arg, <4 x i32> %arg, i32 %a, i32 0, i32 0, i32 0) call void @llvm.amdgcn.struct.buffer.store.format.v4i32(<4 x i32> %arg, <4 x i32> %arg, i32 %a, i32 0, i32 0, i32 0)
▲ Show 20 Lines • Show All 82 Lines • ▼ Show 20 Lines
; GCN-NEXT: v_mov_b32_e32 v2, 0 ; GCN-NEXT: v_mov_b32_e32 v2, 0
; GCN-NEXT: buffer_atomic_xor v1, v2, s[0:3], 0 idxen glc ; GCN-NEXT: buffer_atomic_xor v1, v2, s[0:3], 0 idxen glc
; GCN-NEXT: BB5_2: ; GCN-NEXT: BB5_2:
; GCN-NEXT: s_or_b64 exec, exec, s[4:5] ; GCN-NEXT: s_or_b64 exec, exec, s[4:5]
; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: v_readfirstlane_b32 s4, v1 ; GCN-NEXT: v_readfirstlane_b32 s4, v1
; GCN-NEXT: v_and_b32_e32 v0, 1, v0 ; GCN-NEXT: v_and_b32_e32 v0, 1, v0
; GCN-NEXT: v_xor_b32_e32 v4, s4, v0 ; GCN-NEXT: v_xor_b32_e32 v4, s4, v0
; GCN-NEXT: s_waitcnt expcnt(0)
; GCN-NEXT: v_mov_b32_e32 v0, s0 ; GCN-NEXT: v_mov_b32_e32 v0, s0
; GCN-NEXT: s_waitcnt expcnt(0)
; GCN-NEXT: v_mov_b32_e32 v1, s1 ; GCN-NEXT: v_mov_b32_e32 v1, s1
; GCN-NEXT: v_mov_b32_e32 v2, s2 ; GCN-NEXT: v_mov_b32_e32 v2, s2
; GCN-NEXT: v_mov_b32_e32 v3, s3 ; GCN-NEXT: v_mov_b32_e32 v3, s3
; GCN-NEXT: buffer_store_format_xyzw v[0:3], v4, s[0:3], 0 idxen ; GCN-NEXT: buffer_store_format_xyzw v[0:3], v4, s[0:3], 0 idxen
; GCN-NEXT: s_endpgm ; GCN-NEXT: s_endpgm
.entry: .entry:
%a = call i32 @llvm.amdgcn.struct.buffer.atomic.xor.i32(i32 1, <4 x i32> %arg, i32 0, i32 0, i32 0, i32 0) %a = call i32 @llvm.amdgcn.struct.buffer.atomic.xor.i32(i32 1, <4 x i32> %arg, i32 0, i32 0, i32 0, i32 0)
call void @llvm.amdgcn.struct.buffer.store.format.v4i32(<4 x i32> %arg, <4 x i32> %arg, i32 %a, i32 0, i32 0, i32 0) call void @llvm.amdgcn.struct.buffer.store.format.v4i32(<4 x i32> %arg, <4 x i32> %arg, i32 %a, i32 0, i32 0, i32 0)
ret void ret void
} }

llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll

Show First 20 Lines • Show All 466 Lines • ▼ Show 20 Lines
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: load_i8_to_f32: ; VI-LABEL: load_i8_to_f32:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: v_ashrrev_i32_e32 v3, 31, v0 ; VI-NEXT: v_ashrrev_i32_e32 v3, 31, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v2, s1
; VI-NEXT: v_mov_b32_e32 v1, s0 ; VI-NEXT: v_mov_b32_e32 v1, s0
; VI-NEXT: v_mov_b32_e32 v2, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v0, vcc, v1, v0
; VI-NEXT: v_addc_u32_e32 v1, vcc, v2, v3, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, v2, v3, vcc
; VI-NEXT: flat_load_ubyte v0, v[0:1] ; VI-NEXT: flat_load_ubyte v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_cvt_f32_ubyte0_e32 v2, v0 ; VI-NEXT: v_cvt_f32_ubyte0_e32 v2, v0
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr i8, i8 addrspace(1)* %in, i32 %tid %gep = getelementptr i8, i8 addrspace(1)* %in, i32 %tid
%load = load i8, i8 addrspace(1)* %gep, align 1 %load = load i8, i8 addrspace(1)* %gep, align 1
%cvt = uitofp i8 %load to float %cvt = uitofp i8 %load to float
store float %cvt, float addrspace(1)* %out, align 4 store float %cvt, float addrspace(1)* %out, align 4
ret void ret void
▲ Show 20 Lines • Show All 159 Lines • ▼ Show 20 Lines
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: flat_load_dword v0, v[0:1] ; VI-NEXT: flat_load_dword v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u32_e32 v0, vcc, 2, v0 ; VI-NEXT: v_add_u32_e32 v0, vcc, 2, v0
; VI-NEXT: v_cvt_f32_ubyte0_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 ; VI-NEXT: v_cvt_f32_ubyte0_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid %gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid
%load = load i32, i32 addrspace(1)* %gep, align 4 %load = load i32, i32 addrspace(1)* %gep, align 4
%add = add i32 %load, 2 %add = add i32 %load, 2
%inreg = and i32 %add, 255 %inreg = and i32 %add, 255
%cvt = uitofp i32 %inreg to float %cvt = uitofp i32 %inreg to float
Show All 26 Lines
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: flat_load_dword v0, v[0:1] ; VI-NEXT: flat_load_dword v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_cvt_f32_ubyte0_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 ; VI-NEXT: v_cvt_f32_ubyte0_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid %gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid
%load = load i32, i32 addrspace(1)* %gep, align 4 %load = load i32, i32 addrspace(1)* %gep, align 4
%inreg = and i32 %load, 65280 %inreg = and i32 %load, 65280
%shr = lshr i32 %inreg, 8 %shr = lshr i32 %inreg, 8
%cvt = uitofp i32 %shr to float %cvt = uitofp i32 %shr to float
Show All 21 Lines
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: i8_zext_i32_to_f32: ; VI-LABEL: i8_zext_i32_to_f32:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: v_ashrrev_i32_e32 v3, 31, v0 ; VI-NEXT: v_ashrrev_i32_e32 v3, 31, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v2, s1
; VI-NEXT: v_mov_b32_e32 v1, s0 ; VI-NEXT: v_mov_b32_e32 v1, s0
; VI-NEXT: v_mov_b32_e32 v2, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, v1, v0 ; VI-NEXT: v_add_u32_e32 v0, vcc, v1, v0
; VI-NEXT: v_addc_u32_e32 v1, vcc, v2, v3, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, v2, v3, vcc
; VI-NEXT: flat_load_ubyte v0, v[0:1] ; VI-NEXT: flat_load_ubyte v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_cvt_f32_ubyte0_e32 v2, v0 ; VI-NEXT: v_cvt_f32_ubyte0_e32 v2, v0
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr i8, i8 addrspace(1)* %in, i32 %tid %gep = getelementptr i8, i8 addrspace(1)* %in, i32 %tid
%load = load i8, i8 addrspace(1)* %gep, align 1 %load = load i8, i8 addrspace(1)* %gep, align 1
%ext = zext i8 %load to i32 %ext = zext i8 %load to i32
%cvt = uitofp i32 %ext to float %cvt = uitofp i32 %ext to float
store float %cvt, float addrspace(1)* %out, align 4 store float %cvt, float addrspace(1)* %out, align 4
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; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: flat_load_ubyte v0, v[0:1] ; VI-NEXT: flat_load_ubyte v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_cvt_f32_ubyte0_e32 v2, v0 ; VI-NEXT: v_cvt_f32_ubyte0_e32 v2, v0
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid %gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid
%val = load i32, i32 addrspace(1)* %gep %val = load i32, i32 addrspace(1)* %gep
%and = and i32 %val, 255 %and = and i32 %val, 255
%cvt = uitofp i32 %and to float %cvt = uitofp i32 %and to float
store float %cvt, float addrspace(1)* %out store float %cvt, float addrspace(1)* %out
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; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: flat_load_dword v0, v[0:1] ; VI-NEXT: flat_load_dword v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_cvt_f32_ubyte0_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 ; VI-NEXT: v_cvt_f32_ubyte0_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid %gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid
%val = load i32, i32 addrspace(1)* %gep %val = load i32, i32 addrspace(1)* %gep
%srl = lshr i32 %val, 8 %srl = lshr i32 %val, 8
%and = and i32 %srl, 255 %and = and i32 %srl, 255
%cvt = uitofp i32 %and to float %cvt = uitofp i32 %and to float
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; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: flat_load_dword v0, v[0:1] ; VI-NEXT: flat_load_dword v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_cvt_f32_ubyte0_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2 ; VI-NEXT: v_cvt_f32_ubyte0_sdwa v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_2
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid %gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid
%val = load i32, i32 addrspace(1)* %gep %val = load i32, i32 addrspace(1)* %gep
%srl = lshr i32 %val, 16 %srl = lshr i32 %val, 16
%and = and i32 %srl, 255 %and = and i32 %srl, 255
%cvt = uitofp i32 %and to float %cvt = uitofp i32 %and to float
Show All 25 Lines
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; VI-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: flat_load_dword v0, v[0:1] ; VI-NEXT: flat_load_dword v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_cvt_f32_ubyte3_e32 v2, v0 ; VI-NEXT: v_cvt_f32_ubyte3_e32 v2, v0
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid %gep = getelementptr i32, i32 addrspace(1)* %in, i32 %tid
%val = load i32, i32 addrspace(1)* %gep %val = load i32, i32 addrspace(1)* %gep
%srl = lshr i32 %val, 24 %srl = lshr i32 %val, 24
%and = and i32 %srl, 255 %and = and i32 %srl, 255
%cvt = uitofp i32 %and to float %cvt = uitofp i32 %and to float
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llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll

Show First 20 Lines • Show All 450 Lines • ▼ Show 20 Lines
; GCN-NEXT: buffer_load_dword v13, off, s[0:3], s33 offset:552 ; 4-byte Folded Reload ; GCN-NEXT: buffer_load_dword v13, off, s[0:3], s33 offset:552 ; 4-byte Folded Reload
; GCN-NEXT: buffer_load_dword v14, off, s[0:3], s33 offset:556 ; 4-byte Folded Reload ; GCN-NEXT: buffer_load_dword v14, off, s[0:3], s33 offset:556 ; 4-byte Folded Reload
; GCN-NEXT: buffer_load_dword v15, off, s[0:3], s33 offset:560 ; 4-byte Folded Reload ; GCN-NEXT: buffer_load_dword v15, off, s[0:3], s33 offset:560 ; 4-byte Folded Reload
; GCN-NEXT: buffer_load_dword v16, off, s[0:3], s33 offset:564 ; 4-byte Folded Reload ; GCN-NEXT: buffer_load_dword v16, off, s[0:3], s33 offset:564 ; 4-byte Folded Reload
; GCN-NEXT: buffer_load_dword v17, off, s[0:3], s33 offset:568 ; 4-byte Folded Reload ; GCN-NEXT: buffer_load_dword v17, off, s[0:3], s33 offset:568 ; 4-byte Folded Reload
; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s33 offset:572 ; 4-byte Folded Reload ; GCN-NEXT: buffer_load_dword v18, off, s[0:3], s33 offset:572 ; 4-byte Folded Reload
; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: v_mov_b32_e32 v4, v7 ; GCN-NEXT: v_mov_b32_e32 v4, v7
; GCN-NEXT: v_mov_b32_e32 v7, v10
; GCN-NEXT: v_mov_b32_e32 v5, v8 ; GCN-NEXT: v_mov_b32_e32 v5, v8
; GCN-NEXT: v_mov_b32_e32 v6, v9 ; GCN-NEXT: v_mov_b32_e32 v6, v9
; GCN-NEXT: v_mov_b32_e32 v7, v10
; GCN-NEXT: buffer_store_dword v4, off, s[0:3], s33 offset:464 ; GCN-NEXT: buffer_store_dword v4, off, s[0:3], s33 offset:464
; GCN-NEXT: buffer_store_dword v5, off, s[0:3], s33 offset:468 ; GCN-NEXT: buffer_store_dword v5, off, s[0:3], s33 offset:468
; GCN-NEXT: buffer_store_dword v6, off, s[0:3], s33 offset:472 ; GCN-NEXT: buffer_store_dword v6, off, s[0:3], s33 offset:472
; GCN-NEXT: buffer_store_dword v7, off, s[0:3], s33 offset:476 ; GCN-NEXT: buffer_store_dword v7, off, s[0:3], s33 offset:476
; GCN-NEXT: buffer_store_dword v55, off, s[0:3], s33 offset:480 ; GCN-NEXT: buffer_store_dword v55, off, s[0:3], s33 offset:480
; GCN-NEXT: buffer_store_dword v56, off, s[0:3], s33 offset:484 ; GCN-NEXT: buffer_store_dword v56, off, s[0:3], s33 offset:484
; GCN-NEXT: buffer_store_dword v57, off, s[0:3], s33 offset:488 ; GCN-NEXT: buffer_store_dword v57, off, s[0:3], s33 offset:488
; GCN-NEXT: buffer_store_dword v58, off, s[0:3], s33 offset:492 ; GCN-NEXT: buffer_store_dword v58, off, s[0:3], s33 offset:492
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llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll

Show First 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
; GFX8-NEXT: flat_load_dwordx4 v[6:9], v[6:7] ; GFX8-NEXT: flat_load_dwordx4 v[6:9], v[6:7]
; GFX8-NEXT: v_add_u32_e32 v0, vcc, 48, v0 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, 48, v0
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_dwordx4 v[10:13], v[10:11] ; GFX8-NEXT: flat_load_dwordx4 v[10:13], v[10:11]
; GFX8-NEXT: flat_load_dwordx4 v[14:17], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[14:17], v[0:1]
; GFX8-NEXT: s_lshl_b32 s0, s2, 1 ; GFX8-NEXT: s_lshl_b32 s0, s2, 1
; GFX8-NEXT: s_lshl_b32 m0, s0, 1 ; GFX8-NEXT: s_lshl_b32 m0, s0, 1
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_movrels_b32_e32 v1, v3
; GFX8-NEXT: v_movrels_b32_e32 v0, v2 ; GFX8-NEXT: v_movrels_b32_e32 v0, v2
; GFX8-NEXT: v_movrels_b32_e32 v1, v3
; GFX8-NEXT: v_mov_b32_e32 v3, v1 ; GFX8-NEXT: v_mov_b32_e32 v3, v1
; GFX8-NEXT: v_mov_b32_e32 v2, v0 ; GFX8-NEXT: v_mov_b32_e32 v2, v0
; GFX8-NEXT: v_readfirstlane_b32 s0, v0 ; GFX8-NEXT: v_readfirstlane_b32 s0, v0
; GFX8-NEXT: v_readfirstlane_b32 s1, v1 ; GFX8-NEXT: v_readfirstlane_b32 s1, v1
; GFX8-NEXT: v_readfirstlane_b32 s2, v2 ; GFX8-NEXT: v_readfirstlane_b32 s2, v2
; GFX8-NEXT: v_readfirstlane_b32 s3, v3 ; GFX8-NEXT: v_readfirstlane_b32 s3, v3
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX7-LABEL: extractelement_vgpr_v4i128_sgpr_idx: ; GFX7-LABEL: extractelement_vgpr_v4i128_sgpr_idx:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[2:5], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[2:5], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: buffer_load_dwordx4 v[6:9], v[0:1], s[4:7], 0 addr64 offset:16 ; GFX7-NEXT: buffer_load_dwordx4 v[6:9], v[0:1], s[4:7], 0 addr64 offset:16
; GFX7-NEXT: buffer_load_dwordx4 v[10:13], v[0:1], s[4:7], 0 addr64 offset:32 ; GFX7-NEXT: buffer_load_dwordx4 v[10:13], v[0:1], s[4:7], 0 addr64 offset:32
; GFX7-NEXT: buffer_load_dwordx4 v[14:17], v[0:1], s[4:7], 0 addr64 offset:48 ; GFX7-NEXT: buffer_load_dwordx4 v[14:17], v[0:1], s[4:7], 0 addr64 offset:48
; GFX7-NEXT: s_lshl_b32 s0, s2, 1 ; GFX7-NEXT: s_lshl_b32 s0, s2, 1
; GFX7-NEXT: s_lshl_b32 m0, s0, 1 ; GFX7-NEXT: s_lshl_b32 m0, s0, 1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_movrels_b32_e32 v1, v3
; GFX7-NEXT: v_movrels_b32_e32 v0, v2 ; GFX7-NEXT: v_movrels_b32_e32 v0, v2
; GFX7-NEXT: v_movrels_b32_e32 v1, v3
; GFX7-NEXT: v_mov_b32_e32 v3, v1 ; GFX7-NEXT: v_mov_b32_e32 v3, v1
; GFX7-NEXT: v_mov_b32_e32 v2, v0 ; GFX7-NEXT: v_mov_b32_e32 v2, v0
; GFX7-NEXT: v_readfirstlane_b32 s0, v0 ; GFX7-NEXT: v_readfirstlane_b32 s0, v0
; GFX7-NEXT: v_readfirstlane_b32 s1, v1 ; GFX7-NEXT: v_readfirstlane_b32 s1, v1
; GFX7-NEXT: v_readfirstlane_b32 s2, v2 ; GFX7-NEXT: v_readfirstlane_b32 s2, v2
; GFX7-NEXT: v_readfirstlane_b32 s3, v3 ; GFX7-NEXT: v_readfirstlane_b32 s3, v3
; GFX7-NEXT: ; return to shader part epilog ; GFX7-NEXT: ; return to shader part epilog
; ;
; GFX10-LABEL: extractelement_vgpr_v4i128_sgpr_idx: ; GFX10-LABEL: extractelement_vgpr_v4i128_sgpr_idx:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_clause 0x3 ; GFX10-NEXT: s_clause 0x3
; GFX10-NEXT: global_load_dwordx4 v[2:5], v[0:1], off ; GFX10-NEXT: global_load_dwordx4 v[2:5], v[0:1], off
; GFX10-NEXT: global_load_dwordx4 v[6:9], v[0:1], off offset:16 ; GFX10-NEXT: global_load_dwordx4 v[6:9], v[0:1], off offset:16
; GFX10-NEXT: global_load_dwordx4 v[10:13], v[0:1], off offset:32 ; GFX10-NEXT: global_load_dwordx4 v[10:13], v[0:1], off offset:32
; GFX10-NEXT: global_load_dwordx4 v[14:17], v[0:1], off offset:48 ; GFX10-NEXT: global_load_dwordx4 v[14:17], v[0:1], off offset:48
; GFX10-NEXT: s_lshl_b32 s0, s2, 1 ; GFX10-NEXT: s_lshl_b32 s0, s2, 1
; GFX10-NEXT: s_lshl_b32 m0, s0, 1 ; GFX10-NEXT: s_lshl_b32 m0, s0, 1
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_movrels_b32_e32 v1, v3
; GFX10-NEXT: v_movrels_b32_e32 v0, v2 ; GFX10-NEXT: v_movrels_b32_e32 v0, v2
; GFX10-NEXT: v_mov_b32_e32 v3, v1 ; GFX10-NEXT: v_movrels_b32_e32 v1, v3
; GFX10-NEXT: v_mov_b32_e32 v2, v0 ; GFX10-NEXT: v_mov_b32_e32 v2, v0
; GFX10-NEXT: v_mov_b32_e32 v3, v1
; GFX10-NEXT: v_readfirstlane_b32 s0, v0 ; GFX10-NEXT: v_readfirstlane_b32 s0, v0
; GFX10-NEXT: v_readfirstlane_b32 s1, v1 ; GFX10-NEXT: v_readfirstlane_b32 s1, v1
; GFX10-NEXT: v_readfirstlane_b32 s3, v3
; GFX10-NEXT: v_readfirstlane_b32 s2, v2 ; GFX10-NEXT: v_readfirstlane_b32 s2, v2
; GFX10-NEXT: v_readfirstlane_b32 s3, v3
; GFX10-NEXT: ; return to shader part epilog ; GFX10-NEXT: ; return to shader part epilog
%vector = load <4 x i128>, <4 x i128> addrspace(1)* %ptr %vector = load <4 x i128>, <4 x i128> addrspace(1)* %ptr
%element = extractelement <4 x i128> %vector, i32 %idx %element = extractelement <4 x i128> %vector, i32 %idx
ret i128 %element ret i128 %element
} }
define i128 @extractelement_vgpr_v4i128_vgpr_idx(<4 x i128> addrspace(1)* %ptr, i32 %idx) { define i128 @extractelement_vgpr_v4i128_vgpr_idx(<4 x i128> addrspace(1)* %ptr, i32 %idx) {
; GFX9-LABEL: extractelement_vgpr_v4i128_vgpr_idx: ; GFX9-LABEL: extractelement_vgpr_v4i128_vgpr_idx:
▲ Show 20 Lines • Show All 805 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll

Show First 20 Lines • Show All 2,745 Lines • ▼ Show 20 Lines
; GPRIDX-NEXT: wavefront_size = 6 ; GPRIDX-NEXT: wavefront_size = 6
; GPRIDX-NEXT: call_convention = -1 ; GPRIDX-NEXT: call_convention = -1
; GPRIDX-NEXT: runtime_loader_kernel_symbol = 0 ; GPRIDX-NEXT: runtime_loader_kernel_symbol = 0
; GPRIDX-NEXT: .end_amd_kernel_code_t ; GPRIDX-NEXT: .end_amd_kernel_code_t
; GPRIDX-NEXT: ; %bb.0: ; %entry ; GPRIDX-NEXT: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0 ; GPRIDX-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0
; GPRIDX-NEXT: s_load_dword s8, s[4:5], 0x8 ; GPRIDX-NEXT: s_load_dword s8, s[4:5], 0x8
; GPRIDX-NEXT: s_mov_b32 s0, 0 ; GPRIDX-NEXT: s_mov_b32 s0, 0
; GPRIDX-NEXT: s_mov_b32 s1, 0x40140000
; GPRIDX-NEXT: s_mov_b32 s3, 0x40080000 ; GPRIDX-NEXT: s_mov_b32 s3, 0x40080000
; GPRIDX-NEXT: s_mov_b32 s2, s0 ; GPRIDX-NEXT: s_mov_b32 s2, s0
; GPRIDX-NEXT: s_mov_b32 s1, 0x40140000
; GPRIDX-NEXT: s_waitcnt lgkmcnt(0) ; GPRIDX-NEXT: s_waitcnt lgkmcnt(0)
; GPRIDX-NEXT: s_cmp_eq_u32 s8, 1 ; GPRIDX-NEXT: s_cmp_eq_u32 s8, 1
; GPRIDX-NEXT: s_cselect_b64 s[4:5], 2.0, 1.0 ; GPRIDX-NEXT: s_cselect_b64 s[4:5], 2.0, 1.0
; GPRIDX-NEXT: s_cmp_eq_u32 s8, 2 ; GPRIDX-NEXT: s_cmp_eq_u32 s8, 2
; GPRIDX-NEXT: s_cselect_b64 s[2:3], s[2:3], s[4:5] ; GPRIDX-NEXT: s_cselect_b64 s[2:3], s[2:3], s[4:5]
; GPRIDX-NEXT: s_cmp_eq_u32 s8, 3 ; GPRIDX-NEXT: s_cmp_eq_u32 s8, 3
; GPRIDX-NEXT: s_cselect_b64 s[2:3], 4.0, s[2:3] ; GPRIDX-NEXT: s_cselect_b64 s[2:3], 4.0, s[2:3]
; GPRIDX-NEXT: s_cmp_eq_u32 s8, 4 ; GPRIDX-NEXT: s_cmp_eq_u32 s8, 4
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; MOVREL-NEXT: wavefront_size = 6 ; MOVREL-NEXT: wavefront_size = 6
; MOVREL-NEXT: call_convention = -1 ; MOVREL-NEXT: call_convention = -1
; MOVREL-NEXT: runtime_loader_kernel_symbol = 0 ; MOVREL-NEXT: runtime_loader_kernel_symbol = 0
; MOVREL-NEXT: .end_amd_kernel_code_t ; MOVREL-NEXT: .end_amd_kernel_code_t
; MOVREL-NEXT: ; %bb.0: ; %entry ; MOVREL-NEXT: ; %bb.0: ; %entry
; MOVREL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0 ; MOVREL-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0
; MOVREL-NEXT: s_load_dword s8, s[4:5], 0x8 ; MOVREL-NEXT: s_load_dword s8, s[4:5], 0x8
; MOVREL-NEXT: s_mov_b32 s0, 0 ; MOVREL-NEXT: s_mov_b32 s0, 0
; MOVREL-NEXT: s_mov_b32 s1, 0x40140000
; MOVREL-NEXT: s_mov_b32 s3, 0x40080000 ; MOVREL-NEXT: s_mov_b32 s3, 0x40080000
; MOVREL-NEXT: s_mov_b32 s2, s0 ; MOVREL-NEXT: s_mov_b32 s2, s0
; MOVREL-NEXT: s_mov_b32 s1, 0x40140000
; MOVREL-NEXT: s_waitcnt lgkmcnt(0) ; MOVREL-NEXT: s_waitcnt lgkmcnt(0)
; MOVREL-NEXT: s_cmp_eq_u32 s8, 1 ; MOVREL-NEXT: s_cmp_eq_u32 s8, 1
; MOVREL-NEXT: s_cselect_b64 s[4:5], 2.0, 1.0 ; MOVREL-NEXT: s_cselect_b64 s[4:5], 2.0, 1.0
; MOVREL-NEXT: s_cmp_eq_u32 s8, 2 ; MOVREL-NEXT: s_cmp_eq_u32 s8, 2
; MOVREL-NEXT: s_cselect_b64 s[2:3], s[2:3], s[4:5] ; MOVREL-NEXT: s_cselect_b64 s[2:3], s[2:3], s[4:5]
; MOVREL-NEXT: s_cmp_eq_u32 s8, 3 ; MOVREL-NEXT: s_cmp_eq_u32 s8, 3
; MOVREL-NEXT: s_cselect_b64 s[2:3], 4.0, s[2:3] ; MOVREL-NEXT: s_cselect_b64 s[2:3], 4.0, s[2:3]
; MOVREL-NEXT: s_cmp_eq_u32 s8, 4 ; MOVREL-NEXT: s_cmp_eq_u32 s8, 4
; MOVREL-NEXT: s_cselect_b64 s[0:1], s[0:1], s[2:3] ; MOVREL-NEXT: s_cselect_b64 s[0:1], s[0:1], s[2:3]
; MOVREL-NEXT: v_mov_b32_e32 v0, s0 ; MOVREL-NEXT: v_mov_b32_e32 v0, s0
; MOVREL-NEXT: v_mov_b32_e32 v2, s6
; MOVREL-NEXT: v_mov_b32_e32 v1, s1 ; MOVREL-NEXT: v_mov_b32_e32 v1, s1
; MOVREL-NEXT: v_mov_b32_e32 v2, s6
; MOVREL-NEXT: v_mov_b32_e32 v3, s7 ; MOVREL-NEXT: v_mov_b32_e32 v3, s7
; MOVREL-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; MOVREL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; MOVREL-NEXT: s_endpgm ; MOVREL-NEXT: s_endpgm
; ;
; GFX10-LABEL: dyn_extract_v5f64_s_s: ; GFX10-LABEL: dyn_extract_v5f64_s_s:
; GFX10: .amd_kernel_code_t ; GFX10: .amd_kernel_code_t
; GFX10-NEXT: amd_code_version_major = 1 ; GFX10-NEXT: amd_code_version_major = 1
; GFX10-NEXT: amd_code_version_minor = 2 ; GFX10-NEXT: amd_code_version_minor = 2
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; GFX10-NEXT: call_convention = -1 ; GFX10-NEXT: call_convention = -1
; GFX10-NEXT: runtime_loader_kernel_symbol = 0 ; GFX10-NEXT: runtime_loader_kernel_symbol = 0
; GFX10-NEXT: .end_amd_kernel_code_t ; GFX10-NEXT: .end_amd_kernel_code_t
; GFX10-NEXT: ; %bb.0: ; %entry ; GFX10-NEXT: ; %bb.0: ; %entry
; GFX10-NEXT: s_clause 0x1 ; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: s_load_dword s8, s[4:5], 0x8 ; GFX10-NEXT: s_load_dword s8, s[4:5], 0x8
; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-NEXT: s_mov_b32 s2, 0 ; GFX10-NEXT: s_mov_b32 s2, 0
; GFX10-NEXT: s_mov_b32 s3, 0x40140000
; GFX10-NEXT: s_mov_b32 s5, 0x40080000 ; GFX10-NEXT: s_mov_b32 s5, 0x40080000
; GFX10-NEXT: s_mov_b32 s4, s2 ; GFX10-NEXT: s_mov_b32 s4, s2
; GFX10-NEXT: s_mov_b32 s3, 0x40140000
; GFX10-NEXT: v_mov_b32_e32 v2, 0 ; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_cmp_eq_u32 s8, 1 ; GFX10-NEXT: s_cmp_eq_u32 s8, 1
; GFX10-NEXT: s_cselect_b64 s[6:7], 2.0, 1.0 ; GFX10-NEXT: s_cselect_b64 s[6:7], 2.0, 1.0
; GFX10-NEXT: s_cmp_eq_u32 s8, 2 ; GFX10-NEXT: s_cmp_eq_u32 s8, 2
; GFX10-NEXT: s_cselect_b64 s[4:5], s[4:5], s[6:7] ; GFX10-NEXT: s_cselect_b64 s[4:5], s[4:5], s[6:7]
; GFX10-NEXT: s_cmp_eq_u32 s8, 3 ; GFX10-NEXT: s_cmp_eq_u32 s8, 3
; GFX10-NEXT: s_cselect_b64 s[4:5], 4.0, s[4:5] ; GFX10-NEXT: s_cselect_b64 s[4:5], 4.0, s[4:5]
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llvm/test/CodeGen/AMDGPU/GlobalISel/fmed3.ll

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; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v8 ; VI-NEXT: v_add_u32_e32 v4, vcc, v4, v8
; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc
; VI-NEXT: flat_load_dword v0, v[0:1] glc ; VI-NEXT: flat_load_dword v0, v[0:1] glc
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: flat_load_dword v1, v[2:3] glc ; VI-NEXT: flat_load_dword v1, v[2:3] glc
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: flat_load_dword v2, v[4:5] glc ; VI-NEXT: flat_load_dword v2, v[4:5] glc
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_mov_b32_e32 v7, s1
; VI-NEXT: v_mov_b32_e32 v6, s0 ; VI-NEXT: v_mov_b32_e32 v6, s0
; VI-NEXT: v_mov_b32_e32 v7, s1
; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v8 ; VI-NEXT: v_add_u32_e32 v6, vcc, v6, v8
; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc ; VI-NEXT: v_addc_u32_e32 v7, vcc, 0, v7, vcc
; VI-NEXT: v_sub_f32_e32 v0, 0x80000000, v0 ; VI-NEXT: v_sub_f32_e32 v0, 0x80000000, v0
; VI-NEXT: v_med3_f32 v0, v0, v1, v2 ; VI-NEXT: v_med3_f32 v0, v0, v1, v2
; VI-NEXT: flat_store_dword v[6:7], v0 ; VI-NEXT: flat_store_dword v[6:7], v0
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v_test_global_nnans_med3_f32_pat0_srcmod0: ; GFX9-LABEL: v_test_global_nnans_med3_f32_pat0_srcmod0:
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llvm/test/CodeGen/AMDGPU/GlobalISel/frem.ll

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; VI-NEXT: v_fma_f32 v5, -v2, v4, 1.0 ; VI-NEXT: v_fma_f32 v5, -v2, v4, 1.0
; VI-NEXT: v_fma_f32 v4, v5, v4, v4 ; VI-NEXT: v_fma_f32 v4, v5, v4, v4
; VI-NEXT: v_mul_f32_e32 v5, v3, v4 ; VI-NEXT: v_mul_f32_e32 v5, v3, v4
; VI-NEXT: v_fma_f32 v6, -v2, v5, v3 ; VI-NEXT: v_fma_f32 v6, -v2, v5, v3
; VI-NEXT: v_fma_f32 v5, v6, v4, v5 ; VI-NEXT: v_fma_f32 v5, v6, v4, v5
; VI-NEXT: v_fma_f32 v2, -v2, v5, v3 ; VI-NEXT: v_fma_f32 v2, -v2, v5, v3
; VI-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 0 ; VI-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 0
; VI-NEXT: v_div_fmas_f32 v2, v2, v4, v5 ; VI-NEXT: v_div_fmas_f32 v2, v2, v4, v5
; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: v_div_fixup_f32 v2, v2, v1, s3 ; VI-NEXT: v_div_fixup_f32 v2, v2, v1, s3
; VI-NEXT: v_trunc_f32_e32 v2, v2 ; VI-NEXT: v_trunc_f32_e32 v2, v2
; VI-NEXT: v_fma_f32 v1, -v2, v1, s3 ; VI-NEXT: v_fma_f32 v1, -v2, v1, s3
; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%gep2 = getelementptr <2 x float>, <2 x float> addrspace(1)* %in2, i32 4 %gep2 = getelementptr <2 x float>, <2 x float> addrspace(1)* %in2, i32 4
%r0 = load <2 x float>, <2 x float> addrspace(1)* %in1, align 8 %r0 = load <2 x float>, <2 x float> addrspace(1)* %in1, align 8
%r1 = load <2 x float>, <2 x float> addrspace(1)* %gep2, align 8 %r1 = load <2 x float>, <2 x float> addrspace(1)* %gep2, align 8
%r2 = frem <2 x float> %r0, %r1 %r2 = frem <2 x float> %r0, %r1
store <2 x float> %r2, <2 x float> addrspace(1)* %out, align 8 store <2 x float> %r2, <2 x float> addrspace(1)* %out, align 8
ret void ret void
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; VI-NEXT: v_fma_f32 v7, -v4, v6, 1.0 ; VI-NEXT: v_fma_f32 v7, -v4, v6, 1.0
; VI-NEXT: v_fma_f32 v6, v7, v6, v6 ; VI-NEXT: v_fma_f32 v6, v7, v6, v6
; VI-NEXT: v_mul_f32_e32 v7, v5, v6 ; VI-NEXT: v_mul_f32_e32 v7, v5, v6
; VI-NEXT: v_fma_f32 v8, -v4, v7, v5 ; VI-NEXT: v_fma_f32 v8, -v4, v7, v5
; VI-NEXT: v_fma_f32 v7, v8, v6, v7 ; VI-NEXT: v_fma_f32 v7, v8, v6, v7
; VI-NEXT: v_fma_f32 v4, -v4, v7, v5 ; VI-NEXT: v_fma_f32 v4, -v4, v7, v5
; VI-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 0 ; VI-NEXT: s_setreg_imm32_b32 hwreg(HW_REG_MODE, 4, 2), 0
; VI-NEXT: v_div_fmas_f32 v4, v4, v6, v7 ; VI-NEXT: v_div_fmas_f32 v4, v4, v6, v7
; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: v_div_fixup_f32 v4, v4, v3, s3 ; VI-NEXT: v_div_fixup_f32 v4, v4, v3, s3
; VI-NEXT: v_trunc_f32_e32 v4, v4 ; VI-NEXT: v_trunc_f32_e32 v4, v4
; VI-NEXT: v_fma_f32 v3, -v4, v3, s3 ; VI-NEXT: v_fma_f32 v3, -v4, v3, s3
; VI-NEXT: v_mov_b32_e32 v4, s4 ; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%gep2 = getelementptr <4 x float>, <4 x float> addrspace(1)* %in2, i32 4 %gep2 = getelementptr <4 x float>, <4 x float> addrspace(1)* %in2, i32 4
%r0 = load <4 x float>, <4 x float> addrspace(1)* %in1, align 16 %r0 = load <4 x float>, <4 x float> addrspace(1)* %in1, align 16
%r1 = load <4 x float>, <4 x float> addrspace(1)* %gep2, align 16 %r1 = load <4 x float>, <4 x float> addrspace(1)* %gep2, align 16
%r2 = frem <4 x float> %r0, %r1 %r2 = frem <4 x float> %r0, %r1
store <4 x float> %r2, <4 x float> addrspace(1)* %out, align 16 store <4 x float> %r2, <4 x float> addrspace(1)* %out, align 16
ret void ret void
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llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i16.ll

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; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_and_b32 s1, s3, 1 ; GFX8-NEXT: s_and_b32 s1, s3, 1
; GFX8-NEXT: s_mov_b32 s0, 0xffff ; GFX8-NEXT: s_mov_b32 s0, 0xffff
; GFX8-NEXT: s_lshl_b32 s1, s1, 4 ; GFX8-NEXT: s_lshl_b32 s1, s1, 4
; GFX8-NEXT: s_and_b32 s2, s2, s0 ; GFX8-NEXT: s_and_b32 s2, s2, s0
; GFX8-NEXT: s_lshl_b32 s0, s0, s1 ; GFX8-NEXT: s_lshl_b32 s0, s0, s1
; GFX8-NEXT: s_not_b32 s0, s0 ; GFX8-NEXT: s_not_b32 s0, s0
; GFX8-NEXT: s_lshl_b32 s2, s2, s1 ; GFX8-NEXT: s_lshl_b32 s2, s2, s1
; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_and_b32_e32 v2, s0, v0 ; GFX8-NEXT: v_and_b32_e32 v2, s0, v0
; GFX8-NEXT: v_mov_b32_e32 v0, 0 ; GFX8-NEXT: v_mov_b32_e32 v0, 0
; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: v_or_b32_e32 v2, s2, v2 ; GFX8-NEXT: v_or_b32_e32 v2, s2, v2
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v2i16_s_s: ; GFX7-LABEL: insertelement_v_v2i16_s_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: flat_load_dword v0, v[0:1] ; GFX7-NEXT: flat_load_dword v0, v[0:1]
; GFX7-NEXT: s_and_b32 s1, s3, 1 ; GFX7-NEXT: s_and_b32 s1, s3, 1
; GFX7-NEXT: s_mov_b32 s0, 0xffff ; GFX7-NEXT: s_mov_b32 s0, 0xffff
; GFX7-NEXT: s_lshl_b32 s1, s1, 4 ; GFX7-NEXT: s_lshl_b32 s1, s1, 4
; GFX7-NEXT: s_and_b32 s2, s2, s0 ; GFX7-NEXT: s_and_b32 s2, s2, s0
; GFX7-NEXT: s_lshl_b32 s0, s0, s1 ; GFX7-NEXT: s_lshl_b32 s0, s0, s1
; GFX7-NEXT: s_not_b32 s0, s0 ; GFX7-NEXT: s_not_b32 s0, s0
; GFX7-NEXT: s_lshl_b32 s2, s2, s1 ; GFX7-NEXT: s_lshl_b32 s2, s2, s1
; GFX7-NEXT: v_mov_b32_e32 v1, 0
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_and_b32_e32 v2, s0, v0 ; GFX7-NEXT: v_and_b32_e32 v2, s0, v0
; GFX7-NEXT: v_mov_b32_e32 v0, 0 ; GFX7-NEXT: v_mov_b32_e32 v0, 0
; GFX7-NEXT: v_mov_b32_e32 v1, 0
; GFX7-NEXT: v_or_b32_e32 v2, s2, v2 ; GFX7-NEXT: v_or_b32_e32 v2, s2, v2
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-LABEL: insertelement_v_v2i16_s_s: ; GFX10-LABEL: insertelement_v_v2i16_s_s:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dword v2, v[0:1], off ; GFX10-NEXT: global_load_dword v2, v[0:1], off
; GFX10-NEXT: s_and_b32 s0, s3, 1 ; GFX10-NEXT: s_and_b32 s0, s3, 1
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; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dword s0, s[2:3], 0x0 ; GFX10-NEXT: s_load_dword s0, s[2:3], 0x0
; GFX10-NEXT: v_and_b32_e32 v0, 1, v0 ; GFX10-NEXT: v_and_b32_e32 v0, 1, v0
; GFX10-NEXT: s_mov_b32 s1, 0xffff ; GFX10-NEXT: s_mov_b32 s1, 0xffff
; GFX10-NEXT: v_lshlrev_b32_e32 v0, 4, v0 ; GFX10-NEXT: v_lshlrev_b32_e32 v0, 4, v0
; GFX10-NEXT: v_lshlrev_b32_e64 v1, v0, s1 ; GFX10-NEXT: v_lshlrev_b32_e64 v1, v0, s1
; GFX10-NEXT: s_and_b32 s1, s4, s1 ; GFX10-NEXT: s_and_b32 s1, s4, s1
; GFX10-NEXT: v_lshlrev_b32_e64 v2, v0, s1 ; GFX10-NEXT: v_lshlrev_b32_e64 v2, v0, s1
; GFX10-NEXT: v_xor_b32_e32 v3, -1, v1
; GFX10-NEXT: v_mov_b32_e32 v0, 0 ; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_xor_b32_e32 v3, -1, v1
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: v_and_or_b32 v2, s0, v3, v2 ; GFX10-NEXT: v_and_or_b32 v2, s0, v3, v2
; GFX10-NEXT: global_store_dword v[0:1], v2, off ; GFX10-NEXT: global_store_dword v[0:1], v2, off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <2 x i16>, <2 x i16> addrspace(4)* %ptr %vec = load <2 x i16>, <2 x i16> addrspace(4)* %ptr
%insert = insertelement <2 x i16> %vec, i16 %val, i32 %idx %insert = insertelement <2 x i16> %vec, i16 %val, i32 %idx
store <2 x i16> %insert, <2 x i16> addrspace(1)* null store <2 x i16> %insert, <2 x i16> addrspace(1)* null
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; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dword v3, v[0:1], off ; GFX10-NEXT: global_load_dword v3, v[0:1], off
; GFX10-NEXT: v_and_b32_e32 v0, 1, v2 ; GFX10-NEXT: v_and_b32_e32 v0, 1, v2
; GFX10-NEXT: s_mov_b32 s0, 0xffff ; GFX10-NEXT: s_mov_b32 s0, 0xffff
; GFX10-NEXT: v_lshlrev_b32_e32 v0, 4, v0 ; GFX10-NEXT: v_lshlrev_b32_e32 v0, 4, v0
; GFX10-NEXT: v_lshlrev_b32_e64 v1, v0, s0 ; GFX10-NEXT: v_lshlrev_b32_e64 v1, v0, s0
; GFX10-NEXT: s_and_b32 s0, s2, s0 ; GFX10-NEXT: s_and_b32 s0, s2, s0
; GFX10-NEXT: v_lshlrev_b32_e64 v2, v0, s0 ; GFX10-NEXT: v_lshlrev_b32_e64 v2, v0, s0
; GFX10-NEXT: v_xor_b32_e32 v4, -1, v1
; GFX10-NEXT: v_mov_b32_e32 v0, 0 ; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_xor_b32_e32 v4, -1, v1
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_and_or_b32 v2, v3, v4, v2 ; GFX10-NEXT: v_and_or_b32 v2, v3, v4, v2
; GFX10-NEXT: global_store_dword v[0:1], v2, off ; GFX10-NEXT: global_store_dword v[0:1], v2, off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <2 x i16>, <2 x i16> addrspace(1)* %ptr %vec = load <2 x i16>, <2 x i16> addrspace(1)* %ptr
%insert = insertelement <2 x i16> %vec, i16 %val, i32 %idx %insert = insertelement <2 x i16> %vec, i16 %val, i32 %idx
store <2 x i16> %insert, <2 x i16> addrspace(1)* null store <2 x i16> %insert, <2 x i16> addrspace(1)* null
Show All 22 Lines
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_and_b32 s1, s2, 1 ; GFX8-NEXT: s_and_b32 s1, s2, 1
; GFX8-NEXT: s_mov_b32 s0, 0xffff ; GFX8-NEXT: s_mov_b32 s0, 0xffff
; GFX8-NEXT: s_lshl_b32 s1, s1, 4 ; GFX8-NEXT: s_lshl_b32 s1, s1, 4
; GFX8-NEXT: s_lshl_b32 s0, s0, s1 ; GFX8-NEXT: s_lshl_b32 s0, s0, s1
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_not_b32 s0, s0 ; GFX8-NEXT: s_not_b32 s0, s0
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_and_b32_e32 v3, s0, v0 ; GFX8-NEXT: v_and_b32_e32 v3, s0, v0
; GFX8-NEXT: v_mov_b32_e32 v0, 0 ; GFX8-NEXT: v_mov_b32_e32 v0, 0
; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: v_or_b32_e32 v2, v3, v2 ; GFX8-NEXT: v_or_b32_e32 v2, v3, v2
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v2i16_v_s: ; GFX7-LABEL: insertelement_v_v2i16_v_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: flat_load_dword v0, v[0:1] ; GFX7-NEXT: flat_load_dword v0, v[0:1]
; GFX7-NEXT: s_and_b32 s1, s2, 1 ; GFX7-NEXT: s_and_b32 s1, s2, 1
; GFX7-NEXT: s_mov_b32 s0, 0xffff ; GFX7-NEXT: s_mov_b32 s0, 0xffff
; GFX7-NEXT: s_lshl_b32 s1, s1, 4 ; GFX7-NEXT: s_lshl_b32 s1, s1, 4
; GFX7-NEXT: v_and_b32_e32 v1, s0, v2 ; GFX7-NEXT: v_and_b32_e32 v1, s0, v2
; GFX7-NEXT: s_lshl_b32 s0, s0, s1 ; GFX7-NEXT: s_lshl_b32 s0, s0, s1
; GFX7-NEXT: s_not_b32 s0, s0 ; GFX7-NEXT: s_not_b32 s0, s0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, s1, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, s1, v1
; GFX7-NEXT: v_mov_b32_e32 v1, 0
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_and_b32_e32 v3, s0, v0 ; GFX7-NEXT: v_and_b32_e32 v3, s0, v0
; GFX7-NEXT: v_mov_b32_e32 v0, 0 ; GFX7-NEXT: v_mov_b32_e32 v0, 0
; GFX7-NEXT: v_mov_b32_e32 v1, 0
; GFX7-NEXT: v_or_b32_e32 v2, v3, v2 ; GFX7-NEXT: v_or_b32_e32 v2, v3, v2
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-LABEL: insertelement_v_v2i16_v_s: ; GFX10-LABEL: insertelement_v_v2i16_v_s:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dword v3, v[0:1], off ; GFX10-NEXT: global_load_dword v3, v[0:1], off
; GFX10-NEXT: s_and_b32 s0, s2, 1 ; GFX10-NEXT: s_and_b32 s0, s2, 1
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; GFX10-LABEL: insertelement_v_v2i16_v_v: ; GFX10-LABEL: insertelement_v_v2i16_v_v:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dword v4, v[0:1], off ; GFX10-NEXT: global_load_dword v4, v[0:1], off
; GFX10-NEXT: v_and_b32_e32 v0, 1, v3 ; GFX10-NEXT: v_and_b32_e32 v0, 1, v3
; GFX10-NEXT: s_mov_b32 s0, 0xffff ; GFX10-NEXT: s_mov_b32 s0, 0xffff
; GFX10-NEXT: v_lshlrev_b32_e32 v0, 4, v0 ; GFX10-NEXT: v_lshlrev_b32_e32 v0, 4, v0
; GFX10-NEXT: v_lshlrev_b32_e64 v1, v0, s0 ; GFX10-NEXT: v_lshlrev_b32_e64 v1, v0, s0
; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX10-NEXT: v_xor_b32_e32 v3, -1, v1
; GFX10-NEXT: v_mov_b32_e32 v0, 0 ; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_xor_b32_e32 v3, -1, v1
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_and_or_b32 v2, v4, v3, v2 ; GFX10-NEXT: v_and_or_b32 v2, v4, v3, v2
; GFX10-NEXT: global_store_dword v[0:1], v2, off ; GFX10-NEXT: global_store_dword v[0:1], v2, off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <2 x i16>, <2 x i16> addrspace(1)* %ptr %vec = load <2 x i16>, <2 x i16> addrspace(1)* %ptr
%insert = insertelement <2 x i16> %vec, i16 %val, i32 %idx %insert = insertelement <2 x i16> %vec, i16 %val, i32 %idx
store <2 x i16> %insert, <2 x i16> addrspace(1)* null store <2 x i16> %insert, <2 x i16> addrspace(1)* null
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; GFX10-NEXT: s_and_b32 s3, s3, 1 ; GFX10-NEXT: s_and_b32 s3, s3, 1
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s1, 1 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s1, 1
; GFX10-NEXT: s_mov_b32 s0, 0xffff ; GFX10-NEXT: s_mov_b32 s0, 0xffff
; GFX10-NEXT: s_lshl_b32 s3, s3, 4 ; GFX10-NEXT: s_lshl_b32 s3, s3, 4
; GFX10-NEXT: s_and_b32 s2, s2, s0 ; GFX10-NEXT: s_and_b32 s2, s2, s0
; GFX10-NEXT: s_lshl_b32 s0, s0, s3 ; GFX10-NEXT: s_lshl_b32 s0, s0, s3
; GFX10-NEXT: s_lshl_b32 s2, s2, s3 ; GFX10-NEXT: s_lshl_b32 s2, s2, s3
; GFX10-NEXT: s_not_b32 s0, s0 ; GFX10-NEXT: s_not_b32 s0, s0
; GFX10-NEXT: v_mov_b32_e32 v3, 0
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_cndmask_b32_e32 v2, v0, v1, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v2, v0, v1, vcc_lo
; GFX10-NEXT: v_and_or_b32 v4, v2, s0, s2 ; GFX10-NEXT: v_and_or_b32 v4, v2, s0, s2
; GFX10-NEXT: v_cmp_eq_u32_e64 s0, s1, 0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s0, s1, 0
; GFX10-NEXT: v_mov_b32_e32 v2, 0 ; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: v_mov_b32_e32 v3, 0
; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v4, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v4, s0
; GFX10-NEXT: global_store_dwordx2 v[2:3], v[0:1], off ; GFX10-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <4 x i16>, <4 x i16> addrspace(1 )* %ptr %vec = load <4 x i16>, <4 x i16> addrspace(1 )* %ptr
%insert = insertelement <4 x i16> %vec, i16 %val, i32 %idx %insert = insertelement <4 x i16> %vec, i16 %val, i32 %idx
store <4 x i16> %insert, <4 x i16> addrspace(1)* null store <4 x i16> %insert, <4 x i16> addrspace(1)* null
ret void ret void
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; GFX9-NEXT: s_lshl_b32 s5, s5, s4 ; GFX9-NEXT: s_lshl_b32 s5, s5, s4
; GFX9-NEXT: s_andn2_b32 s3, s3, s5 ; GFX9-NEXT: s_andn2_b32 s3, s3, s5
; GFX9-NEXT: v_mov_b32_e32 v1, s3 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: v_lshl_or_b32 v4, v0, s4, v1 ; GFX9-NEXT: v_lshl_or_b32 v4, v0, s4, v1
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s2, 0 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s2, 0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc
; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s2, 1 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s2, 1
; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_mov_b32_e32 v3, 0 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v4i16_v_s: ; GFX8-LABEL: insertelement_s_v4i16_v_s:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GFX8-NEXT: s_lshr_b32 s2, s4, 1 ; GFX8-NEXT: s_lshr_b32 s2, s4, 1
; GFX8-NEXT: s_cmp_eq_u32 s2, 1 ; GFX8-NEXT: s_cmp_eq_u32 s2, 1
; GFX8-NEXT: s_mov_b32 s5, 0xffff ; GFX8-NEXT: s_mov_b32 s5, 0xffff
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s2, 0 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s2, 0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_cselect_b32 s3, s1, s0 ; GFX8-NEXT: s_cselect_b32 s3, s1, s0
; GFX8-NEXT: s_and_b32 s4, s4, 1 ; GFX8-NEXT: s_and_b32 s4, s4, 1
; GFX8-NEXT: s_lshl_b32 s4, s4, 4 ; GFX8-NEXT: s_lshl_b32 s4, s4, 4
; GFX8-NEXT: v_mov_b32_e32 v1, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s4
; GFX8-NEXT: s_lshl_b32 s4, s5, s4 ; GFX8-NEXT: s_lshl_b32 s4, s5, s4
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX8-NEXT: s_andn2_b32 s3, s3, s4 ; GFX8-NEXT: s_andn2_b32 s3, s3, s4
; GFX8-NEXT: v_or_b32_e32 v4, s3, v0 ; GFX8-NEXT: v_or_b32_e32 v4, s3, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc
; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s2, 1 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s2, 1
; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_mov_b32_e32 v3, 0 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v4i16_v_s: ; GFX7-LABEL: insertelement_s_v4i16_v_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GFX7-NEXT: s_lshr_b32 s2, s4, 1 ; GFX7-NEXT: s_lshr_b32 s2, s4, 1
; GFX7-NEXT: s_cmp_eq_u32 s2, 1 ; GFX7-NEXT: s_cmp_eq_u32 s2, 1
; GFX7-NEXT: s_mov_b32 s5, 0xffff ; GFX7-NEXT: s_mov_b32 s5, 0xffff
; GFX7-NEXT: v_and_b32_e32 v0, s5, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s5, v0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_cselect_b32 s3, s1, s0 ; GFX7-NEXT: s_cselect_b32 s3, s1, s0
; GFX7-NEXT: s_and_b32 s4, s4, 1 ; GFX7-NEXT: s_and_b32 s4, s4, 1
; GFX7-NEXT: s_lshl_b32 s4, s4, 4 ; GFX7-NEXT: s_lshl_b32 s4, s4, 4
; GFX7-NEXT: v_lshlrev_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, s4, v0
; GFX7-NEXT: s_lshl_b32 s4, s5, s4 ; GFX7-NEXT: s_lshl_b32 s4, s5, s4
; GFX7-NEXT: s_andn2_b32 s3, s3, s4 ; GFX7-NEXT: s_andn2_b32 s3, s3, s4
; GFX7-NEXT: v_or_b32_e32 v4, s3, v0 ; GFX7-NEXT: v_or_b32_e32 v4, s3, v0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_cmp_eq_u32_e64 vcc, s2, 0 ; GFX7-NEXT: v_cmp_eq_u32_e64 vcc, s2, 0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc
; GFX7-NEXT: v_mov_b32_e32 v2, 0
; GFX7-NEXT: v_cmp_eq_u32_e64 vcc, s2, 1 ; GFX7-NEXT: v_cmp_eq_u32_e64 vcc, s2, 1
; GFX7-NEXT: v_mov_b32_e32 v2, 0
; GFX7-NEXT: v_mov_b32_e32 v3, 0 ; GFX7-NEXT: v_mov_b32_e32 v3, 0
; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX7-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX7-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-LABEL: insertelement_s_v4i16_v_s: ; GFX10-LABEL: insertelement_s_v4i16_v_s:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GFX10-NEXT: s_lshr_b32 s2, s4, 1 ; GFX10-NEXT: s_lshr_b32 s2, s4, 1
; GFX10-NEXT: s_mov_b32 s5, 0xffff ; GFX10-NEXT: s_mov_b32 s5, 0xffff
; GFX10-NEXT: s_cmp_eq_u32 s2, 1 ; GFX10-NEXT: s_cmp_eq_u32 s2, 1
; GFX10-NEXT: v_and_b32_e32 v2, s5, v0 ; GFX10-NEXT: v_and_b32_e32 v2, s5, v0
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s2, 0 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s2, 0
; GFX10-NEXT: v_mov_b32_e32 v3, 0
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_cselect_b32 s3, s1, s0 ; GFX10-NEXT: s_cselect_b32 s3, s1, s0
; GFX10-NEXT: s_and_b32 s4, s4, 1 ; GFX10-NEXT: s_and_b32 s4, s4, 1
; GFX10-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-NEXT: v_mov_b32_e32 v0, s0
; GFX10-NEXT: s_lshl_b32 s4, s4, 4 ; GFX10-NEXT: s_lshl_b32 s4, s4, 4
; GFX10-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-NEXT: v_mov_b32_e32 v1, s1
; GFX10-NEXT: s_lshl_b32 s5, s5, s4 ; GFX10-NEXT: s_lshl_b32 s5, s5, s4
; GFX10-NEXT: s_andn2_b32 s3, s3, s5 ; GFX10-NEXT: s_andn2_b32 s3, s3, s5
; GFX10-NEXT: v_lshl_or_b32 v4, v2, s4, s3 ; GFX10-NEXT: v_lshl_or_b32 v4, v2, s4, s3
; GFX10-NEXT: v_mov_b32_e32 v2, 0 ; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: v_mov_b32_e32 v3, 0
; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s2, 1 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s2, 1
; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo
; GFX10-NEXT: global_store_dwordx2 v[2:3], v[0:1], off ; GFX10-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <4 x i16>, <4 x i16> addrspace(4)* %ptr %vec = load <4 x i16>, <4 x i16> addrspace(4)* %ptr
%insert = insertelement <4 x i16> %vec, i16 %val, i32 %idx %insert = insertelement <4 x i16> %vec, i16 %val, i32 %idx
store <4 x i16> %insert, <4 x i16> addrspace(1)* null store <4 x i16> %insert, <4 x i16> addrspace(1)* null
Show All 16 Lines
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; GFX9-NEXT: v_lshlrev_b32_e64 v3, v0, s3 ; GFX9-NEXT: v_lshlrev_b32_e64 v3, v0, s3
; GFX9-NEXT: v_lshlrev_b32_e64 v0, v0, s2 ; GFX9-NEXT: v_lshlrev_b32_e64 v0, v0, s2
; GFX9-NEXT: v_xor_b32_e32 v0, -1, v0 ; GFX9-NEXT: v_xor_b32_e32 v0, -1, v0
; GFX9-NEXT: v_and_or_b32 v4, v1, v0, v3 ; GFX9-NEXT: v_and_or_b32 v4, v1, v0, v3
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_mov_b32_e32 v3, 0 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v4i16_s_v: ; GFX8-LABEL: insertelement_s_v4i16_s_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
Show All 10 Lines
; GFX8-NEXT: v_lshlrev_b32_e64 v3, v0, s3 ; GFX8-NEXT: v_lshlrev_b32_e64 v3, v0, s3
; GFX8-NEXT: v_lshlrev_b32_e64 v0, v0, s2 ; GFX8-NEXT: v_lshlrev_b32_e64 v0, v0, s2
; GFX8-NEXT: v_xor_b32_e32 v0, -1, v0 ; GFX8-NEXT: v_xor_b32_e32 v0, -1, v0
; GFX8-NEXT: v_and_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_and_b32_e32 v0, v1, v0
; GFX8-NEXT: v_or_b32_e32 v4, v0, v3 ; GFX8-NEXT: v_or_b32_e32 v4, v0, v3
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1]
; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_mov_b32_e32 v3, 0 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v4i16_s_v: ; GFX7-LABEL: insertelement_s_v4i16_s_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
Show All 10 Lines
; GFX7-NEXT: v_lshl_b32_e32 v3, s3, v0 ; GFX7-NEXT: v_lshl_b32_e32 v3, s3, v0
; GFX7-NEXT: v_lshl_b32_e32 v0, s2, v0 ; GFX7-NEXT: v_lshl_b32_e32 v0, s2, v0
; GFX7-NEXT: v_xor_b32_e32 v0, -1, v0 ; GFX7-NEXT: v_xor_b32_e32 v0, -1, v0
; GFX7-NEXT: v_and_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_and_b32_e32 v0, v1, v0
; GFX7-NEXT: v_or_b32_e32 v4, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v4, v0, v3
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2 ; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
; GFX7-NEXT: v_mov_b32_e32 v2, 0
; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1] ; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1]
; GFX7-NEXT: v_mov_b32_e32 v2, 0
; GFX7-NEXT: v_mov_b32_e32 v3, 0 ; GFX7-NEXT: v_mov_b32_e32 v3, 0
; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX7-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX7-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-LABEL: insertelement_s_v4i16_s_v: ; GFX10-LABEL: insertelement_s_v4i16_s_v:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GFX10-NEXT: v_and_b32_e32 v1, 1, v0 ; GFX10-NEXT: v_and_b32_e32 v1, 1, v0
; GFX10-NEXT: v_lshrrev_b32_e32 v4, 1, v0 ; GFX10-NEXT: v_lshrrev_b32_e32 v4, 1, v0
; GFX10-NEXT: s_mov_b32 s2, 0xffff ; GFX10-NEXT: s_mov_b32 s2, 0xffff
; GFX10-NEXT: s_and_b32 s3, s4, s2 ; GFX10-NEXT: s_and_b32 s3, s4, s2
; GFX10-NEXT: v_lshlrev_b32_e32 v1, 4, v1 ; GFX10-NEXT: v_lshlrev_b32_e32 v1, 4, v1
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v4 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v4
; GFX10-NEXT: v_lshlrev_b32_e64 v2, v1, s2 ; GFX10-NEXT: v_lshlrev_b32_e64 v2, v1, s2
; GFX10-NEXT: v_lshlrev_b32_e64 v3, v1, s3 ; GFX10-NEXT: v_lshlrev_b32_e64 v3, v1, s3
; GFX10-NEXT: v_xor_b32_e32 v2, -1, v2 ; GFX10-NEXT: v_xor_b32_e32 v2, -1, v2
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v0, s1 ; GFX10-NEXT: v_mov_b32_e32 v0, s1
; GFX10-NEXT: v_mov_b32_e32 v1, s1
; GFX10-NEXT: v_cndmask_b32_e32 v5, s0, v0, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v5, s0, v0, vcc_lo
; GFX10-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-NEXT: v_mov_b32_e32 v0, s0
; GFX10-NEXT: v_mov_b32_e32 v1, s1
; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 0, v4 ; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 0, v4
; GFX10-NEXT: v_and_or_b32 v5, v5, v2, v3 ; GFX10-NEXT: v_and_or_b32 v5, v5, v2, v3
; GFX10-NEXT: v_mov_b32_e32 v2, 0 ; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: v_mov_b32_e32 v3, 0 ; GFX10-NEXT: v_mov_b32_e32 v3, 0
; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v5, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v5, s0
; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo
; GFX10-NEXT: global_store_dwordx2 v[2:3], v[0:1], off ; GFX10-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
Show All 18 Lines
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e64 v1, v1, s2 ; GFX9-NEXT: v_lshlrev_b32_e64 v1, v1, s2
; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX9-NEXT: v_and_or_b32 v4, v3, v1, v0 ; GFX9-NEXT: v_and_or_b32 v4, v3, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_mov_b32_e32 v3, 0 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v4i16_v_v: ; GFX8-LABEL: insertelement_s_v4i16_v_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
Show All 9 Lines
; GFX8-NEXT: v_lshlrev_b32_e64 v1, v1, s2 ; GFX8-NEXT: v_lshlrev_b32_e64 v1, v1, s2
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX8-NEXT: v_and_b32_e32 v1, v3, v1 ; GFX8-NEXT: v_and_b32_e32 v1, v3, v1
; GFX8-NEXT: v_or_b32_e32 v4, v1, v0 ; GFX8-NEXT: v_or_b32_e32 v4, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1]
; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_mov_b32_e32 v3, 0 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v4i16_v_v: ; GFX7-LABEL: insertelement_s_v4i16_v_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
Show All 10 Lines
; GFX7-NEXT: v_lshl_b32_e32 v1, s2, v1 ; GFX7-NEXT: v_lshl_b32_e32 v1, s2, v1
; GFX7-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX7-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX7-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX7-NEXT: v_and_b32_e32 v1, v3, v1 ; GFX7-NEXT: v_and_b32_e32 v1, v3, v1
; GFX7-NEXT: v_or_b32_e32 v4, v1, v0 ; GFX7-NEXT: v_or_b32_e32 v4, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2 ; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
; GFX7-NEXT: v_mov_b32_e32 v2, 0
; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1] ; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[0:1]
; GFX7-NEXT: v_mov_b32_e32 v2, 0
; GFX7-NEXT: v_mov_b32_e32 v3, 0 ; GFX7-NEXT: v_mov_b32_e32 v3, 0
; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX7-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX7-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-LABEL: insertelement_s_v4i16_v_v: ; GFX10-LABEL: insertelement_s_v4i16_v_v:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GFX10-NEXT: v_and_b32_e32 v2, 1, v1 ; GFX10-NEXT: v_and_b32_e32 v2, 1, v1
; GFX10-NEXT: v_lshrrev_b32_e32 v4, 1, v1 ; GFX10-NEXT: v_lshrrev_b32_e32 v4, 1, v1
; GFX10-NEXT: s_mov_b32 s2, 0xffff ; GFX10-NEXT: s_mov_b32 s2, 0xffff
; GFX10-NEXT: v_lshlrev_b32_e32 v2, 4, v2 ; GFX10-NEXT: v_lshlrev_b32_e32 v2, 4, v2
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v4 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v4
; GFX10-NEXT: v_lshlrev_b32_e64 v3, v2, s2 ; GFX10-NEXT: v_lshlrev_b32_e64 v3, v2, s2
; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX10-NEXT: v_xor_b32_e32 v3, -1, v3 ; GFX10-NEXT: v_xor_b32_e32 v3, -1, v3
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-NEXT: v_mov_b32_e32 v1, s1
; GFX10-NEXT: v_cndmask_b32_e32 v5, s0, v1, vcc_lo
; GFX10-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-NEXT: v_mov_b32_e32 v0, s0
; GFX10-NEXT: v_cndmask_b32_e32 v5, s0, v1, vcc_lo
; GFX10-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-NEXT: v_mov_b32_e32 v1, s1
; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 0, v4 ; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 0, v4
; GFX10-NEXT: v_and_or_b32 v5, v5, v3, v2 ; GFX10-NEXT: v_and_or_b32 v5, v5, v3, v2
; GFX10-NEXT: v_mov_b32_e32 v2, 0 ; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: v_mov_b32_e32 v3, 0 ; GFX10-NEXT: v_mov_b32_e32 v3, 0
; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v5, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v5, s0
; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo
; GFX10-NEXT: global_store_dwordx2 v[2:3], v[0:1], off ; GFX10-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
Show All 12 Lines
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 1, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 1, v2
; GFX9-NEXT: v_and_b32_e32 v2, 1, v2 ; GFX9-NEXT: v_and_b32_e32 v2, 1, v2
; GFX9-NEXT: s_and_b32 s1, s2, s0 ; GFX9-NEXT: s_and_b32 s1, s2, s0
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 4, v2 ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 4, v2
; GFX9-NEXT: v_lshlrev_b32_e64 v6, v2, s1 ; GFX9-NEXT: v_lshlrev_b32_e64 v6, v2, s1
; GFX9-NEXT: v_lshlrev_b32_e64 v2, v2, s0 ; GFX9-NEXT: v_lshlrev_b32_e64 v2, v2, s0
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v5 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v5
; GFX9-NEXT: v_xor_b32_e32 v2, -1, v2 ; GFX9-NEXT: v_xor_b32_e32 v2, -1, v2
; GFX9-NEXT: v_mov_b32_e32 v3, 0
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v5 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v5
; GFX9-NEXT: v_mov_b32_e32 v3, 0
; GFX9-NEXT: v_mov_b32_e32 v4, 0 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cndmask_b32_e32 v7, v0, v1, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v7, v0, v1, vcc
; GFX9-NEXT: v_and_or_b32 v2, v7, v2, v6 ; GFX9-NEXT: v_and_or_b32 v2, v7, v2, v6
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX9-NEXT: global_store_dwordx2 v[3:4], v[0:1], off ; GFX9-NEXT: global_store_dwordx2 v[3:4], v[0:1], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_v_v4i16_s_v: ; GFX8-LABEL: insertelement_v_v4i16_s_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: s_mov_b32 s0, 0xffff ; GFX8-NEXT: s_mov_b32 s0, 0xffff
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 1, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v5, 1, v2
; GFX8-NEXT: v_and_b32_e32 v2, 1, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 1, v2
; GFX8-NEXT: s_and_b32 s1, s2, s0 ; GFX8-NEXT: s_and_b32 s1, s2, s0
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 4, v2 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 4, v2
; GFX8-NEXT: v_lshlrev_b32_e64 v6, v2, s1 ; GFX8-NEXT: v_lshlrev_b32_e64 v6, v2, s1
; GFX8-NEXT: v_lshlrev_b32_e64 v2, v2, s0 ; GFX8-NEXT: v_lshlrev_b32_e64 v2, v2, s0
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v5 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v5
; GFX8-NEXT: v_xor_b32_e32 v2, -1, v2 ; GFX8-NEXT: v_xor_b32_e32 v2, -1, v2
; GFX8-NEXT: v_mov_b32_e32 v3, 0
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v5 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v5
; GFX8-NEXT: v_mov_b32_e32 v3, 0
; GFX8-NEXT: v_mov_b32_e32 v4, 0 ; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_cndmask_b32_e32 v7, v0, v1, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v7, v0, v1, vcc
; GFX8-NEXT: v_and_b32_e32 v2, v7, v2 ; GFX8-NEXT: v_and_b32_e32 v2, v7, v2
; GFX8-NEXT: v_or_b32_e32 v2, v2, v6 ; GFX8-NEXT: v_or_b32_e32 v2, v2, v6
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX8-NEXT: flat_store_dwordx2 v[3:4], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[3:4], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v4i16_s_v: ; GFX7-LABEL: insertelement_v_v4i16_s_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX7-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX7-NEXT: s_mov_b32 s0, 0xffff ; GFX7-NEXT: s_mov_b32 s0, 0xffff
; GFX7-NEXT: v_lshrrev_b32_e32 v5, 1, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 1, v2
; GFX7-NEXT: v_and_b32_e32 v2, 1, v2 ; GFX7-NEXT: v_and_b32_e32 v2, 1, v2
; GFX7-NEXT: s_and_b32 s1, s2, s0 ; GFX7-NEXT: s_and_b32 s1, s2, s0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 4, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 4, v2
; GFX7-NEXT: v_lshl_b32_e32 v6, s1, v2 ; GFX7-NEXT: v_lshl_b32_e32 v6, s1, v2
; GFX7-NEXT: v_lshl_b32_e32 v2, s0, v2 ; GFX7-NEXT: v_lshl_b32_e32 v2, s0, v2
; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v5 ; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v5
; GFX7-NEXT: v_xor_b32_e32 v2, -1, v2 ; GFX7-NEXT: v_xor_b32_e32 v2, -1, v2
; GFX7-NEXT: v_mov_b32_e32 v3, 0
; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v5 ; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v5
; GFX7-NEXT: v_mov_b32_e32 v3, 0
; GFX7-NEXT: v_mov_b32_e32 v4, 0 ; GFX7-NEXT: v_mov_b32_e32 v4, 0
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_cndmask_b32_e32 v7, v0, v1, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v7, v0, v1, vcc
; GFX7-NEXT: v_and_b32_e32 v2, v7, v2 ; GFX7-NEXT: v_and_b32_e32 v2, v7, v2
; GFX7-NEXT: v_or_b32_e32 v2, v2, v6 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v6
; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX7-NEXT: flat_store_dwordx2 v[3:4], v[0:1] ; GFX7-NEXT: flat_store_dwordx2 v[3:4], v[0:1]
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; GFX9-NEXT: v_lshrrev_b32_e32 v6, 1, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 1, v3
; GFX9-NEXT: v_and_b32_e32 v3, 1, v3 ; GFX9-NEXT: v_and_b32_e32 v3, 1, v3
; GFX9-NEXT: s_mov_b32 s0, 0xffff ; GFX9-NEXT: s_mov_b32 s0, 0xffff
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 4, v3 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 4, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e64 v3, v3, s0 ; GFX9-NEXT: v_lshlrev_b32_e64 v3, v3, s0
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6
; GFX9-NEXT: v_xor_b32_e32 v3, -1, v3 ; GFX9-NEXT: v_xor_b32_e32 v3, -1, v3
; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v6 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v6
; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cndmask_b32_e32 v7, v0, v1, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v7, v0, v1, vcc
; GFX9-NEXT: v_and_or_b32 v2, v7, v3, v2 ; GFX9-NEXT: v_and_or_b32 v2, v7, v3, v2
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX9-NEXT: global_store_dwordx2 v[4:5], v[0:1], off ; GFX9-NEXT: global_store_dwordx2 v[4:5], v[0:1], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_v_v4i16_v_v: ; GFX8-LABEL: insertelement_v_v4i16_v_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 1, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 1, v3
; GFX8-NEXT: v_and_b32_e32 v3, 1, v3 ; GFX8-NEXT: v_and_b32_e32 v3, 1, v3
; GFX8-NEXT: s_mov_b32 s0, 0xffff ; GFX8-NEXT: s_mov_b32 s0, 0xffff
; GFX8-NEXT: v_lshlrev_b32_e32 v3, 4, v3 ; GFX8-NEXT: v_lshlrev_b32_e32 v3, 4, v3
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX8-NEXT: v_lshlrev_b32_e64 v3, v3, s0 ; GFX8-NEXT: v_lshlrev_b32_e64 v3, v3, s0
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6
; GFX8-NEXT: v_xor_b32_e32 v3, -1, v3 ; GFX8-NEXT: v_xor_b32_e32 v3, -1, v3
; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v6 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v6
; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_cndmask_b32_e32 v7, v0, v1, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v7, v0, v1, vcc
; GFX8-NEXT: v_and_b32_e32 v3, v7, v3 ; GFX8-NEXT: v_and_b32_e32 v3, v7, v3
; GFX8-NEXT: v_or_b32_e32 v2, v3, v2 ; GFX8-NEXT: v_or_b32_e32 v2, v3, v2
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX8-NEXT: flat_store_dwordx2 v[4:5], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[4:5], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v4i16_v_v: ; GFX7-LABEL: insertelement_v_v4i16_v_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX7-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX7-NEXT: s_mov_b32 s0, 0xffff ; GFX7-NEXT: s_mov_b32 s0, 0xffff
; GFX7-NEXT: v_lshrrev_b32_e32 v6, 1, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 1, v3
; GFX7-NEXT: v_and_b32_e32 v3, 1, v3 ; GFX7-NEXT: v_and_b32_e32 v3, 1, v3
; GFX7-NEXT: v_and_b32_e32 v2, s0, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 4, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 4, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v2, v3, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, v3, v2
; GFX7-NEXT: v_lshl_b32_e32 v3, s0, v3 ; GFX7-NEXT: v_lshl_b32_e32 v3, s0, v3
; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6 ; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6
; GFX7-NEXT: v_xor_b32_e32 v3, -1, v3 ; GFX7-NEXT: v_xor_b32_e32 v3, -1, v3
; GFX7-NEXT: v_mov_b32_e32 v4, 0
; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v6 ; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v6
; GFX7-NEXT: v_mov_b32_e32 v4, 0
; GFX7-NEXT: v_mov_b32_e32 v5, 0 ; GFX7-NEXT: v_mov_b32_e32 v5, 0
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_cndmask_b32_e32 v7, v0, v1, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v7, v0, v1, vcc
; GFX7-NEXT: v_and_b32_e32 v3, v7, v3 ; GFX7-NEXT: v_and_b32_e32 v3, v7, v3
; GFX7-NEXT: v_or_b32_e32 v2, v3, v2 ; GFX7-NEXT: v_or_b32_e32 v2, v3, v2
; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX7-NEXT: flat_store_dwordx2 v[4:5], v[0:1] ; GFX7-NEXT: flat_store_dwordx2 v[4:5], v[0:1]
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; GFX9-NEXT: s_cmp_eq_u32 s6, 0 ; GFX9-NEXT: s_cmp_eq_u32 s6, 0
; GFX9-NEXT: s_cselect_b32 s0, s4, s0 ; GFX9-NEXT: s_cselect_b32 s0, s4, s0
; GFX9-NEXT: s_cmp_eq_u32 s6, 1 ; GFX9-NEXT: s_cmp_eq_u32 s6, 1
; GFX9-NEXT: s_cselect_b32 s1, s4, s1 ; GFX9-NEXT: s_cselect_b32 s1, s4, s1
; GFX9-NEXT: s_cmp_eq_u32 s6, 2 ; GFX9-NEXT: s_cmp_eq_u32 s6, 2
; GFX9-NEXT: s_cselect_b32 s2, s4, s2 ; GFX9-NEXT: s_cselect_b32 s2, s4, s2
; GFX9-NEXT: s_cmp_eq_u32 s6, 3 ; GFX9-NEXT: s_cmp_eq_u32 s6, 3
; GFX9-NEXT: s_cselect_b32 s3, s4, s3 ; GFX9-NEXT: s_cselect_b32 s3, s4, s3
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_mov_b32_e32 v2, s2 ; GFX9-NEXT: v_mov_b32_e32 v2, s2
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v8i16_s_s: ; GFX8-LABEL: insertelement_s_v8i16_s_s:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
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; GFX8-NEXT: s_cmp_eq_u32 s6, 0 ; GFX8-NEXT: s_cmp_eq_u32 s6, 0
; GFX8-NEXT: s_cselect_b32 s0, s4, s0 ; GFX8-NEXT: s_cselect_b32 s0, s4, s0
; GFX8-NEXT: s_cmp_eq_u32 s6, 1 ; GFX8-NEXT: s_cmp_eq_u32 s6, 1
; GFX8-NEXT: s_cselect_b32 s1, s4, s1 ; GFX8-NEXT: s_cselect_b32 s1, s4, s1
; GFX8-NEXT: s_cmp_eq_u32 s6, 2 ; GFX8-NEXT: s_cmp_eq_u32 s6, 2
; GFX8-NEXT: s_cselect_b32 s2, s4, s2 ; GFX8-NEXT: s_cselect_b32 s2, s4, s2
; GFX8-NEXT: s_cmp_eq_u32 s6, 3 ; GFX8-NEXT: s_cmp_eq_u32 s6, 3
; GFX8-NEXT: s_cselect_b32 s3, s4, s3 ; GFX8-NEXT: s_cselect_b32 s3, s4, s3
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_mov_b32_e32 v2, s2 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
; GFX8-NEXT: v_mov_b32_e32 v3, s3 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v8i16_s_s: ; GFX7-LABEL: insertelement_s_v8i16_s_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
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; GFX7-NEXT: s_cmp_eq_u32 s6, 0 ; GFX7-NEXT: s_cmp_eq_u32 s6, 0
; GFX7-NEXT: s_cselect_b32 s0, s4, s0 ; GFX7-NEXT: s_cselect_b32 s0, s4, s0
; GFX7-NEXT: s_cmp_eq_u32 s6, 1 ; GFX7-NEXT: s_cmp_eq_u32 s6, 1
; GFX7-NEXT: s_cselect_b32 s1, s4, s1 ; GFX7-NEXT: s_cselect_b32 s1, s4, s1
; GFX7-NEXT: s_cmp_eq_u32 s6, 2 ; GFX7-NEXT: s_cmp_eq_u32 s6, 2
; GFX7-NEXT: s_cselect_b32 s2, s4, s2 ; GFX7-NEXT: s_cselect_b32 s2, s4, s2
; GFX7-NEXT: s_cmp_eq_u32 s6, 3 ; GFX7-NEXT: s_cmp_eq_u32 s6, 3
; GFX7-NEXT: s_cselect_b32 s3, s4, s3 ; GFX7-NEXT: s_cselect_b32 s3, s4, s3
; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2 ; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_mov_b32 s6, -1 ; GFX7-NEXT: s_mov_b32 s6, -1
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0 ; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX10-NEXT: s_lshl_b32 s5, s5, 4 ; GFX10-NEXT: s_lshl_b32 s5, s5, 4
; GFX10-NEXT: s_lshl_b32 s8, s8, s5 ; GFX10-NEXT: s_lshl_b32 s8, s8, s5
; GFX10-NEXT: s_lshl_b32 s4, s4, s5 ; GFX10-NEXT: s_lshl_b32 s4, s4, s5
; GFX10-NEXT: s_andn2_b32 s5, s7, s8 ; GFX10-NEXT: s_andn2_b32 s5, s7, s8
; GFX10-NEXT: s_or_b32 s4, s5, s4 ; GFX10-NEXT: s_or_b32 s4, s5, s4
; GFX10-NEXT: s_cmp_eq_u32 s6, 0 ; GFX10-NEXT: s_cmp_eq_u32 s6, 0
; GFX10-NEXT: s_cselect_b32 s0, s4, s0 ; GFX10-NEXT: s_cselect_b32 s0, s4, s0
; GFX10-NEXT: s_cmp_eq_u32 s6, 1 ; GFX10-NEXT: s_cmp_eq_u32 s6, 1
; GFX10-NEXT: v_mov_b32_e32 v0, s0
; GFX10-NEXT: s_cselect_b32 s1, s4, s1 ; GFX10-NEXT: s_cselect_b32 s1, s4, s1
; GFX10-NEXT: s_cmp_eq_u32 s6, 2 ; GFX10-NEXT: s_cmp_eq_u32 s6, 2
; GFX10-NEXT: v_mov_b32_e32 v1, s1
; GFX10-NEXT: s_cselect_b32 s2, s4, s2 ; GFX10-NEXT: s_cselect_b32 s2, s4, s2
; GFX10-NEXT: s_cmp_eq_u32 s6, 3 ; GFX10-NEXT: s_cmp_eq_u32 s6, 3
; GFX10-NEXT: s_cselect_b32 s3, s4, s3
; GFX10-NEXT: v_mov_b32_e32 v0, s0
; GFX10-NEXT: v_mov_b32_e32 v1, s1
; GFX10-NEXT: v_mov_b32_e32 v2, s2 ; GFX10-NEXT: v_mov_b32_e32 v2, s2
; GFX10-NEXT: s_cselect_b32 s3, s4, s3
; GFX10-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-NEXT: v_mov_b32_e32 v3, s3
; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <8 x i16>, <8 x i16> addrspace(4)* %ptr %vec = load <8 x i16>, <8 x i16> addrspace(4)* %ptr
%insert = insertelement <8 x i16> %vec, i16 %val, i32 %idx %insert = insertelement <8 x i16> %vec, i16 %val, i32 %idx
store <8 x i16> %insert, <8 x i16> addrspace(1)* null store <8 x i16> %insert, <8 x i16> addrspace(1)* null
ret void ret void
} }
▲ Show 20 Lines • Show All 96 Lines • ▼ Show 20 Lines
; GFX10-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX10-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX10-NEXT: s_lshr_b32 s4, s3, 1 ; GFX10-NEXT: s_lshr_b32 s4, s3, 1
; GFX10-NEXT: s_and_b32 s1, s3, 1 ; GFX10-NEXT: s_and_b32 s1, s3, 1
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s4, 1 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s4, 1
; GFX10-NEXT: v_cmp_eq_u32_e64 s0, s4, 2 ; GFX10-NEXT: v_cmp_eq_u32_e64 s0, s4, 2
; GFX10-NEXT: s_lshl_b32 s3, s1, 4 ; GFX10-NEXT: s_lshl_b32 s3, s1, 4
; GFX10-NEXT: v_cmp_eq_u32_e64 s1, s4, 3 ; GFX10-NEXT: v_cmp_eq_u32_e64 s1, s4, 3
; GFX10-NEXT: s_mov_b32 s5, 0xffff ; GFX10-NEXT: s_mov_b32 s5, 0xffff
; GFX10-NEXT: v_mov_b32_e32 v5, 0
; GFX10-NEXT: s_and_b32 s2, s2, s5 ; GFX10-NEXT: s_and_b32 s2, s2, s5
; GFX10-NEXT: s_lshl_b32 s5, s5, s3 ; GFX10-NEXT: s_lshl_b32 s5, s5, s3
; GFX10-NEXT: s_lshl_b32 s2, s2, s3 ; GFX10-NEXT: s_lshl_b32 s2, s2, s3
; GFX10-NEXT: s_not_b32 s3, s5 ; GFX10-NEXT: s_not_b32 s3, s5
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v4, v4, v2, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v4, v4, v2, s0
; GFX10-NEXT: v_cndmask_b32_e64 v4, v4, v3, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v4, v4, v3, s1
; GFX10-NEXT: v_and_or_b32 v6, v4, s3, s2 ; GFX10-NEXT: v_and_or_b32 v6, v4, s3, s2
; GFX10-NEXT: v_cmp_eq_u32_e64 s2, s4, 0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s2, s4, 0
; GFX10-NEXT: v_mov_b32_e32 v4, 0 ; GFX10-NEXT: v_mov_b32_e32 v4, 0
; GFX10-NEXT: v_mov_b32_e32 v5, 0
; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v6, s2 ; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v6, s2
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v6, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v6, s0
; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v6, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v6, s1
; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <8 x i16>, <8 x i16> addrspace(1 )* %ptr %vec = load <8 x i16>, <8 x i16> addrspace(1 )* %ptr
%insert = insertelement <8 x i16> %vec, i16 %val, i32 %idx %insert = insertelement <8 x i16> %vec, i16 %val, i32 %idx
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; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s5, 1 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s5, 1
; GFX9-NEXT: v_mov_b32_e32 v2, s2 ; GFX9-NEXT: v_mov_b32_e32 v2, s2
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s5, 2 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s5, 2
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc
; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s5, 3 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s5, 3
; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc
; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v8i16_v_s: ; GFX8-LABEL: insertelement_s_v8i16_v_s:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0
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; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s5, 1 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s5, 1
; GFX8-NEXT: v_mov_b32_e32 v2, s2 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s5, 2 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s5, 2
; GFX8-NEXT: v_mov_b32_e32 v3, s3 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc
; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s5, 3 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s5, 3
; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v8i16_v_s: ; GFX7-LABEL: insertelement_s_v8i16_v_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0 ; GFX7-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0
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; GFX10-LABEL: insertelement_s_v8i16_v_s: ; GFX10-LABEL: insertelement_s_v8i16_v_s:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0 ; GFX10-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0
; GFX10-NEXT: s_lshr_b32 s5, s4, 1 ; GFX10-NEXT: s_lshr_b32 s5, s4, 1
; GFX10-NEXT: s_mov_b32 s7, 0xffff ; GFX10-NEXT: s_mov_b32 s7, 0xffff
; GFX10-NEXT: s_cmp_eq_u32 s5, 1 ; GFX10-NEXT: s_cmp_eq_u32 s5, 1
; GFX10-NEXT: v_and_b32_e32 v4, s7, v0 ; GFX10-NEXT: v_and_b32_e32 v4, s7, v0
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s5, 0 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s5, 0
; GFX10-NEXT: v_mov_b32_e32 v5, 0
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_cselect_b32 s6, s1, s0 ; GFX10-NEXT: s_cselect_b32 s6, s1, s0
; GFX10-NEXT: s_cmp_eq_u32 s5, 2 ; GFX10-NEXT: s_cmp_eq_u32 s5, 2
; GFX10-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-NEXT: v_mov_b32_e32 v0, s0
; GFX10-NEXT: s_cselect_b32 s6, s2, s6 ; GFX10-NEXT: s_cselect_b32 s6, s2, s6
; GFX10-NEXT: s_cmp_eq_u32 s5, 3 ; GFX10-NEXT: s_cmp_eq_u32 s5, 3
; GFX10-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-NEXT: v_mov_b32_e32 v1, s1
; GFX10-NEXT: s_cselect_b32 s6, s3, s6 ; GFX10-NEXT: s_cselect_b32 s6, s3, s6
; GFX10-NEXT: s_and_b32 s4, s4, 1 ; GFX10-NEXT: s_and_b32 s4, s4, 1
; GFX10-NEXT: v_mov_b32_e32 v2, s2 ; GFX10-NEXT: v_mov_b32_e32 v2, s2
; GFX10-NEXT: s_lshl_b32 s4, s4, 4 ; GFX10-NEXT: s_lshl_b32 s4, s4, 4
; GFX10-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-NEXT: v_mov_b32_e32 v3, s3
; GFX10-NEXT: s_lshl_b32 s7, s7, s4 ; GFX10-NEXT: s_lshl_b32 s7, s7, s4
; GFX10-NEXT: s_andn2_b32 s6, s6, s7 ; GFX10-NEXT: s_andn2_b32 s6, s6, s7
; GFX10-NEXT: v_lshl_or_b32 v6, v4, s4, s6 ; GFX10-NEXT: v_lshl_or_b32 v6, v4, s4, s6
; GFX10-NEXT: v_mov_b32_e32 v4, 0 ; GFX10-NEXT: v_mov_b32_e32 v4, 0
; GFX10-NEXT: v_mov_b32_e32 v5, 0
; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc_lo
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s5, 1 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s5, 1
; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc_lo
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s5, 2 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s5, 2
; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc_lo
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s5, 3 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s5, 3
; GFX10-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v3, v3, v6, vcc_lo
; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
Show All 28 Lines
; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v5, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v5, s[2:3]
; GFX9-NEXT: v_xor_b32_e32 v0, -1, v0 ; GFX9-NEXT: v_xor_b32_e32 v0, -1, v0
; GFX9-NEXT: v_and_or_b32 v6, v1, v0, v2 ; GFX9-NEXT: v_and_or_b32 v6, v1, v0, v2
; GFX9-NEXT: v_mov_b32_e32 v0, s8 ; GFX9-NEXT: v_mov_b32_e32 v0, s8
; GFX9-NEXT: v_mov_b32_e32 v1, s9 ; GFX9-NEXT: v_mov_b32_e32 v1, s9
; GFX9-NEXT: v_mov_b32_e32 v2, s10 ; GFX9-NEXT: v_mov_b32_e32 v2, s10
; GFX9-NEXT: v_mov_b32_e32 v3, s11 ; GFX9-NEXT: v_mov_b32_e32 v3, s11
; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4
; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v6, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v6, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[2:3]
; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v8i16_s_v: ; GFX8-LABEL: insertelement_s_v8i16_s_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx4 s[8:11], s[2:3], 0x0 ; GFX8-NEXT: s_load_dwordx4 s[8:11], s[2:3], 0x0
Show All 18 Lines
; GFX8-NEXT: v_xor_b32_e32 v0, -1, v0 ; GFX8-NEXT: v_xor_b32_e32 v0, -1, v0
; GFX8-NEXT: v_and_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_and_b32_e32 v0, v1, v0
; GFX8-NEXT: v_or_b32_e32 v6, v0, v2 ; GFX8-NEXT: v_or_b32_e32 v6, v0, v2
; GFX8-NEXT: v_mov_b32_e32 v0, s8 ; GFX8-NEXT: v_mov_b32_e32 v0, s8
; GFX8-NEXT: v_mov_b32_e32 v1, s9 ; GFX8-NEXT: v_mov_b32_e32 v1, s9
; GFX8-NEXT: v_mov_b32_e32 v2, s10 ; GFX8-NEXT: v_mov_b32_e32 v2, s10
; GFX8-NEXT: v_mov_b32_e32 v3, s11 ; GFX8-NEXT: v_mov_b32_e32 v3, s11
; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4
; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v6, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v6, s[4:5]
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[0:1]
; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[2:3]
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v8i16_s_v: ; GFX7-LABEL: insertelement_s_v8i16_s_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dwordx4 s[8:11], s[2:3], 0x0 ; GFX7-NEXT: s_load_dwordx4 s[8:11], s[2:3], 0x0
▲ Show 20 Lines • Show All 45 Lines • ▼ Show 20 Lines
; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 0, v6 ; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 0, v6
; GFX10-NEXT: v_lshlrev_b32_e64 v2, v1, s0 ; GFX10-NEXT: v_lshlrev_b32_e64 v2, v1, s0
; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v6 ; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v6
; GFX10-NEXT: v_lshlrev_b32_e64 v4, v1, s1 ; GFX10-NEXT: v_lshlrev_b32_e64 v4, v1, s1
; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v6 ; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v6
; GFX10-NEXT: v_xor_b32_e32 v5, -1, v2 ; GFX10-NEXT: v_xor_b32_e32 v5, -1, v2
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v0, s9 ; GFX10-NEXT: v_mov_b32_e32 v0, s9
; GFX10-NEXT: v_mov_b32_e32 v1, s9
; GFX10-NEXT: v_mov_b32_e32 v2, s10
; GFX10-NEXT: v_mov_b32_e32 v3, s11
; GFX10-NEXT: v_cndmask_b32_e32 v0, s8, v0, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v0, s8, v0, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, s10, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, s10, s0
; GFX10-NEXT: v_cndmask_b32_e64 v7, v0, s11, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v7, v0, s11, s1
; GFX10-NEXT: v_mov_b32_e32 v0, s8 ; GFX10-NEXT: v_mov_b32_e32 v0, s8
; GFX10-NEXT: v_mov_b32_e32 v1, s9
; GFX10-NEXT: v_mov_b32_e32 v2, s10
; GFX10-NEXT: v_mov_b32_e32 v3, s11
; GFX10-NEXT: v_and_or_b32 v7, v7, v5, v4 ; GFX10-NEXT: v_and_or_b32 v7, v7, v5, v4
; GFX10-NEXT: v_mov_b32_e32 v4, 0 ; GFX10-NEXT: v_mov_b32_e32 v4, 0
; GFX10-NEXT: v_mov_b32_e32 v5, 0 ; GFX10-NEXT: v_mov_b32_e32 v5, 0
; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v7, s2 ; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v7, s2
; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v7, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v7, s0
; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v7, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v7, s1
; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
Show All 27 Lines
; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[2:3]
; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX9-NEXT: v_and_or_b32 v6, v2, v1, v0 ; GFX9-NEXT: v_and_or_b32 v6, v2, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v0, s4 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NEXT: v_mov_b32_e32 v1, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NEXT: v_mov_b32_e32 v2, s6 ; GFX9-NEXT: v_mov_b32_e32 v2, s6
; GFX9-NEXT: v_mov_b32_e32 v3, s7 ; GFX9-NEXT: v_mov_b32_e32 v3, s7
; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4
; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v6, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v6, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[0:1]
; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[2:3]
; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v8i16_v_v: ; GFX8-LABEL: insertelement_s_v8i16_v_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
Show All 17 Lines
; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX8-NEXT: v_and_b32_e32 v1, v2, v1 ; GFX8-NEXT: v_and_b32_e32 v1, v2, v1
; GFX8-NEXT: v_or_b32_e32 v6, v1, v0 ; GFX8-NEXT: v_or_b32_e32 v6, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v1, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: v_mov_b32_e32 v2, s6 ; GFX8-NEXT: v_mov_b32_e32 v2, s6
; GFX8-NEXT: v_mov_b32_e32 v3, s7 ; GFX8-NEXT: v_mov_b32_e32 v3, s7
; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4
; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v6, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v6, s[4:5]
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[0:1]
; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[2:3]
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v8i16_v_v: ; GFX7-LABEL: insertelement_s_v8i16_v_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v6 ; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v6
; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 0, v6 ; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 0, v6
; GFX10-NEXT: v_lshlrev_b32_e64 v3, v2, s0 ; GFX10-NEXT: v_lshlrev_b32_e64 v3, v2, s0
; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v6 ; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v6
; GFX10-NEXT: v_lshlrev_b32_sdwa v4, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; GFX10-NEXT: v_lshlrev_b32_sdwa v4, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX10-NEXT: v_xor_b32_e32 v5, -1, v3 ; GFX10-NEXT: v_xor_b32_e32 v5, -1, v3
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-NEXT: v_mov_b32_e32 v1, s5
; GFX10-NEXT: v_mov_b32_e32 v0, s4
; GFX10-NEXT: v_mov_b32_e32 v2, s6
; GFX10-NEXT: v_mov_b32_e32 v3, s7
; GFX10-NEXT: v_cndmask_b32_e32 v1, s4, v1, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, s4, v1, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s6, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s6, s0
; GFX10-NEXT: v_cndmask_b32_e64 v7, v1, s7, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v7, v1, s7, s1
; GFX10-NEXT: v_mov_b32_e32 v0, s4
; GFX10-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-NEXT: v_mov_b32_e32 v1, s5
; GFX10-NEXT: v_mov_b32_e32 v2, s6
; GFX10-NEXT: v_mov_b32_e32 v3, s7
; GFX10-NEXT: v_and_or_b32 v7, v7, v5, v4 ; GFX10-NEXT: v_and_or_b32 v7, v7, v5, v4
; GFX10-NEXT: v_mov_b32_e32 v4, 0 ; GFX10-NEXT: v_mov_b32_e32 v4, 0
; GFX10-NEXT: v_mov_b32_e32 v5, 0 ; GFX10-NEXT: v_mov_b32_e32 v5, 0
; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v7, s2 ; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v7, s2
; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v7, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v7, s0
; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v7, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v7, s1
; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
Show All 14 Lines
; GFX9-NEXT: s_and_b32 s1, s2, s0 ; GFX9-NEXT: s_and_b32 s1, s2, s0
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 4, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 4, v1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0
; GFX9-NEXT: v_lshlrev_b32_e64 v2, v1, s1 ; GFX9-NEXT: v_lshlrev_b32_e64 v2, v1, s1
; GFX9-NEXT: v_lshlrev_b32_e64 v1, v1, s0 ; GFX9-NEXT: v_lshlrev_b32_e64 v1, v1, s0
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v0 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v0
; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v0 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v0
; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX9-NEXT: v_mov_b32_e32 v7, 0
; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v0 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v0
; GFX9-NEXT: v_mov_b32_e32 v7, 0
; GFX9-NEXT: v_mov_b32_e32 v8, 0 ; GFX9-NEXT: v_mov_b32_e32 v8, 0
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cndmask_b32_e32 v9, v3, v4, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v9, v3, v4, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v9, v9, v5, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v9, v9, v5, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v9, v9, v6, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v9, v9, v6, s[2:3]
; GFX9-NEXT: v_and_or_b32 v9, v9, v1, v2 ; GFX9-NEXT: v_and_or_b32 v9, v9, v1, v2
; GFX9-NEXT: v_cndmask_b32_e64 v0, v3, v9, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v3, v9, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v9, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v9, vcc
Show All 11 Lines
; GFX8-NEXT: s_and_b32 s1, s2, s0 ; GFX8-NEXT: s_and_b32 s1, s2, s0
; GFX8-NEXT: v_lshlrev_b32_e32 v1, 4, v1 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 4, v1
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0
; GFX8-NEXT: v_lshlrev_b32_e64 v2, v1, s1 ; GFX8-NEXT: v_lshlrev_b32_e64 v2, v1, s1
; GFX8-NEXT: v_lshlrev_b32_e64 v1, v1, s0 ; GFX8-NEXT: v_lshlrev_b32_e64 v1, v1, s0
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v0 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v0
; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v0 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v0
; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX8-NEXT: v_mov_b32_e32 v7, 0
; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v0 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v0
; GFX8-NEXT: v_mov_b32_e32 v7, 0
; GFX8-NEXT: v_mov_b32_e32 v8, 0 ; GFX8-NEXT: v_mov_b32_e32 v8, 0
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_cndmask_b32_e32 v9, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v9, v3, v4, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v9, v9, v5, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v9, v9, v5, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v9, v9, v6, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v9, v9, v6, s[2:3]
; GFX8-NEXT: v_and_b32_e32 v1, v9, v1 ; GFX8-NEXT: v_and_b32_e32 v1, v9, v1
; GFX8-NEXT: v_or_b32_e32 v9, v1, v2 ; GFX8-NEXT: v_or_b32_e32 v9, v1, v2
; GFX8-NEXT: v_cndmask_b32_e64 v0, v3, v9, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v3, v9, s[4:5]
Show All 36 Lines
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-LABEL: insertelement_v_v8i16_s_v: ; GFX10-LABEL: insertelement_v_v8i16_s_v:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx4 v[3:6], v[0:1], off ; GFX10-NEXT: global_load_dwordx4 v[3:6], v[0:1], off
; GFX10-NEXT: v_and_b32_e32 v0, 1, v2 ; GFX10-NEXT: v_and_b32_e32 v0, 1, v2
; GFX10-NEXT: v_lshrrev_b32_e32 v1, 1, v2 ; GFX10-NEXT: v_lshrrev_b32_e32 v1, 1, v2
; GFX10-NEXT: s_mov_b32 s0, 0xffff ; GFX10-NEXT: s_mov_b32 s0, 0xffff
; GFX10-NEXT: v_mov_b32_e32 v8, 0
; GFX10-NEXT: s_and_b32 s1, s2, s0 ; GFX10-NEXT: s_and_b32 s1, s2, s0
; GFX10-NEXT: v_lshlrev_b32_e32 v0, 4, v0 ; GFX10-NEXT: v_lshlrev_b32_e32 v0, 4, v0
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1
; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 0, v1 ; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 0, v1
; GFX10-NEXT: v_lshlrev_b32_e64 v7, v0, s0 ; GFX10-NEXT: v_lshlrev_b32_e64 v7, v0, s0
; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v1 ; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v1
; GFX10-NEXT: v_lshlrev_b32_e64 v0, v0, s1 ; GFX10-NEXT: v_lshlrev_b32_e64 v0, v0, s1
; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v1 ; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v1
; GFX10-NEXT: v_xor_b32_e32 v7, -1, v7 ; GFX10-NEXT: v_xor_b32_e32 v7, -1, v7
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v2, v3, v4, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v5, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v5, s0
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v6, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v6, s1
; GFX10-NEXT: v_and_or_b32 v9, v2, v7, v0 ; GFX10-NEXT: v_and_or_b32 v9, v2, v7, v0
; GFX10-NEXT: v_mov_b32_e32 v7, 0 ; GFX10-NEXT: v_mov_b32_e32 v7, 0
; GFX10-NEXT: v_mov_b32_e32 v8, 0
; GFX10-NEXT: v_cndmask_b32_e64 v0, v3, v9, s2 ; GFX10-NEXT: v_cndmask_b32_e64 v0, v3, v9, s2
; GFX10-NEXT: v_cndmask_b32_e32 v1, v4, v9, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v4, v9, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v2, v5, v9, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v5, v9, s0
; GFX10-NEXT: v_cndmask_b32_e64 v3, v6, v9, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v3, v6, v9, s1
; GFX10-NEXT: global_store_dwordx4 v[7:8], v[0:3], off ; GFX10-NEXT: global_store_dwordx4 v[7:8], v[0:3], off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <8 x i16>, <8 x i16> addrspace(1)* %ptr %vec = load <8 x i16>, <8 x i16> addrspace(1)* %ptr
%insert = insertelement <8 x i16> %vec, i16 %val, i32 %idx %insert = insertelement <8 x i16> %vec, i16 %val, i32 %idx
▲ Show 20 Lines • Show All 134 Lines • ▼ Show 20 Lines
; GFX9-NEXT: s_mov_b32 s0, 0xffff ; GFX9-NEXT: s_mov_b32 s0, 0xffff
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 4, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 4, v1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_e64 v1, v1, s0 ; GFX9-NEXT: v_lshlrev_b32_e64 v1, v1, s0
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v0 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v0
; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v0 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v0
; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX9-NEXT: v_mov_b32_e32 v8, 0
; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v0 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v0
; GFX9-NEXT: v_mov_b32_e32 v8, 0
; GFX9-NEXT: v_mov_b32_e32 v9, 0 ; GFX9-NEXT: v_mov_b32_e32 v9, 0
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v7, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v7, s[2:3]
; GFX9-NEXT: v_and_or_b32 v3, v3, v1, v2 ; GFX9-NEXT: v_and_or_b32 v3, v3, v1, v2
; GFX9-NEXT: v_cndmask_b32_e64 v0, v4, v3, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v4, v3, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v3, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v3, vcc
Show All 10 Lines
; GFX8-NEXT: s_mov_b32 s0, 0xffff ; GFX8-NEXT: s_mov_b32 s0, 0xffff
; GFX8-NEXT: v_lshlrev_b32_e32 v1, 4, v1 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 4, v1
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX8-NEXT: v_lshlrev_b32_e64 v1, v1, s0 ; GFX8-NEXT: v_lshlrev_b32_e64 v1, v1, s0
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v0 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v0
; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v0 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v0
; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX8-NEXT: v_mov_b32_e32 v8, 0
; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v0 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v0
; GFX8-NEXT: v_mov_b32_e32 v8, 0
; GFX8-NEXT: v_mov_b32_e32 v9, 0 ; GFX8-NEXT: v_mov_b32_e32 v9, 0
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v6, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v7, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v7, s[2:3]
; GFX8-NEXT: v_and_b32_e32 v1, v3, v1 ; GFX8-NEXT: v_and_b32_e32 v1, v3, v1
; GFX8-NEXT: v_or_b32_e32 v3, v1, v2 ; GFX8-NEXT: v_or_b32_e32 v3, v1, v2
; GFX8-NEXT: v_cndmask_b32_e64 v0, v4, v3, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v4, v3, s[4:5]
Show All 36 Lines
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-LABEL: insertelement_v_v8i16_v_v: ; GFX10-LABEL: insertelement_v_v8i16_v_v:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_dwordx4 v[4:7], v[0:1], off ; GFX10-NEXT: global_load_dwordx4 v[4:7], v[0:1], off
; GFX10-NEXT: v_and_b32_e32 v0, 1, v3 ; GFX10-NEXT: v_and_b32_e32 v0, 1, v3
; GFX10-NEXT: v_lshrrev_b32_e32 v1, 1, v3 ; GFX10-NEXT: v_lshrrev_b32_e32 v1, 1, v3
; GFX10-NEXT: s_mov_b32 s0, 0xffff ; GFX10-NEXT: s_mov_b32 s0, 0xffff
; GFX10-NEXT: v_mov_b32_e32 v9, 0
; GFX10-NEXT: v_lshlrev_b32_e32 v0, 4, v0 ; GFX10-NEXT: v_lshlrev_b32_e32 v0, 4, v0
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1
; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v1 ; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v1
; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 0, v1 ; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 0, v1
; GFX10-NEXT: v_lshlrev_b32_e64 v8, v0, s0 ; GFX10-NEXT: v_lshlrev_b32_e64 v8, v0, s0
; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v1 ; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v1
; GFX10-NEXT: v_lshlrev_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; GFX10-NEXT: v_lshlrev_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX10-NEXT: v_xor_b32_e32 v2, -1, v8 ; GFX10-NEXT: v_xor_b32_e32 v2, -1, v8
; GFX10-NEXT: v_mov_b32_e32 v8, 0 ; GFX10-NEXT: v_mov_b32_e32 v8, 0
; GFX10-NEXT: v_mov_b32_e32 v9, 0
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v3, v4, v5, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v6, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v6, s0
; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v7, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v7, s1
; GFX10-NEXT: v_and_or_b32 v3, v3, v2, v0 ; GFX10-NEXT: v_and_or_b32 v3, v3, v2, v0
; GFX10-NEXT: v_cndmask_b32_e64 v0, v4, v3, s2 ; GFX10-NEXT: v_cndmask_b32_e64 v0, v4, v3, s2
; GFX10-NEXT: v_cndmask_b32_e32 v1, v5, v3, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v5, v3, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v2, v6, v3, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v6, v3, s0
▲ Show 20 Lines • Show All 43 Lines • ▼ Show 20 Lines
; GFX9-NEXT: s_cselect_b32 s2, s16, s10 ; GFX9-NEXT: s_cselect_b32 s2, s16, s10
; GFX9-NEXT: s_cmp_eq_u32 s7, 3 ; GFX9-NEXT: s_cmp_eq_u32 s7, 3
; GFX9-NEXT: s_cselect_b32 s3, s16, s11 ; GFX9-NEXT: s_cselect_b32 s3, s16, s11
; GFX9-NEXT: s_cmp_eq_u32 s7, 4 ; GFX9-NEXT: s_cmp_eq_u32 s7, 4
; GFX9-NEXT: s_cselect_b32 s4, s16, s12 ; GFX9-NEXT: s_cselect_b32 s4, s16, s12
; GFX9-NEXT: s_cmp_eq_u32 s7, 5 ; GFX9-NEXT: s_cmp_eq_u32 s7, 5
; GFX9-NEXT: s_cselect_b32 s5, s16, s13 ; GFX9-NEXT: s_cselect_b32 s5, s16, s13
; GFX9-NEXT: s_cmp_eq_u32 s7, 6 ; GFX9-NEXT: s_cmp_eq_u32 s7, 6
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: s_cselect_b32 s6, s16, s14 ; GFX9-NEXT: s_cselect_b32 s6, s16, s14
; GFX9-NEXT: s_cmp_eq_u32 s7, 7 ; GFX9-NEXT: s_cmp_eq_u32 s7, 7
; GFX9-NEXT: s_cselect_b32 s7, s16, s15
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_mov_b32_e32 v2, s2 ; GFX9-NEXT: v_mov_b32_e32 v2, s2
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: s_cselect_b32 s7, s16, s15
; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX9-NEXT: s_mov_b64 s[0:1], 16 ; GFX9-NEXT: s_mov_b64 s[0:1], 16
; GFX9-NEXT: v_mov_b32_e32 v0, s4 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NEXT: v_mov_b32_e32 v1, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NEXT: v_mov_b32_e32 v2, s6 ; GFX9-NEXT: v_mov_b32_e32 v2, s6
; GFX9-NEXT: v_mov_b32_e32 v3, s7 ; GFX9-NEXT: v_mov_b32_e32 v3, s7
; GFX9-NEXT: v_mov_b32_e32 v4, 0 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1] ; GFX9-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
Show All 35 Lines
; GFX8-NEXT: s_cselect_b32 s2, s16, s10 ; GFX8-NEXT: s_cselect_b32 s2, s16, s10
; GFX8-NEXT: s_cmp_eq_u32 s7, 3 ; GFX8-NEXT: s_cmp_eq_u32 s7, 3
; GFX8-NEXT: s_cselect_b32 s3, s16, s11 ; GFX8-NEXT: s_cselect_b32 s3, s16, s11
; GFX8-NEXT: s_cmp_eq_u32 s7, 4 ; GFX8-NEXT: s_cmp_eq_u32 s7, 4
; GFX8-NEXT: s_cselect_b32 s4, s16, s12 ; GFX8-NEXT: s_cselect_b32 s4, s16, s12
; GFX8-NEXT: s_cmp_eq_u32 s7, 5 ; GFX8-NEXT: s_cmp_eq_u32 s7, 5
; GFX8-NEXT: s_cselect_b32 s5, s16, s13 ; GFX8-NEXT: s_cselect_b32 s5, s16, s13
; GFX8-NEXT: s_cmp_eq_u32 s7, 6 ; GFX8-NEXT: s_cmp_eq_u32 s7, 6
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: s_cselect_b32 s6, s16, s14 ; GFX8-NEXT: s_cselect_b32 s6, s16, s14
; GFX8-NEXT: s_cmp_eq_u32 s7, 7 ; GFX8-NEXT: s_cmp_eq_u32 s7, 7
; GFX8-NEXT: s_cselect_b32 s7, s16, s15
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_mov_b32_e32 v2, s2 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
; GFX8-NEXT: v_mov_b32_e32 v3, s3 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
; GFX8-NEXT: s_cselect_b32 s7, s16, s15
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: v_mov_b32_e32 v4, 16 ; GFX8-NEXT: v_mov_b32_e32 v4, 16
; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v1, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: v_mov_b32_e32 v2, s6 ; GFX8-NEXT: v_mov_b32_e32 v2, s6
; GFX8-NEXT: v_mov_b32_e32 v3, s7 ; GFX8-NEXT: v_mov_b32_e32 v3, s7
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v16i16_s_s: ; GFX7-LABEL: insertelement_s_v16i16_s_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
Show All 30 Lines
; GFX7-NEXT: s_cselect_b32 s2, s16, s10 ; GFX7-NEXT: s_cselect_b32 s2, s16, s10
; GFX7-NEXT: s_cmp_eq_u32 s7, 3 ; GFX7-NEXT: s_cmp_eq_u32 s7, 3
; GFX7-NEXT: s_cselect_b32 s3, s16, s11 ; GFX7-NEXT: s_cselect_b32 s3, s16, s11
; GFX7-NEXT: s_cmp_eq_u32 s7, 4 ; GFX7-NEXT: s_cmp_eq_u32 s7, 4
; GFX7-NEXT: s_cselect_b32 s4, s16, s12 ; GFX7-NEXT: s_cselect_b32 s4, s16, s12
; GFX7-NEXT: s_cmp_eq_u32 s7, 5 ; GFX7-NEXT: s_cmp_eq_u32 s7, 5
; GFX7-NEXT: s_cselect_b32 s5, s16, s13 ; GFX7-NEXT: s_cselect_b32 s5, s16, s13
; GFX7-NEXT: s_cmp_eq_u32 s7, 6 ; GFX7-NEXT: s_cmp_eq_u32 s7, 6
; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: s_cselect_b32 s6, s16, s14 ; GFX7-NEXT: s_cselect_b32 s6, s16, s14
; GFX7-NEXT: s_cmp_eq_u32 s7, 7 ; GFX7-NEXT: s_cmp_eq_u32 s7, 7
; GFX7-NEXT: s_cselect_b32 s7, s16, s15
; GFX7-NEXT: s_mov_b64 s[8:9], 0 ; GFX7-NEXT: s_mov_b64 s[8:9], 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2 ; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_mov_b32 s10, -1 ; GFX7-NEXT: s_mov_b32 s10, -1
; GFX7-NEXT: s_mov_b32 s11, 0xf000 ; GFX7-NEXT: s_mov_b32 s11, 0xf000
; GFX7-NEXT: s_cselect_b32 s7, s16, s15
; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 ; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
; GFX7-NEXT: s_mov_b64 s[8:9], 16 ; GFX7-NEXT: s_mov_b64 s[8:9], 16
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s6 ; GFX7-NEXT: v_mov_b32_e32 v2, s6
; GFX7-NEXT: v_mov_b32_e32 v3, s7 ; GFX7-NEXT: v_mov_b32_e32 v3, s7
; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 ; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
Show All 26 Lines
; GFX10-NEXT: s_lshl_b32 s1, s1, 4 ; GFX10-NEXT: s_lshl_b32 s1, s1, 4
; GFX10-NEXT: s_lshl_b32 s2, s2, s1 ; GFX10-NEXT: s_lshl_b32 s2, s2, s1
; GFX10-NEXT: s_lshl_b32 s1, s3, s1 ; GFX10-NEXT: s_lshl_b32 s1, s3, s1
; GFX10-NEXT: s_andn2_b32 s0, s0, s2 ; GFX10-NEXT: s_andn2_b32 s0, s0, s2
; GFX10-NEXT: s_or_b32 s16, s0, s1 ; GFX10-NEXT: s_or_b32 s16, s0, s1
; GFX10-NEXT: s_cmp_eq_u32 s7, 0 ; GFX10-NEXT: s_cmp_eq_u32 s7, 0
; GFX10-NEXT: s_cselect_b32 s0, s16, s8 ; GFX10-NEXT: s_cselect_b32 s0, s16, s8
; GFX10-NEXT: s_cmp_eq_u32 s7, 1 ; GFX10-NEXT: s_cmp_eq_u32 s7, 1
; GFX10-NEXT: v_mov_b32_e32 v0, s0
; GFX10-NEXT: s_cselect_b32 s1, s16, s9 ; GFX10-NEXT: s_cselect_b32 s1, s16, s9
; GFX10-NEXT: s_cmp_eq_u32 s7, 2 ; GFX10-NEXT: s_cmp_eq_u32 s7, 2
; GFX10-NEXT: v_mov_b32_e32 v1, s1
; GFX10-NEXT: s_cselect_b32 s2, s16, s10 ; GFX10-NEXT: s_cselect_b32 s2, s16, s10
; GFX10-NEXT: s_cmp_eq_u32 s7, 3 ; GFX10-NEXT: s_cmp_eq_u32 s7, 3
; GFX10-NEXT: v_mov_b32_e32 v2, s2
; GFX10-NEXT: s_cselect_b32 s3, s16, s11 ; GFX10-NEXT: s_cselect_b32 s3, s16, s11
; GFX10-NEXT: s_cmp_eq_u32 s7, 4 ; GFX10-NEXT: s_cmp_eq_u32 s7, 4
; GFX10-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-NEXT: v_mov_b32_e32 v3, s3
; GFX10-NEXT: s_cselect_b32 s4, s16, s12 ; GFX10-NEXT: s_cselect_b32 s4, s16, s12
; GFX10-NEXT: s_cmp_eq_u32 s7, 5 ; GFX10-NEXT: s_cmp_eq_u32 s7, 5
; GFX10-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-NEXT: v_mov_b32_e32 v4, s4
; GFX10-NEXT: s_cselect_b32 s5, s16, s13 ; GFX10-NEXT: s_cselect_b32 s5, s16, s13
; GFX10-NEXT: s_cmp_eq_u32 s7, 6 ; GFX10-NEXT: s_cmp_eq_u32 s7, 6
; GFX10-NEXT: v_mov_b32_e32 v2, s2 ; GFX10-NEXT: v_mov_b32_e32 v5, s5
; GFX10-NEXT: s_cselect_b32 s6, s16, s14 ; GFX10-NEXT: s_cselect_b32 s6, s16, s14
; GFX10-NEXT: s_cmp_eq_u32 s7, 7 ; GFX10-NEXT: s_cmp_eq_u32 s7, 7
; GFX10-NEXT: v_mov_b32_e32 v3, s3
; GFX10-NEXT: s_cselect_b32 s7, s16, s15
; GFX10-NEXT: v_mov_b32_e32 v4, s4
; GFX10-NEXT: v_mov_b32_e32 v5, s5
; GFX10-NEXT: v_mov_b32_e32 v6, s6 ; GFX10-NEXT: v_mov_b32_e32 v6, s6
; GFX10-NEXT: v_mov_b32_e32 v7, s7 ; GFX10-NEXT: s_cselect_b32 s7, s16, s15
; GFX10-NEXT: s_mov_b64 s[0:1], 16 ; GFX10-NEXT: s_mov_b64 s[0:1], 16
; GFX10-NEXT: v_mov_b32_e32 v7, s7
; GFX10-NEXT: global_store_dwordx4 v[8:9], v[0:3], off ; GFX10-NEXT: global_store_dwordx4 v[8:9], v[0:3], off
; GFX10-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] ; GFX10-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <16 x i16>, <16 x i16> addrspace(4)* %ptr %vec = load <16 x i16>, <16 x i16> addrspace(4)* %ptr
%insert = insertelement <16 x i16> %vec, i16 %val, i32 %idx %insert = insertelement <16 x i16> %vec, i16 %val, i32 %idx
store <16 x i16> %insert, <16 x i16> addrspace(1)* null store <16 x i16> %insert, <16 x i16> addrspace(1)* null
ret void ret void
} }
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; GFX8-NEXT: s_lshl_b32 s13, s2, s1 ; GFX8-NEXT: s_lshl_b32 s13, s2, s1
; GFX8-NEXT: s_not_b32 s14, s0 ; GFX8-NEXT: s_not_b32 s14, s0
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], s12, 2 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], s12, 2
; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], s12, 3 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], s12, 3
; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], s12, 4 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], s12, 4
; GFX8-NEXT: v_cmp_eq_u32_e64 s[6:7], s12, 5 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[6:7], s12, 5
; GFX8-NEXT: v_cmp_eq_u32_e64 s[8:9], s12, 6 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[8:9], s12, 6
; GFX8-NEXT: v_cmp_eq_u32_e64 s[10:11], s12, 7 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[10:11], s12, 7
; GFX8-NEXT: v_mov_b32_e32 v9, 0
; GFX8-NEXT: v_mov_b32_e32 v10, 16 ; GFX8-NEXT: v_mov_b32_e32 v10, 16
; GFX8-NEXT: v_mov_b32_e32 v11, 0 ; GFX8-NEXT: v_mov_b32_e32 v11, 0
; GFX8-NEXT: s_waitcnt vmcnt(1) ; GFX8-NEXT: s_waitcnt vmcnt(1)
; GFX8-NEXT: v_cndmask_b32_e32 v8, v0, v1, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v8, v0, v1, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v2, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v2, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v3, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v3, s[2:3]
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v4, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v4, s[4:5]
; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v5, s[6:7] ; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v5, s[6:7]
; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v6, s[8:9] ; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v6, s[8:9]
; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v7, s[10:11] ; GFX8-NEXT: v_cndmask_b32_e64 v8, v8, v7, s[10:11]
; GFX8-NEXT: v_and_b32_e32 v8, s14, v8 ; GFX8-NEXT: v_and_b32_e32 v8, s14, v8
; GFX8-NEXT: v_or_b32_e32 v8, s13, v8 ; GFX8-NEXT: v_or_b32_e32 v8, s13, v8
; GFX8-NEXT: v_cmp_eq_u32_e64 s[12:13], s12, 0 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[12:13], s12, 0
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v8, s[12:13] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v8, s[12:13]
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v8, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v8, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v8, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v8, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v8, s[2:3]
; GFX8-NEXT: v_cndmask_b32_e64 v4, v4, v8, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v4, v4, v8, s[4:5]
; GFX8-NEXT: v_cndmask_b32_e64 v5, v5, v8, s[6:7] ; GFX8-NEXT: v_cndmask_b32_e64 v5, v5, v8, s[6:7]
; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v8, s[8:9] ; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v8, s[8:9]
; GFX8-NEXT: v_cndmask_b32_e64 v7, v7, v8, s[10:11] ; GFX8-NEXT: v_cndmask_b32_e64 v7, v7, v8, s[10:11]
; GFX8-NEXT: v_mov_b32_e32 v8, 0 ; GFX8-NEXT: v_mov_b32_e32 v8, 0
; GFX8-NEXT: v_mov_b32_e32 v9, 0
; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[4:7] ; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[4:7]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v16i16_s_s: ; GFX7-LABEL: insertelement_v_v16i16_s_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s18, 0 ; GFX7-NEXT: s_mov_b32 s18, 0
; GFX7-NEXT: s_mov_b32 s19, 0xf000 ; GFX7-NEXT: s_mov_b32 s19, 0xf000
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; GFX10-LABEL: insertelement_s_v16i16_v_s: ; GFX10-LABEL: insertelement_s_v16i16_v_s:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx8 s[8:15], s[2:3], 0x0 ; GFX10-NEXT: s_load_dwordx8 s[8:15], s[2:3], 0x0
; GFX10-NEXT: s_lshr_b32 s0, s4, 1 ; GFX10-NEXT: s_lshr_b32 s0, s4, 1
; GFX10-NEXT: s_mov_b32 s3, 0xffff ; GFX10-NEXT: s_mov_b32 s3, 0xffff
; GFX10-NEXT: s_cmp_eq_u32 s0, 1 ; GFX10-NEXT: s_cmp_eq_u32 s0, 1
; GFX10-NEXT: v_and_b32_e32 v8, s3, v0 ; GFX10-NEXT: v_and_b32_e32 v8, s3, v0
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s0, 0 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s0, 0
; GFX10-NEXT: v_mov_b32_e32 v9, 0
; GFX10-NEXT: v_mov_b32_e32 v11, 0 ; GFX10-NEXT: v_mov_b32_e32 v11, 0
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_cselect_b32 s1, s9, s8 ; GFX10-NEXT: s_cselect_b32 s1, s9, s8
; GFX10-NEXT: s_cmp_eq_u32 s0, 2 ; GFX10-NEXT: s_cmp_eq_u32 s0, 2
; GFX10-NEXT: v_mov_b32_e32 v0, s8 ; GFX10-NEXT: v_mov_b32_e32 v0, s8
; GFX10-NEXT: s_cselect_b32 s1, s10, s1 ; GFX10-NEXT: s_cselect_b32 s1, s10, s1
; GFX10-NEXT: s_cmp_eq_u32 s0, 3 ; GFX10-NEXT: s_cmp_eq_u32 s0, 3
; GFX10-NEXT: v_mov_b32_e32 v1, s9 ; GFX10-NEXT: v_mov_b32_e32 v1, s9
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; GFX10-NEXT: s_and_b32 s2, s4, 1 ; GFX10-NEXT: s_and_b32 s2, s4, 1
; GFX10-NEXT: v_mov_b32_e32 v6, s14 ; GFX10-NEXT: v_mov_b32_e32 v6, s14
; GFX10-NEXT: s_lshl_b32 s2, s2, 4 ; GFX10-NEXT: s_lshl_b32 s2, s2, 4
; GFX10-NEXT: v_mov_b32_e32 v7, s15 ; GFX10-NEXT: v_mov_b32_e32 v7, s15
; GFX10-NEXT: s_lshl_b32 s3, s3, s2 ; GFX10-NEXT: s_lshl_b32 s3, s3, s2
; GFX10-NEXT: s_andn2_b32 s1, s1, s3 ; GFX10-NEXT: s_andn2_b32 s1, s1, s3
; GFX10-NEXT: v_lshl_or_b32 v10, v8, s2, s1 ; GFX10-NEXT: v_lshl_or_b32 v10, v8, s2, s1
; GFX10-NEXT: v_mov_b32_e32 v8, 0 ; GFX10-NEXT: v_mov_b32_e32 v8, 0
; GFX10-NEXT: v_mov_b32_e32 v9, 0
; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v10, vcc_lo
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s0, 1 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s0, 1
; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v10, vcc_lo
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s0, 2 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s0, 2
; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v10, vcc_lo
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s0, 3 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s0, 3
; GFX10-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v3, v3, v10, vcc_lo
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s0, 4 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s0, 4
▲ Show 20 Lines • Show All 214 Lines • ▼ Show 20 Lines
; GFX10-NEXT: v_cmp_eq_u32_e64 s4, 6, v10 ; GFX10-NEXT: v_cmp_eq_u32_e64 s4, 6, v10
; GFX10-NEXT: v_lshlrev_b32_e64 v2, v0, s5 ; GFX10-NEXT: v_lshlrev_b32_e64 v2, v0, s5
; GFX10-NEXT: v_cmp_eq_u32_e64 s5, 7, v10 ; GFX10-NEXT: v_cmp_eq_u32_e64 s5, 7, v10
; GFX10-NEXT: v_lshlrev_b32_e64 v8, v0, s6 ; GFX10-NEXT: v_lshlrev_b32_e64 v8, v0, s6
; GFX10-NEXT: v_cmp_eq_u32_e64 s6, 0, v10 ; GFX10-NEXT: v_cmp_eq_u32_e64 s6, 0, v10
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v1, s9 ; GFX10-NEXT: v_mov_b32_e32 v1, s9
; GFX10-NEXT: v_xor_b32_e32 v9, -1, v2 ; GFX10-NEXT: v_xor_b32_e32 v9, -1, v2
; GFX10-NEXT: v_mov_b32_e32 v0, s8
; GFX10-NEXT: v_mov_b32_e32 v2, s10
; GFX10-NEXT: v_mov_b32_e32 v3, s11
; GFX10-NEXT: v_cndmask_b32_e32 v1, s8, v1, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, s8, v1, vcc_lo
; GFX10-NEXT: v_mov_b32_e32 v4, s12
; GFX10-NEXT: v_mov_b32_e32 v5, s13
; GFX10-NEXT: v_mov_b32_e32 v6, s14
; GFX10-NEXT: v_mov_b32_e32 v7, s15
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s10, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s10, s0
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s11, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s11, s1
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s12, s2 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s12, s2
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s13, s3 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s13, s3
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s14, s4 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s14, s4
; GFX10-NEXT: v_cndmask_b32_e64 v11, v1, s15, s5 ; GFX10-NEXT: v_cndmask_b32_e64 v11, v1, s15, s5
; GFX10-NEXT: v_mov_b32_e32 v0, s8
; GFX10-NEXT: v_mov_b32_e32 v1, s9 ; GFX10-NEXT: v_mov_b32_e32 v1, s9
; GFX10-NEXT: v_mov_b32_e32 v2, s10
; GFX10-NEXT: v_mov_b32_e32 v3, s11
; GFX10-NEXT: v_and_or_b32 v11, v11, v9, v8 ; GFX10-NEXT: v_and_or_b32 v11, v11, v9, v8
; GFX10-NEXT: v_mov_b32_e32 v4, s12
; GFX10-NEXT: v_mov_b32_e32 v5, s13
; GFX10-NEXT: v_mov_b32_e32 v6, s14
; GFX10-NEXT: v_mov_b32_e32 v7, s15
; GFX10-NEXT: v_mov_b32_e32 v8, 0 ; GFX10-NEXT: v_mov_b32_e32 v8, 0
; GFX10-NEXT: v_mov_b32_e32 v9, 0 ; GFX10-NEXT: v_mov_b32_e32 v9, 0
; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v11, s6 ; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v11, s6
; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v11, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v11, s0
; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v11, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v11, s1
; GFX10-NEXT: v_cndmask_b32_e64 v4, v4, v11, s2 ; GFX10-NEXT: v_cndmask_b32_e64 v4, v4, v11, s2
; GFX10-NEXT: v_cndmask_b32_e64 v5, v5, v11, s3 ; GFX10-NEXT: v_cndmask_b32_e64 v5, v5, v11, s3
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; GFX7-NEXT: v_cndmask_b32_e64 v2, v2, v10, s[10:11] ; GFX7-NEXT: v_cndmask_b32_e64 v2, v2, v10, s[10:11]
; GFX7-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX7-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX7-NEXT: v_and_b32_e32 v1, v2, v1 ; GFX7-NEXT: v_and_b32_e32 v1, v2, v1
; GFX7-NEXT: v_or_b32_e32 v9, v1, v0 ; GFX7-NEXT: v_or_b32_e32 v9, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v0, s12 ; GFX7-NEXT: v_mov_b32_e32 v0, s12
; GFX7-NEXT: v_mov_b32_e32 v1, s13 ; GFX7-NEXT: v_mov_b32_e32 v1, s13
; GFX7-NEXT: v_mov_b32_e32 v2, s14 ; GFX7-NEXT: v_mov_b32_e32 v2, s14
; GFX7-NEXT: v_mov_b32_e32 v3, s15 ; GFX7-NEXT: v_mov_b32_e32 v3, s15
; GFX7-NEXT: v_cmp_eq_u32_e64 s[12:13], 0, v8
; GFX7-NEXT: v_mov_b32_e32 v4, s16 ; GFX7-NEXT: v_mov_b32_e32 v4, s16
; GFX7-NEXT: v_mov_b32_e32 v5, s17 ; GFX7-NEXT: v_mov_b32_e32 v5, s17
; GFX7-NEXT: v_mov_b32_e32 v6, s18 ; GFX7-NEXT: v_mov_b32_e32 v6, s18
; GFX7-NEXT: v_mov_b32_e32 v7, s19 ; GFX7-NEXT: v_mov_b32_e32 v7, s19
; GFX7-NEXT: v_cmp_eq_u32_e64 s[12:13], 0, v8
; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v9, s[12:13] ; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v9, s[12:13]
; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v9, vcc
; GFX7-NEXT: v_cndmask_b32_e64 v2, v2, v9, s[0:1] ; GFX7-NEXT: v_cndmask_b32_e64 v2, v2, v9, s[0:1]
; GFX7-NEXT: v_cndmask_b32_e64 v3, v3, v9, s[2:3] ; GFX7-NEXT: v_cndmask_b32_e64 v3, v3, v9, s[2:3]
; GFX7-NEXT: s_mov_b64 s[0:1], 0 ; GFX7-NEXT: s_mov_b64 s[0:1], 0
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: v_cndmask_b32_e64 v4, v4, v9, s[4:5] ; GFX7-NEXT: v_cndmask_b32_e64 v4, v4, v9, s[4:5]
Show All 21 Lines
; GFX10-NEXT: v_cmp_eq_u32_e64 s5, 7, v10 ; GFX10-NEXT: v_cmp_eq_u32_e64 s5, 7, v10
; GFX10-NEXT: v_cmp_eq_u32_e64 s6, 0, v10 ; GFX10-NEXT: v_cmp_eq_u32_e64 s6, 0, v10
; GFX10-NEXT: v_lshlrev_b32_e64 v3, v1, s4 ; GFX10-NEXT: v_lshlrev_b32_e64 v3, v1, s4
; GFX10-NEXT: v_cmp_eq_u32_e64 s4, 6, v10 ; GFX10-NEXT: v_cmp_eq_u32_e64 s4, 6, v10
; GFX10-NEXT: v_lshlrev_b32_sdwa v8, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; GFX10-NEXT: v_lshlrev_b32_sdwa v8, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX10-NEXT: v_xor_b32_e32 v9, -1, v3 ; GFX10-NEXT: v_xor_b32_e32 v9, -1, v3
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v2, s9 ; GFX10-NEXT: v_mov_b32_e32 v2, s9
; GFX10-NEXT: v_mov_b32_e32 v0, s8
; GFX10-NEXT: v_mov_b32_e32 v1, s9
; GFX10-NEXT: v_mov_b32_e32 v3, s11
; GFX10-NEXT: v_mov_b32_e32 v4, s12
; GFX10-NEXT: v_cndmask_b32_e32 v2, s8, v2, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v2, s8, v2, vcc_lo
; GFX10-NEXT: v_mov_b32_e32 v5, s13
; GFX10-NEXT: v_mov_b32_e32 v6, s14
; GFX10-NEXT: v_mov_b32_e32 v7, s15
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s10, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s10, s0
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s11, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s11, s1
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s12, s2 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s12, s2
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s13, s3 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s13, s3
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s14, s4 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s14, s4
; GFX10-NEXT: v_cndmask_b32_e64 v11, v2, s15, s5 ; GFX10-NEXT: v_cndmask_b32_e64 v11, v2, s15, s5
; GFX10-NEXT: v_mov_b32_e32 v0, s8
; GFX10-NEXT: v_mov_b32_e32 v1, s9
; GFX10-NEXT: v_mov_b32_e32 v2, s10 ; GFX10-NEXT: v_mov_b32_e32 v2, s10
; GFX10-NEXT: v_mov_b32_e32 v3, s11
; GFX10-NEXT: v_and_or_b32 v11, v11, v9, v8 ; GFX10-NEXT: v_and_or_b32 v11, v11, v9, v8
; GFX10-NEXT: v_mov_b32_e32 v4, s12
; GFX10-NEXT: v_mov_b32_e32 v5, s13
; GFX10-NEXT: v_mov_b32_e32 v6, s14
; GFX10-NEXT: v_mov_b32_e32 v7, s15
; GFX10-NEXT: v_mov_b32_e32 v8, 0 ; GFX10-NEXT: v_mov_b32_e32 v8, 0
; GFX10-NEXT: v_mov_b32_e32 v9, 0 ; GFX10-NEXT: v_mov_b32_e32 v9, 0
; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v11, s6 ; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v11, s6
; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v11, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v11, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v11, s0
; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v11, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v11, s1
; GFX10-NEXT: v_cndmask_b32_e64 v4, v4, v11, s2 ; GFX10-NEXT: v_cndmask_b32_e64 v4, v4, v11, s2
; GFX10-NEXT: v_cndmask_b32_e64 v5, v5, v11, s3 ; GFX10-NEXT: v_cndmask_b32_e64 v5, v5, v11, s3
Show All 36 Lines
; GFX9-NEXT: v_cndmask_b32_e64 v11, v11, v6, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v11, v11, v6, s[2:3]
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cndmask_b32_e64 v11, v11, v7, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v11, v11, v7, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e64 v11, v11, v8, s[6:7] ; GFX9-NEXT: v_cndmask_b32_e64 v11, v11, v8, s[6:7]
; GFX9-NEXT: v_cndmask_b32_e64 v11, v11, v9, s[8:9] ; GFX9-NEXT: v_cndmask_b32_e64 v11, v11, v9, s[8:9]
; GFX9-NEXT: v_cndmask_b32_e64 v11, v11, v10, s[10:11] ; GFX9-NEXT: v_cndmask_b32_e64 v11, v11, v10, s[10:11]
; GFX9-NEXT: v_and_or_b32 v11, v11, v1, v2 ; GFX9-NEXT: v_and_or_b32 v11, v11, v1, v2
; GFX9-NEXT: v_cndmask_b32_e64 v0, v3, v11, s[12:13] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v3, v11, s[12:13]
; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v11, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v2, v5, v11, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v2, v5, v11, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v3, v6, v11, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v3, v6, v11, s[2:3]
; GFX9-NEXT: v_cndmask_b32_e64 v5, v8, v11, s[6:7] ; GFX9-NEXT: v_cndmask_b32_e64 v5, v8, v11, s[6:7]
; GFX9-NEXT: v_cndmask_b32_e64 v6, v9, v11, s[8:9] ; GFX9-NEXT: v_cndmask_b32_e64 v6, v9, v11, s[8:9]
; GFX9-NEXT: v_mov_b32_e32 v8, 0 ; GFX9-NEXT: v_mov_b32_e32 v8, 0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v11, vcc
; GFX9-NEXT: v_mov_b32_e32 v9, 0 ; GFX9-NEXT: v_mov_b32_e32 v9, 0
; GFX9-NEXT: v_cndmask_b32_e64 v4, v7, v11, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v4, v7, v11, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e64 v7, v10, v11, s[10:11] ; GFX9-NEXT: v_cndmask_b32_e64 v7, v10, v11, s[10:11]
; GFX9-NEXT: s_mov_b64 s[0:1], 16 ; GFX9-NEXT: s_mov_b64 s[0:1], 16
; GFX9-NEXT: v_mov_b32_e32 v10, 0 ; GFX9-NEXT: v_mov_b32_e32 v10, 0
; GFX9-NEXT: global_store_dwordx4 v[8:9], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[8:9], v[0:3], off
; GFX9-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] ; GFX9-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
Show All 27 Lines
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_cndmask_b32_e64 v11, v11, v7, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v11, v11, v7, s[4:5]
; GFX8-NEXT: v_cndmask_b32_e64 v11, v11, v8, s[6:7] ; GFX8-NEXT: v_cndmask_b32_e64 v11, v11, v8, s[6:7]
; GFX8-NEXT: v_cndmask_b32_e64 v11, v11, v9, s[8:9] ; GFX8-NEXT: v_cndmask_b32_e64 v11, v11, v9, s[8:9]
; GFX8-NEXT: v_cndmask_b32_e64 v11, v11, v10, s[10:11] ; GFX8-NEXT: v_cndmask_b32_e64 v11, v11, v10, s[10:11]
; GFX8-NEXT: v_and_b32_e32 v1, v11, v1 ; GFX8-NEXT: v_and_b32_e32 v1, v11, v1
; GFX8-NEXT: v_or_b32_e32 v11, v1, v2 ; GFX8-NEXT: v_or_b32_e32 v11, v1, v2
; GFX8-NEXT: v_cndmask_b32_e64 v0, v3, v11, s[12:13] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v3, v11, s[12:13]
; GFX8-NEXT: v_cndmask_b32_e32 v1, v4, v11, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v2, v5, v11, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v5, v11, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v3, v6, v11, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v6, v11, s[2:3]
; GFX8-NEXT: v_cndmask_b32_e64 v5, v8, v11, s[6:7] ; GFX8-NEXT: v_cndmask_b32_e64 v5, v8, v11, s[6:7]
; GFX8-NEXT: v_cndmask_b32_e64 v6, v9, v11, s[8:9] ; GFX8-NEXT: v_cndmask_b32_e64 v6, v9, v11, s[8:9]
; GFX8-NEXT: v_mov_b32_e32 v8, 0 ; GFX8-NEXT: v_mov_b32_e32 v8, 0
; GFX8-NEXT: v_cndmask_b32_e32 v1, v4, v11, vcc ; GFX8-NEXT: v_mov_b32_e32 v9, 0
; GFX8-NEXT: v_cndmask_b32_e64 v4, v7, v11, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v4, v7, v11, s[4:5]
; GFX8-NEXT: v_cndmask_b32_e64 v7, v10, v11, s[10:11] ; GFX8-NEXT: v_cndmask_b32_e64 v7, v10, v11, s[10:11]
; GFX8-NEXT: v_mov_b32_e32 v9, 0
; GFX8-NEXT: v_mov_b32_e32 v10, 16 ; GFX8-NEXT: v_mov_b32_e32 v10, 16
; GFX8-NEXT: v_mov_b32_e32 v11, 0 ; GFX8-NEXT: v_mov_b32_e32 v11, 0
; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[4:7] ; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[4:7]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v16i16_s_v: ; GFX7-LABEL: insertelement_v_v16i16_s_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
▲ Show 20 Lines • Show All 46 Lines • ▼ Show 20 Lines
; GFX10-LABEL: insertelement_v_v16i16_s_v: ; GFX10-LABEL: insertelement_v_v16i16_s_v:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_clause 0x1 ; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: global_load_dwordx4 v[3:6], v[0:1], off ; GFX10-NEXT: global_load_dwordx4 v[3:6], v[0:1], off
; GFX10-NEXT: global_load_dwordx4 v[7:10], v[0:1], off offset:16 ; GFX10-NEXT: global_load_dwordx4 v[7:10], v[0:1], off offset:16
; GFX10-NEXT: v_lshrrev_b32_e32 v0, 1, v2 ; GFX10-NEXT: v_lshrrev_b32_e32 v0, 1, v2
; GFX10-NEXT: v_and_b32_e32 v2, 1, v2 ; GFX10-NEXT: v_and_b32_e32 v2, 1, v2
; GFX10-NEXT: s_mov_b32 s5, 0xffff ; GFX10-NEXT: s_mov_b32 s5, 0xffff
; GFX10-NEXT: v_mov_b32_e32 v14, 0 ; GFX10-NEXT: v_mov_b32_e32 v12, 0
; GFX10-NEXT: s_and_b32 s6, s2, s5 ; GFX10-NEXT: s_and_b32 s6, s2, s5
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v0
; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v0
; GFX10-NEXT: v_cmp_eq_u32_e64 s3, 4, v0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s3, 4, v0
; GFX10-NEXT: v_cmp_eq_u32_e64 s4, 5, v0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s4, 5, v0
; GFX10-NEXT: v_lshlrev_b32_e32 v2, 4, v2 ; GFX10-NEXT: v_lshlrev_b32_e32 v2, 4, v2
; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 6, v0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 6, v0
; GFX10-NEXT: v_mov_b32_e32 v14, 0
; GFX10-NEXT: v_lshlrev_b32_e64 v11, v2, s5 ; GFX10-NEXT: v_lshlrev_b32_e64 v11, v2, s5
; GFX10-NEXT: v_cmp_eq_u32_e64 s5, 7, v0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s5, 7, v0
; GFX10-NEXT: v_lshlrev_b32_e64 v2, v2, s6 ; GFX10-NEXT: v_lshlrev_b32_e64 v2, v2, s6
; GFX10-NEXT: v_cmp_eq_u32_e64 s6, 0, v0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s6, 0, v0
; GFX10-NEXT: v_xor_b32_e32 v11, -1, v11 ; GFX10-NEXT: v_xor_b32_e32 v11, -1, v11
; GFX10-NEXT: s_waitcnt vmcnt(1) ; GFX10-NEXT: s_waitcnt vmcnt(1)
; GFX10-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v3, v4, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v5, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v5, s0
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v6, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v6, s1
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v7, s3 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v7, s3
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v8, s4 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v8, s4
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v9, s2 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v9, s2
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v10, s5 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v10, s5
; GFX10-NEXT: v_and_or_b32 v13, v1, v11, v2 ; GFX10-NEXT: v_and_or_b32 v13, v1, v11, v2
; GFX10-NEXT: v_mov_b32_e32 v11, 0 ; GFX10-NEXT: v_mov_b32_e32 v11, 0
; GFX10-NEXT: v_mov_b32_e32 v12, 0
; GFX10-NEXT: v_cndmask_b32_e64 v0, v3, v13, s6 ; GFX10-NEXT: v_cndmask_b32_e64 v0, v3, v13, s6
; GFX10-NEXT: v_cndmask_b32_e32 v1, v4, v13, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v4, v13, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v2, v5, v13, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v5, v13, s0
; GFX10-NEXT: v_cndmask_b32_e64 v3, v6, v13, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v3, v6, v13, s1
; GFX10-NEXT: v_cndmask_b32_e64 v4, v7, v13, s3 ; GFX10-NEXT: v_cndmask_b32_e64 v4, v7, v13, s3
; GFX10-NEXT: v_cndmask_b32_e64 v5, v8, v13, s4 ; GFX10-NEXT: v_cndmask_b32_e64 v5, v8, v13, s4
; GFX10-NEXT: v_cndmask_b32_e64 v6, v9, v13, s2 ; GFX10-NEXT: v_cndmask_b32_e64 v6, v9, v13, s2
; GFX10-NEXT: v_cndmask_b32_e64 v7, v10, v13, s5 ; GFX10-NEXT: v_cndmask_b32_e64 v7, v10, v13, s5
Show All 33 Lines
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v7, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v7, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v8, s[6:7] ; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v8, s[6:7]
; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v9, s[8:9] ; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v9, s[8:9]
; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v10, s[10:11] ; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v10, s[10:11]
; GFX9-NEXT: v_and_or_b32 v11, v1, s13, v0 ; GFX9-NEXT: v_and_or_b32 v11, v1, s13, v0
; GFX9-NEXT: v_cmp_eq_u32_e64 s[12:13], s12, 0 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[12:13], s12, 0
; GFX9-NEXT: v_cndmask_b32_e64 v0, v3, v11, s[12:13] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v3, v11, s[12:13]
; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v11, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v2, v5, v11, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v2, v5, v11, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v3, v6, v11, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v3, v6, v11, s[2:3]
; GFX9-NEXT: v_cndmask_b32_e64 v5, v8, v11, s[6:7] ; GFX9-NEXT: v_cndmask_b32_e64 v5, v8, v11, s[6:7]
; GFX9-NEXT: v_cndmask_b32_e64 v6, v9, v11, s[8:9] ; GFX9-NEXT: v_cndmask_b32_e64 v6, v9, v11, s[8:9]
; GFX9-NEXT: v_mov_b32_e32 v8, 0 ; GFX9-NEXT: v_mov_b32_e32 v8, 0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v4, v11, vcc
; GFX9-NEXT: v_mov_b32_e32 v9, 0 ; GFX9-NEXT: v_mov_b32_e32 v9, 0
; GFX9-NEXT: v_cndmask_b32_e64 v4, v7, v11, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v4, v7, v11, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e64 v7, v10, v11, s[10:11] ; GFX9-NEXT: v_cndmask_b32_e64 v7, v10, v11, s[10:11]
; GFX9-NEXT: s_mov_b64 s[0:1], 16 ; GFX9-NEXT: s_mov_b64 s[0:1], 16
; GFX9-NEXT: v_mov_b32_e32 v10, 0 ; GFX9-NEXT: v_mov_b32_e32 v10, 0
; GFX9-NEXT: global_store_dwordx4 v[8:9], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[8:9], v[0:3], off
; GFX9-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] ; GFX9-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
Show All 27 Lines
; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v7, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v7, s[4:5]
; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v8, s[6:7] ; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v8, s[6:7]
; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v9, s[8:9] ; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v9, s[8:9]
; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v10, s[10:11] ; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v10, s[10:11]
; GFX8-NEXT: v_and_b32_e32 v1, s13, v1 ; GFX8-NEXT: v_and_b32_e32 v1, s13, v1
; GFX8-NEXT: v_or_b32_e32 v11, v1, v0 ; GFX8-NEXT: v_or_b32_e32 v11, v1, v0
; GFX8-NEXT: v_cmp_eq_u32_e64 s[12:13], s12, 0 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[12:13], s12, 0
; GFX8-NEXT: v_cndmask_b32_e64 v0, v3, v11, s[12:13] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v3, v11, s[12:13]
; GFX8-NEXT: v_cndmask_b32_e32 v1, v4, v11, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v2, v5, v11, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v5, v11, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v3, v6, v11, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v6, v11, s[2:3]
; GFX8-NEXT: v_cndmask_b32_e64 v5, v8, v11, s[6:7] ; GFX8-NEXT: v_cndmask_b32_e64 v5, v8, v11, s[6:7]
; GFX8-NEXT: v_cndmask_b32_e64 v6, v9, v11, s[8:9] ; GFX8-NEXT: v_cndmask_b32_e64 v6, v9, v11, s[8:9]
; GFX8-NEXT: v_mov_b32_e32 v8, 0 ; GFX8-NEXT: v_mov_b32_e32 v8, 0
; GFX8-NEXT: v_cndmask_b32_e32 v1, v4, v11, vcc ; GFX8-NEXT: v_mov_b32_e32 v9, 0
; GFX8-NEXT: v_cndmask_b32_e64 v4, v7, v11, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v4, v7, v11, s[4:5]
; GFX8-NEXT: v_cndmask_b32_e64 v7, v10, v11, s[10:11] ; GFX8-NEXT: v_cndmask_b32_e64 v7, v10, v11, s[10:11]
; GFX8-NEXT: v_mov_b32_e32 v9, 0
; GFX8-NEXT: v_mov_b32_e32 v10, 16 ; GFX8-NEXT: v_mov_b32_e32 v10, 16
; GFX8-NEXT: v_mov_b32_e32 v11, 0 ; GFX8-NEXT: v_mov_b32_e32 v11, 0
; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[4:7] ; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[4:7]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v16i16_v_s: ; GFX7-LABEL: insertelement_v_v16i16_v_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v8, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v8, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v9, s[6:7] ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v9, s[6:7]
; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v10, s[8:9] ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v10, s[8:9]
; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v11, s[10:11] ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v11, s[10:11]
; GFX9-NEXT: v_and_or_b32 v12, v3, v1, v2 ; GFX9-NEXT: v_and_or_b32 v12, v3, v1, v2
; GFX9-NEXT: v_cndmask_b32_e64 v0, v4, v12, s[12:13] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v4, v12, s[12:13]
; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v12, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v5, v12, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v2, v6, v12, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v3, v7, v12, s[2:3]
; GFX9-NEXT: v_cndmask_b32_e64 v4, v8, v12, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v4, v8, v12, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e64 v5, v9, v12, s[6:7] ; GFX9-NEXT: v_cndmask_b32_e64 v5, v9, v12, s[6:7]
; GFX9-NEXT: v_mov_b32_e32 v8, 0 ; GFX9-NEXT: v_mov_b32_e32 v8, 0
; GFX9-NEXT: v_cndmask_b32_e64 v2, v6, v12, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v3, v7, v12, s[2:3]
; GFX9-NEXT: v_mov_b32_e32 v9, 0 ; GFX9-NEXT: v_mov_b32_e32 v9, 0
; GFX9-NEXT: v_cndmask_b32_e64 v6, v10, v12, s[8:9] ; GFX9-NEXT: v_cndmask_b32_e64 v6, v10, v12, s[8:9]
; GFX9-NEXT: v_cndmask_b32_e64 v7, v11, v12, s[10:11] ; GFX9-NEXT: v_cndmask_b32_e64 v7, v11, v12, s[10:11]
; GFX9-NEXT: s_mov_b64 s[0:1], 16 ; GFX9-NEXT: s_mov_b64 s[0:1], 16
; GFX9-NEXT: v_mov_b32_e32 v10, 0 ; GFX9-NEXT: v_mov_b32_e32 v10, 0
; GFX9-NEXT: global_store_dwordx4 v[8:9], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[8:9], v[0:3], off
; GFX9-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1] ; GFX9-NEXT: global_store_dwordx4 v10, v[4:7], s[0:1]
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
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; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v8, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v8, s[4:5]
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v9, s[6:7] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v9, s[6:7]
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v10, s[8:9] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v10, s[8:9]
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v11, s[10:11] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v11, s[10:11]
; GFX8-NEXT: v_and_b32_e32 v1, v3, v1 ; GFX8-NEXT: v_and_b32_e32 v1, v3, v1
; GFX8-NEXT: v_or_b32_e32 v12, v1, v2 ; GFX8-NEXT: v_or_b32_e32 v12, v1, v2
; GFX8-NEXT: v_cndmask_b32_e64 v0, v4, v12, s[12:13] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v4, v12, s[12:13]
; GFX8-NEXT: v_cndmask_b32_e32 v1, v5, v12, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v5, v12, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v2, v6, v12, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v3, v7, v12, s[2:3]
; GFX8-NEXT: v_cndmask_b32_e64 v4, v8, v12, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v4, v8, v12, s[4:5]
; GFX8-NEXT: v_cndmask_b32_e64 v5, v9, v12, s[6:7] ; GFX8-NEXT: v_cndmask_b32_e64 v5, v9, v12, s[6:7]
; GFX8-NEXT: v_mov_b32_e32 v8, 0 ; GFX8-NEXT: v_mov_b32_e32 v8, 0
; GFX8-NEXT: v_cndmask_b32_e64 v2, v6, v12, s[0:1] ; GFX8-NEXT: v_mov_b32_e32 v9, 0
; GFX8-NEXT: v_cndmask_b32_e64 v3, v7, v12, s[2:3]
; GFX8-NEXT: v_cndmask_b32_e64 v6, v10, v12, s[8:9] ; GFX8-NEXT: v_cndmask_b32_e64 v6, v10, v12, s[8:9]
; GFX8-NEXT: v_cndmask_b32_e64 v7, v11, v12, s[10:11] ; GFX8-NEXT: v_cndmask_b32_e64 v7, v11, v12, s[10:11]
; GFX8-NEXT: v_mov_b32_e32 v9, 0
; GFX8-NEXT: v_mov_b32_e32 v10, 16 ; GFX8-NEXT: v_mov_b32_e32 v10, 16
; GFX8-NEXT: v_mov_b32_e32 v11, 0 ; GFX8-NEXT: v_mov_b32_e32 v11, 0
; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[4:7] ; GFX8-NEXT: flat_store_dwordx4 v[10:11], v[4:7]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v16i16_v_v: ; GFX7-LABEL: insertelement_v_v16i16_v_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
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; GFX10-LABEL: insertelement_v_v16i16_v_v: ; GFX10-LABEL: insertelement_v_v16i16_v_v:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_clause 0x1 ; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: global_load_dwordx4 v[4:7], v[0:1], off ; GFX10-NEXT: global_load_dwordx4 v[4:7], v[0:1], off
; GFX10-NEXT: global_load_dwordx4 v[8:11], v[0:1], off offset:16 ; GFX10-NEXT: global_load_dwordx4 v[8:11], v[0:1], off offset:16
; GFX10-NEXT: v_lshrrev_b32_e32 v0, 1, v3 ; GFX10-NEXT: v_lshrrev_b32_e32 v0, 1, v3
; GFX10-NEXT: v_and_b32_e32 v3, 1, v3 ; GFX10-NEXT: v_and_b32_e32 v3, 1, v3
; GFX10-NEXT: s_mov_b32 s4, 0xffff ; GFX10-NEXT: s_mov_b32 s4, 0xffff
; GFX10-NEXT: v_mov_b32_e32 v13, 0
; GFX10-NEXT: v_mov_b32_e32 v15, 0 ; GFX10-NEXT: v_mov_b32_e32 v15, 0
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v0
; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v0
; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 4, v0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 4, v0
; GFX10-NEXT: v_lshlrev_b32_e32 v3, 4, v3 ; GFX10-NEXT: v_lshlrev_b32_e32 v3, 4, v3
; GFX10-NEXT: v_cmp_eq_u32_e64 s3, 5, v0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s3, 5, v0
; GFX10-NEXT: v_cmp_eq_u32_e64 s5, 7, v0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s5, 7, v0
; GFX10-NEXT: v_cmp_eq_u32_e64 s6, 0, v0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s6, 0, v0
; GFX10-NEXT: v_lshlrev_b32_e64 v12, v3, s4 ; GFX10-NEXT: v_lshlrev_b32_e64 v12, v3, s4
; GFX10-NEXT: v_cmp_eq_u32_e64 s4, 6, v0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s4, 6, v0
; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX10-NEXT: v_xor_b32_e32 v3, -1, v12 ; GFX10-NEXT: v_xor_b32_e32 v3, -1, v12
; GFX10-NEXT: v_mov_b32_e32 v12, 0 ; GFX10-NEXT: v_mov_b32_e32 v12, 0
; GFX10-NEXT: v_mov_b32_e32 v13, 0
; GFX10-NEXT: s_waitcnt vmcnt(1) ; GFX10-NEXT: s_waitcnt vmcnt(1)
; GFX10-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v4, v5, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v6, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v6, s0
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v7, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v7, s1
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v8, s2 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v8, s2
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v9, s3 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v9, s3
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v10, s4 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, v10, s4
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llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll

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; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: v_mov_b32_e32 v0, 0 ; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_cmp_eq_u32_e64 s0, s5, 1 ; GFX10-NEXT: v_cmp_eq_u32_e64 s0, s5, 1
; GFX10-NEXT: v_cmp_eq_u32_e64 s1, s5, 0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s1, s5, 0
; GFX10-NEXT: global_load_ushort v0, v0, s[2:3] ; GFX10-NEXT: global_load_ushort v0, v0, s[2:3]
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX10-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX10-NEXT: v_cndmask_b32_e64 v2, v0, s4, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v0, s4, s1
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s4, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s4, s0
; GFX10-NEXT: s_movk_i32 s0, 0xff ; GFX10-NEXT: s_movk_i32 s0, 0xff
; GFX10-NEXT: v_and_b32_sdwa v3, v1, s0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX10-NEXT: v_and_b32_sdwa v3, v1, s0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX10-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX10-NEXT: global_store_short v[0:1], v2, off ; GFX10-NEXT: global_store_short v[0:1], v2, off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <2 x i8>, <2 x i8> addrspace(4)* %ptr %vec = load <2 x i8>, <2 x i8> addrspace(4)* %ptr
%insert = insertelement <2 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <2 x i8> %vec, i8 %val, i32 %idx
store <2 x i8> %insert, <2 x i8> addrspace(1)* null store <2 x i8> %insert, <2 x i8> addrspace(1)* null
ret void ret void
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; GFX10-LABEL: insertelement_v_v2i8_s_s: ; GFX10-LABEL: insertelement_v_v2i8_s_s:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: global_load_ushort v0, v[0:1], off ; GFX10-NEXT: global_load_ushort v0, v[0:1], off
; GFX10-NEXT: v_cmp_eq_u32_e64 s0, s3, 1 ; GFX10-NEXT: v_cmp_eq_u32_e64 s0, s3, 1
; GFX10-NEXT: v_cmp_eq_u32_e64 s1, s3, 0 ; GFX10-NEXT: v_cmp_eq_u32_e64 s1, s3, 0
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX10-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX10-NEXT: v_cndmask_b32_e64 v2, v0, s2, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v0, s2, s1
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s2, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s2, s0
; GFX10-NEXT: s_movk_i32 s0, 0xff ; GFX10-NEXT: s_movk_i32 s0, 0xff
; GFX10-NEXT: v_and_b32_sdwa v3, v1, s0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX10-NEXT: v_and_b32_sdwa v3, v1, s0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX10-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX10-NEXT: global_store_short v[0:1], v2, off ; GFX10-NEXT: global_store_short v[0:1], v2, off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <2 x i8>, <2 x i8> addrspace(1 )* %ptr %vec = load <2 x i8>, <2 x i8> addrspace(1 )* %ptr
%insert = insertelement <2 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <2 x i8> %vec, i8 %val, i32 %idx
store <2 x i8> %insert, <2 x i8> addrspace(1)* null store <2 x i8> %insert, <2 x i8> addrspace(1)* null
ret void ret void
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; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
; GFX10-NEXT: s_movk_i32 s0, 0xff ; GFX10-NEXT: s_movk_i32 s0, 0xff
; GFX10-NEXT: global_load_ushort v1, v1, s[2:3] ; GFX10-NEXT: global_load_ushort v1, v1, s[2:3]
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v2, 8, v1 ; GFX10-NEXT: v_lshrrev_b32_e32 v2, 8, v1
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s4, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s4, vcc_lo
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_and_b32_sdwa v2, v2, s0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX10-NEXT: v_and_b32_sdwa v2, v2, s0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX10-NEXT: v_cndmask_b32_e64 v3, v1, s4, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e64 v3, v1, s4, vcc_lo
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX10-NEXT: v_or_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX10-NEXT: global_store_short v[0:1], v2, off ; GFX10-NEXT: global_store_short v[0:1], v2, off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <2 x i8>, <2 x i8> addrspace(4)* %ptr %vec = load <2 x i8>, <2 x i8> addrspace(4)* %ptr
%insert = insertelement <2 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <2 x i8> %vec, i8 %val, i32 %idx
store <2 x i8> %insert, <2 x i8> addrspace(1)* null store <2 x i8> %insert, <2 x i8> addrspace(1)* null
ret void ret void
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; GFX10-NEXT: v_mov_b32_e32 v2, 0 ; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1
; GFX10-NEXT: s_movk_i32 s0, 0xff ; GFX10-NEXT: s_movk_i32 s0, 0xff
; GFX10-NEXT: global_load_ushort v2, v2, s[2:3] ; GFX10-NEXT: global_load_ushort v2, v2, s[2:3]
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: v_lshrrev_b32_e32 v3, 8, v2 ; GFX10-NEXT: v_lshrrev_b32_e32 v3, 8, v2
; GFX10-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc_lo
; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v1 ; GFX10-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v1
; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_and_b32_sdwa v3, v3, s0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX10-NEXT: v_and_b32_sdwa v3, v3, s0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc_lo
; GFX10-NEXT: v_mov_b32_e32 v0, 0 ; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX10-NEXT: v_or_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX10-NEXT: global_store_short v[0:1], v2, off ; GFX10-NEXT: global_store_short v[0:1], v2, off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <2 x i8>, <2 x i8> addrspace(4)* %ptr %vec = load <2 x i8>, <2 x i8> addrspace(4)* %ptr
%insert = insertelement <2 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <2 x i8> %vec, i8 %val, i32 %idx
store <2 x i8> %insert, <2 x i8> addrspace(1)* null store <2 x i8> %insert, <2 x i8> addrspace(1)* null
ret void ret void
} }
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; GFX10-NEXT: v_lshlrev_b32_e64 v1, v1, s0 ; GFX10-NEXT: v_lshlrev_b32_e64 v1, v1, s0
; GFX10-NEXT: v_or3_b32 v0, v0, v5, v2 ; GFX10-NEXT: v_or3_b32 v0, v0, v5, v2
; GFX10-NEXT: v_mov_b32_e32 v2, 8 ; GFX10-NEXT: v_mov_b32_e32 v2, 8
; GFX10-NEXT: v_and_or_b32 v0, v0, v3, v1 ; GFX10-NEXT: v_and_or_b32 v0, v0, v3, v1
; GFX10-NEXT: v_mov_b32_e32 v1, 16 ; GFX10-NEXT: v_mov_b32_e32 v1, 16
; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-NEXT: v_lshrrev_b32_e32 v3, 24, v0 ; GFX10-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX10-NEXT: v_lshlrev_b32_sdwa v4, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX10-NEXT: v_lshlrev_b32_sdwa v4, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_and_or_b32 v2, v0, s1, v2 ; GFX10-NEXT: v_and_or_b32 v2, v0, s1, v2
; GFX10-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; GFX10-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX10-NEXT: v_mov_b32_e32 v0, 0 ; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_or3_b32 v2, v2, v4, v3 ; GFX10-NEXT: v_or3_b32 v2, v2, v4, v3
; GFX10-NEXT: global_store_dword v[0:1], v2, off ; GFX10-NEXT: global_store_dword v[0:1], v2, off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <4 x i8>, <4 x i8> addrspace(1)* %ptr %vec = load <4 x i8>, <4 x i8> addrspace(1)* %ptr
%insert = insertelement <4 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <4 x i8> %vec, i8 %val, i32 %idx
store <4 x i8> %insert, <4 x i8> addrspace(1)* null store <4 x i8> %insert, <4 x i8> addrspace(1)* null
ret void ret void
} }
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; GFX10-NEXT: v_lshlrev_b32_e32 v3, 24, v4 ; GFX10-NEXT: v_lshlrev_b32_e32 v3, 24, v4
; GFX10-NEXT: v_or3_b32 v0, v0, v6, v3 ; GFX10-NEXT: v_or3_b32 v0, v0, v6, v3
; GFX10-NEXT: v_mov_b32_e32 v3, 8 ; GFX10-NEXT: v_mov_b32_e32 v3, 8
; GFX10-NEXT: v_and_or_b32 v0, v0, v2, v1 ; GFX10-NEXT: v_and_or_b32 v0, v0, v2, v1
; GFX10-NEXT: v_mov_b32_e32 v1, 16 ; GFX10-NEXT: v_mov_b32_e32 v1, 16
; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-NEXT: v_lshrrev_b32_e32 v3, 24, v0 ; GFX10-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX10-NEXT: v_lshlrev_b32_sdwa v4, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX10-NEXT: v_lshlrev_b32_sdwa v4, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_and_or_b32 v2, 0xff, v0, v2 ; GFX10-NEXT: v_and_or_b32 v2, 0xff, v0, v2
; GFX10-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; GFX10-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX10-NEXT: v_mov_b32_e32 v0, 0 ; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_or3_b32 v2, v2, v4, v3 ; GFX10-NEXT: v_or3_b32 v2, v2, v4, v3
; GFX10-NEXT: global_store_dword v[0:1], v2, off ; GFX10-NEXT: global_store_dword v[0:1], v2, off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <4 x i8>, <4 x i8> addrspace(1)* %ptr %vec = load <4 x i8>, <4 x i8> addrspace(1)* %ptr
%insert = insertelement <4 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <4 x i8> %vec, i8 %val, i32 %idx
store <4 x i8> %insert, <4 x i8> addrspace(1)* null store <4 x i8> %insert, <4 x i8> addrspace(1)* null
ret void ret void
} }
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; GFX7-NEXT: s_lshr_b32 s5, s3, 24 ; GFX7-NEXT: s_lshr_b32 s5, s3, 24
; GFX7-NEXT: s_lshl_b32 s6, s6, 8 ; GFX7-NEXT: s_lshl_b32 s6, s6, 8
; GFX7-NEXT: s_bfe_u32 s3, s3, s9 ; GFX7-NEXT: s_bfe_u32 s3, s3, s9
; GFX7-NEXT: s_or_b32 s4, s4, s6 ; GFX7-NEXT: s_or_b32 s4, s4, s6
; GFX7-NEXT: s_lshl_b32 s3, s3, 16 ; GFX7-NEXT: s_lshl_b32 s3, s3, 16
; GFX7-NEXT: s_or_b32 s3, s4, s3 ; GFX7-NEXT: s_or_b32 s3, s4, s3
; GFX7-NEXT: s_lshl_b32 s4, s5, 24 ; GFX7-NEXT: s_lshl_b32 s4, s5, 24
; GFX7-NEXT: s_or_b32 s3, s3, s4 ; GFX7-NEXT: s_or_b32 s3, s3, s4
; GFX7-NEXT: v_mov_b32_e32 v0, s2
; GFX7-NEXT: s_mov_b64 s[0:1], 0 ; GFX7-NEXT: s_mov_b64 s[0:1], 0
; GFX7-NEXT: v_mov_b32_e32 v0, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s3 ; GFX7-NEXT: v_mov_b32_e32 v1, s3
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-LABEL: insertelement_s_v8i8_s_s: ; GFX10-LABEL: insertelement_s_v8i8_s_s:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
Show All 35 Lines
; GFX10-NEXT: s_andn2_b32 s5, s8, s9 ; GFX10-NEXT: s_andn2_b32 s5, s8, s9
; GFX10-NEXT: s_or_b32 s4, s5, s4 ; GFX10-NEXT: s_or_b32 s4, s5, s4
; GFX10-NEXT: s_cmp_eq_u32 s7, 0 ; GFX10-NEXT: s_cmp_eq_u32 s7, 0
; GFX10-NEXT: s_cselect_b32 s0, s4, s0 ; GFX10-NEXT: s_cselect_b32 s0, s4, s0
; GFX10-NEXT: s_cmp_eq_u32 s7, 1 ; GFX10-NEXT: s_cmp_eq_u32 s7, 1
; GFX10-NEXT: s_cselect_b32 s1, s4, s1 ; GFX10-NEXT: s_cselect_b32 s1, s4, s1
; GFX10-NEXT: s_bfe_u32 s7, s0, s3 ; GFX10-NEXT: s_bfe_u32 s7, s0, s3
; GFX10-NEXT: s_bfe_u32 s3, s1, s3 ; GFX10-NEXT: s_bfe_u32 s3, s1, s3
; GFX10-NEXT: s_lshr_b32 s4, s0, 24
; GFX10-NEXT: s_and_b32 s5, s0, s2 ; GFX10-NEXT: s_and_b32 s5, s0, s2
; GFX10-NEXT: s_bfe_u32 s0, s0, s6
; GFX10-NEXT: s_lshr_b32 s8, s1, 24 ; GFX10-NEXT: s_lshr_b32 s8, s1, 24
; GFX10-NEXT: s_lshl_b32 s7, s7, 8
; GFX10-NEXT: s_and_b32 s2, s1, s2 ; GFX10-NEXT: s_and_b32 s2, s1, s2
; GFX10-NEXT: s_lshl_b32 s3, s3, 8 ; GFX10-NEXT: s_lshl_b32 s3, s3, 8
; GFX10-NEXT: s_bfe_u32 s1, s1, s6 ; GFX10-NEXT: s_bfe_u32 s1, s1, s6
; GFX10-NEXT: s_lshr_b32 s4, s0, 24
; GFX10-NEXT: s_bfe_u32 s0, s0, s6
; GFX10-NEXT: s_lshl_b32 s7, s7, 8
; GFX10-NEXT: s_or_b32 s2, s2, s3
; GFX10-NEXT: s_lshl_b32 s1, s1, 16
; GFX10-NEXT: s_lshl_b32 s0, s0, 16 ; GFX10-NEXT: s_lshl_b32 s0, s0, 16
; GFX10-NEXT: s_or_b32 s5, s5, s7 ; GFX10-NEXT: s_or_b32 s5, s5, s7
; GFX10-NEXT: s_or_b32 s1, s2, s1 ; GFX10-NEXT: s_or_b32 s2, s2, s3
; GFX10-NEXT: s_lshl_b32 s2, s8, 24 ; GFX10-NEXT: s_lshl_b32 s1, s1, 16
; GFX10-NEXT: s_or_b32 s0, s5, s0 ; GFX10-NEXT: s_or_b32 s0, s5, s0
; GFX10-NEXT: s_lshl_b32 s3, s4, 24 ; GFX10-NEXT: s_lshl_b32 s3, s4, 24
; GFX10-NEXT: s_or_b32 s1, s1, s2 ; GFX10-NEXT: s_or_b32 s1, s2, s1
; GFX10-NEXT: s_lshl_b32 s2, s8, 24
; GFX10-NEXT: s_or_b32 s0, s0, s3 ; GFX10-NEXT: s_or_b32 s0, s0, s3
; GFX10-NEXT: v_mov_b32_e32 v3, s1 ; GFX10-NEXT: s_or_b32 s1, s1, s2
; GFX10-NEXT: v_mov_b32_e32 v2, s0 ; GFX10-NEXT: v_mov_b32_e32 v2, s0
; GFX10-NEXT: v_mov_b32_e32 v3, s1
; GFX10-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX10-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <8 x i8>, <8 x i8> addrspace(4)* %ptr %vec = load <8 x i8>, <8 x i8> addrspace(4)* %ptr
%insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx
store <8 x i8> %insert, <8 x i8> addrspace(1)* null store <8 x i8> %insert, <8 x i8> addrspace(1)* null
ret void ret void
} }
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; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc_lo
; GFX10-NEXT: v_lshrrev_b32_e32 v2, 24, v0 ; GFX10-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX10-NEXT: v_lshlrev_b32_sdwa v6, s1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX10-NEXT: v_lshlrev_b32_sdwa v6, s1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX10-NEXT: v_and_or_b32 v3, v0, s2, v3 ; GFX10-NEXT: v_and_or_b32 v3, v0, s2, v3
; GFX10-NEXT: v_lshrrev_b32_e32 v4, 24, v1 ; GFX10-NEXT: v_lshrrev_b32_e32 v4, 24, v1
; GFX10-NEXT: v_lshlrev_b32_sdwa v5, s0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX10-NEXT: v_lshlrev_b32_sdwa v5, s0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-NEXT: v_lshlrev_b32_sdwa v7, s1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX10-NEXT: v_lshlrev_b32_sdwa v7, s1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX10-NEXT: v_lshlrev_b32_e32 v2, 24, v2 ; GFX10-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX10-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX10-NEXT: v_and_or_b32 v5, v1, s2, v5 ; GFX10-NEXT: v_and_or_b32 v5, v1, s2, v5
; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_or3_b32 v2, v3, v6, v2 ; GFX10-NEXT: v_or3_b32 v2, v3, v6, v2
; GFX10-NEXT: v_or3_b32 v3, v5, v7, v4 ; GFX10-NEXT: v_or3_b32 v3, v5, v7, v4
; GFX10-NEXT: global_store_dwordx2 v[0:1], v[2:3], off ; GFX10-NEXT: global_store_dwordx2 v[0:1], v[2:3], off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <8 x i8>, <8 x i8> addrspace(4)* %ptr %vec = load <8 x i8>, <8 x i8> addrspace(4)* %ptr
%insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx
store <8 x i8> %insert, <8 x i8> addrspace(1)* null store <8 x i8> %insert, <8 x i8> addrspace(1)* null
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; GFX7-NEXT: s_and_b32 s2, s3, s10 ; GFX7-NEXT: s_and_b32 s2, s3, s10
; GFX7-NEXT: s_lshl_b32 s7, s7, 8 ; GFX7-NEXT: s_lshl_b32 s7, s7, 8
; GFX7-NEXT: s_bfe_u32 s3, s3, s13 ; GFX7-NEXT: s_bfe_u32 s3, s3, s13
; GFX7-NEXT: s_or_b32 s2, s2, s7 ; GFX7-NEXT: s_or_b32 s2, s2, s7
; GFX7-NEXT: s_lshl_b32 s3, s3, 16 ; GFX7-NEXT: s_lshl_b32 s3, s3, 16
; GFX7-NEXT: s_or_b32 s2, s2, s3 ; GFX7-NEXT: s_or_b32 s2, s2, s3
; GFX7-NEXT: s_lshl_b32 s3, s9, 24 ; GFX7-NEXT: s_lshl_b32 s3, s9, 24
; GFX7-NEXT: s_or_b32 s7, s2, s3 ; GFX7-NEXT: s_or_b32 s7, s2, s3
; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: s_mov_b64 s[0:1], 0 ; GFX7-NEXT: s_mov_b64 s[0:1], 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s6 ; GFX7-NEXT: v_mov_b32_e32 v2, s6
; GFX7-NEXT: v_mov_b32_e32 v3, s7 ; GFX7-NEXT: v_mov_b32_e32 v3, s7
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX8-NEXT: v_or_b32_sdwa v4, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v10, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v10, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX8-NEXT: v_or_b32_e32 v1, v4, v1 ; GFX8-NEXT: v_or_b32_e32 v1, v4, v1
; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v5 ; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v5
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
; GFX8-NEXT: v_mov_b32_e32 v4, 8 ; GFX8-NEXT: v_mov_b32_e32 v4, 8
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX8-NEXT: v_mov_b32_e32 v8, 16 ; GFX8-NEXT: v_mov_b32_e32 v8, 16
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 24, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 24, v2
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v3
; GFX8-NEXT: v_or_b32_sdwa v5, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v5, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v8, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v8, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v3
; GFX8-NEXT: v_or_b32_e32 v2, v5, v2
; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v6
; GFX8-NEXT: v_or_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v8, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v8, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX8-NEXT: v_or_b32_e32 v2, v2, v5 ; GFX8-NEXT: v_or_b32_e32 v2, v5, v2
; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v6
; GFX8-NEXT: v_or_b32_e32 v3, v4, v3 ; GFX8-NEXT: v_or_b32_e32 v3, v4, v3
; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v7 ; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v7
; GFX8-NEXT: v_or_b32_e32 v2, v2, v5
; GFX8-NEXT: v_mov_b32_e32 v4, 0 ; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: v_or_b32_e32 v3, v3, v6 ; GFX8-NEXT: v_or_b32_e32 v3, v3, v6
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v16i8_v_s: ; GFX7-LABEL: insertelement_s_v16i8_v_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
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; GFX10-NEXT: s_lshl_b32 s6, s11, 24 ; GFX10-NEXT: s_lshl_b32 s6, s11, 24
; GFX10-NEXT: s_lshr_b32 s7, s4, 2 ; GFX10-NEXT: s_lshr_b32 s7, s4, 2
; GFX10-NEXT: s_or_b32 s2, s2, s8 ; GFX10-NEXT: s_or_b32 s2, s2, s8
; GFX10-NEXT: s_or_b32 s3, s3, s6 ; GFX10-NEXT: s_or_b32 s3, s3, s6
; GFX10-NEXT: s_cmp_eq_u32 s7, 1 ; GFX10-NEXT: s_cmp_eq_u32 s7, 1
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s7, 0 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s7, 0
; GFX10-NEXT: s_cselect_b32 s6, s1, s0 ; GFX10-NEXT: s_cselect_b32 s6, s1, s0
; GFX10-NEXT: s_cmp_eq_u32 s7, 2 ; GFX10-NEXT: s_cmp_eq_u32 s7, 2
; GFX10-NEXT: v_mov_b32_e32 v1, s1
; GFX10-NEXT: s_cselect_b32 s6, s2, s6 ; GFX10-NEXT: s_cselect_b32 s6, s2, s6
; GFX10-NEXT: s_cmp_eq_u32 s7, 3 ; GFX10-NEXT: s_cmp_eq_u32 s7, 3
; GFX10-NEXT: v_mov_b32_e32 v2, s2
; GFX10-NEXT: s_cselect_b32 s6, s3, s6 ; GFX10-NEXT: s_cselect_b32 s6, s3, s6
; GFX10-NEXT: s_and_b32 s4, s4, 3 ; GFX10-NEXT: s_and_b32 s4, s4, 3
; GFX10-NEXT: v_mov_b32_e32 v3, s3
; GFX10-NEXT: s_lshl_b32 s4, s4, 3 ; GFX10-NEXT: s_lshl_b32 s4, s4, 3
; GFX10-NEXT: s_mov_b32 s1, 16
; GFX10-NEXT: s_lshl_b32 s8, s5, s4 ; GFX10-NEXT: s_lshl_b32 s8, s5, s4
; GFX10-NEXT: s_andn2_b32 s6, s6, s8 ; GFX10-NEXT: s_andn2_b32 s6, s6, s8
; GFX10-NEXT: v_lshl_or_b32 v4, v0, s4, s6 ; GFX10-NEXT: v_lshl_or_b32 v4, v0, s4, s6
; GFX10-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-NEXT: v_mov_b32_e32 v0, s0
; GFX10-NEXT: v_mov_b32_e32 v1, s1
; GFX10-NEXT: v_mov_b32_e32 v2, s2
; GFX10-NEXT: v_mov_b32_e32 v3, s3
; GFX10-NEXT: s_mov_b32 s0, 8 ; GFX10-NEXT: s_mov_b32 s0, 8
; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc_lo
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s7, 1 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s7, 1
; GFX10-NEXT: s_mov_b32 s1, 16
; GFX10-NEXT: v_lshlrev_b32_sdwa v6, s0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX10-NEXT: v_lshlrev_b32_sdwa v6, s0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc_lo
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s7, 2 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s7, 2
; GFX10-NEXT: v_and_or_b32 v6, v0, s5, v6 ; GFX10-NEXT: v_and_or_b32 v6, v0, s5, v6
; GFX10-NEXT: v_lshrrev_b32_e32 v5, 24, v1 ; GFX10-NEXT: v_lshrrev_b32_e32 v5, 24, v1
; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc_lo
; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s7, 3 ; GFX10-NEXT: v_cmp_eq_u32_e64 vcc_lo, s7, 3
; GFX10-NEXT: v_lshlrev_b32_sdwa v9, s0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX10-NEXT: v_lshlrev_b32_sdwa v9, s0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
Show All 11 Lines
; GFX10-NEXT: v_and_or_b32 v11, v2, s5, v11 ; GFX10-NEXT: v_and_or_b32 v11, v2, s5, v11
; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v12, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v12, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX10-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; GFX10-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX10-NEXT: v_and_or_b32 v10, v3, s5, v10 ; GFX10-NEXT: v_and_or_b32 v10, v3, s5, v10
; GFX10-NEXT: v_lshlrev_b32_sdwa v3, v12, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX10-NEXT: v_lshlrev_b32_sdwa v3, v12, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX10-NEXT: v_lshlrev_b32_e32 v8, 24, v8 ; GFX10-NEXT: v_lshlrev_b32_e32 v8, 24, v8
; GFX10-NEXT: v_or3_b32 v0, v6, v0, v4 ; GFX10-NEXT: v_or3_b32 v0, v6, v0, v4
; GFX10-NEXT: v_or3_b32 v1, v9, v1, v5 ; GFX10-NEXT: v_or3_b32 v1, v9, v1, v5
; GFX10-NEXT: v_mov_b32_e32 v4, 0
; GFX10-NEXT: v_or3_b32 v2, v11, v2, v7 ; GFX10-NEXT: v_or3_b32 v2, v11, v2, v7
; GFX10-NEXT: v_mov_b32_e32 v4, 0
; GFX10-NEXT: v_mov_b32_e32 v5, 0 ; GFX10-NEXT: v_mov_b32_e32 v5, 0
; GFX10-NEXT: v_or3_b32 v3, v10, v3, v8 ; GFX10-NEXT: v_or3_b32 v3, v10, v3, v8
; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <16 x i8>, <16 x i8> addrspace(4)* %ptr %vec = load <16 x i8>, <16 x i8> addrspace(4)* %ptr
%insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx
store <16 x i8> %insert, <16 x i8> addrspace(1)* null store <16 x i8> %insert, <16 x i8> addrspace(1)* null
ret void ret void
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; GFX8-NEXT: v_or_b32_sdwa v4, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v10, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v10, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX8-NEXT: v_or_b32_e32 v1, v4, v1 ; GFX8-NEXT: v_or_b32_e32 v1, v4, v1
; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v5 ; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v5
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
; GFX8-NEXT: v_mov_b32_e32 v4, 8 ; GFX8-NEXT: v_mov_b32_e32 v4, 8
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX8-NEXT: v_mov_b32_e32 v8, 16 ; GFX8-NEXT: v_mov_b32_e32 v8, 16
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 24, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 24, v2
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v3
; GFX8-NEXT: v_or_b32_sdwa v5, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v5, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v8, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v8, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v3
; GFX8-NEXT: v_or_b32_e32 v2, v5, v2
; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v6
; GFX8-NEXT: v_or_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v8, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v8, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX8-NEXT: v_or_b32_e32 v2, v2, v5 ; GFX8-NEXT: v_or_b32_e32 v2, v5, v2
; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v6
; GFX8-NEXT: v_or_b32_e32 v3, v4, v3 ; GFX8-NEXT: v_or_b32_e32 v3, v4, v3
; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v7 ; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v7
; GFX8-NEXT: v_or_b32_e32 v2, v2, v5
; GFX8-NEXT: v_mov_b32_e32 v4, 0 ; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: v_or_b32_e32 v3, v3, v6 ; GFX8-NEXT: v_or_b32_e32 v3, v3, v6
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v16i8_s_v: ; GFX7-LABEL: insertelement_s_v16i8_s_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
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; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v4 ; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v4
; GFX10-NEXT: s_lshr_b32 s11, s3, 24 ; GFX10-NEXT: s_lshr_b32 s11, s3, 24
; GFX10-NEXT: s_mov_b32 s3, 8 ; GFX10-NEXT: s_mov_b32 s3, 8
; GFX10-NEXT: s_lshl_b32 s2, s11, 24 ; GFX10-NEXT: s_lshl_b32 s2, s11, 24
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s10, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s10, s0
; GFX10-NEXT: s_or_b32 s11, s1, s2 ; GFX10-NEXT: s_or_b32 s11, s1, s2
; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v4 ; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v4
; GFX10-NEXT: s_and_b32 s2, s4, s5 ; GFX10-NEXT: s_and_b32 s2, s4, s5
; GFX10-NEXT: v_mov_b32_e32 v3, s11
; GFX10-NEXT: v_lshlrev_b32_e64 v0, v0, s2 ; GFX10-NEXT: v_lshlrev_b32_e64 v0, v0, s2
; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 0, v4 ; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 0, v4
; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s11, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v1, v1, s11, s1
; GFX10-NEXT: v_and_or_b32 v5, v1, v2, v0 ; GFX10-NEXT: v_and_or_b32 v5, v1, v2, v0
; GFX10-NEXT: v_mov_b32_e32 v0, s8 ; GFX10-NEXT: v_mov_b32_e32 v0, s8
; GFX10-NEXT: v_mov_b32_e32 v1, s9 ; GFX10-NEXT: v_mov_b32_e32 v1, s9
; GFX10-NEXT: v_mov_b32_e32 v2, s10 ; GFX10-NEXT: v_mov_b32_e32 v2, s10
; GFX10-NEXT: v_mov_b32_e32 v3, s11 ; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v5, s1
; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v5, s2 ; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v5, s2
; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v5, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v5, s0
; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v5, s1
; GFX10-NEXT: s_mov_b32 s2, 16 ; GFX10-NEXT: s_mov_b32 s2, 16
; GFX10-NEXT: v_lshrrev_b32_e32 v8, 24, v3
; GFX10-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX10-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX10-NEXT: v_lshrrev_b32_e32 v5, 24, v1 ; GFX10-NEXT: v_lshrrev_b32_e32 v5, 24, v1
; GFX10-NEXT: v_lshlrev_b32_sdwa v6, s3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX10-NEXT: v_lshlrev_b32_sdwa v6, s3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-NEXT: v_lshlrev_b32_sdwa v9, s3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-NEXT: v_lshrrev_b32_e32 v7, 24, v2 ; GFX10-NEXT: v_lshrrev_b32_e32 v7, 24, v2
; GFX10-NEXT: v_lshrrev_b32_e32 v8, 24, v3 ; GFX10-NEXT: v_lshlrev_b32_sdwa v9, s3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-NEXT: v_lshlrev_b32_sdwa v11, v10, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX10-NEXT: v_lshlrev_b32_sdwa v11, v10, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-NEXT: v_lshlrev_b32_sdwa v10, v10, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX10-NEXT: v_lshlrev_b32_sdwa v10, v10, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-NEXT: v_and_or_b32 v6, v0, s5, v6 ; GFX10-NEXT: v_and_or_b32 v6, v0, s5, v6
; GFX10-NEXT: v_lshlrev_b32_sdwa v0, s2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX10-NEXT: v_lshlrev_b32_sdwa v0, s2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX10-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX10-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX10-NEXT: v_and_or_b32 v9, v1, s5, v9 ; GFX10-NEXT: v_and_or_b32 v9, v1, s5, v9
; GFX10-NEXT: v_lshlrev_b32_sdwa v1, s2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX10-NEXT: v_lshlrev_b32_sdwa v1, s2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX10-NEXT: v_lshlrev_b32_e32 v5, 24, v5 ; GFX10-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; GFX10-NEXT: v_and_or_b32 v11, v2, s5, v11 ; GFX10-NEXT: v_and_or_b32 v11, v2, s5, v11
; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v12, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v12, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX10-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; GFX10-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX10-NEXT: v_and_or_b32 v10, v3, s5, v10 ; GFX10-NEXT: v_and_or_b32 v10, v3, s5, v10
; GFX10-NEXT: v_lshlrev_b32_sdwa v3, v12, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX10-NEXT: v_lshlrev_b32_sdwa v3, v12, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX10-NEXT: v_lshlrev_b32_e32 v8, 24, v8 ; GFX10-NEXT: v_lshlrev_b32_e32 v8, 24, v8
; GFX10-NEXT: v_or3_b32 v0, v6, v0, v4 ; GFX10-NEXT: v_or3_b32 v0, v6, v0, v4
; GFX10-NEXT: v_or3_b32 v1, v9, v1, v5 ; GFX10-NEXT: v_or3_b32 v1, v9, v1, v5
; GFX10-NEXT: v_mov_b32_e32 v4, 0
; GFX10-NEXT: v_or3_b32 v2, v11, v2, v7 ; GFX10-NEXT: v_or3_b32 v2, v11, v2, v7
; GFX10-NEXT: v_mov_b32_e32 v4, 0
; GFX10-NEXT: v_mov_b32_e32 v5, 0 ; GFX10-NEXT: v_mov_b32_e32 v5, 0
; GFX10-NEXT: v_or3_b32 v3, v10, v3, v8 ; GFX10-NEXT: v_or3_b32 v3, v10, v3, v8
; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <16 x i8>, <16 x i8> addrspace(4)* %ptr %vec = load <16 x i8>, <16 x i8> addrspace(4)* %ptr
%insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx
store <16 x i8> %insert, <16 x i8> addrspace(1)* null store <16 x i8> %insert, <16 x i8> addrspace(1)* null
ret void ret void
▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v4 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v4
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_e64 v1, v1, s10 ; GFX9-NEXT: v_lshlrev_b32_e64 v1, v1, s10
; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[2:3]
; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX9-NEXT: v_and_or_b32 v5, v2, v1, v0 ; GFX9-NEXT: v_and_or_b32 v5, v2, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v0, s4 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NEXT: v_mov_b32_e32 v1, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NEXT: v_mov_b32_e32 v2, s6
; GFX9-NEXT: v_mov_b32_e32 v3, s7
; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4
; GFX9-NEXT: s_mov_b32 s8, 8 ; GFX9-NEXT: s_mov_b32 s8, 8
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5]
; GFX9-NEXT: s_mov_b32 s9, 16 ; GFX9-NEXT: s_mov_b32 s9, 16
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v8, s8, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX9-NEXT: v_lshlrev_b32_sdwa v8, s8, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX9-NEXT: v_mov_b32_e32 v2, s6
; GFX9-NEXT: v_mov_b32_e32 v3, s7
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc
; GFX9-NEXT: v_and_or_b32 v8, v0, s10, v8 ; GFX9-NEXT: v_and_or_b32 v8, v0, s10, v8
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s9, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s9, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3]
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v1
; GFX9-NEXT: v_or3_b32 v0, v8, v0, v4 ; GFX9-NEXT: v_or3_b32 v0, v8, v0, v4
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; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_e64 v1, v1, s8 ; GFX8-NEXT: v_lshlrev_b32_e64 v1, v1, s8
; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[2:3]
; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX8-NEXT: v_and_b32_e32 v1, v2, v1 ; GFX8-NEXT: v_and_b32_e32 v1, v2, v1
; GFX8-NEXT: v_or_b32_e32 v5, v1, v0 ; GFX8-NEXT: v_or_b32_e32 v5, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v1, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: v_mov_b32_e32 v2, s6
; GFX8-NEXT: v_mov_b32_e32 v3, s7
; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5]
; GFX8-NEXT: v_mov_b32_e32 v8, 8 ; GFX8-NEXT: v_mov_b32_e32 v8, 8
; GFX8-NEXT: v_lshlrev_b32_sdwa v9, v8, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX8-NEXT: v_lshlrev_b32_sdwa v9, v8, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX8-NEXT: v_mov_b32_e32 v10, 16 ; GFX8-NEXT: v_mov_b32_e32 v10, 16
; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v9, v0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v9, v0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v10, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v10, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc
; GFX8-NEXT: v_or_b32_e32 v0, v9, v0 ; GFX8-NEXT: v_or_b32_e32 v0, v9, v0
; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX8-NEXT: v_mov_b32_e32 v2, s6
; GFX8-NEXT: v_mov_b32_e32 v3, s7
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v8, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v8, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3]
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 24, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v5, 24, v1
; GFX8-NEXT: v_or_b32_sdwa v4, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v10, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v10, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX8-NEXT: v_or_b32_e32 v1, v4, v1 ; GFX8-NEXT: v_or_b32_e32 v1, v4, v1
; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v5 ; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v5
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
; GFX8-NEXT: v_mov_b32_e32 v4, 8 ; GFX8-NEXT: v_mov_b32_e32 v4, 8
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX8-NEXT: v_mov_b32_e32 v8, 16 ; GFX8-NEXT: v_mov_b32_e32 v8, 16
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 24, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 24, v2
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v3
; GFX8-NEXT: v_or_b32_sdwa v5, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v5, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v8, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v8, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v3
; GFX8-NEXT: v_or_b32_e32 v2, v5, v2
; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v6
; GFX8-NEXT: v_or_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v8, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v8, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX8-NEXT: v_or_b32_e32 v2, v2, v5 ; GFX8-NEXT: v_or_b32_e32 v2, v5, v2
; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v6
; GFX8-NEXT: v_or_b32_e32 v3, v4, v3 ; GFX8-NEXT: v_or_b32_e32 v3, v4, v3
; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v7 ; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v7
; GFX8-NEXT: v_or_b32_e32 v2, v2, v5
; GFX8-NEXT: v_mov_b32_e32 v4, 0 ; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: v_or_b32_e32 v3, v3, v6 ; GFX8-NEXT: v_or_b32_e32 v3, v3, v6
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v16i8_v_v: ; GFX7-LABEL: insertelement_s_v16i8_v_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
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; GFX7-NEXT: v_lshlrev_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, v1, v0
; GFX7-NEXT: v_lshl_b32_e32 v1, s8, v1 ; GFX7-NEXT: v_lshl_b32_e32 v1, s8, v1
; GFX7-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[2:3] ; GFX7-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[2:3]
; GFX7-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX7-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX7-NEXT: v_and_b32_e32 v1, v2, v1 ; GFX7-NEXT: v_and_b32_e32 v1, v2, v1
; GFX7-NEXT: v_or_b32_e32 v5, v1, v0 ; GFX7-NEXT: v_or_b32_e32 v5, v1, v0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s6
; GFX7-NEXT: v_mov_b32_e32 v3, s7
; GFX7-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4 ; GFX7-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4
; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5] ; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5]
; GFX7-NEXT: v_bfe_u32 v9, v0, 8, 8 ; GFX7-NEXT: v_bfe_u32 v9, v0, 8, 8
; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX7-NEXT: v_and_b32_e32 v8, s8, v0 ; GFX7-NEXT: v_and_b32_e32 v8, s8, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v9, 8, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v9, 8, v9
; GFX7-NEXT: v_bfe_u32 v0, v0, 16, 8 ; GFX7-NEXT: v_bfe_u32 v0, v0, 16, 8
; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc
; GFX7-NEXT: v_or_b32_e32 v8, v8, v9 ; GFX7-NEXT: v_or_b32_e32 v8, v8, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX7-NEXT: v_mov_b32_e32 v2, s6
; GFX7-NEXT: v_mov_b32_e32 v3, s7
; GFX7-NEXT: v_or_b32_e32 v0, v8, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v8, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_bfe_u32 v8, v1, 8, 8 ; GFX7-NEXT: v_bfe_u32 v8, v1, 8, 8
; GFX7-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1] ; GFX7-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1]
; GFX7-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3] ; GFX7-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3]
; GFX7-NEXT: v_lshrrev_b32_e32 v5, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 24, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_and_b32_e32 v4, s8, v1 ; GFX7-NEXT: v_and_b32_e32 v4, s8, v1
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; GFX10-NEXT: v_cndmask_b32_e32 v2, s4, v2, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v2, s4, v2, vcc_lo
; GFX10-NEXT: s_or_b32 s1, s0, s1 ; GFX10-NEXT: s_or_b32 s1, s0, s1
; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v4 ; GFX10-NEXT: v_cmp_eq_u32_e64 s0, 2, v4
; GFX10-NEXT: s_lshl_b32 s2, s10, 24 ; GFX10-NEXT: s_lshl_b32 s2, s10, 24
; GFX10-NEXT: s_mov_b32 s3, 8 ; GFX10-NEXT: s_mov_b32 s3, 8
; GFX10-NEXT: s_or_b32 s7, s1, s2 ; GFX10-NEXT: s_or_b32 s7, s1, s2
; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v4 ; GFX10-NEXT: v_cmp_eq_u32_e64 s1, 3, v4
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s6, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s6, s0
; GFX10-NEXT: v_mov_b32_e32 v3, s7
; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 0, v4 ; GFX10-NEXT: v_cmp_eq_u32_e64 s2, 0, v4
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s7, s1 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, s7, s1
; GFX10-NEXT: v_and_or_b32 v5, v2, v1, v0 ; GFX10-NEXT: v_and_or_b32 v5, v2, v1, v0
; GFX10-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
; GFX10-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-NEXT: v_mov_b32_e32 v1, s5
; GFX10-NEXT: v_mov_b32_e32 v2, s6 ; GFX10-NEXT: v_mov_b32_e32 v2, s6
; GFX10-NEXT: v_mov_b32_e32 v3, s7 ; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v5, s1
; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v5, s2 ; GFX10-NEXT: v_cndmask_b32_e64 v0, v0, v5, s2
; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo ; GFX10-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc_lo
; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v5, s0 ; GFX10-NEXT: v_cndmask_b32_e64 v2, v2, v5, s0
; GFX10-NEXT: v_cndmask_b32_e64 v3, v3, v5, s1
; GFX10-NEXT: s_mov_b32 s2, 16 ; GFX10-NEXT: s_mov_b32 s2, 16
; GFX10-NEXT: v_lshrrev_b32_e32 v8, 24, v3
; GFX10-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX10-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX10-NEXT: v_lshrrev_b32_e32 v5, 24, v1 ; GFX10-NEXT: v_lshrrev_b32_e32 v5, 24, v1
; GFX10-NEXT: v_lshlrev_b32_sdwa v6, s3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX10-NEXT: v_lshlrev_b32_sdwa v6, s3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-NEXT: v_lshlrev_b32_sdwa v9, s3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-NEXT: v_lshrrev_b32_e32 v7, 24, v2 ; GFX10-NEXT: v_lshrrev_b32_e32 v7, 24, v2
; GFX10-NEXT: v_lshrrev_b32_e32 v8, 24, v3 ; GFX10-NEXT: v_lshlrev_b32_sdwa v9, s3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-NEXT: v_lshlrev_b32_sdwa v11, v10, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX10-NEXT: v_lshlrev_b32_sdwa v11, v10, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-NEXT: v_lshlrev_b32_sdwa v10, v10, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX10-NEXT: v_lshlrev_b32_sdwa v10, v10, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX10-NEXT: v_and_or_b32 v6, v0, s8, v6 ; GFX10-NEXT: v_and_or_b32 v6, v0, s8, v6
; GFX10-NEXT: v_lshlrev_b32_sdwa v0, s2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX10-NEXT: v_lshlrev_b32_sdwa v0, s2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX10-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX10-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX10-NEXT: v_and_or_b32 v9, v1, s8, v9 ; GFX10-NEXT: v_and_or_b32 v9, v1, s8, v9
; GFX10-NEXT: v_lshlrev_b32_sdwa v1, s2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX10-NEXT: v_lshlrev_b32_sdwa v1, s2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX10-NEXT: v_lshlrev_b32_e32 v5, 24, v5 ; GFX10-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; GFX10-NEXT: v_and_or_b32 v11, v2, s8, v11 ; GFX10-NEXT: v_and_or_b32 v11, v2, s8, v11
; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v12, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX10-NEXT: v_lshlrev_b32_sdwa v2, v12, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX10-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; GFX10-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX10-NEXT: v_and_or_b32 v10, v3, s8, v10 ; GFX10-NEXT: v_and_or_b32 v10, v3, s8, v10
; GFX10-NEXT: v_lshlrev_b32_sdwa v3, v12, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX10-NEXT: v_lshlrev_b32_sdwa v3, v12, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX10-NEXT: v_lshlrev_b32_e32 v8, 24, v8 ; GFX10-NEXT: v_lshlrev_b32_e32 v8, 24, v8
; GFX10-NEXT: v_or3_b32 v0, v6, v0, v4 ; GFX10-NEXT: v_or3_b32 v0, v6, v0, v4
; GFX10-NEXT: v_or3_b32 v1, v9, v1, v5 ; GFX10-NEXT: v_or3_b32 v1, v9, v1, v5
; GFX10-NEXT: v_mov_b32_e32 v4, 0
; GFX10-NEXT: v_or3_b32 v2, v11, v2, v7 ; GFX10-NEXT: v_or3_b32 v2, v11, v2, v7
; GFX10-NEXT: v_mov_b32_e32 v4, 0
; GFX10-NEXT: v_mov_b32_e32 v5, 0 ; GFX10-NEXT: v_mov_b32_e32 v5, 0
; GFX10-NEXT: v_or3_b32 v3, v10, v3, v8 ; GFX10-NEXT: v_or3_b32 v3, v10, v3, v8
; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX10-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%vec = load <16 x i8>, <16 x i8> addrspace(4)* %ptr %vec = load <16 x i8>, <16 x i8> addrspace(4)* %ptr
%insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx
store <16 x i8> %insert, <16 x i8> addrspace(1)* null store <16 x i8> %insert, <16 x i8> addrspace(1)* null
ret void ret void
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; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 24, v9 ; GFX9-NEXT: v_lshrrev_b32_e32 v10, 24, v9
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 24, v6 ; GFX9-NEXT: v_lshrrev_b32_e32 v11, 24, v6
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 24, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v12, 24, v2
; GFX9-NEXT: v_lshlrev_b32_sdwa v13, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX9-NEXT: v_lshlrev_b32_sdwa v13, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX9-NEXT: v_lshlrev_b32_sdwa v15, v1, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX9-NEXT: v_lshlrev_b32_sdwa v15, v1, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX9-NEXT: v_lshlrev_b32_sdwa v17, v1, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX9-NEXT: v_lshlrev_b32_sdwa v17, v1, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_lshlrev_b32_sdwa v14, v8, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX9-NEXT: v_lshlrev_b32_sdwa v14, v8, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX9-NEXT: v_lshlrev_b32_sdwa v16, v8, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX9-NEXT: v_lshlrev_b32_sdwa v16, v8, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX9-NEXT: v_lshlrev_b32_sdwa v18, v8, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX9-NEXT: v_lshlrev_b32_sdwa v18, v8, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX9-NEXT: v_lshlrev_b32_sdwa v8, v8, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX9-NEXT: v_lshlrev_b32_sdwa v8, v8, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX9-NEXT: v_and_or_b32 v3, v3, v0, v13 ; GFX9-NEXT: v_and_or_b32 v3, v3, v0, v13
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX9-NEXT: v_and_or_b32 v9, v9, v0, v15 ; GFX9-NEXT: v_and_or_b32 v9, v9, v0, v15
; GFX9-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 24, v10
; GFX9-NEXT: v_and_or_b32 v6, v6, v0, v17 ; GFX9-NEXT: v_and_or_b32 v6, v6, v0, v17
; GFX9-NEXT: v_lshlrev_b32_e32 v11, 24, v11 ; GFX9-NEXT: v_lshlrev_b32_e32 v11, 24, v11
; GFX9-NEXT: v_and_or_b32 v13, v2, v0, v1 ; GFX9-NEXT: v_and_or_b32 v13, v2, v0, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v12, 24, v12 ; GFX9-NEXT: v_lshlrev_b32_e32 v12, 24, v12
; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: v_or3_b32 v0, v3, v14, v7 ; GFX9-NEXT: v_or3_b32 v0, v3, v14, v7
; GFX9-NEXT: v_or3_b32 v1, v9, v16, v10 ; GFX9-NEXT: v_or3_b32 v1, v9, v16, v10
; GFX9-NEXT: v_or3_b32 v2, v6, v18, v11 ; GFX9-NEXT: v_or3_b32 v2, v6, v18, v11
; GFX9-NEXT: v_or3_b32 v3, v13, v8, v12 ; GFX9-NEXT: v_or3_b32 v3, v13, v8, v12
; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
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; GFX8-NEXT: v_lshlrev_b32_sdwa v13, v10, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX8-NEXT: v_lshlrev_b32_sdwa v13, v10, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX8-NEXT: v_lshlrev_b32_sdwa v15, v10, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX8-NEXT: v_lshlrev_b32_sdwa v15, v10, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX8-NEXT: v_lshlrev_b32_sdwa v17, v10, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX8-NEXT: v_lshlrev_b32_sdwa v17, v10, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX8-NEXT: v_lshlrev_b32_sdwa v10, v10, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2 ; GFX8-NEXT: v_lshlrev_b32_sdwa v10, v10, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_2
; GFX8-NEXT: v_or_b32_sdwa v2, v2, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v2, v2, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v1, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v1, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v3, v3, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v3, v3, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v6 ; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; GFX8-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; GFX8-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX8-NEXT: v_lshlrev_b32_e32 v8, 24, v8 ; GFX8-NEXT: v_lshlrev_b32_e32 v8, 24, v8
; GFX8-NEXT: v_lshlrev_b32_e32 v9, 24, v11 ; GFX8-NEXT: v_lshlrev_b32_e32 v9, 24, v11
; GFX8-NEXT: v_or_b32_e32 v2, v2, v13 ; GFX8-NEXT: v_or_b32_e32 v2, v2, v13
; GFX8-NEXT: v_or_b32_e32 v1, v1, v15 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v15
; GFX8-NEXT: v_or_b32_e32 v3, v3, v17 ; GFX8-NEXT: v_or_b32_e32 v3, v3, v17
; GFX8-NEXT: v_or_b32_e32 v10, v0, v10 ; GFX8-NEXT: v_or_b32_e32 v10, v0, v10
; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: v_or_b32_e32 v0, v2, v6 ; GFX8-NEXT: v_or_b32_e32 v0, v2, v6
; GFX8-NEXT: v_or_b32_e32 v1, v1, v7 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v7
; GFX8-NEXT: v_or_b32_e32 v2, v3, v8 ; GFX8-NEXT: v_or_b32_e32 v2, v3, v8
; GFX8-NEXT: v_or_b32_e32 v3, v10, v9 ; GFX8-NEXT: v_or_b32_e32 v3, v10, v9
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
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llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll

Show First 20 Lines • Show All 94 Lines • ▼ Show 20 Linesentry:
%insert = insertelement <8 x i8 addrspace(3)*> %vec, i8 addrspace(3)* %val, i32 %idx %insert = insertelement <8 x i8 addrspace(3)*> %vec, i8 addrspace(3)* %val, i32 %idx
ret <8 x i8 addrspace(3)*> %insert ret <8 x i8 addrspace(3)*> %insert
} }
define <8 x float> @dyn_insertelement_v8f32_const_s_v_v(float %val, i32 %idx) { define <8 x float> @dyn_insertelement_v8f32_const_s_v_v(float %val, i32 %idx) {
; GPRIDX-LABEL: dyn_insertelement_v8f32_const_s_v_v: ; GPRIDX-LABEL: dyn_insertelement_v8f32_const_s_v_v:
; GPRIDX: ; %bb.0: ; %entry ; GPRIDX: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GPRIDX-NEXT: s_mov_b32 s11, 0x41000000
; GPRIDX-NEXT: s_mov_b32 s10, 0x40e00000
; GPRIDX-NEXT: s_mov_b32 s9, 0x40c00000
; GPRIDX-NEXT: s_mov_b32 s8, 0x40a00000
; GPRIDX-NEXT: s_mov_b32 s7, 4.0
; GPRIDX-NEXT: s_mov_b32 s6, 0x40400000
; GPRIDX-NEXT: s_mov_b32 s5, 2.0
; GPRIDX-NEXT: s_mov_b32 s4, 1.0 ; GPRIDX-NEXT: s_mov_b32 s4, 1.0
; GPRIDX-NEXT: v_mov_b32_e32 v15, s11 ; GPRIDX-NEXT: s_mov_b32 s5, 2.0
; GPRIDX-NEXT: v_mov_b32_e32 v8, s4 ; GPRIDX-NEXT: v_mov_b32_e32 v8, s4
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1
; GPRIDX-NEXT: s_mov_b32 s6, 0x40400000
; GPRIDX-NEXT: v_mov_b32_e32 v9, s5 ; GPRIDX-NEXT: v_mov_b32_e32 v9, s5
; GPRIDX-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v1
; GPRIDX-NEXT: s_mov_b32 s7, 4.0
; GPRIDX-NEXT: v_mov_b32_e32 v10, s6 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s6
; GPRIDX-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v1
; GPRIDX-NEXT: s_mov_b32 s8, 0x40a00000
; GPRIDX-NEXT: v_mov_b32_e32 v11, s7 ; GPRIDX-NEXT: v_mov_b32_e32 v11, s7
; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v1
; GPRIDX-NEXT: s_mov_b32 s9, 0x40c00000
; GPRIDX-NEXT: v_mov_b32_e32 v12, s8 ; GPRIDX-NEXT: v_mov_b32_e32 v12, s8
; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v1
; GPRIDX-NEXT: s_mov_b32 s10, 0x40e00000
; GPRIDX-NEXT: v_mov_b32_e32 v13, s9 ; GPRIDX-NEXT: v_mov_b32_e32 v13, s9
; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v1
; GPRIDX-NEXT: s_mov_b32 s11, 0x41000000
; GPRIDX-NEXT: v_mov_b32_e32 v14, s10 ; GPRIDX-NEXT: v_mov_b32_e32 v14, s10
; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v1
; GPRIDX-NEXT: v_mov_b32_e32 v15, s11
; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v14, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v14, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 7, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 7, v1
; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v15, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v15, v0, vcc
; GPRIDX-NEXT: v_mov_b32_e32 v0, v8 ; GPRIDX-NEXT: v_mov_b32_e32 v0, v8
; GPRIDX-NEXT: v_mov_b32_e32 v1, v9 ; GPRIDX-NEXT: v_mov_b32_e32 v1, v9
; GPRIDX-NEXT: s_setpc_b64 s[30:31] ; GPRIDX-NEXT: s_setpc_b64 s[30:31]
; ;
; MOVREL-LABEL: dyn_insertelement_v8f32_const_s_v_v: ; MOVREL-LABEL: dyn_insertelement_v8f32_const_s_v_v:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; MOVREL-NEXT: s_waitcnt_vscnt null, 0x0 ; MOVREL-NEXT: s_waitcnt_vscnt null, 0x0
; MOVREL-NEXT: s_mov_b32 s11, 0x41000000
; MOVREL-NEXT: s_mov_b32 s4, 1.0 ; MOVREL-NEXT: s_mov_b32 s4, 1.0
; MOVREL-NEXT: s_mov_b32 s10, 0x40e00000
; MOVREL-NEXT: s_mov_b32 s9, 0x40c00000
; MOVREL-NEXT: s_mov_b32 s8, 0x40a00000
; MOVREL-NEXT: s_mov_b32 s7, 4.0
; MOVREL-NEXT: s_mov_b32 s6, 0x40400000
; MOVREL-NEXT: s_mov_b32 s5, 2.0
; MOVREL-NEXT: v_mov_b32_e32 v15, s11
; MOVREL-NEXT: v_mov_b32_e32 v8, s4
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v1
; MOVREL-NEXT: v_mov_b32_e32 v8, s4
; MOVREL-NEXT: s_mov_b32 s5, 2.0
; MOVREL-NEXT: s_mov_b32 s6, 0x40400000
; MOVREL-NEXT: v_mov_b32_e32 v9, s5 ; MOVREL-NEXT: v_mov_b32_e32 v9, s5
; MOVREL-NEXT: v_mov_b32_e32 v10, s6 ; MOVREL-NEXT: v_mov_b32_e32 v10, s6
; MOVREL-NEXT: v_mov_b32_e32 v11, s7
; MOVREL-NEXT: v_mov_b32_e32 v12, s8
; MOVREL-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1
; MOVREL-NEXT: v_mov_b32_e32 v13, s9 ; MOVREL-NEXT: s_mov_b32 s7, 4.0
; MOVREL-NEXT: v_mov_b32_e32 v14, s10 ; MOVREL-NEXT: s_mov_b32 s8, 0x40a00000
; MOVREL-NEXT: v_mov_b32_e32 v11, s7
; MOVREL-NEXT: v_mov_b32_e32 v12, s8
; MOVREL-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v1
; MOVREL-NEXT: s_mov_b32 s9, 0x40c00000
; MOVREL-NEXT: s_mov_b32 s10, 0x40e00000
; MOVREL-NEXT: v_mov_b32_e32 v13, s9
; MOVREL-NEXT: v_mov_b32_e32 v14, s10
; MOVREL-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v1
; MOVREL-NEXT: s_mov_b32 s11, 0x41000000
; MOVREL-NEXT: v_mov_b32_e32 v15, s11
; MOVREL-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v1
; MOVREL-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v1
; MOVREL-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v1
; MOVREL-NEXT: v_cndmask_b32_e32 v6, v14, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v6, v14, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v1
; MOVREL-NEXT: v_mov_b32_e32 v1, v9 ; MOVREL-NEXT: v_mov_b32_e32 v1, v9
; MOVREL-NEXT: v_cndmask_b32_e32 v7, v15, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v7, v15, v0, vcc_lo
; MOVREL-NEXT: v_mov_b32_e32 v0, v8 ; MOVREL-NEXT: v_mov_b32_e32 v0, v8
; MOVREL-NEXT: s_setpc_b64 s[30:31] ; MOVREL-NEXT: s_setpc_b64 s[30:31]
entry: entry:
%insert = insertelement <8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, float %val, i32 %idx %insert = insertelement <8 x float> <float 1.0, float 2.0, float 3.0, float 4.0, float 5.0, float 6.0, float 7.0, float 8.0>, float %val, i32 %idx
ret <8 x float> %insert ret <8 x float> %insert
} }
define amdgpu_ps <8 x float> @dyn_insertelement_v8f32_s_s_v(<8 x float> inreg %vec, float inreg %val, i32 %idx) { define amdgpu_ps <8 x float> @dyn_insertelement_v8f32_s_s_v(<8 x float> inreg %vec, float inreg %val, i32 %idx) {
; GPRIDX-LABEL: dyn_insertelement_v8f32_s_s_v: ; GPRIDX-LABEL: dyn_insertelement_v8f32_s_s_v:
; GPRIDX: ; %bb.0: ; %entry ; GPRIDX: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s0, s2 ; GPRIDX-NEXT: s_mov_b32 s0, s2
; GPRIDX-NEXT: s_mov_b32 s2, s4 ; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: v_mov_b32_e32 v15, s7
; GPRIDX-NEXT: v_mov_b32_e32 v8, s0 ; GPRIDX-NEXT: v_mov_b32_e32 v8, s0
; GPRIDX-NEXT: v_mov_b32_e32 v7, s10 ; GPRIDX-NEXT: v_mov_b32_e32 v7, s10
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: v_mov_b32_e32 v9, s1 ; GPRIDX-NEXT: v_mov_b32_e32 v9, s1
; GPRIDX-NEXT: v_cndmask_b32_e32 v8, v8, v7, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v8, v8, v7, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: v_mov_b32_e32 v10, s2 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s2
; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v9, v7, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v9, v7, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v0
; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: v_mov_b32_e32 v11, s3 ; GPRIDX-NEXT: v_mov_b32_e32 v11, s3
; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v10, v7, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v10, v7, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v0
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: v_mov_b32_e32 v12, s4 ; GPRIDX-NEXT: v_mov_b32_e32 v12, s4
; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v11, v7, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v11, v7, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v0
; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: v_mov_b32_e32 v13, s5 ; GPRIDX-NEXT: v_mov_b32_e32 v13, s5
; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v12, v7, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v12, v7, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v0
; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: v_mov_b32_e32 v14, s6 ; GPRIDX-NEXT: v_mov_b32_e32 v14, s6
; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v13, v7, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v13, v7, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v0
; GPRIDX-NEXT: v_mov_b32_e32 v15, s7
; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v14, v7, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v14, v7, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 7, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 7, v0
; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v15, v7, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v15, v7, vcc
; GPRIDX-NEXT: v_mov_b32_e32 v0, v8 ; GPRIDX-NEXT: v_mov_b32_e32 v0, v8
; GPRIDX-NEXT: ; return to shader part epilog ; GPRIDX-NEXT: ; return to shader part epilog
; ;
; MOVREL-LABEL: dyn_insertelement_v8f32_s_s_v: ; MOVREL-LABEL: dyn_insertelement_v8f32_s_s_v:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s0, s2 ; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: v_mov_b32_e32 v15, s7
; MOVREL-NEXT: v_mov_b32_e32 v8, s0
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0
; MOVREL-NEXT: v_mov_b32_e32 v8, s0
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: v_mov_b32_e32 v9, s1 ; MOVREL-NEXT: v_mov_b32_e32 v9, s1
; MOVREL-NEXT: v_mov_b32_e32 v10, s2 ; MOVREL-NEXT: v_mov_b32_e32 v10, s2
; MOVREL-NEXT: v_mov_b32_e32 v11, s3
; MOVREL-NEXT: v_mov_b32_e32 v12, s4
; MOVREL-NEXT: v_cndmask_b32_e64 v8, v8, s10, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e64 v8, v8, s10, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v0
; MOVREL-NEXT: v_mov_b32_e32 v13, s5 ; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: v_mov_b32_e32 v14, s6 ; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: v_mov_b32_e32 v11, s3
; MOVREL-NEXT: v_mov_b32_e32 v12, s4
; MOVREL-NEXT: v_cndmask_b32_e64 v1, v9, s10, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e64 v1, v9, s10, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v0 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v0
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: v_mov_b32_e32 v13, s5
; MOVREL-NEXT: v_mov_b32_e32 v14, s6
; MOVREL-NEXT: v_cndmask_b32_e64 v2, v10, s10, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e64 v2, v10, s10, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v0 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v0
; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: v_mov_b32_e32 v15, s7
; MOVREL-NEXT: v_cndmask_b32_e64 v3, v11, s10, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e64 v3, v11, s10, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v0 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v0
; MOVREL-NEXT: v_cndmask_b32_e64 v4, v12, s10, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e64 v4, v12, s10, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v0 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v0
; MOVREL-NEXT: v_cndmask_b32_e64 v5, v13, s10, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e64 v5, v13, s10, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v0 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v0
; MOVREL-NEXT: v_cndmask_b32_e64 v6, v14, s10, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e64 v6, v14, s10, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v0 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v0
; MOVREL-NEXT: v_mov_b32_e32 v0, v8 ; MOVREL-NEXT: v_mov_b32_e32 v0, v8
; MOVREL-NEXT: v_cndmask_b32_e64 v7, v15, s10, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e64 v7, v15, s10, vcc_lo
; MOVREL-NEXT: ; return to shader part epilog ; MOVREL-NEXT: ; return to shader part epilog
entry: entry:
%insert = insertelement <8 x float> %vec, float %val, i32 %idx %insert = insertelement <8 x float> %vec, float %val, i32 %idx
ret <8 x float> %insert ret <8 x float> %insert
} }
define amdgpu_ps <8 x float> @dyn_insertelement_v8f32_s_v_s(<8 x float> inreg %vec, float %val, i32 inreg %idx) { define amdgpu_ps <8 x float> @dyn_insertelement_v8f32_s_v_s(<8 x float> inreg %vec, float %val, i32 inreg %idx) {
; GPRIDX-LABEL: dyn_insertelement_v8f32_s_v_s: ; GPRIDX-LABEL: dyn_insertelement_v8f32_s_v_s:
; GPRIDX: ; %bb.0: ; %entry ; GPRIDX: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s0, s2 ; GPRIDX-NEXT: s_mov_b32 s0, s2
; GPRIDX-NEXT: s_mov_b32 s2, s4 ; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: v_mov_b32_e32 v15, s7
; GPRIDX-NEXT: v_mov_b32_e32 v8, s0 ; GPRIDX-NEXT: v_mov_b32_e32 v8, s0
; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 0 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 0
; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: v_mov_b32_e32 v9, s1 ; GPRIDX-NEXT: v_mov_b32_e32 v9, s1
; GPRIDX-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 1 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 1
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: v_mov_b32_e32 v10, s2 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s2
; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v9, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v9, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 2 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 2
; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: v_mov_b32_e32 v11, s3 ; GPRIDX-NEXT: v_mov_b32_e32 v11, s3
; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 3 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 3
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: v_mov_b32_e32 v12, s4 ; GPRIDX-NEXT: v_mov_b32_e32 v12, s4
; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 4 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 4
; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: v_mov_b32_e32 v13, s5 ; GPRIDX-NEXT: v_mov_b32_e32 v13, s5
; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 5 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 5
; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: v_mov_b32_e32 v14, s6 ; GPRIDX-NEXT: v_mov_b32_e32 v14, s6
; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 6 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 6
; GPRIDX-NEXT: v_mov_b32_e32 v15, s7
; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v14, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v14, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 7 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s10, 7
; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v15, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v15, v0, vcc
; GPRIDX-NEXT: v_mov_b32_e32 v0, v8 ; GPRIDX-NEXT: v_mov_b32_e32 v0, v8
; GPRIDX-NEXT: ; return to shader part epilog ; GPRIDX-NEXT: ; return to shader part epilog
; ;
; MOVREL-LABEL: dyn_insertelement_v8f32_s_v_s: ; MOVREL-LABEL: dyn_insertelement_v8f32_s_v_s:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s0, s2 ; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: v_mov_b32_e32 v15, s7
; MOVREL-NEXT: v_mov_b32_e32 v8, s0
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 0 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 0
; MOVREL-NEXT: v_mov_b32_e32 v8, s0
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: v_mov_b32_e32 v9, s1 ; MOVREL-NEXT: v_mov_b32_e32 v9, s1
; MOVREL-NEXT: v_mov_b32_e32 v10, s2 ; MOVREL-NEXT: v_mov_b32_e32 v10, s2
; MOVREL-NEXT: v_mov_b32_e32 v11, s3
; MOVREL-NEXT: v_mov_b32_e32 v12, s4
; MOVREL-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 1 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 1
; MOVREL-NEXT: v_mov_b32_e32 v13, s5 ; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: v_mov_b32_e32 v14, s6 ; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: v_mov_b32_e32 v11, s3
; MOVREL-NEXT: v_mov_b32_e32 v12, s4
; MOVREL-NEXT: v_cndmask_b32_e32 v1, v9, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v1, v9, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 2 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 2
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: v_mov_b32_e32 v13, s5
; MOVREL-NEXT: v_mov_b32_e32 v14, s6
; MOVREL-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 3 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 3
; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: v_mov_b32_e32 v15, s7
; MOVREL-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 4 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 4
; MOVREL-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 5 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 5
; MOVREL-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 6 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 6
; MOVREL-NEXT: v_cndmask_b32_e32 v6, v14, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v6, v14, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 7 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s10, 7
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
entry: entry:
%insert = insertelement <8 x float> %vec, float %val, i32 %idx %insert = insertelement <8 x float> %vec, float %val, i32 %idx
ret <8 x float> %insert ret <8 x float> %insert
} }
define amdgpu_ps <8 x float> @dyn_insertelement_v8f32_s_v_v(<8 x float> inreg %vec, float %val, i32 %idx) { define amdgpu_ps <8 x float> @dyn_insertelement_v8f32_s_v_v(<8 x float> inreg %vec, float %val, i32 %idx) {
; GPRIDX-LABEL: dyn_insertelement_v8f32_s_v_v: ; GPRIDX-LABEL: dyn_insertelement_v8f32_s_v_v:
; GPRIDX: ; %bb.0: ; %entry ; GPRIDX: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s0, s2 ; GPRIDX-NEXT: s_mov_b32 s0, s2
; GPRIDX-NEXT: s_mov_b32 s2, s4 ; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: v_mov_b32_e32 v15, s7
; GPRIDX-NEXT: v_mov_b32_e32 v8, s0 ; GPRIDX-NEXT: v_mov_b32_e32 v8, s0
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1
; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: v_mov_b32_e32 v9, s1 ; GPRIDX-NEXT: v_mov_b32_e32 v9, s1
; GPRIDX-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v1
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: v_mov_b32_e32 v10, s2 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s2
; GPRIDX-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v1
; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: v_mov_b32_e32 v11, s3 ; GPRIDX-NEXT: v_mov_b32_e32 v11, s3
; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v1
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: v_mov_b32_e32 v12, s4 ; GPRIDX-NEXT: v_mov_b32_e32 v12, s4
; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v1
; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: v_mov_b32_e32 v13, s5 ; GPRIDX-NEXT: v_mov_b32_e32 v13, s5
; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v1
; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: v_mov_b32_e32 v14, s6 ; GPRIDX-NEXT: v_mov_b32_e32 v14, s6
; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v1
; GPRIDX-NEXT: v_mov_b32_e32 v15, s7
; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v14, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v14, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 7, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 7, v1
; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v15, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v15, v0, vcc
; GPRIDX-NEXT: v_mov_b32_e32 v0, v8 ; GPRIDX-NEXT: v_mov_b32_e32 v0, v8
; GPRIDX-NEXT: v_mov_b32_e32 v1, v9 ; GPRIDX-NEXT: v_mov_b32_e32 v1, v9
; GPRIDX-NEXT: ; return to shader part epilog ; GPRIDX-NEXT: ; return to shader part epilog
; ;
; MOVREL-LABEL: dyn_insertelement_v8f32_s_v_v: ; MOVREL-LABEL: dyn_insertelement_v8f32_s_v_v:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s0, s2 ; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: v_mov_b32_e32 v15, s7
; MOVREL-NEXT: v_mov_b32_e32 v8, s0
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v1
; MOVREL-NEXT: v_mov_b32_e32 v8, s0
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: v_mov_b32_e32 v9, s1 ; MOVREL-NEXT: v_mov_b32_e32 v9, s1
; MOVREL-NEXT: v_mov_b32_e32 v10, s2 ; MOVREL-NEXT: v_mov_b32_e32 v10, s2
; MOVREL-NEXT: v_mov_b32_e32 v11, s3
; MOVREL-NEXT: v_mov_b32_e32 v12, s4
; MOVREL-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1
; MOVREL-NEXT: v_mov_b32_e32 v13, s5 ; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: v_mov_b32_e32 v14, s6 ; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: v_mov_b32_e32 v11, s3
; MOVREL-NEXT: v_mov_b32_e32 v12, s4
; MOVREL-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v9, v9, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v1
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: v_mov_b32_e32 v13, s5
; MOVREL-NEXT: v_mov_b32_e32 v14, s6
; MOVREL-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v1
; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: v_mov_b32_e32 v15, s7
; MOVREL-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v1
; MOVREL-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v1
; MOVREL-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v1
; MOVREL-NEXT: v_cndmask_b32_e32 v6, v14, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v6, v14, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 7, v1
▲ Show 20 Lines • Show All 289 Lines • ▼ Show 20 Linesentry:
ret <8 x i8 addrspace(1)*> %insert ret <8 x i8 addrspace(1)*> %insert
} }
define void @dyn_insertelement_v8f64_const_s_v_v(double %val, i32 %idx) { define void @dyn_insertelement_v8f64_const_s_v_v(double %val, i32 %idx) {
; GPRIDX-LABEL: dyn_insertelement_v8f64_const_s_v_v: ; GPRIDX-LABEL: dyn_insertelement_v8f64_const_s_v_v:
; GPRIDX: ; %bb.0: ; %entry ; GPRIDX: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GPRIDX-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GPRIDX-NEXT: s_mov_b32 s18, 0 ; GPRIDX-NEXT: s_mov_b32 s18, 0
; GPRIDX-NEXT: s_mov_b64 s[4:5], 1.0
; GPRIDX-NEXT: s_mov_b32 s19, 0x40200000
; GPRIDX-NEXT: s_mov_b32 s17, 0x401c0000 ; GPRIDX-NEXT: s_mov_b32 s17, 0x401c0000
; GPRIDX-NEXT: s_mov_b32 s16, s18 ; GPRIDX-NEXT: s_mov_b32 s16, s18
; GPRIDX-NEXT: s_mov_b64 s[6:7], 2.0
; GPRIDX-NEXT: s_mov_b64 s[4:5], 1.0
; GPRIDX-NEXT: s_mov_b32 s19, 0x40200000
; GPRIDX-NEXT: s_mov_b32 s15, 0x40180000 ; GPRIDX-NEXT: s_mov_b32 s15, 0x40180000
; GPRIDX-NEXT: s_mov_b32 s14, s18 ; GPRIDX-NEXT: s_mov_b32 s14, s18
; GPRIDX-NEXT: s_mov_b32 s13, 0x40140000 ; GPRIDX-NEXT: s_mov_b32 s13, 0x40140000
; GPRIDX-NEXT: s_mov_b32 s12, s18 ; GPRIDX-NEXT: s_mov_b32 s12, s18
; GPRIDX-NEXT: s_mov_b64 s[10:11], 4.0 ; GPRIDX-NEXT: s_mov_b64 s[10:11], 4.0
; GPRIDX-NEXT: s_mov_b32 s9, 0x40080000 ; GPRIDX-NEXT: s_mov_b32 s9, 0x40080000
; GPRIDX-NEXT: s_mov_b32 s8, s18 ; GPRIDX-NEXT: s_mov_b32 s8, s18
; GPRIDX-NEXT: s_mov_b64 s[6:7], 2.0
; GPRIDX-NEXT: v_mov_b32_e32 v3, s4 ; GPRIDX-NEXT: v_mov_b32_e32 v3, s4
; GPRIDX-NEXT: v_mov_b32_e32 v4, s5 ; GPRIDX-NEXT: v_mov_b32_e32 v4, s5
; GPRIDX-NEXT: v_mov_b32_e32 v5, s6 ; GPRIDX-NEXT: v_mov_b32_e32 v5, s6
; GPRIDX-NEXT: v_mov_b32_e32 v6, s7 ; GPRIDX-NEXT: v_mov_b32_e32 v6, s7
; GPRIDX-NEXT: v_mov_b32_e32 v15, s16
; GPRIDX-NEXT: v_mov_b32_e32 v16, s17
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[16:17], 0, v2
; GPRIDX-NEXT: v_mov_b32_e32 v7, s8 ; GPRIDX-NEXT: v_mov_b32_e32 v7, s8
; GPRIDX-NEXT: v_mov_b32_e32 v8, s9 ; GPRIDX-NEXT: v_mov_b32_e32 v8, s9
; GPRIDX-NEXT: v_mov_b32_e32 v9, s10 ; GPRIDX-NEXT: v_mov_b32_e32 v9, s10
; GPRIDX-NEXT: v_mov_b32_e32 v10, s11 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s11
; GPRIDX-NEXT: v_mov_b32_e32 v11, s12 ; GPRIDX-NEXT: v_mov_b32_e32 v11, s12
; GPRIDX-NEXT: v_mov_b32_e32 v12, s13 ; GPRIDX-NEXT: v_mov_b32_e32 v12, s13
; GPRIDX-NEXT: v_mov_b32_e32 v13, s14 ; GPRIDX-NEXT: v_mov_b32_e32 v13, s14
; GPRIDX-NEXT: v_mov_b32_e32 v14, s15 ; GPRIDX-NEXT: v_mov_b32_e32 v14, s15
; GPRIDX-NEXT: v_mov_b32_e32 v15, s16
; GPRIDX-NEXT: v_mov_b32_e32 v16, s17
; GPRIDX-NEXT: v_mov_b32_e32 v17, s18 ; GPRIDX-NEXT: v_mov_b32_e32 v17, s18
; GPRIDX-NEXT: v_mov_b32_e32 v18, s19 ; GPRIDX-NEXT: v_mov_b32_e32 v18, s19
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[16:17], 0, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[4:5], 2, v2 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[4:5], 2, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[6:7], 3, v2 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[6:7], 3, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[8:9], 4, v2 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[8:9], 4, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[10:11], 5, v2 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[10:11], 5, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[12:13], 6, v2 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[12:13], 6, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[14:15], 7, v2 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[14:15], 7, v2
; GPRIDX-NEXT: v_cndmask_b32_e64 v3, v3, v0, s[16:17] ; GPRIDX-NEXT: v_cndmask_b32_e64 v3, v3, v0, s[16:17]
; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v5, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v5, v0, vcc
Show All 21 Lines
; GPRIDX-NEXT: s_waitcnt vmcnt(0) ; GPRIDX-NEXT: s_waitcnt vmcnt(0)
; GPRIDX-NEXT: s_setpc_b64 s[30:31] ; GPRIDX-NEXT: s_setpc_b64 s[30:31]
; ;
; MOVREL-LABEL: dyn_insertelement_v8f64_const_s_v_v: ; MOVREL-LABEL: dyn_insertelement_v8f64_const_s_v_v:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; MOVREL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; MOVREL-NEXT: s_waitcnt_vscnt null, 0x0 ; MOVREL-NEXT: s_waitcnt_vscnt null, 0x0
; MOVREL-NEXT: s_mov_b32 s18, 0 ; MOVREL-NEXT: s_mov_b32 s18, 0
; MOVREL-NEXT: s_mov_b64 s[6:7], 2.0
; MOVREL-NEXT: s_mov_b64 s[4:5], 1.0 ; MOVREL-NEXT: s_mov_b64 s[4:5], 1.0
; MOVREL-NEXT: s_mov_b32 s19, 0x40200000 ; MOVREL-NEXT: s_mov_b64 s[10:11], 4.0
; MOVREL-NEXT: s_mov_b32 s17, 0x401c0000 ; MOVREL-NEXT: s_mov_b32 s9, 0x40080000
; MOVREL-NEXT: s_mov_b32 s16, s18 ; MOVREL-NEXT: s_mov_b32 s8, s18
; MOVREL-NEXT: s_mov_b32 s15, 0x40180000 ; MOVREL-NEXT: s_mov_b32 s15, 0x40180000
; MOVREL-NEXT: s_mov_b32 s14, s18 ; MOVREL-NEXT: s_mov_b32 s14, s18
; MOVREL-NEXT: s_mov_b32 s13, 0x40140000 ; MOVREL-NEXT: s_mov_b32 s13, 0x40140000
; MOVREL-NEXT: s_mov_b32 s12, s18 ; MOVREL-NEXT: s_mov_b32 s12, s18
; MOVREL-NEXT: s_mov_b64 s[10:11], 4.0
; MOVREL-NEXT: s_mov_b32 s9, 0x40080000
; MOVREL-NEXT: s_mov_b32 s8, s18
; MOVREL-NEXT: s_mov_b64 s[6:7], 2.0
; MOVREL-NEXT: v_mov_b32_e32 v3, s4 ; MOVREL-NEXT: v_mov_b32_e32 v3, s4
; MOVREL-NEXT: v_mov_b32_e32 v4, s5 ; MOVREL-NEXT: v_mov_b32_e32 v4, s5
; MOVREL-NEXT: v_mov_b32_e32 v5, s6 ; MOVREL-NEXT: v_mov_b32_e32 v5, s6
; MOVREL-NEXT: v_mov_b32_e32 v6, s7 ; MOVREL-NEXT: v_mov_b32_e32 v6, s7
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s4, 1, v2
; MOVREL-NEXT: s_mov_b32 s19, 0x40200000
; MOVREL-NEXT: s_mov_b32 s17, 0x401c0000
; MOVREL-NEXT: s_mov_b32 s16, s18
; MOVREL-NEXT: v_mov_b32_e32 v7, s8 ; MOVREL-NEXT: v_mov_b32_e32 v7, s8
; MOVREL-NEXT: v_mov_b32_e32 v8, s9 ; MOVREL-NEXT: v_mov_b32_e32 v8, s9
; MOVREL-NEXT: v_mov_b32_e32 v9, s10 ; MOVREL-NEXT: v_mov_b32_e32 v9, s10
; MOVREL-NEXT: v_mov_b32_e32 v10, s11 ; MOVREL-NEXT: v_mov_b32_e32 v10, s11
; MOVREL-NEXT: v_cmp_eq_u32_e64 s5, 3, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s10, 2, v2
; MOVREL-NEXT: v_mov_b32_e32 v11, s12 ; MOVREL-NEXT: v_mov_b32_e32 v11, s12
; MOVREL-NEXT: v_mov_b32_e32 v12, s13 ; MOVREL-NEXT: v_mov_b32_e32 v12, s13
; MOVREL-NEXT: v_mov_b32_e32 v13, s14 ; MOVREL-NEXT: v_mov_b32_e32 v13, s14
; MOVREL-NEXT: v_mov_b32_e32 v14, s15 ; MOVREL-NEXT: v_mov_b32_e32 v14, s15
; MOVREL-NEXT: v_cmp_eq_u32_e64 s6, 4, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s7, 5, v2
; MOVREL-NEXT: v_mov_b32_e32 v15, s16 ; MOVREL-NEXT: v_mov_b32_e32 v15, s16
; MOVREL-NEXT: v_mov_b32_e32 v16, s17 ; MOVREL-NEXT: v_mov_b32_e32 v16, s17
; MOVREL-NEXT: v_mov_b32_e32 v17, s18 ; MOVREL-NEXT: v_mov_b32_e32 v17, s18
; MOVREL-NEXT: v_mov_b32_e32 v18, s19 ; MOVREL-NEXT: v_mov_b32_e32 v18, s19
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s4, 1, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s5, 3, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s10, 2, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s6, 4, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s7, 5, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s8, 6, v2 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s8, 6, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s9, 7, v2 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s9, 7, v2
; MOVREL-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e64 v5, v5, v0, s4 ; MOVREL-NEXT: v_cndmask_b32_e64 v5, v5, v0, s4
; MOVREL-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e64 v6, v6, v1, s4 ; MOVREL-NEXT: v_cndmask_b32_e64 v6, v6, v1, s4
; MOVREL-NEXT: v_cndmask_b32_e64 v7, v7, v0, s10 ; MOVREL-NEXT: v_cndmask_b32_e64 v7, v7, v0, s10
; MOVREL-NEXT: v_cndmask_b32_e64 v9, v9, v0, s5 ; MOVREL-NEXT: v_cndmask_b32_e64 v9, v9, v0, s5
Show All 27 Linesentry:
store volatile <2 x double> %vec.2, <2 x double> addrspace(1)* undef store volatile <2 x double> %vec.2, <2 x double> addrspace(1)* undef
store volatile <2 x double> %vec.3, <2 x double> addrspace(1)* undef store volatile <2 x double> %vec.3, <2 x double> addrspace(1)* undef
ret void ret void
} }
define amdgpu_ps void @dyn_insertelement_v8f64_s_s_v(<8 x double> inreg %vec, double inreg %val, i32 %idx) { define amdgpu_ps void @dyn_insertelement_v8f64_s_s_v(<8 x double> inreg %vec, double inreg %val, i32 %idx) {
; GPRIDX-LABEL: dyn_insertelement_v8f64_s_s_v: ; GPRIDX-LABEL: dyn_insertelement_v8f64_s_s_v:
; GPRIDX: ; %bb.0: ; %entry ; GPRIDX: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s9, s11
; GPRIDX-NEXT: s_mov_b32 s11, s13
; GPRIDX-NEXT: s_mov_b32 s13, s15
; GPRIDX-NEXT: s_mov_b32 s15, s17
; GPRIDX-NEXT: s_mov_b32 s0, s2 ; GPRIDX-NEXT: s_mov_b32 s0, s2
; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s2, s4 ; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s4, s6 ; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: s_mov_b32 s6, s8 ; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s8, s10 ; GPRIDX-NEXT: s_mov_b32 s8, s10
; GPRIDX-NEXT: s_mov_b32 s9, s11
; GPRIDX-NEXT: s_mov_b32 s10, s12 ; GPRIDX-NEXT: s_mov_b32 s10, s12
; GPRIDX-NEXT: s_mov_b32 s11, s13
; GPRIDX-NEXT: s_mov_b32 s12, s14 ; GPRIDX-NEXT: s_mov_b32 s12, s14
; GPRIDX-NEXT: s_mov_b32 s13, s15
; GPRIDX-NEXT: s_mov_b32 s14, s16 ; GPRIDX-NEXT: s_mov_b32 s14, s16
; GPRIDX-NEXT: v_mov_b32_e32 v16, s15 ; GPRIDX-NEXT: s_mov_b32 s15, s17
; GPRIDX-NEXT: v_mov_b32_e32 v15, s14
; GPRIDX-NEXT: v_mov_b32_e32 v14, s13 ; GPRIDX-NEXT: v_mov_b32_e32 v14, s13
; GPRIDX-NEXT: v_mov_b32_e32 v13, s12 ; GPRIDX-NEXT: v_mov_b32_e32 v13, s12
; GPRIDX-NEXT: v_mov_b32_e32 v12, s11 ; GPRIDX-NEXT: v_mov_b32_e32 v12, s11
; GPRIDX-NEXT: v_mov_b32_e32 v11, s10 ; GPRIDX-NEXT: v_mov_b32_e32 v11, s10
; GPRIDX-NEXT: v_mov_b32_e32 v10, s9 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s9
; GPRIDX-NEXT: v_mov_b32_e32 v9, s8 ; GPRIDX-NEXT: v_mov_b32_e32 v9, s8
; GPRIDX-NEXT: v_mov_b32_e32 v8, s7 ; GPRIDX-NEXT: v_mov_b32_e32 v8, s7
; GPRIDX-NEXT: v_mov_b32_e32 v7, s6 ; GPRIDX-NEXT: v_mov_b32_e32 v7, s6
; GPRIDX-NEXT: v_mov_b32_e32 v6, s5 ; GPRIDX-NEXT: v_mov_b32_e32 v6, s5
; GPRIDX-NEXT: v_mov_b32_e32 v5, s4 ; GPRIDX-NEXT: v_mov_b32_e32 v5, s4
; GPRIDX-NEXT: v_mov_b32_e32 v4, s3 ; GPRIDX-NEXT: v_mov_b32_e32 v4, s3
; GPRIDX-NEXT: v_mov_b32_e32 v3, s2 ; GPRIDX-NEXT: v_mov_b32_e32 v3, s2
; GPRIDX-NEXT: v_mov_b32_e32 v2, s1 ; GPRIDX-NEXT: v_mov_b32_e32 v2, s1
; GPRIDX-NEXT: v_mov_b32_e32 v1, s0 ; GPRIDX-NEXT: v_mov_b32_e32 v1, s0
; GPRIDX-NEXT: v_mov_b32_e32 v17, s18 ; GPRIDX-NEXT: v_mov_b32_e32 v17, s18
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v0
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v0
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v0
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[4:5], 4, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[4:5], 4, v0
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[6:7], 5, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[6:7], 5, v0
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[8:9], 6, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[8:9], 6, v0
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[10:11], 7, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[10:11], 7, v0
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[12:13], 0, v0 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[12:13], 0, v0
; GPRIDX-NEXT: v_mov_b32_e32 v0, s19 ; GPRIDX-NEXT: v_mov_b32_e32 v0, s19
; GPRIDX-NEXT: v_mov_b32_e32 v16, s15
; GPRIDX-NEXT: v_mov_b32_e32 v15, s14
; GPRIDX-NEXT: v_cndmask_b32_e64 v1, v1, v17, s[12:13] ; GPRIDX-NEXT: v_cndmask_b32_e64 v1, v1, v17, s[12:13]
; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v3, v17, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v3, v17, vcc
; GPRIDX-NEXT: v_cndmask_b32_e64 v2, v2, v0, s[12:13] ; GPRIDX-NEXT: v_cndmask_b32_e64 v2, v2, v0, s[12:13]
; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v4, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v4, v0, vcc
; GPRIDX-NEXT: v_cndmask_b32_e64 v5, v5, v17, s[0:1] ; GPRIDX-NEXT: v_cndmask_b32_e64 v5, v5, v17, s[0:1]
; GPRIDX-NEXT: v_cndmask_b32_e64 v7, v7, v17, s[2:3] ; GPRIDX-NEXT: v_cndmask_b32_e64 v7, v7, v17, s[2:3]
; GPRIDX-NEXT: v_cndmask_b32_e64 v9, v9, v17, s[4:5] ; GPRIDX-NEXT: v_cndmask_b32_e64 v9, v9, v17, s[4:5]
; GPRIDX-NEXT: v_cndmask_b32_e64 v11, v11, v17, s[6:7] ; GPRIDX-NEXT: v_cndmask_b32_e64 v11, v11, v17, s[6:7]
Show All 12 Lines
; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[9:12], off ; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[9:12], off
; GPRIDX-NEXT: s_waitcnt vmcnt(0) ; GPRIDX-NEXT: s_waitcnt vmcnt(0)
; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[13:16], off ; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[13:16], off
; GPRIDX-NEXT: s_waitcnt vmcnt(0) ; GPRIDX-NEXT: s_waitcnt vmcnt(0)
; GPRIDX-NEXT: s_endpgm ; GPRIDX-NEXT: s_endpgm
; ;
; MOVREL-LABEL: dyn_insertelement_v8f64_s_s_v: ; MOVREL-LABEL: dyn_insertelement_v8f64_s_s_v:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s9, s11
; MOVREL-NEXT: s_mov_b32 s11, s13
; MOVREL-NEXT: s_mov_b32 s13, s15
; MOVREL-NEXT: s_mov_b32 s15, s17
; MOVREL-NEXT: s_mov_b32 s0, s2 ; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s2, s4 ; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: v_mov_b32_e32 v2, s1
; MOVREL-NEXT: v_mov_b32_e32 v1, s0
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0
; MOVREL-NEXT: v_mov_b32_e32 v4, s3
; MOVREL-NEXT: v_mov_b32_e32 v3, s2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 1, v0
; MOVREL-NEXT: s_mov_b32 s4, s6 ; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8 ; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s8, s10 ; MOVREL-NEXT: s_mov_b32 s8, s10
; MOVREL-NEXT: s_mov_b32 s9, s11
; MOVREL-NEXT: s_mov_b32 s10, s12 ; MOVREL-NEXT: s_mov_b32 s10, s12
; MOVREL-NEXT: s_mov_b32 s11, s13
; MOVREL-NEXT: s_mov_b32 s12, s14 ; MOVREL-NEXT: s_mov_b32 s12, s14
; MOVREL-NEXT: s_mov_b32 s13, s15
; MOVREL-NEXT: s_mov_b32 s14, s16 ; MOVREL-NEXT: s_mov_b32 s14, s16
; MOVREL-NEXT: v_mov_b32_e32 v16, s15 ; MOVREL-NEXT: s_mov_b32 s15, s17
; MOVREL-NEXT: v_mov_b32_e32 v2, s1
; MOVREL-NEXT: v_mov_b32_e32 v1, s0
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v0
; MOVREL-NEXT: v_mov_b32_e32 v15, s14
; MOVREL-NEXT: v_mov_b32_e32 v14, s13
; MOVREL-NEXT: v_mov_b32_e32 v13, s12
; MOVREL-NEXT: v_mov_b32_e32 v12, s11
; MOVREL-NEXT: v_mov_b32_e32 v11, s10
; MOVREL-NEXT: v_mov_b32_e32 v10, s9
; MOVREL-NEXT: v_mov_b32_e32 v9, s8
; MOVREL-NEXT: v_mov_b32_e32 v8, s7 ; MOVREL-NEXT: v_mov_b32_e32 v8, s7
; MOVREL-NEXT: v_mov_b32_e32 v7, s6 ; MOVREL-NEXT: v_mov_b32_e32 v7, s6
; MOVREL-NEXT: v_mov_b32_e32 v6, s5 ; MOVREL-NEXT: v_mov_b32_e32 v6, s5
; MOVREL-NEXT: v_mov_b32_e32 v5, s4 ; MOVREL-NEXT: v_mov_b32_e32 v5, s4
; MOVREL-NEXT: v_mov_b32_e32 v4, s3
; MOVREL-NEXT: v_mov_b32_e32 v3, s2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 1, v0
; MOVREL-NEXT: v_cndmask_b32_e64 v1, v1, s18, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e64 v1, v1, s18, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e64 v2, v2, s19, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e64 v2, v2, s19, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v0 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v0
; MOVREL-NEXT: v_cmp_eq_u32_e64 s1, 2, v0 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s1, 2, v0
; MOVREL-NEXT: v_mov_b32_e32 v12, s11
; MOVREL-NEXT: v_mov_b32_e32 v11, s10
; MOVREL-NEXT: v_mov_b32_e32 v10, s9
; MOVREL-NEXT: v_mov_b32_e32 v9, s8
; MOVREL-NEXT: v_cndmask_b32_e64 v3, v3, s18, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v3, v3, s18, s0
; MOVREL-NEXT: v_cndmask_b32_e64 v4, v4, s19, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v4, v4, s19, s0
; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 4, v0 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 4, v0
; MOVREL-NEXT: v_cmp_eq_u32_e64 s2, 5, v0 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s2, 5, v0
; MOVREL-NEXT: v_mov_b32_e32 v16, s15
; MOVREL-NEXT: v_mov_b32_e32 v15, s14
; MOVREL-NEXT: v_mov_b32_e32 v14, s13
; MOVREL-NEXT: v_mov_b32_e32 v13, s12
; MOVREL-NEXT: v_cmp_eq_u32_e64 s3, 6, v0 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s3, 6, v0
; MOVREL-NEXT: v_cmp_eq_u32_e64 s4, 7, v0 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s4, 7, v0
; MOVREL-NEXT: v_cndmask_b32_e64 v5, v5, s18, s1 ; MOVREL-NEXT: v_cndmask_b32_e64 v5, v5, s18, s1
; MOVREL-NEXT: v_cndmask_b32_e64 v6, v6, s19, s1 ; MOVREL-NEXT: v_cndmask_b32_e64 v6, v6, s19, s1
; MOVREL-NEXT: v_cndmask_b32_e64 v7, v7, s18, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e64 v7, v7, s18, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e64 v8, v8, s19, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e64 v8, v8, s19, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e64 v9, v9, s18, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v9, v9, s18, s0
; MOVREL-NEXT: v_cndmask_b32_e64 v10, v10, s19, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v10, v10, s19, s0
Show All 23 Linesentry:
store volatile <2 x double> %vec.2, <2 x double> addrspace(1)* undef store volatile <2 x double> %vec.2, <2 x double> addrspace(1)* undef
store volatile <2 x double> %vec.3, <2 x double> addrspace(1)* undef store volatile <2 x double> %vec.3, <2 x double> addrspace(1)* undef
ret void ret void
} }
define amdgpu_ps void @dyn_insertelement_v8f64_s_v_s(<8 x double> inreg %vec, double %val, i32 inreg %idx) { define amdgpu_ps void @dyn_insertelement_v8f64_s_v_s(<8 x double> inreg %vec, double %val, i32 inreg %idx) {
; GPRIDX-LABEL: dyn_insertelement_v8f64_s_v_s: ; GPRIDX-LABEL: dyn_insertelement_v8f64_s_v_s:
; GPRIDX: ; %bb.0: ; %entry ; GPRIDX: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s9, s11
; GPRIDX-NEXT: s_mov_b32 s11, s13
; GPRIDX-NEXT: s_mov_b32 s13, s15
; GPRIDX-NEXT: s_mov_b32 s15, s17
; GPRIDX-NEXT: s_mov_b32 s0, s2 ; GPRIDX-NEXT: s_mov_b32 s0, s2
; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s2, s4 ; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s4, s6 ; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: s_mov_b32 s6, s8 ; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s8, s10 ; GPRIDX-NEXT: s_mov_b32 s8, s10
; GPRIDX-NEXT: s_mov_b32 s9, s11
; GPRIDX-NEXT: s_mov_b32 s10, s12 ; GPRIDX-NEXT: s_mov_b32 s10, s12
; GPRIDX-NEXT: s_mov_b32 s11, s13
; GPRIDX-NEXT: s_mov_b32 s12, s14 ; GPRIDX-NEXT: s_mov_b32 s12, s14
; GPRIDX-NEXT: s_mov_b32 s13, s15
; GPRIDX-NEXT: s_mov_b32 s14, s16 ; GPRIDX-NEXT: s_mov_b32 s14, s16
; GPRIDX-NEXT: s_mov_b32 s15, s17
; GPRIDX-NEXT: v_mov_b32_e32 v17, s15 ; GPRIDX-NEXT: v_mov_b32_e32 v17, s15
; GPRIDX-NEXT: v_mov_b32_e32 v16, s14 ; GPRIDX-NEXT: v_mov_b32_e32 v16, s14
; GPRIDX-NEXT: v_mov_b32_e32 v15, s13 ; GPRIDX-NEXT: v_mov_b32_e32 v15, s13
; GPRIDX-NEXT: v_mov_b32_e32 v14, s12 ; GPRIDX-NEXT: v_mov_b32_e32 v14, s12
; GPRIDX-NEXT: v_mov_b32_e32 v13, s11 ; GPRIDX-NEXT: v_mov_b32_e32 v13, s11
; GPRIDX-NEXT: v_mov_b32_e32 v12, s10 ; GPRIDX-NEXT: v_mov_b32_e32 v12, s10
; GPRIDX-NEXT: v_mov_b32_e32 v11, s9 ; GPRIDX-NEXT: v_mov_b32_e32 v11, s9
; GPRIDX-NEXT: v_mov_b32_e32 v10, s8 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s8
Show All 17 Lines
; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[10:13], off ; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[10:13], off
; GPRIDX-NEXT: s_waitcnt vmcnt(0) ; GPRIDX-NEXT: s_waitcnt vmcnt(0)
; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[14:17], off ; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[14:17], off
; GPRIDX-NEXT: s_waitcnt vmcnt(0) ; GPRIDX-NEXT: s_waitcnt vmcnt(0)
; GPRIDX-NEXT: s_endpgm ; GPRIDX-NEXT: s_endpgm
; ;
; MOVREL-LABEL: dyn_insertelement_v8f64_s_v_s: ; MOVREL-LABEL: dyn_insertelement_v8f64_s_v_s:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s9, s11
; MOVREL-NEXT: s_mov_b32 s11, s13
; MOVREL-NEXT: s_mov_b32 s13, s15
; MOVREL-NEXT: s_mov_b32 s15, s17
; MOVREL-NEXT: s_mov_b32 s0, s2 ; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: v_mov_b32_e32 v2, s0
; MOVREL-NEXT: s_mov_b32 s2, s4 ; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s4, s6 ; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8 ; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s8, s10 ; MOVREL-NEXT: s_mov_b32 s8, s10
; MOVREL-NEXT: s_mov_b32 s9, s11
; MOVREL-NEXT: s_mov_b32 s10, s12 ; MOVREL-NEXT: s_mov_b32 s10, s12
; MOVREL-NEXT: s_mov_b32 s11, s13
; MOVREL-NEXT: s_mov_b32 s12, s14 ; MOVREL-NEXT: s_mov_b32 s12, s14
; MOVREL-NEXT: s_mov_b32 s13, s15
; MOVREL-NEXT: s_mov_b32 s14, s16 ; MOVREL-NEXT: s_mov_b32 s14, s16
; MOVREL-NEXT: v_mov_b32_e32 v17, s15 ; MOVREL-NEXT: s_mov_b32 s15, s17
; MOVREL-NEXT: v_mov_b32_e32 v2, s0
; MOVREL-NEXT: s_lshl_b32 m0, s18, 1 ; MOVREL-NEXT: s_lshl_b32 m0, s18, 1
; MOVREL-NEXT: v_mov_b32_e32 v17, s15
; MOVREL-NEXT: v_mov_b32_e32 v16, s14 ; MOVREL-NEXT: v_mov_b32_e32 v16, s14
; MOVREL-NEXT: v_mov_b32_e32 v15, s13 ; MOVREL-NEXT: v_mov_b32_e32 v15, s13
; MOVREL-NEXT: v_mov_b32_e32 v14, s12 ; MOVREL-NEXT: v_mov_b32_e32 v14, s12
; MOVREL-NEXT: v_mov_b32_e32 v13, s11 ; MOVREL-NEXT: v_mov_b32_e32 v13, s11
; MOVREL-NEXT: v_mov_b32_e32 v12, s10 ; MOVREL-NEXT: v_mov_b32_e32 v12, s10
; MOVREL-NEXT: v_mov_b32_e32 v11, s9 ; MOVREL-NEXT: v_mov_b32_e32 v11, s9
; MOVREL-NEXT: v_mov_b32_e32 v10, s8 ; MOVREL-NEXT: v_mov_b32_e32 v10, s8
; MOVREL-NEXT: v_mov_b32_e32 v9, s7 ; MOVREL-NEXT: v_mov_b32_e32 v9, s7
▲ Show 20 Lines • Show All 70 Lines • ▼ Show 20 Linesentry:
store volatile <2 x double> %vec.2, <2 x double> addrspace(1)* undef store volatile <2 x double> %vec.2, <2 x double> addrspace(1)* undef
store volatile <2 x double> %vec.3, <2 x double> addrspace(1)* undef store volatile <2 x double> %vec.3, <2 x double> addrspace(1)* undef
ret void ret void
} }
define amdgpu_ps void @dyn_insertelement_v8f64_s_v_v(<8 x double> inreg %vec, double %val, i32 %idx) { define amdgpu_ps void @dyn_insertelement_v8f64_s_v_v(<8 x double> inreg %vec, double %val, i32 %idx) {
; GPRIDX-LABEL: dyn_insertelement_v8f64_s_v_v: ; GPRIDX-LABEL: dyn_insertelement_v8f64_s_v_v:
; GPRIDX: ; %bb.0: ; %entry ; GPRIDX: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s9, s11
; GPRIDX-NEXT: s_mov_b32 s11, s13
; GPRIDX-NEXT: s_mov_b32 s13, s15
; GPRIDX-NEXT: s_mov_b32 s15, s17
; GPRIDX-NEXT: s_mov_b32 s0, s2 ; GPRIDX-NEXT: s_mov_b32 s0, s2
; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s2, s4 ; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s4, s6 ; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: s_mov_b32 s6, s8 ; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s8, s10 ; GPRIDX-NEXT: s_mov_b32 s8, s10
; GPRIDX-NEXT: s_mov_b32 s9, s11
; GPRIDX-NEXT: s_mov_b32 s10, s12 ; GPRIDX-NEXT: s_mov_b32 s10, s12
; GPRIDX-NEXT: s_mov_b32 s11, s13
; GPRIDX-NEXT: s_mov_b32 s12, s14 ; GPRIDX-NEXT: s_mov_b32 s12, s14
; GPRIDX-NEXT: s_mov_b32 s13, s15
; GPRIDX-NEXT: s_mov_b32 s14, s16 ; GPRIDX-NEXT: s_mov_b32 s14, s16
; GPRIDX-NEXT: v_mov_b32_e32 v18, s15 ; GPRIDX-NEXT: s_mov_b32 s15, s17
; GPRIDX-NEXT: v_mov_b32_e32 v17, s14
; GPRIDX-NEXT: v_mov_b32_e32 v16, s13 ; GPRIDX-NEXT: v_mov_b32_e32 v16, s13
; GPRIDX-NEXT: v_mov_b32_e32 v15, s12 ; GPRIDX-NEXT: v_mov_b32_e32 v15, s12
; GPRIDX-NEXT: v_mov_b32_e32 v6, s3
; GPRIDX-NEXT: v_mov_b32_e32 v5, s2
; GPRIDX-NEXT: v_mov_b32_e32 v4, s1
; GPRIDX-NEXT: v_mov_b32_e32 v3, s0
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[12:13], 0, v2
; GPRIDX-NEXT: v_mov_b32_e32 v18, s15
; GPRIDX-NEXT: v_mov_b32_e32 v17, s14
; GPRIDX-NEXT: v_mov_b32_e32 v14, s11 ; GPRIDX-NEXT: v_mov_b32_e32 v14, s11
; GPRIDX-NEXT: v_mov_b32_e32 v13, s10 ; GPRIDX-NEXT: v_mov_b32_e32 v13, s10
; GPRIDX-NEXT: v_mov_b32_e32 v12, s9 ; GPRIDX-NEXT: v_mov_b32_e32 v12, s9
; GPRIDX-NEXT: v_mov_b32_e32 v11, s8 ; GPRIDX-NEXT: v_mov_b32_e32 v11, s8
; GPRIDX-NEXT: v_mov_b32_e32 v10, s7 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s7
; GPRIDX-NEXT: v_mov_b32_e32 v9, s6 ; GPRIDX-NEXT: v_mov_b32_e32 v9, s6
; GPRIDX-NEXT: v_mov_b32_e32 v8, s5 ; GPRIDX-NEXT: v_mov_b32_e32 v8, s5
; GPRIDX-NEXT: v_mov_b32_e32 v7, s4 ; GPRIDX-NEXT: v_mov_b32_e32 v7, s4
; GPRIDX-NEXT: v_mov_b32_e32 v6, s3
; GPRIDX-NEXT: v_mov_b32_e32 v5, s2
; GPRIDX-NEXT: v_mov_b32_e32 v4, s1
; GPRIDX-NEXT: v_mov_b32_e32 v3, s0
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[12:13], 0, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v2 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v2 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[4:5], 4, v2 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[4:5], 4, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[6:7], 5, v2 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[6:7], 5, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[8:9], 6, v2 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[8:9], 6, v2
; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[10:11], 7, v2 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 s[10:11], 7, v2
; GPRIDX-NEXT: v_cndmask_b32_e64 v3, v3, v0, s[12:13] ; GPRIDX-NEXT: v_cndmask_b32_e64 v3, v3, v0, s[12:13]
; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v5, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v5, v0, vcc
Show All 18 Lines
; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[11:14], off ; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[11:14], off
; GPRIDX-NEXT: s_waitcnt vmcnt(0) ; GPRIDX-NEXT: s_waitcnt vmcnt(0)
; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[15:18], off ; GPRIDX-NEXT: global_store_dwordx4 v[0:1], v[15:18], off
; GPRIDX-NEXT: s_waitcnt vmcnt(0) ; GPRIDX-NEXT: s_waitcnt vmcnt(0)
; GPRIDX-NEXT: s_endpgm ; GPRIDX-NEXT: s_endpgm
; ;
; MOVREL-LABEL: dyn_insertelement_v8f64_s_v_v: ; MOVREL-LABEL: dyn_insertelement_v8f64_s_v_v:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s9, s11
; MOVREL-NEXT: s_mov_b32 s11, s13
; MOVREL-NEXT: s_mov_b32 s13, s15
; MOVREL-NEXT: s_mov_b32 s15, s17
; MOVREL-NEXT: s_mov_b32 s0, s2 ; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s2, s4 ; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s4, s6 ; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8 ; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s8, s10 ; MOVREL-NEXT: s_mov_b32 s8, s10
; MOVREL-NEXT: s_mov_b32 s9, s11
; MOVREL-NEXT: s_mov_b32 s10, s12 ; MOVREL-NEXT: s_mov_b32 s10, s12
; MOVREL-NEXT: s_mov_b32 s12, s14 ; MOVREL-NEXT: s_mov_b32 s11, s13
; MOVREL-NEXT: s_mov_b32 s14, s16
; MOVREL-NEXT: v_mov_b32_e32 v18, s15
; MOVREL-NEXT: v_mov_b32_e32 v17, s14
; MOVREL-NEXT: v_mov_b32_e32 v16, s13
; MOVREL-NEXT: v_mov_b32_e32 v15, s12
; MOVREL-NEXT: v_mov_b32_e32 v14, s11
; MOVREL-NEXT: v_mov_b32_e32 v13, s10
; MOVREL-NEXT: v_mov_b32_e32 v12, s9
; MOVREL-NEXT: v_mov_b32_e32 v11, s8
; MOVREL-NEXT: v_mov_b32_e32 v10, s7
; MOVREL-NEXT: v_mov_b32_e32 v9, s6
; MOVREL-NEXT: v_mov_b32_e32 v8, s5
; MOVREL-NEXT: v_mov_b32_e32 v7, s4
; MOVREL-NEXT: v_mov_b32_e32 v6, s3 ; MOVREL-NEXT: v_mov_b32_e32 v6, s3
; MOVREL-NEXT: v_mov_b32_e32 v5, s2 ; MOVREL-NEXT: v_mov_b32_e32 v5, s2
; MOVREL-NEXT: v_mov_b32_e32 v4, s1 ; MOVREL-NEXT: v_mov_b32_e32 v4, s1
; MOVREL-NEXT: v_mov_b32_e32 v3, s0 ; MOVREL-NEXT: v_mov_b32_e32 v3, s0
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v2 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 1, v2 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 1, v2
; MOVREL-NEXT: s_mov_b32 s12, s14
; MOVREL-NEXT: s_mov_b32 s13, s15
; MOVREL-NEXT: s_mov_b32 s14, s16
; MOVREL-NEXT: s_mov_b32 s15, s17
; MOVREL-NEXT: v_mov_b32_e32 v10, s7
; MOVREL-NEXT: v_mov_b32_e32 v9, s6
; MOVREL-NEXT: v_mov_b32_e32 v8, s5
; MOVREL-NEXT: v_mov_b32_e32 v7, s4
; MOVREL-NEXT: v_cmp_eq_u32_e64 s1, 3, v2 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s1, 3, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s6, 2, v2 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s6, 2, v2
; MOVREL-NEXT: v_mov_b32_e32 v14, s11
; MOVREL-NEXT: v_mov_b32_e32 v13, s10
; MOVREL-NEXT: v_mov_b32_e32 v12, s9
; MOVREL-NEXT: v_mov_b32_e32 v11, s8
; MOVREL-NEXT: v_cmp_eq_u32_e64 s2, 4, v2 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s2, 4, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s3, 5, v2 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s3, 5, v2
; MOVREL-NEXT: v_mov_b32_e32 v18, s15
; MOVREL-NEXT: v_mov_b32_e32 v17, s14
; MOVREL-NEXT: v_mov_b32_e32 v16, s13
; MOVREL-NEXT: v_mov_b32_e32 v15, s12
; MOVREL-NEXT: v_cmp_eq_u32_e64 s4, 6, v2 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s4, 6, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s5, 7, v2 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s5, 7, v2
; MOVREL-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e64 v5, v5, v0, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v5, v5, v0, s0
; MOVREL-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e64 v6, v6, v1, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v6, v6, v1, s0
; MOVREL-NEXT: v_cndmask_b32_e64 v7, v7, v0, s6 ; MOVREL-NEXT: v_cndmask_b32_e64 v7, v7, v0, s6
; MOVREL-NEXT: v_cndmask_b32_e64 v9, v9, v0, s1 ; MOVREL-NEXT: v_cndmask_b32_e64 v9, v9, v0, s1
▲ Show 20 Lines • Show All 1,321 Lines • ▼ Show 20 Lines
entry: entry:
%insert = insertelement <16 x double> %vec, double %val, i32 %idx %insert = insertelement <16 x double> %vec, double %val, i32 %idx
ret <16 x double> %insert ret <16 x double> %insert
} }
define amdgpu_ps <16 x i32> @dyn_insertelement_v16i32_s_v_s(<16 x i32> inreg %vec, i32 %val, i32 inreg %idx) { define amdgpu_ps <16 x i32> @dyn_insertelement_v16i32_s_v_s(<16 x i32> inreg %vec, i32 %val, i32 inreg %idx) {
; GPRIDX-LABEL: dyn_insertelement_v16i32_s_v_s: ; GPRIDX-LABEL: dyn_insertelement_v16i32_s_v_s:
; GPRIDX: ; %bb.0: ; %entry ; GPRIDX: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s9, s11
; GPRIDX-NEXT: s_mov_b32 s11, s13
; GPRIDX-NEXT: s_mov_b32 s13, s15
; GPRIDX-NEXT: s_mov_b32 s15, s17
; GPRIDX-NEXT: s_mov_b32 s0, s2 ; GPRIDX-NEXT: s_mov_b32 s0, s2
; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s2, s4 ; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s4, s6 ; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: s_mov_b32 s6, s8 ; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s8, s10 ; GPRIDX-NEXT: s_mov_b32 s8, s10
; GPRIDX-NEXT: s_mov_b32 s9, s11
; GPRIDX-NEXT: s_mov_b32 s10, s12 ; GPRIDX-NEXT: s_mov_b32 s10, s12
; GPRIDX-NEXT: s_mov_b32 s11, s13
; GPRIDX-NEXT: s_mov_b32 s12, s14 ; GPRIDX-NEXT: s_mov_b32 s12, s14
; GPRIDX-NEXT: s_mov_b32 s13, s15
; GPRIDX-NEXT: s_mov_b32 s14, s16 ; GPRIDX-NEXT: s_mov_b32 s14, s16
; GPRIDX-NEXT: s_mov_b32 s15, s17
; GPRIDX-NEXT: v_mov_b32_e32 v16, s15 ; GPRIDX-NEXT: v_mov_b32_e32 v16, s15
; GPRIDX-NEXT: v_mov_b32_e32 v15, s14 ; GPRIDX-NEXT: v_mov_b32_e32 v15, s14
; GPRIDX-NEXT: v_mov_b32_e32 v14, s13 ; GPRIDX-NEXT: v_mov_b32_e32 v14, s13
; GPRIDX-NEXT: v_mov_b32_e32 v13, s12 ; GPRIDX-NEXT: v_mov_b32_e32 v13, s12
; GPRIDX-NEXT: v_mov_b32_e32 v12, s11 ; GPRIDX-NEXT: v_mov_b32_e32 v12, s11
; GPRIDX-NEXT: v_mov_b32_e32 v11, s10 ; GPRIDX-NEXT: v_mov_b32_e32 v11, s10
; GPRIDX-NEXT: v_mov_b32_e32 v10, s9 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s9
; GPRIDX-NEXT: v_mov_b32_e32 v9, s8 ; GPRIDX-NEXT: v_mov_b32_e32 v9, s8
Show All 23 Lines
; GPRIDX-NEXT: v_readfirstlane_b32 s12, v13 ; GPRIDX-NEXT: v_readfirstlane_b32 s12, v13
; GPRIDX-NEXT: v_readfirstlane_b32 s13, v14 ; GPRIDX-NEXT: v_readfirstlane_b32 s13, v14
; GPRIDX-NEXT: v_readfirstlane_b32 s14, v15 ; GPRIDX-NEXT: v_readfirstlane_b32 s14, v15
; GPRIDX-NEXT: v_readfirstlane_b32 s15, v16 ; GPRIDX-NEXT: v_readfirstlane_b32 s15, v16
; GPRIDX-NEXT: ; return to shader part epilog ; GPRIDX-NEXT: ; return to shader part epilog
; ;
; MOVREL-LABEL: dyn_insertelement_v16i32_s_v_s: ; MOVREL-LABEL: dyn_insertelement_v16i32_s_v_s:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s9, s11
; MOVREL-NEXT: s_mov_b32 s11, s13
; MOVREL-NEXT: s_mov_b32 s13, s15
; MOVREL-NEXT: s_mov_b32 s15, s17
; MOVREL-NEXT: s_mov_b32 s0, s2 ; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: v_mov_b32_e32 v1, s0
; MOVREL-NEXT: s_mov_b32 s2, s4 ; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s4, s6 ; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8 ; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s8, s10 ; MOVREL-NEXT: s_mov_b32 s8, s10
; MOVREL-NEXT: s_mov_b32 s9, s11
; MOVREL-NEXT: s_mov_b32 s10, s12 ; MOVREL-NEXT: s_mov_b32 s10, s12
; MOVREL-NEXT: s_mov_b32 s11, s13
; MOVREL-NEXT: s_mov_b32 s12, s14 ; MOVREL-NEXT: s_mov_b32 s12, s14
; MOVREL-NEXT: s_mov_b32 s13, s15
; MOVREL-NEXT: s_mov_b32 s14, s16 ; MOVREL-NEXT: s_mov_b32 s14, s16
; MOVREL-NEXT: v_mov_b32_e32 v16, s15 ; MOVREL-NEXT: s_mov_b32 s15, s17
; MOVREL-NEXT: v_mov_b32_e32 v1, s0
; MOVREL-NEXT: s_mov_b32 m0, s18 ; MOVREL-NEXT: s_mov_b32 m0, s18
; MOVREL-NEXT: v_mov_b32_e32 v16, s15
; MOVREL-NEXT: v_mov_b32_e32 v15, s14 ; MOVREL-NEXT: v_mov_b32_e32 v15, s14
; MOVREL-NEXT: v_mov_b32_e32 v14, s13 ; MOVREL-NEXT: v_mov_b32_e32 v14, s13
; MOVREL-NEXT: v_mov_b32_e32 v13, s12 ; MOVREL-NEXT: v_mov_b32_e32 v13, s12
; MOVREL-NEXT: v_mov_b32_e32 v12, s11 ; MOVREL-NEXT: v_mov_b32_e32 v12, s11
; MOVREL-NEXT: v_mov_b32_e32 v11, s10 ; MOVREL-NEXT: v_mov_b32_e32 v11, s10
; MOVREL-NEXT: v_mov_b32_e32 v10, s9 ; MOVREL-NEXT: v_mov_b32_e32 v10, s9
; MOVREL-NEXT: v_mov_b32_e32 v9, s8 ; MOVREL-NEXT: v_mov_b32_e32 v9, s8
; MOVREL-NEXT: v_mov_b32_e32 v8, s7 ; MOVREL-NEXT: v_mov_b32_e32 v8, s7
▲ Show 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
; GPRIDX-NEXT: s_set_gpr_idx_on s18, gpr_idx(DST) ; GPRIDX-NEXT: s_set_gpr_idx_on s18, gpr_idx(DST)
; GPRIDX-NEXT: v_mov_b32_e32 v0, v16 ; GPRIDX-NEXT: v_mov_b32_e32 v0, v16
; GPRIDX-NEXT: s_set_gpr_idx_off ; GPRIDX-NEXT: s_set_gpr_idx_off
; GPRIDX-NEXT: ; return to shader part epilog ; GPRIDX-NEXT: ; return to shader part epilog
; ;
; MOVREL-LABEL: dyn_insertelement_v16f32_s_v_s: ; MOVREL-LABEL: dyn_insertelement_v16f32_s_v_s:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s0, s2 ; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: v_mov_b32_e32 v16, v0
; MOVREL-NEXT: v_mov_b32_e32 v0, s0
; MOVREL-NEXT: s_mov_b32 s1, s3 ; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s2, s4 ; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s3, s5 ; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s4, s6 ; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s5, s7 ; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8 ; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s7, s9 ; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s8, s10 ; MOVREL-NEXT: s_mov_b32 s8, s10
; MOVREL-NEXT: s_mov_b32 s9, s11 ; MOVREL-NEXT: s_mov_b32 s9, s11
; MOVREL-NEXT: s_mov_b32 s10, s12 ; MOVREL-NEXT: s_mov_b32 s10, s12
; MOVREL-NEXT: s_mov_b32 s11, s13 ; MOVREL-NEXT: s_mov_b32 s11, s13
; MOVREL-NEXT: s_mov_b32 s12, s14 ; MOVREL-NEXT: s_mov_b32 s12, s14
; MOVREL-NEXT: s_mov_b32 s13, s15 ; MOVREL-NEXT: s_mov_b32 s13, s15
; MOVREL-NEXT: s_mov_b32 s14, s16 ; MOVREL-NEXT: s_mov_b32 s14, s16
; MOVREL-NEXT: s_mov_b32 s15, s17 ; MOVREL-NEXT: s_mov_b32 s15, s17
; MOVREL-NEXT: v_mov_b32_e32 v16, v0
; MOVREL-NEXT: v_mov_b32_e32 v0, s0
; MOVREL-NEXT: s_mov_b32 m0, s18 ; MOVREL-NEXT: s_mov_b32 m0, s18
; MOVREL-NEXT: v_mov_b32_e32 v1, s1 ; MOVREL-NEXT: v_mov_b32_e32 v1, s1
; MOVREL-NEXT: v_mov_b32_e32 v2, s2 ; MOVREL-NEXT: v_mov_b32_e32 v2, s2
; MOVREL-NEXT: v_mov_b32_e32 v3, s3 ; MOVREL-NEXT: v_mov_b32_e32 v3, s3
; MOVREL-NEXT: v_mov_b32_e32 v4, s4 ; MOVREL-NEXT: v_mov_b32_e32 v4, s4
; MOVREL-NEXT: v_mov_b32_e32 v5, s5 ; MOVREL-NEXT: v_mov_b32_e32 v5, s5
; MOVREL-NEXT: v_mov_b32_e32 v6, s6 ; MOVREL-NEXT: v_mov_b32_e32 v6, s6
; MOVREL-NEXT: v_mov_b32_e32 v7, s7 ; MOVREL-NEXT: v_mov_b32_e32 v7, s7
▲ Show 20 Lines • Show All 83 Lines • ▼ Show 20 Lines
; GPRIDX-NEXT: s_set_gpr_idx_on s34, gpr_idx(DST) ; GPRIDX-NEXT: s_set_gpr_idx_on s34, gpr_idx(DST)
; GPRIDX-NEXT: v_mov_b32_e32 v0, v32 ; GPRIDX-NEXT: v_mov_b32_e32 v0, v32
; GPRIDX-NEXT: s_set_gpr_idx_off ; GPRIDX-NEXT: s_set_gpr_idx_off
; GPRIDX-NEXT: ; return to shader part epilog ; GPRIDX-NEXT: ; return to shader part epilog
; ;
; MOVREL-LABEL: dyn_insertelement_v32f32_s_v_s: ; MOVREL-LABEL: dyn_insertelement_v32f32_s_v_s:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s0, s2 ; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: v_mov_b32_e32 v32, v0
; MOVREL-NEXT: v_mov_b32_e32 v0, s0
; MOVREL-NEXT: s_mov_b32 s1, s3 ; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s2, s4 ; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s3, s5 ; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s4, s6 ; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s5, s7 ; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8 ; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s7, s9 ; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s8, s10 ; MOVREL-NEXT: s_mov_b32 s8, s10
Show All 15 Lines
; MOVREL-NEXT: s_mov_b32 s24, s26 ; MOVREL-NEXT: s_mov_b32 s24, s26
; MOVREL-NEXT: s_mov_b32 s25, s27 ; MOVREL-NEXT: s_mov_b32 s25, s27
; MOVREL-NEXT: s_mov_b32 s26, s28 ; MOVREL-NEXT: s_mov_b32 s26, s28
; MOVREL-NEXT: s_mov_b32 s27, s29 ; MOVREL-NEXT: s_mov_b32 s27, s29
; MOVREL-NEXT: s_mov_b32 s28, s30 ; MOVREL-NEXT: s_mov_b32 s28, s30
; MOVREL-NEXT: s_mov_b32 s29, s31 ; MOVREL-NEXT: s_mov_b32 s29, s31
; MOVREL-NEXT: s_mov_b32 s31, s33 ; MOVREL-NEXT: s_mov_b32 s31, s33
; MOVREL-NEXT: s_mov_b32 s30, s32 ; MOVREL-NEXT: s_mov_b32 s30, s32
; MOVREL-NEXT: v_mov_b32_e32 v32, v0
; MOVREL-NEXT: v_mov_b32_e32 v0, s0
; MOVREL-NEXT: s_mov_b32 m0, s34 ; MOVREL-NEXT: s_mov_b32 m0, s34
; MOVREL-NEXT: v_mov_b32_e32 v1, s1 ; MOVREL-NEXT: v_mov_b32_e32 v1, s1
; MOVREL-NEXT: v_mov_b32_e32 v2, s2 ; MOVREL-NEXT: v_mov_b32_e32 v2, s2
; MOVREL-NEXT: v_mov_b32_e32 v3, s3 ; MOVREL-NEXT: v_mov_b32_e32 v3, s3
; MOVREL-NEXT: v_mov_b32_e32 v4, s4 ; MOVREL-NEXT: v_mov_b32_e32 v4, s4
; MOVREL-NEXT: v_mov_b32_e32 v5, s5 ; MOVREL-NEXT: v_mov_b32_e32 v5, s5
; MOVREL-NEXT: v_mov_b32_e32 v6, s6 ; MOVREL-NEXT: v_mov_b32_e32 v6, s6
; MOVREL-NEXT: v_mov_b32_e32 v7, s7 ; MOVREL-NEXT: v_mov_b32_e32 v7, s7
Show All 26 Lines
entry: entry:
%insert = insertelement <32 x float> %vec, float %val, i32 %idx %insert = insertelement <32 x float> %vec, float %val, i32 %idx
ret <32 x float> %insert ret <32 x float> %insert
} }
define amdgpu_ps <16 x i64> @dyn_insertelement_v16i64_s_v_s(<16 x i64> inreg %vec, i64 %val, i32 inreg %idx) { define amdgpu_ps <16 x i64> @dyn_insertelement_v16i64_s_v_s(<16 x i64> inreg %vec, i64 %val, i32 inreg %idx) {
; GPRIDX-LABEL: dyn_insertelement_v16i64_s_v_s: ; GPRIDX-LABEL: dyn_insertelement_v16i64_s_v_s:
; GPRIDX: ; %bb.0: ; %entry ; GPRIDX: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_mov_b32 s0, s2
; GPRIDX-NEXT: s_mov_b32 s1, s3 ; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: s_mov_b32 s3, s5 ; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: s_mov_b32 s5, s7 ; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: s_mov_b32 s7, s9 ; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s8, s10
; GPRIDX-NEXT: s_mov_b32 s9, s11 ; GPRIDX-NEXT: s_mov_b32 s9, s11
; GPRIDX-NEXT: s_mov_b32 s10, s12
; GPRIDX-NEXT: s_mov_b32 s11, s13 ; GPRIDX-NEXT: s_mov_b32 s11, s13
; GPRIDX-NEXT: s_mov_b32 s12, s14
; GPRIDX-NEXT: s_mov_b32 s13, s15 ; GPRIDX-NEXT: s_mov_b32 s13, s15
; GPRIDX-NEXT: s_mov_b32 s14, s16
; GPRIDX-NEXT: s_mov_b32 s15, s17 ; GPRIDX-NEXT: s_mov_b32 s15, s17
; GPRIDX-NEXT: s_mov_b32 s16, s18
; GPRIDX-NEXT: s_mov_b32 s17, s19 ; GPRIDX-NEXT: s_mov_b32 s17, s19
; GPRIDX-NEXT: s_mov_b32 s18, s20
; GPRIDX-NEXT: s_mov_b32 s19, s21 ; GPRIDX-NEXT: s_mov_b32 s19, s21
; GPRIDX-NEXT: s_mov_b32 s20, s22
; GPRIDX-NEXT: s_mov_b32 s21, s23 ; GPRIDX-NEXT: s_mov_b32 s21, s23
; GPRIDX-NEXT: s_mov_b32 s22, s24
; GPRIDX-NEXT: s_mov_b32 s23, s25 ; GPRIDX-NEXT: s_mov_b32 s23, s25
; GPRIDX-NEXT: s_mov_b32 s24, s26
; GPRIDX-NEXT: s_mov_b32 s25, s27 ; GPRIDX-NEXT: s_mov_b32 s25, s27
; GPRIDX-NEXT: s_mov_b32 s26, s28
; GPRIDX-NEXT: s_mov_b32 s27, s29 ; GPRIDX-NEXT: s_mov_b32 s27, s29
; GPRIDX-NEXT: s_mov_b32 s28, s30
; GPRIDX-NEXT: s_mov_b32 s29, s31 ; GPRIDX-NEXT: s_mov_b32 s29, s31
; GPRIDX-NEXT: s_mov_b32 s31, s33 ; GPRIDX-NEXT: s_mov_b32 s31, s33
; GPRIDX-NEXT: s_mov_b32 s0, s2
; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: s_mov_b32 s8, s10
; GPRIDX-NEXT: s_mov_b32 s10, s12
; GPRIDX-NEXT: s_mov_b32 s12, s14
; GPRIDX-NEXT: s_mov_b32 s14, s16
; GPRIDX-NEXT: s_mov_b32 s16, s18
; GPRIDX-NEXT: s_mov_b32 s18, s20
; GPRIDX-NEXT: s_mov_b32 s20, s22
; GPRIDX-NEXT: s_mov_b32 s22, s24
; GPRIDX-NEXT: s_mov_b32 s24, s26
; GPRIDX-NEXT: s_mov_b32 s26, s28
; GPRIDX-NEXT: s_mov_b32 s28, s30
; GPRIDX-NEXT: s_mov_b32 s30, s32 ; GPRIDX-NEXT: s_mov_b32 s30, s32
; GPRIDX-NEXT: v_mov_b32_e32 v33, s31
; GPRIDX-NEXT: s_lshl_b32 s33, s34, 1 ; GPRIDX-NEXT: s_lshl_b32 s33, s34, 1
; GPRIDX-NEXT: v_mov_b32_e32 v33, s31
; GPRIDX-NEXT: v_mov_b32_e32 v32, s30 ; GPRIDX-NEXT: v_mov_b32_e32 v32, s30
; GPRIDX-NEXT: v_mov_b32_e32 v31, s29 ; GPRIDX-NEXT: v_mov_b32_e32 v31, s29
; GPRIDX-NEXT: v_mov_b32_e32 v30, s28 ; GPRIDX-NEXT: v_mov_b32_e32 v30, s28
; GPRIDX-NEXT: v_mov_b32_e32 v29, s27 ; GPRIDX-NEXT: v_mov_b32_e32 v29, s27
; GPRIDX-NEXT: v_mov_b32_e32 v28, s26 ; GPRIDX-NEXT: v_mov_b32_e32 v28, s26
; GPRIDX-NEXT: v_mov_b32_e32 v27, s25 ; GPRIDX-NEXT: v_mov_b32_e32 v27, s25
; GPRIDX-NEXT: v_mov_b32_e32 v26, s24 ; GPRIDX-NEXT: v_mov_b32_e32 v26, s24
; GPRIDX-NEXT: v_mov_b32_e32 v25, s23 ; GPRIDX-NEXT: v_mov_b32_e32 v25, s23
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; GPRIDX-NEXT: v_readfirstlane_b32 s28, v30 ; GPRIDX-NEXT: v_readfirstlane_b32 s28, v30
; GPRIDX-NEXT: v_readfirstlane_b32 s29, v31 ; GPRIDX-NEXT: v_readfirstlane_b32 s29, v31
; GPRIDX-NEXT: v_readfirstlane_b32 s30, v32 ; GPRIDX-NEXT: v_readfirstlane_b32 s30, v32
; GPRIDX-NEXT: v_readfirstlane_b32 s31, v33 ; GPRIDX-NEXT: v_readfirstlane_b32 s31, v33
; GPRIDX-NEXT: ; return to shader part epilog ; GPRIDX-NEXT: ; return to shader part epilog
; ;
; MOVREL-LABEL: dyn_insertelement_v16i64_s_v_s: ; MOVREL-LABEL: dyn_insertelement_v16i64_s_v_s:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s1, s3 ; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: v_mov_b32_e32 v2, s0
; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s3, s5 ; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s5, s7 ; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s7, s9 ; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s8, s10
; MOVREL-NEXT: s_mov_b32 s9, s11 ; MOVREL-NEXT: s_mov_b32 s9, s11
; MOVREL-NEXT: s_mov_b32 s10, s12
; MOVREL-NEXT: s_mov_b32 s11, s13 ; MOVREL-NEXT: s_mov_b32 s11, s13
; MOVREL-NEXT: s_mov_b32 s12, s14
; MOVREL-NEXT: s_mov_b32 s13, s15 ; MOVREL-NEXT: s_mov_b32 s13, s15
; MOVREL-NEXT: s_mov_b32 s14, s16
; MOVREL-NEXT: s_mov_b32 s15, s17 ; MOVREL-NEXT: s_mov_b32 s15, s17
; MOVREL-NEXT: s_mov_b32 s16, s18
; MOVREL-NEXT: s_mov_b32 s17, s19 ; MOVREL-NEXT: s_mov_b32 s17, s19
; MOVREL-NEXT: s_mov_b32 s18, s20
; MOVREL-NEXT: s_mov_b32 s19, s21 ; MOVREL-NEXT: s_mov_b32 s19, s21
; MOVREL-NEXT: s_mov_b32 s20, s22
; MOVREL-NEXT: s_mov_b32 s21, s23 ; MOVREL-NEXT: s_mov_b32 s21, s23
; MOVREL-NEXT: s_mov_b32 s22, s24
; MOVREL-NEXT: s_mov_b32 s23, s25 ; MOVREL-NEXT: s_mov_b32 s23, s25
; MOVREL-NEXT: s_mov_b32 s24, s26
; MOVREL-NEXT: s_mov_b32 s25, s27 ; MOVREL-NEXT: s_mov_b32 s25, s27
; MOVREL-NEXT: s_mov_b32 s26, s28
; MOVREL-NEXT: s_mov_b32 s27, s29 ; MOVREL-NEXT: s_mov_b32 s27, s29
; MOVREL-NEXT: s_mov_b32 s28, s30
; MOVREL-NEXT: s_mov_b32 s29, s31 ; MOVREL-NEXT: s_mov_b32 s29, s31
; MOVREL-NEXT: s_mov_b32 s31, s33 ; MOVREL-NEXT: s_mov_b32 s31, s33
; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s8, s10
; MOVREL-NEXT: s_mov_b32 s10, s12
; MOVREL-NEXT: s_mov_b32 s12, s14
; MOVREL-NEXT: s_mov_b32 s14, s16
; MOVREL-NEXT: s_mov_b32 s16, s18
; MOVREL-NEXT: s_mov_b32 s18, s20
; MOVREL-NEXT: s_mov_b32 s20, s22
; MOVREL-NEXT: s_mov_b32 s22, s24
; MOVREL-NEXT: s_mov_b32 s24, s26
; MOVREL-NEXT: s_mov_b32 s26, s28
; MOVREL-NEXT: s_mov_b32 s28, s30
; MOVREL-NEXT: s_mov_b32 s30, s32 ; MOVREL-NEXT: s_mov_b32 s30, s32
; MOVREL-NEXT: v_mov_b32_e32 v33, s31
; MOVREL-NEXT: v_mov_b32_e32 v2, s0
; MOVREL-NEXT: s_lshl_b32 m0, s34, 1 ; MOVREL-NEXT: s_lshl_b32 m0, s34, 1
; MOVREL-NEXT: v_mov_b32_e32 v33, s31
; MOVREL-NEXT: v_mov_b32_e32 v32, s30 ; MOVREL-NEXT: v_mov_b32_e32 v32, s30
; MOVREL-NEXT: v_mov_b32_e32 v31, s29 ; MOVREL-NEXT: v_mov_b32_e32 v31, s29
; MOVREL-NEXT: v_mov_b32_e32 v30, s28 ; MOVREL-NEXT: v_mov_b32_e32 v30, s28
; MOVREL-NEXT: v_mov_b32_e32 v29, s27 ; MOVREL-NEXT: v_mov_b32_e32 v29, s27
; MOVREL-NEXT: v_mov_b32_e32 v28, s26 ; MOVREL-NEXT: v_mov_b32_e32 v28, s26
; MOVREL-NEXT: v_mov_b32_e32 v27, s25 ; MOVREL-NEXT: v_mov_b32_e32 v27, s25
; MOVREL-NEXT: v_mov_b32_e32 v26, s24 ; MOVREL-NEXT: v_mov_b32_e32 v26, s24
; MOVREL-NEXT: v_mov_b32_e32 v25, s23 ; MOVREL-NEXT: v_mov_b32_e32 v25, s23
▲ Show 20 Lines • Show All 57 Lines • ▼ Show 20 Lines
entry: entry:
%insert = insertelement <16 x i64> %vec, i64 %val, i32 %idx %insert = insertelement <16 x i64> %vec, i64 %val, i32 %idx
ret <16 x i64> %insert ret <16 x i64> %insert
} }
define amdgpu_ps <16 x double> @dyn_insertelement_v16f64_s_v_s(<16 x double> inreg %vec, double %val, i32 inreg %idx) { define amdgpu_ps <16 x double> @dyn_insertelement_v16f64_s_v_s(<16 x double> inreg %vec, double %val, i32 inreg %idx) {
; GPRIDX-LABEL: dyn_insertelement_v16f64_s_v_s: ; GPRIDX-LABEL: dyn_insertelement_v16f64_s_v_s:
; GPRIDX: ; %bb.0: ; %entry ; GPRIDX: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_mov_b32 s0, s2
; GPRIDX-NEXT: s_mov_b32 s1, s3 ; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: s_mov_b32 s3, s5 ; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: s_mov_b32 s5, s7 ; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: s_mov_b32 s7, s9 ; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s8, s10
; GPRIDX-NEXT: s_mov_b32 s9, s11 ; GPRIDX-NEXT: s_mov_b32 s9, s11
; GPRIDX-NEXT: s_mov_b32 s10, s12
; GPRIDX-NEXT: s_mov_b32 s11, s13 ; GPRIDX-NEXT: s_mov_b32 s11, s13
; GPRIDX-NEXT: s_mov_b32 s12, s14
; GPRIDX-NEXT: s_mov_b32 s13, s15 ; GPRIDX-NEXT: s_mov_b32 s13, s15
; GPRIDX-NEXT: s_mov_b32 s14, s16
; GPRIDX-NEXT: s_mov_b32 s15, s17 ; GPRIDX-NEXT: s_mov_b32 s15, s17
; GPRIDX-NEXT: s_mov_b32 s16, s18
; GPRIDX-NEXT: s_mov_b32 s17, s19 ; GPRIDX-NEXT: s_mov_b32 s17, s19
; GPRIDX-NEXT: s_mov_b32 s18, s20
; GPRIDX-NEXT: s_mov_b32 s19, s21 ; GPRIDX-NEXT: s_mov_b32 s19, s21
; GPRIDX-NEXT: s_mov_b32 s20, s22
; GPRIDX-NEXT: s_mov_b32 s21, s23 ; GPRIDX-NEXT: s_mov_b32 s21, s23
; GPRIDX-NEXT: s_mov_b32 s22, s24
; GPRIDX-NEXT: s_mov_b32 s23, s25 ; GPRIDX-NEXT: s_mov_b32 s23, s25
; GPRIDX-NEXT: s_mov_b32 s24, s26
; GPRIDX-NEXT: s_mov_b32 s25, s27 ; GPRIDX-NEXT: s_mov_b32 s25, s27
; GPRIDX-NEXT: s_mov_b32 s26, s28
; GPRIDX-NEXT: s_mov_b32 s27, s29 ; GPRIDX-NEXT: s_mov_b32 s27, s29
; GPRIDX-NEXT: s_mov_b32 s28, s30
; GPRIDX-NEXT: s_mov_b32 s29, s31 ; GPRIDX-NEXT: s_mov_b32 s29, s31
; GPRIDX-NEXT: s_mov_b32 s31, s33 ; GPRIDX-NEXT: s_mov_b32 s31, s33
; GPRIDX-NEXT: s_mov_b32 s0, s2
; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: s_mov_b32 s8, s10
; GPRIDX-NEXT: s_mov_b32 s10, s12
; GPRIDX-NEXT: s_mov_b32 s12, s14
; GPRIDX-NEXT: s_mov_b32 s14, s16
; GPRIDX-NEXT: s_mov_b32 s16, s18
; GPRIDX-NEXT: s_mov_b32 s18, s20
; GPRIDX-NEXT: s_mov_b32 s20, s22
; GPRIDX-NEXT: s_mov_b32 s22, s24
; GPRIDX-NEXT: s_mov_b32 s24, s26
; GPRIDX-NEXT: s_mov_b32 s26, s28
; GPRIDX-NEXT: s_mov_b32 s28, s30
; GPRIDX-NEXT: s_mov_b32 s30, s32 ; GPRIDX-NEXT: s_mov_b32 s30, s32
; GPRIDX-NEXT: v_mov_b32_e32 v33, s31
; GPRIDX-NEXT: s_lshl_b32 s33, s34, 1 ; GPRIDX-NEXT: s_lshl_b32 s33, s34, 1
; GPRIDX-NEXT: v_mov_b32_e32 v33, s31
; GPRIDX-NEXT: v_mov_b32_e32 v32, s30 ; GPRIDX-NEXT: v_mov_b32_e32 v32, s30
; GPRIDX-NEXT: v_mov_b32_e32 v31, s29 ; GPRIDX-NEXT: v_mov_b32_e32 v31, s29
; GPRIDX-NEXT: v_mov_b32_e32 v30, s28 ; GPRIDX-NEXT: v_mov_b32_e32 v30, s28
; GPRIDX-NEXT: v_mov_b32_e32 v29, s27 ; GPRIDX-NEXT: v_mov_b32_e32 v29, s27
; GPRIDX-NEXT: v_mov_b32_e32 v28, s26 ; GPRIDX-NEXT: v_mov_b32_e32 v28, s26
; GPRIDX-NEXT: v_mov_b32_e32 v27, s25 ; GPRIDX-NEXT: v_mov_b32_e32 v27, s25
; GPRIDX-NEXT: v_mov_b32_e32 v26, s24 ; GPRIDX-NEXT: v_mov_b32_e32 v26, s24
; GPRIDX-NEXT: v_mov_b32_e32 v25, s23 ; GPRIDX-NEXT: v_mov_b32_e32 v25, s23
▲ Show 20 Lines • Show All 55 Lines • ▼ Show 20 Lines
; GPRIDX-NEXT: v_readfirstlane_b32 s28, v30 ; GPRIDX-NEXT: v_readfirstlane_b32 s28, v30
; GPRIDX-NEXT: v_readfirstlane_b32 s29, v31 ; GPRIDX-NEXT: v_readfirstlane_b32 s29, v31
; GPRIDX-NEXT: v_readfirstlane_b32 s30, v32 ; GPRIDX-NEXT: v_readfirstlane_b32 s30, v32
; GPRIDX-NEXT: v_readfirstlane_b32 s31, v33 ; GPRIDX-NEXT: v_readfirstlane_b32 s31, v33
; GPRIDX-NEXT: ; return to shader part epilog ; GPRIDX-NEXT: ; return to shader part epilog
; ;
; MOVREL-LABEL: dyn_insertelement_v16f64_s_v_s: ; MOVREL-LABEL: dyn_insertelement_v16f64_s_v_s:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s1, s3 ; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: v_mov_b32_e32 v2, s0
; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s3, s5 ; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s5, s7 ; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s7, s9 ; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s8, s10
; MOVREL-NEXT: s_mov_b32 s9, s11 ; MOVREL-NEXT: s_mov_b32 s9, s11
; MOVREL-NEXT: s_mov_b32 s10, s12
; MOVREL-NEXT: s_mov_b32 s11, s13 ; MOVREL-NEXT: s_mov_b32 s11, s13
; MOVREL-NEXT: s_mov_b32 s12, s14
; MOVREL-NEXT: s_mov_b32 s13, s15 ; MOVREL-NEXT: s_mov_b32 s13, s15
; MOVREL-NEXT: s_mov_b32 s14, s16
; MOVREL-NEXT: s_mov_b32 s15, s17 ; MOVREL-NEXT: s_mov_b32 s15, s17
; MOVREL-NEXT: s_mov_b32 s16, s18
; MOVREL-NEXT: s_mov_b32 s17, s19 ; MOVREL-NEXT: s_mov_b32 s17, s19
; MOVREL-NEXT: s_mov_b32 s18, s20
; MOVREL-NEXT: s_mov_b32 s19, s21 ; MOVREL-NEXT: s_mov_b32 s19, s21
; MOVREL-NEXT: s_mov_b32 s20, s22
; MOVREL-NEXT: s_mov_b32 s21, s23 ; MOVREL-NEXT: s_mov_b32 s21, s23
; MOVREL-NEXT: s_mov_b32 s22, s24
; MOVREL-NEXT: s_mov_b32 s23, s25 ; MOVREL-NEXT: s_mov_b32 s23, s25
; MOVREL-NEXT: s_mov_b32 s24, s26
; MOVREL-NEXT: s_mov_b32 s25, s27 ; MOVREL-NEXT: s_mov_b32 s25, s27
; MOVREL-NEXT: s_mov_b32 s26, s28
; MOVREL-NEXT: s_mov_b32 s27, s29 ; MOVREL-NEXT: s_mov_b32 s27, s29
; MOVREL-NEXT: s_mov_b32 s28, s30
; MOVREL-NEXT: s_mov_b32 s29, s31 ; MOVREL-NEXT: s_mov_b32 s29, s31
; MOVREL-NEXT: s_mov_b32 s31, s33 ; MOVREL-NEXT: s_mov_b32 s31, s33
; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s8, s10
; MOVREL-NEXT: s_mov_b32 s10, s12
; MOVREL-NEXT: s_mov_b32 s12, s14
; MOVREL-NEXT: s_mov_b32 s14, s16
; MOVREL-NEXT: s_mov_b32 s16, s18
; MOVREL-NEXT: s_mov_b32 s18, s20
; MOVREL-NEXT: s_mov_b32 s20, s22
; MOVREL-NEXT: s_mov_b32 s22, s24
; MOVREL-NEXT: s_mov_b32 s24, s26
; MOVREL-NEXT: s_mov_b32 s26, s28
; MOVREL-NEXT: s_mov_b32 s28, s30
; MOVREL-NEXT: s_mov_b32 s30, s32 ; MOVREL-NEXT: s_mov_b32 s30, s32
; MOVREL-NEXT: v_mov_b32_e32 v33, s31
; MOVREL-NEXT: v_mov_b32_e32 v2, s0
; MOVREL-NEXT: s_lshl_b32 m0, s34, 1 ; MOVREL-NEXT: s_lshl_b32 m0, s34, 1
; MOVREL-NEXT: v_mov_b32_e32 v33, s31
; MOVREL-NEXT: v_mov_b32_e32 v32, s30 ; MOVREL-NEXT: v_mov_b32_e32 v32, s30
; MOVREL-NEXT: v_mov_b32_e32 v31, s29 ; MOVREL-NEXT: v_mov_b32_e32 v31, s29
; MOVREL-NEXT: v_mov_b32_e32 v30, s28 ; MOVREL-NEXT: v_mov_b32_e32 v30, s28
; MOVREL-NEXT: v_mov_b32_e32 v29, s27 ; MOVREL-NEXT: v_mov_b32_e32 v29, s27
; MOVREL-NEXT: v_mov_b32_e32 v28, s26 ; MOVREL-NEXT: v_mov_b32_e32 v28, s26
; MOVREL-NEXT: v_mov_b32_e32 v27, s25 ; MOVREL-NEXT: v_mov_b32_e32 v27, s25
; MOVREL-NEXT: v_mov_b32_e32 v26, s24 ; MOVREL-NEXT: v_mov_b32_e32 v26, s24
; MOVREL-NEXT: v_mov_b32_e32 v25, s23 ; MOVREL-NEXT: v_mov_b32_e32 v25, s23
▲ Show 20 Lines • Show All 140 Lines • ▼ Show 20 Linesentry:
%insert = insertelement <7 x i8 addrspace(3)*> %vec, i8 addrspace(3)* %val, i32 %idx %insert = insertelement <7 x i8 addrspace(3)*> %vec, i8 addrspace(3)* %val, i32 %idx
ret <7 x i8 addrspace(3)*> %insert ret <7 x i8 addrspace(3)*> %insert
} }
define amdgpu_ps <7 x float> @dyn_insertelement_v7f32_s_v_s(<7 x float> inreg %vec, float %val, i32 inreg %idx) { define amdgpu_ps <7 x float> @dyn_insertelement_v7f32_s_v_s(<7 x float> inreg %vec, float %val, i32 inreg %idx) {
; GPRIDX-LABEL: dyn_insertelement_v7f32_s_v_s: ; GPRIDX-LABEL: dyn_insertelement_v7f32_s_v_s:
; GPRIDX: ; %bb.0: ; %entry ; GPRIDX: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_mov_b32 s0, s2 ; GPRIDX-NEXT: s_mov_b32 s0, s2
; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: s_mov_b32 s1, s3 ; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: v_mov_b32_e32 v13, s6
; GPRIDX-NEXT: v_mov_b32_e32 v7, s0 ; GPRIDX-NEXT: v_mov_b32_e32 v7, s0
; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s9, 0 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s9, 0
; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: v_mov_b32_e32 v8, s1 ; GPRIDX-NEXT: v_mov_b32_e32 v8, s1
; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s9, 1 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s9, 1
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: v_mov_b32_e32 v9, s2 ; GPRIDX-NEXT: v_mov_b32_e32 v9, s2
; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v8, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v1, v8, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s9, 2 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s9, 2
; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: v_mov_b32_e32 v10, s3 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s3
; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v9, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v9, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s9, 3 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s9, 3
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: v_mov_b32_e32 v11, s4 ; GPRIDX-NEXT: v_mov_b32_e32 v11, s4
; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v10, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v10, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s9, 4 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s9, 4
; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: v_mov_b32_e32 v12, s5 ; GPRIDX-NEXT: v_mov_b32_e32 v12, s5
; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v11, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v11, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s9, 5 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s9, 5
; GPRIDX-NEXT: v_mov_b32_e32 v13, s6
; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v12, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v12, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s9, 6 ; GPRIDX-NEXT: v_cmp_eq_u32_e64 vcc, s9, 6
; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v13, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v13, v0, vcc
; GPRIDX-NEXT: v_mov_b32_e32 v0, v7 ; GPRIDX-NEXT: v_mov_b32_e32 v0, v7
; GPRIDX-NEXT: ; return to shader part epilog ; GPRIDX-NEXT: ; return to shader part epilog
; ;
; MOVREL-LABEL: dyn_insertelement_v7f32_s_v_s: ; MOVREL-LABEL: dyn_insertelement_v7f32_s_v_s:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s0, s2 ; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: v_mov_b32_e32 v13, s6
; MOVREL-NEXT: v_mov_b32_e32 v7, s0
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s9, 0 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s9, 0
; MOVREL-NEXT: v_mov_b32_e32 v7, s0
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: v_mov_b32_e32 v8, s1 ; MOVREL-NEXT: v_mov_b32_e32 v8, s1
; MOVREL-NEXT: v_mov_b32_e32 v9, s2 ; MOVREL-NEXT: v_mov_b32_e32 v9, s2
; MOVREL-NEXT: v_mov_b32_e32 v10, s3
; MOVREL-NEXT: v_mov_b32_e32 v11, s4
; MOVREL-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s9, 1 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s9, 1
; MOVREL-NEXT: v_mov_b32_e32 v12, s5 ; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: v_mov_b32_e32 v10, s3
; MOVREL-NEXT: v_mov_b32_e32 v11, s4
; MOVREL-NEXT: v_cndmask_b32_e32 v1, v8, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v1, v8, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s9, 2 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s9, 2
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: v_mov_b32_e32 v12, s5
; MOVREL-NEXT: v_mov_b32_e32 v13, s6
; MOVREL-NEXT: v_cndmask_b32_e32 v2, v9, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v2, v9, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s9, 3 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s9, 3
; MOVREL-NEXT: v_cndmask_b32_e32 v3, v10, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v3, v10, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s9, 4 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s9, 4
; MOVREL-NEXT: v_cndmask_b32_e32 v4, v11, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v4, v11, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s9, 5 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s9, 5
; MOVREL-NEXT: v_cndmask_b32_e32 v5, v12, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v5, v12, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s9, 6 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s9, 6
; MOVREL-NEXT: v_cndmask_b32_e32 v6, v13, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v6, v13, v0, vcc_lo
; MOVREL-NEXT: v_mov_b32_e32 v0, v7 ; MOVREL-NEXT: v_mov_b32_e32 v0, v7
; MOVREL-NEXT: ; return to shader part epilog ; MOVREL-NEXT: ; return to shader part epilog
entry: entry:
%insert = insertelement <7 x float> %vec, float %val, i32 %idx %insert = insertelement <7 x float> %vec, float %val, i32 %idx
ret <7 x float> %insert ret <7 x float> %insert
} }
define amdgpu_ps <7 x float> @dyn_insertelement_v7f32_s_v_v(<7 x float> inreg %vec, float %val, i32 %idx) { define amdgpu_ps <7 x float> @dyn_insertelement_v7f32_s_v_v(<7 x float> inreg %vec, float %val, i32 %idx) {
; GPRIDX-LABEL: dyn_insertelement_v7f32_s_v_v: ; GPRIDX-LABEL: dyn_insertelement_v7f32_s_v_v:
; GPRIDX: ; %bb.0: ; %entry ; GPRIDX: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_mov_b32 s0, s2 ; GPRIDX-NEXT: s_mov_b32 s0, s2
; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: s_mov_b32 s1, s3 ; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: v_mov_b32_e32 v14, s6
; GPRIDX-NEXT: v_mov_b32_e32 v8, s0 ; GPRIDX-NEXT: v_mov_b32_e32 v8, s0
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 0, v1
; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: v_mov_b32_e32 v9, s1 ; GPRIDX-NEXT: v_mov_b32_e32 v9, s1
; GPRIDX-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 1, v1
; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: v_mov_b32_e32 v10, s2 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s2
; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v9, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v7, v9, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 2, v1
; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: v_mov_b32_e32 v11, s3 ; GPRIDX-NEXT: v_mov_b32_e32 v11, s3
; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 3, v1
; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: v_mov_b32_e32 v12, s4 ; GPRIDX-NEXT: v_mov_b32_e32 v12, s4
; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 4, v1
; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: v_mov_b32_e32 v13, s5 ; GPRIDX-NEXT: v_mov_b32_e32 v13, s5
; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 5, v1
; GPRIDX-NEXT: v_mov_b32_e32 v14, s6
; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc
; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v1 ; GPRIDX-NEXT: v_cmp_eq_u32_e32 vcc, 6, v1
; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v14, v0, vcc ; GPRIDX-NEXT: v_cndmask_b32_e32 v6, v14, v0, vcc
; GPRIDX-NEXT: v_mov_b32_e32 v0, v8 ; GPRIDX-NEXT: v_mov_b32_e32 v0, v8
; GPRIDX-NEXT: v_mov_b32_e32 v1, v7 ; GPRIDX-NEXT: v_mov_b32_e32 v1, v7
; GPRIDX-NEXT: ; return to shader part epilog ; GPRIDX-NEXT: ; return to shader part epilog
; ;
; MOVREL-LABEL: dyn_insertelement_v7f32_s_v_v: ; MOVREL-LABEL: dyn_insertelement_v7f32_s_v_v:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s0, s2 ; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: v_mov_b32_e32 v14, s6
; MOVREL-NEXT: v_mov_b32_e32 v8, s0
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v1
; MOVREL-NEXT: v_mov_b32_e32 v8, s0
; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: v_mov_b32_e32 v9, s1 ; MOVREL-NEXT: v_mov_b32_e32 v9, s1
; MOVREL-NEXT: v_mov_b32_e32 v10, s2 ; MOVREL-NEXT: v_mov_b32_e32 v10, s2
; MOVREL-NEXT: v_mov_b32_e32 v11, s3
; MOVREL-NEXT: v_mov_b32_e32 v12, s4
; MOVREL-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v8, v8, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 1, v1
; MOVREL-NEXT: v_mov_b32_e32 v13, s5 ; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: v_mov_b32_e32 v11, s3
; MOVREL-NEXT: v_mov_b32_e32 v12, s4
; MOVREL-NEXT: v_cndmask_b32_e32 v7, v9, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v7, v9, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v1
; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: v_mov_b32_e32 v13, s5
; MOVREL-NEXT: v_mov_b32_e32 v14, s6
; MOVREL-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v2, v10, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 3, v1
; MOVREL-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v3, v11, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v1
; MOVREL-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v4, v12, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 5, v1
; MOVREL-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v5, v13, v0, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v1 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 6, v1
▲ Show 20 Lines • Show All 187 Lines • ▼ Show 20 Lines
; GPRIDX-NEXT: v_readfirstlane_b32 s12, v14 ; GPRIDX-NEXT: v_readfirstlane_b32 s12, v14
; GPRIDX-NEXT: v_readfirstlane_b32 s13, v15 ; GPRIDX-NEXT: v_readfirstlane_b32 s13, v15
; GPRIDX-NEXT: ; return to shader part epilog ; GPRIDX-NEXT: ; return to shader part epilog
; ;
; MOVREL-LABEL: dyn_insertelement_v7f64_s_v_s: ; MOVREL-LABEL: dyn_insertelement_v7f64_s_v_s:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s0, s2 ; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s1, s3 ; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: v_mov_b32_e32 v2, s0
; MOVREL-NEXT: s_mov_b32 s2, s4 ; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s3, s5 ; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: s_mov_b32 s4, s6 ; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s5, s7 ; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8 ; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s7, s9 ; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s8, s10 ; MOVREL-NEXT: s_mov_b32 s8, s10
; MOVREL-NEXT: s_mov_b32 s9, s11 ; MOVREL-NEXT: s_mov_b32 s9, s11
; MOVREL-NEXT: s_mov_b32 s10, s12 ; MOVREL-NEXT: s_mov_b32 s10, s12
; MOVREL-NEXT: s_mov_b32 s11, s13 ; MOVREL-NEXT: s_mov_b32 s11, s13
; MOVREL-NEXT: s_mov_b32 s12, s14 ; MOVREL-NEXT: s_mov_b32 s12, s14
; MOVREL-NEXT: s_mov_b32 s13, s15 ; MOVREL-NEXT: s_mov_b32 s13, s15
; MOVREL-NEXT: v_mov_b32_e32 v17, s15
; MOVREL-NEXT: v_mov_b32_e32 v2, s0
; MOVREL-NEXT: s_lshl_b32 m0, s16, 1 ; MOVREL-NEXT: s_lshl_b32 m0, s16, 1
; MOVREL-NEXT: v_mov_b32_e32 v17, s15
; MOVREL-NEXT: v_mov_b32_e32 v16, s14 ; MOVREL-NEXT: v_mov_b32_e32 v16, s14
; MOVREL-NEXT: v_mov_b32_e32 v15, s13 ; MOVREL-NEXT: v_mov_b32_e32 v15, s13
; MOVREL-NEXT: v_mov_b32_e32 v14, s12 ; MOVREL-NEXT: v_mov_b32_e32 v14, s12
; MOVREL-NEXT: v_mov_b32_e32 v13, s11 ; MOVREL-NEXT: v_mov_b32_e32 v13, s11
; MOVREL-NEXT: v_mov_b32_e32 v12, s10 ; MOVREL-NEXT: v_mov_b32_e32 v12, s10
; MOVREL-NEXT: v_mov_b32_e32 v11, s9 ; MOVREL-NEXT: v_mov_b32_e32 v11, s9
; MOVREL-NEXT: v_mov_b32_e32 v10, s8 ; MOVREL-NEXT: v_mov_b32_e32 v10, s8
; MOVREL-NEXT: v_mov_b32_e32 v9, s7 ; MOVREL-NEXT: v_mov_b32_e32 v9, s7
Show All 37 Lines
; GPRIDX-NEXT: s_mov_b32 s6, s8 ; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: s_mov_b32 s7, s9 ; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s8, s10 ; GPRIDX-NEXT: s_mov_b32 s8, s10
; GPRIDX-NEXT: s_mov_b32 s9, s11 ; GPRIDX-NEXT: s_mov_b32 s9, s11
; GPRIDX-NEXT: s_mov_b32 s10, s12 ; GPRIDX-NEXT: s_mov_b32 s10, s12
; GPRIDX-NEXT: s_mov_b32 s11, s13 ; GPRIDX-NEXT: s_mov_b32 s11, s13
; GPRIDX-NEXT: s_mov_b32 s12, s14 ; GPRIDX-NEXT: s_mov_b32 s12, s14
; GPRIDX-NEXT: s_mov_b32 s13, s15 ; GPRIDX-NEXT: s_mov_b32 s13, s15
; GPRIDX-NEXT: v_mov_b32_e32 v18, s15
; GPRIDX-NEXT: v_mov_b32_e32 v17, s14
; GPRIDX-NEXT: v_mov_b32_e32 v16, s13 ; GPRIDX-NEXT: v_mov_b32_e32 v16, s13
; GPRIDX-NEXT: v_mov_b32_e32 v15, s12 ; GPRIDX-NEXT: v_mov_b32_e32 v15, s12
; GPRIDX-NEXT: v_mov_b32_e32 v14, s11 ; GPRIDX-NEXT: v_mov_b32_e32 v14, s11
; GPRIDX-NEXT: v_mov_b32_e32 v13, s10 ; GPRIDX-NEXT: v_mov_b32_e32 v13, s10
; GPRIDX-NEXT: v_mov_b32_e32 v12, s9 ; GPRIDX-NEXT: v_mov_b32_e32 v12, s9
; GPRIDX-NEXT: v_mov_b32_e32 v11, s8 ; GPRIDX-NEXT: v_mov_b32_e32 v11, s8
; GPRIDX-NEXT: v_mov_b32_e32 v10, s7 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s7
; GPRIDX-NEXT: v_mov_b32_e32 v9, s6 ; GPRIDX-NEXT: v_mov_b32_e32 v9, s6
Show All 33 Lines
; GPRIDX-NEXT: v_readfirstlane_b32 s6, v7 ; GPRIDX-NEXT: v_readfirstlane_b32 s6, v7
; GPRIDX-NEXT: v_readfirstlane_b32 s7, v10 ; GPRIDX-NEXT: v_readfirstlane_b32 s7, v10
; GPRIDX-NEXT: v_readfirstlane_b32 s8, v9 ; GPRIDX-NEXT: v_readfirstlane_b32 s8, v9
; GPRIDX-NEXT: v_readfirstlane_b32 s9, v12 ; GPRIDX-NEXT: v_readfirstlane_b32 s9, v12
; GPRIDX-NEXT: v_readfirstlane_b32 s10, v11 ; GPRIDX-NEXT: v_readfirstlane_b32 s10, v11
; GPRIDX-NEXT: v_readfirstlane_b32 s11, v13 ; GPRIDX-NEXT: v_readfirstlane_b32 s11, v13
; GPRIDX-NEXT: v_readfirstlane_b32 s12, v0 ; GPRIDX-NEXT: v_readfirstlane_b32 s12, v0
; GPRIDX-NEXT: v_readfirstlane_b32 s13, v1 ; GPRIDX-NEXT: v_readfirstlane_b32 s13, v1
; GPRIDX-NEXT: v_mov_b32_e32 v18, s15
; GPRIDX-NEXT: v_mov_b32_e32 v17, s14
; GPRIDX-NEXT: ; return to shader part epilog ; GPRIDX-NEXT: ; return to shader part epilog
; ;
; MOVREL-LABEL: dyn_insertelement_v7f64_s_v_v: ; MOVREL-LABEL: dyn_insertelement_v7f64_s_v_v:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s0, s2 ; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s1, s3 ; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s2, s4 ; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s3, s5 ; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: v_mov_b32_e32 v5, s2
; MOVREL-NEXT: v_mov_b32_e32 v6, s3
; MOVREL-NEXT: v_mov_b32_e32 v4, s1
; MOVREL-NEXT: v_mov_b32_e32 v3, s0
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 1, v2
; MOVREL-NEXT: s_mov_b32 s4, s6 ; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s5, s7 ; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8 ; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s7, s9 ; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: v_mov_b32_e32 v9, s6
; MOVREL-NEXT: v_mov_b32_e32 v10, s7
; MOVREL-NEXT: v_mov_b32_e32 v8, s5
; MOVREL-NEXT: v_mov_b32_e32 v7, s4
; MOVREL-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v2
; MOVREL-NEXT: v_cndmask_b32_e64 v5, v5, v0, s0
; MOVREL-NEXT: v_cndmask_b32_e64 v6, v6, v1, s0
; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 3, v2
; MOVREL-NEXT: s_mov_b32 s8, s10 ; MOVREL-NEXT: s_mov_b32 s8, s10
; MOVREL-NEXT: s_mov_b32 s9, s11 ; MOVREL-NEXT: s_mov_b32 s9, s11
; MOVREL-NEXT: s_mov_b32 s10, s12 ; MOVREL-NEXT: s_mov_b32 s10, s12
; MOVREL-NEXT: s_mov_b32 s11, s13 ; MOVREL-NEXT: s_mov_b32 s11, s13
; MOVREL-NEXT: s_mov_b32 s12, s14 ; MOVREL-NEXT: s_mov_b32 s12, s14
; MOVREL-NEXT: s_mov_b32 s13, s15 ; MOVREL-NEXT: s_mov_b32 s13, s15
; MOVREL-NEXT: v_mov_b32_e32 v18, s15
; MOVREL-NEXT: v_mov_b32_e32 v17, s14
; MOVREL-NEXT: v_mov_b32_e32 v16, s13
; MOVREL-NEXT: v_mov_b32_e32 v15, s12 ; MOVREL-NEXT: v_mov_b32_e32 v15, s12
; MOVREL-NEXT: v_mov_b32_e32 v16, s13
; MOVREL-NEXT: v_mov_b32_e32 v14, s11 ; MOVREL-NEXT: v_mov_b32_e32 v14, s11
; MOVREL-NEXT: v_mov_b32_e32 v13, s10 ; MOVREL-NEXT: v_mov_b32_e32 v13, s10
; MOVREL-NEXT: v_mov_b32_e32 v12, s9 ; MOVREL-NEXT: v_mov_b32_e32 v12, s9
; MOVREL-NEXT: v_mov_b32_e32 v11, s8 ; MOVREL-NEXT: v_mov_b32_e32 v11, s8
; MOVREL-NEXT: v_mov_b32_e32 v10, s7
; MOVREL-NEXT: v_mov_b32_e32 v9, s6
; MOVREL-NEXT: v_mov_b32_e32 v8, s5
; MOVREL-NEXT: v_mov_b32_e32 v7, s4
; MOVREL-NEXT: v_mov_b32_e32 v6, s3
; MOVREL-NEXT: v_mov_b32_e32 v5, s2
; MOVREL-NEXT: v_mov_b32_e32 v4, s1
; MOVREL-NEXT: v_mov_b32_e32 v3, s0
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 1, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s1, 6, v2
; MOVREL-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v2
; MOVREL-NEXT: v_cndmask_b32_e64 v5, v5, v0, s0
; MOVREL-NEXT: v_cndmask_b32_e64 v6, v6, v1, s0
; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 3, v2
; MOVREL-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e32 v8, v8, v1, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v8, v8, v1, vcc_lo
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v2
; MOVREL-NEXT: v_cndmask_b32_e64 v9, v9, v0, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v9, v9, v0, s0
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 4, v2
; MOVREL-NEXT: v_cndmask_b32_e64 v10, v10, v1, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v10, v10, v1, s0
; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 5, v2 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 5, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s1, 6, v2
; MOVREL-NEXT: v_readfirstlane_b32 s2, v5 ; MOVREL-NEXT: v_readfirstlane_b32 s2, v5
; MOVREL-NEXT: v_cndmask_b32_e32 v11, v11, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v11, v11, v0, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e32 v2, v12, v1, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v2, v12, v1, vcc_lo
; MOVREL-NEXT: v_readfirstlane_b32 s3, v6
; MOVREL-NEXT: v_cndmask_b32_e64 v12, v13, v0, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v12, v13, v0, s0
; MOVREL-NEXT: v_cndmask_b32_e64 v13, v14, v1, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v13, v14, v1, s0
; MOVREL-NEXT: v_cndmask_b32_e64 v0, v15, v0, s1 ; MOVREL-NEXT: v_cndmask_b32_e64 v0, v15, v0, s1
; MOVREL-NEXT: v_cndmask_b32_e64 v1, v16, v1, s1 ; MOVREL-NEXT: v_cndmask_b32_e64 v1, v16, v1, s1
; MOVREL-NEXT: v_readfirstlane_b32 s0, v3 ; MOVREL-NEXT: v_readfirstlane_b32 s0, v3
; MOVREL-NEXT: v_readfirstlane_b32 s1, v4 ; MOVREL-NEXT: v_readfirstlane_b32 s1, v4
; MOVREL-NEXT: v_readfirstlane_b32 s3, v6
; MOVREL-NEXT: v_readfirstlane_b32 s4, v7 ; MOVREL-NEXT: v_readfirstlane_b32 s4, v7
; MOVREL-NEXT: v_readfirstlane_b32 s5, v8 ; MOVREL-NEXT: v_readfirstlane_b32 s5, v8
; MOVREL-NEXT: v_readfirstlane_b32 s6, v9 ; MOVREL-NEXT: v_readfirstlane_b32 s6, v9
; MOVREL-NEXT: v_readfirstlane_b32 s7, v10 ; MOVREL-NEXT: v_readfirstlane_b32 s7, v10
; MOVREL-NEXT: v_readfirstlane_b32 s8, v11 ; MOVREL-NEXT: v_readfirstlane_b32 s8, v11
; MOVREL-NEXT: v_readfirstlane_b32 s9, v2 ; MOVREL-NEXT: v_readfirstlane_b32 s9, v2
; MOVREL-NEXT: v_readfirstlane_b32 s10, v12 ; MOVREL-NEXT: v_readfirstlane_b32 s10, v12
; MOVREL-NEXT: v_readfirstlane_b32 s11, v13 ; MOVREL-NEXT: v_readfirstlane_b32 s11, v13
; MOVREL-NEXT: v_readfirstlane_b32 s12, v0 ; MOVREL-NEXT: v_readfirstlane_b32 s12, v0
; MOVREL-NEXT: v_readfirstlane_b32 s13, v1 ; MOVREL-NEXT: v_readfirstlane_b32 s13, v1
; MOVREL-NEXT: v_mov_b32_e32 v18, s15
; MOVREL-NEXT: v_mov_b32_e32 v17, s14
; MOVREL-NEXT: ; return to shader part epilog ; MOVREL-NEXT: ; return to shader part epilog
entry: entry:
%insert = insertelement <7 x double> %vec, double %val, i32 %idx %insert = insertelement <7 x double> %vec, double %val, i32 %idx
ret <7 x double> %insert ret <7 x double> %insert
} }
define amdgpu_ps <7 x double> @dyn_insertelement_v7f64_v_v_s(<7 x double> %vec, double %val, i32 inreg %idx) { define amdgpu_ps <7 x double> @dyn_insertelement_v7f64_v_v_s(<7 x double> %vec, double %val, i32 inreg %idx) {
; GPRIDX-LABEL: dyn_insertelement_v7f64_v_v_s: ; GPRIDX-LABEL: dyn_insertelement_v7f64_v_v_s:
▲ Show 20 Lines • Show All 170 Lines • ▼ Show 20 Lines
; GPRIDX-NEXT: s_mov_b32 s2, s4 ; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: s_mov_b32 s3, s5 ; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s4, s6 ; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: s_mov_b32 s5, s7 ; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: s_mov_b32 s6, s8 ; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: s_mov_b32 s7, s9 ; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s8, s10 ; GPRIDX-NEXT: s_mov_b32 s8, s10
; GPRIDX-NEXT: s_mov_b32 s9, s11 ; GPRIDX-NEXT: s_mov_b32 s9, s11
; GPRIDX-NEXT: v_mov_b32_e32 v17, s15
; GPRIDX-NEXT: v_mov_b32_e32 v16, s14
; GPRIDX-NEXT: v_mov_b32_e32 v15, s13
; GPRIDX-NEXT: v_mov_b32_e32 v14, s12
; GPRIDX-NEXT: v_mov_b32_e32 v13, s11
; GPRIDX-NEXT: v_mov_b32_e32 v12, s10
; GPRIDX-NEXT: v_mov_b32_e32 v11, s9 ; GPRIDX-NEXT: v_mov_b32_e32 v11, s9
; GPRIDX-NEXT: v_mov_b32_e32 v10, s8 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s8
; GPRIDX-NEXT: v_mov_b32_e32 v9, s7 ; GPRIDX-NEXT: v_mov_b32_e32 v9, s7
; GPRIDX-NEXT: v_mov_b32_e32 v8, s6 ; GPRIDX-NEXT: v_mov_b32_e32 v8, s6
; GPRIDX-NEXT: v_mov_b32_e32 v7, s5 ; GPRIDX-NEXT: v_mov_b32_e32 v7, s5
; GPRIDX-NEXT: v_mov_b32_e32 v6, s4 ; GPRIDX-NEXT: v_mov_b32_e32 v6, s4
; GPRIDX-NEXT: v_mov_b32_e32 v5, s3 ; GPRIDX-NEXT: v_mov_b32_e32 v5, s3
; GPRIDX-NEXT: v_mov_b32_e32 v4, s2 ; GPRIDX-NEXT: v_mov_b32_e32 v4, s2
Show All 19 Lines
; GPRIDX-NEXT: v_readfirstlane_b32 s2, v4 ; GPRIDX-NEXT: v_readfirstlane_b32 s2, v4
; GPRIDX-NEXT: v_readfirstlane_b32 s3, v5 ; GPRIDX-NEXT: v_readfirstlane_b32 s3, v5
; GPRIDX-NEXT: v_readfirstlane_b32 s4, v6 ; GPRIDX-NEXT: v_readfirstlane_b32 s4, v6
; GPRIDX-NEXT: v_readfirstlane_b32 s5, v7 ; GPRIDX-NEXT: v_readfirstlane_b32 s5, v7
; GPRIDX-NEXT: v_readfirstlane_b32 s6, v8 ; GPRIDX-NEXT: v_readfirstlane_b32 s6, v8
; GPRIDX-NEXT: v_readfirstlane_b32 s7, v9 ; GPRIDX-NEXT: v_readfirstlane_b32 s7, v9
; GPRIDX-NEXT: v_readfirstlane_b32 s8, v0 ; GPRIDX-NEXT: v_readfirstlane_b32 s8, v0
; GPRIDX-NEXT: v_readfirstlane_b32 s9, v1 ; GPRIDX-NEXT: v_readfirstlane_b32 s9, v1
; GPRIDX-NEXT: v_mov_b32_e32 v14, s12
; GPRIDX-NEXT: v_mov_b32_e32 v13, s11
; GPRIDX-NEXT: v_mov_b32_e32 v12, s10
; GPRIDX-NEXT: ; return to shader part epilog ; GPRIDX-NEXT: ; return to shader part epilog
; ;
; MOVREL-LABEL: dyn_insertelement_v5f64_s_v_s: ; MOVREL-LABEL: dyn_insertelement_v5f64_s_v_s:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s0, s2 ; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s1, s3 ; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s2, s4 ; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s3, s5 ; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: v_mov_b32_e32 v4, s2
; MOVREL-NEXT: v_mov_b32_e32 v5, s3
; MOVREL-NEXT: v_mov_b32_e32 v3, s1
; MOVREL-NEXT: v_mov_b32_e32 v2, s0
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s12, 0
; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, s12, 1
; MOVREL-NEXT: s_mov_b32 s4, s6 ; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s5, s7 ; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8 ; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s7, s9 ; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s8, s10 ; MOVREL-NEXT: s_mov_b32 s8, s10
; MOVREL-NEXT: s_mov_b32 s9, s11 ; MOVREL-NEXT: s_mov_b32 s9, s11
; MOVREL-NEXT: v_mov_b32_e32 v17, s15
; MOVREL-NEXT: v_mov_b32_e32 v16, s14
; MOVREL-NEXT: v_mov_b32_e32 v15, s13
; MOVREL-NEXT: v_mov_b32_e32 v14, s12
; MOVREL-NEXT: v_mov_b32_e32 v13, s11
; MOVREL-NEXT: v_mov_b32_e32 v12, s10
; MOVREL-NEXT: v_mov_b32_e32 v11, s9
; MOVREL-NEXT: v_mov_b32_e32 v10, s8 ; MOVREL-NEXT: v_mov_b32_e32 v10, s8
; MOVREL-NEXT: v_mov_b32_e32 v11, s9
; MOVREL-NEXT: v_mov_b32_e32 v9, s7 ; MOVREL-NEXT: v_mov_b32_e32 v9, s7
; MOVREL-NEXT: v_mov_b32_e32 v8, s6 ; MOVREL-NEXT: v_mov_b32_e32 v8, s6
; MOVREL-NEXT: v_mov_b32_e32 v7, s5 ; MOVREL-NEXT: v_mov_b32_e32 v7, s5
; MOVREL-NEXT: v_mov_b32_e32 v6, s4 ; MOVREL-NEXT: v_mov_b32_e32 v6, s4
; MOVREL-NEXT: v_mov_b32_e32 v5, s3
; MOVREL-NEXT: v_mov_b32_e32 v4, s2
; MOVREL-NEXT: v_mov_b32_e32 v3, s1
; MOVREL-NEXT: v_mov_b32_e32 v2, s0
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s12, 0
; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, s12, 1
; MOVREL-NEXT: v_cmp_eq_u32_e64 s1, s12, 4
; MOVREL-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e32 v3, v3, v1, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v3, v3, v1, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e64 v4, v4, v0, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v4, v4, v0, s0
; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s12, 2 ; MOVREL-NEXT: v_cmp_eq_u32_e64 vcc_lo, s12, 2
; MOVREL-NEXT: v_cndmask_b32_e64 v5, v5, v1, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v5, v5, v1, s0
; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, s12, 3 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, s12, 3
; MOVREL-NEXT: v_cmp_eq_u32_e64 s1, s12, 4
; MOVREL-NEXT: v_readfirstlane_b32 s2, v4 ; MOVREL-NEXT: v_readfirstlane_b32 s2, v4
; MOVREL-NEXT: v_cndmask_b32_e32 v6, v6, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v6, v6, v0, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e32 v7, v7, v1, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v7, v7, v1, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e64 v8, v8, v0, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v8, v8, v0, s0
; MOVREL-NEXT: v_cndmask_b32_e64 v9, v9, v1, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v9, v9, v1, s0
; MOVREL-NEXT: v_cndmask_b32_e64 v0, v10, v0, s1 ; MOVREL-NEXT: v_cndmask_b32_e64 v0, v10, v0, s1
; MOVREL-NEXT: v_cndmask_b32_e64 v1, v11, v1, s1 ; MOVREL-NEXT: v_cndmask_b32_e64 v1, v11, v1, s1
; MOVREL-NEXT: v_readfirstlane_b32 s0, v2 ; MOVREL-NEXT: v_readfirstlane_b32 s0, v2
; MOVREL-NEXT: v_readfirstlane_b32 s1, v3 ; MOVREL-NEXT: v_readfirstlane_b32 s1, v3
; MOVREL-NEXT: v_readfirstlane_b32 s3, v5 ; MOVREL-NEXT: v_readfirstlane_b32 s3, v5
; MOVREL-NEXT: v_readfirstlane_b32 s4, v6 ; MOVREL-NEXT: v_readfirstlane_b32 s4, v6
; MOVREL-NEXT: v_readfirstlane_b32 s5, v7 ; MOVREL-NEXT: v_readfirstlane_b32 s5, v7
; MOVREL-NEXT: v_readfirstlane_b32 s6, v8 ; MOVREL-NEXT: v_readfirstlane_b32 s6, v8
; MOVREL-NEXT: v_readfirstlane_b32 s7, v9 ; MOVREL-NEXT: v_readfirstlane_b32 s7, v9
; MOVREL-NEXT: v_readfirstlane_b32 s8, v0 ; MOVREL-NEXT: v_readfirstlane_b32 s8, v0
; MOVREL-NEXT: v_readfirstlane_b32 s9, v1 ; MOVREL-NEXT: v_readfirstlane_b32 s9, v1
; MOVREL-NEXT: v_mov_b32_e32 v14, s12
; MOVREL-NEXT: v_mov_b32_e32 v13, s11
; MOVREL-NEXT: v_mov_b32_e32 v12, s10
; MOVREL-NEXT: ; return to shader part epilog ; MOVREL-NEXT: ; return to shader part epilog
entry: entry:
%insert = insertelement <5 x double> %vec, double %val, i32 %idx %insert = insertelement <5 x double> %vec, double %val, i32 %idx
ret <5 x double> %insert ret <5 x double> %insert
} }
define amdgpu_ps <5 x double> @dyn_insertelement_v5f64_s_v_v(<5 x double> inreg %vec, double %val, i32 %idx) { define amdgpu_ps <5 x double> @dyn_insertelement_v5f64_s_v_v(<5 x double> inreg %vec, double %val, i32 %idx) {
; GPRIDX-LABEL: dyn_insertelement_v5f64_s_v_v: ; GPRIDX-LABEL: dyn_insertelement_v5f64_s_v_v:
; GPRIDX: ; %bb.0: ; %entry ; GPRIDX: ; %bb.0: ; %entry
; GPRIDX-NEXT: s_mov_b32 s0, s2 ; GPRIDX-NEXT: s_mov_b32 s0, s2
; GPRIDX-NEXT: s_mov_b32 s1, s3 ; GPRIDX-NEXT: s_mov_b32 s1, s3
; GPRIDX-NEXT: s_mov_b32 s2, s4 ; GPRIDX-NEXT: s_mov_b32 s2, s4
; GPRIDX-NEXT: s_mov_b32 s3, s5 ; GPRIDX-NEXT: s_mov_b32 s3, s5
; GPRIDX-NEXT: s_mov_b32 s4, s6 ; GPRIDX-NEXT: s_mov_b32 s4, s6
; GPRIDX-NEXT: s_mov_b32 s5, s7 ; GPRIDX-NEXT: s_mov_b32 s5, s7
; GPRIDX-NEXT: s_mov_b32 s6, s8 ; GPRIDX-NEXT: s_mov_b32 s6, s8
; GPRIDX-NEXT: s_mov_b32 s7, s9 ; GPRIDX-NEXT: s_mov_b32 s7, s9
; GPRIDX-NEXT: s_mov_b32 s8, s10 ; GPRIDX-NEXT: s_mov_b32 s8, s10
; GPRIDX-NEXT: s_mov_b32 s9, s11 ; GPRIDX-NEXT: s_mov_b32 s9, s11
; GPRIDX-NEXT: v_mov_b32_e32 v18, s15
; GPRIDX-NEXT: v_mov_b32_e32 v17, s14
; GPRIDX-NEXT: v_mov_b32_e32 v16, s13
; GPRIDX-NEXT: v_mov_b32_e32 v15, s12
; GPRIDX-NEXT: v_mov_b32_e32 v14, s11
; GPRIDX-NEXT: v_mov_b32_e32 v13, s10
; GPRIDX-NEXT: v_mov_b32_e32 v12, s9 ; GPRIDX-NEXT: v_mov_b32_e32 v12, s9
; GPRIDX-NEXT: v_mov_b32_e32 v11, s8 ; GPRIDX-NEXT: v_mov_b32_e32 v11, s8
; GPRIDX-NEXT: v_mov_b32_e32 v10, s7 ; GPRIDX-NEXT: v_mov_b32_e32 v10, s7
; GPRIDX-NEXT: v_mov_b32_e32 v9, s6 ; GPRIDX-NEXT: v_mov_b32_e32 v9, s6
; GPRIDX-NEXT: v_mov_b32_e32 v8, s5 ; GPRIDX-NEXT: v_mov_b32_e32 v8, s5
; GPRIDX-NEXT: v_mov_b32_e32 v7, s4 ; GPRIDX-NEXT: v_mov_b32_e32 v7, s4
; GPRIDX-NEXT: v_mov_b32_e32 v6, s3 ; GPRIDX-NEXT: v_mov_b32_e32 v6, s3
; GPRIDX-NEXT: v_mov_b32_e32 v5, s2 ; GPRIDX-NEXT: v_mov_b32_e32 v5, s2
Show All 19 Lines
; GPRIDX-NEXT: v_readfirstlane_b32 s2, v2 ; GPRIDX-NEXT: v_readfirstlane_b32 s2, v2
; GPRIDX-NEXT: v_readfirstlane_b32 s3, v6 ; GPRIDX-NEXT: v_readfirstlane_b32 s3, v6
; GPRIDX-NEXT: v_readfirstlane_b32 s4, v5 ; GPRIDX-NEXT: v_readfirstlane_b32 s4, v5
; GPRIDX-NEXT: v_readfirstlane_b32 s5, v8 ; GPRIDX-NEXT: v_readfirstlane_b32 s5, v8
; GPRIDX-NEXT: v_readfirstlane_b32 s6, v7 ; GPRIDX-NEXT: v_readfirstlane_b32 s6, v7
; GPRIDX-NEXT: v_readfirstlane_b32 s7, v9 ; GPRIDX-NEXT: v_readfirstlane_b32 s7, v9
; GPRIDX-NEXT: v_readfirstlane_b32 s8, v0 ; GPRIDX-NEXT: v_readfirstlane_b32 s8, v0
; GPRIDX-NEXT: v_readfirstlane_b32 s9, v1 ; GPRIDX-NEXT: v_readfirstlane_b32 s9, v1
; GPRIDX-NEXT: v_mov_b32_e32 v14, s11
; GPRIDX-NEXT: v_mov_b32_e32 v13, s10
; GPRIDX-NEXT: ; return to shader part epilog ; GPRIDX-NEXT: ; return to shader part epilog
; ;
; MOVREL-LABEL: dyn_insertelement_v5f64_s_v_v: ; MOVREL-LABEL: dyn_insertelement_v5f64_s_v_v:
; MOVREL: ; %bb.0: ; %entry ; MOVREL: ; %bb.0: ; %entry
; MOVREL-NEXT: s_mov_b32 s0, s2 ; MOVREL-NEXT: s_mov_b32 s0, s2
; MOVREL-NEXT: s_mov_b32 s1, s3 ; MOVREL-NEXT: s_mov_b32 s1, s3
; MOVREL-NEXT: s_mov_b32 s2, s4 ; MOVREL-NEXT: s_mov_b32 s2, s4
; MOVREL-NEXT: s_mov_b32 s3, s5 ; MOVREL-NEXT: s_mov_b32 s3, s5
; MOVREL-NEXT: v_mov_b32_e32 v5, s2
; MOVREL-NEXT: v_mov_b32_e32 v6, s3
; MOVREL-NEXT: v_mov_b32_e32 v4, s1
; MOVREL-NEXT: v_mov_b32_e32 v3, s0
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 1, v2
; MOVREL-NEXT: s_mov_b32 s4, s6 ; MOVREL-NEXT: s_mov_b32 s4, s6
; MOVREL-NEXT: s_mov_b32 s5, s7 ; MOVREL-NEXT: s_mov_b32 s5, s7
; MOVREL-NEXT: s_mov_b32 s6, s8 ; MOVREL-NEXT: s_mov_b32 s6, s8
; MOVREL-NEXT: s_mov_b32 s7, s9 ; MOVREL-NEXT: s_mov_b32 s7, s9
; MOVREL-NEXT: s_mov_b32 s8, s10 ; MOVREL-NEXT: s_mov_b32 s8, s10
; MOVREL-NEXT: s_mov_b32 s9, s11 ; MOVREL-NEXT: s_mov_b32 s9, s11
; MOVREL-NEXT: v_mov_b32_e32 v18, s15
; MOVREL-NEXT: v_mov_b32_e32 v17, s14
; MOVREL-NEXT: v_mov_b32_e32 v16, s13
; MOVREL-NEXT: v_mov_b32_e32 v15, s12
; MOVREL-NEXT: v_mov_b32_e32 v14, s11
; MOVREL-NEXT: v_mov_b32_e32 v13, s10
; MOVREL-NEXT: v_mov_b32_e32 v12, s9
; MOVREL-NEXT: v_mov_b32_e32 v11, s8 ; MOVREL-NEXT: v_mov_b32_e32 v11, s8
; MOVREL-NEXT: v_mov_b32_e32 v12, s9
; MOVREL-NEXT: v_mov_b32_e32 v10, s7 ; MOVREL-NEXT: v_mov_b32_e32 v10, s7
; MOVREL-NEXT: v_mov_b32_e32 v9, s6 ; MOVREL-NEXT: v_mov_b32_e32 v9, s6
; MOVREL-NEXT: v_mov_b32_e32 v8, s5 ; MOVREL-NEXT: v_mov_b32_e32 v8, s5
; MOVREL-NEXT: v_mov_b32_e32 v7, s4 ; MOVREL-NEXT: v_mov_b32_e32 v7, s4
; MOVREL-NEXT: v_mov_b32_e32 v6, s3
; MOVREL-NEXT: v_mov_b32_e32 v5, s2
; MOVREL-NEXT: v_mov_b32_e32 v4, s1
; MOVREL-NEXT: v_mov_b32_e32 v3, s0
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 0, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 1, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s1, 4, v2
; MOVREL-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v3, v3, v0, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v4, v4, v1, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e64 v5, v5, v0, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v5, v5, v0, s0
; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v2 ; MOVREL-NEXT: v_cmp_eq_u32_e32 vcc_lo, 2, v2
; MOVREL-NEXT: v_cndmask_b32_e64 v6, v6, v1, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v6, v6, v1, s0
; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 3, v2 ; MOVREL-NEXT: v_cmp_eq_u32_e64 s0, 3, v2
; MOVREL-NEXT: v_cmp_eq_u32_e64 s1, 4, v2
; MOVREL-NEXT: v_readfirstlane_b32 s2, v5 ; MOVREL-NEXT: v_readfirstlane_b32 s2, v5
; MOVREL-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v7, v7, v0, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e32 v2, v8, v1, vcc_lo ; MOVREL-NEXT: v_cndmask_b32_e32 v2, v8, v1, vcc_lo
; MOVREL-NEXT: v_cndmask_b32_e64 v8, v9, v0, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v8, v9, v0, s0
; MOVREL-NEXT: v_cndmask_b32_e64 v9, v10, v1, s0 ; MOVREL-NEXT: v_cndmask_b32_e64 v9, v10, v1, s0
; MOVREL-NEXT: v_cndmask_b32_e64 v0, v11, v0, s1 ; MOVREL-NEXT: v_cndmask_b32_e64 v0, v11, v0, s1
; MOVREL-NEXT: v_cndmask_b32_e64 v1, v12, v1, s1 ; MOVREL-NEXT: v_cndmask_b32_e64 v1, v12, v1, s1
; MOVREL-NEXT: v_readfirstlane_b32 s0, v3 ; MOVREL-NEXT: v_readfirstlane_b32 s0, v3
; MOVREL-NEXT: v_readfirstlane_b32 s1, v4 ; MOVREL-NEXT: v_readfirstlane_b32 s1, v4
; MOVREL-NEXT: v_readfirstlane_b32 s3, v6 ; MOVREL-NEXT: v_readfirstlane_b32 s3, v6
; MOVREL-NEXT: v_readfirstlane_b32 s4, v7 ; MOVREL-NEXT: v_readfirstlane_b32 s4, v7
; MOVREL-NEXT: v_readfirstlane_b32 s5, v2 ; MOVREL-NEXT: v_readfirstlane_b32 s5, v2
; MOVREL-NEXT: v_readfirstlane_b32 s6, v8 ; MOVREL-NEXT: v_readfirstlane_b32 s6, v8
; MOVREL-NEXT: v_readfirstlane_b32 s7, v9 ; MOVREL-NEXT: v_readfirstlane_b32 s7, v9
; MOVREL-NEXT: v_readfirstlane_b32 s8, v0 ; MOVREL-NEXT: v_readfirstlane_b32 s8, v0
; MOVREL-NEXT: v_readfirstlane_b32 s9, v1 ; MOVREL-NEXT: v_readfirstlane_b32 s9, v1
; MOVREL-NEXT: v_mov_b32_e32 v14, s11
; MOVREL-NEXT: v_mov_b32_e32 v13, s10
; MOVREL-NEXT: ; return to shader part epilog ; MOVREL-NEXT: ; return to shader part epilog
entry: entry:
%insert = insertelement <5 x double> %vec, double %val, i32 %idx %insert = insertelement <5 x double> %vec, double %val, i32 %idx
ret <5 x double> %insert ret <5 x double> %insert
} }
define amdgpu_ps <5 x double> @dyn_insertelement_v5f64_v_v_s(<5 x double> %vec, double %val, i32 inreg %idx) { define amdgpu_ps <5 x double> @dyn_insertelement_v5f64_v_v_s(<5 x double> %vec, double %val, i32 inreg %idx) {
; GPRIDX-LABEL: dyn_insertelement_v5f64_v_v_s: ; GPRIDX-LABEL: dyn_insertelement_v5f64_v_v_s:
▲ Show 20 Lines • Show All 123 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll

Show First 20 Lines • Show All 978 Lines • ▼ Show 20 Lines; GFX9-NEXT: s_endpgm
ret void ret void
} }
define amdgpu_kernel void @flat_atomic_dec_ret_i64_offset_addr64(i64* %out, i64* %ptr) #0 { define amdgpu_kernel void @flat_atomic_dec_ret_i64_offset_addr64(i64* %out, i64* %ptr) #0 {
; CI-LABEL: flat_atomic_dec_ret_i64_offset_addr64: ; CI-LABEL: flat_atomic_dec_ret_i64_offset_addr64:
; CI: ; %bb.0: ; CI: ; %bb.0:
; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; CI-NEXT: v_mov_b32_e32 v3, 0
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: v_mov_b32_e32 v0, s2 ; CI-NEXT: v_mov_b32_e32 v0, s2
; CI-NEXT: v_mov_b32_e32 v1, s3 ; CI-NEXT: v_mov_b32_e32 v1, s3
; CI-NEXT: v_add_i32_e32 v4, vcc, v0, v2 ; CI-NEXT: v_add_i32_e32 v4, vcc, v0, v2
; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc ; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc
; CI-NEXT: v_mov_b32_e32 v0, s0 ; CI-NEXT: v_mov_b32_e32 v0, s0
; CI-NEXT: v_mov_b32_e32 v1, s1 ; CI-NEXT: v_mov_b32_e32 v1, s1
; CI-NEXT: v_add_i32_e32 v0, vcc, v0, v2 ; CI-NEXT: v_add_i32_e32 v0, vcc, v0, v2
; CI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; CI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; CI-NEXT: v_mov_b32_e32 v2, 42
; CI-NEXT: v_add_i32_e32 v4, vcc, 40, v4 ; CI-NEXT: v_add_i32_e32 v4, vcc, 40, v4
; CI-NEXT: v_mov_b32_e32 v3, 0 ; CI-NEXT: v_mov_b32_e32 v2, 42
; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc ; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc
; CI-NEXT: flat_atomic_dec_x2 v[2:3], v[4:5], v[2:3] glc ; CI-NEXT: flat_atomic_dec_x2 v[2:3], v[4:5], v[2:3] glc
; CI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; CI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; CI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; CI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; CI-NEXT: s_endpgm ; CI-NEXT: s_endpgm
; ;
; VI-LABEL: flat_atomic_dec_ret_i64_offset_addr64: ; VI-LABEL: flat_atomic_dec_ret_i64_offset_addr64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; VI-NEXT: v_mov_b32_e32 v3, 0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_add_u32_e32 v4, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v4, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v2, 42
; VI-NEXT: v_add_u32_e32 v4, vcc, 40, v4 ; VI-NEXT: v_add_u32_e32 v4, vcc, 40, v4
; VI-NEXT: v_mov_b32_e32 v3, 0 ; VI-NEXT: v_mov_b32_e32 v2, 42
; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc
; VI-NEXT: flat_atomic_dec_x2 v[2:3], v[4:5], v[2:3] glc ; VI-NEXT: flat_atomic_dec_x2 v[2:3], v[4:5], v[2:3] glc
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; GFX9-LABEL: flat_atomic_dec_ret_i64_offset_addr64: ; GFX9-LABEL: flat_atomic_dec_ret_i64_offset_addr64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0
Show All 33 Lines
; CI: ; %bb.0: ; CI: ; %bb.0:
; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: v_mov_b32_e32 v0, s0 ; CI-NEXT: v_mov_b32_e32 v0, s0
; CI-NEXT: v_mov_b32_e32 v1, s1 ; CI-NEXT: v_mov_b32_e32 v1, s1
; CI-NEXT: v_add_i32_e32 v2, vcc, v0, v2 ; CI-NEXT: v_add_i32_e32 v2, vcc, v0, v2
; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc ; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc
; CI-NEXT: v_mov_b32_e32 v0, 42
; CI-NEXT: v_add_i32_e32 v2, vcc, 40, v2 ; CI-NEXT: v_add_i32_e32 v2, vcc, 40, v2
; CI-NEXT: v_mov_b32_e32 v0, 42
; CI-NEXT: v_mov_b32_e32 v1, 0 ; CI-NEXT: v_mov_b32_e32 v1, 0
; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; CI-NEXT: flat_atomic_dec_x2 v[0:1], v[2:3], v[0:1] glc ; CI-NEXT: flat_atomic_dec_x2 v[0:1], v[2:3], v[0:1] glc
; CI-NEXT: s_endpgm ; CI-NEXT: s_endpgm
; ;
; VI-LABEL: flat_atomic_dec_noret_i64_offset_addr64: ; VI-LABEL: flat_atomic_dec_noret_i64_offset_addr64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v2, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v0, 42
; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v2
; VI-NEXT: v_mov_b32_e32 v0, 42
; VI-NEXT: v_mov_b32_e32 v1, 0 ; VI-NEXT: v_mov_b32_e32 v1, 0
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT: flat_atomic_dec_x2 v[0:1], v[2:3], v[0:1] glc ; VI-NEXT: flat_atomic_dec_x2 v[0:1], v[2:3], v[0:1] glc
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; GFX9-LABEL: flat_atomic_dec_noret_i64_offset_addr64: ; GFX9-LABEL: flat_atomic_dec_noret_i64_offset_addr64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
▲ Show 20 Lines • Show All 86 Lines • ▼ Show 20 Lines
; CI-LABEL: lds_atomic_dec_ret_i64: ; CI-LABEL: lds_atomic_dec_ret_i64:
; CI: ; %bb.0: ; CI: ; %bb.0:
; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; CI-NEXT: s_load_dword s2, s[4:5], 0x2 ; CI-NEXT: s_load_dword s2, s[4:5], 0x2
; CI-NEXT: v_mov_b32_e32 v0, 42 ; CI-NEXT: v_mov_b32_e32 v0, 42
; CI-NEXT: v_mov_b32_e32 v1, 0 ; CI-NEXT: v_mov_b32_e32 v1, 0
; CI-NEXT: s_mov_b32 m0, -1 ; CI-NEXT: s_mov_b32 m0, -1
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: v_mov_b32_e32 v3, s1
; CI-NEXT: v_mov_b32_e32 v2, s2 ; CI-NEXT: v_mov_b32_e32 v2, s2
; CI-NEXT: ds_dec_rtn_u64 v[0:1], v2, v[0:1] ; CI-NEXT: ds_dec_rtn_u64 v[0:1], v2, v[0:1]
; CI-NEXT: v_mov_b32_e32 v3, s1
; CI-NEXT: v_mov_b32_e32 v2, s0 ; CI-NEXT: v_mov_b32_e32 v2, s0
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; CI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; CI-NEXT: s_endpgm ; CI-NEXT: s_endpgm
; ;
; VI-LABEL: lds_atomic_dec_ret_i64: ; VI-LABEL: lds_atomic_dec_ret_i64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: s_load_dword s2, s[4:5], 0x8 ; VI-NEXT: s_load_dword s2, s[4:5], 0x8
; VI-NEXT: v_mov_b32_e32 v0, 42 ; VI-NEXT: v_mov_b32_e32 v0, 42
; VI-NEXT: v_mov_b32_e32 v1, 0 ; VI-NEXT: v_mov_b32_e32 v1, 0
; VI-NEXT: s_mov_b32 m0, -1 ; VI-NEXT: s_mov_b32 m0, -1
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: ds_dec_rtn_u64 v[0:1], v2, v[0:1] ; VI-NEXT: ds_dec_rtn_u64 v[0:1], v2, v[0:1]
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; GFX9-LABEL: lds_atomic_dec_ret_i64: ; GFX9-LABEL: lds_atomic_dec_ret_i64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GFX9-NEXT: s_load_dword s0, s[0:1], 0x2c ; GFX9-NEXT: s_load_dword s0, s[0:1], 0x2c
Show All 16 Lines
; CI-LABEL: lds_atomic_dec_ret_i64_offset: ; CI-LABEL: lds_atomic_dec_ret_i64_offset:
; CI: ; %bb.0: ; CI: ; %bb.0:
; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; CI-NEXT: s_load_dword s2, s[4:5], 0x2 ; CI-NEXT: s_load_dword s2, s[4:5], 0x2
; CI-NEXT: v_mov_b32_e32 v0, 42 ; CI-NEXT: v_mov_b32_e32 v0, 42
; CI-NEXT: v_mov_b32_e32 v1, 0 ; CI-NEXT: v_mov_b32_e32 v1, 0
; CI-NEXT: s_mov_b32 m0, -1 ; CI-NEXT: s_mov_b32 m0, -1
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: v_mov_b32_e32 v3, s1
; CI-NEXT: v_mov_b32_e32 v2, s2 ; CI-NEXT: v_mov_b32_e32 v2, s2
; CI-NEXT: ds_dec_rtn_u64 v[0:1], v2, v[0:1] offset:32 ; CI-NEXT: ds_dec_rtn_u64 v[0:1], v2, v[0:1] offset:32
; CI-NEXT: v_mov_b32_e32 v3, s1
; CI-NEXT: v_mov_b32_e32 v2, s0 ; CI-NEXT: v_mov_b32_e32 v2, s0
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; CI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; CI-NEXT: s_endpgm ; CI-NEXT: s_endpgm
; ;
; VI-LABEL: lds_atomic_dec_ret_i64_offset: ; VI-LABEL: lds_atomic_dec_ret_i64_offset:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: s_load_dword s2, s[4:5], 0x8 ; VI-NEXT: s_load_dword s2, s[4:5], 0x8
; VI-NEXT: v_mov_b32_e32 v0, 42 ; VI-NEXT: v_mov_b32_e32 v0, 42
; VI-NEXT: v_mov_b32_e32 v1, 0 ; VI-NEXT: v_mov_b32_e32 v1, 0
; VI-NEXT: s_mov_b32 m0, -1 ; VI-NEXT: s_mov_b32 m0, -1
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: ds_dec_rtn_u64 v[0:1], v2, v[0:1] offset:32 ; VI-NEXT: ds_dec_rtn_u64 v[0:1], v2, v[0:1] offset:32
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; GFX9-LABEL: lds_atomic_dec_ret_i64_offset: ; GFX9-LABEL: lds_atomic_dec_ret_i64_offset:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GFX9-NEXT: s_load_dword s0, s[0:1], 0x2c ; GFX9-NEXT: s_load_dword s0, s[0:1], 0x2c
▲ Show 20 Lines • Show All 270 Lines • ▼ Show 20 Lines; GFX9-NEXT: s_endpgm
ret void ret void
} }
define amdgpu_kernel void @global_atomic_dec_ret_i64_offset_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %ptr) #0 { define amdgpu_kernel void @global_atomic_dec_ret_i64_offset_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %ptr) #0 {
; CI-LABEL: global_atomic_dec_ret_i64_offset_addr64: ; CI-LABEL: global_atomic_dec_ret_i64_offset_addr64:
; CI: ; %bb.0: ; CI: ; %bb.0:
; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; CI-NEXT: v_mov_b32_e32 v3, 0
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: v_mov_b32_e32 v0, s2 ; CI-NEXT: v_mov_b32_e32 v0, s2
; CI-NEXT: v_mov_b32_e32 v1, s3 ; CI-NEXT: v_mov_b32_e32 v1, s3
; CI-NEXT: v_add_i32_e32 v4, vcc, v0, v2 ; CI-NEXT: v_add_i32_e32 v4, vcc, v0, v2
; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc ; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc
; CI-NEXT: v_mov_b32_e32 v0, s0 ; CI-NEXT: v_mov_b32_e32 v0, s0
; CI-NEXT: v_mov_b32_e32 v1, s1 ; CI-NEXT: v_mov_b32_e32 v1, s1
; CI-NEXT: v_add_i32_e32 v0, vcc, v0, v2 ; CI-NEXT: v_add_i32_e32 v0, vcc, v0, v2
; CI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; CI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; CI-NEXT: v_mov_b32_e32 v2, 42
; CI-NEXT: v_add_i32_e32 v4, vcc, 40, v4 ; CI-NEXT: v_add_i32_e32 v4, vcc, 40, v4
; CI-NEXT: v_mov_b32_e32 v3, 0 ; CI-NEXT: v_mov_b32_e32 v2, 42
; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc ; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc
; CI-NEXT: flat_atomic_dec_x2 v[2:3], v[4:5], v[2:3] glc ; CI-NEXT: flat_atomic_dec_x2 v[2:3], v[4:5], v[2:3] glc
; CI-NEXT: s_waitcnt vmcnt(0) ; CI-NEXT: s_waitcnt vmcnt(0)
; CI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; CI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; CI-NEXT: s_endpgm ; CI-NEXT: s_endpgm
; ;
; VI-LABEL: global_atomic_dec_ret_i64_offset_addr64: ; VI-LABEL: global_atomic_dec_ret_i64_offset_addr64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; VI-NEXT: v_mov_b32_e32 v3, 0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_add_u32_e32 v4, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v4, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v2, 42
; VI-NEXT: v_add_u32_e32 v4, vcc, 40, v4 ; VI-NEXT: v_add_u32_e32 v4, vcc, 40, v4
; VI-NEXT: v_mov_b32_e32 v3, 0 ; VI-NEXT: v_mov_b32_e32 v2, 42
; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc
; VI-NEXT: flat_atomic_dec_x2 v[2:3], v[4:5], v[2:3] glc ; VI-NEXT: flat_atomic_dec_x2 v[2:3], v[4:5], v[2:3] glc
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; GFX9-LABEL: global_atomic_dec_ret_i64_offset_addr64: ; GFX9-LABEL: global_atomic_dec_ret_i64_offset_addr64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0
Show All 33 Lines
; CI: ; %bb.0: ; CI: ; %bb.0:
; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: v_mov_b32_e32 v0, s0 ; CI-NEXT: v_mov_b32_e32 v0, s0
; CI-NEXT: v_mov_b32_e32 v1, s1 ; CI-NEXT: v_mov_b32_e32 v1, s1
; CI-NEXT: v_add_i32_e32 v2, vcc, v0, v2 ; CI-NEXT: v_add_i32_e32 v2, vcc, v0, v2
; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc ; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc
; CI-NEXT: v_mov_b32_e32 v0, 42
; CI-NEXT: v_add_i32_e32 v2, vcc, 40, v2 ; CI-NEXT: v_add_i32_e32 v2, vcc, 40, v2
; CI-NEXT: v_mov_b32_e32 v0, 42
; CI-NEXT: v_mov_b32_e32 v1, 0 ; CI-NEXT: v_mov_b32_e32 v1, 0
; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; CI-NEXT: flat_atomic_dec_x2 v[0:1], v[2:3], v[0:1] glc ; CI-NEXT: flat_atomic_dec_x2 v[0:1], v[2:3], v[0:1] glc
; CI-NEXT: s_endpgm ; CI-NEXT: s_endpgm
; ;
; VI-LABEL: global_atomic_dec_noret_i64_offset_addr64: ; VI-LABEL: global_atomic_dec_noret_i64_offset_addr64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v2, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v0, 42
; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v2
; VI-NEXT: v_mov_b32_e32 v0, 42
; VI-NEXT: v_mov_b32_e32 v1, 0 ; VI-NEXT: v_mov_b32_e32 v1, 0
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT: flat_atomic_dec_x2 v[0:1], v[2:3], v[0:1] glc ; VI-NEXT: flat_atomic_dec_x2 v[0:1], v[2:3], v[0:1] glc
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; GFX9-LABEL: global_atomic_dec_noret_i64_offset_addr64: ; GFX9-LABEL: global_atomic_dec_noret_i64_offset_addr64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0 ; GFX9-NEXT: v_ashrrev_i32_e32 v1, 31, v0
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
▲ Show 20 Lines • Show All 91 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll

Show First 20 Lines • Show All 636 Lines • ▼ Show 20 Lines
; CI-LABEL: lds_atomic_inc_ret_i64: ; CI-LABEL: lds_atomic_inc_ret_i64:
; CI: ; %bb.0: ; CI: ; %bb.0:
; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; CI-NEXT: s_load_dword s2, s[4:5], 0x2 ; CI-NEXT: s_load_dword s2, s[4:5], 0x2
; CI-NEXT: v_mov_b32_e32 v0, 42 ; CI-NEXT: v_mov_b32_e32 v0, 42
; CI-NEXT: v_mov_b32_e32 v1, 0 ; CI-NEXT: v_mov_b32_e32 v1, 0
; CI-NEXT: s_mov_b32 m0, -1 ; CI-NEXT: s_mov_b32 m0, -1
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: v_mov_b32_e32 v3, s1
; CI-NEXT: v_mov_b32_e32 v2, s2 ; CI-NEXT: v_mov_b32_e32 v2, s2
; CI-NEXT: ds_inc_rtn_u64 v[0:1], v2, v[0:1] ; CI-NEXT: ds_inc_rtn_u64 v[0:1], v2, v[0:1]
; CI-NEXT: v_mov_b32_e32 v3, s1
; CI-NEXT: v_mov_b32_e32 v2, s0 ; CI-NEXT: v_mov_b32_e32 v2, s0
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; CI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; CI-NEXT: s_endpgm ; CI-NEXT: s_endpgm
; ;
; VI-LABEL: lds_atomic_inc_ret_i64: ; VI-LABEL: lds_atomic_inc_ret_i64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: s_load_dword s2, s[4:5], 0x8 ; VI-NEXT: s_load_dword s2, s[4:5], 0x8
; VI-NEXT: v_mov_b32_e32 v0, 42 ; VI-NEXT: v_mov_b32_e32 v0, 42
; VI-NEXT: v_mov_b32_e32 v1, 0 ; VI-NEXT: v_mov_b32_e32 v1, 0
; VI-NEXT: s_mov_b32 m0, -1 ; VI-NEXT: s_mov_b32 m0, -1
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: ds_inc_rtn_u64 v[0:1], v2, v[0:1] ; VI-NEXT: ds_inc_rtn_u64 v[0:1], v2, v[0:1]
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: lds_atomic_inc_ret_i64: ; GFX9-LABEL: lds_atomic_inc_ret_i64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
Show All 30 Lines
; CI-LABEL: lds_atomic_inc_ret_i64_offset: ; CI-LABEL: lds_atomic_inc_ret_i64_offset:
; CI: ; %bb.0: ; CI: ; %bb.0:
; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; CI-NEXT: s_load_dword s2, s[4:5], 0x2 ; CI-NEXT: s_load_dword s2, s[4:5], 0x2
; CI-NEXT: v_mov_b32_e32 v0, 42 ; CI-NEXT: v_mov_b32_e32 v0, 42
; CI-NEXT: v_mov_b32_e32 v1, 0 ; CI-NEXT: v_mov_b32_e32 v1, 0
; CI-NEXT: s_mov_b32 m0, -1 ; CI-NEXT: s_mov_b32 m0, -1
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: v_mov_b32_e32 v3, s1
; CI-NEXT: v_mov_b32_e32 v2, s2 ; CI-NEXT: v_mov_b32_e32 v2, s2
; CI-NEXT: ds_inc_rtn_u64 v[0:1], v2, v[0:1] offset:32 ; CI-NEXT: ds_inc_rtn_u64 v[0:1], v2, v[0:1] offset:32
; CI-NEXT: v_mov_b32_e32 v3, s1
; CI-NEXT: v_mov_b32_e32 v2, s0 ; CI-NEXT: v_mov_b32_e32 v2, s0
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; CI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; CI-NEXT: s_endpgm ; CI-NEXT: s_endpgm
; ;
; VI-LABEL: lds_atomic_inc_ret_i64_offset: ; VI-LABEL: lds_atomic_inc_ret_i64_offset:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: s_load_dword s2, s[4:5], 0x8 ; VI-NEXT: s_load_dword s2, s[4:5], 0x8
; VI-NEXT: v_mov_b32_e32 v0, 42 ; VI-NEXT: v_mov_b32_e32 v0, 42
; VI-NEXT: v_mov_b32_e32 v1, 0 ; VI-NEXT: v_mov_b32_e32 v1, 0
; VI-NEXT: s_mov_b32 m0, -1 ; VI-NEXT: s_mov_b32 m0, -1
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: ds_inc_rtn_u64 v[0:1], v2, v[0:1] offset:32 ; VI-NEXT: ds_inc_rtn_u64 v[0:1], v2, v[0:1] offset:32
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: lds_atomic_inc_ret_i64_offset: ; GFX9-LABEL: lds_atomic_inc_ret_i64_offset:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
▲ Show 20 Lines • Show All 340 Lines • ▼ Show 20 Lines; GFX10-NEXT: s_endpgm
ret void ret void
} }
define amdgpu_kernel void @global_atomic_inc_ret_i64_offset_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %ptr) #0 { define amdgpu_kernel void @global_atomic_inc_ret_i64_offset_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %ptr) #0 {
; CI-LABEL: global_atomic_inc_ret_i64_offset_addr64: ; CI-LABEL: global_atomic_inc_ret_i64_offset_addr64:
; CI: ; %bb.0: ; CI: ; %bb.0:
; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; CI-NEXT: v_mov_b32_e32 v3, 0
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: v_mov_b32_e32 v0, s2 ; CI-NEXT: v_mov_b32_e32 v0, s2
; CI-NEXT: v_mov_b32_e32 v1, s3 ; CI-NEXT: v_mov_b32_e32 v1, s3
; CI-NEXT: v_add_i32_e32 v4, vcc, v0, v2 ; CI-NEXT: v_add_i32_e32 v4, vcc, v0, v2
; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc ; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc
; CI-NEXT: v_mov_b32_e32 v0, s0 ; CI-NEXT: v_mov_b32_e32 v0, s0
; CI-NEXT: v_mov_b32_e32 v1, s1 ; CI-NEXT: v_mov_b32_e32 v1, s1
; CI-NEXT: v_add_i32_e32 v0, vcc, v0, v2 ; CI-NEXT: v_add_i32_e32 v0, vcc, v0, v2
; CI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; CI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; CI-NEXT: v_mov_b32_e32 v2, 42
; CI-NEXT: v_add_i32_e32 v4, vcc, 40, v4 ; CI-NEXT: v_add_i32_e32 v4, vcc, 40, v4
; CI-NEXT: v_mov_b32_e32 v3, 0 ; CI-NEXT: v_mov_b32_e32 v2, 42
; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc ; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc
; CI-NEXT: flat_atomic_inc_x2 v[2:3], v[4:5], v[2:3] glc ; CI-NEXT: flat_atomic_inc_x2 v[2:3], v[4:5], v[2:3] glc
; CI-NEXT: s_waitcnt vmcnt(0) ; CI-NEXT: s_waitcnt vmcnt(0)
; CI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; CI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; CI-NEXT: s_endpgm ; CI-NEXT: s_endpgm
; ;
; VI-LABEL: global_atomic_inc_ret_i64_offset_addr64: ; VI-LABEL: global_atomic_inc_ret_i64_offset_addr64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; VI-NEXT: v_mov_b32_e32 v3, 0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_add_u32_e32 v4, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v4, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v2, 42
; VI-NEXT: v_add_u32_e32 v4, vcc, 40, v4 ; VI-NEXT: v_add_u32_e32 v4, vcc, 40, v4
; VI-NEXT: v_mov_b32_e32 v3, 0 ; VI-NEXT: v_mov_b32_e32 v2, 42
; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc
; VI-NEXT: flat_atomic_inc_x2 v[2:3], v[4:5], v[2:3] glc ; VI-NEXT: flat_atomic_inc_x2 v[2:3], v[4:5], v[2:3] glc
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: global_atomic_inc_ret_i64_offset_addr64: ; GFX9-LABEL: global_atomic_inc_ret_i64_offset_addr64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
Show All 32 Lines
; CI: ; %bb.0: ; CI: ; %bb.0:
; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: v_mov_b32_e32 v0, s0 ; CI-NEXT: v_mov_b32_e32 v0, s0
; CI-NEXT: v_mov_b32_e32 v1, s1 ; CI-NEXT: v_mov_b32_e32 v1, s1
; CI-NEXT: v_add_i32_e32 v2, vcc, v0, v2 ; CI-NEXT: v_add_i32_e32 v2, vcc, v0, v2
; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc ; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc
; CI-NEXT: v_mov_b32_e32 v0, 42
; CI-NEXT: v_add_i32_e32 v2, vcc, 40, v2 ; CI-NEXT: v_add_i32_e32 v2, vcc, 40, v2
; CI-NEXT: v_mov_b32_e32 v0, 42
; CI-NEXT: v_mov_b32_e32 v1, 0 ; CI-NEXT: v_mov_b32_e32 v1, 0
; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; CI-NEXT: flat_atomic_inc_x2 v[0:1], v[2:3], v[0:1] glc ; CI-NEXT: flat_atomic_inc_x2 v[0:1], v[2:3], v[0:1] glc
; CI-NEXT: s_endpgm ; CI-NEXT: s_endpgm
; ;
; VI-LABEL: global_atomic_inc_noret_i64_offset_addr64: ; VI-LABEL: global_atomic_inc_noret_i64_offset_addr64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v2, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v0, 42
; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v2
; VI-NEXT: v_mov_b32_e32 v0, 42
; VI-NEXT: v_mov_b32_e32 v1, 0 ; VI-NEXT: v_mov_b32_e32 v1, 0
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT: flat_atomic_inc_x2 v[0:1], v[2:3], v[0:1] glc ; VI-NEXT: flat_atomic_inc_x2 v[0:1], v[2:3], v[0:1] glc
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: global_atomic_inc_noret_i64_offset_addr64: ; GFX9-LABEL: global_atomic_inc_noret_i64_offset_addr64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
▲ Show 20 Lines • Show All 218 Lines • ▼ Show 20 Lines
; GFX9-LABEL: flat_atomic_inc_ret_i32_offset_addr64: ; GFX9-LABEL: flat_atomic_inc_ret_i32_offset_addr64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 2, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 2, v0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, s2 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_mov_b32_e32 v1, s3 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v4 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v4
; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: v_mov_b32_e32 v2, s0 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v2, v4 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v2, v4
; GFX9-NEXT: v_mov_b32_e32 v4, 42 ; GFX9-NEXT: v_mov_b32_e32 v4, 42
; GFX9-NEXT: flat_atomic_inc v0, v[0:1], v4 offset:20 glc ; GFX9-NEXT: flat_atomic_inc v0, v[0:1], v4 offset:20 glc
; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: flat_store_dword v[2:3], v0 ; GFX9-NEXT: flat_store_dword v[2:3], v0
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: flat_atomic_inc_ret_i32_offset_addr64: ; GFX10-LABEL: flat_atomic_inc_ret_i32_offset_addr64:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
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; VI-NEXT: flat_store_dword v[2:3], v4 ; VI-NEXT: flat_store_dword v[2:3], v4
; VI-NEXT: v_mov_b32_e32 v3, s1 ; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: atomic_inc_shl_base_lds_0_i64: ; GFX9-LABEL: atomic_inc_shl_base_lds_0_i64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v1, 9
; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GFX9-NEXT: v_add_u32_e32 v3, 2, v0 ; GFX9-NEXT: v_add_u32_e32 v3, 2, v0
; GFX9-NEXT: v_mov_b32_e32 v1, 9
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 3, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX9-NEXT: ds_inc_rtn_u64 v[0:1], v0, v[1:2] offset:16 ; GFX9-NEXT: ds_inc_rtn_u64 v[0:1], v0, v[1:2] offset:16
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: global_store_dword v2, v3, s[2:3] ; GFX9-NEXT: global_store_dword v2, v3, s[2:3]
; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1] ; GFX9-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
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; GFX10-LABEL: flat_atomic_inc_noret_i64_offset: ; GFX10-LABEL: flat_atomic_inc_noret_i64_offset:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-NEXT: v_mov_b32_e32 v0, 42 ; GFX10-NEXT: v_mov_b32_e32 v0, 42
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_add_u32 s0, s0, 32 ; GFX10-NEXT: s_add_u32 s0, s0, 32
; GFX10-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-NEXT: s_addc_u32 s1, s1, 0
; GFX10-NEXT: v_mov_b32_e32 v3, s1
; GFX10-NEXT: v_mov_b32_e32 v2, s0 ; GFX10-NEXT: v_mov_b32_e32 v2, s0
; GFX10-NEXT: v_mov_b32_e32 v3, s1
; GFX10-NEXT: flat_atomic_inc_x2 v[0:1], v[2:3], v[0:1] glc ; GFX10-NEXT: flat_atomic_inc_x2 v[0:1], v[2:3], v[0:1] glc
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%gep = getelementptr i64, i64* %ptr, i32 4 %gep = getelementptr i64, i64* %ptr, i32 4
%result = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64* %gep, i64 42, i32 0, i32 0, i1 false) %result = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64* %gep, i64 42, i32 0, i32 0, i1 false)
ret void ret void
} }
define amdgpu_kernel void @flat_atomic_inc_ret_i64_offset_addr64(i64* %out, i64* %ptr) #0 { define amdgpu_kernel void @flat_atomic_inc_ret_i64_offset_addr64(i64* %out, i64* %ptr) #0 {
; CI-LABEL: flat_atomic_inc_ret_i64_offset_addr64: ; CI-LABEL: flat_atomic_inc_ret_i64_offset_addr64:
; CI: ; %bb.0: ; CI: ; %bb.0:
; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; CI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; CI-NEXT: v_mov_b32_e32 v3, 0
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: v_mov_b32_e32 v0, s2 ; CI-NEXT: v_mov_b32_e32 v0, s2
; CI-NEXT: v_mov_b32_e32 v1, s3 ; CI-NEXT: v_mov_b32_e32 v1, s3
; CI-NEXT: v_add_i32_e32 v4, vcc, v0, v2 ; CI-NEXT: v_add_i32_e32 v4, vcc, v0, v2
; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc ; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc
; CI-NEXT: v_mov_b32_e32 v0, s0 ; CI-NEXT: v_mov_b32_e32 v0, s0
; CI-NEXT: v_mov_b32_e32 v1, s1 ; CI-NEXT: v_mov_b32_e32 v1, s1
; CI-NEXT: v_add_i32_e32 v0, vcc, v0, v2 ; CI-NEXT: v_add_i32_e32 v0, vcc, v0, v2
; CI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; CI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; CI-NEXT: v_mov_b32_e32 v2, 42
; CI-NEXT: v_add_i32_e32 v4, vcc, 40, v4 ; CI-NEXT: v_add_i32_e32 v4, vcc, 40, v4
; CI-NEXT: v_mov_b32_e32 v3, 0 ; CI-NEXT: v_mov_b32_e32 v2, 42
; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc ; CI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc
; CI-NEXT: flat_atomic_inc_x2 v[2:3], v[4:5], v[2:3] glc ; CI-NEXT: flat_atomic_inc_x2 v[2:3], v[4:5], v[2:3] glc
; CI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; CI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; CI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; CI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; CI-NEXT: s_endpgm ; CI-NEXT: s_endpgm
; ;
; VI-LABEL: flat_atomic_inc_ret_i64_offset_addr64: ; VI-LABEL: flat_atomic_inc_ret_i64_offset_addr64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; VI-NEXT: v_mov_b32_e32 v3, 0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_add_u32_e32 v4, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v4, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v2, 42
; VI-NEXT: v_add_u32_e32 v4, vcc, 40, v4 ; VI-NEXT: v_add_u32_e32 v4, vcc, 40, v4
; VI-NEXT: v_mov_b32_e32 v3, 0 ; VI-NEXT: v_mov_b32_e32 v2, 42
; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc ; VI-NEXT: v_addc_u32_e32 v5, vcc, 0, v5, vcc
; VI-NEXT: flat_atomic_inc_x2 v[2:3], v[4:5], v[2:3] glc ; VI-NEXT: flat_atomic_inc_x2 v[2:3], v[4:5], v[2:3] glc
; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: flat_atomic_inc_ret_i64_offset_addr64: ; GFX9-LABEL: flat_atomic_inc_ret_i64_offset_addr64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 3, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v6, 3, v0
; GFX9-NEXT: v_mov_b32_e32 v4, 42 ; GFX9-NEXT: v_mov_b32_e32 v4, 42
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v0, s2 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_mov_b32_e32 v1, s3 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v6 ; GFX9-NEXT: v_add_co_u32_e32 v0, vcc, v0, v6
; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v1, vcc, 0, v1, vcc
; GFX9-NEXT: flat_atomic_inc_x2 v[0:1], v[0:1], v[4:5] offset:40 glc ; GFX9-NEXT: flat_atomic_inc_x2 v[0:1], v[0:1], v[4:5] offset:40 glc
; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_mov_b32_e32 v2, s0 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v2, v6 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v2, v6
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, 0, v3, vcc
; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX9-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX9-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: flat_atomic_inc_ret_i64_offset_addr64: ; GFX10-LABEL: flat_atomic_inc_ret_i64_offset_addr64:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GFX10-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GFX10-NEXT: v_lshlrev_b32_e32 v4, 3, v0 ; GFX10-NEXT: v_lshlrev_b32_e32 v4, 3, v0
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v0, s2 ; GFX10-NEXT: v_mov_b32_e32 v0, s2
; GFX10-NEXT: v_mov_b32_e32 v1, s3 ; GFX10-NEXT: v_mov_b32_e32 v1, s3
; GFX10-NEXT: v_add_co_u32 v2, vcc_lo, v0, v4 ; GFX10-NEXT: v_add_co_u32 v2, vcc_lo, v0, v4
; GFX10-NEXT: v_add_co_ci_u32_e32 v3, vcc_lo, 0, v1, vcc_lo ; GFX10-NEXT: v_add_co_ci_u32_e32 v3, vcc_lo, 0, v1, vcc_lo
; GFX10-NEXT: v_mov_b32_e32 v0, 42 ; GFX10-NEXT: v_mov_b32_e32 v0, 42
; GFX10-NEXT: v_add_co_u32 v2, vcc_lo, v2, 40 ; GFX10-NEXT: v_add_co_u32 v2, vcc_lo, v2, 40
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo ; GFX10-NEXT: v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
; GFX10-NEXT: flat_atomic_inc_x2 v[0:1], v[2:3], v[0:1] glc ; GFX10-NEXT: flat_atomic_inc_x2 v[0:1], v[2:3], v[0:1] glc
; GFX10-NEXT: v_mov_b32_e32 v3, s1
; GFX10-NEXT: v_mov_b32_e32 v2, s0 ; GFX10-NEXT: v_mov_b32_e32 v2, s0
; GFX10-NEXT: v_mov_b32_e32 v3, s1
; GFX10-NEXT: v_add_co_u32 v2, vcc_lo, v2, v4 ; GFX10-NEXT: v_add_co_u32 v2, vcc_lo, v2, v4
; GFX10-NEXT: v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo ; GFX10-NEXT: v_add_co_ci_u32_e32 v3, vcc_lo, 0, v3, vcc_lo
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX10-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%id = call i32 @llvm.amdgcn.workitem.id.x() %id = call i32 @llvm.amdgcn.workitem.id.x()
%gep.tid = getelementptr i64, i64* %ptr, i32 %id %gep.tid = getelementptr i64, i64* %ptr, i32 %id
%out.gep = getelementptr i64, i64* %out, i32 %id %out.gep = getelementptr i64, i64* %out, i32 %id
%gep = getelementptr i64, i64* %gep.tid, i32 5 %gep = getelementptr i64, i64* %gep.tid, i32 5
%result = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64* %gep, i64 42, i32 0, i32 0, i1 false) %result = call i64 @llvm.amdgcn.atomic.inc.i64.p0i64(i64* %gep, i64 42, i32 0, i32 0, i1 false)
store i64 %result, i64* %out.gep store i64 %result, i64* %out.gep
ret void ret void
} }
define amdgpu_kernel void @flat_atomic_inc_noret_i64_offset_addr64(i64* %ptr) #0 { define amdgpu_kernel void @flat_atomic_inc_noret_i64_offset_addr64(i64* %ptr) #0 {
; CI-LABEL: flat_atomic_inc_noret_i64_offset_addr64: ; CI-LABEL: flat_atomic_inc_noret_i64_offset_addr64:
; CI: ; %bb.0: ; CI: ; %bb.0:
; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; CI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; CI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; CI-NEXT: s_waitcnt lgkmcnt(0) ; CI-NEXT: s_waitcnt lgkmcnt(0)
; CI-NEXT: v_mov_b32_e32 v0, s0 ; CI-NEXT: v_mov_b32_e32 v0, s0
; CI-NEXT: v_mov_b32_e32 v1, s1 ; CI-NEXT: v_mov_b32_e32 v1, s1
; CI-NEXT: v_add_i32_e32 v2, vcc, v0, v2 ; CI-NEXT: v_add_i32_e32 v2, vcc, v0, v2
; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc ; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc
; CI-NEXT: v_mov_b32_e32 v0, 42
; CI-NEXT: v_add_i32_e32 v2, vcc, 40, v2 ; CI-NEXT: v_add_i32_e32 v2, vcc, 40, v2
; CI-NEXT: v_mov_b32_e32 v0, 42
; CI-NEXT: v_mov_b32_e32 v1, 0 ; CI-NEXT: v_mov_b32_e32 v1, 0
; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; CI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; CI-NEXT: flat_atomic_inc_x2 v[0:1], v[2:3], v[0:1] glc ; CI-NEXT: flat_atomic_inc_x2 v[0:1], v[2:3], v[0:1] glc
; CI-NEXT: s_endpgm ; CI-NEXT: s_endpgm
; ;
; VI-LABEL: flat_atomic_inc_noret_i64_offset_addr64: ; VI-LABEL: flat_atomic_inc_noret_i64_offset_addr64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; VI-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v2, vcc, v0, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, v0, v2
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v1, vcc
; VI-NEXT: v_mov_b32_e32 v0, 42
; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v2 ; VI-NEXT: v_add_u32_e32 v2, vcc, 40, v2
; VI-NEXT: v_mov_b32_e32 v0, 42
; VI-NEXT: v_mov_b32_e32 v1, 0 ; VI-NEXT: v_mov_b32_e32 v1, 0
; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; VI-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; VI-NEXT: flat_atomic_inc_x2 v[0:1], v[2:3], v[0:1] glc ; VI-NEXT: flat_atomic_inc_x2 v[0:1], v[2:3], v[0:1] glc
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: flat_atomic_inc_noret_i64_offset_addr64: ; GFX9-LABEL: flat_atomic_inc_noret_i64_offset_addr64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 3, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX9-NEXT: v_mov_b32_e32 v1, 42 ; GFX9-NEXT: v_mov_b32_e32 v1, 42
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v4, s1
; GFX9-NEXT: v_mov_b32_e32 v3, s0 ; GFX9-NEXT: v_mov_b32_e32 v3, s0
; GFX9-NEXT: v_mov_b32_e32 v4, s1
; GFX9-NEXT: v_add_co_u32_e32 v3, vcc, v3, v0 ; GFX9-NEXT: v_add_co_u32_e32 v3, vcc, v3, v0
; GFX9-NEXT: v_addc_co_u32_e32 v4, vcc, 0, v4, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v4, vcc, 0, v4, vcc
; GFX9-NEXT: flat_atomic_inc_x2 v[0:1], v[3:4], v[1:2] offset:40 glc ; GFX9-NEXT: flat_atomic_inc_x2 v[0:1], v[3:4], v[1:2] offset:40 glc
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: flat_atomic_inc_noret_i64_offset_addr64: ; GFX10-LABEL: flat_atomic_inc_noret_i64_offset_addr64:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll

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} }
define amdgpu_ps double @s_div_fmas_f64(double inreg %a, double inreg %b, double inreg %c, i32 inreg %d) { define amdgpu_ps double @s_div_fmas_f64(double inreg %a, double inreg %b, double inreg %c, i32 inreg %d) {
; GFX7-LABEL: s_div_fmas_f64: ; GFX7-LABEL: s_div_fmas_f64:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_cmp_eq_u32 s6, 0 ; GFX7-NEXT: s_cmp_eq_u32 s6, 0
; GFX7-NEXT: s_cselect_b32 s6, 1, 0 ; GFX7-NEXT: s_cselect_b32 s6, 1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: s_and_b32 s0, 1, s6
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2 ; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v4, s4
; GFX7-NEXT: s_and_b32 s0, 1, s6
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: v_mov_b32_e32 v4, s4
; GFX7-NEXT: v_mov_b32_e32 v5, s5 ; GFX7-NEXT: v_mov_b32_e32 v5, s5
; GFX7-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0 ; GFX7-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0
; GFX7-NEXT: s_nop 3 ; GFX7-NEXT: s_nop 3
; GFX7-NEXT: v_div_fmas_f64 v[0:1], v[0:1], v[2:3], v[4:5] ; GFX7-NEXT: v_div_fmas_f64 v[0:1], v[0:1], v[2:3], v[4:5]
; GFX7-NEXT: v_readfirstlane_b32 s0, v0 ; GFX7-NEXT: v_readfirstlane_b32 s0, v0
; GFX7-NEXT: v_readfirstlane_b32 s1, v1 ; GFX7-NEXT: v_readfirstlane_b32 s1, v1
; GFX7-NEXT: ; return to shader part epilog ; GFX7-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_div_fmas_f64: ; GFX8-LABEL: s_div_fmas_f64:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_cmp_eq_u32 s6, 0 ; GFX8-NEXT: s_cmp_eq_u32 s6, 0
; GFX8-NEXT: s_cselect_b32 s6, 1, 0 ; GFX8-NEXT: s_cselect_b32 s6, 1, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: s_and_b32 s0, 1, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_mov_b32_e32 v2, s2 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
; GFX8-NEXT: v_mov_b32_e32 v4, s4
; GFX8-NEXT: s_and_b32 s0, 1, s6
; GFX8-NEXT: v_mov_b32_e32 v3, s3 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
; GFX8-NEXT: v_mov_b32_e32 v4, s4
; GFX8-NEXT: v_mov_b32_e32 v5, s5 ; GFX8-NEXT: v_mov_b32_e32 v5, s5
; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0 ; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0
; GFX8-NEXT: s_nop 3 ; GFX8-NEXT: s_nop 3
; GFX8-NEXT: v_div_fmas_f64 v[0:1], v[0:1], v[2:3], v[4:5] ; GFX8-NEXT: v_div_fmas_f64 v[0:1], v[0:1], v[2:3], v[4:5]
; GFX8-NEXT: v_readfirstlane_b32 s0, v0 ; GFX8-NEXT: v_readfirstlane_b32 s0, v0
; GFX8-NEXT: v_readfirstlane_b32 s1, v1 ; GFX8-NEXT: v_readfirstlane_b32 s1, v1
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX10_W32-LABEL: s_div_fmas_f64: ; GFX10_W32-LABEL: s_div_fmas_f64:
; GFX10_W32: ; %bb.0: ; GFX10_W32: ; %bb.0:
; GFX10_W32-NEXT: s_cmp_eq_u32 s6, 0 ; GFX10_W32-NEXT: s_cmp_eq_u32 s6, 0
; GFX10_W32-NEXT: v_mov_b32_e32 v0, s2 ; GFX10_W32-NEXT: v_mov_b32_e32 v0, s2
; GFX10_W32-NEXT: s_cselect_b32 s6, 1, 0 ; GFX10_W32-NEXT: s_cselect_b32 s6, 1, 0
; GFX10_W32-NEXT: v_mov_b32_e32 v2, s4
; GFX10_W32-NEXT: s_and_b32 s6, 1, s6
; GFX10_W32-NEXT: v_mov_b32_e32 v1, s3 ; GFX10_W32-NEXT: v_mov_b32_e32 v1, s3
; GFX10_W32-NEXT: s_and_b32 s6, 1, s6
; GFX10_W32-NEXT: v_mov_b32_e32 v2, s4
; GFX10_W32-NEXT: v_cmp_ne_u32_e64 vcc_lo, 0, s6 ; GFX10_W32-NEXT: v_cmp_ne_u32_e64 vcc_lo, 0, s6
; GFX10_W32-NEXT: v_mov_b32_e32 v3, s5 ; GFX10_W32-NEXT: v_mov_b32_e32 v3, s5
; GFX10_W32-NEXT: v_div_fmas_f64 v[0:1], s[0:1], v[0:1], v[2:3] ; GFX10_W32-NEXT: v_div_fmas_f64 v[0:1], s[0:1], v[0:1], v[2:3]
; GFX10_W32-NEXT: v_readfirstlane_b32 s0, v0 ; GFX10_W32-NEXT: v_readfirstlane_b32 s0, v0
; GFX10_W32-NEXT: v_readfirstlane_b32 s1, v1 ; GFX10_W32-NEXT: v_readfirstlane_b32 s1, v1
; GFX10_W32-NEXT: ; return to shader part epilog ; GFX10_W32-NEXT: ; return to shader part epilog
; ;
; GFX10_W64-LABEL: s_div_fmas_f64: ; GFX10_W64-LABEL: s_div_fmas_f64:
; GFX10_W64: ; %bb.0: ; GFX10_W64: ; %bb.0:
; GFX10_W64-NEXT: s_cmp_eq_u32 s6, 0 ; GFX10_W64-NEXT: s_cmp_eq_u32 s6, 0
; GFX10_W64-NEXT: v_mov_b32_e32 v0, s2 ; GFX10_W64-NEXT: v_mov_b32_e32 v0, s2
; GFX10_W64-NEXT: s_cselect_b32 s6, 1, 0 ; GFX10_W64-NEXT: s_cselect_b32 s6, 1, 0
; GFX10_W64-NEXT: v_mov_b32_e32 v2, s4
; GFX10_W64-NEXT: s_and_b32 s6, 1, s6
; GFX10_W64-NEXT: v_mov_b32_e32 v1, s3 ; GFX10_W64-NEXT: v_mov_b32_e32 v1, s3
; GFX10_W64-NEXT: s_and_b32 s6, 1, s6
; GFX10_W64-NEXT: v_mov_b32_e32 v2, s4
; GFX10_W64-NEXT: v_cmp_ne_u32_e64 vcc, 0, s6 ; GFX10_W64-NEXT: v_cmp_ne_u32_e64 vcc, 0, s6
; GFX10_W64-NEXT: v_mov_b32_e32 v3, s5 ; GFX10_W64-NEXT: v_mov_b32_e32 v3, s5
; GFX10_W64-NEXT: v_div_fmas_f64 v[0:1], s[0:1], v[0:1], v[2:3] ; GFX10_W64-NEXT: v_div_fmas_f64 v[0:1], s[0:1], v[0:1], v[2:3]
; GFX10_W64-NEXT: v_readfirstlane_b32 s0, v0 ; GFX10_W64-NEXT: v_readfirstlane_b32 s0, v0
; GFX10_W64-NEXT: v_readfirstlane_b32 s1, v1 ; GFX10_W64-NEXT: v_readfirstlane_b32 s1, v1
; GFX10_W64-NEXT: ; return to shader part epilog ; GFX10_W64-NEXT: ; return to shader part epilog
%vcc = icmp eq i32 %d, 0 %vcc = icmp eq i32 %d, 0
%result = call double @llvm.amdgcn.div.fmas.f64(double %a, double %b, double %c, i1 %vcc) %result = call double @llvm.amdgcn.div.fmas.f64(double %a, double %b, double %c, i1 %vcc)
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define amdgpu_kernel void @test_div_fmas_f64(double addrspace(1)* %out, double %a, double %b, double %c, i1 %d) { define amdgpu_kernel void @test_div_fmas_f64(double addrspace(1)* %out, double %a, double %b, double %c, i1 %d) {
; GFX7-LABEL: test_div_fmas_f64: ; GFX7-LABEL: test_div_fmas_f64:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dword s8, s[0:1], 0x11 ; GFX7-NEXT: s_load_dword s8, s[0:1], 0x11
; GFX7-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x9 ; GFX7-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x9
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s2 ; GFX7-NEXT: v_mov_b32_e32 v0, s2
; GFX7-NEXT: s_and_b32 s2, 1, s8
; GFX7-NEXT: v_mov_b32_e32 v1, s3 ; GFX7-NEXT: v_mov_b32_e32 v1, s3
; GFX7-NEXT: v_mov_b32_e32 v2, s4 ; GFX7-NEXT: v_mov_b32_e32 v2, s4
; GFX7-NEXT: v_mov_b32_e32 v4, s6
; GFX7-NEXT: s_and_b32 s2, 1, s8
; GFX7-NEXT: v_mov_b32_e32 v3, s5 ; GFX7-NEXT: v_mov_b32_e32 v3, s5
; GFX7-NEXT: v_mov_b32_e32 v4, s6
; GFX7-NEXT: v_mov_b32_e32 v5, s7 ; GFX7-NEXT: v_mov_b32_e32 v5, s7
; GFX7-NEXT: v_cmp_ne_u32_e64 vcc, 0, s2 ; GFX7-NEXT: v_cmp_ne_u32_e64 vcc, 0, s2
; GFX7-NEXT: s_nop 3 ; GFX7-NEXT: s_nop 3
; GFX7-NEXT: v_div_fmas_f64 v[0:1], v[0:1], v[2:3], v[4:5] ; GFX7-NEXT: v_div_fmas_f64 v[0:1], v[0:1], v[2:3], v[4:5]
; GFX7-NEXT: v_mov_b32_e32 v3, s1 ; GFX7-NEXT: v_mov_b32_e32 v3, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s0 ; GFX7-NEXT: v_mov_b32_e32 v2, s0
; GFX7-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX7-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: test_div_fmas_f64: ; GFX8-LABEL: test_div_fmas_f64:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dword s8, s[0:1], 0x44 ; GFX8-NEXT: s_load_dword s8, s[0:1], 0x44
; GFX8-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x24
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: s_and_b32 s2, 1, s8
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_mov_b32_e32 v4, s6
; GFX8-NEXT: s_and_b32 s2, 1, s8
; GFX8-NEXT: v_mov_b32_e32 v3, s5 ; GFX8-NEXT: v_mov_b32_e32 v3, s5
; GFX8-NEXT: v_mov_b32_e32 v4, s6
; GFX8-NEXT: v_mov_b32_e32 v5, s7 ; GFX8-NEXT: v_mov_b32_e32 v5, s7
; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s2 ; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s2
; GFX8-NEXT: s_nop 3 ; GFX8-NEXT: s_nop 3
; GFX8-NEXT: v_div_fmas_f64 v[0:1], v[0:1], v[2:3], v[4:5] ; GFX8-NEXT: v_div_fmas_f64 v[0:1], v[0:1], v[2:3], v[4:5]
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX10_W32-LABEL: test_div_fmas_f64: ; GFX10_W32-LABEL: test_div_fmas_f64:
; GFX10_W32: ; %bb.0: ; GFX10_W32: ; %bb.0:
; GFX10_W32-NEXT: s_clause 0x1 ; GFX10_W32-NEXT: s_clause 0x1
; GFX10_W32-NEXT: s_load_dword s2, s[0:1], 0x44 ; GFX10_W32-NEXT: s_load_dword s2, s[0:1], 0x44
; GFX10_W32-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x24 ; GFX10_W32-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x24
; GFX10_W32-NEXT: s_waitcnt lgkmcnt(0) ; GFX10_W32-NEXT: s_waitcnt lgkmcnt(0)
; GFX10_W32-NEXT: s_and_b32 s0, 1, s2 ; GFX10_W32-NEXT: s_and_b32 s0, 1, s2
; GFX10_W32-NEXT: v_mov_b32_e32 v0, s8 ; GFX10_W32-NEXT: v_mov_b32_e32 v0, s8
; GFX10_W32-NEXT: v_mov_b32_e32 v2, s10
; GFX10_W32-NEXT: v_cmp_ne_u32_e64 vcc_lo, 0, s0 ; GFX10_W32-NEXT: v_cmp_ne_u32_e64 vcc_lo, 0, s0
; GFX10_W32-NEXT: v_mov_b32_e32 v1, s9 ; GFX10_W32-NEXT: v_mov_b32_e32 v1, s9
; GFX10_W32-NEXT: v_mov_b32_e32 v2, s10
; GFX10_W32-NEXT: v_mov_b32_e32 v3, s11 ; GFX10_W32-NEXT: v_mov_b32_e32 v3, s11
; GFX10_W32-NEXT: v_div_fmas_f64 v[0:1], s[6:7], v[0:1], v[2:3] ; GFX10_W32-NEXT: v_div_fmas_f64 v[0:1], s[6:7], v[0:1], v[2:3]
; GFX10_W32-NEXT: v_mov_b32_e32 v2, 0 ; GFX10_W32-NEXT: v_mov_b32_e32 v2, 0
; GFX10_W32-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5] ; GFX10_W32-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
; GFX10_W32-NEXT: s_endpgm ; GFX10_W32-NEXT: s_endpgm
; ;
; GFX10_W64-LABEL: test_div_fmas_f64: ; GFX10_W64-LABEL: test_div_fmas_f64:
; GFX10_W64: ; %bb.0: ; GFX10_W64: ; %bb.0:
; GFX10_W64-NEXT: s_clause 0x1 ; GFX10_W64-NEXT: s_clause 0x1
; GFX10_W64-NEXT: s_load_dword s2, s[0:1], 0x44 ; GFX10_W64-NEXT: s_load_dword s2, s[0:1], 0x44
; GFX10_W64-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x24 ; GFX10_W64-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x24
; GFX10_W64-NEXT: s_waitcnt lgkmcnt(0) ; GFX10_W64-NEXT: s_waitcnt lgkmcnt(0)
; GFX10_W64-NEXT: s_and_b32 s0, 1, s2 ; GFX10_W64-NEXT: s_and_b32 s0, 1, s2
; GFX10_W64-NEXT: v_mov_b32_e32 v0, s8 ; GFX10_W64-NEXT: v_mov_b32_e32 v0, s8
; GFX10_W64-NEXT: v_mov_b32_e32 v2, s10
; GFX10_W64-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0 ; GFX10_W64-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0
; GFX10_W64-NEXT: v_mov_b32_e32 v1, s9 ; GFX10_W64-NEXT: v_mov_b32_e32 v1, s9
; GFX10_W64-NEXT: v_mov_b32_e32 v2, s10
; GFX10_W64-NEXT: v_mov_b32_e32 v3, s11 ; GFX10_W64-NEXT: v_mov_b32_e32 v3, s11
; GFX10_W64-NEXT: v_div_fmas_f64 v[0:1], s[6:7], v[0:1], v[2:3] ; GFX10_W64-NEXT: v_div_fmas_f64 v[0:1], s[6:7], v[0:1], v[2:3]
; GFX10_W64-NEXT: v_mov_b32_e32 v2, 0 ; GFX10_W64-NEXT: v_mov_b32_e32 v2, 0
; GFX10_W64-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5] ; GFX10_W64-NEXT: global_store_dwordx2 v2, v[0:1], s[4:5]
; GFX10_W64-NEXT: s_endpgm ; GFX10_W64-NEXT: s_endpgm
%result = call double @llvm.amdgcn.div.fmas.f64(double %a, double %b, double %c, i1 %d) %result = call double @llvm.amdgcn.div.fmas.f64(double %a, double %b, double %c, i1 %d)
store double %result, double addrspace(1)* %out, align 8 store double %result, double addrspace(1)* %out, align 8
ret void ret void
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; GFX8-NEXT: s_add_u32 s0, s4, 8 ; GFX8-NEXT: s_add_u32 s0, s4, 8
; GFX8-NEXT: s_addc_u32 s1, s5, 0 ; GFX8-NEXT: s_addc_u32 s1, s5, 0
; GFX8-NEXT: s_cmp_lg_u32 s2, 0 ; GFX8-NEXT: s_cmp_lg_u32 s2, 0
; GFX8-NEXT: s_cselect_b32 s2, 1, 0 ; GFX8-NEXT: s_cselect_b32 s2, 1, 0
; GFX8-NEXT: s_and_b32 s2, 1, s2 ; GFX8-NEXT: s_and_b32 s2, 1, s2
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
; GFX8-NEXT: v_cmp_ne_u32_e64 s[2:3], 0, s2 ; GFX8-NEXT: v_cmp_ne_u32_e64 s[2:3], 0, s2
; GFX8-NEXT: s_and_b64 vcc, vcc, s[2:3] ; GFX8-NEXT: s_and_b64 vcc, vcc, s[2:3]
; GFX8-NEXT: s_nop 1
; GFX8-NEXT: v_div_fmas_f32 v2, v1, v2, v3
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: s_nop 0
; GFX8-NEXT: v_div_fmas_f32 v2, v1, v2, v3
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX10_W32-LABEL: test_div_fmas_f32_logical_cond_to_vcc: ; GFX10_W32-LABEL: test_div_fmas_f32_logical_cond_to_vcc:
; GFX10_W32: ; %bb.0: ; GFX10_W32: ; %bb.0:
; GFX10_W32-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10_W32-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10_W32-NEXT: v_lshlrev_b32_e32 v1, 2, v0 ; GFX10_W32-NEXT: v_lshlrev_b32_e32 v1, 2, v0
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; GFX8-NEXT: s_cmp_lg_u32 s0, 0 ; GFX8-NEXT: s_cmp_lg_u32 s0, 0
; GFX8-NEXT: s_cselect_b32 s6, 1, 0 ; GFX8-NEXT: s_cselect_b32 s6, 1, 0
; GFX8-NEXT: BB13_2: ; %exit ; GFX8-NEXT: BB13_2: ; %exit
; GFX8-NEXT: s_or_b64 exec, exec, s[4:5] ; GFX8-NEXT: s_or_b64 exec, exec, s[4:5]
; GFX8-NEXT: s_add_u32 s0, s2, 8 ; GFX8-NEXT: s_add_u32 s0, s2, 8
; GFX8-NEXT: s_addc_u32 s1, s3, 0 ; GFX8-NEXT: s_addc_u32 s1, s3, 0
; GFX8-NEXT: s_and_b32 s2, 1, s6 ; GFX8-NEXT: s_and_b32 s2, 1, s6
; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s2 ; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s2
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: s_nop 2 ; GFX8-NEXT: s_nop 1
; GFX8-NEXT: v_div_fmas_f32 v2, v1, v2, v3 ; GFX8-NEXT: v_div_fmas_f32 v2, v1, v2, v3
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX10_W32-LABEL: test_div_fmas_f32_i1_phi_vcc: ; GFX10_W32-LABEL: test_div_fmas_f32_i1_phi_vcc:
; GFX10_W32: ; %bb.0: ; %entry ; GFX10_W32: ; %bb.0: ; %entry
; GFX10_W32-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x4c ; GFX10_W32-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x4c
; GFX10_W32-NEXT: v_lshlrev_b32_e32 v1, 2, v0 ; GFX10_W32-NEXT: v_lshlrev_b32_e32 v1, 2, v0
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llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll

Show First 20 Lines • Show All 306 Lines • ▼ Show 20 Lines
; GFX8-NEXT: s_load_dword s0, s[0:1], 0x54 ; GFX8-NEXT: s_load_dword s0, s[0:1], 0x54
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, s6 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_div_scale_f32 v2, s[0:1], v0, v0, s0 ; GFX8-NEXT: v_div_scale_f32 v2, s[0:1], v0, v0, s0
; GFX8-NEXT: v_mov_b32_e32 v0, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX10-LABEL: test_div_scale_f32_scalar_num_1: ; GFX10-LABEL: test_div_scale_f32_scalar_num_1:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX10-NEXT: s_load_dword s0, s[0:1], 0x54 ; GFX10-NEXT: s_load_dword s0, s[0:1], 0x54
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; GFX8-NEXT: s_load_dword s0, s[0:1], 0x34 ; GFX8-NEXT: s_load_dword s0, s[0:1], 0x34
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, s6 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_div_scale_f32 v2, s[0:1], s0, v0, s0 ; GFX8-NEXT: v_div_scale_f32 v2, s[0:1], s0, v0, s0
; GFX8-NEXT: v_mov_b32_e32 v0, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX10-LABEL: test_div_scale_f32_scalar_num_2: ; GFX10-LABEL: test_div_scale_f32_scalar_num_2:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX10-NEXT: s_load_dword s0, s[0:1], 0x34 ; GFX10-NEXT: s_load_dword s0, s[0:1], 0x34
Show All 40 Lines
; GFX8-NEXT: s_load_dword s0, s[0:1], 0x34 ; GFX8-NEXT: s_load_dword s0, s[0:1], 0x34
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, s6 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_div_scale_f32 v2, s[0:1], s0, s0, v0 ; GFX8-NEXT: v_div_scale_f32 v2, s[0:1], s0, s0, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX10-LABEL: test_div_scale_f32_scalar_den_1: ; GFX10-LABEL: test_div_scale_f32_scalar_den_1:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX10-NEXT: s_load_dword s0, s[0:1], 0x34 ; GFX10-NEXT: s_load_dword s0, s[0:1], 0x34
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; GFX8-NEXT: s_load_dword s0, s[0:1], 0x34 ; GFX8-NEXT: s_load_dword s0, s[0:1], 0x34
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, s6 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_div_scale_f32 v2, s[0:1], v0, s0, v0 ; GFX8-NEXT: v_div_scale_f32 v2, s[0:1], v0, s0, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX10-LABEL: test_div_scale_f32_scalar_den_2: ; GFX10-LABEL: test_div_scale_f32_scalar_den_2:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX10-NEXT: s_load_dword s0, s[0:1], 0x34 ; GFX10-NEXT: s_load_dword s0, s[0:1], 0x34
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; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_div_scale_f32 v2, s[2:3], v0, v0, 1.0 ; GFX8-NEXT: v_div_scale_f32 v2, s[2:3], v0, v0, 1.0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX10-LABEL: test_div_scale_f32_inline_imm_num: ; GFX10-LABEL: test_div_scale_f32_inline_imm_num:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
Show All 36 Lines
; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_div_scale_f32 v2, s[2:3], 2.0, 2.0, v0 ; GFX8-NEXT: v_div_scale_f32 v2, s[2:3], 2.0, 2.0, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX10-LABEL: test_div_scale_f32_inline_imm_den: ; GFX10-LABEL: test_div_scale_f32_inline_imm_den:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
▲ Show 20 Lines • Show All 318 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll

Show First 20 Lines • Show All 43 Lines • ▼ Show 20 Lines; GFX10-NEXT: ; return to shader part epilog
ret <4 x float> %v ret <4 x float> %v
} }
define amdgpu_ps <4 x float> @load_2darraymsaa_v4f32_xyzw_tfe(<8 x i32> inreg %rsrc, i32 addrspace(1)* inreg %out, i16 %s, i16 %t, i16 %slice, i16 %fragid) { define amdgpu_ps <4 x float> @load_2darraymsaa_v4f32_xyzw_tfe(<8 x i32> inreg %rsrc, i32 addrspace(1)* inreg %out, i16 %s, i16 %t, i16 %slice, i16 %fragid) {
; GFX9-LABEL: load_2darraymsaa_v4f32_xyzw_tfe: ; GFX9-LABEL: load_2darraymsaa_v4f32_xyzw_tfe:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v4, 0xffff ; GFX9-NEXT: v_mov_b32_e32 v4, 0xffff
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: v_and_or_b32 v10, v0, v4, v1 ; GFX9-NEXT: v_and_or_b32 v10, v0, v4, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v3 ; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v3
; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: v_and_or_b32 v11, v2, v4, v0
; GFX9-NEXT: v_mov_b32_e32 v6, v5 ; GFX9-NEXT: v_mov_b32_e32 v6, v5
; GFX9-NEXT: v_mov_b32_e32 v7, v5 ; GFX9-NEXT: v_mov_b32_e32 v7, v5
; GFX9-NEXT: v_mov_b32_e32 v8, v5 ; GFX9-NEXT: v_mov_b32_e32 v8, v5
; GFX9-NEXT: v_mov_b32_e32 v9, v5 ; GFX9-NEXT: v_mov_b32_e32 v9, v5
; GFX9-NEXT: v_mov_b32_e32 v0, v5
; GFX9-NEXT: s_mov_b32 s0, s2 ; GFX9-NEXT: s_mov_b32 s0, s2
; GFX9-NEXT: s_mov_b32 s1, s3 ; GFX9-NEXT: s_mov_b32 s1, s3
; GFX9-NEXT: s_mov_b32 s2, s4 ; GFX9-NEXT: s_mov_b32 s2, s4
; GFX9-NEXT: s_mov_b32 s3, s5 ; GFX9-NEXT: s_mov_b32 s3, s5
; GFX9-NEXT: s_mov_b32 s4, s6 ; GFX9-NEXT: s_mov_b32 s4, s6
; GFX9-NEXT: s_mov_b32 s5, s7 ; GFX9-NEXT: s_mov_b32 s5, s7
; GFX9-NEXT: s_mov_b32 s6, s8 ; GFX9-NEXT: s_mov_b32 s6, s8
; GFX9-NEXT: s_mov_b32 s7, s9 ; GFX9-NEXT: s_mov_b32 s7, s9
; GFX9-NEXT: v_and_or_b32 v11, v2, v4, v0
; GFX9-NEXT: v_mov_b32_e32 v0, v5
; GFX9-NEXT: v_mov_b32_e32 v1, v6 ; GFX9-NEXT: v_mov_b32_e32 v1, v6
; GFX9-NEXT: v_mov_b32_e32 v2, v7 ; GFX9-NEXT: v_mov_b32_e32 v2, v7
; GFX9-NEXT: v_mov_b32_e32 v3, v8 ; GFX9-NEXT: v_mov_b32_e32 v3, v8
; GFX9-NEXT: v_mov_b32_e32 v4, v9 ; GFX9-NEXT: v_mov_b32_e32 v4, v9
; GFX9-NEXT: image_load v[0:4], v[10:11], s[0:7] dmask:0xf unorm a16 tfe da ; GFX9-NEXT: image_load v[0:4], v[10:11], s[0:7] dmask:0xf unorm a16 tfe da
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: global_store_dword v5, v4, s[10:11] ; GFX9-NEXT: global_store_dword v5, v4, s[10:11]
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
Show All 36 Lines; GFX10-NEXT: ; return to shader part epilog
ret <4 x float> %v.vec ret <4 x float> %v.vec
} }
define amdgpu_ps <4 x float> @load_2darraymsaa_v4f32_xyzw_tfe_lwe(<8 x i32> inreg %rsrc, i32 addrspace(1)* inreg %out, i16 %s, i16 %t, i16 %slice, i16 %fragid) { define amdgpu_ps <4 x float> @load_2darraymsaa_v4f32_xyzw_tfe_lwe(<8 x i32> inreg %rsrc, i32 addrspace(1)* inreg %out, i16 %s, i16 %t, i16 %slice, i16 %fragid) {
; GFX9-LABEL: load_2darraymsaa_v4f32_xyzw_tfe_lwe: ; GFX9-LABEL: load_2darraymsaa_v4f32_xyzw_tfe_lwe:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: v_mov_b32_e32 v4, 0xffff ; GFX9-NEXT: v_mov_b32_e32 v4, 0xffff
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: v_and_or_b32 v10, v0, v4, v1 ; GFX9-NEXT: v_and_or_b32 v10, v0, v4, v1
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v3 ; GFX9-NEXT: v_lshlrev_b32_e32 v0, 16, v3
; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: v_and_or_b32 v11, v2, v4, v0
; GFX9-NEXT: v_mov_b32_e32 v6, v5 ; GFX9-NEXT: v_mov_b32_e32 v6, v5
; GFX9-NEXT: v_mov_b32_e32 v7, v5 ; GFX9-NEXT: v_mov_b32_e32 v7, v5
; GFX9-NEXT: v_mov_b32_e32 v8, v5 ; GFX9-NEXT: v_mov_b32_e32 v8, v5
; GFX9-NEXT: v_mov_b32_e32 v9, v5 ; GFX9-NEXT: v_mov_b32_e32 v9, v5
; GFX9-NEXT: v_mov_b32_e32 v0, v5
; GFX9-NEXT: s_mov_b32 s0, s2 ; GFX9-NEXT: s_mov_b32 s0, s2
; GFX9-NEXT: s_mov_b32 s1, s3 ; GFX9-NEXT: s_mov_b32 s1, s3
; GFX9-NEXT: s_mov_b32 s2, s4 ; GFX9-NEXT: s_mov_b32 s2, s4
; GFX9-NEXT: s_mov_b32 s3, s5 ; GFX9-NEXT: s_mov_b32 s3, s5
; GFX9-NEXT: s_mov_b32 s4, s6 ; GFX9-NEXT: s_mov_b32 s4, s6
; GFX9-NEXT: s_mov_b32 s5, s7 ; GFX9-NEXT: s_mov_b32 s5, s7
; GFX9-NEXT: s_mov_b32 s6, s8 ; GFX9-NEXT: s_mov_b32 s6, s8
; GFX9-NEXT: s_mov_b32 s7, s9 ; GFX9-NEXT: s_mov_b32 s7, s9
; GFX9-NEXT: v_and_or_b32 v11, v2, v4, v0
; GFX9-NEXT: v_mov_b32_e32 v0, v5
; GFX9-NEXT: v_mov_b32_e32 v1, v6 ; GFX9-NEXT: v_mov_b32_e32 v1, v6
; GFX9-NEXT: v_mov_b32_e32 v2, v7 ; GFX9-NEXT: v_mov_b32_e32 v2, v7
; GFX9-NEXT: v_mov_b32_e32 v3, v8 ; GFX9-NEXT: v_mov_b32_e32 v3, v8
; GFX9-NEXT: v_mov_b32_e32 v4, v9 ; GFX9-NEXT: v_mov_b32_e32 v4, v9
; GFX9-NEXT: image_load v[0:4], v[10:11], s[0:7] dmask:0xf unorm a16 tfe lwe da ; GFX9-NEXT: image_load v[0:4], v[10:11], s[0:7] dmask:0xf unorm a16 tfe lwe da
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: global_store_dword v5, v4, s[10:11] ; GFX9-NEXT: global_store_dword v5, v4, s[10:11]
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
▲ Show 20 Lines • Show All 43 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll

Show First 20 Lines • Show All 42 Lines • ▼ Show 20 Lines; GFX10-NEXT: ; return to shader part epilog
%v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %r, <8 x i32> %rsrc, i32 0, i32 0) %v = call <4 x float> @llvm.amdgcn.image.load.3d.v4f32.i16(i32 15, i16 %s, i16 %t, i16 %r, <8 x i32> %rsrc, i32 0, i32 0)
ret <4 x float> %v ret <4 x float> %v
} }
define amdgpu_ps <4 x float> @load_3d_v4f32_xyzw_tfe(<8 x i32> inreg %rsrc, i32 addrspace(1)* inreg %out, i16 %s, i16 %t, i16 %r) { define amdgpu_ps <4 x float> @load_3d_v4f32_xyzw_tfe(<8 x i32> inreg %rsrc, i32 addrspace(1)* inreg %out, i16 %s, i16 %t, i16 %r) {
; GFX9-LABEL: load_3d_v4f32_xyzw_tfe: ; GFX9-LABEL: load_3d_v4f32_xyzw_tfe:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_mov_b32 s0, s2 ; GFX9-NEXT: s_mov_b32 s0, s2
; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: s_mov_b32 s2, s4 ; GFX9-NEXT: s_mov_b32 s2, s4
; GFX9-NEXT: s_mov_b32 s4, s6 ; GFX9-NEXT: s_mov_b32 s4, s6
; GFX9-NEXT: s_mov_b32 s6, s8 ; GFX9-NEXT: s_mov_b32 s6, s8
; GFX9-NEXT: v_mov_b32_e32 v3, 0xffff ; GFX9-NEXT: v_mov_b32_e32 v3, 0xffff
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX9-NEXT: s_lshl_b32 s8, s0, 16 ; GFX9-NEXT: s_lshl_b32 s8, s0, 16
; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: v_and_or_b32 v10, v0, v3, v1
; GFX9-NEXT: v_and_or_b32 v11, v2, v3, s8
; GFX9-NEXT: v_mov_b32_e32 v6, v5 ; GFX9-NEXT: v_mov_b32_e32 v6, v5
; GFX9-NEXT: v_mov_b32_e32 v7, v5 ; GFX9-NEXT: v_mov_b32_e32 v7, v5
; GFX9-NEXT: v_mov_b32_e32 v8, v5 ; GFX9-NEXT: v_mov_b32_e32 v8, v5
; GFX9-NEXT: v_mov_b32_e32 v9, v5 ; GFX9-NEXT: v_mov_b32_e32 v9, v5
; GFX9-NEXT: v_mov_b32_e32 v0, v5
; GFX9-NEXT: s_mov_b32 s1, s3 ; GFX9-NEXT: s_mov_b32 s1, s3
; GFX9-NEXT: s_mov_b32 s3, s5 ; GFX9-NEXT: s_mov_b32 s3, s5
; GFX9-NEXT: s_mov_b32 s5, s7 ; GFX9-NEXT: s_mov_b32 s5, s7
; GFX9-NEXT: s_mov_b32 s7, s9 ; GFX9-NEXT: s_mov_b32 s7, s9
; GFX9-NEXT: v_and_or_b32 v10, v0, v3, v1
; GFX9-NEXT: v_and_or_b32 v11, v2, v3, s8
; GFX9-NEXT: v_mov_b32_e32 v0, v5
; GFX9-NEXT: v_mov_b32_e32 v1, v6 ; GFX9-NEXT: v_mov_b32_e32 v1, v6
; GFX9-NEXT: v_mov_b32_e32 v2, v7 ; GFX9-NEXT: v_mov_b32_e32 v2, v7
; GFX9-NEXT: v_mov_b32_e32 v3, v8 ; GFX9-NEXT: v_mov_b32_e32 v3, v8
; GFX9-NEXT: v_mov_b32_e32 v4, v9 ; GFX9-NEXT: v_mov_b32_e32 v4, v9
; GFX9-NEXT: image_load v[0:4], v[10:11], s[0:7] dmask:0xf unorm a16 tfe ; GFX9-NEXT: image_load v[0:4], v[10:11], s[0:7] dmask:0xf unorm a16 tfe
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: global_store_dword v5, v4, s[10:11] ; GFX9-NEXT: global_store_dword v5, v4, s[10:11]
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
Show All 35 Lines; GFX10-NEXT: ; return to shader part epilog
store i32 %v.err, i32 addrspace(1)* %out, align 4 store i32 %v.err, i32 addrspace(1)* %out, align 4
ret <4 x float> %v.vec ret <4 x float> %v.vec
} }
define amdgpu_ps <4 x float> @load_3d_v4f32_xyzw_tfe_lwe(<8 x i32> inreg %rsrc, i32 addrspace(1)* inreg %out, i16 %s, i16 %t, i16 %r) { define amdgpu_ps <4 x float> @load_3d_v4f32_xyzw_tfe_lwe(<8 x i32> inreg %rsrc, i32 addrspace(1)* inreg %out, i16 %s, i16 %t, i16 %r) {
; GFX9-LABEL: load_3d_v4f32_xyzw_tfe_lwe: ; GFX9-LABEL: load_3d_v4f32_xyzw_tfe_lwe:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_mov_b32 s0, s2 ; GFX9-NEXT: s_mov_b32 s0, s2
; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: s_mov_b32 s2, s4 ; GFX9-NEXT: s_mov_b32 s2, s4
; GFX9-NEXT: s_mov_b32 s4, s6 ; GFX9-NEXT: s_mov_b32 s4, s6
; GFX9-NEXT: s_mov_b32 s6, s8 ; GFX9-NEXT: s_mov_b32 s6, s8
; GFX9-NEXT: v_mov_b32_e32 v3, 0xffff ; GFX9-NEXT: v_mov_b32_e32 v3, 0xffff
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX9-NEXT: s_lshl_b32 s8, s0, 16 ; GFX9-NEXT: s_lshl_b32 s8, s0, 16
; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: v_and_or_b32 v10, v0, v3, v1
; GFX9-NEXT: v_and_or_b32 v11, v2, v3, s8
; GFX9-NEXT: v_mov_b32_e32 v6, v5 ; GFX9-NEXT: v_mov_b32_e32 v6, v5
; GFX9-NEXT: v_mov_b32_e32 v7, v5 ; GFX9-NEXT: v_mov_b32_e32 v7, v5
; GFX9-NEXT: v_mov_b32_e32 v8, v5 ; GFX9-NEXT: v_mov_b32_e32 v8, v5
; GFX9-NEXT: v_mov_b32_e32 v9, v5 ; GFX9-NEXT: v_mov_b32_e32 v9, v5
; GFX9-NEXT: v_mov_b32_e32 v0, v5
; GFX9-NEXT: s_mov_b32 s1, s3 ; GFX9-NEXT: s_mov_b32 s1, s3
; GFX9-NEXT: s_mov_b32 s3, s5 ; GFX9-NEXT: s_mov_b32 s3, s5
; GFX9-NEXT: s_mov_b32 s5, s7 ; GFX9-NEXT: s_mov_b32 s5, s7
; GFX9-NEXT: s_mov_b32 s7, s9 ; GFX9-NEXT: s_mov_b32 s7, s9
; GFX9-NEXT: v_and_or_b32 v10, v0, v3, v1
; GFX9-NEXT: v_and_or_b32 v11, v2, v3, s8
; GFX9-NEXT: v_mov_b32_e32 v0, v5
; GFX9-NEXT: v_mov_b32_e32 v1, v6 ; GFX9-NEXT: v_mov_b32_e32 v1, v6
; GFX9-NEXT: v_mov_b32_e32 v2, v7 ; GFX9-NEXT: v_mov_b32_e32 v2, v7
; GFX9-NEXT: v_mov_b32_e32 v3, v8 ; GFX9-NEXT: v_mov_b32_e32 v3, v8
; GFX9-NEXT: v_mov_b32_e32 v4, v9 ; GFX9-NEXT: v_mov_b32_e32 v4, v9
; GFX9-NEXT: image_load v[0:4], v[10:11], s[0:7] dmask:0xf unorm a16 tfe lwe ; GFX9-NEXT: image_load v[0:4], v[10:11], s[0:7] dmask:0xf unorm a16 tfe lwe
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: global_store_dword v5, v4, s[10:11] ; GFX9-NEXT: global_store_dword v5, v4, s[10:11]
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
▲ Show 20 Lines • Show All 43 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mfma.gfx90a.ll

Show First 20 Lines • Show All 397 Lines • ▼ Show 20 Linesbb:
store <4 x double> %mai.2, <4 x double> addrspace(1)* %arg store <4 x double> %mai.2, <4 x double> addrspace(1)* %arg
ret void ret void
} }
define amdgpu_kernel void @test_mfma_f64_16x16x4f64_imm(<4 x double> addrspace(1)* %arg, double %a, double %b) { define amdgpu_kernel void @test_mfma_f64_16x16x4f64_imm(<4 x double> addrspace(1)* %arg, double %a, double %b) {
; GCN-LABEL: test_mfma_f64_16x16x4f64_imm: ; GCN-LABEL: test_mfma_f64_16x16x4f64_imm:
; GCN: ; %bb.0: ; %bb ; GCN: ; %bb.0: ; %bb
; GCN-NEXT: s_mov_b64 s[4:5], 0 ; GCN-NEXT: s_mov_b64 s[4:5], 0
; GCN-NEXT: s_mov_b64 s[10:11], 1.0
; GCN-NEXT: s_load_dwordx4 s[12:15], s[0:1], 0x24 ; GCN-NEXT: s_load_dwordx4 s[12:15], s[0:1], 0x24
; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34 ; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
; GCN-NEXT: s_mov_b64 s[6:7], s[4:5]
; GCN-NEXT: s_mov_b64 s[8:9], s[4:5]
; GCN-NEXT: v_mov_b32_e32 v4, s4 ; GCN-NEXT: v_mov_b32_e32 v4, s4
; GCN-NEXT: s_mov_b64 s[6:7], s[4:5]
; GCN-NEXT: v_accvgpr_write_b32 a0, v4 ; GCN-NEXT: v_accvgpr_write_b32 a0, v4
; GCN-NEXT: v_mov_b32_e32 v4, s5 ; GCN-NEXT: v_mov_b32_e32 v4, s5
; GCN-NEXT: v_accvgpr_write_b32 a1, v4 ; GCN-NEXT: v_accvgpr_write_b32 a1, v4
; GCN-NEXT: v_mov_b32_e32 v4, s6 ; GCN-NEXT: v_mov_b32_e32 v4, s6
; GCN-NEXT: s_mov_b64 s[8:9], s[4:5]
; GCN-NEXT: v_accvgpr_write_b32 a2, v4 ; GCN-NEXT: v_accvgpr_write_b32 a2, v4
; GCN-NEXT: v_mov_b32_e32 v4, s7 ; GCN-NEXT: v_mov_b32_e32 v4, s7
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_pk_mov_b32 v[0:1], s[14:15], s[14:15] op_sel:[0,1] ; GCN-NEXT: v_pk_mov_b32 v[0:1], s[14:15], s[14:15] op_sel:[0,1]
; GCN-NEXT: v_accvgpr_write_b32 a3, v4 ; GCN-NEXT: v_accvgpr_write_b32 a3, v4
; GCN-NEXT: v_mov_b32_e32 v4, s8 ; GCN-NEXT: v_mov_b32_e32 v4, s8
; GCN-NEXT: s_mov_b64 s[10:11], 1.0
; GCN-NEXT: v_accvgpr_write_b32 a4, v4 ; GCN-NEXT: v_accvgpr_write_b32 a4, v4
; GCN-NEXT: v_mov_b32_e32 v4, s9 ; GCN-NEXT: v_mov_b32_e32 v4, s9
; GCN-NEXT: v_accvgpr_write_b32 a5, v4 ; GCN-NEXT: v_accvgpr_write_b32 a5, v4
; GCN-NEXT: v_mov_b32_e32 v4, s10 ; GCN-NEXT: v_mov_b32_e32 v4, s10
; GCN-NEXT: v_accvgpr_write_b32 a6, v4 ; GCN-NEXT: v_accvgpr_write_b32 a6, v4
; GCN-NEXT: v_mov_b32_e32 v4, s11 ; GCN-NEXT: v_mov_b32_e32 v4, s11
; GCN-NEXT: v_accvgpr_write_b32 a7, v4 ; GCN-NEXT: v_accvgpr_write_b32 a7, v4
; GCN-NEXT: v_pk_mov_b32 v[2:3], s[2:3], s[2:3] op_sel:[0,1] ; GCN-NEXT: v_pk_mov_b32 v[2:3], s[2:3], s[2:3] op_sel:[0,1]
Show All 12 Linesbb:
ret void ret void
} }
define amdgpu_kernel void @test_mfma_f64_16x16x4f64_splat_lit(<4 x double> addrspace(1)* %arg, double %a, double %b) { define amdgpu_kernel void @test_mfma_f64_16x16x4f64_splat_lit(<4 x double> addrspace(1)* %arg, double %a, double %b) {
; GCN-LABEL: test_mfma_f64_16x16x4f64_splat_lit: ; GCN-LABEL: test_mfma_f64_16x16x4f64_splat_lit:
; GCN: ; %bb.0: ; %bb ; GCN: ; %bb.0: ; %bb
; GCN-NEXT: s_mov_b32 s4, 0 ; GCN-NEXT: s_mov_b32 s4, 0
; GCN-NEXT: s_mov_b32 s5, 0x405ec000 ; GCN-NEXT: s_mov_b32 s5, 0x405ec000
; GCN-NEXT: s_mov_b64 s[6:7], s[4:5]
; GCN-NEXT: s_load_dwordx4 s[12:15], s[0:1], 0x24 ; GCN-NEXT: s_load_dwordx4 s[12:15], s[0:1], 0x24
; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34 ; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
; GCN-NEXT: s_mov_b64 s[8:9], s[4:5]
; GCN-NEXT: s_mov_b64 s[10:11], s[4:5]
; GCN-NEXT: v_mov_b32_e32 v4, s4 ; GCN-NEXT: v_mov_b32_e32 v4, s4
; GCN-NEXT: s_mov_b64 s[6:7], s[4:5]
; GCN-NEXT: v_accvgpr_write_b32 a0, v4 ; GCN-NEXT: v_accvgpr_write_b32 a0, v4
; GCN-NEXT: v_mov_b32_e32 v4, s5 ; GCN-NEXT: v_mov_b32_e32 v4, s5
; GCN-NEXT: v_accvgpr_write_b32 a1, v4 ; GCN-NEXT: v_accvgpr_write_b32 a1, v4
; GCN-NEXT: v_mov_b32_e32 v4, s6 ; GCN-NEXT: v_mov_b32_e32 v4, s6
; GCN-NEXT: s_mov_b64 s[8:9], s[4:5]
; GCN-NEXT: v_accvgpr_write_b32 a2, v4 ; GCN-NEXT: v_accvgpr_write_b32 a2, v4
; GCN-NEXT: v_mov_b32_e32 v4, s7 ; GCN-NEXT: v_mov_b32_e32 v4, s7
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_pk_mov_b32 v[0:1], s[14:15], s[14:15] op_sel:[0,1] ; GCN-NEXT: v_pk_mov_b32 v[0:1], s[14:15], s[14:15] op_sel:[0,1]
; GCN-NEXT: v_accvgpr_write_b32 a3, v4 ; GCN-NEXT: v_accvgpr_write_b32 a3, v4
; GCN-NEXT: v_mov_b32_e32 v4, s8 ; GCN-NEXT: v_mov_b32_e32 v4, s8
; GCN-NEXT: s_mov_b64 s[10:11], s[4:5]
; GCN-NEXT: v_accvgpr_write_b32 a4, v4 ; GCN-NEXT: v_accvgpr_write_b32 a4, v4
; GCN-NEXT: v_mov_b32_e32 v4, s9 ; GCN-NEXT: v_mov_b32_e32 v4, s9
; GCN-NEXT: v_accvgpr_write_b32 a5, v4 ; GCN-NEXT: v_accvgpr_write_b32 a5, v4
; GCN-NEXT: v_mov_b32_e32 v4, s10 ; GCN-NEXT: v_mov_b32_e32 v4, s10
; GCN-NEXT: v_accvgpr_write_b32 a6, v4 ; GCN-NEXT: v_accvgpr_write_b32 a6, v4
; GCN-NEXT: v_mov_b32_e32 v4, s11 ; GCN-NEXT: v_mov_b32_e32 v4, s11
; GCN-NEXT: v_accvgpr_write_b32 a7, v4 ; GCN-NEXT: v_accvgpr_write_b32 a7, v4
; GCN-NEXT: v_pk_mov_b32 v[2:3], s[2:3], s[2:3] op_sel:[0,1] ; GCN-NEXT: v_pk_mov_b32 v[2:3], s[2:3], s[2:3] op_sel:[0,1]
Show All 14 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.mov.dpp.ll

Show All 34 Lines
} }
define amdgpu_kernel void @mov_dpp64_test(i64 addrspace(1)* %out, i64 %in1) { define amdgpu_kernel void @mov_dpp64_test(i64 addrspace(1)* %out, i64 %in1) {
; GFX8-LABEL: mov_dpp64_test: ; GFX8-LABEL: mov_dpp64_test:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: s_nop 0
; GFX8-NEXT: v_mov_b32_dpp v0, v0 quad_perm:[1,0,0,0] row_mask:0x1 bank_mask:0x1 ; GFX8-NEXT: v_mov_b32_dpp v0, v0 quad_perm:[1,0,0,0] row_mask:0x1 bank_mask:0x1
; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_mov_b32_dpp v1, v1 quad_perm:[1,0,0,0] row_mask:0x1 bank_mask:0x1 ; GFX8-NEXT: v_mov_b32_dpp v1, v1 quad_perm:[1,0,0,0] row_mask:0x1 bank_mask:0x1
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX10-LABEL: mov_dpp64_test: ; GFX10-LABEL: mov_dpp64_test:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; encoding: [0x00,0x00,0x08,0xf4,0x24,0x00,0x00,0xfa] ; GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; encoding: [0x00,0x00,0x08,0xf4,0x24,0x00,0x00,0xfa]
Show All 17 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -global-isel -march=amdgcn -mcpu=tonga -amdgpu-dpp-combine=false -verify-machineinstrs < %s | FileCheck -check-prefix=GFX8 %s ; RUN: llc -global-isel -march=amdgcn -mcpu=tonga -amdgpu-dpp-combine=false -verify-machineinstrs < %s | FileCheck -check-prefix=GFX8 %s
; RUN: llc -global-isel -march=amdgcn -mcpu=gfx1010 -amdgpu-dpp-combine=false -verify-machineinstrs < %s | FileCheck -check-prefix=GFX10 %s ; RUN: llc -global-isel -march=amdgcn -mcpu=gfx1010 -amdgpu-dpp-combine=false -verify-machineinstrs < %s | FileCheck -check-prefix=GFX10 %s
define amdgpu_kernel void @dpp_test(i32 addrspace(1)* %out, i32 %in1, i32 %in2) { define amdgpu_kernel void @dpp_test(i32 addrspace(1)* %out, i32 %in1, i32 %in2) {
; GFX8-LABEL: dpp_test: ; GFX8-LABEL: dpp_test:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: v_mov_b32_e32 v0, s1 ; GFX8-NEXT: v_mov_b32_e32 v0, s1
; GFX8-NEXT: s_nop 1 ; GFX8-NEXT: s_nop 1
; GFX8-NEXT: v_mov_b32_dpp v2, v0 quad_perm:[1,0,0,0] row_mask:0x1 bank_mask:0x1 ; GFX8-NEXT: v_mov_b32_dpp v2, v0 quad_perm:[1,0,0,0] row_mask:0x1 bank_mask:0x1
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX10-LABEL: dpp_test: ; GFX10-LABEL: dpp_test:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_clause 0x1 ; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c ; GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24 ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
▲ Show 20 Lines • Show All 57 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll

Show First 20 Lines • Show All 55 Lines • ▼ Show 20 Lines; GFX7-NEXT: s_endpgm
ret void ret void
} }
define amdgpu_ps void @mubuf_store_sgpr_ptr_offset4294967296(i32 addrspace(1)* inreg %ptr) { define amdgpu_ps void @mubuf_store_sgpr_ptr_offset4294967296(i32 addrspace(1)* inreg %ptr) {
; GFX6-LABEL: mubuf_store_sgpr_ptr_offset4294967296: ; GFX6-LABEL: mubuf_store_sgpr_ptr_offset4294967296:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_mov_b32 s4, 0 ; GFX6-NEXT: s_mov_b32 s4, 0
; GFX6-NEXT: s_mov_b32 s5, 4 ; GFX6-NEXT: s_mov_b32 s5, 4
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: s_mov_b32 s0, s2 ; GFX6-NEXT: s_mov_b32 s0, s2
; GFX6-NEXT: s_mov_b32 s1, s3 ; GFX6-NEXT: s_mov_b32 s1, s3
; GFX6-NEXT: v_mov_b32_e32 v2, 0 ; GFX6-NEXT: v_mov_b32_e32 v2, 0
; GFX6-NEXT: s_mov_b32 s3, 0xf000 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
; GFX6-NEXT: s_mov_b32 s2, s4 ; GFX6-NEXT: s_mov_b32 s2, s4
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: v_mov_b32_e32 v1, s5 ; GFX6-NEXT: v_mov_b32_e32 v1, s5
; GFX6-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 ; GFX6-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
; GFX6-NEXT: s_endpgm ; GFX6-NEXT: s_endpgm
; ;
; GFX7-LABEL: mubuf_store_sgpr_ptr_offset4294967296: ; GFX7-LABEL: mubuf_store_sgpr_ptr_offset4294967296:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s4, 0 ; GFX7-NEXT: s_mov_b32 s4, 0
; GFX7-NEXT: s_mov_b32 s5, 4 ; GFX7-NEXT: s_mov_b32 s5, 4
; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: s_mov_b32 s0, s2 ; GFX7-NEXT: s_mov_b32 s0, s2
; GFX7-NEXT: s_mov_b32 s1, s3 ; GFX7-NEXT: s_mov_b32 s1, s3
; GFX7-NEXT: v_mov_b32_e32 v2, 0 ; GFX7-NEXT: v_mov_b32_e32 v2, 0
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, s4 ; GFX7-NEXT: s_mov_b32 s2, s4
; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 ; GFX7-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%gep = getelementptr i32, i32 addrspace(1)* %ptr, i64 4294967296 %gep = getelementptr i32, i32 addrspace(1)* %ptr, i64 4294967296
store i32 0, i32 addrspace(1)* %gep store i32 0, i32 addrspace(1)* %gep
ret void ret void
} }
define amdgpu_ps void @mubuf_store_sgpr_ptr_offset4294967297(i32 addrspace(1)* inreg %ptr) { define amdgpu_ps void @mubuf_store_sgpr_ptr_offset4294967297(i32 addrspace(1)* inreg %ptr) {
; GFX6-LABEL: mubuf_store_sgpr_ptr_offset4294967297: ; GFX6-LABEL: mubuf_store_sgpr_ptr_offset4294967297:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_mov_b32 s4, 4 ; GFX6-NEXT: s_mov_b32 s4, 4
; GFX6-NEXT: s_mov_b32 s5, s4 ; GFX6-NEXT: s_mov_b32 s5, s4
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: s_mov_b32 s0, s2 ; GFX6-NEXT: s_mov_b32 s0, s2
; GFX6-NEXT: s_mov_b32 s1, s3 ; GFX6-NEXT: s_mov_b32 s1, s3
; GFX6-NEXT: s_mov_b32 s2, 0 ; GFX6-NEXT: s_mov_b32 s2, 0
; GFX6-NEXT: v_mov_b32_e32 v2, 0 ; GFX6-NEXT: v_mov_b32_e32 v2, 0
; GFX6-NEXT: s_mov_b32 s3, 0xf000 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: v_mov_b32_e32 v1, s5 ; GFX6-NEXT: v_mov_b32_e32 v1, s5
; GFX6-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 ; GFX6-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
; GFX6-NEXT: s_endpgm ; GFX6-NEXT: s_endpgm
; ;
; GFX7-LABEL: mubuf_store_sgpr_ptr_offset4294967297: ; GFX7-LABEL: mubuf_store_sgpr_ptr_offset4294967297:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s4, 4 ; GFX7-NEXT: s_mov_b32 s4, 4
; GFX7-NEXT: s_mov_b32 s5, s4 ; GFX7-NEXT: s_mov_b32 s5, s4
; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: s_mov_b32 s0, s2 ; GFX7-NEXT: s_mov_b32 s0, s2
; GFX7-NEXT: s_mov_b32 s1, s3 ; GFX7-NEXT: s_mov_b32 s1, s3
; GFX7-NEXT: s_mov_b32 s2, 0 ; GFX7-NEXT: s_mov_b32 s2, 0
; GFX7-NEXT: v_mov_b32_e32 v2, 0 ; GFX7-NEXT: v_mov_b32_e32 v2, 0
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 ; GFX7-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%gep = getelementptr i32, i32 addrspace(1)* %ptr, i64 4294967297 %gep = getelementptr i32, i32 addrspace(1)* %ptr, i64 4294967297
store i32 0, i32 addrspace(1)* %gep store i32 0, i32 addrspace(1)* %gep
ret void ret void
} }
▲ Show 20 Lines • Show All 126 Lines • ▼ Show 20 Lines
define amdgpu_ps void @mubuf_store_sgpr_ptr_sgpr_offset(i32 addrspace(1)* inreg %ptr, i32 inreg %soffset) { define amdgpu_ps void @mubuf_store_sgpr_ptr_sgpr_offset(i32 addrspace(1)* inreg %ptr, i32 inreg %soffset) {
; GFX6-LABEL: mubuf_store_sgpr_ptr_sgpr_offset: ; GFX6-LABEL: mubuf_store_sgpr_ptr_sgpr_offset:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_mov_b32 s0, s2 ; GFX6-NEXT: s_mov_b32 s0, s2
; GFX6-NEXT: s_mov_b32 s1, s3 ; GFX6-NEXT: s_mov_b32 s1, s3
; GFX6-NEXT: s_bfe_i64 s[2:3], s[4:5], 0x200000 ; GFX6-NEXT: s_bfe_i64 s[2:3], s[4:5], 0x200000
; GFX6-NEXT: s_lshl_b64 s[4:5], s[2:3], 2 ; GFX6-NEXT: s_lshl_b64 s[4:5], s[2:3], 2
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: s_mov_b32 s2, 0 ; GFX6-NEXT: s_mov_b32 s2, 0
; GFX6-NEXT: v_mov_b32_e32 v2, 0 ; GFX6-NEXT: v_mov_b32_e32 v2, 0
; GFX6-NEXT: s_mov_b32 s3, 0xf000 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: v_mov_b32_e32 v1, s5 ; GFX6-NEXT: v_mov_b32_e32 v1, s5
; GFX6-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 ; GFX6-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
; GFX6-NEXT: s_endpgm ; GFX6-NEXT: s_endpgm
; ;
; GFX7-LABEL: mubuf_store_sgpr_ptr_sgpr_offset: ; GFX7-LABEL: mubuf_store_sgpr_ptr_sgpr_offset:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s0, s2 ; GFX7-NEXT: s_mov_b32 s0, s2
; GFX7-NEXT: s_mov_b32 s1, s3 ; GFX7-NEXT: s_mov_b32 s1, s3
; GFX7-NEXT: s_bfe_i64 s[2:3], s[4:5], 0x200000 ; GFX7-NEXT: s_bfe_i64 s[2:3], s[4:5], 0x200000
; GFX7-NEXT: s_lshl_b64 s[4:5], s[2:3], 2 ; GFX7-NEXT: s_lshl_b64 s[4:5], s[2:3], 2
; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: s_mov_b32 s2, 0 ; GFX7-NEXT: s_mov_b32 s2, 0
; GFX7-NEXT: v_mov_b32_e32 v2, 0 ; GFX7-NEXT: v_mov_b32_e32 v2, 0
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64 ; GFX7-NEXT: buffer_store_dword v2, v[0:1], s[0:3], 0 addr64
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%gep = getelementptr i32, i32 addrspace(1)* %ptr, i32 %soffset %gep = getelementptr i32, i32 addrspace(1)* %ptr, i32 %soffset
store i32 0, i32 addrspace(1)* %gep store i32 0, i32 addrspace(1)* %gep
ret void ret void
} }
▲ Show 20 Lines • Show All 217 Lines • ▼ Show 20 Lines; GFX7-NEXT: ; return to shader part epilog
ret float %val ret float %val
} }
define amdgpu_ps float @mubuf_load_sgpr_ptr_offset4294967296(float addrspace(1)* inreg %ptr) { define amdgpu_ps float @mubuf_load_sgpr_ptr_offset4294967296(float addrspace(1)* inreg %ptr) {
; GFX6-LABEL: mubuf_load_sgpr_ptr_offset4294967296: ; GFX6-LABEL: mubuf_load_sgpr_ptr_offset4294967296:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_mov_b32 s4, 0 ; GFX6-NEXT: s_mov_b32 s4, 0
; GFX6-NEXT: s_mov_b32 s5, 4 ; GFX6-NEXT: s_mov_b32 s5, 4
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: s_mov_b32 s0, s2 ; GFX6-NEXT: s_mov_b32 s0, s2
; GFX6-NEXT: s_mov_b32 s1, s3 ; GFX6-NEXT: s_mov_b32 s1, s3
; GFX6-NEXT: s_mov_b32 s3, 0xf000 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
; GFX6-NEXT: s_mov_b32 s2, s4 ; GFX6-NEXT: s_mov_b32 s2, s4
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: v_mov_b32_e32 v1, s5 ; GFX6-NEXT: v_mov_b32_e32 v1, s5
; GFX6-NEXT: buffer_load_dword v0, v[0:1], s[0:3], 0 addr64 glc ; GFX6-NEXT: buffer_load_dword v0, v[0:1], s[0:3], 0 addr64 glc
; GFX6-NEXT: s_waitcnt vmcnt(0) ; GFX6-NEXT: s_waitcnt vmcnt(0)
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX7-LABEL: mubuf_load_sgpr_ptr_offset4294967296: ; GFX7-LABEL: mubuf_load_sgpr_ptr_offset4294967296:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s4, 0 ; GFX7-NEXT: s_mov_b32 s4, 0
; GFX7-NEXT: s_mov_b32 s5, 4 ; GFX7-NEXT: s_mov_b32 s5, 4
; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: s_mov_b32 s0, s2 ; GFX7-NEXT: s_mov_b32 s0, s2
; GFX7-NEXT: s_mov_b32 s1, s3 ; GFX7-NEXT: s_mov_b32 s1, s3
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, s4 ; GFX7-NEXT: s_mov_b32 s2, s4
; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[0:3], 0 addr64 glc ; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[0:3], 0 addr64 glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: ; return to shader part epilog ; GFX7-NEXT: ; return to shader part epilog
%gep = getelementptr float, float addrspace(1)* %ptr, i64 4294967296 %gep = getelementptr float, float addrspace(1)* %ptr, i64 4294967296
%val = load volatile float, float addrspace(1)* %gep %val = load volatile float, float addrspace(1)* %gep
ret float %val ret float %val
} }
define amdgpu_ps float @mubuf_load_sgpr_ptr_offset4294967297(float addrspace(1)* inreg %ptr) { define amdgpu_ps float @mubuf_load_sgpr_ptr_offset4294967297(float addrspace(1)* inreg %ptr) {
; GFX6-LABEL: mubuf_load_sgpr_ptr_offset4294967297: ; GFX6-LABEL: mubuf_load_sgpr_ptr_offset4294967297:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_mov_b32 s4, 4 ; GFX6-NEXT: s_mov_b32 s4, 4
; GFX6-NEXT: s_mov_b32 s5, s4 ; GFX6-NEXT: s_mov_b32 s5, s4
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: s_mov_b32 s0, s2 ; GFX6-NEXT: s_mov_b32 s0, s2
; GFX6-NEXT: s_mov_b32 s1, s3 ; GFX6-NEXT: s_mov_b32 s1, s3
; GFX6-NEXT: s_mov_b32 s2, 0 ; GFX6-NEXT: s_mov_b32 s2, 0
; GFX6-NEXT: s_mov_b32 s3, 0xf000 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: v_mov_b32_e32 v1, s5 ; GFX6-NEXT: v_mov_b32_e32 v1, s5
; GFX6-NEXT: buffer_load_dword v0, v[0:1], s[0:3], 0 addr64 glc ; GFX6-NEXT: buffer_load_dword v0, v[0:1], s[0:3], 0 addr64 glc
; GFX6-NEXT: s_waitcnt vmcnt(0) ; GFX6-NEXT: s_waitcnt vmcnt(0)
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX7-LABEL: mubuf_load_sgpr_ptr_offset4294967297: ; GFX7-LABEL: mubuf_load_sgpr_ptr_offset4294967297:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s4, 4 ; GFX7-NEXT: s_mov_b32 s4, 4
; GFX7-NEXT: s_mov_b32 s5, s4 ; GFX7-NEXT: s_mov_b32 s5, s4
; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: s_mov_b32 s0, s2 ; GFX7-NEXT: s_mov_b32 s0, s2
; GFX7-NEXT: s_mov_b32 s1, s3 ; GFX7-NEXT: s_mov_b32 s1, s3
; GFX7-NEXT: s_mov_b32 s2, 0 ; GFX7-NEXT: s_mov_b32 s2, 0
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[0:3], 0 addr64 glc ; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[0:3], 0 addr64 glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: ; return to shader part epilog ; GFX7-NEXT: ; return to shader part epilog
%gep = getelementptr float, float addrspace(1)* %ptr, i64 4294967297 %gep = getelementptr float, float addrspace(1)* %ptr, i64 4294967297
%val = load volatile float, float addrspace(1)* %gep %val = load volatile float, float addrspace(1)* %gep
ret float %val ret float %val
} }
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define amdgpu_ps float @mubuf_load_sgpr_ptr_sgpr_offset(float addrspace(1)* inreg %ptr, i32 inreg %soffset) { define amdgpu_ps float @mubuf_load_sgpr_ptr_sgpr_offset(float addrspace(1)* inreg %ptr, i32 inreg %soffset) {
; GFX6-LABEL: mubuf_load_sgpr_ptr_sgpr_offset: ; GFX6-LABEL: mubuf_load_sgpr_ptr_sgpr_offset:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_mov_b32 s0, s2 ; GFX6-NEXT: s_mov_b32 s0, s2
; GFX6-NEXT: s_mov_b32 s1, s3 ; GFX6-NEXT: s_mov_b32 s1, s3
; GFX6-NEXT: s_bfe_i64 s[2:3], s[4:5], 0x200000 ; GFX6-NEXT: s_bfe_i64 s[2:3], s[4:5], 0x200000
; GFX6-NEXT: s_lshl_b64 s[4:5], s[2:3], 2 ; GFX6-NEXT: s_lshl_b64 s[4:5], s[2:3], 2
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: s_mov_b32 s2, 0 ; GFX6-NEXT: s_mov_b32 s2, 0
; GFX6-NEXT: s_mov_b32 s3, 0xf000 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: v_mov_b32_e32 v1, s5 ; GFX6-NEXT: v_mov_b32_e32 v1, s5
; GFX6-NEXT: buffer_load_dword v0, v[0:1], s[0:3], 0 addr64 glc ; GFX6-NEXT: buffer_load_dword v0, v[0:1], s[0:3], 0 addr64 glc
; GFX6-NEXT: s_waitcnt vmcnt(0) ; GFX6-NEXT: s_waitcnt vmcnt(0)
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX7-LABEL: mubuf_load_sgpr_ptr_sgpr_offset: ; GFX7-LABEL: mubuf_load_sgpr_ptr_sgpr_offset:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s0, s2 ; GFX7-NEXT: s_mov_b32 s0, s2
; GFX7-NEXT: s_mov_b32 s1, s3 ; GFX7-NEXT: s_mov_b32 s1, s3
; GFX7-NEXT: s_bfe_i64 s[2:3], s[4:5], 0x200000 ; GFX7-NEXT: s_bfe_i64 s[2:3], s[4:5], 0x200000
; GFX7-NEXT: s_lshl_b64 s[4:5], s[2:3], 2 ; GFX7-NEXT: s_lshl_b64 s[4:5], s[2:3], 2
; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: s_mov_b32 s2, 0 ; GFX7-NEXT: s_mov_b32 s2, 0
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[0:3], 0 addr64 glc ; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[0:3], 0 addr64 glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: ; return to shader part epilog ; GFX7-NEXT: ; return to shader part epilog
%gep = getelementptr float, float addrspace(1)* %ptr, i32 %soffset %gep = getelementptr float, float addrspace(1)* %ptr, i32 %soffset
%val = load volatile float, float addrspace(1)* %gep %val = load volatile float, float addrspace(1)* %gep
ret float %val ret float %val
} }
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ret float %cast ret float %cast
} }
define amdgpu_ps float @mubuf_atomicrmw_sgpr_ptr_offset4294967296(i32 addrspace(1)* inreg %ptr) { define amdgpu_ps float @mubuf_atomicrmw_sgpr_ptr_offset4294967296(i32 addrspace(1)* inreg %ptr) {
; GFX6-LABEL: mubuf_atomicrmw_sgpr_ptr_offset4294967296: ; GFX6-LABEL: mubuf_atomicrmw_sgpr_ptr_offset4294967296:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_mov_b32 s4, 0 ; GFX6-NEXT: s_mov_b32 s4, 0
; GFX6-NEXT: s_mov_b32 s5, 4 ; GFX6-NEXT: s_mov_b32 s5, 4
; GFX6-NEXT: v_mov_b32_e32 v1, s4
; GFX6-NEXT: s_mov_b32 s0, s2 ; GFX6-NEXT: s_mov_b32 s0, s2
; GFX6-NEXT: s_mov_b32 s1, s3 ; GFX6-NEXT: s_mov_b32 s1, s3
; GFX6-NEXT: v_mov_b32_e32 v0, 2 ; GFX6-NEXT: v_mov_b32_e32 v0, 2
; GFX6-NEXT: s_mov_b32 s3, 0xf000 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
; GFX6-NEXT: s_mov_b32 s2, s4 ; GFX6-NEXT: s_mov_b32 s2, s4
; GFX6-NEXT: v_mov_b32_e32 v1, s4
; GFX6-NEXT: v_mov_b32_e32 v2, s5 ; GFX6-NEXT: v_mov_b32_e32 v2, s5
; GFX6-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX6-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX6-NEXT: buffer_atomic_add v0, v[1:2], s[0:3], 0 addr64 glc ; GFX6-NEXT: buffer_atomic_add v0, v[1:2], s[0:3], 0 addr64 glc
; GFX6-NEXT: s_waitcnt vmcnt(0) ; GFX6-NEXT: s_waitcnt vmcnt(0)
; GFX6-NEXT: buffer_wbinvl1 ; GFX6-NEXT: buffer_wbinvl1
; GFX6-NEXT: s_waitcnt expcnt(0) ; GFX6-NEXT: s_waitcnt expcnt(0)
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX7-LABEL: mubuf_atomicrmw_sgpr_ptr_offset4294967296: ; GFX7-LABEL: mubuf_atomicrmw_sgpr_ptr_offset4294967296:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s4, 0 ; GFX7-NEXT: s_mov_b32 s4, 0
; GFX7-NEXT: s_mov_b32 s5, 4 ; GFX7-NEXT: s_mov_b32 s5, 4
; GFX7-NEXT: v_mov_b32_e32 v1, s4
; GFX7-NEXT: s_mov_b32 s0, s2 ; GFX7-NEXT: s_mov_b32 s0, s2
; GFX7-NEXT: s_mov_b32 s1, s3 ; GFX7-NEXT: s_mov_b32 s1, s3
; GFX7-NEXT: v_mov_b32_e32 v0, 2 ; GFX7-NEXT: v_mov_b32_e32 v0, 2
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, s4 ; GFX7-NEXT: s_mov_b32 s2, s4
; GFX7-NEXT: v_mov_b32_e32 v1, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s5 ; GFX7-NEXT: v_mov_b32_e32 v2, s5
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_atomic_add v0, v[1:2], s[0:3], 0 addr64 glc ; GFX7-NEXT: buffer_atomic_add v0, v[1:2], s[0:3], 0 addr64 glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1 ; GFX7-NEXT: buffer_wbinvl1
; GFX7-NEXT: ; return to shader part epilog ; GFX7-NEXT: ; return to shader part epilog
%gep = getelementptr i32, i32 addrspace(1)* %ptr, i64 4294967296 %gep = getelementptr i32, i32 addrspace(1)* %ptr, i64 4294967296
%result = atomicrmw add i32 addrspace(1)* %gep, i32 2 seq_cst %result = atomicrmw add i32 addrspace(1)* %gep, i32 2 seq_cst
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ret float %cast ret float %cast
} }
define amdgpu_ps float @mubuf_cmpxchg_sgpr_ptr_offset4294967296(i32 addrspace(1)* inreg %ptr, i32 %old, i32 %in) { define amdgpu_ps float @mubuf_cmpxchg_sgpr_ptr_offset4294967296(i32 addrspace(1)* inreg %ptr, i32 %old, i32 %in) {
; GFX6-LABEL: mubuf_cmpxchg_sgpr_ptr_offset4294967296: ; GFX6-LABEL: mubuf_cmpxchg_sgpr_ptr_offset4294967296:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_mov_b32 s4, 0 ; GFX6-NEXT: s_mov_b32 s4, 0
; GFX6-NEXT: s_mov_b32 s5, 4 ; GFX6-NEXT: s_mov_b32 s5, 4
; GFX6-NEXT: v_mov_b32_e32 v3, s4
; GFX6-NEXT: s_mov_b32 s0, s2 ; GFX6-NEXT: s_mov_b32 s0, s2
; GFX6-NEXT: s_mov_b32 s1, s3 ; GFX6-NEXT: s_mov_b32 s1, s3
; GFX6-NEXT: v_mov_b32_e32 v2, v0 ; GFX6-NEXT: v_mov_b32_e32 v2, v0
; GFX6-NEXT: s_mov_b32 s3, 0xf000 ; GFX6-NEXT: s_mov_b32 s3, 0xf000
; GFX6-NEXT: s_mov_b32 s2, s4 ; GFX6-NEXT: s_mov_b32 s2, s4
; GFX6-NEXT: v_mov_b32_e32 v3, s4
; GFX6-NEXT: v_mov_b32_e32 v4, s5 ; GFX6-NEXT: v_mov_b32_e32 v4, s5
; GFX6-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX6-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX6-NEXT: buffer_atomic_cmpswap v[1:2], v[3:4], s[0:3], 0 addr64 glc ; GFX6-NEXT: buffer_atomic_cmpswap v[1:2], v[3:4], s[0:3], 0 addr64 glc
; GFX6-NEXT: s_waitcnt vmcnt(0) ; GFX6-NEXT: s_waitcnt vmcnt(0)
; GFX6-NEXT: buffer_wbinvl1 ; GFX6-NEXT: buffer_wbinvl1
; GFX6-NEXT: v_mov_b32_e32 v0, v1 ; GFX6-NEXT: v_mov_b32_e32 v0, v1
; GFX6-NEXT: s_waitcnt expcnt(0) ; GFX6-NEXT: s_waitcnt expcnt(0)
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX7-LABEL: mubuf_cmpxchg_sgpr_ptr_offset4294967296: ; GFX7-LABEL: mubuf_cmpxchg_sgpr_ptr_offset4294967296:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s4, 0 ; GFX7-NEXT: s_mov_b32 s4, 0
; GFX7-NEXT: s_mov_b32 s5, 4 ; GFX7-NEXT: s_mov_b32 s5, 4
; GFX7-NEXT: v_mov_b32_e32 v3, s4
; GFX7-NEXT: s_mov_b32 s0, s2 ; GFX7-NEXT: s_mov_b32 s0, s2
; GFX7-NEXT: s_mov_b32 s1, s3 ; GFX7-NEXT: s_mov_b32 s1, s3
; GFX7-NEXT: v_mov_b32_e32 v2, v0 ; GFX7-NEXT: v_mov_b32_e32 v2, v0
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: s_mov_b32 s2, s4 ; GFX7-NEXT: s_mov_b32 s2, s4
; GFX7-NEXT: v_mov_b32_e32 v3, s4
; GFX7-NEXT: v_mov_b32_e32 v4, s5 ; GFX7-NEXT: v_mov_b32_e32 v4, s5
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_atomic_cmpswap v[1:2], v[3:4], s[0:3], 0 addr64 glc ; GFX7-NEXT: buffer_atomic_cmpswap v[1:2], v[3:4], s[0:3], 0 addr64 glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1 ; GFX7-NEXT: buffer_wbinvl1
; GFX7-NEXT: v_mov_b32_e32 v0, v1 ; GFX7-NEXT: v_mov_b32_e32 v0, v1
; GFX7-NEXT: ; return to shader part epilog ; GFX7-NEXT: ; return to shader part epilog
%gep = getelementptr i32, i32 addrspace(1)* %ptr, i64 4294967296 %gep = getelementptr i32, i32 addrspace(1)* %ptr, i64 4294967296
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llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll

Show First 20 Lines • Show All 4,206 Lines • ▼ Show 20 Lines
define amdgpu_ps i64 @s_saddsat_i64(i64 inreg %lhs, i64 inreg %rhs) { define amdgpu_ps i64 @s_saddsat_i64(i64 inreg %lhs, i64 inreg %rhs) {
; GFX6-LABEL: s_saddsat_i64: ; GFX6-LABEL: s_saddsat_i64:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_add_u32 s4, s0, s2 ; GFX6-NEXT: s_add_u32 s4, s0, s2
; GFX6-NEXT: s_cselect_b32 s5, 1, 0 ; GFX6-NEXT: s_cselect_b32 s5, 1, 0
; GFX6-NEXT: s_and_b32 s5, s5, 1 ; GFX6-NEXT: s_and_b32 s5, s5, 1
; GFX6-NEXT: s_cmp_lg_u32 s5, 0 ; GFX6-NEXT: s_cmp_lg_u32 s5, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s0
; GFX6-NEXT: s_addc_u32 s5, s1, s3 ; GFX6-NEXT: s_addc_u32 s5, s1, s3
; GFX6-NEXT: v_mov_b32_e32 v0, s0
; GFX6-NEXT: v_mov_b32_e32 v1, s1 ; GFX6-NEXT: v_mov_b32_e32 v1, s1
; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1] ; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1]
; GFX6-NEXT: v_cmp_lt_i64_e64 s[0:1], s[2:3], 0 ; GFX6-NEXT: v_cmp_lt_i64_e64 s[0:1], s[2:3], 0
; GFX6-NEXT: s_ashr_i32 s2, s5, 31 ; GFX6-NEXT: s_ashr_i32 s2, s5, 31
; GFX6-NEXT: s_xor_b64 vcc, s[0:1], vcc ; GFX6-NEXT: s_xor_b64 vcc, s[0:1], vcc
; GFX6-NEXT: s_add_u32 s0, s2, 0 ; GFX6-NEXT: s_add_u32 s0, s2, 0
; GFX6-NEXT: s_cselect_b32 s1, 1, 0 ; GFX6-NEXT: s_cselect_b32 s1, 1, 0
; GFX6-NEXT: s_and_b32 s1, s1, 1 ; GFX6-NEXT: s_and_b32 s1, s1, 1
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; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_saddsat_i64: ; GFX8-LABEL: s_saddsat_i64:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_add_u32 s4, s0, s2 ; GFX8-NEXT: s_add_u32 s4, s0, s2
; GFX8-NEXT: s_cselect_b32 s5, 1, 0 ; GFX8-NEXT: s_cselect_b32 s5, 1, 0
; GFX8-NEXT: s_and_b32 s5, s5, 1 ; GFX8-NEXT: s_and_b32 s5, s5, 1
; GFX8-NEXT: s_cmp_lg_u32 s5, 0 ; GFX8-NEXT: s_cmp_lg_u32 s5, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: s_addc_u32 s5, s1, s3 ; GFX8-NEXT: s_addc_u32 s5, s1, s3
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1] ; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1]
; GFX8-NEXT: v_cmp_lt_i64_e64 s[0:1], s[2:3], 0 ; GFX8-NEXT: v_cmp_lt_i64_e64 s[0:1], s[2:3], 0
; GFX8-NEXT: s_ashr_i32 s2, s5, 31 ; GFX8-NEXT: s_ashr_i32 s2, s5, 31
; GFX8-NEXT: s_xor_b64 vcc, s[0:1], vcc ; GFX8-NEXT: s_xor_b64 vcc, s[0:1], vcc
; GFX8-NEXT: s_add_u32 s0, s2, 0 ; GFX8-NEXT: s_add_u32 s0, s2, 0
; GFX8-NEXT: s_cselect_b32 s1, 1, 0 ; GFX8-NEXT: s_cselect_b32 s1, 1, 0
; GFX8-NEXT: s_and_b32 s1, s1, 1 ; GFX8-NEXT: s_and_b32 s1, s1, 1
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; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX9-LABEL: s_saddsat_i64: ; GFX9-LABEL: s_saddsat_i64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_add_u32 s4, s0, s2 ; GFX9-NEXT: s_add_u32 s4, s0, s2
; GFX9-NEXT: s_cselect_b32 s5, 1, 0 ; GFX9-NEXT: s_cselect_b32 s5, 1, 0
; GFX9-NEXT: s_and_b32 s5, s5, 1 ; GFX9-NEXT: s_and_b32 s5, s5, 1
; GFX9-NEXT: s_cmp_lg_u32 s5, 0 ; GFX9-NEXT: s_cmp_lg_u32 s5, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: s_addc_u32 s5, s1, s3 ; GFX9-NEXT: s_addc_u32 s5, s1, s3
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1] ; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1]
; GFX9-NEXT: v_cmp_lt_i64_e64 s[0:1], s[2:3], 0 ; GFX9-NEXT: v_cmp_lt_i64_e64 s[0:1], s[2:3], 0
; GFX9-NEXT: s_ashr_i32 s2, s5, 31 ; GFX9-NEXT: s_ashr_i32 s2, s5, 31
; GFX9-NEXT: s_xor_b64 vcc, s[0:1], vcc ; GFX9-NEXT: s_xor_b64 vcc, s[0:1], vcc
; GFX9-NEXT: s_add_u32 s0, s2, 0 ; GFX9-NEXT: s_add_u32 s0, s2, 0
; GFX9-NEXT: s_cselect_b32 s1, 1, 0 ; GFX9-NEXT: s_cselect_b32 s1, 1, 0
; GFX9-NEXT: s_and_b32 s1, s1, 1 ; GFX9-NEXT: s_and_b32 s1, s1, 1
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define amdgpu_ps <2 x i64> @s_saddsat_v2i64(<2 x i64> inreg %lhs, <2 x i64> inreg %rhs) { define amdgpu_ps <2 x i64> @s_saddsat_v2i64(<2 x i64> inreg %lhs, <2 x i64> inreg %rhs) {
; GFX6-LABEL: s_saddsat_v2i64: ; GFX6-LABEL: s_saddsat_v2i64:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_add_u32 s8, s0, s4 ; GFX6-NEXT: s_add_u32 s8, s0, s4
; GFX6-NEXT: s_cselect_b32 s9, 1, 0 ; GFX6-NEXT: s_cselect_b32 s9, 1, 0
; GFX6-NEXT: s_and_b32 s9, s9, 1 ; GFX6-NEXT: s_and_b32 s9, s9, 1
; GFX6-NEXT: s_cmp_lg_u32 s9, 0 ; GFX6-NEXT: s_cmp_lg_u32 s9, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s0
; GFX6-NEXT: s_addc_u32 s9, s1, s5 ; GFX6-NEXT: s_addc_u32 s9, s1, s5
; GFX6-NEXT: v_mov_b32_e32 v0, s0
; GFX6-NEXT: v_mov_b32_e32 v1, s1 ; GFX6-NEXT: v_mov_b32_e32 v1, s1
; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1] ; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1]
; GFX6-NEXT: v_cmp_lt_i64_e64 s[0:1], s[4:5], 0 ; GFX6-NEXT: v_cmp_lt_i64_e64 s[0:1], s[4:5], 0
; GFX6-NEXT: s_ashr_i32 s4, s9, 31 ; GFX6-NEXT: s_ashr_i32 s4, s9, 31
; GFX6-NEXT: s_xor_b64 vcc, s[0:1], vcc ; GFX6-NEXT: s_xor_b64 vcc, s[0:1], vcc
; GFX6-NEXT: s_add_u32 s0, s4, 0 ; GFX6-NEXT: s_add_u32 s0, s4, 0
; GFX6-NEXT: s_cselect_b32 s1, 1, 0 ; GFX6-NEXT: s_cselect_b32 s1, 1, 0
; GFX6-NEXT: s_and_b32 s1, s1, 1 ; GFX6-NEXT: s_and_b32 s1, s1, 1
; GFX6-NEXT: s_brev_b32 s5, 1 ; GFX6-NEXT: s_brev_b32 s5, 1
; GFX6-NEXT: s_cmp_lg_u32 s1, 0 ; GFX6-NEXT: s_cmp_lg_u32 s1, 0
; GFX6-NEXT: s_addc_u32 s1, s4, s5 ; GFX6-NEXT: s_addc_u32 s1, s4, s5
; GFX6-NEXT: v_mov_b32_e32 v1, s0 ; GFX6-NEXT: v_mov_b32_e32 v1, s0
; GFX6-NEXT: s_add_u32 s0, s2, s6 ; GFX6-NEXT: s_add_u32 s0, s2, s6
; GFX6-NEXT: v_mov_b32_e32 v2, s1 ; GFX6-NEXT: v_mov_b32_e32 v2, s1
; GFX6-NEXT: s_cselect_b32 s1, 1, 0 ; GFX6-NEXT: s_cselect_b32 s1, 1, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s8
; GFX6-NEXT: s_and_b32 s1, s1, 1 ; GFX6-NEXT: s_and_b32 s1, s1, 1
; GFX6-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc ; GFX6-NEXT: v_mov_b32_e32 v0, s8
; GFX6-NEXT: s_cmp_lg_u32 s1, 0 ; GFX6-NEXT: s_cmp_lg_u32 s1, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: v_mov_b32_e32 v3, s9 ; GFX6-NEXT: v_mov_b32_e32 v3, s9
; GFX6-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc
; GFX6-NEXT: s_addc_u32 s1, s3, s7 ; GFX6-NEXT: s_addc_u32 s1, s3, s7
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: v_mov_b32_e32 v1, s3 ; GFX6-NEXT: v_mov_b32_e32 v1, s3
; GFX6-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc
; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1] ; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1]
; GFX6-NEXT: v_cmp_lt_i64_e64 s[2:3], s[6:7], 0 ; GFX6-NEXT: v_cmp_lt_i64_e64 s[2:3], s[6:7], 0
; GFX6-NEXT: s_ashr_i32 s4, s1, 31 ; GFX6-NEXT: s_ashr_i32 s4, s1, 31
; GFX6-NEXT: s_xor_b64 vcc, s[2:3], vcc ; GFX6-NEXT: s_xor_b64 vcc, s[2:3], vcc
; GFX6-NEXT: v_mov_b32_e32 v0, s0 ; GFX6-NEXT: v_mov_b32_e32 v0, s0
; GFX6-NEXT: s_add_u32 s0, s4, 0 ; GFX6-NEXT: s_add_u32 s0, s4, 0
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; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_saddsat_v2i64: ; GFX8-LABEL: s_saddsat_v2i64:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_add_u32 s8, s0, s4 ; GFX8-NEXT: s_add_u32 s8, s0, s4
; GFX8-NEXT: s_cselect_b32 s9, 1, 0 ; GFX8-NEXT: s_cselect_b32 s9, 1, 0
; GFX8-NEXT: s_and_b32 s9, s9, 1 ; GFX8-NEXT: s_and_b32 s9, s9, 1
; GFX8-NEXT: s_cmp_lg_u32 s9, 0 ; GFX8-NEXT: s_cmp_lg_u32 s9, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: s_addc_u32 s9, s1, s5 ; GFX8-NEXT: s_addc_u32 s9, s1, s5
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1] ; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1]
; GFX8-NEXT: v_cmp_lt_i64_e64 s[0:1], s[4:5], 0 ; GFX8-NEXT: v_cmp_lt_i64_e64 s[0:1], s[4:5], 0
; GFX8-NEXT: s_ashr_i32 s4, s9, 31 ; GFX8-NEXT: s_ashr_i32 s4, s9, 31
; GFX8-NEXT: s_xor_b64 vcc, s[0:1], vcc ; GFX8-NEXT: s_xor_b64 vcc, s[0:1], vcc
; GFX8-NEXT: s_add_u32 s0, s4, 0 ; GFX8-NEXT: s_add_u32 s0, s4, 0
; GFX8-NEXT: s_cselect_b32 s1, 1, 0 ; GFX8-NEXT: s_cselect_b32 s1, 1, 0
; GFX8-NEXT: s_and_b32 s1, s1, 1 ; GFX8-NEXT: s_and_b32 s1, s1, 1
; GFX8-NEXT: s_brev_b32 s5, 1 ; GFX8-NEXT: s_brev_b32 s5, 1
; GFX8-NEXT: s_cmp_lg_u32 s1, 0 ; GFX8-NEXT: s_cmp_lg_u32 s1, 0
; GFX8-NEXT: s_addc_u32 s1, s4, s5 ; GFX8-NEXT: s_addc_u32 s1, s4, s5
; GFX8-NEXT: v_mov_b32_e32 v1, s0 ; GFX8-NEXT: v_mov_b32_e32 v1, s0
; GFX8-NEXT: s_add_u32 s0, s2, s6 ; GFX8-NEXT: s_add_u32 s0, s2, s6
; GFX8-NEXT: v_mov_b32_e32 v2, s1 ; GFX8-NEXT: v_mov_b32_e32 v2, s1
; GFX8-NEXT: s_cselect_b32 s1, 1, 0 ; GFX8-NEXT: s_cselect_b32 s1, 1, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s8
; GFX8-NEXT: s_and_b32 s1, s1, 1 ; GFX8-NEXT: s_and_b32 s1, s1, 1
; GFX8-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc ; GFX8-NEXT: v_mov_b32_e32 v0, s8
; GFX8-NEXT: s_cmp_lg_u32 s1, 0 ; GFX8-NEXT: s_cmp_lg_u32 s1, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v3, s9 ; GFX8-NEXT: v_mov_b32_e32 v3, s9
; GFX8-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc
; GFX8-NEXT: s_addc_u32 s1, s3, s7 ; GFX8-NEXT: s_addc_u32 s1, s3, s7
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc
; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1] ; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1]
; GFX8-NEXT: v_cmp_lt_i64_e64 s[2:3], s[6:7], 0 ; GFX8-NEXT: v_cmp_lt_i64_e64 s[2:3], s[6:7], 0
; GFX8-NEXT: s_ashr_i32 s4, s1, 31 ; GFX8-NEXT: s_ashr_i32 s4, s1, 31
; GFX8-NEXT: s_xor_b64 vcc, s[2:3], vcc ; GFX8-NEXT: s_xor_b64 vcc, s[2:3], vcc
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: s_add_u32 s0, s4, 0 ; GFX8-NEXT: s_add_u32 s0, s4, 0
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; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX9-LABEL: s_saddsat_v2i64: ; GFX9-LABEL: s_saddsat_v2i64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_add_u32 s8, s0, s4 ; GFX9-NEXT: s_add_u32 s8, s0, s4
; GFX9-NEXT: s_cselect_b32 s9, 1, 0 ; GFX9-NEXT: s_cselect_b32 s9, 1, 0
; GFX9-NEXT: s_and_b32 s9, s9, 1 ; GFX9-NEXT: s_and_b32 s9, s9, 1
; GFX9-NEXT: s_cmp_lg_u32 s9, 0 ; GFX9-NEXT: s_cmp_lg_u32 s9, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: s_addc_u32 s9, s1, s5 ; GFX9-NEXT: s_addc_u32 s9, s1, s5
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1] ; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1]
; GFX9-NEXT: v_cmp_lt_i64_e64 s[0:1], s[4:5], 0 ; GFX9-NEXT: v_cmp_lt_i64_e64 s[0:1], s[4:5], 0
; GFX9-NEXT: s_ashr_i32 s4, s9, 31 ; GFX9-NEXT: s_ashr_i32 s4, s9, 31
; GFX9-NEXT: s_xor_b64 vcc, s[0:1], vcc ; GFX9-NEXT: s_xor_b64 vcc, s[0:1], vcc
; GFX9-NEXT: s_add_u32 s0, s4, 0 ; GFX9-NEXT: s_add_u32 s0, s4, 0
; GFX9-NEXT: s_cselect_b32 s1, 1, 0 ; GFX9-NEXT: s_cselect_b32 s1, 1, 0
; GFX9-NEXT: s_and_b32 s1, s1, 1 ; GFX9-NEXT: s_and_b32 s1, s1, 1
; GFX9-NEXT: s_brev_b32 s5, 1 ; GFX9-NEXT: s_brev_b32 s5, 1
; GFX9-NEXT: s_cmp_lg_u32 s1, 0 ; GFX9-NEXT: s_cmp_lg_u32 s1, 0
; GFX9-NEXT: s_addc_u32 s1, s4, s5 ; GFX9-NEXT: s_addc_u32 s1, s4, s5
; GFX9-NEXT: v_mov_b32_e32 v1, s0 ; GFX9-NEXT: v_mov_b32_e32 v1, s0
; GFX9-NEXT: s_add_u32 s0, s2, s6 ; GFX9-NEXT: s_add_u32 s0, s2, s6
; GFX9-NEXT: v_mov_b32_e32 v2, s1 ; GFX9-NEXT: v_mov_b32_e32 v2, s1
; GFX9-NEXT: s_cselect_b32 s1, 1, 0 ; GFX9-NEXT: s_cselect_b32 s1, 1, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s8
; GFX9-NEXT: s_and_b32 s1, s1, 1 ; GFX9-NEXT: s_and_b32 s1, s1, 1
; GFX9-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc ; GFX9-NEXT: v_mov_b32_e32 v0, s8
; GFX9-NEXT: s_cmp_lg_u32 s1, 0 ; GFX9-NEXT: s_cmp_lg_u32 s1, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_mov_b32_e32 v3, s9 ; GFX9-NEXT: v_mov_b32_e32 v3, s9
; GFX9-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc
; GFX9-NEXT: s_addc_u32 s1, s3, s7 ; GFX9-NEXT: s_addc_u32 s1, s3, s7
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_mov_b32_e32 v1, s3 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc
; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1] ; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1]
; GFX9-NEXT: v_cmp_lt_i64_e64 s[2:3], s[6:7], 0 ; GFX9-NEXT: v_cmp_lt_i64_e64 s[2:3], s[6:7], 0
; GFX9-NEXT: s_ashr_i32 s4, s1, 31 ; GFX9-NEXT: s_ashr_i32 s4, s1, 31
; GFX9-NEXT: s_xor_b64 vcc, s[2:3], vcc ; GFX9-NEXT: s_xor_b64 vcc, s[2:3], vcc
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: s_add_u32 s0, s4, 0 ; GFX9-NEXT: s_add_u32 s0, s4, 0
▲ Show 20 Lines • Show All 68 Lines • ▼ Show 20 Lines
; GFX6-NEXT: s_and_b32 s8, s8, 1 ; GFX6-NEXT: s_and_b32 s8, s8, 1
; GFX6-NEXT: s_cmp_lg_u32 s8, 0 ; GFX6-NEXT: s_cmp_lg_u32 s8, 0
; GFX6-NEXT: s_addc_u32 s5, s1, s5 ; GFX6-NEXT: s_addc_u32 s5, s1, s5
; GFX6-NEXT: s_cselect_b32 s8, 1, 0 ; GFX6-NEXT: s_cselect_b32 s8, 1, 0
; GFX6-NEXT: s_and_b32 s8, s8, 1 ; GFX6-NEXT: s_and_b32 s8, s8, 1
; GFX6-NEXT: s_cmp_lg_u32 s8, 0 ; GFX6-NEXT: s_cmp_lg_u32 s8, 0
; GFX6-NEXT: s_addc_u32 s8, s2, s6 ; GFX6-NEXT: s_addc_u32 s8, s2, s6
; GFX6-NEXT: s_cselect_b32 s9, 1, 0 ; GFX6-NEXT: s_cselect_b32 s9, 1, 0
; GFX6-NEXT: v_mov_b32_e32 v3, s1
; GFX6-NEXT: s_and_b32 s9, s9, 1 ; GFX6-NEXT: s_and_b32 s9, s9, 1
; GFX6-NEXT: v_mov_b32_e32 v3, s1
; GFX6-NEXT: v_mov_b32_e32 v2, s0 ; GFX6-NEXT: v_mov_b32_e32 v2, s0
; GFX6-NEXT: s_cmp_lg_u32 s9, 0 ; GFX6-NEXT: s_cmp_lg_u32 s9, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3]
; GFX6-NEXT: s_addc_u32 s9, s3, s7 ; GFX6-NEXT: s_addc_u32 s9, s3, s7
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: v_mov_b32_e32 v1, s3 ; GFX6-NEXT: v_mov_b32_e32 v1, s3
; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1] ; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1]
; GFX6-NEXT: v_cmp_lt_i64_e64 s[0:1], s[6:7], 0 ; GFX6-NEXT: v_cmp_lt_i64_e64 s[0:1], s[6:7], 0
; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc
; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[8:9], v[0:1] ; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[8:9], v[0:1]
; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[0:1] ; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[0:1]
; GFX6-NEXT: v_cmp_eq_u64_e64 s[0:1], s[6:7], 0 ; GFX6-NEXT: v_cmp_eq_u64_e64 s[0:1], s[6:7], 0
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; GFX8-NEXT: s_cmp_lg_u32 s8, 0 ; GFX8-NEXT: s_cmp_lg_u32 s8, 0
; GFX8-NEXT: s_addc_u32 s5, s1, s5 ; GFX8-NEXT: s_addc_u32 s5, s1, s5
; GFX8-NEXT: s_cselect_b32 s8, 1, 0 ; GFX8-NEXT: s_cselect_b32 s8, 1, 0
; GFX8-NEXT: s_and_b32 s8, s8, 1 ; GFX8-NEXT: s_and_b32 s8, s8, 1
; GFX8-NEXT: s_cmp_lg_u32 s8, 0 ; GFX8-NEXT: s_cmp_lg_u32 s8, 0
; GFX8-NEXT: s_addc_u32 s8, s2, s6 ; GFX8-NEXT: s_addc_u32 s8, s2, s6
; GFX8-NEXT: s_cselect_b32 s9, 1, 0 ; GFX8-NEXT: s_cselect_b32 s9, 1, 0
; GFX8-NEXT: s_and_b32 s9, s9, 1 ; GFX8-NEXT: s_and_b32 s9, s9, 1
; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: s_cmp_lg_u32 s9, 0 ; GFX8-NEXT: s_cmp_lg_u32 s9, 0
; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: s_addc_u32 s9, s3, s7 ; GFX8-NEXT: s_addc_u32 s9, s3, s7
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3]
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: s_cmp_eq_u64 s[8:9], s[2:3] ; GFX8-NEXT: s_cmp_eq_u64 s[8:9], s[2:3]
; GFX8-NEXT: s_cselect_b32 s2, 1, 0 ; GFX8-NEXT: s_cselect_b32 s2, 1, 0
; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1] ; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1]
; GFX8-NEXT: s_and_b32 s0, 1, s2 ; GFX8-NEXT: s_and_b32 s0, 1, s2
; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0 ; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; GFX9-NEXT: s_cmp_lg_u32 s8, 0 ; GFX9-NEXT: s_cmp_lg_u32 s8, 0
; GFX9-NEXT: s_addc_u32 s5, s1, s5 ; GFX9-NEXT: s_addc_u32 s5, s1, s5
; GFX9-NEXT: s_cselect_b32 s8, 1, 0 ; GFX9-NEXT: s_cselect_b32 s8, 1, 0
; GFX9-NEXT: s_and_b32 s8, s8, 1 ; GFX9-NEXT: s_and_b32 s8, s8, 1
; GFX9-NEXT: s_cmp_lg_u32 s8, 0 ; GFX9-NEXT: s_cmp_lg_u32 s8, 0
; GFX9-NEXT: s_addc_u32 s8, s2, s6 ; GFX9-NEXT: s_addc_u32 s8, s2, s6
; GFX9-NEXT: s_cselect_b32 s9, 1, 0 ; GFX9-NEXT: s_cselect_b32 s9, 1, 0
; GFX9-NEXT: s_and_b32 s9, s9, 1 ; GFX9-NEXT: s_and_b32 s9, s9, 1
; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: s_cmp_lg_u32 s9, 0 ; GFX9-NEXT: s_cmp_lg_u32 s9, 0
; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_mov_b32_e32 v2, s0 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
; GFX9-NEXT: s_addc_u32 s9, s3, s7 ; GFX9-NEXT: s_addc_u32 s9, s3, s7
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_mov_b32_e32 v1, s3 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: s_cmp_eq_u64 s[8:9], s[2:3] ; GFX9-NEXT: s_cmp_eq_u64 s[8:9], s[2:3]
; GFX9-NEXT: s_cselect_b32 s2, 1, 0 ; GFX9-NEXT: s_cselect_b32 s2, 1, 0
; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1] ; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1]
; GFX9-NEXT: s_and_b32 s0, 1, s2 ; GFX9-NEXT: s_and_b32 s0, 1, s2
; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0 ; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0
▲ Show 20 Lines • Show All 632 Lines • ▼ Show 20 Lines
; GFX6-NEXT: s_and_b32 s16, s16, 1 ; GFX6-NEXT: s_and_b32 s16, s16, 1
; GFX6-NEXT: s_cmp_lg_u32 s16, 0 ; GFX6-NEXT: s_cmp_lg_u32 s16, 0
; GFX6-NEXT: s_addc_u32 s9, s1, s9 ; GFX6-NEXT: s_addc_u32 s9, s1, s9
; GFX6-NEXT: s_cselect_b32 s16, 1, 0 ; GFX6-NEXT: s_cselect_b32 s16, 1, 0
; GFX6-NEXT: s_and_b32 s16, s16, 1 ; GFX6-NEXT: s_and_b32 s16, s16, 1
; GFX6-NEXT: s_cmp_lg_u32 s16, 0 ; GFX6-NEXT: s_cmp_lg_u32 s16, 0
; GFX6-NEXT: s_addc_u32 s16, s2, s10 ; GFX6-NEXT: s_addc_u32 s16, s2, s10
; GFX6-NEXT: s_cselect_b32 s17, 1, 0 ; GFX6-NEXT: s_cselect_b32 s17, 1, 0
; GFX6-NEXT: v_mov_b32_e32 v3, s1
; GFX6-NEXT: s_and_b32 s17, s17, 1 ; GFX6-NEXT: s_and_b32 s17, s17, 1
; GFX6-NEXT: v_mov_b32_e32 v3, s1
; GFX6-NEXT: v_mov_b32_e32 v2, s0 ; GFX6-NEXT: v_mov_b32_e32 v2, s0
; GFX6-NEXT: s_cmp_lg_u32 s17, 0 ; GFX6-NEXT: s_cmp_lg_u32 s17, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[2:3] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[2:3]
; GFX6-NEXT: s_addc_u32 s17, s3, s11 ; GFX6-NEXT: s_addc_u32 s17, s3, s11
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: v_mov_b32_e32 v1, s3 ; GFX6-NEXT: v_mov_b32_e32 v1, s3
; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[16:17], v[0:1] ; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[16:17], v[0:1]
; GFX6-NEXT: v_cmp_lt_i64_e64 s[0:1], s[10:11], 0 ; GFX6-NEXT: v_cmp_lt_i64_e64 s[0:1], s[10:11], 0
; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc
; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[16:17], v[0:1] ; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[16:17], v[0:1]
; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[0:1] ; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[0:1]
; GFX6-NEXT: v_cmp_eq_u64_e64 s[0:1], s[10:11], 0 ; GFX6-NEXT: v_cmp_eq_u64_e64 s[0:1], s[10:11], 0
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; GFX6-NEXT: s_and_b32 s1, s1, 1 ; GFX6-NEXT: s_and_b32 s1, s1, 1
; GFX6-NEXT: s_cmp_lg_u32 s1, 0 ; GFX6-NEXT: s_cmp_lg_u32 s1, 0
; GFX6-NEXT: v_and_b32_e32 v0, 1, v0 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v0
; GFX6-NEXT: s_addc_u32 s1, s5, s13 ; GFX6-NEXT: s_addc_u32 s1, s5, s13
; GFX6-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; GFX6-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX6-NEXT: v_mov_b32_e32 v0, s2 ; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: s_cselect_b32 s2, 1, 0 ; GFX6-NEXT: s_cselect_b32 s2, 1, 0
; GFX6-NEXT: s_and_b32 s2, s2, 1 ; GFX6-NEXT: s_and_b32 s2, s2, 1
; GFX6-NEXT: s_cmp_lg_u32 s2, 0
; GFX6-NEXT: v_mov_b32_e32 v3, s8 ; GFX6-NEXT: v_mov_b32_e32 v3, s8
; GFX6-NEXT: v_mov_b32_e32 v4, s9 ; GFX6-NEXT: v_mov_b32_e32 v4, s9
; GFX6-NEXT: s_cmp_lg_u32 s2, 0 ; GFX6-NEXT: s_addc_u32 s2, s6, s14
; GFX6-NEXT: v_cndmask_b32_e32 v5, v3, v1, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v5, v3, v1, vcc
; GFX6-NEXT: v_cndmask_b32_e32 v4, v4, v2, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v4, v4, v2, vcc
; GFX6-NEXT: v_mov_b32_e32 v1, s3 ; GFX6-NEXT: v_mov_b32_e32 v1, s3
; GFX6-NEXT: v_mov_b32_e32 v2, s16 ; GFX6-NEXT: v_mov_b32_e32 v2, s16
; GFX6-NEXT: v_mov_b32_e32 v3, s17 ; GFX6-NEXT: v_mov_b32_e32 v3, s17
; GFX6-NEXT: s_addc_u32 s2, s6, s14 ; GFX6-NEXT: s_cselect_b32 s3, 1, 0
; GFX6-NEXT: v_cndmask_b32_e32 v6, v2, v0, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v6, v2, v0, vcc
; GFX6-NEXT: v_cndmask_b32_e32 v7, v3, v1, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v7, v3, v1, vcc
; GFX6-NEXT: s_cselect_b32 s3, 1, 0
; GFX6-NEXT: v_mov_b32_e32 v2, s4
; GFX6-NEXT: s_and_b32 s3, s3, 1 ; GFX6-NEXT: s_and_b32 s3, s3, 1
; GFX6-NEXT: v_mov_b32_e32 v2, s4
; GFX6-NEXT: v_mov_b32_e32 v3, s5 ; GFX6-NEXT: v_mov_b32_e32 v3, s5
; GFX6-NEXT: s_cmp_lg_u32 s3, 0 ; GFX6-NEXT: s_cmp_lg_u32 s3, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s6
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX6-NEXT: s_addc_u32 s3, s7, s15 ; GFX6-NEXT: s_addc_u32 s3, s7, s15
; GFX6-NEXT: v_mov_b32_e32 v0, s6
; GFX6-NEXT: v_mov_b32_e32 v1, s7 ; GFX6-NEXT: v_mov_b32_e32 v1, s7
; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[0:1] ; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[0:1]
; GFX6-NEXT: v_cmp_lt_i64_e64 s[4:5], s[14:15], 0 ; GFX6-NEXT: v_cmp_lt_i64_e64 s[4:5], s[14:15], 0
; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc
; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[0:1] ; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[0:1]
; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[4:5] ; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[4:5]
; GFX6-NEXT: v_cmp_eq_u64_e64 s[4:5], s[14:15], 0 ; GFX6-NEXT: v_cmp_eq_u64_e64 s[4:5], s[14:15], 0
▲ Show 20 Lines • Show All 46 Lines • ▼ Show 20 Lines
; GFX8-NEXT: s_cmp_lg_u32 s16, 0 ; GFX8-NEXT: s_cmp_lg_u32 s16, 0
; GFX8-NEXT: s_addc_u32 s9, s1, s9 ; GFX8-NEXT: s_addc_u32 s9, s1, s9
; GFX8-NEXT: s_cselect_b32 s16, 1, 0 ; GFX8-NEXT: s_cselect_b32 s16, 1, 0
; GFX8-NEXT: s_and_b32 s16, s16, 1 ; GFX8-NEXT: s_and_b32 s16, s16, 1
; GFX8-NEXT: s_cmp_lg_u32 s16, 0 ; GFX8-NEXT: s_cmp_lg_u32 s16, 0
; GFX8-NEXT: s_addc_u32 s16, s2, s10 ; GFX8-NEXT: s_addc_u32 s16, s2, s10
; GFX8-NEXT: s_cselect_b32 s17, 1, 0 ; GFX8-NEXT: s_cselect_b32 s17, 1, 0
; GFX8-NEXT: s_and_b32 s17, s17, 1 ; GFX8-NEXT: s_and_b32 s17, s17, 1
; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: s_cmp_lg_u32 s17, 0 ; GFX8-NEXT: s_cmp_lg_u32 s17, 0
; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: s_addc_u32 s17, s3, s11 ; GFX8-NEXT: s_addc_u32 s17, s3, s11
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[2:3] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[2:3]
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: s_cmp_eq_u64 s[16:17], s[2:3] ; GFX8-NEXT: s_cmp_eq_u64 s[16:17], s[2:3]
; GFX8-NEXT: s_cselect_b32 s2, 1, 0 ; GFX8-NEXT: s_cselect_b32 s2, 1, 0
; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[16:17], v[0:1] ; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[16:17], v[0:1]
; GFX8-NEXT: s_and_b32 s0, 1, s2 ; GFX8-NEXT: s_and_b32 s0, 1, s2
; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0 ; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0
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; GFX8-NEXT: v_and_b32_e32 v0, 1, v0 ; GFX8-NEXT: v_and_b32_e32 v0, 1, v0
; GFX8-NEXT: s_addc_u32 s1, s5, s13 ; GFX8-NEXT: s_addc_u32 s1, s5, s13
; GFX8-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; GFX8-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: s_cselect_b32 s2, 1, 0 ; GFX8-NEXT: s_cselect_b32 s2, 1, 0
; GFX8-NEXT: s_and_b32 s2, s2, 1 ; GFX8-NEXT: s_and_b32 s2, s2, 1
; GFX8-NEXT: s_cmp_lg_u32 s2, 0 ; GFX8-NEXT: s_cmp_lg_u32 s2, 0
; GFX8-NEXT: v_mov_b32_e32 v3, s8 ; GFX8-NEXT: v_mov_b32_e32 v3, s8
; GFX8-NEXT: v_mov_b32_e32 v4, s9
; GFX8-NEXT: s_addc_u32 s2, s6, s14 ; GFX8-NEXT: s_addc_u32 s2, s6, s14
; GFX8-NEXT: v_mov_b32_e32 v4, s9
; GFX8-NEXT: v_cndmask_b32_e32 v5, v3, v1, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v5, v3, v1, vcc
; GFX8-NEXT: v_cndmask_b32_e32 v4, v4, v2, vcc
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: s_cselect_b32 s3, 1, 0
; GFX8-NEXT: v_cndmask_b32_e32 v4, v4, v2, vcc
; GFX8-NEXT: v_mov_b32_e32 v2, s16 ; GFX8-NEXT: v_mov_b32_e32 v2, s16
; GFX8-NEXT: v_mov_b32_e32 v3, s17 ; GFX8-NEXT: v_mov_b32_e32 v3, s17
; GFX8-NEXT: s_cselect_b32 s3, 1, 0 ; GFX8-NEXT: s_and_b32 s3, s3, 1
; GFX8-NEXT: v_cndmask_b32_e32 v6, v2, v0, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v6, v2, v0, vcc
; GFX8-NEXT: v_cndmask_b32_e32 v7, v3, v1, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v7, v3, v1, vcc
; GFX8-NEXT: s_and_b32 s3, s3, 1
; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: s_cmp_lg_u32 s3, 0 ; GFX8-NEXT: s_cmp_lg_u32 s3, 0
; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s5 ; GFX8-NEXT: v_mov_b32_e32 v3, s5
; GFX8-NEXT: s_addc_u32 s3, s7, s15 ; GFX8-NEXT: s_addc_u32 s3, s7, s15
; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: s_cmp_eq_u64 s[2:3], s[6:7] ; GFX8-NEXT: s_cmp_eq_u64 s[2:3], s[6:7]
; GFX8-NEXT: s_cselect_b32 s6, 1, 0 ; GFX8-NEXT: s_cselect_b32 s6, 1, 0
; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[0:1] ; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[0:1]
; GFX8-NEXT: s_and_b32 s4, 1, s6 ; GFX8-NEXT: s_and_b32 s4, 1, s6
; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4 ; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; GFX9-NEXT: s_cmp_lg_u32 s16, 0 ; GFX9-NEXT: s_cmp_lg_u32 s16, 0
; GFX9-NEXT: s_addc_u32 s9, s1, s9 ; GFX9-NEXT: s_addc_u32 s9, s1, s9
; GFX9-NEXT: s_cselect_b32 s16, 1, 0 ; GFX9-NEXT: s_cselect_b32 s16, 1, 0
; GFX9-NEXT: s_and_b32 s16, s16, 1 ; GFX9-NEXT: s_and_b32 s16, s16, 1
; GFX9-NEXT: s_cmp_lg_u32 s16, 0 ; GFX9-NEXT: s_cmp_lg_u32 s16, 0
; GFX9-NEXT: s_addc_u32 s16, s2, s10 ; GFX9-NEXT: s_addc_u32 s16, s2, s10
; GFX9-NEXT: s_cselect_b32 s17, 1, 0 ; GFX9-NEXT: s_cselect_b32 s17, 1, 0
; GFX9-NEXT: s_and_b32 s17, s17, 1 ; GFX9-NEXT: s_and_b32 s17, s17, 1
; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: s_cmp_lg_u32 s17, 0 ; GFX9-NEXT: s_cmp_lg_u32 s17, 0
; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_mov_b32_e32 v2, s0 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
; GFX9-NEXT: s_addc_u32 s17, s3, s11 ; GFX9-NEXT: s_addc_u32 s17, s3, s11
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[2:3] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_mov_b32_e32 v1, s3 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: s_cmp_eq_u64 s[16:17], s[2:3] ; GFX9-NEXT: s_cmp_eq_u64 s[16:17], s[2:3]
; GFX9-NEXT: s_cselect_b32 s2, 1, 0 ; GFX9-NEXT: s_cselect_b32 s2, 1, 0
; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[16:17], v[0:1] ; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[16:17], v[0:1]
; GFX9-NEXT: s_and_b32 s0, 1, s2 ; GFX9-NEXT: s_and_b32 s0, 1, s2
; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0 ; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0
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; GFX9-NEXT: v_and_b32_e32 v0, 1, v0 ; GFX9-NEXT: v_and_b32_e32 v0, 1, v0
; GFX9-NEXT: s_addc_u32 s1, s5, s13 ; GFX9-NEXT: s_addc_u32 s1, s5, s13
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX9-NEXT: v_mov_b32_e32 v0, s2 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: s_cselect_b32 s2, 1, 0 ; GFX9-NEXT: s_cselect_b32 s2, 1, 0
; GFX9-NEXT: s_and_b32 s2, s2, 1 ; GFX9-NEXT: s_and_b32 s2, s2, 1
; GFX9-NEXT: s_cmp_lg_u32 s2, 0 ; GFX9-NEXT: s_cmp_lg_u32 s2, 0
; GFX9-NEXT: v_mov_b32_e32 v3, s8 ; GFX9-NEXT: v_mov_b32_e32 v3, s8
; GFX9-NEXT: v_mov_b32_e32 v4, s9
; GFX9-NEXT: s_addc_u32 s2, s6, s14 ; GFX9-NEXT: s_addc_u32 s2, s6, s14
; GFX9-NEXT: v_mov_b32_e32 v4, s9
; GFX9-NEXT: v_cndmask_b32_e32 v5, v3, v1, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v5, v3, v1, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v4, v4, v2, vcc
; GFX9-NEXT: v_mov_b32_e32 v1, s3 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: s_cselect_b32 s3, 1, 0
; GFX9-NEXT: v_cndmask_b32_e32 v4, v4, v2, vcc
; GFX9-NEXT: v_mov_b32_e32 v2, s16 ; GFX9-NEXT: v_mov_b32_e32 v2, s16
; GFX9-NEXT: v_mov_b32_e32 v3, s17 ; GFX9-NEXT: v_mov_b32_e32 v3, s17
; GFX9-NEXT: s_cselect_b32 s3, 1, 0 ; GFX9-NEXT: s_and_b32 s3, s3, 1
; GFX9-NEXT: v_cndmask_b32_e32 v6, v2, v0, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v6, v2, v0, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v7, v3, v1, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v7, v3, v1, vcc
; GFX9-NEXT: s_and_b32 s3, s3, 1
; GFX9-NEXT: v_mov_b32_e32 v2, s4
; GFX9-NEXT: s_cmp_lg_u32 s3, 0 ; GFX9-NEXT: s_cmp_lg_u32 s3, 0
; GFX9-NEXT: v_mov_b32_e32 v2, s4
; GFX9-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-NEXT: v_mov_b32_e32 v3, s5
; GFX9-NEXT: s_addc_u32 s3, s7, s15 ; GFX9-NEXT: s_addc_u32 s3, s7, s15
; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: s_cmp_eq_u64 s[2:3], s[6:7] ; GFX9-NEXT: s_cmp_eq_u64 s[2:3], s[6:7]
; GFX9-NEXT: s_cselect_b32 s6, 1, 0 ; GFX9-NEXT: s_cselect_b32 s6, 1, 0
; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[0:1] ; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[0:1]
; GFX9-NEXT: s_and_b32 s4, 1, s6 ; GFX9-NEXT: s_and_b32 s4, 1, s6
; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4 ; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4
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llvm/test/CodeGen/AMDGPU/GlobalISel/sdivrem.ll

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; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2 ; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2
; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3
; GFX8-NEXT: v_xor_b32_e32 v2, s4, v2
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_xor_b32_e32 v2, s4, v2
; GFX8-NEXT: v_subrev_u32_e32 v2, vcc, s4, v2 ; GFX8-NEXT: v_subrev_u32_e32 v2, vcc, s4, v2
; GFX8-NEXT: v_xor_b32_e32 v3, s8, v3 ; GFX8-NEXT: v_xor_b32_e32 v3, s8, v3
; GFX8-NEXT: v_subrev_u32_e32 v3, vcc, s8, v3
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_subrev_u32_e32 v3, vcc, s8, v3
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: flat_store_dword v[0:1], v3 ; GFX8-NEXT: flat_store_dword v[0:1], v3
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: sdivrem_i32: ; GFX9-LABEL: sdivrem_i32:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x10 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x10
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
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; GFX8-NEXT: s_ashr_i32 s10, s2, 31 ; GFX8-NEXT: s_ashr_i32 s10, s2, 31
; GFX8-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 ; GFX8-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
; GFX8-NEXT: v_cvt_u32_f32_e32 v0, v0 ; GFX8-NEXT: v_cvt_u32_f32_e32 v0, v0
; GFX8-NEXT: s_add_i32 s0, s2, s10 ; GFX8-NEXT: s_add_i32 s0, s2, s10
; GFX8-NEXT: s_xor_b32 s0, s0, s10 ; GFX8-NEXT: s_xor_b32 s0, s0, s10
; GFX8-NEXT: v_rcp_iflag_f32_e32 v2, v2 ; GFX8-NEXT: v_rcp_iflag_f32_e32 v2, v2
; GFX8-NEXT: v_mul_lo_u32 v1, s1, v0 ; GFX8-NEXT: v_mul_lo_u32 v1, s1, v0
; GFX8-NEXT: s_ashr_i32 s2, s3, 31 ; GFX8-NEXT: s_ashr_i32 s2, s3, 31
; GFX8-NEXT: v_mov_b32_e32 v5, s5
; GFX8-NEXT: v_mul_hi_u32 v1, v0, v1 ; GFX8-NEXT: v_mul_hi_u32 v1, v0, v1
; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v1 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, v0, v1
; GFX8-NEXT: v_mul_hi_u32 v0, s0, v0 ; GFX8-NEXT: v_mul_hi_u32 v0, s0, v0
; GFX8-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v2 ; GFX8-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v2
; GFX8-NEXT: v_cvt_u32_f32_e32 v1, v1 ; GFX8-NEXT: v_cvt_u32_f32_e32 v1, v1
; GFX8-NEXT: v_mul_lo_u32 v2, v0, s9 ; GFX8-NEXT: v_mul_lo_u32 v2, v0, s9
; GFX8-NEXT: v_add_u32_e32 v3, vcc, 1, v0 ; GFX8-NEXT: v_add_u32_e32 v3, vcc, 1, v0
; GFX8-NEXT: v_sub_u32_e32 v2, vcc, s0, v2 ; GFX8-NEXT: v_sub_u32_e32 v2, vcc, s0, v2
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; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v1 ; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v1
; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s12, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s12, v3
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s12, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s12, v3
; GFX8-NEXT: s_xor_b32 s0, s2, s11 ; GFX8-NEXT: s_xor_b32 s0, s2, s11
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_xor_b32_e32 v1, s0, v1 ; GFX8-NEXT: v_xor_b32_e32 v1, s0, v1
; GFX8-NEXT: v_mov_b32_e32 v4, s4
; GFX8-NEXT: v_subrev_u32_e32 v1, vcc, s0, v1 ; GFX8-NEXT: v_subrev_u32_e32 v1, vcc, s0, v1
; GFX8-NEXT: v_mov_b32_e32 v5, s5
; GFX8-NEXT: v_xor_b32_e32 v3, s2, v3 ; GFX8-NEXT: v_xor_b32_e32 v3, s2, v3
; GFX8-NEXT: v_mov_b32_e32 v4, s4
; GFX8-NEXT: v_subrev_u32_e32 v3, vcc, s2, v3
; GFX8-NEXT: flat_store_dwordx2 v[4:5], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[4:5], v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v0, s6 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_subrev_u32_e32 v3, vcc, s2, v3
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: sdivrem_v2i32: ; GFX9-LABEL: sdivrem_v2i32:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x18 ; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x18
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
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define amdgpu_kernel void @sdivrem_v4i32(<4 x i32> addrspace(1)* %out0, <4 x i32> addrspace(1)* %out1, <4 x i32> %x, <4 x i32> %y) { define amdgpu_kernel void @sdivrem_v4i32(<4 x i32> addrspace(1)* %out0, <4 x i32> addrspace(1)* %out1, <4 x i32> %x, <4 x i32> %y) {
; GFX8-LABEL: sdivrem_v4i32: ; GFX8-LABEL: sdivrem_v4i32:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x20 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x20
; GFX8-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x0 ; GFX8-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x0
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x10 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x10
; GFX8-NEXT: v_mov_b32_e32 v3, 0x4f7ffffe ; GFX8-NEXT: v_mov_b32_e32 v3, 0x4f7ffffe
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v9, s9
; GFX8-NEXT: s_ashr_i32 s12, s0, 31 ; GFX8-NEXT: s_ashr_i32 s12, s0, 31
; GFX8-NEXT: s_add_i32 s0, s0, s12 ; GFX8-NEXT: s_add_i32 s0, s0, s12
; GFX8-NEXT: s_xor_b32 s13, s0, s12 ; GFX8-NEXT: s_xor_b32 s13, s0, s12
; GFX8-NEXT: v_cvt_f32_u32_e32 v0, s13 ; GFX8-NEXT: v_cvt_f32_u32_e32 v0, s13
; GFX8-NEXT: s_ashr_i32 s15, s1, 31 ; GFX8-NEXT: s_ashr_i32 s15, s1, 31
; GFX8-NEXT: s_add_i32 s0, s1, s15 ; GFX8-NEXT: s_add_i32 s0, s1, s15
; GFX8-NEXT: s_sub_i32 s1, 0, s13 ; GFX8-NEXT: s_sub_i32 s1, 0, s13
; GFX8-NEXT: v_rcp_iflag_f32_e32 v0, v0 ; GFX8-NEXT: v_rcp_iflag_f32_e32 v0, v0
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; GFX8-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc
; GFX8-NEXT: v_add_u32_e32 v8, vcc, 1, v3 ; GFX8-NEXT: v_add_u32_e32 v8, vcc, 1, v3
; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s3, v7 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s3, v7
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v8, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v8, vcc
; GFX8-NEXT: v_subrev_u32_e64 v8, s[0:1], s3, v7 ; GFX8-NEXT: v_subrev_u32_e64 v8, s[0:1], s3, v7
; GFX8-NEXT: s_xor_b32 s0, s2, s4 ; GFX8-NEXT: s_xor_b32 s0, s2, s4
; GFX8-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v7, v7, v8, vcc
; GFX8-NEXT: v_xor_b32_e32 v3, s0, v3 ; GFX8-NEXT: v_xor_b32_e32 v3, s0, v3
; GFX8-NEXT: v_mov_b32_e32 v8, s8
; GFX8-NEXT: v_subrev_u32_e32 v3, vcc, s0, v3 ; GFX8-NEXT: v_subrev_u32_e32 v3, vcc, s0, v3
; GFX8-NEXT: v_mov_b32_e32 v9, s9
; GFX8-NEXT: v_xor_b32_e32 v7, s2, v7 ; GFX8-NEXT: v_xor_b32_e32 v7, s2, v7
; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; GFX8-NEXT: v_mov_b32_e32 v8, s8
; GFX8-NEXT: v_subrev_u32_e32 v7, vcc, s2, v7 ; GFX8-NEXT: v_subrev_u32_e32 v7, vcc, s2, v7
; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; GFX8-NEXT: s_nop 0
; GFX8-NEXT: v_mov_b32_e32 v0, s10 ; GFX8-NEXT: v_mov_b32_e32 v0, s10
; GFX8-NEXT: v_mov_b32_e32 v1, s11 ; GFX8-NEXT: v_mov_b32_e32 v1, s11
; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[4:7] ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: sdivrem_v4i32: ; GFX9-LABEL: sdivrem_v4i32:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx4 s[12:15], s[4:5], 0x20 ; GFX9-NEXT: s_load_dwordx4 s[12:15], s[4:5], 0x20
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; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2 ; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2
; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3
; GFX8-NEXT: v_xor_b32_e32 v2, s4, v2
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_xor_b32_e32 v2, s4, v2
; GFX8-NEXT: v_subrev_u32_e32 v2, vcc, s4, v2 ; GFX8-NEXT: v_subrev_u32_e32 v2, vcc, s4, v2
; GFX8-NEXT: v_xor_b32_e32 v3, s8, v3 ; GFX8-NEXT: v_xor_b32_e32 v3, s8, v3
; GFX8-NEXT: v_subrev_u32_e32 v3, vcc, s8, v3
; GFX8-NEXT: flat_store_byte v[0:1], v2 ; GFX8-NEXT: flat_store_byte v[0:1], v2
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_subrev_u32_e32 v3, vcc, s8, v3
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: flat_store_byte v[0:1], v3 ; GFX8-NEXT: flat_store_byte v[0:1], v3
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: sdiv_i8: ; GFX9-LABEL: sdiv_i8:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dword s0, s[4:5], 0x10 ; GFX9-NEXT: s_load_dword s0, s[4:5], 0x10
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
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; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s11, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s11, v3
; GFX8-NEXT: s_xor_b32 s0, s2, s10 ; GFX8-NEXT: s_xor_b32 s0, s2, s10
; GFX8-NEXT: v_xor_b32_e32 v1, s0, v1 ; GFX8-NEXT: v_xor_b32_e32 v1, s0, v1
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_subrev_u32_e32 v1, vcc, s0, v1 ; GFX8-NEXT: v_subrev_u32_e32 v1, vcc, s0, v1
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_and_b32_e32 v1, s0, v1 ; GFX8-NEXT: v_and_b32_e32 v1, s0, v1
; GFX8-NEXT: v_lshlrev_b16_e32 v1, 8, v1
; GFX8-NEXT: v_xor_b32_e32 v3, s2, v3 ; GFX8-NEXT: v_xor_b32_e32 v3, s2, v3
; GFX8-NEXT: v_lshlrev_b16_e32 v1, 8, v1
; GFX8-NEXT: v_subrev_u32_e32 v3, vcc, s2, v3
; GFX8-NEXT: v_or_b32_sdwa v4, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_subrev_u32_e32 v3, vcc, s2, v3
; GFX8-NEXT: v_mov_b32_e32 v1, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: flat_store_short v[0:1], v4 ; GFX8-NEXT: flat_store_short v[0:1], v4
; GFX8-NEXT: v_and_b32_e32 v0, s0, v3 ; GFX8-NEXT: v_and_b32_e32 v0, s0, v3
; GFX8-NEXT: v_lshlrev_b16_e32 v0, 8, v0 ; GFX8-NEXT: v_lshlrev_b16_e32 v0, 8, v0
; GFX8-NEXT: v_or_b32_sdwa v2, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v2, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_mov_b32_e32 v0, s6 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: flat_store_short v[0:1], v2 ; GFX8-NEXT: flat_store_short v[0:1], v2
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; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2 ; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2
; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3
; GFX8-NEXT: v_xor_b32_e32 v2, s4, v2
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_xor_b32_e32 v2, s4, v2
; GFX8-NEXT: v_subrev_u32_e32 v2, vcc, s4, v2 ; GFX8-NEXT: v_subrev_u32_e32 v2, vcc, s4, v2
; GFX8-NEXT: v_xor_b32_e32 v3, s8, v3 ; GFX8-NEXT: v_xor_b32_e32 v3, s8, v3
; GFX8-NEXT: v_subrev_u32_e32 v3, vcc, s8, v3
; GFX8-NEXT: flat_store_short v[0:1], v2 ; GFX8-NEXT: flat_store_short v[0:1], v2
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_subrev_u32_e32 v3, vcc, s8, v3
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: flat_store_short v[0:1], v3 ; GFX8-NEXT: flat_store_short v[0:1], v3
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: sdiv_i16: ; GFX9-LABEL: sdiv_i16:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dword s0, s[4:5], 0x10 ; GFX9-NEXT: s_load_dword s0, s[4:5], 0x10
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
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; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2 ; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2
; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3
; GFX8-NEXT: v_xor_b32_e32 v2, s4, v2
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_xor_b32_e32 v2, s4, v2
; GFX8-NEXT: v_subrev_u32_e32 v2, vcc, s4, v2 ; GFX8-NEXT: v_subrev_u32_e32 v2, vcc, s4, v2
; GFX8-NEXT: v_xor_b32_e32 v3, s8, v3 ; GFX8-NEXT: v_xor_b32_e32 v3, s8, v3
; GFX8-NEXT: v_and_b32_e32 v2, 7, v2
; GFX8-NEXT: v_subrev_u32_e32 v3, vcc, s8, v3 ; GFX8-NEXT: v_subrev_u32_e32 v3, vcc, s8, v3
; GFX8-NEXT: v_and_b32_e32 v2, 7, v2
; GFX8-NEXT: flat_store_byte v[0:1], v2 ; GFX8-NEXT: flat_store_byte v[0:1], v2
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_and_b32_e32 v2, 7, v3 ; GFX8-NEXT: v_and_b32_e32 v2, 7, v3
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: flat_store_byte v[0:1], v2 ; GFX8-NEXT: flat_store_byte v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: sdivrem_i3: ; GFX9-LABEL: sdivrem_i3:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dword s0, s[4:5], 0x10 ; GFX9-NEXT: s_load_dword s0, s[4:5], 0x10
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
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; GFX8-NEXT: v_xor_b32_e32 v0, s2, v0 ; GFX8-NEXT: v_xor_b32_e32 v0, s2, v0
; GFX8-NEXT: v_subrev_u32_e32 v0, vcc, s2, v0 ; GFX8-NEXT: v_subrev_u32_e32 v0, vcc, s2, v0
; GFX8-NEXT: v_xor_b32_e32 v1, s8, v1 ; GFX8-NEXT: v_xor_b32_e32 v1, s8, v1
; GFX8-NEXT: v_subrev_u32_e32 v2, vcc, s8, v1 ; GFX8-NEXT: v_subrev_u32_e32 v2, vcc, s8, v1
; GFX8-NEXT: v_and_b32_e32 v3, s9, v0 ; GFX8-NEXT: v_and_b32_e32 v3, s9, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v1, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: flat_store_dword v[0:1], v3 ; GFX8-NEXT: flat_store_dword v[0:1], v3
; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_and_b32_e32 v2, s9, v2 ; GFX8-NEXT: v_and_b32_e32 v2, s9, v2
; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: sdivrem_i27: ; GFX9-LABEL: sdivrem_i27:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x10 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x10
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
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llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll

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; GFX8-LABEL: mulu24_shl64: ; GFX8-LABEL: mulu24_shl64:
; GFX8: ; %bb.0: ; %bb ; GFX8: ; %bb.0: ; %bb
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GFX8-NEXT: v_and_b32_e32 v0, 6, v0 ; GFX8-NEXT: v_and_b32_e32 v0, 6, v0
; GFX8-NEXT: v_mul_u32_u24_e32 v0, 7, v0 ; GFX8-NEXT: v_mul_u32_u24_e32 v0, 7, v0
; GFX8-NEXT: v_mov_b32_e32 v1, 0 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: v_lshlrev_b64 v[2:3], 2, v[0:1] ; GFX8-NEXT: v_lshlrev_b64 v[2:3], 2, v[0:1]
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v5, s1
; GFX8-NEXT: v_mov_b32_e32 v4, s0 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
; GFX8-NEXT: v_mov_b32_e32 v5, s1
; GFX8-NEXT: v_add_u32_e32 v2, vcc, v4, v2 ; GFX8-NEXT: v_add_u32_e32 v2, vcc, v4, v2
; GFX8-NEXT: v_addc_u32_e32 v3, vcc, v5, v3, vcc ; GFX8-NEXT: v_addc_u32_e32 v3, vcc, v5, v3, vcc
; GFX8-NEXT: flat_store_dword v[2:3], v1 ; GFX8-NEXT: flat_store_dword v[2:3], v1
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: mulu24_shl64: ; GFX9-LABEL: mulu24_shl64:
; GFX9: ; %bb.0: ; %bb ; GFX9: ; %bb.0: ; %bb
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GFX9-NEXT: v_and_b32_e32 v0, 6, v0 ; GFX9-NEXT: v_and_b32_e32 v0, 6, v0
; GFX9-NEXT: v_mul_u32_u24_e32 v0, 7, v0 ; GFX9-NEXT: v_mul_u32_u24_e32 v0, 7, v0
; GFX9-NEXT: v_mov_b32_e32 v1, 0 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: v_lshlrev_b64 v[2:3], 2, v[0:1] ; GFX9-NEXT: v_lshlrev_b64 v[2:3], 2, v[0:1]
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v5, s1
; GFX9-NEXT: v_mov_b32_e32 v4, s0 ; GFX9-NEXT: v_mov_b32_e32 v4, s0
; GFX9-NEXT: v_mov_b32_e32 v5, s1
; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v4, v2 ; GFX9-NEXT: v_add_co_u32_e32 v2, vcc, v4, v2
; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, v5, v3, vcc ; GFX9-NEXT: v_addc_co_u32_e32 v3, vcc, v5, v3, vcc
; GFX9-NEXT: global_store_dword v[2:3], v1, off ; GFX9-NEXT: global_store_dword v[2:3], v1, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: mulu24_shl64: ; GFX10-LABEL: mulu24_shl64:
; GFX10: ; %bb.0: ; %bb ; GFX10: ; %bb.0: ; %bb
; GFX10-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GFX10-NEXT: v_and_b32_e32 v0, 6, v0 ; GFX10-NEXT: v_and_b32_e32 v0, 6, v0
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_mul_u32_u24_e32 v0, 7, v0 ; GFX10-NEXT: v_mul_u32_u24_e32 v0, 7, v0
; GFX10-NEXT: v_lshlrev_b64 v[2:3], 2, v[0:1] ; GFX10-NEXT: v_lshlrev_b64 v[2:3], 2, v[0:1]
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v5, s1
; GFX10-NEXT: v_mov_b32_e32 v4, s0 ; GFX10-NEXT: v_mov_b32_e32 v4, s0
; GFX10-NEXT: v_mov_b32_e32 v5, s1
; GFX10-NEXT: v_add_co_u32 v2, vcc_lo, v4, v2 ; GFX10-NEXT: v_add_co_u32 v2, vcc_lo, v4, v2
; GFX10-NEXT: v_add_co_ci_u32_e32 v3, vcc_lo, v5, v3, vcc_lo ; GFX10-NEXT: v_add_co_ci_u32_e32 v3, vcc_lo, v5, v3, vcc_lo
; GFX10-NEXT: global_store_dword v[2:3], v1, off ; GFX10-NEXT: global_store_dword v[2:3], v1, off
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
bb: bb:
%tmp = tail call i32 @llvm.amdgcn.workitem.id.x() %tmp = tail call i32 @llvm.amdgcn.workitem.id.x()
%tmp1 = and i32 %tmp, 6 %tmp1 = and i32 %tmp, 6
%mulconv = mul nuw nsw i32 %tmp1, 7 %mulconv = mul nuw nsw i32 %tmp1, 7
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; GFX7-NEXT: v_lshlrev_b32_e32 v1, 2, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 2, v0
; GFX7-NEXT: v_mov_b32_e32 v2, 0 ; GFX7-NEXT: v_mov_b32_e32 v2, 0
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_mov_b64 s[4:5], s[2:3] ; GFX7-NEXT: s_mov_b64 s[4:5], s[2:3]
; GFX7-NEXT: buffer_load_dword v1, v[1:2], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dword v1, v[1:2], s[4:7], 0 addr64
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 3, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v5, 3, v0
; GFX7-NEXT: v_mov_b32_e32 v4, s1
; GFX7-NEXT: v_mov_b32_e32 v3, s0 ; GFX7-NEXT: v_mov_b32_e32 v3, s0
; GFX7-NEXT: v_mov_b32_e32 v4, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_or_b32_e32 v0, 0xff800000, v1 ; GFX7-NEXT: v_or_b32_e32 v0, 0xff800000, v1
; GFX7-NEXT: v_mul_i32_i24_e32 v1, -7, v0 ; GFX7-NEXT: v_mul_i32_i24_e32 v1, -7, v0
; GFX7-NEXT: v_lshl_b64 v[0:1], v[1:2], 3 ; GFX7-NEXT: v_lshl_b64 v[0:1], v[1:2], 3
; GFX7-NEXT: v_add_i32_e32 v2, vcc, v3, v5 ; GFX7-NEXT: v_add_i32_e32 v2, vcc, v3, v5
; GFX7-NEXT: v_addc_u32_e32 v3, vcc, 0, v4, vcc ; GFX7-NEXT: v_addc_u32_e32 v3, vcc, 0, v4, vcc
; GFX7-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX7-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX8-LABEL: muli24_shl64: ; GFX8-LABEL: muli24_shl64:
; GFX8: ; %bb.0: ; %bb ; GFX8: ; %bb.0: ; %bb
; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GFX8-NEXT: v_lshlrev_b32_e32 v3, 2, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v3, 2, v0
; GFX8-NEXT: v_lshlrev_b32_e32 v5, 3, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v5, 3, v0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, s2 ; GFX8-NEXT: v_mov_b32_e32 v1, s2
; GFX8-NEXT: v_mov_b32_e32 v2, s3 ; GFX8-NEXT: v_mov_b32_e32 v2, s3
; GFX8-NEXT: v_add_u32_e32 v1, vcc, v1, v3 ; GFX8-NEXT: v_add_u32_e32 v1, vcc, v1, v3
; GFX8-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc ; GFX8-NEXT: v_addc_u32_e32 v2, vcc, 0, v2, vcc
; GFX8-NEXT: flat_load_dword v4, v[1:2] ; GFX8-NEXT: flat_load_dword v4, v[1:2]
; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_mov_b32_e32 v1, 0 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_add_u32_e32 v2, vcc, v2, v5 ; GFX8-NEXT: v_add_u32_e32 v2, vcc, v2, v5
; GFX8-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc ; GFX8-NEXT: v_addc_u32_e32 v3, vcc, 0, v3, vcc
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_or_b32_e32 v0, 0xff800000, v4 ; GFX8-NEXT: v_or_b32_e32 v0, 0xff800000, v4
; GFX8-NEXT: v_mul_i32_i24_e32 v0, -7, v0 ; GFX8-NEXT: v_mul_i32_i24_e32 v0, -7, v0
; GFX8-NEXT: v_lshlrev_b64 v[0:1], 3, v[0:1] ; GFX8-NEXT: v_lshlrev_b64 v[0:1], 3, v[0:1]
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
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llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll

Show First 20 Lines • Show All 4,192 Lines • ▼ Show 20 Lines
define amdgpu_ps i64 @s_ssubsat_i64(i64 inreg %lhs, i64 inreg %rhs) { define amdgpu_ps i64 @s_ssubsat_i64(i64 inreg %lhs, i64 inreg %rhs) {
; GFX6-LABEL: s_ssubsat_i64: ; GFX6-LABEL: s_ssubsat_i64:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_sub_u32 s4, s0, s2 ; GFX6-NEXT: s_sub_u32 s4, s0, s2
; GFX6-NEXT: s_cselect_b32 s5, 1, 0 ; GFX6-NEXT: s_cselect_b32 s5, 1, 0
; GFX6-NEXT: s_and_b32 s5, s5, 1 ; GFX6-NEXT: s_and_b32 s5, s5, 1
; GFX6-NEXT: s_cmp_lg_u32 s5, 0 ; GFX6-NEXT: s_cmp_lg_u32 s5, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s0
; GFX6-NEXT: s_subb_u32 s5, s1, s3 ; GFX6-NEXT: s_subb_u32 s5, s1, s3
; GFX6-NEXT: v_mov_b32_e32 v0, s0
; GFX6-NEXT: v_mov_b32_e32 v1, s1 ; GFX6-NEXT: v_mov_b32_e32 v1, s1
; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1] ; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1]
; GFX6-NEXT: v_cmp_gt_i64_e64 s[0:1], s[2:3], 0 ; GFX6-NEXT: v_cmp_gt_i64_e64 s[0:1], s[2:3], 0
; GFX6-NEXT: s_ashr_i32 s2, s5, 31 ; GFX6-NEXT: s_ashr_i32 s2, s5, 31
; GFX6-NEXT: s_xor_b64 vcc, s[0:1], vcc ; GFX6-NEXT: s_xor_b64 vcc, s[0:1], vcc
; GFX6-NEXT: s_add_u32 s0, s2, 0 ; GFX6-NEXT: s_add_u32 s0, s2, 0
; GFX6-NEXT: s_cselect_b32 s1, 1, 0 ; GFX6-NEXT: s_cselect_b32 s1, 1, 0
; GFX6-NEXT: s_and_b32 s1, s1, 1 ; GFX6-NEXT: s_and_b32 s1, s1, 1
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; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_ssubsat_i64: ; GFX8-LABEL: s_ssubsat_i64:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_sub_u32 s4, s0, s2 ; GFX8-NEXT: s_sub_u32 s4, s0, s2
; GFX8-NEXT: s_cselect_b32 s5, 1, 0 ; GFX8-NEXT: s_cselect_b32 s5, 1, 0
; GFX8-NEXT: s_and_b32 s5, s5, 1 ; GFX8-NEXT: s_and_b32 s5, s5, 1
; GFX8-NEXT: s_cmp_lg_u32 s5, 0 ; GFX8-NEXT: s_cmp_lg_u32 s5, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: s_subb_u32 s5, s1, s3 ; GFX8-NEXT: s_subb_u32 s5, s1, s3
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1] ; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1]
; GFX8-NEXT: v_cmp_gt_i64_e64 s[0:1], s[2:3], 0 ; GFX8-NEXT: v_cmp_gt_i64_e64 s[0:1], s[2:3], 0
; GFX8-NEXT: s_ashr_i32 s2, s5, 31 ; GFX8-NEXT: s_ashr_i32 s2, s5, 31
; GFX8-NEXT: s_xor_b64 vcc, s[0:1], vcc ; GFX8-NEXT: s_xor_b64 vcc, s[0:1], vcc
; GFX8-NEXT: s_add_u32 s0, s2, 0 ; GFX8-NEXT: s_add_u32 s0, s2, 0
; GFX8-NEXT: s_cselect_b32 s1, 1, 0 ; GFX8-NEXT: s_cselect_b32 s1, 1, 0
; GFX8-NEXT: s_and_b32 s1, s1, 1 ; GFX8-NEXT: s_and_b32 s1, s1, 1
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; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX9-LABEL: s_ssubsat_i64: ; GFX9-LABEL: s_ssubsat_i64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_sub_u32 s4, s0, s2 ; GFX9-NEXT: s_sub_u32 s4, s0, s2
; GFX9-NEXT: s_cselect_b32 s5, 1, 0 ; GFX9-NEXT: s_cselect_b32 s5, 1, 0
; GFX9-NEXT: s_and_b32 s5, s5, 1 ; GFX9-NEXT: s_and_b32 s5, s5, 1
; GFX9-NEXT: s_cmp_lg_u32 s5, 0 ; GFX9-NEXT: s_cmp_lg_u32 s5, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: s_subb_u32 s5, s1, s3 ; GFX9-NEXT: s_subb_u32 s5, s1, s3
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1] ; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[4:5], v[0:1]
; GFX9-NEXT: v_cmp_gt_i64_e64 s[0:1], s[2:3], 0 ; GFX9-NEXT: v_cmp_gt_i64_e64 s[0:1], s[2:3], 0
; GFX9-NEXT: s_ashr_i32 s2, s5, 31 ; GFX9-NEXT: s_ashr_i32 s2, s5, 31
; GFX9-NEXT: s_xor_b64 vcc, s[0:1], vcc ; GFX9-NEXT: s_xor_b64 vcc, s[0:1], vcc
; GFX9-NEXT: s_add_u32 s0, s2, 0 ; GFX9-NEXT: s_add_u32 s0, s2, 0
; GFX9-NEXT: s_cselect_b32 s1, 1, 0 ; GFX9-NEXT: s_cselect_b32 s1, 1, 0
; GFX9-NEXT: s_and_b32 s1, s1, 1 ; GFX9-NEXT: s_and_b32 s1, s1, 1
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define amdgpu_ps <2 x i64> @s_ssubsat_v2i64(<2 x i64> inreg %lhs, <2 x i64> inreg %rhs) { define amdgpu_ps <2 x i64> @s_ssubsat_v2i64(<2 x i64> inreg %lhs, <2 x i64> inreg %rhs) {
; GFX6-LABEL: s_ssubsat_v2i64: ; GFX6-LABEL: s_ssubsat_v2i64:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_sub_u32 s8, s0, s4 ; GFX6-NEXT: s_sub_u32 s8, s0, s4
; GFX6-NEXT: s_cselect_b32 s9, 1, 0 ; GFX6-NEXT: s_cselect_b32 s9, 1, 0
; GFX6-NEXT: s_and_b32 s9, s9, 1 ; GFX6-NEXT: s_and_b32 s9, s9, 1
; GFX6-NEXT: s_cmp_lg_u32 s9, 0 ; GFX6-NEXT: s_cmp_lg_u32 s9, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s0
; GFX6-NEXT: s_subb_u32 s9, s1, s5 ; GFX6-NEXT: s_subb_u32 s9, s1, s5
; GFX6-NEXT: v_mov_b32_e32 v0, s0
; GFX6-NEXT: v_mov_b32_e32 v1, s1 ; GFX6-NEXT: v_mov_b32_e32 v1, s1
; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1] ; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1]
; GFX6-NEXT: v_cmp_gt_i64_e64 s[0:1], s[4:5], 0 ; GFX6-NEXT: v_cmp_gt_i64_e64 s[0:1], s[4:5], 0
; GFX6-NEXT: s_ashr_i32 s4, s9, 31 ; GFX6-NEXT: s_ashr_i32 s4, s9, 31
; GFX6-NEXT: s_xor_b64 vcc, s[0:1], vcc ; GFX6-NEXT: s_xor_b64 vcc, s[0:1], vcc
; GFX6-NEXT: s_add_u32 s0, s4, 0 ; GFX6-NEXT: s_add_u32 s0, s4, 0
; GFX6-NEXT: s_cselect_b32 s1, 1, 0 ; GFX6-NEXT: s_cselect_b32 s1, 1, 0
; GFX6-NEXT: s_and_b32 s1, s1, 1 ; GFX6-NEXT: s_and_b32 s1, s1, 1
; GFX6-NEXT: s_brev_b32 s5, 1 ; GFX6-NEXT: s_brev_b32 s5, 1
; GFX6-NEXT: s_cmp_lg_u32 s1, 0 ; GFX6-NEXT: s_cmp_lg_u32 s1, 0
; GFX6-NEXT: s_addc_u32 s1, s4, s5 ; GFX6-NEXT: s_addc_u32 s1, s4, s5
; GFX6-NEXT: v_mov_b32_e32 v1, s0 ; GFX6-NEXT: v_mov_b32_e32 v1, s0
; GFX6-NEXT: s_sub_u32 s0, s2, s6 ; GFX6-NEXT: s_sub_u32 s0, s2, s6
; GFX6-NEXT: v_mov_b32_e32 v2, s1 ; GFX6-NEXT: v_mov_b32_e32 v2, s1
; GFX6-NEXT: s_cselect_b32 s1, 1, 0 ; GFX6-NEXT: s_cselect_b32 s1, 1, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s8
; GFX6-NEXT: s_and_b32 s1, s1, 1 ; GFX6-NEXT: s_and_b32 s1, s1, 1
; GFX6-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc ; GFX6-NEXT: v_mov_b32_e32 v0, s8
; GFX6-NEXT: s_cmp_lg_u32 s1, 0 ; GFX6-NEXT: s_cmp_lg_u32 s1, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: v_mov_b32_e32 v3, s9 ; GFX6-NEXT: v_mov_b32_e32 v3, s9
; GFX6-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc
; GFX6-NEXT: s_subb_u32 s1, s3, s7 ; GFX6-NEXT: s_subb_u32 s1, s3, s7
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: v_mov_b32_e32 v1, s3 ; GFX6-NEXT: v_mov_b32_e32 v1, s3
; GFX6-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc
; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1] ; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1]
; GFX6-NEXT: v_cmp_gt_i64_e64 s[2:3], s[6:7], 0 ; GFX6-NEXT: v_cmp_gt_i64_e64 s[2:3], s[6:7], 0
; GFX6-NEXT: s_ashr_i32 s4, s1, 31 ; GFX6-NEXT: s_ashr_i32 s4, s1, 31
; GFX6-NEXT: s_xor_b64 vcc, s[2:3], vcc ; GFX6-NEXT: s_xor_b64 vcc, s[2:3], vcc
; GFX6-NEXT: v_mov_b32_e32 v0, s0 ; GFX6-NEXT: v_mov_b32_e32 v0, s0
; GFX6-NEXT: s_add_u32 s0, s4, 0 ; GFX6-NEXT: s_add_u32 s0, s4, 0
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; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_ssubsat_v2i64: ; GFX8-LABEL: s_ssubsat_v2i64:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_sub_u32 s8, s0, s4 ; GFX8-NEXT: s_sub_u32 s8, s0, s4
; GFX8-NEXT: s_cselect_b32 s9, 1, 0 ; GFX8-NEXT: s_cselect_b32 s9, 1, 0
; GFX8-NEXT: s_and_b32 s9, s9, 1 ; GFX8-NEXT: s_and_b32 s9, s9, 1
; GFX8-NEXT: s_cmp_lg_u32 s9, 0 ; GFX8-NEXT: s_cmp_lg_u32 s9, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: s_subb_u32 s9, s1, s5 ; GFX8-NEXT: s_subb_u32 s9, s1, s5
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1] ; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1]
; GFX8-NEXT: v_cmp_gt_i64_e64 s[0:1], s[4:5], 0 ; GFX8-NEXT: v_cmp_gt_i64_e64 s[0:1], s[4:5], 0
; GFX8-NEXT: s_ashr_i32 s4, s9, 31 ; GFX8-NEXT: s_ashr_i32 s4, s9, 31
; GFX8-NEXT: s_xor_b64 vcc, s[0:1], vcc ; GFX8-NEXT: s_xor_b64 vcc, s[0:1], vcc
; GFX8-NEXT: s_add_u32 s0, s4, 0 ; GFX8-NEXT: s_add_u32 s0, s4, 0
; GFX8-NEXT: s_cselect_b32 s1, 1, 0 ; GFX8-NEXT: s_cselect_b32 s1, 1, 0
; GFX8-NEXT: s_and_b32 s1, s1, 1 ; GFX8-NEXT: s_and_b32 s1, s1, 1
; GFX8-NEXT: s_brev_b32 s5, 1 ; GFX8-NEXT: s_brev_b32 s5, 1
; GFX8-NEXT: s_cmp_lg_u32 s1, 0 ; GFX8-NEXT: s_cmp_lg_u32 s1, 0
; GFX8-NEXT: s_addc_u32 s1, s4, s5 ; GFX8-NEXT: s_addc_u32 s1, s4, s5
; GFX8-NEXT: v_mov_b32_e32 v1, s0 ; GFX8-NEXT: v_mov_b32_e32 v1, s0
; GFX8-NEXT: s_sub_u32 s0, s2, s6 ; GFX8-NEXT: s_sub_u32 s0, s2, s6
; GFX8-NEXT: v_mov_b32_e32 v2, s1 ; GFX8-NEXT: v_mov_b32_e32 v2, s1
; GFX8-NEXT: s_cselect_b32 s1, 1, 0 ; GFX8-NEXT: s_cselect_b32 s1, 1, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s8
; GFX8-NEXT: s_and_b32 s1, s1, 1 ; GFX8-NEXT: s_and_b32 s1, s1, 1
; GFX8-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc ; GFX8-NEXT: v_mov_b32_e32 v0, s8
; GFX8-NEXT: s_cmp_lg_u32 s1, 0 ; GFX8-NEXT: s_cmp_lg_u32 s1, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v3, s9 ; GFX8-NEXT: v_mov_b32_e32 v3, s9
; GFX8-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc
; GFX8-NEXT: s_subb_u32 s1, s3, s7 ; GFX8-NEXT: s_subb_u32 s1, s3, s7
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc
; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1] ; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1]
; GFX8-NEXT: v_cmp_gt_i64_e64 s[2:3], s[6:7], 0 ; GFX8-NEXT: v_cmp_gt_i64_e64 s[2:3], s[6:7], 0
; GFX8-NEXT: s_ashr_i32 s4, s1, 31 ; GFX8-NEXT: s_ashr_i32 s4, s1, 31
; GFX8-NEXT: s_xor_b64 vcc, s[2:3], vcc ; GFX8-NEXT: s_xor_b64 vcc, s[2:3], vcc
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: s_add_u32 s0, s4, 0 ; GFX8-NEXT: s_add_u32 s0, s4, 0
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; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX9-LABEL: s_ssubsat_v2i64: ; GFX9-LABEL: s_ssubsat_v2i64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_sub_u32 s8, s0, s4 ; GFX9-NEXT: s_sub_u32 s8, s0, s4
; GFX9-NEXT: s_cselect_b32 s9, 1, 0 ; GFX9-NEXT: s_cselect_b32 s9, 1, 0
; GFX9-NEXT: s_and_b32 s9, s9, 1 ; GFX9-NEXT: s_and_b32 s9, s9, 1
; GFX9-NEXT: s_cmp_lg_u32 s9, 0 ; GFX9-NEXT: s_cmp_lg_u32 s9, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: s_subb_u32 s9, s1, s5 ; GFX9-NEXT: s_subb_u32 s9, s1, s5
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1] ; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[8:9], v[0:1]
; GFX9-NEXT: v_cmp_gt_i64_e64 s[0:1], s[4:5], 0 ; GFX9-NEXT: v_cmp_gt_i64_e64 s[0:1], s[4:5], 0
; GFX9-NEXT: s_ashr_i32 s4, s9, 31 ; GFX9-NEXT: s_ashr_i32 s4, s9, 31
; GFX9-NEXT: s_xor_b64 vcc, s[0:1], vcc ; GFX9-NEXT: s_xor_b64 vcc, s[0:1], vcc
; GFX9-NEXT: s_add_u32 s0, s4, 0 ; GFX9-NEXT: s_add_u32 s0, s4, 0
; GFX9-NEXT: s_cselect_b32 s1, 1, 0 ; GFX9-NEXT: s_cselect_b32 s1, 1, 0
; GFX9-NEXT: s_and_b32 s1, s1, 1 ; GFX9-NEXT: s_and_b32 s1, s1, 1
; GFX9-NEXT: s_brev_b32 s5, 1 ; GFX9-NEXT: s_brev_b32 s5, 1
; GFX9-NEXT: s_cmp_lg_u32 s1, 0 ; GFX9-NEXT: s_cmp_lg_u32 s1, 0
; GFX9-NEXT: s_addc_u32 s1, s4, s5 ; GFX9-NEXT: s_addc_u32 s1, s4, s5
; GFX9-NEXT: v_mov_b32_e32 v1, s0 ; GFX9-NEXT: v_mov_b32_e32 v1, s0
; GFX9-NEXT: s_sub_u32 s0, s2, s6 ; GFX9-NEXT: s_sub_u32 s0, s2, s6
; GFX9-NEXT: v_mov_b32_e32 v2, s1 ; GFX9-NEXT: v_mov_b32_e32 v2, s1
; GFX9-NEXT: s_cselect_b32 s1, 1, 0 ; GFX9-NEXT: s_cselect_b32 s1, 1, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s8
; GFX9-NEXT: s_and_b32 s1, s1, 1 ; GFX9-NEXT: s_and_b32 s1, s1, 1
; GFX9-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc ; GFX9-NEXT: v_mov_b32_e32 v0, s8
; GFX9-NEXT: s_cmp_lg_u32 s1, 0 ; GFX9-NEXT: s_cmp_lg_u32 s1, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_mov_b32_e32 v3, s9 ; GFX9-NEXT: v_mov_b32_e32 v3, s9
; GFX9-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc
; GFX9-NEXT: s_subb_u32 s1, s3, s7 ; GFX9-NEXT: s_subb_u32 s1, s3, s7
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_mov_b32_e32 v1, s3 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v2, v3, v2, vcc
; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1] ; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[0:1]
; GFX9-NEXT: v_cmp_gt_i64_e64 s[2:3], s[6:7], 0 ; GFX9-NEXT: v_cmp_gt_i64_e64 s[2:3], s[6:7], 0
; GFX9-NEXT: s_ashr_i32 s4, s1, 31 ; GFX9-NEXT: s_ashr_i32 s4, s1, 31
; GFX9-NEXT: s_xor_b64 vcc, s[2:3], vcc ; GFX9-NEXT: s_xor_b64 vcc, s[2:3], vcc
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: s_add_u32 s0, s4, 0 ; GFX9-NEXT: s_add_u32 s0, s4, 0
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; GFX6-NEXT: s_and_b32 s9, s9, 1 ; GFX6-NEXT: s_and_b32 s9, s9, 1
; GFX6-NEXT: s_cmp_lg_u32 s9, 0 ; GFX6-NEXT: s_cmp_lg_u32 s9, 0
; GFX6-NEXT: s_subb_u32 s9, s1, s5 ; GFX6-NEXT: s_subb_u32 s9, s1, s5
; GFX6-NEXT: s_cselect_b32 s10, 1, 0 ; GFX6-NEXT: s_cselect_b32 s10, 1, 0
; GFX6-NEXT: s_and_b32 s10, s10, 1 ; GFX6-NEXT: s_and_b32 s10, s10, 1
; GFX6-NEXT: s_cmp_lg_u32 s10, 0 ; GFX6-NEXT: s_cmp_lg_u32 s10, 0
; GFX6-NEXT: s_subb_u32 s10, s2, s6 ; GFX6-NEXT: s_subb_u32 s10, s2, s6
; GFX6-NEXT: s_cselect_b32 s11, 1, 0 ; GFX6-NEXT: s_cselect_b32 s11, 1, 0
; GFX6-NEXT: v_mov_b32_e32 v3, s1
; GFX6-NEXT: s_and_b32 s11, s11, 1 ; GFX6-NEXT: s_and_b32 s11, s11, 1
; GFX6-NEXT: v_mov_b32_e32 v3, s1
; GFX6-NEXT: v_mov_b32_e32 v2, s0 ; GFX6-NEXT: v_mov_b32_e32 v2, s0
; GFX6-NEXT: s_cmp_lg_u32 s11, 0 ; GFX6-NEXT: s_cmp_lg_u32 s11, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[2:3] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[2:3]
; GFX6-NEXT: s_subb_u32 s11, s3, s7 ; GFX6-NEXT: s_subb_u32 s11, s3, s7
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: v_mov_b32_e32 v1, s3 ; GFX6-NEXT: v_mov_b32_e32 v1, s3
; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[10:11], v[0:1] ; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[10:11], v[0:1]
; GFX6-NEXT: v_cmp_gt_u64_e64 s[0:1], s[4:5], 0 ; GFX6-NEXT: v_cmp_gt_u64_e64 s[0:1], s[4:5], 0
; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc
; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[10:11], v[0:1] ; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[10:11], v[0:1]
; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[0:1] ; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[0:1]
; GFX6-NEXT: v_cmp_gt_i64_e64 s[0:1], s[6:7], 0 ; GFX6-NEXT: v_cmp_gt_i64_e64 s[0:1], s[6:7], 0
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; GFX8-NEXT: s_cmp_lg_u32 s9, 0 ; GFX8-NEXT: s_cmp_lg_u32 s9, 0
; GFX8-NEXT: s_subb_u32 s9, s1, s5 ; GFX8-NEXT: s_subb_u32 s9, s1, s5
; GFX8-NEXT: s_cselect_b32 s10, 1, 0 ; GFX8-NEXT: s_cselect_b32 s10, 1, 0
; GFX8-NEXT: s_and_b32 s10, s10, 1 ; GFX8-NEXT: s_and_b32 s10, s10, 1
; GFX8-NEXT: s_cmp_lg_u32 s10, 0 ; GFX8-NEXT: s_cmp_lg_u32 s10, 0
; GFX8-NEXT: s_subb_u32 s10, s2, s6 ; GFX8-NEXT: s_subb_u32 s10, s2, s6
; GFX8-NEXT: s_cselect_b32 s11, 1, 0 ; GFX8-NEXT: s_cselect_b32 s11, 1, 0
; GFX8-NEXT: s_and_b32 s11, s11, 1 ; GFX8-NEXT: s_and_b32 s11, s11, 1
; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: s_cmp_lg_u32 s11, 0 ; GFX8-NEXT: s_cmp_lg_u32 s11, 0
; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: s_subb_u32 s11, s3, s7 ; GFX8-NEXT: s_subb_u32 s11, s3, s7
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[2:3] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[2:3]
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: s_cmp_eq_u64 s[10:11], s[2:3] ; GFX8-NEXT: s_cmp_eq_u64 s[10:11], s[2:3]
; GFX8-NEXT: s_cselect_b32 s2, 1, 0 ; GFX8-NEXT: s_cselect_b32 s2, 1, 0
; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[10:11], v[0:1] ; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[10:11], v[0:1]
; GFX8-NEXT: s_and_b32 s0, 1, s2 ; GFX8-NEXT: s_and_b32 s0, 1, s2
; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0 ; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0
▲ Show 20 Lines • Show All 50 Lines • ▼ Show 20 Lines
; GFX9-NEXT: s_cmp_lg_u32 s9, 0 ; GFX9-NEXT: s_cmp_lg_u32 s9, 0
; GFX9-NEXT: s_subb_u32 s9, s1, s5 ; GFX9-NEXT: s_subb_u32 s9, s1, s5
; GFX9-NEXT: s_cselect_b32 s10, 1, 0 ; GFX9-NEXT: s_cselect_b32 s10, 1, 0
; GFX9-NEXT: s_and_b32 s10, s10, 1 ; GFX9-NEXT: s_and_b32 s10, s10, 1
; GFX9-NEXT: s_cmp_lg_u32 s10, 0 ; GFX9-NEXT: s_cmp_lg_u32 s10, 0
; GFX9-NEXT: s_subb_u32 s10, s2, s6 ; GFX9-NEXT: s_subb_u32 s10, s2, s6
; GFX9-NEXT: s_cselect_b32 s11, 1, 0 ; GFX9-NEXT: s_cselect_b32 s11, 1, 0
; GFX9-NEXT: s_and_b32 s11, s11, 1 ; GFX9-NEXT: s_and_b32 s11, s11, 1
; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: s_cmp_lg_u32 s11, 0 ; GFX9-NEXT: s_cmp_lg_u32 s11, 0
; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_mov_b32_e32 v2, s0 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
; GFX9-NEXT: s_subb_u32 s11, s3, s7 ; GFX9-NEXT: s_subb_u32 s11, s3, s7
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[2:3] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_mov_b32_e32 v1, s3 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: s_cmp_eq_u64 s[10:11], s[2:3] ; GFX9-NEXT: s_cmp_eq_u64 s[10:11], s[2:3]
; GFX9-NEXT: s_cselect_b32 s2, 1, 0 ; GFX9-NEXT: s_cselect_b32 s2, 1, 0
; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[10:11], v[0:1] ; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[10:11], v[0:1]
; GFX9-NEXT: s_and_b32 s0, 1, s2 ; GFX9-NEXT: s_and_b32 s0, 1, s2
; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0 ; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0
▲ Show 20 Lines • Show All 668 Lines • ▼ Show 20 Lines
; GFX6-NEXT: s_and_b32 s17, s17, 1 ; GFX6-NEXT: s_and_b32 s17, s17, 1
; GFX6-NEXT: s_cmp_lg_u32 s17, 0 ; GFX6-NEXT: s_cmp_lg_u32 s17, 0
; GFX6-NEXT: s_subb_u32 s17, s1, s9 ; GFX6-NEXT: s_subb_u32 s17, s1, s9
; GFX6-NEXT: s_cselect_b32 s18, 1, 0 ; GFX6-NEXT: s_cselect_b32 s18, 1, 0
; GFX6-NEXT: s_and_b32 s18, s18, 1 ; GFX6-NEXT: s_and_b32 s18, s18, 1
; GFX6-NEXT: s_cmp_lg_u32 s18, 0 ; GFX6-NEXT: s_cmp_lg_u32 s18, 0
; GFX6-NEXT: s_subb_u32 s18, s2, s10 ; GFX6-NEXT: s_subb_u32 s18, s2, s10
; GFX6-NEXT: s_cselect_b32 s19, 1, 0 ; GFX6-NEXT: s_cselect_b32 s19, 1, 0
; GFX6-NEXT: v_mov_b32_e32 v3, s1
; GFX6-NEXT: s_and_b32 s19, s19, 1 ; GFX6-NEXT: s_and_b32 s19, s19, 1
; GFX6-NEXT: v_mov_b32_e32 v3, s1
; GFX6-NEXT: v_mov_b32_e32 v2, s0 ; GFX6-NEXT: v_mov_b32_e32 v2, s0
; GFX6-NEXT: s_cmp_lg_u32 s19, 0 ; GFX6-NEXT: s_cmp_lg_u32 s19, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[16:17], v[2:3] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[16:17], v[2:3]
; GFX6-NEXT: s_subb_u32 s19, s3, s11 ; GFX6-NEXT: s_subb_u32 s19, s3, s11
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: v_mov_b32_e32 v1, s3 ; GFX6-NEXT: v_mov_b32_e32 v1, s3
; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[18:19], v[0:1] ; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[18:19], v[0:1]
; GFX6-NEXT: v_cmp_gt_u64_e64 s[0:1], s[8:9], 0 ; GFX6-NEXT: v_cmp_gt_u64_e64 s[0:1], s[8:9], 0
; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc
; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[18:19], v[0:1] ; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[18:19], v[0:1]
; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[0:1] ; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[0:1]
; GFX6-NEXT: v_cmp_gt_i64_e64 s[0:1], s[10:11], 0 ; GFX6-NEXT: v_cmp_gt_i64_e64 s[0:1], s[10:11], 0
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; GFX6-NEXT: s_and_b32 s1, s1, 1 ; GFX6-NEXT: s_and_b32 s1, s1, 1
; GFX6-NEXT: s_cmp_lg_u32 s1, 0 ; GFX6-NEXT: s_cmp_lg_u32 s1, 0
; GFX6-NEXT: v_and_b32_e32 v0, 1, v0 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v0
; GFX6-NEXT: s_subb_u32 s1, s5, s13 ; GFX6-NEXT: s_subb_u32 s1, s5, s13
; GFX6-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; GFX6-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX6-NEXT: v_mov_b32_e32 v0, s2 ; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: s_cselect_b32 s2, 1, 0 ; GFX6-NEXT: s_cselect_b32 s2, 1, 0
; GFX6-NEXT: s_and_b32 s2, s2, 1 ; GFX6-NEXT: s_and_b32 s2, s2, 1
; GFX6-NEXT: s_cmp_lg_u32 s2, 0
; GFX6-NEXT: v_mov_b32_e32 v3, s16 ; GFX6-NEXT: v_mov_b32_e32 v3, s16
; GFX6-NEXT: v_mov_b32_e32 v4, s17 ; GFX6-NEXT: v_mov_b32_e32 v4, s17
; GFX6-NEXT: s_cmp_lg_u32 s2, 0 ; GFX6-NEXT: s_subb_u32 s2, s6, s14
; GFX6-NEXT: v_cndmask_b32_e32 v5, v3, v1, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v5, v3, v1, vcc
; GFX6-NEXT: v_cndmask_b32_e32 v4, v4, v2, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v4, v4, v2, vcc
; GFX6-NEXT: v_mov_b32_e32 v1, s3 ; GFX6-NEXT: v_mov_b32_e32 v1, s3
; GFX6-NEXT: v_mov_b32_e32 v2, s18 ; GFX6-NEXT: v_mov_b32_e32 v2, s18
; GFX6-NEXT: v_mov_b32_e32 v3, s19 ; GFX6-NEXT: v_mov_b32_e32 v3, s19
; GFX6-NEXT: s_subb_u32 s2, s6, s14 ; GFX6-NEXT: s_cselect_b32 s3, 1, 0
; GFX6-NEXT: v_cndmask_b32_e32 v6, v2, v0, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v6, v2, v0, vcc
; GFX6-NEXT: v_cndmask_b32_e32 v7, v3, v1, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v7, v3, v1, vcc
; GFX6-NEXT: s_cselect_b32 s3, 1, 0
; GFX6-NEXT: v_mov_b32_e32 v2, s4
; GFX6-NEXT: s_and_b32 s3, s3, 1 ; GFX6-NEXT: s_and_b32 s3, s3, 1
; GFX6-NEXT: v_mov_b32_e32 v2, s4
; GFX6-NEXT: v_mov_b32_e32 v3, s5 ; GFX6-NEXT: v_mov_b32_e32 v3, s5
; GFX6-NEXT: s_cmp_lg_u32 s3, 0 ; GFX6-NEXT: s_cmp_lg_u32 s3, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s6
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX6-NEXT: s_subb_u32 s3, s7, s15 ; GFX6-NEXT: s_subb_u32 s3, s7, s15
; GFX6-NEXT: v_mov_b32_e32 v0, s6
; GFX6-NEXT: v_mov_b32_e32 v1, s7 ; GFX6-NEXT: v_mov_b32_e32 v1, s7
; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[0:1] ; GFX6-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[0:1]
; GFX6-NEXT: v_cmp_gt_u64_e64 s[4:5], s[12:13], 0 ; GFX6-NEXT: v_cmp_gt_u64_e64 s[4:5], s[12:13], 0
; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc
; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[0:1] ; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[0:1]
; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[4:5] ; GFX6-NEXT: v_cndmask_b32_e64 v1, 0, 1, s[4:5]
; GFX6-NEXT: v_cmp_gt_i64_e64 s[4:5], s[14:15], 0 ; GFX6-NEXT: v_cmp_gt_i64_e64 s[4:5], s[14:15], 0
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; GFX8-NEXT: s_cmp_lg_u32 s17, 0 ; GFX8-NEXT: s_cmp_lg_u32 s17, 0
; GFX8-NEXT: s_subb_u32 s17, s1, s9 ; GFX8-NEXT: s_subb_u32 s17, s1, s9
; GFX8-NEXT: s_cselect_b32 s18, 1, 0 ; GFX8-NEXT: s_cselect_b32 s18, 1, 0
; GFX8-NEXT: s_and_b32 s18, s18, 1 ; GFX8-NEXT: s_and_b32 s18, s18, 1
; GFX8-NEXT: s_cmp_lg_u32 s18, 0 ; GFX8-NEXT: s_cmp_lg_u32 s18, 0
; GFX8-NEXT: s_subb_u32 s18, s2, s10 ; GFX8-NEXT: s_subb_u32 s18, s2, s10
; GFX8-NEXT: s_cselect_b32 s19, 1, 0 ; GFX8-NEXT: s_cselect_b32 s19, 1, 0
; GFX8-NEXT: s_and_b32 s19, s19, 1 ; GFX8-NEXT: s_and_b32 s19, s19, 1
; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: s_cmp_lg_u32 s19, 0 ; GFX8-NEXT: s_cmp_lg_u32 s19, 0
; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: s_subb_u32 s19, s3, s11 ; GFX8-NEXT: s_subb_u32 s19, s3, s11
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[16:17], v[2:3] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[16:17], v[2:3]
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: s_cmp_eq_u64 s[18:19], s[2:3] ; GFX8-NEXT: s_cmp_eq_u64 s[18:19], s[2:3]
; GFX8-NEXT: s_cselect_b32 s2, 1, 0 ; GFX8-NEXT: s_cselect_b32 s2, 1, 0
; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[18:19], v[0:1] ; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[18:19], v[0:1]
; GFX8-NEXT: s_and_b32 s0, 1, s2 ; GFX8-NEXT: s_and_b32 s0, 1, s2
; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0 ; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0
Show All 32 Lines
; GFX8-NEXT: v_and_b32_e32 v0, 1, v0 ; GFX8-NEXT: v_and_b32_e32 v0, 1, v0
; GFX8-NEXT: s_subb_u32 s1, s5, s13 ; GFX8-NEXT: s_subb_u32 s1, s5, s13
; GFX8-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; GFX8-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: s_cselect_b32 s2, 1, 0 ; GFX8-NEXT: s_cselect_b32 s2, 1, 0
; GFX8-NEXT: s_and_b32 s2, s2, 1 ; GFX8-NEXT: s_and_b32 s2, s2, 1
; GFX8-NEXT: s_cmp_lg_u32 s2, 0 ; GFX8-NEXT: s_cmp_lg_u32 s2, 0
; GFX8-NEXT: v_mov_b32_e32 v3, s16 ; GFX8-NEXT: v_mov_b32_e32 v3, s16
; GFX8-NEXT: v_mov_b32_e32 v4, s17
; GFX8-NEXT: s_subb_u32 s2, s6, s14 ; GFX8-NEXT: s_subb_u32 s2, s6, s14
; GFX8-NEXT: v_mov_b32_e32 v4, s17
; GFX8-NEXT: v_cndmask_b32_e32 v5, v3, v1, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v5, v3, v1, vcc
; GFX8-NEXT: v_cndmask_b32_e32 v4, v4, v2, vcc
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: s_cselect_b32 s3, 1, 0
; GFX8-NEXT: v_cndmask_b32_e32 v4, v4, v2, vcc
; GFX8-NEXT: v_mov_b32_e32 v2, s18 ; GFX8-NEXT: v_mov_b32_e32 v2, s18
; GFX8-NEXT: v_mov_b32_e32 v3, s19 ; GFX8-NEXT: v_mov_b32_e32 v3, s19
; GFX8-NEXT: s_cselect_b32 s3, 1, 0 ; GFX8-NEXT: s_and_b32 s3, s3, 1
; GFX8-NEXT: v_cndmask_b32_e32 v6, v2, v0, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v6, v2, v0, vcc
; GFX8-NEXT: v_cndmask_b32_e32 v7, v3, v1, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v7, v3, v1, vcc
; GFX8-NEXT: s_and_b32 s3, s3, 1
; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: s_cmp_lg_u32 s3, 0 ; GFX8-NEXT: s_cmp_lg_u32 s3, 0
; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s5 ; GFX8-NEXT: v_mov_b32_e32 v3, s5
; GFX8-NEXT: s_subb_u32 s3, s7, s15 ; GFX8-NEXT: s_subb_u32 s3, s7, s15
; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: s_cmp_eq_u64 s[2:3], s[6:7] ; GFX8-NEXT: s_cmp_eq_u64 s[2:3], s[6:7]
; GFX8-NEXT: s_cselect_b32 s6, 1, 0 ; GFX8-NEXT: s_cselect_b32 s6, 1, 0
; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[0:1] ; GFX8-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[0:1]
; GFX8-NEXT: s_and_b32 s4, 1, s6 ; GFX8-NEXT: s_and_b32 s4, 1, s6
; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4 ; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4
▲ Show 20 Lines • Show All 54 Lines • ▼ Show 20 Lines
; GFX9-NEXT: s_cmp_lg_u32 s17, 0 ; GFX9-NEXT: s_cmp_lg_u32 s17, 0
; GFX9-NEXT: s_subb_u32 s17, s1, s9 ; GFX9-NEXT: s_subb_u32 s17, s1, s9
; GFX9-NEXT: s_cselect_b32 s18, 1, 0 ; GFX9-NEXT: s_cselect_b32 s18, 1, 0
; GFX9-NEXT: s_and_b32 s18, s18, 1 ; GFX9-NEXT: s_and_b32 s18, s18, 1
; GFX9-NEXT: s_cmp_lg_u32 s18, 0 ; GFX9-NEXT: s_cmp_lg_u32 s18, 0
; GFX9-NEXT: s_subb_u32 s18, s2, s10 ; GFX9-NEXT: s_subb_u32 s18, s2, s10
; GFX9-NEXT: s_cselect_b32 s19, 1, 0 ; GFX9-NEXT: s_cselect_b32 s19, 1, 0
; GFX9-NEXT: s_and_b32 s19, s19, 1 ; GFX9-NEXT: s_and_b32 s19, s19, 1
; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: s_cmp_lg_u32 s19, 0 ; GFX9-NEXT: s_cmp_lg_u32 s19, 0
; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_mov_b32_e32 v2, s0 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
; GFX9-NEXT: s_subb_u32 s19, s3, s11 ; GFX9-NEXT: s_subb_u32 s19, s3, s11
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[16:17], v[2:3] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[16:17], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_mov_b32_e32 v1, s3 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: s_cmp_eq_u64 s[18:19], s[2:3] ; GFX9-NEXT: s_cmp_eq_u64 s[18:19], s[2:3]
; GFX9-NEXT: s_cselect_b32 s2, 1, 0 ; GFX9-NEXT: s_cselect_b32 s2, 1, 0
; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[18:19], v[0:1] ; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[18:19], v[0:1]
; GFX9-NEXT: s_and_b32 s0, 1, s2 ; GFX9-NEXT: s_and_b32 s0, 1, s2
; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0 ; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0
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; GFX9-NEXT: v_and_b32_e32 v0, 1, v0 ; GFX9-NEXT: v_and_b32_e32 v0, 1, v0
; GFX9-NEXT: s_subb_u32 s1, s5, s13 ; GFX9-NEXT: s_subb_u32 s1, s5, s13
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX9-NEXT: v_mov_b32_e32 v0, s2 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: s_cselect_b32 s2, 1, 0 ; GFX9-NEXT: s_cselect_b32 s2, 1, 0
; GFX9-NEXT: s_and_b32 s2, s2, 1 ; GFX9-NEXT: s_and_b32 s2, s2, 1
; GFX9-NEXT: s_cmp_lg_u32 s2, 0 ; GFX9-NEXT: s_cmp_lg_u32 s2, 0
; GFX9-NEXT: v_mov_b32_e32 v3, s16 ; GFX9-NEXT: v_mov_b32_e32 v3, s16
; GFX9-NEXT: v_mov_b32_e32 v4, s17
; GFX9-NEXT: s_subb_u32 s2, s6, s14 ; GFX9-NEXT: s_subb_u32 s2, s6, s14
; GFX9-NEXT: v_mov_b32_e32 v4, s17
; GFX9-NEXT: v_cndmask_b32_e32 v5, v3, v1, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v5, v3, v1, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v4, v4, v2, vcc
; GFX9-NEXT: v_mov_b32_e32 v1, s3 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: s_cselect_b32 s3, 1, 0
; GFX9-NEXT: v_cndmask_b32_e32 v4, v4, v2, vcc
; GFX9-NEXT: v_mov_b32_e32 v2, s18 ; GFX9-NEXT: v_mov_b32_e32 v2, s18
; GFX9-NEXT: v_mov_b32_e32 v3, s19 ; GFX9-NEXT: v_mov_b32_e32 v3, s19
; GFX9-NEXT: s_cselect_b32 s3, 1, 0 ; GFX9-NEXT: s_and_b32 s3, s3, 1
; GFX9-NEXT: v_cndmask_b32_e32 v6, v2, v0, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v6, v2, v0, vcc
; GFX9-NEXT: v_cndmask_b32_e32 v7, v3, v1, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v7, v3, v1, vcc
; GFX9-NEXT: s_and_b32 s3, s3, 1
; GFX9-NEXT: v_mov_b32_e32 v2, s4
; GFX9-NEXT: s_cmp_lg_u32 s3, 0 ; GFX9-NEXT: s_cmp_lg_u32 s3, 0
; GFX9-NEXT: v_mov_b32_e32 v2, s4
; GFX9-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-NEXT: v_mov_b32_e32 v3, s5
; GFX9-NEXT: s_subb_u32 s3, s7, s15 ; GFX9-NEXT: s_subb_u32 s3, s7, s15
; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: s_cmp_eq_u64 s[2:3], s[6:7] ; GFX9-NEXT: s_cmp_eq_u64 s[2:3], s[6:7]
; GFX9-NEXT: s_cselect_b32 s6, 1, 0 ; GFX9-NEXT: s_cselect_b32 s6, 1, 0
; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[0:1] ; GFX9-NEXT: v_cmp_lt_i64_e32 vcc, s[2:3], v[0:1]
; GFX9-NEXT: s_and_b32 s4, 1, s6 ; GFX9-NEXT: s_and_b32 s4, 1, s6
; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4 ; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4
▲ Show 20 Lines • Show All 208 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll

Show First 20 Lines • Show All 2,604 Lines • ▼ Show 20 Lines
define amdgpu_ps i64 @s_uaddsat_i64(i64 inreg %lhs, i64 inreg %rhs) { define amdgpu_ps i64 @s_uaddsat_i64(i64 inreg %lhs, i64 inreg %rhs) {
; GFX6-LABEL: s_uaddsat_i64: ; GFX6-LABEL: s_uaddsat_i64:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_add_u32 s0, s0, s2 ; GFX6-NEXT: s_add_u32 s0, s0, s2
; GFX6-NEXT: s_cselect_b32 s4, 1, 0 ; GFX6-NEXT: s_cselect_b32 s4, 1, 0
; GFX6-NEXT: s_and_b32 s4, s4, 1 ; GFX6-NEXT: s_and_b32 s4, s4, 1
; GFX6-NEXT: s_cmp_lg_u32 s4, 0 ; GFX6-NEXT: s_cmp_lg_u32 s4, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: s_addc_u32 s1, s1, s3 ; GFX6-NEXT: s_addc_u32 s1, s1, s3
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: v_mov_b32_e32 v1, s3 ; GFX6-NEXT: v_mov_b32_e32 v1, s3
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]
; GFX6-NEXT: v_mov_b32_e32 v2, s0 ; GFX6-NEXT: v_mov_b32_e32 v2, s0
; GFX6-NEXT: v_mov_b32_e32 v3, s1 ; GFX6-NEXT: v_mov_b32_e32 v3, s1
; GFX6-NEXT: v_cndmask_b32_e64 v0, v2, -1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v0, v2, -1, vcc
; GFX6-NEXT: v_cndmask_b32_e64 v1, v3, -1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v1, v3, -1, vcc
; GFX6-NEXT: v_readfirstlane_b32 s0, v0 ; GFX6-NEXT: v_readfirstlane_b32 s0, v0
; GFX6-NEXT: v_readfirstlane_b32 s1, v1 ; GFX6-NEXT: v_readfirstlane_b32 s1, v1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_uaddsat_i64: ; GFX8-LABEL: s_uaddsat_i64:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_add_u32 s0, s0, s2 ; GFX8-NEXT: s_add_u32 s0, s0, s2
; GFX8-NEXT: s_cselect_b32 s4, 1, 0 ; GFX8-NEXT: s_cselect_b32 s4, 1, 0
; GFX8-NEXT: s_and_b32 s4, s4, 1 ; GFX8-NEXT: s_and_b32 s4, s4, 1
; GFX8-NEXT: s_cmp_lg_u32 s4, 0 ; GFX8-NEXT: s_cmp_lg_u32 s4, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: s_addc_u32 s1, s1, s3 ; GFX8-NEXT: s_addc_u32 s1, s1, s3
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_cndmask_b32_e64 v0, v2, -1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, v2, -1, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v1, v3, -1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v1, v3, -1, vcc
; GFX8-NEXT: v_readfirstlane_b32 s0, v0 ; GFX8-NEXT: v_readfirstlane_b32 s0, v0
; GFX8-NEXT: v_readfirstlane_b32 s1, v1 ; GFX8-NEXT: v_readfirstlane_b32 s1, v1
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX9-LABEL: s_uaddsat_i64: ; GFX9-LABEL: s_uaddsat_i64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_add_u32 s0, s0, s2 ; GFX9-NEXT: s_add_u32 s0, s0, s2
; GFX9-NEXT: s_cselect_b32 s4, 1, 0 ; GFX9-NEXT: s_cselect_b32 s4, 1, 0
; GFX9-NEXT: s_and_b32 s4, s4, 1 ; GFX9-NEXT: s_and_b32 s4, s4, 1
; GFX9-NEXT: s_cmp_lg_u32 s4, 0 ; GFX9-NEXT: s_cmp_lg_u32 s4, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: s_addc_u32 s1, s1, s3 ; GFX9-NEXT: s_addc_u32 s1, s1, s3
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_mov_b32_e32 v1, s3 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]
; GFX9-NEXT: v_mov_b32_e32 v2, s0 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, -1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, -1, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v1, v3, -1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v1, v3, -1, vcc
; GFX9-NEXT: v_readfirstlane_b32 s0, v0 ; GFX9-NEXT: v_readfirstlane_b32 s0, v0
; GFX9-NEXT: v_readfirstlane_b32 s1, v1 ; GFX9-NEXT: v_readfirstlane_b32 s1, v1
▲ Show 20 Lines • Show All 171 Lines • ▼ Show 20 Lines
define amdgpu_ps <2 x i64> @s_uaddsat_v2i64(<2 x i64> inreg %lhs, <2 x i64> inreg %rhs) { define amdgpu_ps <2 x i64> @s_uaddsat_v2i64(<2 x i64> inreg %lhs, <2 x i64> inreg %rhs) {
; GFX6-LABEL: s_uaddsat_v2i64: ; GFX6-LABEL: s_uaddsat_v2i64:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_add_u32 s0, s0, s4 ; GFX6-NEXT: s_add_u32 s0, s0, s4
; GFX6-NEXT: s_cselect_b32 s8, 1, 0 ; GFX6-NEXT: s_cselect_b32 s8, 1, 0
; GFX6-NEXT: s_and_b32 s8, s8, 1 ; GFX6-NEXT: s_and_b32 s8, s8, 1
; GFX6-NEXT: s_cmp_lg_u32 s8, 0 ; GFX6-NEXT: s_cmp_lg_u32 s8, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: s_addc_u32 s1, s1, s5 ; GFX6-NEXT: s_addc_u32 s1, s1, s5
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: v_mov_b32_e32 v1, s5 ; GFX6-NEXT: v_mov_b32_e32 v1, s5
; GFX6-NEXT: v_mov_b32_e32 v2, s0 ; GFX6-NEXT: v_mov_b32_e32 v2, s0
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]
; GFX6-NEXT: s_add_u32 s0, s2, s6 ; GFX6-NEXT: s_add_u32 s0, s2, s6
; GFX6-NEXT: v_mov_b32_e32 v3, s1 ; GFX6-NEXT: v_mov_b32_e32 v3, s1
; GFX6-NEXT: s_cselect_b32 s1, 1, 0 ; GFX6-NEXT: s_cselect_b32 s1, 1, 0
; GFX6-NEXT: s_and_b32 s1, s1, 1 ; GFX6-NEXT: s_and_b32 s1, s1, 1
; GFX6-NEXT: s_cmp_lg_u32 s1, 0 ; GFX6-NEXT: s_cmp_lg_u32 s1, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s6
; GFX6-NEXT: s_addc_u32 s1, s3, s7 ; GFX6-NEXT: s_addc_u32 s1, s3, s7
; GFX6-NEXT: v_mov_b32_e32 v0, s6
; GFX6-NEXT: v_mov_b32_e32 v1, s7 ; GFX6-NEXT: v_mov_b32_e32 v1, s7
; GFX6-NEXT: v_cndmask_b32_e64 v2, v2, -1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v2, v2, -1, vcc
; GFX6-NEXT: v_cndmask_b32_e64 v3, v3, -1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v3, v3, -1, vcc
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]
; GFX6-NEXT: v_mov_b32_e32 v4, s0 ; GFX6-NEXT: v_mov_b32_e32 v4, s0
; GFX6-NEXT: v_mov_b32_e32 v5, s1 ; GFX6-NEXT: v_mov_b32_e32 v5, s1
; GFX6-NEXT: v_cndmask_b32_e64 v0, v4, -1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v0, v4, -1, vcc
; GFX6-NEXT: v_cndmask_b32_e64 v1, v5, -1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v1, v5, -1, vcc
; GFX6-NEXT: v_readfirstlane_b32 s0, v2 ; GFX6-NEXT: v_readfirstlane_b32 s0, v2
; GFX6-NEXT: v_readfirstlane_b32 s1, v3 ; GFX6-NEXT: v_readfirstlane_b32 s1, v3
; GFX6-NEXT: v_readfirstlane_b32 s2, v0 ; GFX6-NEXT: v_readfirstlane_b32 s2, v0
; GFX6-NEXT: v_readfirstlane_b32 s3, v1 ; GFX6-NEXT: v_readfirstlane_b32 s3, v1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_uaddsat_v2i64: ; GFX8-LABEL: s_uaddsat_v2i64:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_add_u32 s0, s0, s4 ; GFX8-NEXT: s_add_u32 s0, s0, s4
; GFX8-NEXT: s_cselect_b32 s8, 1, 0 ; GFX8-NEXT: s_cselect_b32 s8, 1, 0
; GFX8-NEXT: s_and_b32 s8, s8, 1 ; GFX8-NEXT: s_and_b32 s8, s8, 1
; GFX8-NEXT: s_cmp_lg_u32 s8, 0 ; GFX8-NEXT: s_cmp_lg_u32 s8, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: s_addc_u32 s1, s1, s5 ; GFX8-NEXT: s_addc_u32 s1, s1, s5
; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v1, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]
; GFX8-NEXT: s_add_u32 s0, s2, s6 ; GFX8-NEXT: s_add_u32 s0, s2, s6
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: s_cselect_b32 s1, 1, 0 ; GFX8-NEXT: s_cselect_b32 s1, 1, 0
; GFX8-NEXT: s_and_b32 s1, s1, 1 ; GFX8-NEXT: s_and_b32 s1, s1, 1
; GFX8-NEXT: s_cmp_lg_u32 s1, 0 ; GFX8-NEXT: s_cmp_lg_u32 s1, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: s_addc_u32 s1, s3, s7 ; GFX8-NEXT: s_addc_u32 s1, s3, s7
; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, -1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, -1, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, -1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, -1, vcc
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v4, s0 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
; GFX8-NEXT: v_mov_b32_e32 v5, s1 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
; GFX8-NEXT: v_cndmask_b32_e64 v0, v4, -1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, v4, -1, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v1, v5, -1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v1, v5, -1, vcc
; GFX8-NEXT: v_readfirstlane_b32 s0, v2 ; GFX8-NEXT: v_readfirstlane_b32 s0, v2
; GFX8-NEXT: v_readfirstlane_b32 s1, v3 ; GFX8-NEXT: v_readfirstlane_b32 s1, v3
; GFX8-NEXT: v_readfirstlane_b32 s2, v0 ; GFX8-NEXT: v_readfirstlane_b32 s2, v0
; GFX8-NEXT: v_readfirstlane_b32 s3, v1 ; GFX8-NEXT: v_readfirstlane_b32 s3, v1
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX9-LABEL: s_uaddsat_v2i64: ; GFX9-LABEL: s_uaddsat_v2i64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_add_u32 s0, s0, s4 ; GFX9-NEXT: s_add_u32 s0, s0, s4
; GFX9-NEXT: s_cselect_b32 s8, 1, 0 ; GFX9-NEXT: s_cselect_b32 s8, 1, 0
; GFX9-NEXT: s_and_b32 s8, s8, 1 ; GFX9-NEXT: s_and_b32 s8, s8, 1
; GFX9-NEXT: s_cmp_lg_u32 s8, 0 ; GFX9-NEXT: s_cmp_lg_u32 s8, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NEXT: s_addc_u32 s1, s1, s5 ; GFX9-NEXT: s_addc_u32 s1, s1, s5
; GFX9-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NEXT: v_mov_b32_e32 v1, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NEXT: v_mov_b32_e32 v2, s0 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]
; GFX9-NEXT: s_add_u32 s0, s2, s6 ; GFX9-NEXT: s_add_u32 s0, s2, s6
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: s_cselect_b32 s1, 1, 0 ; GFX9-NEXT: s_cselect_b32 s1, 1, 0
; GFX9-NEXT: s_and_b32 s1, s1, 1 ; GFX9-NEXT: s_and_b32 s1, s1, 1
; GFX9-NEXT: s_cmp_lg_u32 s1, 0 ; GFX9-NEXT: s_cmp_lg_u32 s1, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: s_addc_u32 s1, s3, s7 ; GFX9-NEXT: s_addc_u32 s1, s3, s7
; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, -1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, -1, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, -1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, -1, vcc
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]
; GFX9-NEXT: v_mov_b32_e32 v4, s0 ; GFX9-NEXT: v_mov_b32_e32 v4, s0
; GFX9-NEXT: v_mov_b32_e32 v5, s1 ; GFX9-NEXT: v_mov_b32_e32 v5, s1
; GFX9-NEXT: v_cndmask_b32_e64 v0, v4, -1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, v4, -1, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v1, v5, -1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v1, v5, -1, vcc
Show All 38 Lines
; GFX6-NEXT: s_and_b32 s8, s8, 1 ; GFX6-NEXT: s_and_b32 s8, s8, 1
; GFX6-NEXT: s_cmp_lg_u32 s8, 0 ; GFX6-NEXT: s_cmp_lg_u32 s8, 0
; GFX6-NEXT: s_addc_u32 s1, s1, s5 ; GFX6-NEXT: s_addc_u32 s1, s1, s5
; GFX6-NEXT: s_cselect_b32 s8, 1, 0 ; GFX6-NEXT: s_cselect_b32 s8, 1, 0
; GFX6-NEXT: s_and_b32 s8, s8, 1 ; GFX6-NEXT: s_and_b32 s8, s8, 1
; GFX6-NEXT: s_cmp_lg_u32 s8, 0 ; GFX6-NEXT: s_cmp_lg_u32 s8, 0
; GFX6-NEXT: s_addc_u32 s2, s2, s6 ; GFX6-NEXT: s_addc_u32 s2, s2, s6
; GFX6-NEXT: s_cselect_b32 s8, 1, 0 ; GFX6-NEXT: s_cselect_b32 s8, 1, 0
; GFX6-NEXT: v_mov_b32_e32 v2, s4
; GFX6-NEXT: s_and_b32 s8, s8, 1 ; GFX6-NEXT: s_and_b32 s8, s8, 1
; GFX6-NEXT: v_mov_b32_e32 v2, s4
; GFX6-NEXT: v_mov_b32_e32 v3, s5 ; GFX6-NEXT: v_mov_b32_e32 v3, s5
; GFX6-NEXT: s_cmp_lg_u32 s8, 0 ; GFX6-NEXT: s_cmp_lg_u32 s8, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s6
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX6-NEXT: s_addc_u32 s3, s3, s7 ; GFX6-NEXT: s_addc_u32 s3, s3, s7
; GFX6-NEXT: v_mov_b32_e32 v0, s6
; GFX6-NEXT: v_mov_b32_e32 v1, s7 ; GFX6-NEXT: v_mov_b32_e32 v1, s7
; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc
; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[0:1] ; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[0:1]
; GFX6-NEXT: v_mov_b32_e32 v1, s0 ; GFX6-NEXT: v_mov_b32_e32 v1, s0
; GFX6-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc
; GFX6-NEXT: v_and_b32_e32 v0, 1, v0 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v0
Show All 19 Lines
; GFX8-NEXT: s_cmp_lg_u32 s8, 0 ; GFX8-NEXT: s_cmp_lg_u32 s8, 0
; GFX8-NEXT: s_addc_u32 s1, s1, s5 ; GFX8-NEXT: s_addc_u32 s1, s1, s5
; GFX8-NEXT: s_cselect_b32 s8, 1, 0 ; GFX8-NEXT: s_cselect_b32 s8, 1, 0
; GFX8-NEXT: s_and_b32 s8, s8, 1 ; GFX8-NEXT: s_and_b32 s8, s8, 1
; GFX8-NEXT: s_cmp_lg_u32 s8, 0 ; GFX8-NEXT: s_cmp_lg_u32 s8, 0
; GFX8-NEXT: s_addc_u32 s2, s2, s6 ; GFX8-NEXT: s_addc_u32 s2, s2, s6
; GFX8-NEXT: s_cselect_b32 s8, 1, 0 ; GFX8-NEXT: s_cselect_b32 s8, 1, 0
; GFX8-NEXT: s_and_b32 s8, s8, 1 ; GFX8-NEXT: s_and_b32 s8, s8, 1
; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: s_cmp_lg_u32 s8, 0 ; GFX8-NEXT: s_cmp_lg_u32 s8, 0
; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s5 ; GFX8-NEXT: v_mov_b32_e32 v3, s5
; GFX8-NEXT: s_addc_u32 s3, s3, s7 ; GFX8-NEXT: s_addc_u32 s3, s3, s7
; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: s_cmp_eq_u64 s[2:3], s[6:7] ; GFX8-NEXT: s_cmp_eq_u64 s[2:3], s[6:7]
; GFX8-NEXT: s_cselect_b32 s6, 1, 0 ; GFX8-NEXT: s_cselect_b32 s6, 1, 0
; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX8-NEXT: s_and_b32 s4, 1, s6 ; GFX8-NEXT: s_and_b32 s4, 1, s6
; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4 ; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4
Show All 22 Lines
; GFX9-NEXT: s_cmp_lg_u32 s8, 0 ; GFX9-NEXT: s_cmp_lg_u32 s8, 0
; GFX9-NEXT: s_addc_u32 s1, s1, s5 ; GFX9-NEXT: s_addc_u32 s1, s1, s5
; GFX9-NEXT: s_cselect_b32 s8, 1, 0 ; GFX9-NEXT: s_cselect_b32 s8, 1, 0
; GFX9-NEXT: s_and_b32 s8, s8, 1 ; GFX9-NEXT: s_and_b32 s8, s8, 1
; GFX9-NEXT: s_cmp_lg_u32 s8, 0 ; GFX9-NEXT: s_cmp_lg_u32 s8, 0
; GFX9-NEXT: s_addc_u32 s2, s2, s6 ; GFX9-NEXT: s_addc_u32 s2, s2, s6
; GFX9-NEXT: s_cselect_b32 s8, 1, 0 ; GFX9-NEXT: s_cselect_b32 s8, 1, 0
; GFX9-NEXT: s_and_b32 s8, s8, 1 ; GFX9-NEXT: s_and_b32 s8, s8, 1
; GFX9-NEXT: v_mov_b32_e32 v2, s4
; GFX9-NEXT: s_cmp_lg_u32 s8, 0 ; GFX9-NEXT: s_cmp_lg_u32 s8, 0
; GFX9-NEXT: v_mov_b32_e32 v2, s4
; GFX9-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-NEXT: v_mov_b32_e32 v3, s5
; GFX9-NEXT: s_addc_u32 s3, s3, s7 ; GFX9-NEXT: s_addc_u32 s3, s3, s7
; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: s_cmp_eq_u64 s[2:3], s[6:7] ; GFX9-NEXT: s_cmp_eq_u64 s[2:3], s[6:7]
; GFX9-NEXT: s_cselect_b32 s6, 1, 0 ; GFX9-NEXT: s_cselect_b32 s6, 1, 0
; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX9-NEXT: s_and_b32 s4, 1, s6 ; GFX9-NEXT: s_and_b32 s4, 1, s6
; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4 ; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4
▲ Show 20 Lines • Show All 402 Lines • ▼ Show 20 Lines
; GFX6-NEXT: s_and_b32 s16, s16, 1 ; GFX6-NEXT: s_and_b32 s16, s16, 1
; GFX6-NEXT: s_cmp_lg_u32 s16, 0 ; GFX6-NEXT: s_cmp_lg_u32 s16, 0
; GFX6-NEXT: s_addc_u32 s1, s1, s9 ; GFX6-NEXT: s_addc_u32 s1, s1, s9
; GFX6-NEXT: s_cselect_b32 s16, 1, 0 ; GFX6-NEXT: s_cselect_b32 s16, 1, 0
; GFX6-NEXT: s_and_b32 s16, s16, 1 ; GFX6-NEXT: s_and_b32 s16, s16, 1
; GFX6-NEXT: s_cmp_lg_u32 s16, 0 ; GFX6-NEXT: s_cmp_lg_u32 s16, 0
; GFX6-NEXT: s_addc_u32 s2, s2, s10 ; GFX6-NEXT: s_addc_u32 s2, s2, s10
; GFX6-NEXT: s_cselect_b32 s16, 1, 0 ; GFX6-NEXT: s_cselect_b32 s16, 1, 0
; GFX6-NEXT: v_mov_b32_e32 v2, s8
; GFX6-NEXT: s_and_b32 s16, s16, 1 ; GFX6-NEXT: s_and_b32 s16, s16, 1
; GFX6-NEXT: v_mov_b32_e32 v2, s8
; GFX6-NEXT: v_mov_b32_e32 v3, s9 ; GFX6-NEXT: v_mov_b32_e32 v3, s9
; GFX6-NEXT: s_cmp_lg_u32 s16, 0 ; GFX6-NEXT: s_cmp_lg_u32 s16, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s10
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX6-NEXT: s_addc_u32 s3, s3, s11 ; GFX6-NEXT: s_addc_u32 s3, s3, s11
; GFX6-NEXT: v_mov_b32_e32 v0, s10
; GFX6-NEXT: v_mov_b32_e32 v1, s11 ; GFX6-NEXT: v_mov_b32_e32 v1, s11
; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc
; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[0:1] ; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[0:1]
; GFX6-NEXT: v_mov_b32_e32 v1, s0 ; GFX6-NEXT: v_mov_b32_e32 v1, s0
; GFX6-NEXT: s_add_u32 s0, s4, s12 ; GFX6-NEXT: s_add_u32 s0, s4, s12
; GFX6-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc
; GFX6-NEXT: v_mov_b32_e32 v2, s1 ; GFX6-NEXT: v_mov_b32_e32 v2, s1
; GFX6-NEXT: s_cselect_b32 s1, 1, 0 ; GFX6-NEXT: s_cselect_b32 s1, 1, 0
; GFX6-NEXT: s_and_b32 s1, s1, 1 ; GFX6-NEXT: s_and_b32 s1, s1, 1
; GFX6-NEXT: s_cmp_lg_u32 s1, 0 ; GFX6-NEXT: s_cmp_lg_u32 s1, 0
; GFX6-NEXT: v_and_b32_e32 v0, 1, v0 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v0
; GFX6-NEXT: s_addc_u32 s1, s5, s13 ; GFX6-NEXT: s_addc_u32 s1, s5, s13
; GFX6-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0 ; GFX6-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX6-NEXT: v_mov_b32_e32 v0, s2 ; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: s_cselect_b32 s2, 1, 0 ; GFX6-NEXT: s_cselect_b32 s2, 1, 0
; GFX6-NEXT: s_and_b32 s2, s2, 1 ; GFX6-NEXT: s_and_b32 s2, s2, 1
; GFX6-NEXT: s_cmp_lg_u32 s2, 0 ; GFX6-NEXT: s_cmp_lg_u32 s2, 0
; GFX6-NEXT: s_addc_u32 s2, s6, s14 ; GFX6-NEXT: s_addc_u32 s2, s6, s14
; GFX6-NEXT: v_cndmask_b32_e64 v4, v1, -1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v4, v1, -1, vcc
; GFX6-NEXT: v_cndmask_b32_e64 v5, v2, -1, vcc
; GFX6-NEXT: v_mov_b32_e32 v1, s3 ; GFX6-NEXT: v_mov_b32_e32 v1, s3
; GFX6-NEXT: s_cselect_b32 s3, 1, 0 ; GFX6-NEXT: s_cselect_b32 s3, 1, 0
; GFX6-NEXT: v_mov_b32_e32 v2, s12 ; GFX6-NEXT: v_cndmask_b32_e64 v5, v2, -1, vcc
; GFX6-NEXT: s_and_b32 s3, s3, 1 ; GFX6-NEXT: s_and_b32 s3, s3, 1
; GFX6-NEXT: v_mov_b32_e32 v2, s12
; GFX6-NEXT: v_mov_b32_e32 v3, s13 ; GFX6-NEXT: v_mov_b32_e32 v3, s13
; GFX6-NEXT: v_cndmask_b32_e64 v6, v0, -1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v6, v0, -1, vcc
; GFX6-NEXT: v_cndmask_b32_e64 v7, v1, -1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v7, v1, -1, vcc
; GFX6-NEXT: s_cmp_lg_u32 s3, 0 ; GFX6-NEXT: s_cmp_lg_u32 s3, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s14
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX6-NEXT: s_addc_u32 s3, s7, s15 ; GFX6-NEXT: s_addc_u32 s3, s7, s15
; GFX6-NEXT: v_mov_b32_e32 v0, s14
; GFX6-NEXT: v_mov_b32_e32 v1, s15 ; GFX6-NEXT: v_mov_b32_e32 v1, s15
; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc
; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[0:1] ; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[0:1]
; GFX6-NEXT: v_mov_b32_e32 v1, s0 ; GFX6-NEXT: v_mov_b32_e32 v1, s0
; GFX6-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc
; GFX6-NEXT: v_and_b32_e32 v0, 1, v0 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v0
Show All 23 Lines
; GFX8-NEXT: s_cmp_lg_u32 s16, 0 ; GFX8-NEXT: s_cmp_lg_u32 s16, 0
; GFX8-NEXT: s_addc_u32 s1, s1, s9 ; GFX8-NEXT: s_addc_u32 s1, s1, s9
; GFX8-NEXT: s_cselect_b32 s16, 1, 0 ; GFX8-NEXT: s_cselect_b32 s16, 1, 0
; GFX8-NEXT: s_and_b32 s16, s16, 1 ; GFX8-NEXT: s_and_b32 s16, s16, 1
; GFX8-NEXT: s_cmp_lg_u32 s16, 0 ; GFX8-NEXT: s_cmp_lg_u32 s16, 0
; GFX8-NEXT: s_addc_u32 s2, s2, s10 ; GFX8-NEXT: s_addc_u32 s2, s2, s10
; GFX8-NEXT: s_cselect_b32 s16, 1, 0 ; GFX8-NEXT: s_cselect_b32 s16, 1, 0
; GFX8-NEXT: s_and_b32 s16, s16, 1 ; GFX8-NEXT: s_and_b32 s16, s16, 1
; GFX8-NEXT: v_mov_b32_e32 v2, s8
; GFX8-NEXT: s_cmp_lg_u32 s16, 0 ; GFX8-NEXT: s_cmp_lg_u32 s16, 0
; GFX8-NEXT: v_mov_b32_e32 v2, s8
; GFX8-NEXT: v_mov_b32_e32 v3, s9 ; GFX8-NEXT: v_mov_b32_e32 v3, s9
; GFX8-NEXT: s_addc_u32 s3, s3, s11 ; GFX8-NEXT: s_addc_u32 s3, s3, s11
; GFX8-NEXT: v_mov_b32_e32 v0, s10
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX8-NEXT: v_mov_b32_e32 v0, s10
; GFX8-NEXT: v_mov_b32_e32 v1, s11 ; GFX8-NEXT: v_mov_b32_e32 v1, s11
; GFX8-NEXT: s_cmp_eq_u64 s[2:3], s[10:11] ; GFX8-NEXT: s_cmp_eq_u64 s[2:3], s[10:11]
; GFX8-NEXT: s_cselect_b32 s10, 1, 0 ; GFX8-NEXT: s_cselect_b32 s10, 1, 0
; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX8-NEXT: s_and_b32 s8, 1, s10 ; GFX8-NEXT: s_and_b32 s8, 1, s10
; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s8 ; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s8
Show All 10 Lines
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: s_cselect_b32 s2, 1, 0 ; GFX8-NEXT: s_cselect_b32 s2, 1, 0
; GFX8-NEXT: s_and_b32 s2, s2, 1 ; GFX8-NEXT: s_and_b32 s2, s2, 1
; GFX8-NEXT: s_cmp_lg_u32 s2, 0 ; GFX8-NEXT: s_cmp_lg_u32 s2, 0
; GFX8-NEXT: s_addc_u32 s2, s6, s14 ; GFX8-NEXT: s_addc_u32 s2, s6, s14
; GFX8-NEXT: v_cndmask_b32_e64 v4, v1, -1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v4, v1, -1, vcc
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: s_cselect_b32 s3, 1, 0 ; GFX8-NEXT: s_cselect_b32 s3, 1, 0
; GFX8-NEXT: v_cndmask_b32_e64 v5, v2, -1, vcc
; GFX8-NEXT: s_and_b32 s3, s3, 1 ; GFX8-NEXT: s_and_b32 s3, s3, 1
; GFX8-NEXT: v_mov_b32_e32 v2, s12 ; GFX8-NEXT: v_cndmask_b32_e64 v5, v2, -1, vcc
; GFX8-NEXT: s_cmp_lg_u32 s3, 0 ; GFX8-NEXT: s_cmp_lg_u32 s3, 0
; GFX8-NEXT: v_mov_b32_e32 v2, s12
; GFX8-NEXT: v_mov_b32_e32 v3, s13 ; GFX8-NEXT: v_mov_b32_e32 v3, s13
; GFX8-NEXT: v_cndmask_b32_e64 v6, v0, -1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v6, v0, -1, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v7, v1, -1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v7, v1, -1, vcc
; GFX8-NEXT: s_addc_u32 s3, s7, s15 ; GFX8-NEXT: s_addc_u32 s3, s7, s15
; GFX8-NEXT: v_mov_b32_e32 v0, s14
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX8-NEXT: v_mov_b32_e32 v0, s14
; GFX8-NEXT: v_mov_b32_e32 v1, s15 ; GFX8-NEXT: v_mov_b32_e32 v1, s15
; GFX8-NEXT: s_cmp_eq_u64 s[2:3], s[14:15] ; GFX8-NEXT: s_cmp_eq_u64 s[2:3], s[14:15]
; GFX8-NEXT: s_cselect_b32 s4, 1, 0 ; GFX8-NEXT: s_cselect_b32 s4, 1, 0
; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX8-NEXT: s_and_b32 s4, 1, s4 ; GFX8-NEXT: s_and_b32 s4, 1, s4
; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4 ; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4
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; GFX9-NEXT: s_cmp_lg_u32 s16, 0 ; GFX9-NEXT: s_cmp_lg_u32 s16, 0
; GFX9-NEXT: s_addc_u32 s1, s1, s9 ; GFX9-NEXT: s_addc_u32 s1, s1, s9
; GFX9-NEXT: s_cselect_b32 s16, 1, 0 ; GFX9-NEXT: s_cselect_b32 s16, 1, 0
; GFX9-NEXT: s_and_b32 s16, s16, 1 ; GFX9-NEXT: s_and_b32 s16, s16, 1
; GFX9-NEXT: s_cmp_lg_u32 s16, 0 ; GFX9-NEXT: s_cmp_lg_u32 s16, 0
; GFX9-NEXT: s_addc_u32 s2, s2, s10 ; GFX9-NEXT: s_addc_u32 s2, s2, s10
; GFX9-NEXT: s_cselect_b32 s16, 1, 0 ; GFX9-NEXT: s_cselect_b32 s16, 1, 0
; GFX9-NEXT: s_and_b32 s16, s16, 1 ; GFX9-NEXT: s_and_b32 s16, s16, 1
; GFX9-NEXT: v_mov_b32_e32 v2, s8
; GFX9-NEXT: s_cmp_lg_u32 s16, 0 ; GFX9-NEXT: s_cmp_lg_u32 s16, 0
; GFX9-NEXT: v_mov_b32_e32 v2, s8
; GFX9-NEXT: v_mov_b32_e32 v3, s9 ; GFX9-NEXT: v_mov_b32_e32 v3, s9
; GFX9-NEXT: s_addc_u32 s3, s3, s11 ; GFX9-NEXT: s_addc_u32 s3, s3, s11
; GFX9-NEXT: v_mov_b32_e32 v0, s10
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v0, s10
; GFX9-NEXT: v_mov_b32_e32 v1, s11 ; GFX9-NEXT: v_mov_b32_e32 v1, s11
; GFX9-NEXT: s_cmp_eq_u64 s[2:3], s[10:11] ; GFX9-NEXT: s_cmp_eq_u64 s[2:3], s[10:11]
; GFX9-NEXT: s_cselect_b32 s10, 1, 0 ; GFX9-NEXT: s_cselect_b32 s10, 1, 0
; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX9-NEXT: s_and_b32 s8, 1, s10 ; GFX9-NEXT: s_and_b32 s8, 1, s10
; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s8 ; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s8
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; GFX9-NEXT: v_mov_b32_e32 v0, s2 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: s_cselect_b32 s2, 1, 0 ; GFX9-NEXT: s_cselect_b32 s2, 1, 0
; GFX9-NEXT: s_and_b32 s2, s2, 1 ; GFX9-NEXT: s_and_b32 s2, s2, 1
; GFX9-NEXT: s_cmp_lg_u32 s2, 0 ; GFX9-NEXT: s_cmp_lg_u32 s2, 0
; GFX9-NEXT: s_addc_u32 s2, s6, s14 ; GFX9-NEXT: s_addc_u32 s2, s6, s14
; GFX9-NEXT: v_cndmask_b32_e64 v4, v1, -1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v4, v1, -1, vcc
; GFX9-NEXT: v_mov_b32_e32 v1, s3 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: s_cselect_b32 s3, 1, 0 ; GFX9-NEXT: s_cselect_b32 s3, 1, 0
; GFX9-NEXT: v_cndmask_b32_e64 v5, v2, -1, vcc
; GFX9-NEXT: s_and_b32 s3, s3, 1 ; GFX9-NEXT: s_and_b32 s3, s3, 1
; GFX9-NEXT: v_mov_b32_e32 v2, s12 ; GFX9-NEXT: v_cndmask_b32_e64 v5, v2, -1, vcc
; GFX9-NEXT: s_cmp_lg_u32 s3, 0 ; GFX9-NEXT: s_cmp_lg_u32 s3, 0
; GFX9-NEXT: v_mov_b32_e32 v2, s12
; GFX9-NEXT: v_mov_b32_e32 v3, s13 ; GFX9-NEXT: v_mov_b32_e32 v3, s13
; GFX9-NEXT: v_cndmask_b32_e64 v6, v0, -1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v6, v0, -1, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v7, v1, -1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v7, v1, -1, vcc
; GFX9-NEXT: s_addc_u32 s3, s7, s15 ; GFX9-NEXT: s_addc_u32 s3, s7, s15
; GFX9-NEXT: v_mov_b32_e32 v0, s14
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v0, s14
; GFX9-NEXT: v_mov_b32_e32 v1, s15 ; GFX9-NEXT: v_mov_b32_e32 v1, s15
; GFX9-NEXT: s_cmp_eq_u64 s[2:3], s[14:15] ; GFX9-NEXT: s_cmp_eq_u64 s[2:3], s[14:15]
; GFX9-NEXT: s_cselect_b32 s4, 1, 0 ; GFX9-NEXT: s_cselect_b32 s4, 1, 0
; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX9-NEXT: s_and_b32 s4, 1, s4 ; GFX9-NEXT: s_and_b32 s4, 1, s4
; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4 ; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4
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llvm/test/CodeGen/AMDGPU/GlobalISel/udivrem.ll

Show All 26 Lines
; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2 ; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2
; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: flat_store_dword v[0:1], v3 ; GFX8-NEXT: flat_store_dword v[0:1], v3
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udivrem_i32: ; GFX9-LABEL: udivrem_i32:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x10 ; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x10
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
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; GFX8-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v12, 0, -1, s[0:1]
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], s11, v8 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], s11, v8
; GFX8-NEXT: v_subrev_u32_e32 v6, vcc, s10, v7 ; GFX8-NEXT: v_subrev_u32_e32 v6, vcc, s10, v7
; GFX8-NEXT: v_cndmask_b32_e64 v11, v11, v12, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v11, v11, v12, s[0:1]
; GFX8-NEXT: v_add_u32_e64 v12, s[0:1], 1, v9 ; GFX8-NEXT: v_add_u32_e64 v12, s[0:1], 1, v9
; GFX8-NEXT: v_subbrev_u32_e32 v2, vcc, 0, v2, vcc ; GFX8-NEXT: v_subbrev_u32_e32 v2, vcc, 0, v2, vcc
; GFX8-NEXT: v_addc_u32_e64 v13, s[0:1], 0, v10, s[0:1] ; GFX8-NEXT: v_addc_u32_e64 v13, s[0:1], 0, v10, s[0:1]
; GFX8-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11 ; GFX8-NEXT: v_cmp_ne_u32_e32 vcc, 0, v11
; GFX8-NEXT: v_cndmask_b32_e32 v9, v9, v12, vcc
; GFX8-NEXT: v_cndmask_b32_e32 v10, v10, v13, vcc
; GFX8-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5 ; GFX8-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v5
; GFX8-NEXT: v_cndmask_b32_e32 v5, v7, v6, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v5, v7, v6, vcc
; GFX8-NEXT: v_cndmask_b32_e32 v6, v8, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v6, v8, v2, vcc
; GFX8-NEXT: v_cndmask_b32_e32 v9, v9, v12, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v9, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e32 v10, v10, v13, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v10, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v2, v3, v5, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v3, v5, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v3, v4, v6, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v4, v6, s[0:1]
; GFX8-NEXT: v_mov_b32_e32 v4, s4 ; GFX8-NEXT: v_mov_b32_e32 v4, s4
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v9, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v10, s[0:1]
; GFX8-NEXT: v_mov_b32_e32 v5, s5 ; GFX8-NEXT: v_mov_b32_e32 v5, s5
; GFX8-NEXT: flat_store_dwordx2 v[4:5], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[4:5], v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v0, s6 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udivrem_i64: ; GFX9-LABEL: udivrem_i64:
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define amdgpu_kernel void @udivrem_v2i32(<2 x i32> addrspace(1)* %out0, <2 x i32> addrspace(1)* %out1, <2 x i32> %x, <2 x i32> %y) { define amdgpu_kernel void @udivrem_v2i32(<2 x i32> addrspace(1)* %out0, <2 x i32> addrspace(1)* %out1, <2 x i32> %x, <2 x i32> %y) {
; GFX8-LABEL: udivrem_v2i32: ; GFX8-LABEL: udivrem_v2i32:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x18 ; GFX8-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x18
; GFX8-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x0 ; GFX8-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x0
; GFX8-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x10 ; GFX8-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x10
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v5, s9
; GFX8-NEXT: v_cvt_f32_u32_e32 v0, s2 ; GFX8-NEXT: v_cvt_f32_u32_e32 v0, s2
; GFX8-NEXT: v_cvt_f32_u32_e32 v1, s3 ; GFX8-NEXT: v_cvt_f32_u32_e32 v1, s3
; GFX8-NEXT: s_sub_i32 s0, 0, s2 ; GFX8-NEXT: s_sub_i32 s0, 0, s2
; GFX8-NEXT: v_rcp_iflag_f32_e32 v0, v0 ; GFX8-NEXT: v_rcp_iflag_f32_e32 v0, v0
; GFX8-NEXT: v_rcp_iflag_f32_e32 v1, v1 ; GFX8-NEXT: v_rcp_iflag_f32_e32 v1, v1
; GFX8-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 ; GFX8-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
; GFX8-NEXT: v_cvt_u32_f32_e32 v0, v0 ; GFX8-NEXT: v_cvt_u32_f32_e32 v0, v0
; GFX8-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v1 ; GFX8-NEXT: v_mul_f32_e32 v1, 0x4f7ffffe, v1
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; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s3, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s3, v3
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v1 ; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v1
; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s3, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s3, v3
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s3, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s3, v3
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_mov_b32_e32 v4, s8 ; GFX8-NEXT: v_mov_b32_e32 v4, s8
; GFX8-NEXT: v_mov_b32_e32 v5, s9
; GFX8-NEXT: flat_store_dwordx2 v[4:5], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[4:5], v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v0, s10 ; GFX8-NEXT: v_mov_b32_e32 v0, s10
; GFX8-NEXT: v_mov_b32_e32 v1, s11 ; GFX8-NEXT: v_mov_b32_e32 v1, s11
; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; GFX8-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udivrem_v2i32: ; GFX9-LABEL: udivrem_v2i32:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
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; GFX8-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x10 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x10
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_cvt_f32_u32_e32 v0, s8 ; GFX8-NEXT: v_cvt_f32_u32_e32 v0, s8
; GFX8-NEXT: v_cvt_f32_u32_e32 v1, s9 ; GFX8-NEXT: v_cvt_f32_u32_e32 v1, s9
; GFX8-NEXT: s_sub_i32 s0, 0, s8 ; GFX8-NEXT: s_sub_i32 s0, 0, s8
; GFX8-NEXT: v_cvt_f32_u32_e32 v6, s10 ; GFX8-NEXT: v_cvt_f32_u32_e32 v6, s10
; GFX8-NEXT: v_rcp_iflag_f32_e32 v0, v0 ; GFX8-NEXT: v_rcp_iflag_f32_e32 v0, v0
; GFX8-NEXT: v_rcp_iflag_f32_e32 v1, v1 ; GFX8-NEXT: v_rcp_iflag_f32_e32 v1, v1
; GFX8-NEXT: v_mov_b32_e32 v9, s13
; GFX8-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0 ; GFX8-NEXT: v_mul_f32_e32 v0, 0x4f7ffffe, v0
; GFX8-NEXT: v_cvt_u32_f32_e32 v0, v0 ; GFX8-NEXT: v_cvt_u32_f32_e32 v0, v0
; GFX8-NEXT: v_mul_f32_e32 v1, v1, v2 ; GFX8-NEXT: v_mul_f32_e32 v1, v1, v2
; GFX8-NEXT: v_cvt_u32_f32_e32 v1, v1 ; GFX8-NEXT: v_cvt_u32_f32_e32 v1, v1
; GFX8-NEXT: v_mul_lo_u32 v3, s0, v0 ; GFX8-NEXT: v_mul_lo_u32 v3, s0, v0
; GFX8-NEXT: s_sub_i32 s0, 0, s9 ; GFX8-NEXT: s_sub_i32 s0, 0, s9
; GFX8-NEXT: v_mul_lo_u32 v4, s0, v1 ; GFX8-NEXT: v_mul_lo_u32 v4, s0, v1
; GFX8-NEXT: v_mul_hi_u32 v3, v0, v3 ; GFX8-NEXT: v_mul_hi_u32 v3, v0, v3
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; GFX8-NEXT: v_subrev_u32_e64 v8, s[0:1], s11, v3 ; GFX8-NEXT: v_subrev_u32_e64 v8, s[0:1], s11, v3
; GFX8-NEXT: v_cndmask_b32_e32 v8, v3, v8, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v8, v3, v8, vcc
; GFX8-NEXT: v_add_u32_e32 v3, vcc, 1, v7 ; GFX8-NEXT: v_add_u32_e32 v3, vcc, 1, v7
; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s11, v8 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s11, v8
; GFX8-NEXT: v_cndmask_b32_e32 v3, v7, v3, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v7, v3, vcc
; GFX8-NEXT: v_subrev_u32_e64 v7, s[0:1], s11, v8 ; GFX8-NEXT: v_subrev_u32_e64 v7, s[0:1], s11, v8
; GFX8-NEXT: v_cndmask_b32_e32 v7, v8, v7, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v7, v8, v7, vcc
; GFX8-NEXT: v_mov_b32_e32 v8, s12 ; GFX8-NEXT: v_mov_b32_e32 v8, s12
; GFX8-NEXT: v_mov_b32_e32 v9, s13
; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; GFX8-NEXT: s_nop 0 ; GFX8-NEXT: s_nop 0
; GFX8-NEXT: v_mov_b32_e32 v0, s14 ; GFX8-NEXT: v_mov_b32_e32 v0, s14
; GFX8-NEXT: v_mov_b32_e32 v1, s15 ; GFX8-NEXT: v_mov_b32_e32 v1, s15
; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[4:7] ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udivrem_v4i32: ; GFX9-LABEL: udivrem_v4i32:
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; GFX8-NEXT: v_addc_u32_e64 v15, s[0:1], 0, v3, s[0:1] ; GFX8-NEXT: v_addc_u32_e64 v15, s[0:1], 0, v3, s[0:1]
; GFX8-NEXT: v_add_u32_e32 v10, vcc, 1, v14 ; GFX8-NEXT: v_add_u32_e32 v10, vcc, 1, v14
; GFX8-NEXT: v_addc_u32_e32 v16, vcc, 0, v15, vcc ; GFX8-NEXT: v_addc_u32_e32 v16, vcc, 0, v15, vcc
; GFX8-NEXT: v_cmp_ne_u32_e32 vcc, 0, v13 ; GFX8-NEXT: v_cmp_ne_u32_e32 vcc, 0, v13
; GFX8-NEXT: v_subrev_u32_e64 v13, s[0:1], s10, v11 ; GFX8-NEXT: v_subrev_u32_e64 v13, s[0:1], s10, v11
; GFX8-NEXT: v_subbrev_u32_e64 v6, s[0:1], 0, v6, s[0:1] ; GFX8-NEXT: v_subbrev_u32_e64 v6, s[0:1], 0, v6, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e32 v10, v14, v10, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v10, v14, v10, vcc
; GFX8-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v9 ; GFX8-NEXT: v_cmp_ne_u32_e64 s[0:1], 0, v9
; GFX8-NEXT: v_cndmask_b32_e32 v14, v15, v16, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v10, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v10, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e32 v9, v11, v13, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v9, v11, v13, vcc
; GFX8-NEXT: v_cndmask_b32_e32 v10, v12, v6, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v10, v12, v6, vcc
; GFX8-NEXT: v_cndmask_b32_e32 v14, v15, v16, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v14, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v6, v7, v9, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v6, v7, v9, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v7, v8, v10, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v7, v8, v10, s[0:1]
; GFX8-NEXT: v_mov_b32_e32 v9, s5 ; GFX8-NEXT: v_mov_b32_e32 v9, s5
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v14, s[0:1]
; GFX8-NEXT: v_mov_b32_e32 v8, s4 ; GFX8-NEXT: v_mov_b32_e32 v8, s4
; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; GFX8-NEXT: s_nop 0 ; GFX8-NEXT: s_nop 0
; GFX8-NEXT: v_mov_b32_e32 v0, s6 ; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[4:7] ; GFX8-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
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; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s6, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s6, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s6, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s6, v3
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2 ; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2
; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s6, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s6, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s6, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s6, v3
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: flat_store_byte v[0:1], v2 ; GFX8-NEXT: flat_store_byte v[0:1], v2
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: flat_store_byte v[0:1], v3 ; GFX8-NEXT: flat_store_byte v[0:1], v3
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udiv_i8: ; GFX9-LABEL: udiv_i8:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dword s0, s[4:5], 0x10 ; GFX9-NEXT: s_load_dword s0, s[4:5], 0x10
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
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; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s6, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s6, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s6, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s6, v3
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2 ; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2
; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s6, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s6, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s6, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s6, v3
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: flat_store_short v[0:1], v2 ; GFX8-NEXT: flat_store_short v[0:1], v2
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: flat_store_short v[0:1], v3 ; GFX8-NEXT: flat_store_short v[0:1], v3
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udiv_i16: ; GFX9-LABEL: udiv_i16:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dword s0, s[4:5], 0x10 ; GFX9-NEXT: s_load_dword s0, s[4:5], 0x10
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
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; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s6, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s6, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s6, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s6, v3
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2 ; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2
; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s6, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s6, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s6, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s6, v3
; GFX8-NEXT: v_and_b32_e32 v2, 7, v2
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_and_b32_e32 v2, 7, v2
; GFX8-NEXT: flat_store_byte v[0:1], v2 ; GFX8-NEXT: flat_store_byte v[0:1], v2
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_and_b32_e32 v2, 7, v3 ; GFX8-NEXT: v_and_b32_e32 v2, 7, v3
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: flat_store_byte v[0:1], v2 ; GFX8-NEXT: flat_store_byte v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udivrem_i3: ; GFX9-LABEL: udivrem_i3:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dword s0, s[4:5], 0x10 ; GFX9-NEXT: s_load_dword s0, s[4:5], 0x10
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
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; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2 ; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2
; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3 ; GFX8-NEXT: v_cmp_le_u32_e32 vcc, s7, v3
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3 ; GFX8-NEXT: v_subrev_u32_e64 v4, s[0:1], s7, v3
; GFX8-NEXT: v_and_b32_e32 v2, s6, v2
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_and_b32_e32 v2, s6, v2
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_and_b32_e32 v2, s6, v3 ; GFX8-NEXT: v_and_b32_e32 v2, s6, v3
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: udivrem_i27: ; GFX9-LABEL: udivrem_i27:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x10 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x10
; GFX9-NEXT: s_mov_b32 s6, 0x7ffffff ; GFX9-NEXT: s_mov_b32 s6, 0x7ffffff
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llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll

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} }
define amdgpu_ps i64 @s_usubsat_i64(i64 inreg %lhs, i64 inreg %rhs) { define amdgpu_ps i64 @s_usubsat_i64(i64 inreg %lhs, i64 inreg %rhs) {
; GFX6-LABEL: s_usubsat_i64: ; GFX6-LABEL: s_usubsat_i64:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_sub_u32 s4, s0, s2 ; GFX6-NEXT: s_sub_u32 s4, s0, s2
; GFX6-NEXT: s_cselect_b32 s5, 1, 0 ; GFX6-NEXT: s_cselect_b32 s5, 1, 0
; GFX6-NEXT: s_and_b32 s5, s5, 1 ; GFX6-NEXT: s_and_b32 s5, s5, 1
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: s_cmp_lg_u32 s5, 0 ; GFX6-NEXT: s_cmp_lg_u32 s5, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s2
; GFX6-NEXT: v_mov_b32_e32 v1, s3 ; GFX6-NEXT: v_mov_b32_e32 v1, s3
; GFX6-NEXT: s_subb_u32 s5, s1, s3 ; GFX6-NEXT: s_subb_u32 s5, s1, s3
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]
; GFX6-NEXT: v_mov_b32_e32 v2, s4 ; GFX6-NEXT: v_mov_b32_e32 v2, s4
; GFX6-NEXT: v_mov_b32_e32 v3, s5 ; GFX6-NEXT: v_mov_b32_e32 v3, s5
; GFX6-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc
; GFX6-NEXT: v_cndmask_b32_e64 v1, v3, 0, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v1, v3, 0, vcc
; GFX6-NEXT: v_readfirstlane_b32 s0, v0 ; GFX6-NEXT: v_readfirstlane_b32 s0, v0
; GFX6-NEXT: v_readfirstlane_b32 s1, v1 ; GFX6-NEXT: v_readfirstlane_b32 s1, v1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_usubsat_i64: ; GFX8-LABEL: s_usubsat_i64:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_sub_u32 s4, s0, s2 ; GFX8-NEXT: s_sub_u32 s4, s0, s2
; GFX8-NEXT: s_cselect_b32 s5, 1, 0 ; GFX8-NEXT: s_cselect_b32 s5, 1, 0
; GFX8-NEXT: s_and_b32 s5, s5, 1 ; GFX8-NEXT: s_and_b32 s5, s5, 1
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: s_cmp_lg_u32 s5, 0 ; GFX8-NEXT: s_cmp_lg_u32 s5, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: s_subb_u32 s5, s1, s3 ; GFX8-NEXT: s_subb_u32 s5, s1, s3
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s5 ; GFX8-NEXT: v_mov_b32_e32 v3, s5
; GFX8-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v1, v3, 0, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v1, v3, 0, vcc
; GFX8-NEXT: v_readfirstlane_b32 s0, v0 ; GFX8-NEXT: v_readfirstlane_b32 s0, v0
; GFX8-NEXT: v_readfirstlane_b32 s1, v1 ; GFX8-NEXT: v_readfirstlane_b32 s1, v1
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX9-LABEL: s_usubsat_i64: ; GFX9-LABEL: s_usubsat_i64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_sub_u32 s4, s0, s2 ; GFX9-NEXT: s_sub_u32 s4, s0, s2
; GFX9-NEXT: s_cselect_b32 s5, 1, 0 ; GFX9-NEXT: s_cselect_b32 s5, 1, 0
; GFX9-NEXT: s_and_b32 s5, s5, 1 ; GFX9-NEXT: s_and_b32 s5, s5, 1
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: s_cmp_lg_u32 s5, 0 ; GFX9-NEXT: s_cmp_lg_u32 s5, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s2
; GFX9-NEXT: v_mov_b32_e32 v1, s3 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: s_subb_u32 s5, s1, s3 ; GFX9-NEXT: s_subb_u32 s5, s1, s3
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]
; GFX9-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-NEXT: v_mov_b32_e32 v2, s4
; GFX9-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-NEXT: v_mov_b32_e32 v3, s5
; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, v2, 0, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v1, v3, 0, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v1, v3, 0, vcc
; GFX9-NEXT: v_readfirstlane_b32 s0, v0 ; GFX9-NEXT: v_readfirstlane_b32 s0, v0
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define amdgpu_ps <2 x i64> @s_usubsat_v2i64(<2 x i64> inreg %lhs, <2 x i64> inreg %rhs) { define amdgpu_ps <2 x i64> @s_usubsat_v2i64(<2 x i64> inreg %lhs, <2 x i64> inreg %rhs) {
; GFX6-LABEL: s_usubsat_v2i64: ; GFX6-LABEL: s_usubsat_v2i64:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_sub_u32 s8, s0, s4 ; GFX6-NEXT: s_sub_u32 s8, s0, s4
; GFX6-NEXT: s_cselect_b32 s9, 1, 0 ; GFX6-NEXT: s_cselect_b32 s9, 1, 0
; GFX6-NEXT: s_and_b32 s9, s9, 1 ; GFX6-NEXT: s_and_b32 s9, s9, 1
; GFX6-NEXT: s_cmp_lg_u32 s9, 0 ; GFX6-NEXT: s_cmp_lg_u32 s9, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: s_subb_u32 s9, s1, s5 ; GFX6-NEXT: s_subb_u32 s9, s1, s5
; GFX6-NEXT: v_mov_b32_e32 v0, s4
; GFX6-NEXT: v_mov_b32_e32 v1, s5 ; GFX6-NEXT: v_mov_b32_e32 v1, s5
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]
; GFX6-NEXT: s_sub_u32 s0, s2, s6 ; GFX6-NEXT: s_sub_u32 s0, s2, s6
; GFX6-NEXT: s_cselect_b32 s1, 1, 0 ; GFX6-NEXT: s_cselect_b32 s1, 1, 0
; GFX6-NEXT: s_and_b32 s1, s1, 1 ; GFX6-NEXT: s_and_b32 s1, s1, 1
; GFX6-NEXT: v_mov_b32_e32 v0, s6
; GFX6-NEXT: v_mov_b32_e32 v2, s8 ; GFX6-NEXT: v_mov_b32_e32 v2, s8
; GFX6-NEXT: v_mov_b32_e32 v3, s9 ; GFX6-NEXT: v_mov_b32_e32 v3, s9
; GFX6-NEXT: s_cmp_lg_u32 s1, 0 ; GFX6-NEXT: s_cmp_lg_u32 s1, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s6
; GFX6-NEXT: v_mov_b32_e32 v1, s7 ; GFX6-NEXT: v_mov_b32_e32 v1, s7
; GFX6-NEXT: v_cndmask_b32_e64 v2, v2, 0, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v2, v2, 0, vcc
; GFX6-NEXT: v_cndmask_b32_e64 v3, v3, 0, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v3, v3, 0, vcc
; GFX6-NEXT: s_subb_u32 s1, s3, s7 ; GFX6-NEXT: s_subb_u32 s1, s3, s7
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX6-NEXT: v_mov_b32_e32 v4, s0 ; GFX6-NEXT: v_mov_b32_e32 v4, s0
; GFX6-NEXT: v_mov_b32_e32 v5, s1 ; GFX6-NEXT: v_mov_b32_e32 v5, s1
; GFX6-NEXT: v_cndmask_b32_e64 v0, v4, 0, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v0, v4, 0, vcc
; GFX6-NEXT: v_cndmask_b32_e64 v1, v5, 0, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v1, v5, 0, vcc
; GFX6-NEXT: v_readfirstlane_b32 s0, v2 ; GFX6-NEXT: v_readfirstlane_b32 s0, v2
; GFX6-NEXT: v_readfirstlane_b32 s1, v3 ; GFX6-NEXT: v_readfirstlane_b32 s1, v3
; GFX6-NEXT: v_readfirstlane_b32 s2, v0 ; GFX6-NEXT: v_readfirstlane_b32 s2, v0
; GFX6-NEXT: v_readfirstlane_b32 s3, v1 ; GFX6-NEXT: v_readfirstlane_b32 s3, v1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_usubsat_v2i64: ; GFX8-LABEL: s_usubsat_v2i64:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_sub_u32 s8, s0, s4 ; GFX8-NEXT: s_sub_u32 s8, s0, s4
; GFX8-NEXT: s_cselect_b32 s9, 1, 0 ; GFX8-NEXT: s_cselect_b32 s9, 1, 0
; GFX8-NEXT: s_and_b32 s9, s9, 1 ; GFX8-NEXT: s_and_b32 s9, s9, 1
; GFX8-NEXT: s_cmp_lg_u32 s9, 0 ; GFX8-NEXT: s_cmp_lg_u32 s9, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: s_subb_u32 s9, s1, s5 ; GFX8-NEXT: s_subb_u32 s9, s1, s5
; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v1, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]
; GFX8-NEXT: s_sub_u32 s0, s2, s6 ; GFX8-NEXT: s_sub_u32 s0, s2, s6
; GFX8-NEXT: s_cselect_b32 s1, 1, 0 ; GFX8-NEXT: s_cselect_b32 s1, 1, 0
; GFX8-NEXT: s_and_b32 s1, s1, 1 ; GFX8-NEXT: s_and_b32 s1, s1, 1
; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v2, s8 ; GFX8-NEXT: v_mov_b32_e32 v2, s8
; GFX8-NEXT: v_mov_b32_e32 v3, s9 ; GFX8-NEXT: v_mov_b32_e32 v3, s9
; GFX8-NEXT: s_cmp_lg_u32 s1, 0 ; GFX8-NEXT: s_cmp_lg_u32 s1, 0
; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, 0, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, 0, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, 0, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, 0, vcc
; GFX8-NEXT: s_subb_u32 s1, s3, s7 ; GFX8-NEXT: s_subb_u32 s1, s3, s7
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v4, s0 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
; GFX8-NEXT: v_mov_b32_e32 v5, s1 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
; GFX8-NEXT: v_cndmask_b32_e64 v0, v4, 0, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, v4, 0, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v1, v5, 0, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v1, v5, 0, vcc
; GFX8-NEXT: v_readfirstlane_b32 s0, v2 ; GFX8-NEXT: v_readfirstlane_b32 s0, v2
; GFX8-NEXT: v_readfirstlane_b32 s1, v3 ; GFX8-NEXT: v_readfirstlane_b32 s1, v3
; GFX8-NEXT: v_readfirstlane_b32 s2, v0 ; GFX8-NEXT: v_readfirstlane_b32 s2, v0
; GFX8-NEXT: v_readfirstlane_b32 s3, v1 ; GFX8-NEXT: v_readfirstlane_b32 s3, v1
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX9-LABEL: s_usubsat_v2i64: ; GFX9-LABEL: s_usubsat_v2i64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_sub_u32 s8, s0, s4 ; GFX9-NEXT: s_sub_u32 s8, s0, s4
; GFX9-NEXT: s_cselect_b32 s9, 1, 0 ; GFX9-NEXT: s_cselect_b32 s9, 1, 0
; GFX9-NEXT: s_and_b32 s9, s9, 1 ; GFX9-NEXT: s_and_b32 s9, s9, 1
; GFX9-NEXT: s_cmp_lg_u32 s9, 0 ; GFX9-NEXT: s_cmp_lg_u32 s9, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NEXT: s_subb_u32 s9, s1, s5 ; GFX9-NEXT: s_subb_u32 s9, s1, s5
; GFX9-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NEXT: v_mov_b32_e32 v1, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[0:1]
; GFX9-NEXT: s_sub_u32 s0, s2, s6 ; GFX9-NEXT: s_sub_u32 s0, s2, s6
; GFX9-NEXT: s_cselect_b32 s1, 1, 0 ; GFX9-NEXT: s_cselect_b32 s1, 1, 0
; GFX9-NEXT: s_and_b32 s1, s1, 1 ; GFX9-NEXT: s_and_b32 s1, s1, 1
; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_mov_b32_e32 v2, s8 ; GFX9-NEXT: v_mov_b32_e32 v2, s8
; GFX9-NEXT: v_mov_b32_e32 v3, s9 ; GFX9-NEXT: v_mov_b32_e32 v3, s9
; GFX9-NEXT: s_cmp_lg_u32 s1, 0 ; GFX9-NEXT: s_cmp_lg_u32 s1, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, 0, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, 0, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, 0, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, 0, vcc
; GFX9-NEXT: s_subb_u32 s1, s3, s7 ; GFX9-NEXT: s_subb_u32 s1, s3, s7
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX9-NEXT: v_mov_b32_e32 v4, s0 ; GFX9-NEXT: v_mov_b32_e32 v4, s0
; GFX9-NEXT: v_mov_b32_e32 v5, s1 ; GFX9-NEXT: v_mov_b32_e32 v5, s1
; GFX9-NEXT: v_cndmask_b32_e64 v0, v4, 0, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, v4, 0, vcc
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} }
define amdgpu_ps i128 @s_usubsat_i128(i128 inreg %lhs, i128 inreg %rhs) { define amdgpu_ps i128 @s_usubsat_i128(i128 inreg %lhs, i128 inreg %rhs) {
; GFX6-LABEL: s_usubsat_i128: ; GFX6-LABEL: s_usubsat_i128:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_sub_u32 s8, s0, s4 ; GFX6-NEXT: s_sub_u32 s8, s0, s4
; GFX6-NEXT: s_cselect_b32 s9, 1, 0 ; GFX6-NEXT: s_cselect_b32 s9, 1, 0
; GFX6-NEXT: s_and_b32 s9, s9, 1 ; GFX6-NEXT: s_and_b32 s9, s9, 1
; GFX6-NEXT: v_mov_b32_e32 v2, s4
; GFX6-NEXT: s_cmp_lg_u32 s9, 0 ; GFX6-NEXT: s_cmp_lg_u32 s9, 0
; GFX6-NEXT: v_mov_b32_e32 v2, s4
; GFX6-NEXT: v_mov_b32_e32 v3, s5 ; GFX6-NEXT: v_mov_b32_e32 v3, s5
; GFX6-NEXT: s_subb_u32 s9, s1, s5 ; GFX6-NEXT: s_subb_u32 s9, s1, s5
; GFX6-NEXT: v_mov_b32_e32 v0, s6
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX6-NEXT: s_cselect_b32 s10, 1, 0 ; GFX6-NEXT: s_cselect_b32 s10, 1, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s6
; GFX6-NEXT: v_mov_b32_e32 v1, s7 ; GFX6-NEXT: v_mov_b32_e32 v1, s7
; GFX6-NEXT: s_and_b32 s10, s10, 1 ; GFX6-NEXT: s_and_b32 s10, s10, 1
; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX6-NEXT: s_cmp_lg_u32 s10, 0 ; GFX6-NEXT: s_cmp_lg_u32 s10, 0
; GFX6-NEXT: s_subb_u32 s10, s2, s6 ; GFX6-NEXT: s_subb_u32 s10, s2, s6
; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc
; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[0:1] ; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[0:1]
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; GFX8-NEXT: s_cmp_lg_u32 s9, 0 ; GFX8-NEXT: s_cmp_lg_u32 s9, 0
; GFX8-NEXT: s_subb_u32 s9, s1, s5 ; GFX8-NEXT: s_subb_u32 s9, s1, s5
; GFX8-NEXT: s_cselect_b32 s10, 1, 0 ; GFX8-NEXT: s_cselect_b32 s10, 1, 0
; GFX8-NEXT: s_and_b32 s10, s10, 1 ; GFX8-NEXT: s_and_b32 s10, s10, 1
; GFX8-NEXT: s_cmp_lg_u32 s10, 0 ; GFX8-NEXT: s_cmp_lg_u32 s10, 0
; GFX8-NEXT: s_subb_u32 s10, s2, s6 ; GFX8-NEXT: s_subb_u32 s10, s2, s6
; GFX8-NEXT: s_cselect_b32 s11, 1, 0 ; GFX8-NEXT: s_cselect_b32 s11, 1, 0
; GFX8-NEXT: s_and_b32 s11, s11, 1 ; GFX8-NEXT: s_and_b32 s11, s11, 1
; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: s_cmp_lg_u32 s11, 0 ; GFX8-NEXT: s_cmp_lg_u32 s11, 0
; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s5 ; GFX8-NEXT: v_mov_b32_e32 v3, s5
; GFX8-NEXT: s_subb_u32 s11, s3, s7 ; GFX8-NEXT: s_subb_u32 s11, s3, s7
; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX8-NEXT: v_mov_b32_e32 v0, s6
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: s_cmp_eq_u64 s[2:3], s[6:7] ; GFX8-NEXT: s_cmp_eq_u64 s[2:3], s[6:7]
; GFX8-NEXT: s_cselect_b32 s6, 1, 0 ; GFX8-NEXT: s_cselect_b32 s6, 1, 0
; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX8-NEXT: s_and_b32 s0, 1, s6 ; GFX8-NEXT: s_and_b32 s0, 1, s6
; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0 ; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0
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; GFX9-NEXT: s_cmp_lg_u32 s9, 0 ; GFX9-NEXT: s_cmp_lg_u32 s9, 0
; GFX9-NEXT: s_subb_u32 s9, s1, s5 ; GFX9-NEXT: s_subb_u32 s9, s1, s5
; GFX9-NEXT: s_cselect_b32 s10, 1, 0 ; GFX9-NEXT: s_cselect_b32 s10, 1, 0
; GFX9-NEXT: s_and_b32 s10, s10, 1 ; GFX9-NEXT: s_and_b32 s10, s10, 1
; GFX9-NEXT: s_cmp_lg_u32 s10, 0 ; GFX9-NEXT: s_cmp_lg_u32 s10, 0
; GFX9-NEXT: s_subb_u32 s10, s2, s6 ; GFX9-NEXT: s_subb_u32 s10, s2, s6
; GFX9-NEXT: s_cselect_b32 s11, 1, 0 ; GFX9-NEXT: s_cselect_b32 s11, 1, 0
; GFX9-NEXT: s_and_b32 s11, s11, 1 ; GFX9-NEXT: s_and_b32 s11, s11, 1
; GFX9-NEXT: v_mov_b32_e32 v2, s4
; GFX9-NEXT: s_cmp_lg_u32 s11, 0 ; GFX9-NEXT: s_cmp_lg_u32 s11, 0
; GFX9-NEXT: v_mov_b32_e32 v2, s4
; GFX9-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-NEXT: v_mov_b32_e32 v3, s5
; GFX9-NEXT: s_subb_u32 s11, s3, s7 ; GFX9-NEXT: s_subb_u32 s11, s3, s7
; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v0, s6
; GFX9-NEXT: v_mov_b32_e32 v1, s7 ; GFX9-NEXT: v_mov_b32_e32 v1, s7
; GFX9-NEXT: s_cmp_eq_u64 s[2:3], s[6:7] ; GFX9-NEXT: s_cmp_eq_u64 s[2:3], s[6:7]
; GFX9-NEXT: s_cselect_b32 s6, 1, 0 ; GFX9-NEXT: s_cselect_b32 s6, 1, 0
; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX9-NEXT: s_and_b32 s0, 1, s6 ; GFX9-NEXT: s_and_b32 s0, 1, s6
; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0 ; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0
▲ Show 20 Lines • Show All 397 Lines • ▼ Show 20 Lines
define amdgpu_ps <2 x i128> @s_usubsat_v2i128(<2 x i128> inreg %lhs, <2 x i128> inreg %rhs) { define amdgpu_ps <2 x i128> @s_usubsat_v2i128(<2 x i128> inreg %lhs, <2 x i128> inreg %rhs) {
; GFX6-LABEL: s_usubsat_v2i128: ; GFX6-LABEL: s_usubsat_v2i128:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_sub_u32 s16, s0, s8 ; GFX6-NEXT: s_sub_u32 s16, s0, s8
; GFX6-NEXT: s_cselect_b32 s17, 1, 0 ; GFX6-NEXT: s_cselect_b32 s17, 1, 0
; GFX6-NEXT: s_and_b32 s17, s17, 1 ; GFX6-NEXT: s_and_b32 s17, s17, 1
; GFX6-NEXT: s_cmp_lg_u32 s17, 0 ; GFX6-NEXT: s_cmp_lg_u32 s17, 0
; GFX6-NEXT: s_subb_u32 s17, s1, s9 ; GFX6-NEXT: s_subb_u32 s17, s1, s9
; GFX6-NEXT: v_mov_b32_e32 v2, s8
; GFX6-NEXT: s_cselect_b32 s18, 1, 0 ; GFX6-NEXT: s_cselect_b32 s18, 1, 0
; GFX6-NEXT: v_mov_b32_e32 v3, s9
; GFX6-NEXT: s_and_b32 s18, s18, 1 ; GFX6-NEXT: s_and_b32 s18, s18, 1
; GFX6-NEXT: v_mov_b32_e32 v0, s10 ; GFX6-NEXT: v_mov_b32_e32 v2, s8
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX6-NEXT: v_mov_b32_e32 v3, s9
; GFX6-NEXT: s_cmp_lg_u32 s18, 0 ; GFX6-NEXT: s_cmp_lg_u32 s18, 0
; GFX6-NEXT: v_mov_b32_e32 v1, s11 ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX6-NEXT: s_subb_u32 s18, s2, s10 ; GFX6-NEXT: s_subb_u32 s18, s2, s10
; GFX6-NEXT: v_mov_b32_e32 v0, s10
; GFX6-NEXT: v_mov_b32_e32 v1, s11
; GFX6-NEXT: s_cselect_b32 s19, 1, 0
; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX6-NEXT: s_cselect_b32 s19, 1, 0
; GFX6-NEXT: s_and_b32 s19, s19, 1 ; GFX6-NEXT: s_and_b32 s19, s19, 1
; GFX6-NEXT: s_cmp_lg_u32 s19, 0
; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc
; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[0:1] ; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[2:3], v[0:1]
; GFX6-NEXT: s_cmp_lg_u32 s19, 0
; GFX6-NEXT: s_subb_u32 s19, s3, s11 ; GFX6-NEXT: s_subb_u32 s19, s3, s11
; GFX6-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc ; GFX6-NEXT: v_cndmask_b32_e32 v0, v3, v2, vcc
; GFX6-NEXT: v_and_b32_e32 v0, 1, v0
; GFX6-NEXT: s_sub_u32 s0, s4, s12 ; GFX6-NEXT: s_sub_u32 s0, s4, s12
; GFX6-NEXT: v_mov_b32_e32 v2, s17 ; GFX6-NEXT: v_and_b32_e32 v0, 1, v0
; GFX6-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX6-NEXT: s_cselect_b32 s1, 1, 0 ; GFX6-NEXT: s_cselect_b32 s1, 1, 0
; GFX6-NEXT: v_mov_b32_e32 v1, s16 ; GFX6-NEXT: v_mov_b32_e32 v1, s16
; GFX6-NEXT: v_cndmask_b32_e64 v5, v2, 0, vcc ; GFX6-NEXT: v_mov_b32_e32 v2, s17
; GFX6-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX6-NEXT: s_and_b32 s1, s1, 1 ; GFX6-NEXT: s_and_b32 s1, s1, 1
; GFX6-NEXT: v_mov_b32_e32 v2, s12
; GFX6-NEXT: v_cndmask_b32_e64 v4, v1, 0, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v4, v1, 0, vcc
; GFX6-NEXT: v_cndmask_b32_e64 v5, v2, 0, vcc
; GFX6-NEXT: v_mov_b32_e32 v0, s18 ; GFX6-NEXT: v_mov_b32_e32 v0, s18
; GFX6-NEXT: v_mov_b32_e32 v1, s19 ; GFX6-NEXT: v_mov_b32_e32 v1, s19
; GFX6-NEXT: s_cmp_lg_u32 s1, 0 ; GFX6-NEXT: s_cmp_lg_u32 s1, 0
; GFX6-NEXT: v_mov_b32_e32 v2, s12
; GFX6-NEXT: v_mov_b32_e32 v3, s13 ; GFX6-NEXT: v_mov_b32_e32 v3, s13
; GFX6-NEXT: v_cndmask_b32_e64 v6, v0, 0, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v6, v0, 0, vcc
; GFX6-NEXT: v_cndmask_b32_e64 v7, v1, 0, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v7, v1, 0, vcc
; GFX6-NEXT: s_subb_u32 s1, s5, s13 ; GFX6-NEXT: s_subb_u32 s1, s5, s13
; GFX6-NEXT: v_mov_b32_e32 v0, s14
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3]
; GFX6-NEXT: s_cselect_b32 s2, 1, 0 ; GFX6-NEXT: s_cselect_b32 s2, 1, 0
; GFX6-NEXT: v_mov_b32_e32 v0, s14
; GFX6-NEXT: v_mov_b32_e32 v1, s15 ; GFX6-NEXT: v_mov_b32_e32 v1, s15
; GFX6-NEXT: s_and_b32 s2, s2, 1 ; GFX6-NEXT: s_and_b32 s2, s2, 1
; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1] ; GFX6-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1]
; GFX6-NEXT: s_cmp_lg_u32 s2, 0 ; GFX6-NEXT: s_cmp_lg_u32 s2, 0
; GFX6-NEXT: s_subb_u32 s2, s6, s14 ; GFX6-NEXT: s_subb_u32 s2, s6, s14
; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc ; GFX6-NEXT: v_cndmask_b32_e64 v3, 0, 1, vcc
; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[6:7], v[0:1] ; GFX6-NEXT: v_cmp_eq_u64_e32 vcc, s[6:7], v[0:1]
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; GFX8-NEXT: s_cmp_lg_u32 s17, 0 ; GFX8-NEXT: s_cmp_lg_u32 s17, 0
; GFX8-NEXT: s_subb_u32 s17, s1, s9 ; GFX8-NEXT: s_subb_u32 s17, s1, s9
; GFX8-NEXT: s_cselect_b32 s18, 1, 0 ; GFX8-NEXT: s_cselect_b32 s18, 1, 0
; GFX8-NEXT: s_and_b32 s18, s18, 1 ; GFX8-NEXT: s_and_b32 s18, s18, 1
; GFX8-NEXT: s_cmp_lg_u32 s18, 0 ; GFX8-NEXT: s_cmp_lg_u32 s18, 0
; GFX8-NEXT: s_subb_u32 s18, s2, s10 ; GFX8-NEXT: s_subb_u32 s18, s2, s10
; GFX8-NEXT: s_cselect_b32 s19, 1, 0 ; GFX8-NEXT: s_cselect_b32 s19, 1, 0
; GFX8-NEXT: s_and_b32 s19, s19, 1 ; GFX8-NEXT: s_and_b32 s19, s19, 1
; GFX8-NEXT: v_mov_b32_e32 v2, s8
; GFX8-NEXT: s_cmp_lg_u32 s19, 0 ; GFX8-NEXT: s_cmp_lg_u32 s19, 0
; GFX8-NEXT: v_mov_b32_e32 v2, s8
; GFX8-NEXT: v_mov_b32_e32 v3, s9 ; GFX8-NEXT: v_mov_b32_e32 v3, s9
; GFX8-NEXT: s_subb_u32 s19, s3, s11 ; GFX8-NEXT: s_subb_u32 s19, s3, s11
; GFX8-NEXT: v_mov_b32_e32 v0, s10
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX8-NEXT: v_mov_b32_e32 v0, s10
; GFX8-NEXT: v_mov_b32_e32 v1, s11 ; GFX8-NEXT: v_mov_b32_e32 v1, s11
; GFX8-NEXT: s_cmp_eq_u64 s[2:3], s[10:11] ; GFX8-NEXT: s_cmp_eq_u64 s[2:3], s[10:11]
; GFX8-NEXT: s_cselect_b32 s10, 1, 0 ; GFX8-NEXT: s_cselect_b32 s10, 1, 0
; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX8-NEXT: s_and_b32 s0, 1, s10 ; GFX8-NEXT: s_and_b32 s0, 1, s10
; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0 ; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0
; GFX8-NEXT: s_sub_u32 s0, s4, s12 ; GFX8-NEXT: s_sub_u32 s0, s4, s12
; GFX8-NEXT: s_cselect_b32 s1, 1, 0 ; GFX8-NEXT: s_cselect_b32 s1, 1, 0
; GFX8-NEXT: s_and_b32 s1, s1, 1 ; GFX8-NEXT: s_and_b32 s1, s1, 1
; GFX8-NEXT: s_cmp_lg_u32 s1, 0 ; GFX8-NEXT: s_cmp_lg_u32 s1, 0
; GFX8-NEXT: s_subb_u32 s1, s5, s13 ; GFX8-NEXT: s_subb_u32 s1, s5, s13
; GFX8-NEXT: s_cselect_b32 s2, 1, 0 ; GFX8-NEXT: s_cselect_b32 s2, 1, 0
; GFX8-NEXT: s_and_b32 s2, s2, 1 ; GFX8-NEXT: s_and_b32 s2, s2, 1
; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
; GFX8-NEXT: s_cmp_lg_u32 s2, 0 ; GFX8-NEXT: s_cmp_lg_u32 s2, 0
; GFX8-NEXT: v_and_b32_e32 v0, 1, v0 ; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
; GFX8-NEXT: s_subb_u32 s2, s6, s14 ; GFX8-NEXT: s_subb_u32 s2, s6, s14
; GFX8-NEXT: v_mov_b32_e32 v2, s17 ; GFX8-NEXT: v_and_b32_e32 v0, 1, v0
; GFX8-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX8-NEXT: s_cselect_b32 s3, 1, 0 ; GFX8-NEXT: s_cselect_b32 s3, 1, 0
; GFX8-NEXT: v_mov_b32_e32 v1, s16 ; GFX8-NEXT: v_mov_b32_e32 v1, s16
; GFX8-NEXT: v_cndmask_b32_e64 v5, v2, 0, vcc ; GFX8-NEXT: v_mov_b32_e32 v2, s17
; GFX8-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX8-NEXT: s_and_b32 s3, s3, 1 ; GFX8-NEXT: s_and_b32 s3, s3, 1
; GFX8-NEXT: v_mov_b32_e32 v2, s12
; GFX8-NEXT: v_cndmask_b32_e64 v4, v1, 0, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v4, v1, 0, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v5, v2, 0, vcc
; GFX8-NEXT: v_mov_b32_e32 v0, s18 ; GFX8-NEXT: v_mov_b32_e32 v0, s18
; GFX8-NEXT: v_mov_b32_e32 v1, s19 ; GFX8-NEXT: v_mov_b32_e32 v1, s19
; GFX8-NEXT: s_cmp_lg_u32 s3, 0 ; GFX8-NEXT: s_cmp_lg_u32 s3, 0
; GFX8-NEXT: v_mov_b32_e32 v2, s12
; GFX8-NEXT: v_mov_b32_e32 v3, s13 ; GFX8-NEXT: v_mov_b32_e32 v3, s13
; GFX8-NEXT: v_cndmask_b32_e64 v6, v0, 0, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v6, v0, 0, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v7, v1, 0, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v7, v1, 0, vcc
; GFX8-NEXT: s_subb_u32 s3, s7, s15 ; GFX8-NEXT: s_subb_u32 s3, s7, s15
; GFX8-NEXT: v_mov_b32_e32 v0, s14
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3]
; GFX8-NEXT: v_mov_b32_e32 v0, s14
; GFX8-NEXT: v_mov_b32_e32 v1, s15 ; GFX8-NEXT: v_mov_b32_e32 v1, s15
; GFX8-NEXT: s_cmp_eq_u64 s[6:7], s[14:15] ; GFX8-NEXT: s_cmp_eq_u64 s[6:7], s[14:15]
; GFX8-NEXT: s_cselect_b32 s8, 1, 0 ; GFX8-NEXT: s_cselect_b32 s8, 1, 0
; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1] ; GFX8-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1]
; GFX8-NEXT: s_and_b32 s4, 1, s8 ; GFX8-NEXT: s_and_b32 s4, 1, s8
; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX8-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4 ; GFX8-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4
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; GFX9-NEXT: s_cmp_lg_u32 s17, 0 ; GFX9-NEXT: s_cmp_lg_u32 s17, 0
; GFX9-NEXT: s_subb_u32 s17, s1, s9 ; GFX9-NEXT: s_subb_u32 s17, s1, s9
; GFX9-NEXT: s_cselect_b32 s18, 1, 0 ; GFX9-NEXT: s_cselect_b32 s18, 1, 0
; GFX9-NEXT: s_and_b32 s18, s18, 1 ; GFX9-NEXT: s_and_b32 s18, s18, 1
; GFX9-NEXT: s_cmp_lg_u32 s18, 0 ; GFX9-NEXT: s_cmp_lg_u32 s18, 0
; GFX9-NEXT: s_subb_u32 s18, s2, s10 ; GFX9-NEXT: s_subb_u32 s18, s2, s10
; GFX9-NEXT: s_cselect_b32 s19, 1, 0 ; GFX9-NEXT: s_cselect_b32 s19, 1, 0
; GFX9-NEXT: s_and_b32 s19, s19, 1 ; GFX9-NEXT: s_and_b32 s19, s19, 1
; GFX9-NEXT: v_mov_b32_e32 v2, s8
; GFX9-NEXT: s_cmp_lg_u32 s19, 0 ; GFX9-NEXT: s_cmp_lg_u32 s19, 0
; GFX9-NEXT: v_mov_b32_e32 v2, s8
; GFX9-NEXT: v_mov_b32_e32 v3, s9 ; GFX9-NEXT: v_mov_b32_e32 v3, s9
; GFX9-NEXT: s_subb_u32 s19, s3, s11 ; GFX9-NEXT: s_subb_u32 s19, s3, s11
; GFX9-NEXT: v_mov_b32_e32 v0, s10
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[0:1], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v0, s10
; GFX9-NEXT: v_mov_b32_e32 v1, s11 ; GFX9-NEXT: v_mov_b32_e32 v1, s11
; GFX9-NEXT: s_cmp_eq_u64 s[2:3], s[10:11] ; GFX9-NEXT: s_cmp_eq_u64 s[2:3], s[10:11]
; GFX9-NEXT: s_cselect_b32 s10, 1, 0 ; GFX9-NEXT: s_cselect_b32 s10, 1, 0
; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GFX9-NEXT: s_and_b32 s0, 1, s10 ; GFX9-NEXT: s_and_b32 s0, 1, s10
; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0 ; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s0
; GFX9-NEXT: s_sub_u32 s0, s4, s12 ; GFX9-NEXT: s_sub_u32 s0, s4, s12
; GFX9-NEXT: s_cselect_b32 s1, 1, 0 ; GFX9-NEXT: s_cselect_b32 s1, 1, 0
; GFX9-NEXT: s_and_b32 s1, s1, 1 ; GFX9-NEXT: s_and_b32 s1, s1, 1
; GFX9-NEXT: s_cmp_lg_u32 s1, 0 ; GFX9-NEXT: s_cmp_lg_u32 s1, 0
; GFX9-NEXT: s_subb_u32 s1, s5, s13 ; GFX9-NEXT: s_subb_u32 s1, s5, s13
; GFX9-NEXT: s_cselect_b32 s2, 1, 0 ; GFX9-NEXT: s_cselect_b32 s2, 1, 0
; GFX9-NEXT: s_and_b32 s2, s2, 1 ; GFX9-NEXT: s_and_b32 s2, s2, 1
; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
; GFX9-NEXT: s_cmp_lg_u32 s2, 0 ; GFX9-NEXT: s_cmp_lg_u32 s2, 0
; GFX9-NEXT: v_and_b32_e32 v0, 1, v0 ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
; GFX9-NEXT: s_subb_u32 s2, s6, s14 ; GFX9-NEXT: s_subb_u32 s2, s6, s14
; GFX9-NEXT: v_mov_b32_e32 v2, s17 ; GFX9-NEXT: v_and_b32_e32 v0, 1, v0
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX9-NEXT: s_cselect_b32 s3, 1, 0 ; GFX9-NEXT: s_cselect_b32 s3, 1, 0
; GFX9-NEXT: v_mov_b32_e32 v1, s16 ; GFX9-NEXT: v_mov_b32_e32 v1, s16
; GFX9-NEXT: v_cndmask_b32_e64 v5, v2, 0, vcc ; GFX9-NEXT: v_mov_b32_e32 v2, s17
; GFX9-NEXT: v_cmp_ne_u32_e32 vcc, 0, v0
; GFX9-NEXT: s_and_b32 s3, s3, 1 ; GFX9-NEXT: s_and_b32 s3, s3, 1
; GFX9-NEXT: v_mov_b32_e32 v2, s12
; GFX9-NEXT: v_cndmask_b32_e64 v4, v1, 0, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v4, v1, 0, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v5, v2, 0, vcc
; GFX9-NEXT: v_mov_b32_e32 v0, s18 ; GFX9-NEXT: v_mov_b32_e32 v0, s18
; GFX9-NEXT: v_mov_b32_e32 v1, s19 ; GFX9-NEXT: v_mov_b32_e32 v1, s19
; GFX9-NEXT: s_cmp_lg_u32 s3, 0 ; GFX9-NEXT: s_cmp_lg_u32 s3, 0
; GFX9-NEXT: v_mov_b32_e32 v2, s12
; GFX9-NEXT: v_mov_b32_e32 v3, s13 ; GFX9-NEXT: v_mov_b32_e32 v3, s13
; GFX9-NEXT: v_cndmask_b32_e64 v6, v0, 0, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v6, v0, 0, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v7, v1, 0, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v7, v1, 0, vcc
; GFX9-NEXT: s_subb_u32 s3, s7, s15 ; GFX9-NEXT: s_subb_u32 s3, s7, s15
; GFX9-NEXT: v_mov_b32_e32 v0, s14
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[4:5], v[2:3]
; GFX9-NEXT: v_mov_b32_e32 v0, s14
; GFX9-NEXT: v_mov_b32_e32 v1, s15 ; GFX9-NEXT: v_mov_b32_e32 v1, s15
; GFX9-NEXT: s_cmp_eq_u64 s[6:7], s[14:15] ; GFX9-NEXT: s_cmp_eq_u64 s[6:7], s[14:15]
; GFX9-NEXT: s_cselect_b32 s8, 1, 0 ; GFX9-NEXT: s_cselect_b32 s8, 1, 0
; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v2, 0, 1, vcc
; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1] ; GFX9-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1]
; GFX9-NEXT: s_and_b32 s4, 1, s8 ; GFX9-NEXT: s_and_b32 s4, 1, s8
; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc ; GFX9-NEXT: v_cndmask_b32_e64 v0, 0, 1, vcc
; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4 ; GFX9-NEXT: v_cmp_ne_u32_e64 vcc, 0, s4
▲ Show 20 Lines • Show All 123 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/widen-i8-i16-scalar-loads.ll

Show First 20 Lines • Show All 332 Lines • ▼ Show 20 Lines
; GFX8-LABEL: constant_sextload_i8_align2: ; GFX8-LABEL: constant_sextload_i8_align2:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: flat_load_sbyte v2, v[0:1] ; GFX8-NEXT: flat_load_sbyte v2, v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_add_u32 s0, s0, 2 ; GFX8-NEXT: s_add_u32 s0, s0, 2
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_addc_u32 s1, s1, 0 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: flat_store_short v[0:1], v2 ; GFX8-NEXT: flat_store_short v[0:1], v2
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 16, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 16, v2
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_short v[0:1], v3 ; GFX8-NEXT: flat_store_short v[0:1], v3
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: constant_sextload_i8_align2: ; GFX9-LABEL: constant_sextload_i8_align2:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GFX9-NEXT: v_mov_b32_e32 v0, 0 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
Show All 26 Lines
; GFX8-LABEL: constant_zextload_i8_align2: ; GFX8-LABEL: constant_zextload_i8_align2:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, s2 ; GFX8-NEXT: v_mov_b32_e32 v0, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s3 ; GFX8-NEXT: v_mov_b32_e32 v1, s3
; GFX8-NEXT: flat_load_ubyte v2, v[0:1] ; GFX8-NEXT: flat_load_ubyte v2, v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_add_u32 s0, s0, 2 ; GFX8-NEXT: s_add_u32 s0, s0, 2
; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_addc_u32 s1, s1, 0 ; GFX8-NEXT: s_addc_u32 s1, s1, 0
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: flat_store_short v[0:1], v2 ; GFX8-NEXT: flat_store_short v[0:1], v2
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 16, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 16, v2
; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_short v[0:1], v3 ; GFX8-NEXT: flat_store_short v[0:1], v3
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX9-LABEL: constant_zextload_i8_align2: ; GFX9-LABEL: constant_zextload_i8_align2:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GFX9-NEXT: v_mov_b32_e32 v0, 0 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
Show All 26 Lines

llvm/test/CodeGen/AMDGPU/abi-attribute-hints-undefined-behavior.ll

Show First 20 Lines • Show All 336 Lines • ▼ Show 20 Lines; FIXEDABI-NEXT: s_setpc_b64 s[30:31]
%dispatch.load = load volatile i8, i8 addrspace(4)* %dispatch.ptr %dispatch.load = load volatile i8, i8 addrspace(4)* %dispatch.ptr
store volatile i64 %dispatch.id, i64 addrspace(1)* %ptr store volatile i64 %dispatch.id, i64 addrspace(1)* %ptr
ret void ret void
} }
define amdgpu_kernel void @marked_kernel_use_other_sgpr(i64 addrspace(1)* %ptr) #0 { define amdgpu_kernel void @marked_kernel_use_other_sgpr(i64 addrspace(1)* %ptr) #0 {
; VARABI-LABEL: marked_kernel_use_other_sgpr: ; VARABI-LABEL: marked_kernel_use_other_sgpr:
; VARABI: ; %bb.0: ; VARABI: ; %bb.0:
; VARABI-NEXT: s_add_u32 s0, s4, 8
; VARABI-NEXT: flat_load_ubyte v0, v[0:1] glc ; VARABI-NEXT: flat_load_ubyte v0, v[0:1] glc
; VARABI-NEXT: s_add_u32 s0, s4, 8
; VARABI-NEXT: s_addc_u32 s1, s5, 0 ; VARABI-NEXT: s_addc_u32 s1, s5, 0
; VARABI-NEXT: s_waitcnt vmcnt(0) ; VARABI-NEXT: s_waitcnt vmcnt(0)
; VARABI-NEXT: v_mov_b32_e32 v0, s0 ; VARABI-NEXT: v_mov_b32_e32 v0, s0
; VARABI-NEXT: v_mov_b32_e32 v1, s1 ; VARABI-NEXT: v_mov_b32_e32 v1, s1
; VARABI-NEXT: flat_load_ubyte v0, v[0:1] glc ; VARABI-NEXT: flat_load_ubyte v0, v[0:1] glc
; VARABI-NEXT: s_waitcnt vmcnt(0) ; VARABI-NEXT: s_waitcnt vmcnt(0)
; VARABI-NEXT: flat_load_ubyte v0, v[0:1] glc ; VARABI-NEXT: flat_load_ubyte v0, v[0:1] glc
; VARABI-NEXT: s_endpgm ; VARABI-NEXT: s_endpgm
; ;
; FIXEDABI-LABEL: marked_kernel_use_other_sgpr: ; FIXEDABI-LABEL: marked_kernel_use_other_sgpr:
; FIXEDABI: ; %bb.0: ; FIXEDABI: ; %bb.0:
; FIXEDABI-NEXT: s_add_u32 s0, s4, 8
; FIXEDABI-NEXT: flat_load_ubyte v0, v[0:1] glc ; FIXEDABI-NEXT: flat_load_ubyte v0, v[0:1] glc
; FIXEDABI-NEXT: s_add_u32 s0, s4, 8
; FIXEDABI-NEXT: s_addc_u32 s1, s5, 0 ; FIXEDABI-NEXT: s_addc_u32 s1, s5, 0
; FIXEDABI-NEXT: s_waitcnt vmcnt(0) ; FIXEDABI-NEXT: s_waitcnt vmcnt(0)
; FIXEDABI-NEXT: v_mov_b32_e32 v0, s0 ; FIXEDABI-NEXT: v_mov_b32_e32 v0, s0
; FIXEDABI-NEXT: v_mov_b32_e32 v1, s1 ; FIXEDABI-NEXT: v_mov_b32_e32 v1, s1
; FIXEDABI-NEXT: flat_load_ubyte v0, v[0:1] glc ; FIXEDABI-NEXT: flat_load_ubyte v0, v[0:1] glc
; FIXEDABI-NEXT: s_waitcnt vmcnt(0) ; FIXEDABI-NEXT: s_waitcnt vmcnt(0)
; FIXEDABI-NEXT: flat_load_ubyte v0, v[0:1] glc ; FIXEDABI-NEXT: flat_load_ubyte v0, v[0:1] glc
; FIXEDABI-NEXT: s_endpgm ; FIXEDABI-NEXT: s_endpgm
▲ Show 20 Lines • Show All 195 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/accvgpr-copy.mir

Show First 20 Lines • Show All 65 Lines • ▼ Show 20 Lines
name: a2_to_v2 name: a2_to_v2
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $agpr0_agpr1 liveins: $agpr0_agpr1
; GFX908-LABEL: name: a2_to_v2 ; GFX908-LABEL: name: a2_to_v2
; GFX908: liveins: $agpr0_agpr1 ; GFX908: liveins: $agpr0_agpr1
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $agpr0_agpr1 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit killed $agpr0_agpr1, implicit $exec ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $vgpr0_vgpr1 ; GFX908: S_ENDPGM 0, implicit $vgpr0_vgpr1
; GFX90A-LABEL: name: a2_to_v2 ; GFX90A-LABEL: name: a2_to_v2
; GFX90A: liveins: $agpr0_agpr1 ; GFX90A: liveins: $agpr0_agpr1
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $agpr0_agpr1 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit killed $agpr0_agpr1, implicit $exec ; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr1, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $vgpr0_vgpr1 ; GFX90A: S_ENDPGM 0, implicit $vgpr0_vgpr1
$vgpr0_vgpr1 = COPY killed $agpr0_agpr1, implicit $exec $vgpr0_vgpr1 = COPY killed $agpr0_agpr1, implicit $exec
S_ENDPGM 0, implicit $vgpr0_vgpr1 S_ENDPGM 0, implicit $vgpr0_vgpr1
... ...
--- ---
name: a3_to_v3 name: a3_to_v3
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $agpr0_agpr1_agpr2 liveins: $agpr0_agpr1_agpr2
; GFX908-LABEL: name: a3_to_v3 ; GFX908-LABEL: name: a3_to_v3
; GFX908: liveins: $agpr0_agpr1_agpr2 ; GFX908: liveins: $agpr0_agpr1_agpr2
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $agpr0_agpr1_agpr2 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit killed $agpr0_agpr1_agpr2, implicit $exec ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2 ; GFX908: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2
; GFX90A-LABEL: name: a3_to_v3 ; GFX90A-LABEL: name: a3_to_v3
; GFX90A: liveins: $agpr0_agpr1_agpr2 ; GFX90A: liveins: $agpr0_agpr1_agpr2
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $agpr0_agpr1_agpr2 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2 ; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX90A: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit killed $agpr0_agpr1_agpr2, implicit $exec ; GFX90A: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr2, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2 ; GFX90A: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2
$vgpr0_vgpr1_vgpr2 = COPY killed $agpr0_agpr1_agpr2, implicit $exec $vgpr0_vgpr1_vgpr2 = COPY killed $agpr0_agpr1_agpr2, implicit $exec
S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2 S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2
... ...
--- ---
name: a4_to_v4 name: a4_to_v4
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $agpr0_agpr1_agpr2_agpr3 liveins: $agpr0_agpr1_agpr2_agpr3
; GFX908-LABEL: name: a4_to_v4 ; GFX908-LABEL: name: a4_to_v4
; GFX908: liveins: $agpr0_agpr1_agpr2_agpr3 ; GFX908: liveins: $agpr0_agpr1_agpr2_agpr3
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX908: $vgpr3 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit killed $agpr0_agpr1_agpr2_agpr3, implicit $exec ; GFX908: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX908: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3
; GFX90A-LABEL: name: a4_to_v4 ; GFX90A-LABEL: name: a4_to_v4
; GFX90A: liveins: $agpr0_agpr1_agpr2_agpr3 ; GFX90A: liveins: $agpr0_agpr1_agpr2_agpr3
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX90A: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX90A: $vgpr3 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit killed $agpr0_agpr1_agpr2_agpr3, implicit $exec ; GFX90A: $vgpr3 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX90A: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY killed $agpr0_agpr1_agpr2_agpr3, implicit $exec $vgpr0_vgpr1_vgpr2_vgpr3 = COPY killed $agpr0_agpr1_agpr2_agpr3, implicit $exec
S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3 S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3
... ...
--- ---
name: a8_to_v8 name: a8_to_v8
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 liveins: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; GFX908-LABEL: name: a8_to_v8 ; GFX908-LABEL: name: a8_to_v8
; GFX908: liveins: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: liveins: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX908: $vgpr3 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $vgpr3 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX908: $vgpr4 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $vgpr4 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec
; GFX908: $vgpr5 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $vgpr5 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec
; GFX908: $vgpr6 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $vgpr6 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec
; GFX908: $vgpr7 = V_ACCVGPR_READ_B32_e64 $agpr7, implicit $exec, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $exec ; GFX908: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr7, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX908: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; GFX90A-LABEL: name: a8_to_v8 ; GFX90A-LABEL: name: a8_to_v8
; GFX90A: liveins: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: liveins: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX90A: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX90A: $vgpr3 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $vgpr3 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX90A: $vgpr4 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $vgpr4 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec
; GFX90A: $vgpr5 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $vgpr5 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec
; GFX90A: $vgpr6 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $vgpr6 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec
; GFX90A: $vgpr7 = V_ACCVGPR_READ_B32_e64 $agpr7, implicit $exec, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $exec ; GFX90A: $vgpr7 = V_ACCVGPR_READ_B32_e64 killed $agpr7, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX90A: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $exec $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 = COPY killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $exec
S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
... ...
--- ---
name: a16_to_v16 name: a16_to_v16
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 liveins: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; GFX908-LABEL: name: a16_to_v16 ; GFX908-LABEL: name: a16_to_v16
; GFX908: liveins: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: liveins: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX908: $vgpr3 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr3 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX908: $vgpr4 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr4 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec
; GFX908: $vgpr5 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr5 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec
; GFX908: $vgpr6 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr6 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec
; GFX908: $vgpr7 = V_ACCVGPR_READ_B32_e64 $agpr7, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr7 = V_ACCVGPR_READ_B32_e64 $agpr7, implicit $exec
; GFX908: $vgpr8 = V_ACCVGPR_READ_B32_e64 $agpr8, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr8 = V_ACCVGPR_READ_B32_e64 $agpr8, implicit $exec
; GFX908: $vgpr9 = V_ACCVGPR_READ_B32_e64 $agpr9, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr9 = V_ACCVGPR_READ_B32_e64 $agpr9, implicit $exec
; GFX908: $vgpr10 = V_ACCVGPR_READ_B32_e64 $agpr10, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr10 = V_ACCVGPR_READ_B32_e64 $agpr10, implicit $exec
; GFX908: $vgpr11 = V_ACCVGPR_READ_B32_e64 $agpr11, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr11 = V_ACCVGPR_READ_B32_e64 $agpr11, implicit $exec
; GFX908: $vgpr12 = V_ACCVGPR_READ_B32_e64 $agpr12, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr12 = V_ACCVGPR_READ_B32_e64 $agpr12, implicit $exec
; GFX908: $vgpr13 = V_ACCVGPR_READ_B32_e64 $agpr13, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr13 = V_ACCVGPR_READ_B32_e64 $agpr13, implicit $exec
; GFX908: $vgpr14 = V_ACCVGPR_READ_B32_e64 $agpr14, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr14 = V_ACCVGPR_READ_B32_e64 $agpr14, implicit $exec
; GFX908: $vgpr15 = V_ACCVGPR_READ_B32_e64 $agpr15, implicit $exec, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $exec ; GFX908: $vgpr15 = V_ACCVGPR_READ_B32_e64 killed $agpr15, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX90A-LABEL: name: a16_to_v16 ; GFX90A-LABEL: name: a16_to_v16
; GFX90A: liveins: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: liveins: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX90A: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX90A: $vgpr3 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr3 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX90A: $vgpr4 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr4 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec
; GFX90A: $vgpr5 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr5 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec
; GFX90A: $vgpr6 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr6 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec
; GFX90A: $vgpr7 = V_ACCVGPR_READ_B32_e64 $agpr7, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr7 = V_ACCVGPR_READ_B32_e64 $agpr7, implicit $exec
; GFX90A: $vgpr8 = V_ACCVGPR_READ_B32_e64 $agpr8, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr8 = V_ACCVGPR_READ_B32_e64 $agpr8, implicit $exec
; GFX90A: $vgpr9 = V_ACCVGPR_READ_B32_e64 $agpr9, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr9 = V_ACCVGPR_READ_B32_e64 $agpr9, implicit $exec
; GFX90A: $vgpr10 = V_ACCVGPR_READ_B32_e64 $agpr10, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr10 = V_ACCVGPR_READ_B32_e64 $agpr10, implicit $exec
; GFX90A: $vgpr11 = V_ACCVGPR_READ_B32_e64 $agpr11, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr11 = V_ACCVGPR_READ_B32_e64 $agpr11, implicit $exec
; GFX90A: $vgpr12 = V_ACCVGPR_READ_B32_e64 $agpr12, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr12 = V_ACCVGPR_READ_B32_e64 $agpr12, implicit $exec
; GFX90A: $vgpr13 = V_ACCVGPR_READ_B32_e64 $agpr13, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr13 = V_ACCVGPR_READ_B32_e64 $agpr13, implicit $exec
; GFX90A: $vgpr14 = V_ACCVGPR_READ_B32_e64 $agpr14, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr14 = V_ACCVGPR_READ_B32_e64 $agpr14, implicit $exec
; GFX90A: $vgpr15 = V_ACCVGPR_READ_B32_e64 $agpr15, implicit $exec, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $exec ; GFX90A: $vgpr15 = V_ACCVGPR_READ_B32_e64 killed $agpr15, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
$vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $exec $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = COPY killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $exec
S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 S_ENDPGM 0, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
... ...
--- ---
name: v_to_a name: v_to_a
tracksRegLiveness: true tracksRegLiveness: true
Show All 15 Lines
--- ---
name: v2_to_a2 name: v2_to_a2
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1 liveins: $vgpr0_vgpr1
; GFX908-LABEL: name: v2_to_a2 ; GFX908-LABEL: name: v2_to_a2
; GFX908: liveins: $vgpr0_vgpr1 ; GFX908: liveins: $vgpr0_vgpr1
; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $vgpr0_vgpr1 ; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec, implicit killed $vgpr0_vgpr1, implicit $exec ; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1 ; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1
; GFX90A-LABEL: name: v2_to_a2 ; GFX90A-LABEL: name: v2_to_a2
; GFX90A: liveins: $vgpr0_vgpr1 ; GFX90A: liveins: $vgpr0_vgpr1
; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit-def $agpr0_agpr1, implicit $vgpr0_vgpr1 ; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec, implicit killed $vgpr0_vgpr1, implicit $exec ; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1 ; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1
$agpr0_agpr1 = COPY killed $vgpr0_vgpr1, implicit $exec $agpr0_agpr1 = COPY killed $vgpr0_vgpr1, implicit $exec
S_ENDPGM 0, implicit $agpr0_agpr1 S_ENDPGM 0, implicit $agpr0_agpr1
... ...
--- ---
name: v3_to_a3 name: v3_to_a3
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1_vgpr2 liveins: $vgpr0_vgpr1_vgpr2
; GFX908-LABEL: name: v3_to_a3 ; GFX908-LABEL: name: v3_to_a3
; GFX908: liveins: $vgpr0_vgpr1_vgpr2 ; GFX908: liveins: $vgpr0_vgpr1_vgpr2
; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $vgpr0_vgpr1_vgpr2 ; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2 ; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec
; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2, implicit $exec ; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2 ; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2
; GFX90A-LABEL: name: v3_to_a3 ; GFX90A-LABEL: name: v3_to_a3
; GFX90A: liveins: $vgpr0_vgpr1_vgpr2 ; GFX90A: liveins: $vgpr0_vgpr1_vgpr2
; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2, implicit $vgpr0_vgpr1_vgpr2 ; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2 ; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2, implicit $exec ; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2 ; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2
$agpr0_agpr1_agpr2 = COPY killed $vgpr0_vgpr1_vgpr2, implicit $exec $agpr0_agpr1_agpr2 = COPY killed $vgpr0_vgpr1_vgpr2, implicit $exec
S_ENDPGM 0, implicit $agpr0_agpr1_agpr2 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2
... ...
--- ---
name: v4_to_a4 name: v4_to_a4
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3 liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX908-LABEL: name: v4_to_a4 ; GFX908-LABEL: name: v4_to_a4
; GFX908: liveins: $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX908: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec
; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec
; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 $vgpr3, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3, implicit $exec ; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3
; GFX90A-LABEL: name: v4_to_a4 ; GFX90A-LABEL: name: v4_to_a4
; GFX90A: liveins: $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX90A: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3, implicit $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec
; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 $vgpr3, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3, implicit $exec ; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3
$agpr0_agpr1_agpr2_agpr3 = COPY killed $vgpr0_vgpr1_vgpr2_vgpr3, implicit $exec $agpr0_agpr1_agpr2_agpr3 = COPY killed $vgpr0_vgpr1_vgpr2_vgpr3, implicit $exec
S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3
... ...
--- ---
name: v8_to_a8 name: v8_to_a8
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; GFX908-LABEL: name: v8_to_a8 ; GFX908-LABEL: name: v8_to_a8
; GFX908: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX908: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec
; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec
; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 $vgpr3, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 $vgpr3, implicit $exec
; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 $vgpr4, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 $vgpr4, implicit $exec
; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 $vgpr5, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 $vgpr5, implicit $exec
; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 $vgpr6, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 $vgpr6, implicit $exec
; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 $vgpr7, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr7, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; GFX90A-LABEL: name: v8_to_a8 ; GFX90A-LABEL: name: v8_to_a8
; GFX90A: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX90A: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec
; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 $vgpr3, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 $vgpr3, implicit $exec
; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 $vgpr4, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 $vgpr4, implicit $exec
; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 $vgpr5, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 $vgpr5, implicit $exec
; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 $vgpr6, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 $vgpr6, implicit $exec
; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 $vgpr7, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 ; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr7, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
$agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = COPY killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7 $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = COPY killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7
S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
... ...
--- ---
name: v16_to_a16 name: v16_to_a16
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX908-LABEL: name: v16_to_a16 ; GFX908-LABEL: name: v16_to_a16
; GFX908: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec
; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec
; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 $vgpr3, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 $vgpr3, implicit $exec
; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 $vgpr4, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 $vgpr4, implicit $exec
; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 $vgpr5, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 $vgpr5, implicit $exec
; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 $vgpr6, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 $vgpr6, implicit $exec
; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 $vgpr7, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 $vgpr7, implicit $exec
; GFX908: $agpr8 = V_ACCVGPR_WRITE_B32_e64 $vgpr8, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: $agpr8 = V_ACCVGPR_WRITE_B32_e64 $vgpr8, implicit $exec
; GFX908: $agpr9 = V_ACCVGPR_WRITE_B32_e64 $vgpr9, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: $agpr9 = V_ACCVGPR_WRITE_B32_e64 $vgpr9, implicit $exec
; GFX908: $agpr10 = V_ACCVGPR_WRITE_B32_e64 $vgpr10, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: $agpr10 = V_ACCVGPR_WRITE_B32_e64 $vgpr10, implicit $exec
; GFX908: $agpr11 = V_ACCVGPR_WRITE_B32_e64 $vgpr11, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: $agpr11 = V_ACCVGPR_WRITE_B32_e64 $vgpr11, implicit $exec
; GFX908: $agpr12 = V_ACCVGPR_WRITE_B32_e64 $vgpr12, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: $agpr12 = V_ACCVGPR_WRITE_B32_e64 $vgpr12, implicit $exec
; GFX908: $agpr13 = V_ACCVGPR_WRITE_B32_e64 $vgpr13, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: $agpr13 = V_ACCVGPR_WRITE_B32_e64 $vgpr13, implicit $exec
; GFX908: $agpr14 = V_ACCVGPR_WRITE_B32_e64 $vgpr14, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX908: $agpr14 = V_ACCVGPR_WRITE_B32_e64 $vgpr14, implicit $exec
; GFX908: $agpr15 = V_ACCVGPR_WRITE_B32_e64 $vgpr15, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $exec ; GFX908: $agpr15 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr15, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; GFX90A-LABEL: name: v16_to_a16 ; GFX90A-LABEL: name: v16_to_a16
; GFX90A: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: liveins: $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15
; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec
; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr1, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec
; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 $vgpr3, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 $vgpr3, implicit $exec
; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 $vgpr4, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 $vgpr4, implicit $exec
; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 $vgpr5, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 $vgpr5, implicit $exec
; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 $vgpr6, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 $vgpr6, implicit $exec
; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 $vgpr7, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 $vgpr7, implicit $exec
; GFX90A: $agpr8 = V_ACCVGPR_WRITE_B32_e64 $vgpr8, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: $agpr8 = V_ACCVGPR_WRITE_B32_e64 $vgpr8, implicit $exec
; GFX90A: $agpr9 = V_ACCVGPR_WRITE_B32_e64 $vgpr9, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: $agpr9 = V_ACCVGPR_WRITE_B32_e64 $vgpr9, implicit $exec
; GFX90A: $agpr10 = V_ACCVGPR_WRITE_B32_e64 $vgpr10, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: $agpr10 = V_ACCVGPR_WRITE_B32_e64 $vgpr10, implicit $exec
; GFX90A: $agpr11 = V_ACCVGPR_WRITE_B32_e64 $vgpr11, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: $agpr11 = V_ACCVGPR_WRITE_B32_e64 $vgpr11, implicit $exec
; GFX90A: $agpr12 = V_ACCVGPR_WRITE_B32_e64 $vgpr12, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: $agpr12 = V_ACCVGPR_WRITE_B32_e64 $vgpr12, implicit $exec
; GFX90A: $agpr13 = V_ACCVGPR_WRITE_B32_e64 $vgpr13, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: $agpr13 = V_ACCVGPR_WRITE_B32_e64 $vgpr13, implicit $exec
; GFX90A: $agpr14 = V_ACCVGPR_WRITE_B32_e64 $vgpr14, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 ; GFX90A: $agpr14 = V_ACCVGPR_WRITE_B32_e64 $vgpr14, implicit $exec
; GFX90A: $agpr15 = V_ACCVGPR_WRITE_B32_e64 $vgpr15, implicit $exec, implicit killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $exec ; GFX90A: $agpr15 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr15, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
$agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = COPY killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $exec $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = COPY killed $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15, implicit $exec
S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
... ...
--- ---
name: s_to_a name: s_to_a
tracksRegLiveness: true tracksRegLiveness: true
Show All 17 Lines
--- ---
name: s2_to_a2 name: s2_to_a2
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1 liveins: $sgpr0_sgpr1
; GFX908-LABEL: name: s2_to_a2 ; GFX908-LABEL: name: s2_to_a2
; GFX908: liveins: $sgpr0_sgpr1 ; GFX908: liveins: $sgpr0_sgpr1
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $sgpr0_sgpr1 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr0_agpr1 ; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 killed $sgpr1, implicit $exec, implicit killed $sgpr0_sgpr1 ; GFX908: $vgpr1 = V_MOV_B32_e32 killed $sgpr1, implicit $exec
; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec ; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1 ; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1
; GFX90A-LABEL: name: s2_to_a2 ; GFX90A-LABEL: name: s2_to_a2
; GFX90A: liveins: $sgpr0_sgpr1 ; GFX90A: liveins: $sgpr0_sgpr1
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $sgpr0_sgpr1 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr0_agpr1 ; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 killed $sgpr1, implicit $exec, implicit killed $sgpr0_sgpr1 ; GFX90A: $vgpr0 = V_MOV_B32_e32 killed $sgpr1, implicit $exec
; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec ; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1 ; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1
$agpr0_agpr1 = COPY killed $sgpr0_sgpr1, implicit $exec $agpr0_agpr1 = COPY killed $sgpr0_sgpr1, implicit $exec
S_ENDPGM 0, implicit $agpr0_agpr1 S_ENDPGM 0, implicit $agpr0_agpr1
... ...
--- ---
name: s3_to_a3 name: s3_to_a3
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2 liveins: $sgpr0_sgpr1_sgpr2
; GFX908-LABEL: name: s3_to_a3 ; GFX908-LABEL: name: s3_to_a3
; GFX908: liveins: $sgpr0_sgpr1_sgpr2 ; GFX908: liveins: $sgpr0_sgpr1_sgpr2
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2 ; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2 ; GFX908: $vgpr2 = V_MOV_B32_e32 killed $sgpr2, implicit $exec
; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $exec ; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2 ; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2
; GFX90A-LABEL: name: s3_to_a3 ; GFX90A-LABEL: name: s3_to_a3
; GFX90A: liveins: $sgpr0_sgpr1_sgpr2 ; GFX90A: liveins: $sgpr0_sgpr1_sgpr2
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2 ; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2 ; GFX90A: $vgpr0 = V_MOV_B32_e32 killed $sgpr2, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec ; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2 ; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2
$agpr0_agpr1_agpr2 = COPY killed $sgpr0_sgpr1_sgpr2, implicit $exec $agpr0_agpr1_agpr2 = COPY killed $sgpr0_sgpr1_sgpr2, implicit $exec
S_ENDPGM 0, implicit $agpr0_agpr1_agpr2 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2
... ...
--- ---
name: s4_to_a4 name: s4_to_a4
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2_sgpr3 liveins: $sgpr0_sgpr1_sgpr2_sgpr3
; GFX908-LABEL: name: s4_to_a4 ; GFX908-LABEL: name: s4_to_a4
; GFX908: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3 ; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr0 = V_MOV_B32_e32 killed $sgpr3, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908: $vgpr0 = V_MOV_B32_e32 killed $sgpr3, implicit $exec
; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec ; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3
; GFX90A-LABEL: name: s4_to_a4 ; GFX90A-LABEL: name: s4_to_a4
; GFX90A: liveins: $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A: liveins: $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 killed $sgpr3, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A: $vgpr0 = V_MOV_B32_e32 killed $sgpr3, implicit $exec
; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec ; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3
$agpr0_agpr1_agpr2_agpr3 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3, implicit $exec $agpr0_agpr1_agpr2_agpr3 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3, implicit $exec
S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3
... ...
--- ---
name: s6_to_a6 name: s6_to_a6
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5
; GFX908-LABEL: name: s6_to_a6 ; GFX908-LABEL: name: s6_to_a6
; GFX908: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX908: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 ; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec
; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr4, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr4, implicit $exec
; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 killed $sgpr5, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX908: $vgpr2 = V_MOV_B32_e32 killed $sgpr5, implicit $exec
; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $exec ; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 ; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
; GFX90A-LABEL: name: s6_to_a6 ; GFX90A-LABEL: name: s6_to_a6
; GFX90A: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX90A: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 ; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec
; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr4, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr4, implicit $exec
; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 killed $sgpr5, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX90A: $vgpr0 = V_MOV_B32_e32 killed $sgpr5, implicit $exec
; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec ; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 ; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
$agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5, implicit $exec $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5, implicit $exec
S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5
... ...
--- ---
name: s8_to_a8 name: s8_to_a8
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX908-LABEL: name: s8_to_a8 ; GFX908-LABEL: name: s8_to_a8
; GFX908: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX908: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec
; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr4, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr4, implicit $exec
; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr5, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr5, implicit $exec
; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr6, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr6, implicit $exec
; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 killed $sgpr7, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX908: $vgpr1 = V_MOV_B32_e32 killed $sgpr7, implicit $exec
; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec ; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
; GFX90A-LABEL: name: s8_to_a8 ; GFX90A-LABEL: name: s8_to_a8
; GFX90A: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX90A: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec
; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr4, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr4, implicit $exec
; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr5, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr5, implicit $exec
; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr6, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr6, implicit $exec
; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 killed $sgpr7, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX90A: $vgpr0 = V_MOV_B32_e32 killed $sgpr7, implicit $exec
; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec ; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
$agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, implicit $exec $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, implicit $exec
S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7
... ...
--- ---
name: s16_to_a16 name: s16_to_a16
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX908-LABEL: name: s16_to_a16 ; GFX908-LABEL: name: s16_to_a16
; GFX908: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec
; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr4, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr4, implicit $exec
; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr5, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr5, implicit $exec
; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr6, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr6, implicit $exec
; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr7, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr7, implicit $exec
; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr8, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr8, implicit $exec
; GFX908: $agpr8 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr8 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr9, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr9, implicit $exec
; GFX908: $agpr9 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr9 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr10, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr10, implicit $exec
; GFX908: $agpr10 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr10 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr11, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr11, implicit $exec
; GFX908: $agpr11 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr11 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr12, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr12, implicit $exec
; GFX908: $agpr12 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr12 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr13, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr13, implicit $exec
; GFX908: $agpr13 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr13 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr14, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr14, implicit $exec
; GFX908: $agpr14 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr14 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr0 = V_MOV_B32_e32 killed $sgpr15, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX908: $vgpr0 = V_MOV_B32_e32 killed $sgpr15, implicit $exec
; GFX908: $agpr15 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec ; GFX908: $agpr15 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; GFX90A-LABEL: name: s16_to_a16 ; GFX90A-LABEL: name: s16_to_a16
; GFX90A: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec
; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr4, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr4, implicit $exec
; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr5, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr5, implicit $exec
; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr6, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr6, implicit $exec
; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr7, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr7, implicit $exec
; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr8, implicit $exec
; GFX90A: $agpr8 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr8 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr9, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr9, implicit $exec
; GFX90A: $agpr9 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr9 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr10, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr10, implicit $exec
; GFX90A: $agpr10 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr10 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr11, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr11, implicit $exec
; GFX90A: $agpr11 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr11 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr12, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr12, implicit $exec
; GFX90A: $agpr12 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr12 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr13, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr13, implicit $exec
; GFX90A: $agpr13 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr13 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr14, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr14, implicit $exec
; GFX90A: $agpr14 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr14 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 killed $sgpr15, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX90A: $vgpr0 = V_MOV_B32_e32 killed $sgpr15, implicit $exec
; GFX90A: $agpr15 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec ; GFX90A: $agpr15 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
$agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15, implicit $exec $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15, implicit $exec
S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
... ...
--- ---
name: a_to_a name: a_to_a
Show All 17 Lines
--- ---
name: a2_to_a2_kill name: a2_to_a2_kill
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $agpr0_agpr1 liveins: $agpr0_agpr1
; GFX908-LABEL: name: a2_to_a2_kill ; GFX908-LABEL: name: a2_to_a2_kill
; GFX908: liveins: $agpr0_agpr1 ; GFX908: liveins: $agpr0_agpr1
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec, implicit-def $agpr1_agpr2 ; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit $agpr0_agpr1 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec ; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec
; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec ; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr1, implicit $agpr2, implicit $agpr3 ; GFX908: S_ENDPGM 0, implicit $agpr1, implicit $agpr2, implicit $agpr3
; GFX90A-LABEL: name: a2_to_a2_kill ; GFX90A-LABEL: name: a2_to_a2_kill
; GFX90A: liveins: $agpr0_agpr1 ; GFX90A: liveins: $agpr0_agpr1
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr1_agpr2 ; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit $agpr0_agpr1 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec ; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: $agpr3 = V_ACCVGPR_MOV_B32 $agpr2, implicit $exec ; GFX90A: $agpr3 = V_ACCVGPR_MOV_B32 $agpr2, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr1, implicit $agpr2, implicit $agpr3 ; GFX90A: S_ENDPGM 0, implicit $agpr1, implicit $agpr2, implicit $agpr3
$agpr1_agpr2 = COPY killed $agpr0_agpr1, implicit $exec $agpr1_agpr2 = COPY killed $agpr0_agpr1, implicit $exec
$agpr3 = COPY $agpr2 $agpr3 = COPY $agpr2
S_ENDPGM 0, implicit $agpr1, implicit $agpr2, implicit $agpr3 S_ENDPGM 0, implicit $agpr1, implicit $agpr2, implicit $agpr3
... ...
--- ---
name: a3_to_a3_nonoverlap_kill name: a3_to_a3_nonoverlap_kill
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $agpr4_agpr5_agpr6 liveins: $agpr4_agpr5_agpr6
; GFX908-LABEL: name: a3_to_a3_nonoverlap_kill ; GFX908-LABEL: name: a3_to_a3_nonoverlap_kill
; GFX908: liveins: $agpr4_agpr5_agpr6 ; GFX908: liveins: $agpr4_agpr5_agpr6
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec, implicit $agpr4_agpr5_agpr6 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec
; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2 ; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec, implicit $agpr4_agpr5_agpr6 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec
; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr6, implicit $exec, implicit killed $agpr4_agpr5_agpr6 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr6, implicit $exec
; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2 ; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2
; GFX90A-LABEL: name: a3_to_a3_nonoverlap_kill ; GFX90A-LABEL: name: a3_to_a3_nonoverlap_kill
; GFX90A: liveins: $agpr4_agpr5_agpr6 ; GFX90A: liveins: $agpr4_agpr5_agpr6
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec, implicit $agpr4_agpr5_agpr6 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec
; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2 ; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec, implicit $agpr4_agpr5_agpr6 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec
; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr6, implicit $exec, implicit killed $agpr4_agpr5_agpr6 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr6, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2 ; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2
$agpr0_agpr1_agpr2 = COPY killed $agpr4_agpr5_agpr6 $agpr0_agpr1_agpr2 = COPY killed $agpr4_agpr5_agpr6
S_ENDPGM 0, implicit $agpr0_agpr1_agpr2 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2
... ...
--- ---
name: a3_to_a3_overlap_kill name: a3_to_a3_overlap_kill
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $agpr1_agpr2_agpr3 liveins: $agpr1_agpr2_agpr3
; GFX908-LABEL: name: a3_to_a3_overlap_kill ; GFX908-LABEL: name: a3_to_a3_overlap_kill
; GFX908: liveins: $agpr1_agpr2_agpr3 ; GFX908: liveins: $agpr1_agpr2_agpr3
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr1_agpr2_agpr3 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2 ; GFX908: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit $agpr1_agpr2_agpr3 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX908: $vgpr4 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr1_agpr2_agpr3 ; GFX908: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr4, implicit $exec ; GFX908: $vgpr3 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2, implicit $vgpr1 ; GFX908: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2, implicit $vgpr1
; GFX90A-LABEL: name: a3_to_a3_overlap_kill ; GFX90A-LABEL: name: a3_to_a3_overlap_kill
; GFX90A: liveins: $agpr1_agpr2_agpr3 ; GFX90A: liveins: $agpr1_agpr2_agpr3
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr1_agpr2_agpr3 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit-def $agpr0_agpr1_agpr2 ; GFX90A: $agpr0 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit $agpr1_agpr2_agpr3 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX90A: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr1_agpr2_agpr3 ; GFX90A: $agpr1 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec ; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2, implicit $vgpr1 ; GFX90A: S_ENDPGM 0, implicit $agpr0_agpr1_agpr2, implicit $vgpr1
$agpr0_agpr1_agpr2 = COPY killed $agpr1_agpr2_agpr3 $agpr0_agpr1_agpr2 = COPY killed $agpr1_agpr2_agpr3
$vgpr1 = COPY $agpr1 $vgpr1 = COPY $agpr1
S_ENDPGM 0, implicit $agpr0_agpr1_agpr2, implicit $vgpr1 S_ENDPGM 0, implicit $agpr0_agpr1_agpr2, implicit $vgpr1
... ...
--- ---
name: a4_to_a4 name: a4_to_a4
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
; GFX908-LABEL: name: a4_to_a4 ; GFX908-LABEL: name: a4_to_a4
; GFX908: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF ; GFX908: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec, implicit-def $agpr2_agpr3_agpr4_agpr5 ; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr3 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit $exec ; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr2_agpr3_agpr4_agpr5 ; GFX908: S_ENDPGM 0, implicit $agpr2_agpr3_agpr4_agpr5
; GFX90A-LABEL: name: a4_to_a4 ; GFX90A-LABEL: name: a4_to_a4
; GFX90A: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF ; GFX90A: $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit-def $agpr2_agpr3_agpr4_agpr5 ; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr2_agpr3_agpr4_agpr5 ; GFX90A: S_ENDPGM 0, implicit $agpr2_agpr3_agpr4_agpr5
$agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF $agpr0_agpr1_agpr2_agpr3 = IMPLICIT_DEF
$agpr2_agpr3_agpr4_agpr5 = COPY killed $agpr0_agpr1_agpr2_agpr3, implicit $exec $agpr2_agpr3_agpr4_agpr5 = COPY killed $agpr0_agpr1_agpr2_agpr3, implicit $exec
S_ENDPGM 0, implicit $agpr2_agpr3_agpr4_agpr5 S_ENDPGM 0, implicit $agpr2_agpr3_agpr4_agpr5
... ...
--- ---
name: a4_to_a4_overlap name: a4_to_a4_overlap
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $agpr0_agpr1_agpr2_agpr3 liveins: $agpr0_agpr1_agpr2_agpr3
; GFX908-LABEL: name: a4_to_a4_overlap ; GFX908-LABEL: name: a4_to_a4_overlap
; GFX908: liveins: $agpr0_agpr1_agpr2_agpr3 ; GFX908: liveins: $agpr0_agpr1_agpr2_agpr3
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec, implicit-def $agpr2_agpr3_agpr4_agpr5 ; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 $vgpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr3 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr3, implicit $exec, implicit $exec ; GFX908: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr0, implicit $agpr1, implicit $agpr2, implicit $agpr3, implicit $agpr4, implicit $agpr5 ; GFX908: S_ENDPGM 0, implicit $agpr0, implicit $agpr1, implicit $agpr2, implicit $agpr3, implicit $agpr4, implicit $agpr5
; GFX90A-LABEL: name: a4_to_a4_overlap ; GFX90A-LABEL: name: a4_to_a4_overlap
; GFX90A: liveins: $agpr0_agpr1_agpr2_agpr3 ; GFX90A: liveins: $agpr0_agpr1_agpr2_agpr3
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit-def $agpr2_agpr3_agpr4_agpr5 ; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 $vgpr0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $agpr3 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec
; GFX90A: $agpr2 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr0, implicit $agpr1, implicit $agpr2, implicit $agpr3, implicit $agpr4, implicit $agpr5 ; GFX90A: S_ENDPGM 0, implicit $agpr0, implicit $agpr1, implicit $agpr2, implicit $agpr3, implicit $agpr4, implicit $agpr5
$agpr2_agpr3_agpr4_agpr5 = COPY $agpr0_agpr1_agpr2_agpr3, implicit $exec $agpr2_agpr3_agpr4_agpr5 = COPY $agpr0_agpr1_agpr2_agpr3, implicit $exec
S_ENDPGM 0, implicit $agpr0, implicit $agpr1, implicit $agpr2, implicit $agpr3, implicit $agpr4, implicit $agpr5 S_ENDPGM 0, implicit $agpr0, implicit $agpr1, implicit $agpr2, implicit $agpr3, implicit $agpr4, implicit $agpr5
... ...
--- ---
name: a8_to_a8 name: a8_to_a8
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
; GFX908-LABEL: name: a8_to_a8 ; GFX908-LABEL: name: a8_to_a8
; GFX908: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF ; GFX908: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr7, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr7, implicit $exec
; GFX908: $agpr15 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $agpr15 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec
; GFX908: $agpr14 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr14 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec
; GFX908: $agpr13 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr13 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec
; GFX908: $agpr12 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr12 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX908: $agpr11 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr11 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX908: $agpr10 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr10 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX908: $agpr9 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr9 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; GFX908: $agpr8 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $exec ; GFX908: $agpr8 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: S_ENDPGM 0, implicit $agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
; GFX90A-LABEL: name: a8_to_a8 ; GFX90A-LABEL: name: a8_to_a8
; GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF ; GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr7, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr7, implicit $exec
; GFX90A: $agpr15 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $agpr15 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec
; GFX90A: $agpr14 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr14 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec
; GFX90A: $agpr13 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr13 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec
; GFX90A: $agpr12 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr12 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX90A: $agpr11 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr11 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX90A: $agpr10 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr10 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX90A: $agpr9 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr9 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; GFX90A: $agpr8 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec ; GFX90A: $agpr8 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: S_ENDPGM 0, implicit $agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
$agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7 = IMPLICIT_DEF
$agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = COPY killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $exec $agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = COPY killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7, implicit $exec
S_ENDPGM 0, implicit $agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 S_ENDPGM 0, implicit $agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15
... ...
--- ---
name: a16_to_a16 name: a16_to_a16
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
; GFX908-LABEL: name: a16_to_a16 ; GFX908-LABEL: name: a16_to_a16
; GFX908: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF ; GFX908: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr15, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr15, implicit $exec
; GFX908: $agpr31 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit-def $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 ; GFX908: $agpr31 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr14, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr14, implicit $exec
; GFX908: $agpr30 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr30 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr13, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr13, implicit $exec
; GFX908: $agpr29 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr29 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr12, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr12, implicit $exec
; GFX908: $agpr28 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr28 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr11, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr11, implicit $exec
; GFX908: $agpr27 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr27 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr10, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr10, implicit $exec
; GFX908: $agpr26 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr26 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr9, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr9, implicit $exec
; GFX908: $agpr25 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr25 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr8, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr8, implicit $exec
; GFX908: $agpr24 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr24 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr7, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr7, implicit $exec
; GFX908: $agpr23 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr23 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec
; GFX908: $agpr22 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr22 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec
; GFX908: $agpr21 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr21 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec
; GFX908: $agpr20 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr20 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX908: $agpr19 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec ; GFX908: $agpr19 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX908: $agpr18 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr18 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX908: $agpr17 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec ; GFX908: $agpr17 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; GFX908: $agpr16 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec ; GFX908: $agpr16 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 ; GFX908: S_ENDPGM 0, implicit $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
; GFX90A-LABEL: name: a16_to_a16 ; GFX90A-LABEL: name: a16_to_a16
; GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF ; GFX90A: $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr15, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr15, implicit $exec
; GFX90A: $agpr31 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 ; GFX90A: $agpr31 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr14, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr14, implicit $exec
; GFX90A: $agpr30 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr30 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr13, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr13, implicit $exec
; GFX90A: $agpr29 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr29 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr12, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr12, implicit $exec
; GFX90A: $agpr28 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr28 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr11, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr11, implicit $exec
; GFX90A: $agpr27 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr27 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr10, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr10, implicit $exec
; GFX90A: $agpr26 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr26 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr9, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr9, implicit $exec
; GFX90A: $agpr25 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr25 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr8, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr8, implicit $exec
; GFX90A: $agpr24 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr24 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr7, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr7, implicit $exec
; GFX90A: $agpr23 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr23 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr6, implicit $exec
; GFX90A: $agpr22 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr22 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr5, implicit $exec
; GFX90A: $agpr21 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr21 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr4, implicit $exec
; GFX90A: $agpr20 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr20 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX90A: $agpr19 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr19 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX90A: $agpr18 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr18 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec
; GFX90A: $agpr17 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr17 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
; GFX90A: $agpr16 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec ; GFX90A: $agpr16 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 ; GFX90A: S_ENDPGM 0, implicit $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
$agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15 = IMPLICIT_DEF
$agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = COPY killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $exec $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 = COPY killed $agpr0_agpr1_agpr2_agpr3_agpr4_agpr5_agpr6_agpr7_agpr8_agpr9_agpr10_agpr11_agpr12_agpr13_agpr14_agpr15, implicit $exec
S_ENDPGM 0, implicit $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31 S_ENDPGM 0, implicit $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27_agpr28_agpr29_agpr30_agpr31
... ...
# Using last vgpr255 will raise error about absence of emergency spill slot. # Using last vgpr255 will raise error about absence of emergency spill slot.
Show All 26 Lines
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $agpr0, $sgpr2_sgpr3 liveins: $agpr0, $sgpr2_sgpr3
; GFX908-LABEL: name: copy_sgpr_to_agpr_tuple ; GFX908-LABEL: name: copy_sgpr_to_agpr_tuple
; GFX908: liveins: $agpr0, $sgpr2_sgpr3 ; GFX908: liveins: $agpr0, $sgpr2_sgpr3
; GFX908: S_NOP 0, implicit-def dead $sgpr0_sgpr1 ; GFX908: S_NOP 0, implicit-def dead $sgpr0_sgpr1
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr3, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr3, implicit $exec
; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit-def $agpr4_agpr5_agpr6_agpr7 ; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3
; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3
; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A-LABEL: name: copy_sgpr_to_agpr_tuple ; GFX90A-LABEL: name: copy_sgpr_to_agpr_tuple
; GFX90A: liveins: $agpr0, $sgpr2_sgpr3 ; GFX90A: liveins: $agpr0, $sgpr2_sgpr3
; GFX90A: S_NOP 0, implicit-def dead $sgpr0_sgpr1 ; GFX90A: S_NOP 0, implicit-def dead $sgpr0_sgpr1
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec
; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr4_agpr5_agpr6_agpr7 ; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3
S_NOP 0, implicit-def dead $sgpr0_sgpr1 S_NOP 0, implicit-def dead $sgpr0_sgpr1
renamable $agpr4_agpr5_agpr6_agpr7 = COPY renamable $sgpr0_sgpr1_sgpr2_sgpr3, implicit $exec renamable $agpr4_agpr5_agpr6_agpr7 = COPY renamable $sgpr0_sgpr1_sgpr2_sgpr3, implicit $exec
S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3 S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3
... ...
--- ---
name: copy_sgpr_to_agpr_tuple_kill name: copy_sgpr_to_agpr_tuple_kill
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $agpr0, $sgpr2_sgpr3 liveins: $agpr0, $sgpr2_sgpr3
; GFX908-LABEL: name: copy_sgpr_to_agpr_tuple_kill ; GFX908-LABEL: name: copy_sgpr_to_agpr_tuple_kill
; GFX908: liveins: $agpr0, $sgpr2_sgpr3 ; GFX908: liveins: $agpr0, $sgpr2_sgpr3
; GFX908: S_NOP 0, implicit-def dead $sgpr0_sgpr1 ; GFX908: S_NOP 0, implicit-def dead $sgpr0_sgpr1
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr3, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr3, implicit $exec
; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit-def $agpr4_agpr5_agpr6_agpr7 ; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3
; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 killed $sgpr0, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3
; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7 ; GFX908: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7
; GFX90A-LABEL: name: copy_sgpr_to_agpr_tuple_kill ; GFX90A-LABEL: name: copy_sgpr_to_agpr_tuple_kill
; GFX90A: liveins: $agpr0, $sgpr2_sgpr3 ; GFX90A: liveins: $agpr0, $sgpr2_sgpr3
; GFX90A: S_NOP 0, implicit-def dead $sgpr0_sgpr1 ; GFX90A: S_NOP 0, implicit-def dead $sgpr0_sgpr1
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr3, implicit $exec
; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr4_agpr5_agpr6_agpr7 ; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_MOV_B32_e32 killed $sgpr0, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3
; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7 ; GFX90A: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7
S_NOP 0, implicit-def dead $sgpr0_sgpr1 S_NOP 0, implicit-def dead $sgpr0_sgpr1
renamable $agpr4_agpr5_agpr6_agpr7 = COPY renamable killed $sgpr0_sgpr1_sgpr2_sgpr3, implicit $exec renamable $agpr4_agpr5_agpr6_agpr7 = COPY renamable killed $sgpr0_sgpr1_sgpr2_sgpr3, implicit $exec
S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7 S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7
... ...
--- ---
name: copy_agpr_to_agpr_tuple name: copy_agpr_to_agpr_tuple
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $agpr0, $agpr2_agpr3 liveins: $agpr0, $agpr2_agpr3
; GFX908-LABEL: name: copy_agpr_to_agpr_tuple ; GFX908-LABEL: name: copy_agpr_to_agpr_tuple
; GFX908: liveins: $agpr0, $agpr2_agpr3 ; GFX908: liveins: $agpr0, $agpr2_agpr3
; GFX908: S_NOP 0, implicit-def dead $agpr0_agpr1 ; GFX908: S_NOP 0, implicit-def dead $agpr0_agpr1
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit-def $agpr4_agpr5_agpr6_agpr7 ; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3
; GFX90A-LABEL: name: copy_agpr_to_agpr_tuple ; GFX90A-LABEL: name: copy_agpr_to_agpr_tuple
; GFX90A: liveins: $agpr0, $agpr2_agpr3 ; GFX90A: liveins: $agpr0, $agpr2_agpr3
; GFX90A: S_NOP 0, implicit-def dead $agpr0_agpr1 ; GFX90A: S_NOP 0, implicit-def dead $agpr0_agpr1
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr4_agpr5_agpr6_agpr7 ; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr0, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3
S_NOP 0, implicit-def dead $agpr0_agpr1 S_NOP 0, implicit-def dead $agpr0_agpr1
renamable $agpr4_agpr5_agpr6_agpr7 = COPY renamable $agpr0_agpr1_agpr2_agpr3, implicit $exec renamable $agpr4_agpr5_agpr6_agpr7 = COPY renamable $agpr0_agpr1_agpr2_agpr3, implicit $exec
S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3 S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7, implicit $agpr0_agpr1_agpr2_agpr3
... ...
--- ---
name: copy_agpr_to_agpr_tuple_kill name: copy_agpr_to_agpr_tuple_kill
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $agpr0, $agpr2_agpr3 liveins: $agpr0, $agpr2_agpr3
; GFX908-LABEL: name: copy_agpr_to_agpr_tuple_kill ; GFX908-LABEL: name: copy_agpr_to_agpr_tuple_kill
; GFX908: liveins: $agpr0, $agpr2_agpr3 ; GFX908: liveins: $agpr0, $agpr2_agpr3
; GFX908: S_NOP 0, implicit-def dead $agpr0_agpr1 ; GFX908: S_NOP 0, implicit-def dead $agpr0_agpr1
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit-def $agpr4_agpr5_agpr6_agpr7 ; GFX908: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX908: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX908: $vgpr2 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
; GFX908: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr2, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit killed $agpr0_agpr1_agpr2_agpr3
; GFX908: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr1, implicit $exec, implicit $exec
; GFX908: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7 ; GFX908: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7
; GFX90A-LABEL: name: copy_agpr_to_agpr_tuple_kill ; GFX90A-LABEL: name: copy_agpr_to_agpr_tuple_kill
; GFX90A: liveins: $agpr0, $agpr2_agpr3 ; GFX90A: liveins: $agpr0, $agpr2_agpr3
; GFX90A: S_NOP 0, implicit-def dead $agpr0_agpr1 ; GFX90A: S_NOP 0, implicit-def dead $agpr0_agpr1
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec
; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit-def $agpr4_agpr5_agpr6_agpr7 ; GFX90A: $agpr7 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec ; GFX90A: $agpr6 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr1, implicit $exec, implicit $agpr0_agpr1_agpr2_agpr3
; GFX90A: $agpr5 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec, implicit killed $agpr0_agpr1_agpr2_agpr3
; GFX90A: $agpr4 = V_ACCVGPR_WRITE_B32_e64 killed $vgpr0, implicit $exec, implicit $exec
; GFX90A: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7 ; GFX90A: S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7
S_NOP 0, implicit-def dead $agpr0_agpr1 S_NOP 0, implicit-def dead $agpr0_agpr1
renamable $agpr4_agpr5_agpr6_agpr7 = COPY renamable killed $agpr0_agpr1_agpr2_agpr3, implicit $exec renamable $agpr4_agpr5_agpr6_agpr7 = COPY renamable killed $agpr0_agpr1_agpr2_agpr3, implicit $exec
S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7 S_ENDPGM 0, implicit $agpr4_agpr5_agpr6_agpr7
... ...

llvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll

Show First 20 Lines • Show All 3,339 Lines • ▼ Show 20 Lines
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GFX8-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 ; GFX8-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
; GFX8-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 ; GFX8-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
; GFX8-NEXT: ; implicit-def: $vgpr0_vgpr1 ; GFX8-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX8-NEXT: s_and_saveexec_b64 s[2:3], vcc ; GFX8-NEXT: s_and_saveexec_b64 s[2:3], vcc
; GFX8-NEXT: s_cbranch_execz BB18_2 ; GFX8-NEXT: s_cbranch_execz BB18_2
; GFX8-NEXT: ; %bb.1: ; GFX8-NEXT: ; %bb.1:
; GFX8-NEXT: v_mov_b32_e32 v0, 5
; GFX8-NEXT: v_mov_b32_e32 v2, 0 ; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_mov_b32_e32 v0, 5
; GFX8-NEXT: v_mov_b32_e32 v1, 0 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: s_mov_b32 m0, -1 ; GFX8-NEXT: s_mov_b32 m0, -1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: ds_max_rtn_i64 v[0:1], v2, v[0:1] ; GFX8-NEXT: ds_max_rtn_i64 v[0:1], v2, v[0:1]
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: BB18_2: ; GFX8-NEXT: BB18_2:
; GFX8-NEXT: s_or_b64 exec, exec, s[2:3] ; GFX8-NEXT: s_or_b64 exec, exec, s[2:3]
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 399 Lines • ▼ Show 20 Lines
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GFX8-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 ; GFX8-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
; GFX8-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 ; GFX8-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
; GFX8-NEXT: ; implicit-def: $vgpr0_vgpr1 ; GFX8-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX8-NEXT: s_and_saveexec_b64 s[2:3], vcc ; GFX8-NEXT: s_and_saveexec_b64 s[2:3], vcc
; GFX8-NEXT: s_cbranch_execz BB20_2 ; GFX8-NEXT: s_cbranch_execz BB20_2
; GFX8-NEXT: ; %bb.1: ; GFX8-NEXT: ; %bb.1:
; GFX8-NEXT: v_mov_b32_e32 v0, 5
; GFX8-NEXT: v_mov_b32_e32 v2, 0 ; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_mov_b32_e32 v0, 5
; GFX8-NEXT: v_mov_b32_e32 v1, 0 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: s_mov_b32 m0, -1 ; GFX8-NEXT: s_mov_b32 m0, -1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: ds_min_rtn_i64 v[0:1], v2, v[0:1] ; GFX8-NEXT: ds_min_rtn_i64 v[0:1], v2, v[0:1]
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: BB20_2: ; GFX8-NEXT: BB20_2:
; GFX8-NEXT: s_or_b64 exec, exec, s[2:3] ; GFX8-NEXT: s_or_b64 exec, exec, s[2:3]
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 394 Lines • ▼ Show 20 Lines
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GFX8-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 ; GFX8-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
; GFX8-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 ; GFX8-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
; GFX8-NEXT: ; implicit-def: $vgpr0_vgpr1 ; GFX8-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX8-NEXT: s_and_saveexec_b64 s[2:3], vcc ; GFX8-NEXT: s_and_saveexec_b64 s[2:3], vcc
; GFX8-NEXT: s_cbranch_execz BB22_2 ; GFX8-NEXT: s_cbranch_execz BB22_2
; GFX8-NEXT: ; %bb.1: ; GFX8-NEXT: ; %bb.1:
; GFX8-NEXT: v_mov_b32_e32 v0, 5
; GFX8-NEXT: v_mov_b32_e32 v2, 0 ; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_mov_b32_e32 v0, 5
; GFX8-NEXT: v_mov_b32_e32 v1, 0 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: s_mov_b32 m0, -1 ; GFX8-NEXT: s_mov_b32 m0, -1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: ds_max_rtn_u64 v[0:1], v2, v[0:1] ; GFX8-NEXT: ds_max_rtn_u64 v[0:1], v2, v[0:1]
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: BB22_2: ; GFX8-NEXT: BB22_2:
; GFX8-NEXT: s_or_b64 exec, exec, s[2:3] ; GFX8-NEXT: s_or_b64 exec, exec, s[2:3]
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 392 Lines • ▼ Show 20 Lines
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GFX8-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0 ; GFX8-NEXT: v_mbcnt_lo_u32_b32 v0, exec_lo, 0
; GFX8-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0 ; GFX8-NEXT: v_mbcnt_hi_u32_b32 v0, exec_hi, v0
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
; GFX8-NEXT: ; implicit-def: $vgpr0_vgpr1 ; GFX8-NEXT: ; implicit-def: $vgpr0_vgpr1
; GFX8-NEXT: s_and_saveexec_b64 s[2:3], vcc ; GFX8-NEXT: s_and_saveexec_b64 s[2:3], vcc
; GFX8-NEXT: s_cbranch_execz BB24_2 ; GFX8-NEXT: s_cbranch_execz BB24_2
; GFX8-NEXT: ; %bb.1: ; GFX8-NEXT: ; %bb.1:
; GFX8-NEXT: v_mov_b32_e32 v0, 5
; GFX8-NEXT: v_mov_b32_e32 v2, 0 ; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_mov_b32_e32 v0, 5
; GFX8-NEXT: v_mov_b32_e32 v1, 0 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: s_mov_b32 m0, -1 ; GFX8-NEXT: s_mov_b32 m0, -1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: ds_min_rtn_u64 v[0:1], v2, v[0:1] ; GFX8-NEXT: ds_min_rtn_u64 v[0:1], v2, v[0:1]
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: BB24_2: ; GFX8-NEXT: BB24_2:
; GFX8-NEXT: s_or_b64 exec, exec, s[2:3] ; GFX8-NEXT: s_or_b64 exec, exec, s[2:3]
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
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llvm/test/CodeGen/AMDGPU/bitreverse.ll

Show First 20 Lines • Show All 96 Lines • ▼ Show 20 Lines
; GISEL-LABEL: v_brev_i16: ; GISEL-LABEL: v_brev_i16:
; GISEL: ; %bb.0: ; GISEL: ; %bb.0:
; GISEL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GISEL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GISEL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; GISEL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-NEXT: v_mov_b32_e32 v0, s0 ; GISEL-NEXT: v_mov_b32_e32 v0, s0
; GISEL-NEXT: v_mov_b32_e32 v1, s1 ; GISEL-NEXT: v_mov_b32_e32 v1, s1
; GISEL-NEXT: flat_load_ushort v0, v[0:1] ; GISEL-NEXT: flat_load_ushort v0, v[0:1]
; GISEL-NEXT: v_mov_b32_e32 v1, s3
; GISEL-NEXT: s_waitcnt vmcnt(0) ; GISEL-NEXT: s_waitcnt vmcnt(0)
; GISEL-NEXT: v_bfrev_b32_e32 v0, v0 ; GISEL-NEXT: v_bfrev_b32_e32 v0, v0
; GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GISEL-NEXT: v_mov_b32_e32 v0, s2
; GISEL-NEXT: v_mov_b32_e32 v1, s3
; GISEL-NEXT: flat_store_short v[0:1], v2 ; GISEL-NEXT: flat_store_short v[0:1], v2
; GISEL-NEXT: s_endpgm ; GISEL-NEXT: s_endpgm
%val = load i16, i16 addrspace(1)* %valptr %val = load i16, i16 addrspace(1)* %valptr
%brev = call i16 @llvm.bitreverse.i16(i16 %val) #1 %brev = call i16 @llvm.bitreverse.i16(i16 %val) #1
store i16 %brev, i16 addrspace(1)* %out store i16 %brev, i16 addrspace(1)* %out
ret void ret void
} }
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; GISEL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; GISEL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; GISEL-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; GISEL-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-NEXT: v_mov_b32_e32 v0, s0 ; GISEL-NEXT: v_mov_b32_e32 v0, s0
; GISEL-NEXT: v_mov_b32_e32 v1, s1 ; GISEL-NEXT: v_mov_b32_e32 v1, s1
; GISEL-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; GISEL-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GISEL-NEXT: flat_load_dword v0, v[0:1] ; GISEL-NEXT: flat_load_dword v0, v[0:1]
; GISEL-NEXT: v_mov_b32_e32 v1, s3
; GISEL-NEXT: s_waitcnt vmcnt(0) ; GISEL-NEXT: s_waitcnt vmcnt(0)
; GISEL-NEXT: v_bfrev_b32_e32 v2, v0 ; GISEL-NEXT: v_bfrev_b32_e32 v2, v0
; GISEL-NEXT: v_mov_b32_e32 v0, s2 ; GISEL-NEXT: v_mov_b32_e32 v0, s2
; GISEL-NEXT: v_mov_b32_e32 v1, s3
; GISEL-NEXT: flat_store_dword v[0:1], v2 ; GISEL-NEXT: flat_store_dword v[0:1], v2
; GISEL-NEXT: s_endpgm ; GISEL-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr i32, i32 addrspace(1)* %valptr, i32 %tid %gep = getelementptr i32, i32 addrspace(1)* %valptr, i32 %tid
%val = load i32, i32 addrspace(1)* %gep %val = load i32, i32 addrspace(1)* %gep
%brev = call i32 @llvm.bitreverse.i32(i32 %val) #1 %brev = call i32 @llvm.bitreverse.i32(i32 %val) #1
store i32 %brev, i32 addrspace(1)* %out store i32 %brev, i32 addrspace(1)* %out
ret void ret void
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; FLAT-NEXT: s_endpgm ; FLAT-NEXT: s_endpgm
; ;
; GISEL-LABEL: v_brev_v2i32: ; GISEL-LABEL: v_brev_v2i32:
; GISEL: ; %bb.0: ; GISEL: ; %bb.0:
; GISEL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GISEL-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GISEL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; GISEL-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; GISEL-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; GISEL-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; GISEL-NEXT: s_waitcnt lgkmcnt(0) ; GISEL-NEXT: s_waitcnt lgkmcnt(0)
; GISEL-NEXT: v_mov_b32_e32 v3, s3
; GISEL-NEXT: v_mov_b32_e32 v0, s0 ; GISEL-NEXT: v_mov_b32_e32 v0, s0
; GISEL-NEXT: v_mov_b32_e32 v1, s1 ; GISEL-NEXT: v_mov_b32_e32 v1, s1
; GISEL-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; GISEL-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GISEL-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GISEL-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GISEL-NEXT: v_mov_b32_e32 v2, s2 ; GISEL-NEXT: v_mov_b32_e32 v2, s2
; GISEL-NEXT: v_mov_b32_e32 v3, s3
; GISEL-NEXT: s_waitcnt vmcnt(0) ; GISEL-NEXT: s_waitcnt vmcnt(0)
; GISEL-NEXT: v_bfrev_b32_e32 v0, v0 ; GISEL-NEXT: v_bfrev_b32_e32 v0, v0
; GISEL-NEXT: v_bfrev_b32_e32 v1, v1 ; GISEL-NEXT: v_bfrev_b32_e32 v1, v1
; GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GISEL-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GISEL-NEXT: s_endpgm ; GISEL-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %valptr, i32 %tid %gep = getelementptr <2 x i32>, <2 x i32> addrspace(1)* %valptr, i32 %tid
%val = load <2 x i32>, <2 x i32> addrspace(1)* %gep %val = load <2 x i32>, <2 x i32> addrspace(1)* %gep
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; GISEL-NEXT: v_mov_b32_e32 v0, s0 ; GISEL-NEXT: v_mov_b32_e32 v0, s0
; GISEL-NEXT: v_mov_b32_e32 v1, s1 ; GISEL-NEXT: v_mov_b32_e32 v1, s1
; GISEL-NEXT: v_add_u32_e32 v0, vcc, v0, v2 ; GISEL-NEXT: v_add_u32_e32 v0, vcc, v0, v2
; GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GISEL-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GISEL-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GISEL-NEXT: s_waitcnt vmcnt(0) ; GISEL-NEXT: s_waitcnt vmcnt(0)
; GISEL-NEXT: v_bfrev_b32_e32 v4, v1 ; GISEL-NEXT: v_bfrev_b32_e32 v4, v1
; GISEL-NEXT: v_bfrev_b32_e32 v5, v0 ; GISEL-NEXT: v_bfrev_b32_e32 v5, v0
; GISEL-NEXT: v_mov_b32_e32 v0, s2
; GISEL-NEXT: v_bfrev_b32_e32 v6, v3 ; GISEL-NEXT: v_bfrev_b32_e32 v6, v3
; GISEL-NEXT: v_bfrev_b32_e32 v7, v2 ; GISEL-NEXT: v_bfrev_b32_e32 v7, v2
; GISEL-NEXT: v_mov_b32_e32 v0, s2
; GISEL-NEXT: v_mov_b32_e32 v1, s3 ; GISEL-NEXT: v_mov_b32_e32 v1, s3
; GISEL-NEXT: flat_store_dwordx4 v[0:1], v[4:7] ; GISEL-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
; GISEL-NEXT: s_endpgm ; GISEL-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%gep = getelementptr <2 x i64> , <2 x i64> addrspace(1)* %valptr, i32 %tid %gep = getelementptr <2 x i64> , <2 x i64> addrspace(1)* %valptr, i32 %tid
%val = load <2 x i64>, <2 x i64> addrspace(1)* %gep %val = load <2 x i64>, <2 x i64> addrspace(1)* %gep
%brev = call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %val) #1 %brev = call <2 x i64> @llvm.bitreverse.v2i64(<2 x i64> %val) #1
store <2 x i64> %brev, <2 x i64> addrspace(1)* %out store <2 x i64> %brev, <2 x i64> addrspace(1)* %out
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llvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll

Show First 20 Lines • Show All 231 Lines • ▼ Show 20 Lines
; GCN-NEXT: s_setpc_b64 s[30:31] ; GCN-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX10-LABEL: chain_hi_to_lo_global: ; GFX10-LABEL: chain_hi_to_lo_global:
; GFX10: ; %bb.0: ; %bb ; GFX10: ; %bb.0: ; %bb
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: v_mov_b32_e32 v0, 2 ; GFX10-NEXT: v_mov_b32_e32 v0, 2
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: global_load_ushort v0, v[0:1], off ; GFX10-NEXT: global_load_ushort v0, v[0:1], off
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: global_load_short_d16_hi v0, v[1:2], off ; GFX10-NEXT: global_load_short_d16_hi v0, v[1:2], off
; GFX10-NEXT: s_waitcnt vmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0)
; GFX10-NEXT: s_setpc_b64 s[30:31] ; GFX10-NEXT: s_setpc_b64 s[30:31]
bb: bb:
%gep_lo = getelementptr inbounds half, half addrspace(1)* null, i64 1 %gep_lo = getelementptr inbounds half, half addrspace(1)* null, i64 1
%load_lo = load half, half addrspace(1)* %gep_lo %load_lo = load half, half addrspace(1)* %gep_lo
%gep_hi = getelementptr inbounds half, half addrspace(1)* null, i64 0 %gep_hi = getelementptr inbounds half, half addrspace(1)* null, i64 0
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; GCN-NEXT: s_setpc_b64 s[30:31] ; GCN-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX10-LABEL: chain_hi_to_lo_flat: ; GFX10-LABEL: chain_hi_to_lo_flat:
; GFX10: ; %bb.0: ; %bb ; GFX10: ; %bb.0: ; %bb
; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: v_mov_b32_e32 v0, 2 ; GFX10-NEXT: v_mov_b32_e32 v0, 2
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: flat_load_ushort v0, v[0:1] ; GFX10-NEXT: flat_load_ushort v0, v[0:1]
; GFX10-NEXT: v_mov_b32_e32 v1, 0 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: flat_load_short_d16_hi v0, v[1:2] ; GFX10-NEXT: flat_load_short_d16_hi v0, v[1:2]
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-NEXT: s_setpc_b64 s[30:31] ; GFX10-NEXT: s_setpc_b64 s[30:31]
bb: bb:
%gep_lo = getelementptr inbounds half, half* null, i64 1 %gep_lo = getelementptr inbounds half, half* null, i64 1
%load_lo = load half, half* %gep_lo %load_lo = load half, half* %gep_lo
%gep_hi = getelementptr inbounds half, half* null, i64 0 %gep_hi = getelementptr inbounds half, half* null, i64 0
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llvm/test/CodeGen/AMDGPU/cluster_stores.ll

Show First 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; GFX10: ; %bb.0: ; %bb ; GFX10: ; %bb.0: ; %bb
; GFX10-NEXT: s_clause 0x1 ; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c ; GFX10-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_add_u32 s0, s2, 8 ; GFX10-NEXT: s_add_u32 s0, s2, 8
; GFX10-NEXT: s_addc_u32 s1, s3, 0 ; GFX10-NEXT: s_addc_u32 s1, s3, 0
; GFX10-NEXT: s_add_u32 s6, s2, 16 ; GFX10-NEXT: s_add_u32 s6, s2, 16
; GFX10-NEXT: v_mov_b32_e32 v3, s1
; GFX10-NEXT: s_addc_u32 s7, s3, 0 ; GFX10-NEXT: s_addc_u32 s7, s3, 0
; GFX10-NEXT: v_mov_b32_e32 v0, s2 ; GFX10-NEXT: v_mov_b32_e32 v0, s2
; GFX10-NEXT: v_mov_b32_e32 v1, s3
; GFX10-NEXT: v_mov_b32_e32 v2, s0 ; GFX10-NEXT: v_mov_b32_e32 v2, s0
; GFX10-NEXT: s_add_u32 s0, s2, 24 ; GFX10-NEXT: s_add_u32 s0, s2, 24
; GFX10-NEXT: v_mov_b32_e32 v1, s3 ; GFX10-NEXT: v_mov_b32_e32 v3, s1
; GFX10-NEXT: s_addc_u32 s1, s3, 0 ; GFX10-NEXT: s_addc_u32 s1, s3, 0
; GFX10-NEXT: v_mov_b32_e32 v4, s6 ; GFX10-NEXT: v_mov_b32_e32 v4, s6
; GFX10-NEXT: v_mov_b32_e32 v5, s7 ; GFX10-NEXT: v_mov_b32_e32 v5, s7
; GFX10-NEXT: v_mov_b32_e32 v7, s1 ; GFX10-NEXT: v_mov_b32_e32 v7, s1
; GFX10-NEXT: v_mov_b32_e32 v6, s0 ; GFX10-NEXT: v_mov_b32_e32 v6, s0
; GFX10-NEXT: s_clause 0x3 ; GFX10-NEXT: s_clause 0x3
; GFX10-NEXT: flat_load_dword v8, v[0:1] ; GFX10-NEXT: flat_load_dword v8, v[0:1]
; GFX10-NEXT: flat_load_dword v9, v[2:3] ; GFX10-NEXT: flat_load_dword v9, v[2:3]
; GFX10-NEXT: flat_load_dword v10, v[4:5] ; GFX10-NEXT: flat_load_dword v10, v[4:5]
; GFX10-NEXT: flat_load_dword v11, v[6:7] ; GFX10-NEXT: flat_load_dword v11, v[6:7]
; GFX10-NEXT: s_add_u32 s0, s4, 8 ; GFX10-NEXT: s_add_u32 s0, s4, 8
; GFX10-NEXT: s_addc_u32 s1, s5, 0 ; GFX10-NEXT: s_addc_u32 s1, s5, 0
; GFX10-NEXT: v_mov_b32_e32 v0, s4
; GFX10-NEXT: v_mov_b32_e32 v3, s1
; GFX10-NEXT: v_mov_b32_e32 v2, s0 ; GFX10-NEXT: v_mov_b32_e32 v2, s0
; GFX10-NEXT: s_add_u32 s0, s4, 16 ; GFX10-NEXT: s_add_u32 s0, s4, 16
; GFX10-NEXT: v_mov_b32_e32 v3, s1
; GFX10-NEXT: s_addc_u32 s1, s5, 0 ; GFX10-NEXT: s_addc_u32 s1, s5, 0
; GFX10-NEXT: s_add_u32 s2, s4, 24 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
; GFX10-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-NEXT: v_mov_b32_e32 v1, s5
; GFX10-NEXT: s_add_u32 s2, s4, 24
; GFX10-NEXT: s_addc_u32 s3, s5, 0 ; GFX10-NEXT: s_addc_u32 s3, s5, 0
; GFX10-NEXT: v_mov_b32_e32 v5, s1 ; GFX10-NEXT: v_mov_b32_e32 v5, s1
; GFX10-NEXT: v_mov_b32_e32 v4, s0 ; GFX10-NEXT: v_mov_b32_e32 v4, s0
; GFX10-NEXT: v_mov_b32_e32 v7, s3 ; GFX10-NEXT: v_mov_b32_e32 v7, s3
; GFX10-NEXT: v_mov_b32_e32 v6, s2 ; GFX10-NEXT: v_mov_b32_e32 v6, s2
; GFX10-NEXT: s_waitcnt vmcnt(3) lgkmcnt(3) ; GFX10-NEXT: s_waitcnt vmcnt(3) lgkmcnt(3)
; GFX10-NEXT: flat_store_dword v[0:1], v8 ; GFX10-NEXT: flat_store_dword v[0:1], v8
; GFX10-NEXT: s_waitcnt vmcnt(2) lgkmcnt(3) ; GFX10-NEXT: s_waitcnt vmcnt(2) lgkmcnt(3)
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; GFX10-NEXT: s_add_u32 s0, s2, 8 ; GFX10-NEXT: s_add_u32 s0, s2, 8
; GFX10-NEXT: s_addc_u32 s1, s3, 0 ; GFX10-NEXT: s_addc_u32 s1, s3, 0
; GFX10-NEXT: s_add_u32 s6, s2, 16 ; GFX10-NEXT: s_add_u32 s6, s2, 16
; GFX10-NEXT: v_mov_b32_e32 v3, s1 ; GFX10-NEXT: v_mov_b32_e32 v3, s1
; GFX10-NEXT: v_mov_b32_e32 v2, s0 ; GFX10-NEXT: v_mov_b32_e32 v2, s0
; GFX10-NEXT: s_addc_u32 s7, s3, 0 ; GFX10-NEXT: s_addc_u32 s7, s3, 0
; GFX10-NEXT: s_add_u32 s0, s2, 24 ; GFX10-NEXT: s_add_u32 s0, s2, 24
; GFX10-NEXT: v_mov_b32_e32 v0, s2 ; GFX10-NEXT: v_mov_b32_e32 v0, s2
; GFX10-NEXT: s_addc_u32 s1, s3, 0
; GFX10-NEXT: v_mov_b32_e32 v1, s3 ; GFX10-NEXT: v_mov_b32_e32 v1, s3
; GFX10-NEXT: s_addc_u32 s1, s3, 0
; GFX10-NEXT: v_mov_b32_e32 v4, s6 ; GFX10-NEXT: v_mov_b32_e32 v4, s6
; GFX10-NEXT: v_mov_b32_e32 v5, s7 ; GFX10-NEXT: v_mov_b32_e32 v5, s7
; GFX10-NEXT: flat_load_dword v6, v[2:3] ; GFX10-NEXT: flat_load_dword v6, v[2:3]
; GFX10-NEXT: v_mov_b32_e32 v3, s1 ; GFX10-NEXT: v_mov_b32_e32 v3, s1
; GFX10-NEXT: v_mov_b32_e32 v2, s0 ; GFX10-NEXT: v_mov_b32_e32 v2, s0
; GFX10-NEXT: s_clause 0x2 ; GFX10-NEXT: s_clause 0x2
; GFX10-NEXT: flat_load_dword v8, v[0:1] ; GFX10-NEXT: flat_load_dword v8, v[0:1]
; GFX10-NEXT: flat_load_dword v9, v[4:5] ; GFX10-NEXT: flat_load_dword v9, v[4:5]
; GFX10-NEXT: flat_load_dword v10, v[2:3] ; GFX10-NEXT: flat_load_dword v10, v[2:3]
; GFX10-NEXT: s_add_u32 s0, s4, 8 ; GFX10-NEXT: s_add_u32 s0, s4, 8
; GFX10-NEXT: s_addc_u32 s1, s5, 0 ; GFX10-NEXT: s_addc_u32 s1, s5, 0
; GFX10-NEXT: s_add_u32 s2, s4, 16 ; GFX10-NEXT: s_add_u32 s2, s4, 16
; GFX10-NEXT: v_mov_b32_e32 v3, s1
; GFX10-NEXT: s_addc_u32 s3, s5, 0 ; GFX10-NEXT: s_addc_u32 s3, s5, 0
; GFX10-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
; GFX10-NEXT: v_mov_b32_e32 v1, s5
; GFX10-NEXT: v_mov_b32_e32 v2, s0 ; GFX10-NEXT: v_mov_b32_e32 v2, s0
; GFX10-NEXT: s_add_u32 s0, s4, 24 ; GFX10-NEXT: s_add_u32 s0, s4, 24
; GFX10-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-NEXT: v_mov_b32_e32 v3, s1
; GFX10-NEXT: v_mov_b32_e32 v5, s3 ; GFX10-NEXT: v_mov_b32_e32 v5, s3
; GFX10-NEXT: s_addc_u32 s1, s5, 0
; GFX10-NEXT: v_mov_b32_e32 v4, s2 ; GFX10-NEXT: v_mov_b32_e32 v4, s2
; GFX10-NEXT: s_addc_u32 s1, s5, 0
; GFX10-NEXT: v_mov_b32_e32 v7, s1
; GFX10-NEXT: s_waitcnt vmcnt(3) lgkmcnt(3) ; GFX10-NEXT: s_waitcnt vmcnt(3) lgkmcnt(3)
; GFX10-NEXT: v_add_nc_u32_e32 v11, 1, v6 ; GFX10-NEXT: v_add_nc_u32_e32 v11, 1, v6
; GFX10-NEXT: v_mov_b32_e32 v7, s1
; GFX10-NEXT: v_mov_b32_e32 v6, s0 ; GFX10-NEXT: v_mov_b32_e32 v6, s0
; GFX10-NEXT: s_waitcnt vmcnt(2) lgkmcnt(2) ; GFX10-NEXT: s_waitcnt vmcnt(2) lgkmcnt(2)
; GFX10-NEXT: flat_store_dword v[0:1], v8 ; GFX10-NEXT: flat_store_dword v[0:1], v8
; GFX10-NEXT: s_waitcnt vmcnt(1) lgkmcnt(2) ; GFX10-NEXT: s_waitcnt vmcnt(1) lgkmcnt(2)
; GFX10-NEXT: flat_store_dword v[4:5], v9 ; GFX10-NEXT: flat_store_dword v[4:5], v9
; GFX10-NEXT: flat_store_dword v[2:3], v11 ; GFX10-NEXT: flat_store_dword v[2:3], v11
; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(3) ; GFX10-NEXT: s_waitcnt vmcnt(0) lgkmcnt(3)
; GFX10-NEXT: flat_store_dword v[6:7], v10 ; GFX10-NEXT: flat_store_dword v[6:7], v10
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llvm/test/CodeGen/AMDGPU/copy-overlap-vgpr-kill.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=postrapseudos -o - %s | FileCheck %s # RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=postrapseudos -o - %s | FileCheck %s
# Don't set a kill of the super register on the last instruction with # Don't set a kill of the super register on the last instruction with
# an overlapping copy. This would kill part of the values in the # an overlapping copy. This would kill part of the values in the
# result copies. # result copies.
--- ---
name: overlapping_copy_kill_undef_reg_after_copy name: overlapping_copy_kill_undef_reg_after_copy
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr30_sgpr31, $vgpr1_vgpr2_vgpr3 liveins: $sgpr30_sgpr31, $vgpr1_vgpr2_vgpr3
; CHECK-LABEL: name: overlapping_copy_kill_undef_reg_after_copy ; CHECK-LABEL: name: overlapping_copy_kill_undef_reg_after_copy
; CHECK: liveins: $sgpr30_sgpr31, $vgpr1_vgpr2_vgpr3 ; CHECK: liveins: $sgpr30_sgpr31, $vgpr1_vgpr2_vgpr3
; CHECK: $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr1_vgpr2_vgpr3 ; CHECK: $vgpr0 = V_MOV_B32_e32 $vgpr1, implicit $exec
; CHECK: $vgpr1 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit $vgpr1_vgpr2_vgpr3 ; CHECK: $vgpr1 = V_MOV_B32_e32 $vgpr2, implicit $exec
; CHECK: $vgpr2 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit $vgpr1_vgpr2_vgpr3 ; CHECK: $vgpr2 = V_MOV_B32_e32 $vgpr3, implicit $exec
; CHECK: renamable $vgpr1 = nofpexcept V_MUL_F32_e32 0, $vgpr1, implicit $mode, implicit $exec ; CHECK: renamable $vgpr1 = nofpexcept V_MUL_F32_e32 0, $vgpr1, implicit $mode, implicit $exec
; CHECK: S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2 ; CHECK: S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2
renamable $vgpr0_vgpr1_vgpr2 = COPY killed renamable $vgpr1_vgpr2_vgpr3 renamable $vgpr0_vgpr1_vgpr2 = COPY killed renamable $vgpr1_vgpr2_vgpr3
renamable $vgpr1 = nofpexcept V_MUL_F32_e32 0, $vgpr1, implicit $mode, implicit $exec renamable $vgpr1 = nofpexcept V_MUL_F32_e32 0, $vgpr1, implicit $mode, implicit $exec
S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2 S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2
... ...
--- ---
name: overlapping_copy_kill_undef_reg_after_copy_1 name: overlapping_copy_kill_undef_reg_after_copy_1
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr30_sgpr31, $vgpr2_vgpr3_vgpr4 liveins: $sgpr30_sgpr31, $vgpr2_vgpr3_vgpr4
; CHECK-LABEL: name: overlapping_copy_kill_undef_reg_after_copy_1 ; CHECK-LABEL: name: overlapping_copy_kill_undef_reg_after_copy_1
; CHECK: liveins: $sgpr30_sgpr31, $vgpr2_vgpr3_vgpr4 ; CHECK: liveins: $sgpr30_sgpr31, $vgpr2_vgpr3_vgpr4
; CHECK: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr2_vgpr3_vgpr4 ; CHECK: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec
; CHECK: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit $vgpr2_vgpr3_vgpr4 ; CHECK: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec
; CHECK: $vgpr2 = V_MOV_B32_e32 $vgpr4, implicit $exec, implicit $vgpr2_vgpr3_vgpr4 ; CHECK: $vgpr2 = V_MOV_B32_e32 $vgpr4, implicit $exec
; CHECK: renamable $vgpr1 = nofpexcept V_MUL_F32_e32 0, $vgpr1, implicit $mode, implicit $exec ; CHECK: renamable $vgpr1 = nofpexcept V_MUL_F32_e32 0, $vgpr1, implicit $mode, implicit $exec
; CHECK: S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2 ; CHECK: S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2
renamable $vgpr0_vgpr1_vgpr2 = COPY killed renamable $vgpr2_vgpr3_vgpr4 renamable $vgpr0_vgpr1_vgpr2 = COPY killed renamable $vgpr2_vgpr3_vgpr4
renamable $vgpr1 = nofpexcept V_MUL_F32_e32 0, $vgpr1, implicit $mode, implicit $exec renamable $vgpr1 = nofpexcept V_MUL_F32_e32 0, $vgpr1, implicit $mode, implicit $exec
S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2 S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2
... ...
--- ---
name: nonoverlapping_copy_kill name: nonoverlapping_copy_kill
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr30_sgpr31, $vgpr3_vgpr4_vgpr5 liveins: $sgpr30_sgpr31, $vgpr3_vgpr4_vgpr5
; CHECK-LABEL: name: nonoverlapping_copy_kill ; CHECK-LABEL: name: nonoverlapping_copy_kill
; CHECK: liveins: $sgpr30_sgpr31, $vgpr3_vgpr4_vgpr5 ; CHECK: liveins: $sgpr30_sgpr31, $vgpr3_vgpr4_vgpr5
; CHECK: $vgpr0 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr3_vgpr4_vgpr5 ; CHECK: $vgpr0 = V_MOV_B32_e32 $vgpr3, implicit $exec
; CHECK: $vgpr1 = V_MOV_B32_e32 $vgpr4, implicit $exec, implicit $vgpr3_vgpr4_vgpr5 ; CHECK: $vgpr1 = V_MOV_B32_e32 $vgpr4, implicit $exec
; CHECK: $vgpr2 = V_MOV_B32_e32 $vgpr5, implicit $exec, implicit killed $vgpr3_vgpr4_vgpr5 ; CHECK: $vgpr2 = V_MOV_B32_e32 killed $vgpr5, implicit $exec
; CHECK: renamable $vgpr1 = nofpexcept V_MUL_F32_e32 0, $vgpr1, implicit $mode, implicit $exec ; CHECK: renamable $vgpr1 = nofpexcept V_MUL_F32_e32 0, $vgpr1, implicit $mode, implicit $exec
; CHECK: S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2 ; CHECK: S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2
renamable $vgpr0_vgpr1_vgpr2 = COPY killed renamable $vgpr3_vgpr4_vgpr5 renamable $vgpr0_vgpr1_vgpr2 = COPY killed renamable $vgpr3_vgpr4_vgpr5
renamable $vgpr1 = nofpexcept V_MUL_F32_e32 0, $vgpr1, implicit $mode, implicit $exec renamable $vgpr1 = nofpexcept V_MUL_F32_e32 0, $vgpr1, implicit $mode, implicit $exec
S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2 S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2
... ...
--- ---
name: overlapping_copy_kill_half_s128 name: overlapping_copy_kill_half_s128
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr30_sgpr31, $vgpr2_vgpr3_vgpr4_vgpr5 liveins: $sgpr30_sgpr31, $vgpr2_vgpr3_vgpr4_vgpr5
; CHECK-LABEL: name: overlapping_copy_kill_half_s128 ; CHECK-LABEL: name: overlapping_copy_kill_half_s128
; CHECK: liveins: $sgpr30_sgpr31, $vgpr2_vgpr3_vgpr4_vgpr5 ; CHECK: liveins: $sgpr30_sgpr31, $vgpr2_vgpr3_vgpr4_vgpr5
; CHECK: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr2_vgpr3_vgpr4_vgpr5 ; CHECK: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec
; CHECK: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit $vgpr2_vgpr3_vgpr4_vgpr5 ; CHECK: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec
; CHECK: $vgpr2 = V_MOV_B32_e32 $vgpr4, implicit $exec, implicit $vgpr2_vgpr3_vgpr4_vgpr5 ; CHECK: $vgpr2 = V_MOV_B32_e32 $vgpr4, implicit $exec
; CHECK: $vgpr3 = V_MOV_B32_e32 $vgpr5, implicit $exec, implicit $vgpr2_vgpr3_vgpr4_vgpr5 ; CHECK: $vgpr3 = V_MOV_B32_e32 $vgpr5, implicit $exec
; CHECK: renamable $vgpr1 = V_OR_B32_e32 1, $vgpr1, implicit $exec ; CHECK: renamable $vgpr1 = V_OR_B32_e32 1, $vgpr1, implicit $exec
; CHECK: S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3 ; CHECK: S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3
renamable $vgpr0_vgpr1_vgpr2_vgpr3 = COPY killed renamable $vgpr2_vgpr3_vgpr4_vgpr5 renamable $vgpr0_vgpr1_vgpr2_vgpr3 = COPY killed renamable $vgpr2_vgpr3_vgpr4_vgpr5
renamable $vgpr1 = V_OR_B32_e32 1, $vgpr1, implicit $exec renamable $vgpr1 = V_OR_B32_e32 1, $vgpr1, implicit $exec
S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3 S_SETPC_B64 $sgpr30_sgpr31, implicit $vgpr0, implicit $vgpr1, implicit $vgpr2, implicit $vgpr3
... ...

llvm/test/CodeGen/AMDGPU/copy_phys_vgpr64.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -mcpu=gfx908 -run-pass postrapseudos -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX908 %s # RUN: llc -march=amdgcn -mcpu=gfx908 -run-pass postrapseudos -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX908 %s
# RUN: llc -march=amdgcn -mcpu=gfx90a -run-pass postrapseudos -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX90A %s # RUN: llc -march=amdgcn -mcpu=gfx90a -run-pass postrapseudos -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX90A %s
# RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass postrapseudos -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX10 %s # RUN: llc -march=amdgcn -mcpu=gfx1010 -run-pass postrapseudos -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX10 %s
--- ---
name: copy_v64_to_v64 name: copy_v64_to_v64
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr2_vgpr3 liveins: $vgpr2_vgpr3
; GFX908-LABEL: name: copy_v64_to_v64 ; GFX908-LABEL: name: copy_v64_to_v64
; GFX908: liveins: $vgpr2_vgpr3 ; GFX908: liveins: $vgpr2_vgpr3
; GFX908: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr2_vgpr3 ; GFX908: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit killed $vgpr2_vgpr3, implicit $exec ; GFX908: $vgpr1 = V_MOV_B32_e32 killed $vgpr3, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_v64_to_v64 ; GFX90A-LABEL: name: copy_v64_to_v64
; GFX90A: liveins: $vgpr2_vgpr3 ; GFX90A: liveins: $vgpr2_vgpr3
; GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, $vgpr2_vgpr3, 12, $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit killed $vgpr2_vgpr3, implicit $exec ; GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, killed $vgpr2_vgpr3, 12, killed $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_v64_to_v64 ; GFX10-LABEL: name: copy_v64_to_v64
; GFX10: liveins: $vgpr2_vgpr3 ; GFX10: liveins: $vgpr2_vgpr3
; GFX10: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr2_vgpr3 ; GFX10: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec
; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit killed $vgpr2_vgpr3, implicit $exec ; GFX10: $vgpr1 = V_MOV_B32_e32 killed $vgpr3, implicit $exec, implicit $exec
$vgpr0_vgpr1 = COPY killed $vgpr2_vgpr3, implicit $exec $vgpr0_vgpr1 = COPY killed $vgpr2_vgpr3, implicit $exec
... ...
--- ---
name: copy_s64_to_v64 name: copy_s64_to_v64
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr2_sgpr3 liveins: $sgpr2_sgpr3
; GFX908-LABEL: name: copy_s64_to_v64 ; GFX908-LABEL: name: copy_s64_to_v64
; GFX908: liveins: $sgpr2_sgpr3 ; GFX908: liveins: $sgpr2_sgpr3
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr2_sgpr3 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr3, implicit $exec, implicit killed $sgpr2_sgpr3, implicit $exec ; GFX908: $vgpr1 = V_MOV_B32_e32 killed $sgpr3, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_s64_to_v64 ; GFX90A-LABEL: name: copy_s64_to_v64
; GFX90A: liveins: $sgpr2_sgpr3 ; GFX90A: liveins: $sgpr2_sgpr3
; GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, $sgpr2_sgpr3, 12, $sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit killed $sgpr2_sgpr3, implicit $exec ; GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, killed $sgpr2_sgpr3, 12, killed $sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_s64_to_v64 ; GFX10-LABEL: name: copy_s64_to_v64
; GFX10: liveins: $sgpr2_sgpr3 ; GFX10: liveins: $sgpr2_sgpr3
; GFX10: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $sgpr2_sgpr3 ; GFX10: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX10: $vgpr1 = V_MOV_B32_e32 $sgpr3, implicit $exec, implicit killed $sgpr2_sgpr3, implicit $exec ; GFX10: $vgpr1 = V_MOV_B32_e32 killed $sgpr3, implicit $exec, implicit $exec
$vgpr0_vgpr1 = COPY killed $sgpr2_sgpr3, implicit $exec $vgpr0_vgpr1 = COPY killed $sgpr2_sgpr3, implicit $exec
... ...
--- ---
name: copy_a64_to_v64 name: copy_a64_to_v64
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $agpr2_agpr3 liveins: $agpr2_agpr3
; GFX908-LABEL: name: copy_a64_to_v64 ; GFX908-LABEL: name: copy_a64_to_v64
; GFX908: liveins: $agpr2_agpr3 ; GFX908: liveins: $agpr2_agpr3
; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $agpr2_agpr3 ; GFX908: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit killed $agpr2_agpr3, implicit $exec ; GFX908: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_a64_to_v64 ; GFX90A-LABEL: name: copy_a64_to_v64
; GFX90A: liveins: $agpr2_agpr3 ; GFX90A: liveins: $agpr2_agpr3
; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $agpr2_agpr3 ; GFX90A: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit killed $agpr2_agpr3, implicit $exec ; GFX90A: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_a64_to_v64 ; GFX10-LABEL: name: copy_a64_to_v64
; GFX10: liveins: $agpr2_agpr3 ; GFX10: liveins: $agpr2_agpr3
; GFX10: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $agpr2_agpr3 ; GFX10: $vgpr0 = V_ACCVGPR_READ_B32_e64 $agpr2, implicit $exec
; GFX10: $vgpr1 = V_ACCVGPR_READ_B32_e64 $agpr3, implicit $exec, implicit killed $agpr2_agpr3, implicit $exec ; GFX10: $vgpr1 = V_ACCVGPR_READ_B32_e64 killed $agpr3, implicit $exec, implicit $exec
$vgpr0_vgpr1 = COPY killed $agpr2_agpr3, implicit $exec $vgpr0_vgpr1 = COPY killed $agpr2_agpr3, implicit $exec
... ...
--- ---
name: copy_v128_to_v128_fwd name: copy_v128_to_v128_fwd
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr2_vgpr3_vgpr4_vgpr5 liveins: $vgpr2_vgpr3_vgpr4_vgpr5
; GFX908-LABEL: name: copy_v128_to_v128_fwd ; GFX908-LABEL: name: copy_v128_to_v128_fwd
; GFX908: liveins: $vgpr2_vgpr3_vgpr4_vgpr5 ; GFX908: liveins: $vgpr2_vgpr3_vgpr4_vgpr5
; GFX908: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr2_vgpr3_vgpr4_vgpr5 ; GFX908: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit $vgpr2_vgpr3_vgpr4_vgpr5 ; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $vgpr4, implicit $exec, implicit $vgpr2_vgpr3_vgpr4_vgpr5 ; GFX908: $vgpr2 = V_MOV_B32_e32 $vgpr4, implicit $exec
; GFX908: $vgpr3 = V_MOV_B32_e32 $vgpr5, implicit $exec, implicit $vgpr2_vgpr3_vgpr4_vgpr5, implicit $exec ; GFX908: $vgpr3 = V_MOV_B32_e32 $vgpr5, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_v128_to_v128_fwd ; GFX90A-LABEL: name: copy_v128_to_v128_fwd
; GFX90A: liveins: $vgpr2_vgpr3_vgpr4_vgpr5 ; GFX90A: liveins: $vgpr2_vgpr3_vgpr4_vgpr5
; GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, $vgpr2_vgpr3, 12, $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $vgpr2_vgpr3_vgpr4_vgpr5, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, $vgpr2_vgpr3, 12, $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec
; GFX90A: $vgpr2_vgpr3 = V_PK_MOV_B32 8, $vgpr4_vgpr5, 12, $vgpr4_vgpr5, 0, 0, 0, 0, 0, implicit $exec, implicit $vgpr2_vgpr3_vgpr4_vgpr5, implicit $exec ; GFX90A: $vgpr2_vgpr3 = V_PK_MOV_B32 8, $vgpr4_vgpr5, 12, $vgpr4_vgpr5, 0, 0, 0, 0, 0, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_v128_to_v128_fwd ; GFX10-LABEL: name: copy_v128_to_v128_fwd
; GFX10: liveins: $vgpr2_vgpr3_vgpr4_vgpr5 ; GFX10: liveins: $vgpr2_vgpr3_vgpr4_vgpr5
; GFX10: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr2_vgpr3_vgpr4_vgpr5 ; GFX10: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec
; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit $vgpr2_vgpr3_vgpr4_vgpr5 ; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec
; GFX10: $vgpr2 = V_MOV_B32_e32 $vgpr4, implicit $exec, implicit $vgpr2_vgpr3_vgpr4_vgpr5 ; GFX10: $vgpr2 = V_MOV_B32_e32 $vgpr4, implicit $exec
; GFX10: $vgpr3 = V_MOV_B32_e32 $vgpr5, implicit $exec, implicit $vgpr2_vgpr3_vgpr4_vgpr5, implicit $exec ; GFX10: $vgpr3 = V_MOV_B32_e32 $vgpr5, implicit $exec, implicit $exec
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY killed $vgpr2_vgpr3_vgpr4_vgpr5, implicit $exec $vgpr0_vgpr1_vgpr2_vgpr3 = COPY killed $vgpr2_vgpr3_vgpr4_vgpr5, implicit $exec
... ...
--- ---
name: copy_v128_to_v128_back name: copy_v128_to_v128_back
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr0_vgpr1_vgpr2_vgpr3 liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX908-LABEL: name: copy_v128_to_v128_back ; GFX908-LABEL: name: copy_v128_to_v128_back
; GFX908: liveins: $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX908: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX908: $vgpr5 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit-def $vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX908: $vgpr5 = V_MOV_B32_e32 $vgpr3, implicit $exec
; GFX908: $vgpr4 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX908: $vgpr4 = V_MOV_B32_e32 $vgpr2, implicit $exec
; GFX908: $vgpr3 = V_MOV_B32_e32 $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX908: $vgpr3 = V_MOV_B32_e32 $vgpr1, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $vgpr0, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3, implicit $exec ; GFX908: $vgpr2 = V_MOV_B32_e32 $vgpr0, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_v128_to_v128_back ; GFX90A-LABEL: name: copy_v128_to_v128_back
; GFX90A: liveins: $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX90A: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX90A: $vgpr4_vgpr5 = V_PK_MOV_B32 8, $vgpr2_vgpr3, 12, $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3, implicit-def $vgpr2_vgpr3_vgpr4_vgpr5 ; GFX90A: $vgpr4_vgpr5 = V_PK_MOV_B32 8, $vgpr2_vgpr3, 12, $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec
; GFX90A: $vgpr2_vgpr3 = V_PK_MOV_B32 8, $vgpr0_vgpr1, 12, $vgpr0_vgpr1, 0, 0, 0, 0, 0, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3, implicit $exec ; GFX90A: $vgpr2_vgpr3 = V_PK_MOV_B32 8, $vgpr0_vgpr1, 12, $vgpr0_vgpr1, 0, 0, 0, 0, 0, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_v128_to_v128_back ; GFX10-LABEL: name: copy_v128_to_v128_back
; GFX10: liveins: $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX10: liveins: $vgpr0_vgpr1_vgpr2_vgpr3
; GFX10: $vgpr5 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit-def $vgpr2_vgpr3_vgpr4_vgpr5, implicit $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX10: $vgpr5 = V_MOV_B32_e32 $vgpr3, implicit $exec
; GFX10: $vgpr4 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX10: $vgpr4 = V_MOV_B32_e32 $vgpr2, implicit $exec
; GFX10: $vgpr3 = V_MOV_B32_e32 $vgpr1, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX10: $vgpr3 = V_MOV_B32_e32 $vgpr1, implicit $exec
; GFX10: $vgpr2 = V_MOV_B32_e32 $vgpr0, implicit $exec, implicit $vgpr0_vgpr1_vgpr2_vgpr3, implicit $exec ; GFX10: $vgpr2 = V_MOV_B32_e32 $vgpr0, implicit $exec, implicit $exec
$vgpr2_vgpr3_vgpr4_vgpr5 = COPY killed $vgpr0_vgpr1_vgpr2_vgpr3, implicit $exec $vgpr2_vgpr3_vgpr4_vgpr5 = COPY killed $vgpr0_vgpr1_vgpr2_vgpr3, implicit $exec
... ...
--- ---
name: copy_v96_to_v96 name: copy_v96_to_v96
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr4_vgpr5_vgpr6 liveins: $vgpr4_vgpr5_vgpr6
; GFX908-LABEL: name: copy_v96_to_v96 ; GFX908-LABEL: name: copy_v96_to_v96
; GFX908: liveins: $vgpr4_vgpr5_vgpr6 ; GFX908: liveins: $vgpr4_vgpr5_vgpr6
; GFX908: $vgpr0 = V_MOV_B32_e32 $vgpr4, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr4_vgpr5_vgpr6 ; GFX908: $vgpr0 = V_MOV_B32_e32 $vgpr4, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr5, implicit $exec, implicit $vgpr4_vgpr5_vgpr6 ; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr5, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $vgpr6, implicit $exec, implicit killed $vgpr4_vgpr5_vgpr6, implicit $exec ; GFX908: $vgpr2 = V_MOV_B32_e32 killed $vgpr6, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_v96_to_v96 ; GFX90A-LABEL: name: copy_v96_to_v96
; GFX90A: liveins: $vgpr4_vgpr5_vgpr6 ; GFX90A: liveins: $vgpr4_vgpr5_vgpr6
; GFX90A: $vgpr0 = V_MOV_B32_e32 $vgpr4, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr4_vgpr5_vgpr6 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $vgpr4, implicit $exec
; GFX90A: $vgpr1 = V_MOV_B32_e32 $vgpr5, implicit $exec, implicit $vgpr4_vgpr5_vgpr6 ; GFX90A: $vgpr1 = V_MOV_B32_e32 $vgpr5, implicit $exec
; GFX90A: $vgpr2 = V_MOV_B32_e32 $vgpr6, implicit $exec, implicit killed $vgpr4_vgpr5_vgpr6, implicit $exec ; GFX90A: $vgpr2 = V_MOV_B32_e32 killed $vgpr6, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_v96_to_v96 ; GFX10-LABEL: name: copy_v96_to_v96
; GFX10: liveins: $vgpr4_vgpr5_vgpr6 ; GFX10: liveins: $vgpr4_vgpr5_vgpr6
; GFX10: $vgpr0 = V_MOV_B32_e32 $vgpr4, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr4_vgpr5_vgpr6 ; GFX10: $vgpr0 = V_MOV_B32_e32 $vgpr4, implicit $exec
; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr5, implicit $exec, implicit $vgpr4_vgpr5_vgpr6 ; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr5, implicit $exec
; GFX10: $vgpr2 = V_MOV_B32_e32 $vgpr6, implicit $exec, implicit killed $vgpr4_vgpr5_vgpr6, implicit $exec ; GFX10: $vgpr2 = V_MOV_B32_e32 killed $vgpr6, implicit $exec, implicit $exec
$vgpr0_vgpr1_vgpr2 = COPY killed $vgpr4_vgpr5_vgpr6, implicit $exec $vgpr0_vgpr1_vgpr2 = COPY killed $vgpr4_vgpr5_vgpr6, implicit $exec
... ...
--- ---
name: copy_v64_to_v64_undef_sub0 name: copy_v64_to_v64_undef_sub0
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr3 liveins: $vgpr3
; GFX908-LABEL: name: copy_v64_to_v64_undef_sub0 ; GFX908-LABEL: name: copy_v64_to_v64_undef_sub0
; GFX908: liveins: $vgpr3 ; GFX908: liveins: $vgpr3
; GFX908: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr2_vgpr3 ; GFX908: $vgpr1 = V_MOV_B32_e32 killed $vgpr3, implicit $exec, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit killed $vgpr2_vgpr3, implicit $exec
; GFX90A-LABEL: name: copy_v64_to_v64_undef_sub0 ; GFX90A-LABEL: name: copy_v64_to_v64_undef_sub0
; GFX90A: liveins: $vgpr3 ; GFX90A: liveins: $vgpr3
; GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, $vgpr2_vgpr3, 12, $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit killed $vgpr2_vgpr3, implicit $exec ; GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, killed $vgpr2_vgpr3, 12, killed $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_v64_to_v64_undef_sub0 ; GFX10-LABEL: name: copy_v64_to_v64_undef_sub0
; GFX10: liveins: $vgpr3 ; GFX10: liveins: $vgpr3
; GFX10: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr2_vgpr3 ; GFX10: $vgpr1 = V_MOV_B32_e32 killed $vgpr3, implicit $exec, implicit $exec
; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit killed $vgpr2_vgpr3, implicit $exec
$vgpr0_vgpr1 = COPY killed $vgpr2_vgpr3, implicit $exec $vgpr0_vgpr1 = COPY killed $vgpr2_vgpr3, implicit $exec
... ...
--- ---
name: copy_v64_to_v64_undef_sub1 name: copy_v64_to_v64_undef_sub1
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr2 liveins: $vgpr2
; GFX908-LABEL: name: copy_v64_to_v64_undef_sub1 ; GFX908-LABEL: name: copy_v64_to_v64_undef_sub1
; GFX908: liveins: $vgpr2 ; GFX908: liveins: $vgpr2
; GFX908: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr2_vgpr3 ; GFX908: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit killed $vgpr2_vgpr3, implicit $exec
; GFX90A-LABEL: name: copy_v64_to_v64_undef_sub1 ; GFX90A-LABEL: name: copy_v64_to_v64_undef_sub1
; GFX90A: liveins: $vgpr2 ; GFX90A: liveins: $vgpr2
; GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, $vgpr2_vgpr3, 12, $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit killed $vgpr2_vgpr3, implicit $exec ; GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, killed $vgpr2_vgpr3, 12, killed $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_v64_to_v64_undef_sub1 ; GFX10-LABEL: name: copy_v64_to_v64_undef_sub1
; GFX10: liveins: $vgpr2 ; GFX10: liveins: $vgpr2
; GFX10: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr2_vgpr3 ; GFX10: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit $exec
; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit killed $vgpr2_vgpr3, implicit $exec
$vgpr0_vgpr1 = COPY killed $vgpr2_vgpr3, implicit $exec $vgpr0_vgpr1 = COPY killed $vgpr2_vgpr3, implicit $exec
... ...
--- ---
name: copy_s128_to_v128_killed name: copy_s128_to_v128_killed
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr4_sgpr5_sgpr6_sgpr7 liveins: $sgpr4_sgpr5_sgpr6_sgpr7
; GFX908-LABEL: name: copy_s128_to_v128_killed ; GFX908-LABEL: name: copy_s128_to_v128_killed
; GFX908: liveins: $sgpr4_sgpr5_sgpr6_sgpr7 ; GFX908: liveins: $sgpr4_sgpr5_sgpr6_sgpr7
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr4, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $sgpr4_sgpr5_sgpr6_sgpr7 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr4, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr5, implicit $exec, implicit $sgpr4_sgpr5_sgpr6_sgpr7 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr5, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr6, implicit $exec, implicit $sgpr4_sgpr5_sgpr6_sgpr7 ; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr6, implicit $exec
; GFX908: $vgpr3 = V_MOV_B32_e32 $sgpr7, implicit $exec, implicit killed $sgpr4_sgpr5_sgpr6_sgpr7 ; GFX908: $vgpr3 = V_MOV_B32_e32 killed $sgpr7, implicit $exec
; GFX90A-LABEL: name: copy_s128_to_v128_killed ; GFX90A-LABEL: name: copy_s128_to_v128_killed
; GFX90A: liveins: $sgpr4_sgpr5_sgpr6_sgpr7 ; GFX90A: liveins: $sgpr4_sgpr5_sgpr6_sgpr7
; GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, $sgpr4_sgpr5, 12, $sgpr4_sgpr5, 0, 0, 0, 0, 0, implicit $exec, implicit $sgpr4_sgpr5_sgpr6_sgpr7, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3 ; GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, $sgpr4_sgpr5, 12, $sgpr4_sgpr5, 0, 0, 0, 0, 0, implicit $exec
; GFX90A: $vgpr2_vgpr3 = V_PK_MOV_B32 8, $sgpr6_sgpr7, 12, $sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec, implicit killed $sgpr4_sgpr5_sgpr6_sgpr7 ; GFX90A: $vgpr2_vgpr3 = V_PK_MOV_B32 8, killed $sgpr6_sgpr7, 12, killed $sgpr6_sgpr7, 0, 0, 0, 0, 0, implicit $exec
; GFX10-LABEL: name: copy_s128_to_v128_killed ; GFX10-LABEL: name: copy_s128_to_v128_killed
; GFX10: liveins: $sgpr4_sgpr5_sgpr6_sgpr7 ; GFX10: liveins: $sgpr4_sgpr5_sgpr6_sgpr7
; GFX10: $vgpr0 = V_MOV_B32_e32 $sgpr4, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $sgpr4_sgpr5_sgpr6_sgpr7 ; GFX10: $vgpr0 = V_MOV_B32_e32 $sgpr4, implicit $exec
; GFX10: $vgpr1 = V_MOV_B32_e32 $sgpr5, implicit $exec, implicit $sgpr4_sgpr5_sgpr6_sgpr7 ; GFX10: $vgpr1 = V_MOV_B32_e32 $sgpr5, implicit $exec
; GFX10: $vgpr2 = V_MOV_B32_e32 $sgpr6, implicit $exec, implicit $sgpr4_sgpr5_sgpr6_sgpr7 ; GFX10: $vgpr2 = V_MOV_B32_e32 $sgpr6, implicit $exec
; GFX10: $vgpr3 = V_MOV_B32_e32 $sgpr7, implicit $exec, implicit killed $sgpr4_sgpr5_sgpr6_sgpr7 ; GFX10: $vgpr3 = V_MOV_B32_e32 killed $sgpr7, implicit $exec
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY killed $sgpr4_sgpr5_sgpr6_sgpr7 $vgpr0_vgpr1_vgpr2_vgpr3 = COPY killed $sgpr4_sgpr5_sgpr6_sgpr7
... ...
--- ---
name: copy_v64_to_v64_unaligned name: copy_v64_to_v64_unaligned
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr2_vgpr3 liveins: $vgpr2_vgpr3
; GFX908-LABEL: name: copy_v64_to_v64_unaligned ; GFX908-LABEL: name: copy_v64_to_v64_unaligned
; GFX908: liveins: $vgpr2_vgpr3 ; GFX908: liveins: $vgpr2_vgpr3
; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit-def $vgpr1_vgpr2, implicit $vgpr2_vgpr3 ; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr2, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit $vgpr2_vgpr3, implicit $exec ; GFX908: $vgpr2 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_v64_to_v64_unaligned ; GFX90A-LABEL: name: copy_v64_to_v64_unaligned
; GFX90A: liveins: $vgpr2_vgpr3 ; GFX90A: liveins: $vgpr2_vgpr3
; GFX90A: $vgpr1 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit-def $vgpr1_vgpr2, implicit $vgpr2_vgpr3 ; GFX90A: $vgpr1 = V_MOV_B32_e32 $vgpr2, implicit $exec
; GFX90A: $vgpr2 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit $vgpr2_vgpr3, implicit $exec ; GFX90A: $vgpr2 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_v64_to_v64_unaligned ; GFX10-LABEL: name: copy_v64_to_v64_unaligned
; GFX10: liveins: $vgpr2_vgpr3 ; GFX10: liveins: $vgpr2_vgpr3
; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit-def $vgpr1_vgpr2, implicit $vgpr2_vgpr3 ; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr2, implicit $exec
; GFX10: $vgpr2 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit $vgpr2_vgpr3, implicit $exec ; GFX10: $vgpr2 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit $exec
$vgpr1_vgpr2 = COPY killed $vgpr2_vgpr3, implicit $exec $vgpr1_vgpr2 = COPY killed $vgpr2_vgpr3, implicit $exec
... ...
--- ---
name: copy_v64_unaligned_to_v64 name: copy_v64_unaligned_to_v64
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr3_vgpr4 liveins: $vgpr3_vgpr4
; GFX908-LABEL: name: copy_v64_unaligned_to_v64 ; GFX908-LABEL: name: copy_v64_unaligned_to_v64
; GFX908: liveins: $vgpr3_vgpr4 ; GFX908: liveins: $vgpr3_vgpr4
; GFX908: $vgpr0 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr3_vgpr4 ; GFX908: $vgpr0 = V_MOV_B32_e32 $vgpr3, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr4, implicit $exec, implicit killed $vgpr3_vgpr4, implicit $exec ; GFX908: $vgpr1 = V_MOV_B32_e32 killed $vgpr4, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_v64_unaligned_to_v64 ; GFX90A-LABEL: name: copy_v64_unaligned_to_v64
; GFX90A: liveins: $vgpr3_vgpr4 ; GFX90A: liveins: $vgpr3_vgpr4
; GFX90A: $vgpr0 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr3_vgpr4 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $vgpr3, implicit $exec
; GFX90A: $vgpr1 = V_MOV_B32_e32 $vgpr4, implicit $exec, implicit killed $vgpr3_vgpr4, implicit $exec ; GFX90A: $vgpr1 = V_MOV_B32_e32 killed $vgpr4, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_v64_unaligned_to_v64 ; GFX10-LABEL: name: copy_v64_unaligned_to_v64
; GFX10: liveins: $vgpr3_vgpr4 ; GFX10: liveins: $vgpr3_vgpr4
; GFX10: $vgpr0 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1, implicit $vgpr3_vgpr4 ; GFX10: $vgpr0 = V_MOV_B32_e32 $vgpr3, implicit $exec
; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr4, implicit $exec, implicit killed $vgpr3_vgpr4, implicit $exec ; GFX10: $vgpr1 = V_MOV_B32_e32 killed $vgpr4, implicit $exec, implicit $exec
$vgpr0_vgpr1 = COPY killed $vgpr3_vgpr4, implicit $exec $vgpr0_vgpr1 = COPY killed $vgpr3_vgpr4, implicit $exec
... ...
--- ---
name: copy_v128_to_v128_unaligned name: copy_v128_to_v128_unaligned
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr8_vgpr9_vgpr10_vgpr11 liveins: $vgpr8_vgpr9_vgpr10_vgpr11
; GFX908-LABEL: name: copy_v128_to_v128_unaligned ; GFX908-LABEL: name: copy_v128_to_v128_unaligned
; GFX908: liveins: $vgpr8_vgpr9_vgpr10_vgpr11 ; GFX908: liveins: $vgpr8_vgpr9_vgpr10_vgpr11
; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec, implicit-def $vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr8_vgpr9_vgpr10_vgpr11 ; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec, implicit $vgpr8_vgpr9_vgpr10_vgpr11 ; GFX908: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec
; GFX908: $vgpr3 = V_MOV_B32_e32 $vgpr10, implicit $exec, implicit $vgpr8_vgpr9_vgpr10_vgpr11 ; GFX908: $vgpr3 = V_MOV_B32_e32 $vgpr10, implicit $exec
; GFX908: $vgpr4 = V_MOV_B32_e32 $vgpr11, implicit $exec, implicit killed $vgpr8_vgpr9_vgpr10_vgpr11, implicit $exec ; GFX908: $vgpr4 = V_MOV_B32_e32 killed $vgpr11, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_v128_to_v128_unaligned ; GFX90A-LABEL: name: copy_v128_to_v128_unaligned
; GFX90A: liveins: $vgpr8_vgpr9_vgpr10_vgpr11 ; GFX90A: liveins: $vgpr8_vgpr9_vgpr10_vgpr11
; GFX90A: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec, implicit-def $vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr8_vgpr9_vgpr10_vgpr11 ; GFX90A: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec
; GFX90A: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec, implicit $vgpr8_vgpr9_vgpr10_vgpr11 ; GFX90A: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec
; GFX90A: $vgpr3 = V_MOV_B32_e32 $vgpr10, implicit $exec, implicit $vgpr8_vgpr9_vgpr10_vgpr11 ; GFX90A: $vgpr3 = V_MOV_B32_e32 $vgpr10, implicit $exec
; GFX90A: $vgpr4 = V_MOV_B32_e32 $vgpr11, implicit $exec, implicit killed $vgpr8_vgpr9_vgpr10_vgpr11, implicit $exec ; GFX90A: $vgpr4 = V_MOV_B32_e32 killed $vgpr11, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_v128_to_v128_unaligned ; GFX10-LABEL: name: copy_v128_to_v128_unaligned
; GFX10: liveins: $vgpr8_vgpr9_vgpr10_vgpr11 ; GFX10: liveins: $vgpr8_vgpr9_vgpr10_vgpr11
; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec, implicit-def $vgpr1_vgpr2_vgpr3_vgpr4, implicit $vgpr8_vgpr9_vgpr10_vgpr11 ; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec
; GFX10: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec, implicit $vgpr8_vgpr9_vgpr10_vgpr11 ; GFX10: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec
; GFX10: $vgpr3 = V_MOV_B32_e32 $vgpr10, implicit $exec, implicit $vgpr8_vgpr9_vgpr10_vgpr11 ; GFX10: $vgpr3 = V_MOV_B32_e32 $vgpr10, implicit $exec
; GFX10: $vgpr4 = V_MOV_B32_e32 $vgpr11, implicit $exec, implicit killed $vgpr8_vgpr9_vgpr10_vgpr11, implicit $exec ; GFX10: $vgpr4 = V_MOV_B32_e32 killed $vgpr11, implicit $exec, implicit $exec
$vgpr1_vgpr2_vgpr3_vgpr4 = COPY killed $vgpr8_vgpr9_vgpr10_vgpr11, implicit $exec $vgpr1_vgpr2_vgpr3_vgpr4 = COPY killed $vgpr8_vgpr9_vgpr10_vgpr11, implicit $exec
... ...
--- ---
name: copy_v128_unaligned_to_v128 name: copy_v128_unaligned_to_v128
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr7_vgpr8_vgpr9_vgpr10 liveins: $vgpr7_vgpr8_vgpr9_vgpr10
; GFX908-LABEL: name: copy_v128_unaligned_to_v128 ; GFX908-LABEL: name: copy_v128_unaligned_to_v128
; GFX908: liveins: $vgpr7_vgpr8_vgpr9_vgpr10 ; GFX908: liveins: $vgpr7_vgpr8_vgpr9_vgpr10
; GFX908: $vgpr0 = V_MOV_B32_e32 $vgpr7, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr7_vgpr8_vgpr9_vgpr10 ; GFX908: $vgpr0 = V_MOV_B32_e32 $vgpr7, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec, implicit $vgpr7_vgpr8_vgpr9_vgpr10 ; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec, implicit $vgpr7_vgpr8_vgpr9_vgpr10 ; GFX908: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec
; GFX908: $vgpr3 = V_MOV_B32_e32 $vgpr10, implicit $exec, implicit killed $vgpr7_vgpr8_vgpr9_vgpr10, implicit $exec ; GFX908: $vgpr3 = V_MOV_B32_e32 killed $vgpr10, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_v128_unaligned_to_v128 ; GFX90A-LABEL: name: copy_v128_unaligned_to_v128
; GFX90A: liveins: $vgpr7_vgpr8_vgpr9_vgpr10 ; GFX90A: liveins: $vgpr7_vgpr8_vgpr9_vgpr10
; GFX90A: $vgpr0 = V_MOV_B32_e32 $vgpr7, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr7_vgpr8_vgpr9_vgpr10 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $vgpr7, implicit $exec
; GFX90A: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec, implicit $vgpr7_vgpr8_vgpr9_vgpr10 ; GFX90A: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec
; GFX90A: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec, implicit $vgpr7_vgpr8_vgpr9_vgpr10 ; GFX90A: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec
; GFX90A: $vgpr3 = V_MOV_B32_e32 $vgpr10, implicit $exec, implicit killed $vgpr7_vgpr8_vgpr9_vgpr10, implicit $exec ; GFX90A: $vgpr3 = V_MOV_B32_e32 killed $vgpr10, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_v128_unaligned_to_v128 ; GFX10-LABEL: name: copy_v128_unaligned_to_v128
; GFX10: liveins: $vgpr7_vgpr8_vgpr9_vgpr10 ; GFX10: liveins: $vgpr7_vgpr8_vgpr9_vgpr10
; GFX10: $vgpr0 = V_MOV_B32_e32 $vgpr7, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2_vgpr3, implicit $vgpr7_vgpr8_vgpr9_vgpr10 ; GFX10: $vgpr0 = V_MOV_B32_e32 $vgpr7, implicit $exec
; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec, implicit $vgpr7_vgpr8_vgpr9_vgpr10 ; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec
; GFX10: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec, implicit $vgpr7_vgpr8_vgpr9_vgpr10 ; GFX10: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec
; GFX10: $vgpr3 = V_MOV_B32_e32 $vgpr10, implicit $exec, implicit killed $vgpr7_vgpr8_vgpr9_vgpr10, implicit $exec ; GFX10: $vgpr3 = V_MOV_B32_e32 killed $vgpr10, implicit $exec, implicit $exec
$vgpr0_vgpr1_vgpr2_vgpr3 = COPY killed $vgpr7_vgpr8_vgpr9_vgpr10, implicit $exec $vgpr0_vgpr1_vgpr2_vgpr3 = COPY killed $vgpr7_vgpr8_vgpr9_vgpr10, implicit $exec
... ...
--- ---
name: copy_s64_to_v64_unaligned name: copy_s64_to_v64_unaligned
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr8_sgpr9 liveins: $sgpr8_sgpr9
; GFX908-LABEL: name: copy_s64_to_v64_unaligned ; GFX908-LABEL: name: copy_s64_to_v64_unaligned
; GFX908: liveins: $sgpr8_sgpr9 ; GFX908: liveins: $sgpr8_sgpr9
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec, implicit-def $vgpr1_vgpr2, implicit $sgpr8_sgpr9 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr9, implicit $exec, implicit killed $sgpr8_sgpr9, implicit $exec ; GFX908: $vgpr2 = V_MOV_B32_e32 killed $sgpr9, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_s64_to_v64_unaligned ; GFX90A-LABEL: name: copy_s64_to_v64_unaligned
; GFX90A: liveins: $sgpr8_sgpr9 ; GFX90A: liveins: $sgpr8_sgpr9
; GFX90A: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec, implicit-def $vgpr1_vgpr2, implicit $sgpr8_sgpr9 ; GFX90A: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec
; GFX90A: $vgpr2 = V_MOV_B32_e32 $sgpr9, implicit $exec, implicit killed $sgpr8_sgpr9, implicit $exec ; GFX90A: $vgpr2 = V_MOV_B32_e32 killed $sgpr9, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_s64_to_v64_unaligned ; GFX10-LABEL: name: copy_s64_to_v64_unaligned
; GFX10: liveins: $sgpr8_sgpr9 ; GFX10: liveins: $sgpr8_sgpr9
; GFX10: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec, implicit-def $vgpr1_vgpr2, implicit $sgpr8_sgpr9 ; GFX10: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec
; GFX10: $vgpr2 = V_MOV_B32_e32 $sgpr9, implicit $exec, implicit killed $sgpr8_sgpr9, implicit $exec ; GFX10: $vgpr2 = V_MOV_B32_e32 killed $sgpr9, implicit $exec, implicit $exec
$vgpr1_vgpr2 = COPY killed $sgpr8_sgpr9, implicit $exec $vgpr1_vgpr2 = COPY killed $sgpr8_sgpr9, implicit $exec
... ...
--- ---
name: copy_s128_to_v128_unaligned name: copy_s128_to_v128_unaligned
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr8_sgpr9_sgpr10_sgpr11 liveins: $sgpr8_sgpr9_sgpr10_sgpr11
; GFX908-LABEL: name: copy_s128_to_v128_unaligned ; GFX908-LABEL: name: copy_s128_to_v128_unaligned
; GFX908: liveins: $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX908: liveins: $sgpr8_sgpr9_sgpr10_sgpr11
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec, implicit-def $vgpr1_vgpr2_vgpr3_vgpr4, implicit $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr9, implicit $exec, implicit $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr9, implicit $exec
; GFX908: $vgpr3 = V_MOV_B32_e32 $sgpr10, implicit $exec, implicit $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX908: $vgpr3 = V_MOV_B32_e32 $sgpr10, implicit $exec
; GFX908: $vgpr4 = V_MOV_B32_e32 $sgpr11, implicit $exec, implicit killed $sgpr8_sgpr9_sgpr10_sgpr11, implicit $exec ; GFX908: $vgpr4 = V_MOV_B32_e32 killed $sgpr11, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_s128_to_v128_unaligned ; GFX90A-LABEL: name: copy_s128_to_v128_unaligned
; GFX90A: liveins: $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX90A: liveins: $sgpr8_sgpr9_sgpr10_sgpr11
; GFX90A: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec, implicit-def $vgpr1_vgpr2_vgpr3_vgpr4, implicit $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX90A: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec
; GFX90A: $vgpr2 = V_MOV_B32_e32 $sgpr9, implicit $exec, implicit $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX90A: $vgpr2 = V_MOV_B32_e32 $sgpr9, implicit $exec
; GFX90A: $vgpr3 = V_MOV_B32_e32 $sgpr10, implicit $exec, implicit $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX90A: $vgpr3 = V_MOV_B32_e32 $sgpr10, implicit $exec
; GFX90A: $vgpr4 = V_MOV_B32_e32 $sgpr11, implicit $exec, implicit killed $sgpr8_sgpr9_sgpr10_sgpr11, implicit $exec ; GFX90A: $vgpr4 = V_MOV_B32_e32 killed $sgpr11, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_s128_to_v128_unaligned ; GFX10-LABEL: name: copy_s128_to_v128_unaligned
; GFX10: liveins: $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX10: liveins: $sgpr8_sgpr9_sgpr10_sgpr11
; GFX10: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec, implicit-def $vgpr1_vgpr2_vgpr3_vgpr4, implicit $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX10: $vgpr1 = V_MOV_B32_e32 $sgpr8, implicit $exec
; GFX10: $vgpr2 = V_MOV_B32_e32 $sgpr9, implicit $exec, implicit $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX10: $vgpr2 = V_MOV_B32_e32 $sgpr9, implicit $exec
; GFX10: $vgpr3 = V_MOV_B32_e32 $sgpr10, implicit $exec, implicit $sgpr8_sgpr9_sgpr10_sgpr11 ; GFX10: $vgpr3 = V_MOV_B32_e32 $sgpr10, implicit $exec
; GFX10: $vgpr4 = V_MOV_B32_e32 $sgpr11, implicit $exec, implicit killed $sgpr8_sgpr9_sgpr10_sgpr11, implicit $exec ; GFX10: $vgpr4 = V_MOV_B32_e32 killed $sgpr11, implicit $exec, implicit $exec
$vgpr1_vgpr2_vgpr3_vgpr4 = COPY killed $sgpr8_sgpr9_sgpr10_sgpr11, implicit $exec $vgpr1_vgpr2_vgpr3_vgpr4 = COPY killed $sgpr8_sgpr9_sgpr10_sgpr11, implicit $exec
... ...
--- ---
name: copy_v96_to_v96_unaligned name: copy_v96_to_v96_unaligned
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr8_vgpr9_vgpr10 liveins: $vgpr8_vgpr9_vgpr10
; GFX908-LABEL: name: copy_v96_to_v96_unaligned ; GFX908-LABEL: name: copy_v96_to_v96_unaligned
; GFX908: liveins: $vgpr8_vgpr9_vgpr10 ; GFX908: liveins: $vgpr8_vgpr9_vgpr10
; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec, implicit-def $vgpr1_vgpr2_vgpr3, implicit $vgpr8_vgpr9_vgpr10 ; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec, implicit $vgpr8_vgpr9_vgpr10 ; GFX908: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec
; GFX908: $vgpr3 = V_MOV_B32_e32 $vgpr10, implicit $exec, implicit killed $vgpr8_vgpr9_vgpr10, implicit $exec ; GFX908: $vgpr3 = V_MOV_B32_e32 killed $vgpr10, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_v96_to_v96_unaligned ; GFX90A-LABEL: name: copy_v96_to_v96_unaligned
; GFX90A: liveins: $vgpr8_vgpr9_vgpr10 ; GFX90A: liveins: $vgpr8_vgpr9_vgpr10
; GFX90A: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec, implicit-def $vgpr1_vgpr2_vgpr3, implicit $vgpr8_vgpr9_vgpr10 ; GFX90A: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec
; GFX90A: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec, implicit $vgpr8_vgpr9_vgpr10 ; GFX90A: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec
; GFX90A: $vgpr3 = V_MOV_B32_e32 $vgpr10, implicit $exec, implicit killed $vgpr8_vgpr9_vgpr10, implicit $exec ; GFX90A: $vgpr3 = V_MOV_B32_e32 killed $vgpr10, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_v96_to_v96_unaligned ; GFX10-LABEL: name: copy_v96_to_v96_unaligned
; GFX10: liveins: $vgpr8_vgpr9_vgpr10 ; GFX10: liveins: $vgpr8_vgpr9_vgpr10
; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec, implicit-def $vgpr1_vgpr2_vgpr3, implicit $vgpr8_vgpr9_vgpr10 ; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec
; GFX10: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec, implicit $vgpr8_vgpr9_vgpr10 ; GFX10: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec
; GFX10: $vgpr3 = V_MOV_B32_e32 $vgpr10, implicit $exec, implicit killed $vgpr8_vgpr9_vgpr10, implicit $exec ; GFX10: $vgpr3 = V_MOV_B32_e32 killed $vgpr10, implicit $exec, implicit $exec
$vgpr1_vgpr2_vgpr3 = COPY killed $vgpr8_vgpr9_vgpr10, implicit $exec $vgpr1_vgpr2_vgpr3 = COPY killed $vgpr8_vgpr9_vgpr10, implicit $exec
... ...
--- ---
name: copy_v96_unaligned_to_v96 name: copy_v96_unaligned_to_v96
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $vgpr7_vgpr8_vgpr9 liveins: $vgpr7_vgpr8_vgpr9
; GFX908-LABEL: name: copy_v96_unaligned_to_v96 ; GFX908-LABEL: name: copy_v96_unaligned_to_v96
; GFX908: liveins: $vgpr7_vgpr8_vgpr9 ; GFX908: liveins: $vgpr7_vgpr8_vgpr9
; GFX908: $vgpr0 = V_MOV_B32_e32 $vgpr7, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr7_vgpr8_vgpr9 ; GFX908: $vgpr0 = V_MOV_B32_e32 $vgpr7, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec, implicit $vgpr7_vgpr8_vgpr9 ; GFX908: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec, implicit killed $vgpr7_vgpr8_vgpr9, implicit $exec ; GFX908: $vgpr2 = V_MOV_B32_e32 killed $vgpr9, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_v96_unaligned_to_v96 ; GFX90A-LABEL: name: copy_v96_unaligned_to_v96
; GFX90A: liveins: $vgpr7_vgpr8_vgpr9 ; GFX90A: liveins: $vgpr7_vgpr8_vgpr9
; GFX90A: $vgpr0 = V_MOV_B32_e32 $vgpr7, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr7_vgpr8_vgpr9 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $vgpr7, implicit $exec
; GFX90A: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec, implicit $vgpr7_vgpr8_vgpr9 ; GFX90A: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec
; GFX90A: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec, implicit killed $vgpr7_vgpr8_vgpr9, implicit $exec ; GFX90A: $vgpr2 = V_MOV_B32_e32 killed $vgpr9, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_v96_unaligned_to_v96 ; GFX10-LABEL: name: copy_v96_unaligned_to_v96
; GFX10: liveins: $vgpr7_vgpr8_vgpr9 ; GFX10: liveins: $vgpr7_vgpr8_vgpr9
; GFX10: $vgpr0 = V_MOV_B32_e32 $vgpr7, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $vgpr7_vgpr8_vgpr9 ; GFX10: $vgpr0 = V_MOV_B32_e32 $vgpr7, implicit $exec
; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec, implicit $vgpr7_vgpr8_vgpr9 ; GFX10: $vgpr1 = V_MOV_B32_e32 $vgpr8, implicit $exec
; GFX10: $vgpr2 = V_MOV_B32_e32 $vgpr9, implicit $exec, implicit killed $vgpr7_vgpr8_vgpr9, implicit $exec ; GFX10: $vgpr2 = V_MOV_B32_e32 killed $vgpr9, implicit $exec, implicit $exec
$vgpr0_vgpr1_vgpr2 = COPY killed $vgpr7_vgpr8_vgpr9, implicit $exec $vgpr0_vgpr1_vgpr2 = COPY killed $vgpr7_vgpr8_vgpr9, implicit $exec
... ...
--- ---
name: copy_s96_to_v96 name: copy_s96_to_v96
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2 liveins: $sgpr0_sgpr1_sgpr2
; GFX908-LABEL: name: copy_s96_to_v96 ; GFX908-LABEL: name: copy_s96_to_v96
; GFX908: liveins: $sgpr0_sgpr1_sgpr2 ; GFX908: liveins: $sgpr0_sgpr1_sgpr2
; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $sgpr0_sgpr1_sgpr2 ; GFX908: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2 ; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2, implicit $exec ; GFX908: $vgpr2 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_s96_to_v96 ; GFX90A-LABEL: name: copy_s96_to_v96
; GFX90A: liveins: $sgpr0_sgpr1_sgpr2 ; GFX90A: liveins: $sgpr0_sgpr1_sgpr2
; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $sgpr0_sgpr1_sgpr2 ; GFX90A: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
; GFX90A: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2 ; GFX90A: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX90A: $vgpr2 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2, implicit $exec ; GFX90A: $vgpr2 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_s96_to_v96 ; GFX10-LABEL: name: copy_s96_to_v96
; GFX10: liveins: $sgpr0_sgpr1_sgpr2 ; GFX10: liveins: $sgpr0_sgpr1_sgpr2
; GFX10: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit-def $vgpr0_vgpr1_vgpr2, implicit $sgpr0_sgpr1_sgpr2 ; GFX10: $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec
; GFX10: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2 ; GFX10: $vgpr1 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX10: $vgpr2 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2, implicit $exec ; GFX10: $vgpr2 = V_MOV_B32_e32 killed $sgpr2, implicit $exec, implicit $exec
$vgpr0_vgpr1_vgpr2 = COPY killed $sgpr0_sgpr1_sgpr2, implicit $exec $vgpr0_vgpr1_vgpr2 = COPY killed $sgpr0_sgpr1_sgpr2, implicit $exec
... ...
--- ---
name: copy_s96_to_v96_unaligned name: copy_s96_to_v96_unaligned
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2 liveins: $sgpr0_sgpr1_sgpr2
; GFX908-LABEL: name: copy_s96_to_v96_unaligned ; GFX908-LABEL: name: copy_s96_to_v96_unaligned
; GFX908: liveins: $sgpr0_sgpr1_sgpr2 ; GFX908: liveins: $sgpr0_sgpr1_sgpr2
; GFX908: $vgpr3 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit-def $vgpr1_vgpr2_vgpr3, implicit $sgpr0_sgpr1_sgpr2 ; GFX908: $vgpr3 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2 ; GFX908: $vgpr2 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX908: $vgpr1 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2, implicit $exec ; GFX908: $vgpr1 = V_MOV_B32_e32 killed $sgpr0, implicit $exec, implicit $exec
; GFX90A-LABEL: name: copy_s96_to_v96_unaligned ; GFX90A-LABEL: name: copy_s96_to_v96_unaligned
; GFX90A: liveins: $sgpr0_sgpr1_sgpr2 ; GFX90A: liveins: $sgpr0_sgpr1_sgpr2
; GFX90A: $vgpr3 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit-def $vgpr1_vgpr2_vgpr3, implicit $sgpr0_sgpr1_sgpr2 ; GFX90A: $vgpr3 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX90A: $vgpr2 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2 ; GFX90A: $vgpr2 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX90A: $vgpr1 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2, implicit $exec ; GFX90A: $vgpr1 = V_MOV_B32_e32 killed $sgpr0, implicit $exec, implicit $exec
; GFX10-LABEL: name: copy_s96_to_v96_unaligned ; GFX10-LABEL: name: copy_s96_to_v96_unaligned
; GFX10: liveins: $sgpr0_sgpr1_sgpr2 ; GFX10: liveins: $sgpr0_sgpr1_sgpr2
; GFX10: $vgpr3 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit-def $vgpr1_vgpr2_vgpr3, implicit $sgpr0_sgpr1_sgpr2 ; GFX10: $vgpr3 = V_MOV_B32_e32 $sgpr2, implicit $exec
; GFX10: $vgpr2 = V_MOV_B32_e32 $sgpr1, implicit $exec, implicit $sgpr0_sgpr1_sgpr2 ; GFX10: $vgpr2 = V_MOV_B32_e32 $sgpr1, implicit $exec
; GFX10: $vgpr1 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit killed $sgpr0_sgpr1_sgpr2, implicit $exec ; GFX10: $vgpr1 = V_MOV_B32_e32 killed $sgpr0, implicit $exec, implicit $exec
$vgpr1_vgpr2_vgpr3 = COPY killed $sgpr0_sgpr1_sgpr2, implicit $exec $vgpr1_vgpr2_vgpr3 = COPY killed $sgpr0_sgpr1_sgpr2, implicit $exec
... ...

llvm/test/CodeGen/AMDGPU/ctlz_zero_undef.ll

Show First 20 Lines • Show All 90 Lines • ▼ Show 20 Lines
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0 ; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: flat_load_dword v0, v[0:1] ; VI-NEXT: flat_load_dword v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_ffbh_u32_e32 v2, v0 ; VI-NEXT: v_ffbh_u32_e32 v2, v0
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; EG-LABEL: v_ctlz_zero_undef_i32: ; EG-LABEL: v_ctlz_zero_undef_i32:
; EG: ; %bb.0: ; EG: ; %bb.0:
; EG-NEXT: ALU 2, @8, KC0[CB0:0-32], KC1[] ; EG-NEXT: ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT: TEX 0 @6 ; EG-NEXT: TEX 0 @6
; EG-NEXT: ALU 2, @11, KC0[CB0:0-32], KC1[] ; EG-NEXT: ALU 2, @11, KC0[CB0:0-32], KC1[]
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; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0 ; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: flat_load_ubyte v0, v[0:1] ; VI-NEXT: flat_load_ubyte v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_ffbh_u32_e32 v0, v0 ; VI-NEXT: v_ffbh_u32_e32 v0, v0
; VI-NEXT: v_add_u32_e32 v0, vcc, -16, v0 ; VI-NEXT: v_add_u32_e32 v0, vcc, -16, v0
; VI-NEXT: v_add_u16_e32 v2, -8, v0 ; VI-NEXT: v_add_u16_e32 v2, -8, v0
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_byte v[0:1], v2 ; VI-NEXT: flat_store_byte v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; EG-LABEL: v_ctlz_zero_undef_i8: ; EG-LABEL: v_ctlz_zero_undef_i8:
; EG: ; %bb.0: ; EG: ; %bb.0:
; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[] ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT: TEX 0 @6 ; EG-NEXT: TEX 0 @6
; EG-NEXT: ALU 14, @9, KC0[CB0:0-32], KC1[] ; EG-NEXT: ALU 14, @9, KC0[CB0:0-32], KC1[]
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; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0 ; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: flat_load_dword v0, v[0:1] ; VI-NEXT: flat_load_dword v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_ffbh_u32_e32 v2, v0 ; VI-NEXT: v_ffbh_u32_e32 v2, v0
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; EG-LABEL: v_ctlz_zero_undef_i32_sel_eq_neg1: ; EG-LABEL: v_ctlz_zero_undef_i32_sel_eq_neg1:
; EG: ; %bb.0: ; EG: ; %bb.0:
; EG-NEXT: ALU 2, @8, KC0[CB0:0-32], KC1[] ; EG-NEXT: ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT: TEX 0 @6 ; EG-NEXT: TEX 0 @6
; EG-NEXT: ALU 3, @11, KC0[CB0:0-32], KC1[] ; EG-NEXT: ALU 3, @11, KC0[CB0:0-32], KC1[]
▲ Show 20 Lines • Show All 60 Lines • ▼ Show 20 Lines
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0 ; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: flat_load_dword v0, v[0:1] ; VI-NEXT: flat_load_dword v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_ffbh_u32_e32 v2, v0 ; VI-NEXT: v_ffbh_u32_e32 v2, v0
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; EG-LABEL: v_ctlz_zero_undef_i32_sel_ne_neg1: ; EG-LABEL: v_ctlz_zero_undef_i32_sel_ne_neg1:
; EG: ; %bb.0: ; EG: ; %bb.0:
; EG-NEXT: ALU 2, @8, KC0[CB0:0-32], KC1[] ; EG-NEXT: ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT: TEX 0 @6 ; EG-NEXT: TEX 0 @6
; EG-NEXT: ALU 3, @11, KC0[CB0:0-32], KC1[] ; EG-NEXT: ALU 3, @11, KC0[CB0:0-32], KC1[]
▲ Show 20 Lines • Show All 58 Lines • ▼ Show 20 Lines
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0 ; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: flat_load_ubyte v0, v[0:1] ; VI-NEXT: flat_load_ubyte v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_ffbh_u32_e32 v2, v0 ; VI-NEXT: v_ffbh_u32_e32 v2, v0
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_byte v[0:1], v2 ; VI-NEXT: flat_store_byte v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; EG-LABEL: v_ctlz_zero_undef_i8_sel_eq_neg1: ; EG-LABEL: v_ctlz_zero_undef_i8_sel_eq_neg1:
; EG: ; %bb.0: ; EG: ; %bb.0:
; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[] ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT: TEX 0 @6 ; EG-NEXT: TEX 0 @6
; EG-NEXT: ALU 12, @9, KC0[CB0:0-32], KC1[] ; EG-NEXT: ALU 12, @9, KC0[CB0:0-32], KC1[]
▲ Show 20 Lines • Show All 495 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll

Show First 20 Lines • Show All 87 Lines • ▼ Show 20 Lines
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; VI-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0 ; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: flat_load_dword v0, v[0:1] ; VI-NEXT: flat_load_dword v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_ffbl_b32_e32 v2, v0 ; VI-NEXT: v_ffbl_b32_e32 v2, v0
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; EG-LABEL: v_cttz_zero_undef_i32: ; EG-LABEL: v_cttz_zero_undef_i32:
; EG: ; %bb.0: ; EG: ; %bb.0:
; EG-NEXT: ALU 2, @8, KC0[CB0:0-32], KC1[] ; EG-NEXT: ALU 2, @8, KC0[CB0:0-32], KC1[]
; EG-NEXT: TEX 0 @6 ; EG-NEXT: TEX 0 @6
; EG-NEXT: ALU 2, @11, KC0[CB0:0-32], KC1[] ; EG-NEXT: ALU 2, @11, KC0[CB0:0-32], KC1[]
▲ Show 20 Lines • Show All 572 Lines • ▼ Show 20 Lines
; ;
; VI-LABEL: v_cttz_zero_undef_i16_with_select: ; VI-LABEL: v_cttz_zero_undef_i16_with_select:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s4, s0, 1 ; VI-NEXT: s_add_u32 s4, s0, 1
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v3, s5 ; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: flat_load_ubyte v2, v[2:3] ; VI-NEXT: flat_load_ubyte v2, v[2:3]
; VI-NEXT: flat_load_ubyte v0, v[0:1] ; VI-NEXT: flat_load_ubyte v0, v[0:1]
; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v2 ; VI-NEXT: v_lshlrev_b16_e32 v1, 8, v2
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_or_b32_e32 v0, v1, v0 ; VI-NEXT: v_or_b32_e32 v0, v1, v0
▲ Show 20 Lines • Show All 90 Lines • ▼ Show 20 Lines
; VI-LABEL: v_cttz_zero_undef_i32_with_select: ; VI-LABEL: v_cttz_zero_undef_i32_with_select:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s4, s0, 3 ; VI-NEXT: s_add_u32 s4, s0, 3
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: s_add_u32 s4, s0, 2 ; VI-NEXT: s_add_u32 s4, s0, 2
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: s_add_u32 s0, s0, 1 ; VI-NEXT: s_add_u32 s0, s0, 1
; VI-NEXT: s_addc_u32 s1, s1, 0 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v4, s4 ; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v7, s1 ; VI-NEXT: s_addc_u32 s1, s1, 0
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: v_mov_b32_e32 v7, s1
; VI-NEXT: v_mov_b32_e32 v6, s0 ; VI-NEXT: v_mov_b32_e32 v6, s0
; VI-NEXT: flat_load_ubyte v2, v[2:3] ; VI-NEXT: flat_load_ubyte v2, v[2:3]
; VI-NEXT: flat_load_ubyte v3, v[4:5] ; VI-NEXT: flat_load_ubyte v3, v[4:5]
; VI-NEXT: flat_load_ubyte v4, v[6:7] ; VI-NEXT: flat_load_ubyte v4, v[6:7]
; VI-NEXT: flat_load_ubyte v0, v[0:1] ; VI-NEXT: flat_load_ubyte v0, v[0:1]
; VI-NEXT: s_waitcnt vmcnt(3) ; VI-NEXT: s_waitcnt vmcnt(3)
; VI-NEXT: v_lshlrev_b32_e32 v1, 8, v2 ; VI-NEXT: v_lshlrev_b32_e32 v1, 8, v2
; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: s_waitcnt vmcnt(2)
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; VI-LABEL: v_cttz_zero_undef_i64_with_select: ; VI-LABEL: v_cttz_zero_undef_i64_with_select:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s4, s0, 5 ; VI-NEXT: s_add_u32 s4, s0, 5
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: s_add_u32 s4, s0, 4 ; VI-NEXT: s_add_u32 s4, s0, 4
; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: s_add_u32 s4, s0, 7 ; VI-NEXT: s_add_u32 s4, s0, 7
; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v4, s4 ; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: s_add_u32 s4, s0, 6 ; VI-NEXT: s_add_u32 s4, s0, 6
; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v7, s5
; VI-NEXT: v_mov_b32_e32 v6, s4 ; VI-NEXT: v_mov_b32_e32 v6, s4
; VI-NEXT: s_add_u32 s4, s0, 3 ; VI-NEXT: s_add_u32 s4, s0, 3
; VI-NEXT: v_mov_b32_e32 v7, s5
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v9, s5
; VI-NEXT: v_mov_b32_e32 v8, s4 ; VI-NEXT: v_mov_b32_e32 v8, s4
; VI-NEXT: s_add_u32 s4, s0, 2 ; VI-NEXT: s_add_u32 s4, s0, 2
; VI-NEXT: v_mov_b32_e32 v9, s5
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v11, s5
; VI-NEXT: v_mov_b32_e32 v10, s4 ; VI-NEXT: v_mov_b32_e32 v10, s4
; VI-NEXT: s_add_u32 s4, s0, 1 ; VI-NEXT: s_add_u32 s4, s0, 1
; VI-NEXT: v_mov_b32_e32 v11, s5
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v13, s5 ; VI-NEXT: v_mov_b32_e32 v13, s5
; VI-NEXT: v_mov_b32_e32 v15, s1
; VI-NEXT: v_mov_b32_e32 v12, s4 ; VI-NEXT: v_mov_b32_e32 v12, s4
; VI-NEXT: v_mov_b32_e32 v15, s1
; VI-NEXT: v_mov_b32_e32 v14, s0 ; VI-NEXT: v_mov_b32_e32 v14, s0
; VI-NEXT: flat_load_ubyte v0, v[0:1] ; VI-NEXT: flat_load_ubyte v0, v[0:1]
; VI-NEXT: flat_load_ubyte v2, v[2:3] ; VI-NEXT: flat_load_ubyte v2, v[2:3]
; VI-NEXT: flat_load_ubyte v3, v[4:5] ; VI-NEXT: flat_load_ubyte v3, v[4:5]
; VI-NEXT: flat_load_ubyte v4, v[6:7] ; VI-NEXT: flat_load_ubyte v4, v[6:7]
; VI-NEXT: flat_load_ubyte v5, v[8:9] ; VI-NEXT: flat_load_ubyte v5, v[8:9]
; VI-NEXT: flat_load_ubyte v6, v[10:11] ; VI-NEXT: flat_load_ubyte v6, v[10:11]
; VI-NEXT: flat_load_ubyte v7, v[12:13] ; VI-NEXT: flat_load_ubyte v7, v[12:13]
Show All 16 Lines
; VI-NEXT: v_lshlrev_b32_e32 v2, 8, v7 ; VI-NEXT: v_lshlrev_b32_e32 v2, 8, v7
; VI-NEXT: v_or_b32_sdwa v0, v0, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_or_b32_sdwa v0, v0, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_or_b32_e32 v2, v2, v8 ; VI-NEXT: v_or_b32_e32 v2, v2, v8
; VI-NEXT: v_or_b32_e32 v2, v0, v2 ; VI-NEXT: v_or_b32_e32 v2, v0, v2
; VI-NEXT: v_ffbl_b32_e32 v0, v2 ; VI-NEXT: v_ffbl_b32_e32 v0, v2
; VI-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3] ; VI-NEXT: v_cmp_ne_u64_e32 vcc, 0, v[2:3]
; VI-NEXT: v_min_u32_e32 v0, v0, v4 ; VI-NEXT: v_min_u32_e32 v0, v0, v4
; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_cndmask_b32_e32 v0, 32, v0, vcc ; VI-NEXT: v_cndmask_b32_e32 v0, 32, v0, vcc
; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; EG-LABEL: v_cttz_zero_undef_i64_with_select: ; EG-LABEL: v_cttz_zero_undef_i64_with_select:
; EG: ; %bb.0: ; EG: ; %bb.0:
; EG-NEXT: ALU 0, @14, KC0[CB0:0-32], KC1[] ; EG-NEXT: ALU 0, @14, KC0[CB0:0-32], KC1[]
; EG-NEXT: TEX 3 @6 ; EG-NEXT: TEX 3 @6
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; VI-LABEL: v_cttz_i32_sel_eq_neg1: ; VI-LABEL: v_cttz_i32_sel_eq_neg1:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s4, s0, 3 ; VI-NEXT: s_add_u32 s4, s0, 3
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: s_add_u32 s4, s0, 2 ; VI-NEXT: s_add_u32 s4, s0, 2
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: s_add_u32 s0, s0, 1 ; VI-NEXT: s_add_u32 s0, s0, 1
; VI-NEXT: s_addc_u32 s1, s1, 0 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v4, s4 ; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v7, s1 ; VI-NEXT: s_addc_u32 s1, s1, 0
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: v_mov_b32_e32 v7, s1
; VI-NEXT: v_mov_b32_e32 v6, s0 ; VI-NEXT: v_mov_b32_e32 v6, s0
; VI-NEXT: flat_load_ubyte v2, v[2:3] ; VI-NEXT: flat_load_ubyte v2, v[2:3]
; VI-NEXT: flat_load_ubyte v3, v[4:5] ; VI-NEXT: flat_load_ubyte v3, v[4:5]
; VI-NEXT: flat_load_ubyte v4, v[6:7] ; VI-NEXT: flat_load_ubyte v4, v[6:7]
; VI-NEXT: flat_load_ubyte v0, v[0:1] ; VI-NEXT: flat_load_ubyte v0, v[0:1]
; VI-NEXT: s_waitcnt vmcnt(3) ; VI-NEXT: s_waitcnt vmcnt(3)
; VI-NEXT: v_lshlrev_b32_e32 v1, 8, v2 ; VI-NEXT: v_lshlrev_b32_e32 v1, 8, v2
; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: s_waitcnt vmcnt(2)
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; VI-LABEL: v_cttz_i32_sel_ne_neg1: ; VI-LABEL: v_cttz_i32_sel_ne_neg1:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s4, s0, 3 ; VI-NEXT: s_add_u32 s4, s0, 3
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: s_add_u32 s4, s0, 2 ; VI-NEXT: s_add_u32 s4, s0, 2
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: s_add_u32 s0, s0, 1 ; VI-NEXT: s_add_u32 s0, s0, 1
; VI-NEXT: s_addc_u32 s1, s1, 0 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v4, s4 ; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v7, s1 ; VI-NEXT: s_addc_u32 s1, s1, 0
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: v_mov_b32_e32 v7, s1
; VI-NEXT: v_mov_b32_e32 v6, s0 ; VI-NEXT: v_mov_b32_e32 v6, s0
; VI-NEXT: flat_load_ubyte v2, v[2:3] ; VI-NEXT: flat_load_ubyte v2, v[2:3]
; VI-NEXT: flat_load_ubyte v3, v[4:5] ; VI-NEXT: flat_load_ubyte v3, v[4:5]
; VI-NEXT: flat_load_ubyte v4, v[6:7] ; VI-NEXT: flat_load_ubyte v4, v[6:7]
; VI-NEXT: flat_load_ubyte v0, v[0:1] ; VI-NEXT: flat_load_ubyte v0, v[0:1]
; VI-NEXT: s_waitcnt vmcnt(3) ; VI-NEXT: s_waitcnt vmcnt(3)
; VI-NEXT: v_lshlrev_b32_e32 v1, 8, v2 ; VI-NEXT: v_lshlrev_b32_e32 v1, 8, v2
; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: s_waitcnt vmcnt(2)
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; VI-LABEL: v_cttz_i32_sel_ne_bitwidth: ; VI-LABEL: v_cttz_i32_sel_ne_bitwidth:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s4, s0, 3 ; VI-NEXT: s_add_u32 s4, s0, 3
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: s_add_u32 s4, s0, 2 ; VI-NEXT: s_add_u32 s4, s0, 2
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: s_add_u32 s0, s0, 1 ; VI-NEXT: s_add_u32 s0, s0, 1
; VI-NEXT: s_addc_u32 s1, s1, 0 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v4, s4 ; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v7, s1 ; VI-NEXT: s_addc_u32 s1, s1, 0
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: v_mov_b32_e32 v7, s1
; VI-NEXT: v_mov_b32_e32 v6, s0 ; VI-NEXT: v_mov_b32_e32 v6, s0
; VI-NEXT: flat_load_ubyte v2, v[2:3] ; VI-NEXT: flat_load_ubyte v2, v[2:3]
; VI-NEXT: flat_load_ubyte v3, v[4:5] ; VI-NEXT: flat_load_ubyte v3, v[4:5]
; VI-NEXT: flat_load_ubyte v4, v[6:7] ; VI-NEXT: flat_load_ubyte v4, v[6:7]
; VI-NEXT: flat_load_ubyte v0, v[0:1] ; VI-NEXT: flat_load_ubyte v0, v[0:1]
; VI-NEXT: s_waitcnt vmcnt(3) ; VI-NEXT: s_waitcnt vmcnt(3)
; VI-NEXT: v_lshlrev_b32_e32 v1, 8, v2 ; VI-NEXT: v_lshlrev_b32_e32 v1, 8, v2
; VI-NEXT: s_waitcnt vmcnt(2) ; VI-NEXT: s_waitcnt vmcnt(2)
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; ;
; VI-LABEL: v_cttz_i16_sel_eq_neg1: ; VI-LABEL: v_cttz_i16_sel_eq_neg1:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s4, s0, 1 ; VI-NEXT: s_add_u32 s4, s0, 1
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v3, s5 ; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: flat_load_ubyte v2, v[2:3] ; VI-NEXT: flat_load_ubyte v2, v[2:3]
; VI-NEXT: flat_load_ubyte v0, v[0:1] ; VI-NEXT: flat_load_ubyte v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, 0xffff ; VI-NEXT: v_mov_b32_e32 v1, 0xffff
; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v2 ; VI-NEXT: v_lshlrev_b16_e32 v2, 8, v2
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
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llvm/test/CodeGen/AMDGPU/dag-divergence-atomic.ll

Show First 20 Lines • Show All 393 Lines • ▼ Show 20 Lines; CHECK-NEXT: s_endpgm
store float 1.0, float addrspace(1)* %p1 store float 1.0, float addrspace(1)* %p1
ret void ret void
} }
define protected amdgpu_kernel void @fmin(double addrspace(1)* %p, %S addrspace(1)* %q) { define protected amdgpu_kernel void @fmin(double addrspace(1)* %p, %S addrspace(1)* %q) {
; CHECK-LABEL: fmin: ; CHECK-LABEL: fmin:
; CHECK: ; %bb.0: ; CHECK: ; %bb.0:
; CHECK-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; CHECK-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: v_mov_b32_e32 v2, 0 ; CHECK-NEXT: v_mov_b32_e32 v2, 0
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: v_mov_b32_e32 v1, 0x3ff00000 ; CHECK-NEXT: v_mov_b32_e32 v1, 0x3ff00000
; CHECK-NEXT: s_waitcnt lgkmcnt(0) ; CHECK-NEXT: s_waitcnt lgkmcnt(0)
; CHECK-NEXT: global_atomic_min_f64 v[0:1], v2, v[0:1], s[0:1] glc ; CHECK-NEXT: global_atomic_min_f64 v[0:1], v2, v[0:1], s[0:1] glc
; CHECK-NEXT: v_mov_b32_e32 v2, s2 ; CHECK-NEXT: v_mov_b32_e32 v2, s2
; CHECK-NEXT: v_mov_b32_e32 v3, s3 ; CHECK-NEXT: v_mov_b32_e32 v3, s3
; CHECK-NEXT: s_waitcnt vmcnt(0) ; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: v_cvt_u32_f64_e32 v0, v[0:1] ; CHECK-NEXT: v_cvt_u32_f64_e32 v0, v[0:1]
; CHECK-NEXT: v_mad_u64_u32 v[0:1], s[0:1], v0, 12, v[2:3] ; CHECK-NEXT: v_mad_u64_u32 v[0:1], s[0:1], v0, 12, v[2:3]
; CHECK-NEXT: v_mov_b32_e32 v2, 1.0 ; CHECK-NEXT: v_mov_b32_e32 v2, 1.0
; CHECK-NEXT: global_store_dword v[0:1], v2, off ; CHECK-NEXT: global_store_dword v[0:1], v2, off
; CHECK-NEXT: s_endpgm ; CHECK-NEXT: s_endpgm
%f64 = call double @llvm.amdgcn.global.atomic.fmin.f64.p1f64.f64(double addrspace(1)* %p, double 1.0) %f64 = call double @llvm.amdgcn.global.atomic.fmin.f64.p1f64.f64(double addrspace(1)* %p, double 1.0)
%n32 = fptoui double %f64 to i32 %n32 = fptoui double %f64 to i32
%n64 = zext i32 %n32 to i64 %n64 = zext i32 %n32 to i64
%p1 = getelementptr inbounds %S, %S addrspace(1)* %q, i64 %n64, i32 0 %p1 = getelementptr inbounds %S, %S addrspace(1)* %q, i64 %n64, i32 0
store float 1.0, float addrspace(1)* %p1 store float 1.0, float addrspace(1)* %p1
ret void ret void
} }
define protected amdgpu_kernel void @fmax(double addrspace(1)* %p, %S addrspace(1)* %q) { define protected amdgpu_kernel void @fmax(double addrspace(1)* %p, %S addrspace(1)* %q) {
; CHECK-LABEL: fmax: ; CHECK-LABEL: fmax:
; CHECK: ; %bb.0: ; CHECK: ; %bb.0:
; CHECK-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; CHECK-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: v_mov_b32_e32 v2, 0 ; CHECK-NEXT: v_mov_b32_e32 v2, 0
; CHECK-NEXT: v_mov_b32_e32 v0, 0
; CHECK-NEXT: v_mov_b32_e32 v1, 0x3ff00000 ; CHECK-NEXT: v_mov_b32_e32 v1, 0x3ff00000
; CHECK-NEXT: s_waitcnt lgkmcnt(0) ; CHECK-NEXT: s_waitcnt lgkmcnt(0)
; CHECK-NEXT: global_atomic_max_f64 v[0:1], v2, v[0:1], s[0:1] glc ; CHECK-NEXT: global_atomic_max_f64 v[0:1], v2, v[0:1], s[0:1] glc
; CHECK-NEXT: v_mov_b32_e32 v2, s2 ; CHECK-NEXT: v_mov_b32_e32 v2, s2
; CHECK-NEXT: v_mov_b32_e32 v3, s3 ; CHECK-NEXT: v_mov_b32_e32 v3, s3
; CHECK-NEXT: s_waitcnt vmcnt(0) ; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: v_cvt_u32_f64_e32 v0, v[0:1] ; CHECK-NEXT: v_cvt_u32_f64_e32 v0, v[0:1]
; CHECK-NEXT: v_mad_u64_u32 v[0:1], s[0:1], v0, 12, v[2:3] ; CHECK-NEXT: v_mad_u64_u32 v[0:1], s[0:1], v0, 12, v[2:3]
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llvm/test/CodeGen/AMDGPU/ds-sub-offset.ll

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; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: write_ds_sub0_offset0_global_clamp_bit: ; GFX10-LABEL: write_ds_sub0_offset0_global_clamp_bit:
; GFX10: ; %bb.0: ; %entry ; GFX10: ; %bb.0: ; %entry
; GFX10-NEXT: s_load_dword s0, s[0:1], 0x24 ; GFX10-NEXT: s_load_dword s0, s[0:1], 0x24
; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX10-NEXT: s_mov_b32 vcc_lo, 0 ; GFX10-NEXT: s_mov_b32 vcc_lo, 0
; GFX10-NEXT: v_mov_b32_e32 v3, 0x7b ; GFX10-NEXT: v_mov_b32_e32 v3, 0x7b
; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_sub_nc_u32_e32 v2, 0, v0 ; GFX10-NEXT: v_sub_nc_u32_e32 v2, 0, v0
; GFX10-NEXT: v_mov_b32_e32 v0, 0 ; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: ds_write_b32 v2, v3 offset:12 ; GFX10-NEXT: ds_write_b32 v2, v3 offset:12
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: v_div_fmas_f32 v4, s0, s0, s0 ; GFX10-NEXT: v_div_fmas_f32 v4, s0, s0, s0
; GFX10-NEXT: global_store_dword v[0:1], v4, off ; GFX10-NEXT: global_store_dword v[0:1], v4, off
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
entry: entry:
%x.i = call i32 @llvm.amdgcn.workitem.id.x() #1 %x.i = call i32 @llvm.amdgcn.workitem.id.x() #1
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; GFX9-NEXT: s_load_dword s0, s[0:1], 0x24 ; GFX9-NEXT: s_load_dword s0, s[0:1], 0x24
; GFX9-NEXT: s_mov_b64 vcc, 0 ; GFX9-NEXT: s_mov_b64 vcc, 0
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX9-NEXT: v_sub_u32_e32 v3, 0x3fb, v0 ; GFX9-NEXT: v_sub_u32_e32 v3, 0x3fb, v0
; GFX9-NEXT: v_mov_b32_e32 v4, 0x7b ; GFX9-NEXT: v_mov_b32_e32 v4, 0x7b
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v1, s0 ; GFX9-NEXT: v_mov_b32_e32 v1, s0
; GFX9-NEXT: v_div_fmas_f32 v2, v1, v1, v1 ; GFX9-NEXT: v_div_fmas_f32 v2, v1, v1, v1
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: ds_write2_b32 v3, v4, v5 offset1:1 ; GFX9-NEXT: ds_write2_b32 v3, v4, v5 offset1:1
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX10-LABEL: add_x_shl_neg_to_sub_misaligned_i64_max_offset_clamp_bit: ; GFX10-LABEL: add_x_shl_neg_to_sub_misaligned_i64_max_offset_clamp_bit:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_load_dword s0, s[0:1], 0x24 ; GFX10-NEXT: s_load_dword s0, s[0:1], 0x24
; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX10-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX10-NEXT: s_mov_b32 vcc_lo, 0 ; GFX10-NEXT: s_mov_b32 vcc_lo, 0
; GFX10-NEXT: v_mov_b32_e32 v3, 0x7b ; GFX10-NEXT: v_mov_b32_e32 v3, 0x7b
; GFX10-NEXT: v_mov_b32_e32 v4, 0 ; GFX10-NEXT: v_mov_b32_e32 v4, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: v_sub_nc_u32_e32 v2, 0x3fb, v0 ; GFX10-NEXT: v_sub_nc_u32_e32 v2, 0x3fb, v0
; GFX10-NEXT: v_mov_b32_e32 v0, 0 ; GFX10-NEXT: v_mov_b32_e32 v0, 0
; GFX10-NEXT: v_mov_b32_e32 v1, 0
; GFX10-NEXT: ds_write2_b32 v2, v3, v4 offset1:1 ; GFX10-NEXT: ds_write2_b32 v2, v3, v4 offset1:1
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: v_div_fmas_f32 v5, s0, s0, s0 ; GFX10-NEXT: v_div_fmas_f32 v5, s0, s0, s0
; GFX10-NEXT: global_store_dword v[0:1], v5, off ; GFX10-NEXT: global_store_dword v[0:1], v5, off
; GFX10-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%x.i = call i32 @llvm.amdgcn.workitem.id.x() #0 %x.i = call i32 @llvm.amdgcn.workitem.id.x() #0
%neg = sub i32 0, %x.i %neg = sub i32 0, %x.i
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llvm/test/CodeGen/AMDGPU/ds_write2.ll

Show First 20 Lines • Show All 839 Lines • ▼ Show 20 Lines
} }
@bar.large = addrspace(3) global [4096 x i64] undef, align 4 @bar.large = addrspace(3) global [4096 x i64] undef, align 4
define amdgpu_kernel void @store_misaligned64_constant_large_offsets() { define amdgpu_kernel void @store_misaligned64_constant_large_offsets() {
; CI-LABEL: store_misaligned64_constant_large_offsets: ; CI-LABEL: store_misaligned64_constant_large_offsets:
; CI: ; %bb.0: ; CI: ; %bb.0:
; CI-NEXT: s_mov_b64 s[0:1], 0x7b ; CI-NEXT: s_mov_b64 s[0:1], 0x7b
; CI-NEXT: v_mov_b32_e32 v0, s0
; CI-NEXT: v_mov_b32_e32 v2, 0 ; CI-NEXT: v_mov_b32_e32 v2, 0
; CI-NEXT: v_mov_b32_e32 v0, s0
; CI-NEXT: v_mov_b32_e32 v1, s1 ; CI-NEXT: v_mov_b32_e32 v1, s1
; CI-NEXT: s_mov_b32 m0, -1 ; CI-NEXT: s_mov_b32 m0, -1
; CI-NEXT: ds_write_b64 v2, v[0:1] offset:16384 ; CI-NEXT: ds_write_b64 v2, v[0:1] offset:16384
; CI-NEXT: ds_write_b64 v2, v[0:1] offset:32760 ; CI-NEXT: ds_write_b64 v2, v[0:1] offset:32760
; CI-NEXT: s_endpgm ; CI-NEXT: s_endpgm
; ;
; GFX9-LABEL: store_misaligned64_constant_large_offsets: ; GFX9-LABEL: store_misaligned64_constant_large_offsets:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_mov_b64 s[0:1], 0x7b ; GFX9-NEXT: s_mov_b64 s[0:1], 0x7b
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: ds_write_b64 v2, v[0:1] offset:16384 ; GFX9-NEXT: ds_write_b64 v2, v[0:1] offset:16384
; GFX9-NEXT: ds_write_b64 v2, v[0:1] offset:32760 ; GFX9-NEXT: ds_write_b64 v2, v[0:1] offset:32760
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
store i64 123, i64 addrspace(3)* getelementptr inbounds ([4096 x i64], [4096 x i64] addrspace(3)* @bar.large, i32 0, i32 2048), align 4 store i64 123, i64 addrspace(3)* getelementptr inbounds ([4096 x i64], [4096 x i64] addrspace(3)* @bar.large, i32 0, i32 2048), align 4
store i64 123, i64 addrspace(3)* getelementptr inbounds ([4096 x i64], [4096 x i64] addrspace(3)* @bar.large, i32 0, i32 4095), align 4 store i64 123, i64 addrspace(3)* getelementptr inbounds ([4096 x i64], [4096 x i64] addrspace(3)* @bar.large, i32 0, i32 4095), align 4
ret void ret void
} }
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; GFX9-UNALIGNED: ; %bb.0: ; GFX9-UNALIGNED: ; %bb.0:
; GFX9-UNALIGNED-NEXT: s_load_dword s4, s[0:1], 0x24 ; GFX9-UNALIGNED-NEXT: s_load_dword s4, s[0:1], 0x24
; GFX9-UNALIGNED-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c ; GFX9-UNALIGNED-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x2c
; GFX9-UNALIGNED-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-UNALIGNED-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-UNALIGNED-NEXT: v_lshl_add_u32 v4, v0, 4, s4 ; GFX9-UNALIGNED-NEXT: v_lshl_add_u32 v4, v0, 4, s4
; GFX9-UNALIGNED-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0 ; GFX9-UNALIGNED-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0
; GFX9-UNALIGNED-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-UNALIGNED-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-UNALIGNED-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-UNALIGNED-NEXT: v_mov_b32_e32 v0, s0
; GFX9-UNALIGNED-NEXT: v_mov_b32_e32 v2, s2
; GFX9-UNALIGNED-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-UNALIGNED-NEXT: v_mov_b32_e32 v1, s1
; GFX9-UNALIGNED-NEXT: v_mov_b32_e32 v2, s2
; GFX9-UNALIGNED-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-UNALIGNED-NEXT: v_mov_b32_e32 v3, s3
; GFX9-UNALIGNED-NEXT: ds_write2_b64 v4, v[0:1], v[2:3] offset1:1 ; GFX9-UNALIGNED-NEXT: ds_write2_b64 v4, v[0:1], v[2:3] offset1:1
; GFX9-UNALIGNED-NEXT: s_endpgm ; GFX9-UNALIGNED-NEXT: s_endpgm
%x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1 %x.i = tail call i32 @llvm.amdgcn.workitem.id.x() #1
%in.gep = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %in %in.gep = getelementptr inbounds <4 x float>, <4 x float> addrspace(1)* %in
%val0 = load <4 x float>, <4 x float> addrspace(1)* %in.gep, align 4 %val0 = load <4 x float>, <4 x float> addrspace(1)* %in.gep, align 4
%out.gep = getelementptr inbounds <4 x float>, <4 x float> addrspace(3)* %out, i32 %x.i %out.gep = getelementptr inbounds <4 x float>, <4 x float> addrspace(3)* %out, i32 %x.i
store <4 x float> %val0, <4 x float> addrspace(3)* %out.gep, align 4 store <4 x float> %val0, <4 x float> addrspace(3)* %out.gep, align 4
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llvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll

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; Should not merge this to a dword store ; Should not merge this to a dword store
define amdgpu_kernel void @global_store_2xi16_align2(i16 addrspace(1)* %p, i16 addrspace(1)* %r) #0 { define amdgpu_kernel void @global_store_2xi16_align2(i16 addrspace(1)* %p, i16 addrspace(1)* %r) #0 {
; GFX7-ALIGNED-LABEL: global_store_2xi16_align2: ; GFX7-ALIGNED-LABEL: global_store_2xi16_align2:
; GFX7-ALIGNED: ; %bb.0: ; GFX7-ALIGNED: ; %bb.0:
; GFX7-ALIGNED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2 ; GFX7-ALIGNED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v2, 1 ; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v2, 1
; GFX7-ALIGNED-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-ALIGNED-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s0
; GFX7-ALIGNED-NEXT: s_add_u32 s2, s0, 2 ; GFX7-ALIGNED-NEXT: s_add_u32 s2, s0, 2
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s0
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s1
; GFX7-ALIGNED-NEXT: s_addc_u32 s3, s1, 0 ; GFX7-ALIGNED-NEXT: s_addc_u32 s3, s1, 0
; GFX7-ALIGNED-NEXT: flat_store_short v[0:1], v2 ; GFX7-ALIGNED-NEXT: flat_store_short v[0:1], v2
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s2
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v2, 2 ; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v2, 2
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s2
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s3 ; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s3
; GFX7-ALIGNED-NEXT: flat_store_short v[0:1], v2 ; GFX7-ALIGNED-NEXT: flat_store_short v[0:1], v2
; GFX7-ALIGNED-NEXT: s_endpgm ; GFX7-ALIGNED-NEXT: s_endpgm
; ;
; GFX7-UNALIGNED-LABEL: global_store_2xi16_align2: ; GFX7-UNALIGNED-LABEL: global_store_2xi16_align2:
; GFX7-UNALIGNED: ; %bb.0: ; GFX7-UNALIGNED: ; %bb.0:
; GFX7-UNALIGNED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2 ; GFX7-UNALIGNED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v2, 1 ; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v2, 1
; GFX7-UNALIGNED-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-UNALIGNED-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v0, s0
; GFX7-UNALIGNED-NEXT: s_add_u32 s2, s0, 2 ; GFX7-UNALIGNED-NEXT: s_add_u32 s2, s0, 2
; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v0, s0
; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v1, s1
; GFX7-UNALIGNED-NEXT: s_addc_u32 s3, s1, 0 ; GFX7-UNALIGNED-NEXT: s_addc_u32 s3, s1, 0
; GFX7-UNALIGNED-NEXT: flat_store_short v[0:1], v2 ; GFX7-UNALIGNED-NEXT: flat_store_short v[0:1], v2
; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v0, s2
; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v2, 2 ; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v2, 2
; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v0, s2
; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v1, s3 ; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v1, s3
; GFX7-UNALIGNED-NEXT: flat_store_short v[0:1], v2 ; GFX7-UNALIGNED-NEXT: flat_store_short v[0:1], v2
; GFX7-UNALIGNED-NEXT: s_endpgm ; GFX7-UNALIGNED-NEXT: s_endpgm
; ;
; GFX9-LABEL: global_store_2xi16_align2: ; GFX9-LABEL: global_store_2xi16_align2:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
; GFX9-NEXT: v_mov_b32_e32 v0, 0 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
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define amdgpu_kernel void @global_store_2xi16_align1(i16 addrspace(1)* %p, i16 addrspace(1)* %r) #0 { define amdgpu_kernel void @global_store_2xi16_align1(i16 addrspace(1)* %p, i16 addrspace(1)* %r) #0 {
; GFX7-ALIGNED-LABEL: global_store_2xi16_align1: ; GFX7-ALIGNED-LABEL: global_store_2xi16_align1:
; GFX7-ALIGNED: ; %bb.0: ; GFX7-ALIGNED: ; %bb.0:
; GFX7-ALIGNED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2 ; GFX7-ALIGNED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v2, 1 ; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v2, 1
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v3, 0 ; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v3, 0
; GFX7-ALIGNED-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-ALIGNED-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-ALIGNED-NEXT: s_add_u32 s2, s0, 2 ; GFX7-ALIGNED-NEXT: s_add_u32 s2, s0, 2
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s0
; GFX7-ALIGNED-NEXT: s_addc_u32 s3, s1, 0 ; GFX7-ALIGNED-NEXT: s_addc_u32 s3, s1, 0
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s1
; GFX7-ALIGNED-NEXT: s_add_u32 s4, s0, 1 ; GFX7-ALIGNED-NEXT: s_add_u32 s4, s0, 1
; GFX7-ALIGNED-NEXT: flat_store_byte v[0:1], v2
; GFX7-ALIGNED-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-ALIGNED-NEXT: s_addc_u32 s5, s1, 0
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s0
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s1
; GFX7-ALIGNED-NEXT: s_add_u32 s0, s0, 3
; GFX7-ALIGNED-NEXT: flat_store_byte v[0:1], v2
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s4
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s5
; GFX7-ALIGNED-NEXT: s_add_u32 s0, s0, 3
; GFX7-ALIGNED-NEXT: flat_store_byte v[0:1], v3
; GFX7-ALIGNED-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-ALIGNED-NEXT: s_addc_u32 s1, s1, 0
; GFX7-ALIGNED-NEXT: flat_store_byte v[0:1], v3
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s0
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s1
; GFX7-ALIGNED-NEXT: flat_store_byte v[0:1], v3 ; GFX7-ALIGNED-NEXT: flat_store_byte v[0:1], v3
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s2
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v2, 2 ; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v2, 2
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, s2
; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s3 ; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v1, s3
; GFX7-ALIGNED-NEXT: flat_store_byte v[0:1], v2 ; GFX7-ALIGNED-NEXT: flat_store_byte v[0:1], v2
; GFX7-ALIGNED-NEXT: s_endpgm ; GFX7-ALIGNED-NEXT: s_endpgm
; ;
; GFX7-UNALIGNED-LABEL: global_store_2xi16_align1: ; GFX7-UNALIGNED-LABEL: global_store_2xi16_align1:
; GFX7-UNALIGNED: ; %bb.0: ; GFX7-UNALIGNED: ; %bb.0:
; GFX7-UNALIGNED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2 ; GFX7-UNALIGNED-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v2, 0x20001 ; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v2, 0x20001
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llvm/test/CodeGen/AMDGPU/fence-lds-read2-write2.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
@lds = internal addrspace(3) global [576 x double] undef, align 16 @lds = internal addrspace(3) global [576 x double] undef, align 16
; Stores to the same address appear multiple places in the same ; Stores to the same address appear multiple places in the same
; block. When sorted by offset, the merges would fail. We should form ; block. When sorted by offset, the merges would fail. We should form
; two groupings of ds_write2_b64 on either side of the fence. ; two groupings of ds_write2_b64 on either side of the fence.
define amdgpu_kernel void @same_address_fence_merge_write2() #0 { define amdgpu_kernel void @same_address_fence_merge_write2() #0 {
; GCN-LABEL: same_address_fence_merge_write2: ; GCN-LABEL: same_address_fence_merge_write2:
; GCN: ; %bb.0: ; %bb ; GCN: ; %bb.0: ; %bb
; GCN-NEXT: s_mov_b32 s0, 0
; GCN-NEXT: v_lshlrev_b32_e32 v2, 3, v0 ; GCN-NEXT: v_lshlrev_b32_e32 v2, 3, v0
; GCN-NEXT: s_mov_b32 s1, 0x40100000 ; GCN-NEXT: s_mov_b32 s1, 0x40100000
; GCN-NEXT: s_mov_b32 s0, 0
; GCN-NEXT: v_mov_b32_e32 v0, s0 ; GCN-NEXT: v_mov_b32_e32 v0, s0
; GCN-NEXT: v_mov_b32_e32 v1, s1 ; GCN-NEXT: v_mov_b32_e32 v1, s1
; GCN-NEXT: v_add_u32_e32 v3, 0x800, v2 ; GCN-NEXT: v_add_u32_e32 v3, 0x800, v2
; GCN-NEXT: s_mov_b32 s1, 0x3ff00000
; GCN-NEXT: ds_write2_b64 v2, v[0:1], v[0:1] offset1:66 ; GCN-NEXT: ds_write2_b64 v2, v[0:1], v[0:1] offset1:66
; GCN-NEXT: ds_write2_b64 v2, v[0:1], v[0:1] offset0:132 offset1:198 ; GCN-NEXT: ds_write2_b64 v2, v[0:1], v[0:1] offset0:132 offset1:198
; GCN-NEXT: ds_write2_b64 v3, v[0:1], v[0:1] offset0:8 offset1:74 ; GCN-NEXT: ds_write2_b64 v3, v[0:1], v[0:1] offset0:8 offset1:74
; GCN-NEXT: ds_write2_b64 v3, v[0:1], v[0:1] offset0:140 offset1:206 ; GCN-NEXT: ds_write2_b64 v3, v[0:1], v[0:1] offset0:140 offset1:206
; GCN-NEXT: s_mov_b32 s1, 0x3ff00000
; GCN-NEXT: v_mov_b32_e32 v0, s0 ; GCN-NEXT: v_mov_b32_e32 v0, s0
; GCN-NEXT: v_mov_b32_e32 v1, s1 ; GCN-NEXT: v_mov_b32_e32 v1, s1
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_barrier ; GCN-NEXT: s_barrier
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: ds_write2_b64 v2, v[0:1], v[0:1] offset1:66 ; GCN-NEXT: ds_write2_b64 v2, v[0:1], v[0:1] offset1:66
; GCN-NEXT: ds_write2_b64 v2, v[0:1], v[0:1] offset0:132 offset1:198 ; GCN-NEXT: ds_write2_b64 v2, v[0:1], v[0:1] offset0:132 offset1:198
; GCN-NEXT: ds_write2_b64 v3, v[0:1], v[0:1] offset0:8 offset1:74 ; GCN-NEXT: ds_write2_b64 v3, v[0:1], v[0:1] offset0:8 offset1:74
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llvm/test/CodeGen/AMDGPU/flat-scratch.ll

Show First 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
; ;
; GFX9-PAL-LABEL: zero_init_kernel: ; GFX9-PAL-LABEL: zero_init_kernel:
; GFX9-PAL: ; %bb.0: ; GFX9-PAL: ; %bb.0:
; GFX9-PAL-NEXT: s_getpc_b64 s[2:3] ; GFX9-PAL-NEXT: s_getpc_b64 s[2:3]
; GFX9-PAL-NEXT: s_mov_b32 s2, s0 ; GFX9-PAL-NEXT: s_mov_b32 s2, s0
; GFX9-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 ; GFX9-PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
; GFX9-PAL-NEXT: s_mov_b32 s0, 0 ; GFX9-PAL-NEXT: s_mov_b32 s0, 0
; GFX9-PAL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-PAL-NEXT: s_mov_b32 vcc_hi, 0 ; GFX9-PAL-NEXT: s_mov_b32 vcc_hi, 0
; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-PAL-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-PAL-NEXT: s_and_b32 s3, s3, 0xffff ; GFX9-PAL-NEXT: s_and_b32 s3, s3, 0xffff
; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s2, s1 ; GFX9-PAL-NEXT: s_add_u32 flat_scratch_lo, s2, s1
; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s3, 0 ; GFX9-PAL-NEXT: s_addc_u32 flat_scratch_hi, s3, 0
; GFX9-PAL-NEXT: s_mov_b32 s1, s0 ; GFX9-PAL-NEXT: s_mov_b32 s1, s0
; GFX9-PAL-NEXT: s_mov_b32 s2, s0 ; GFX9-PAL-NEXT: s_mov_b32 s2, s0
; GFX9-PAL-NEXT: s_mov_b32 s3, s0 ; GFX9-PAL-NEXT: s_mov_b32 s3, s0
; GFX9-PAL-NEXT: v_mov_b32_e32 v0, s0
; GFX9-PAL-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-PAL-NEXT: v_mov_b32_e32 v1, s1
; GFX9-PAL-NEXT: v_mov_b32_e32 v2, s2 ; GFX9-PAL-NEXT: v_mov_b32_e32 v2, s2
; GFX9-PAL-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-PAL-NEXT: v_mov_b32_e32 v3, s3
; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], vcc_hi offset:64 ; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], vcc_hi offset:64
; GFX9-PAL-NEXT: s_mov_b32 vcc_hi, 0 ; GFX9-PAL-NEXT: s_mov_b32 vcc_hi, 0
; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], vcc_hi offset:48 ; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], vcc_hi offset:48
; GFX9-PAL-NEXT: s_mov_b32 vcc_hi, 0 ; GFX9-PAL-NEXT: s_mov_b32 vcc_hi, 0
; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], vcc_hi offset:32 ; GFX9-PAL-NEXT: scratch_store_dwordx4 off, v[0:3], vcc_hi offset:32
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llvm/test/CodeGen/AMDGPU/fp-min-max-global-atomics-gfx10.ll

Show First 20 Lines • Show All 116 Lines • ▼ Show 20 Lines
; GFX10-NEXT: global_atomic_fmin_x2 v2, v[0:1], s[0:1] ; GFX10-NEXT: global_atomic_fmin_x2 v2, v[0:1], s[0:1]
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
; ;
; G_GFX10-LABEL: global_atomic_fmin_f64_noret: ; G_GFX10-LABEL: global_atomic_fmin_f64_noret:
; G_GFX10: ; %bb.0: ; %main_body ; G_GFX10: ; %bb.0: ; %main_body
; G_GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; G_GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; G_GFX10-NEXT: s_waitcnt lgkmcnt(0) ; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
; G_GFX10-NEXT: v_mov_b32_e32 v0, s0 ; G_GFX10-NEXT: v_mov_b32_e32 v0, s0
; G_GFX10-NEXT: v_mov_b32_e32 v2, s2
; G_GFX10-NEXT: v_mov_b32_e32 v1, s1 ; G_GFX10-NEXT: v_mov_b32_e32 v1, s1
; G_GFX10-NEXT: v_mov_b32_e32 v2, s2
; G_GFX10-NEXT: v_mov_b32_e32 v3, s3 ; G_GFX10-NEXT: v_mov_b32_e32 v3, s3
; G_GFX10-NEXT: global_atomic_fmin_x2 v[0:1], v[0:1], v[2:3], off glc ; G_GFX10-NEXT: global_atomic_fmin_x2 v[0:1], v[0:1], v[2:3], off glc
; G_GFX10-NEXT: s_endpgm ; G_GFX10-NEXT: s_endpgm
main_body: main_body:
%ret = call double @llvm.amdgcn.global.atomic.fmin.f64.p1f64.f64(double addrspace(1)* %ptr, double %data) %ret = call double @llvm.amdgcn.global.atomic.fmin.f64.p1f64.f64(double addrspace(1)* %ptr, double %data)
ret void ret void
} }
define amdgpu_kernel void @global_atomic_fmax_f64_noret(double addrspace(1)* %ptr, double %data) { define amdgpu_kernel void @global_atomic_fmax_f64_noret(double addrspace(1)* %ptr, double %data) {
; GFX10-LABEL: global_atomic_fmax_f64_noret: ; GFX10-LABEL: global_atomic_fmax_f64_noret:
; GFX10: ; %bb.0: ; %main_body ; GFX10: ; %bb.0: ; %main_body
; GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GFX10-NEXT: v_mov_b32_e32 v2, 0 ; GFX10-NEXT: v_mov_b32_e32 v2, 0
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v0, s2 ; GFX10-NEXT: v_mov_b32_e32 v0, s2
; GFX10-NEXT: v_mov_b32_e32 v1, s3 ; GFX10-NEXT: v_mov_b32_e32 v1, s3
; GFX10-NEXT: global_atomic_fmax_x2 v2, v[0:1], s[0:1] ; GFX10-NEXT: global_atomic_fmax_x2 v2, v[0:1], s[0:1]
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
; ;
; G_GFX10-LABEL: global_atomic_fmax_f64_noret: ; G_GFX10-LABEL: global_atomic_fmax_f64_noret:
; G_GFX10: ; %bb.0: ; %main_body ; G_GFX10: ; %bb.0: ; %main_body
; G_GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; G_GFX10-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; G_GFX10-NEXT: s_waitcnt lgkmcnt(0) ; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
; G_GFX10-NEXT: v_mov_b32_e32 v0, s0 ; G_GFX10-NEXT: v_mov_b32_e32 v0, s0
; G_GFX10-NEXT: v_mov_b32_e32 v2, s2
; G_GFX10-NEXT: v_mov_b32_e32 v1, s1 ; G_GFX10-NEXT: v_mov_b32_e32 v1, s1
; G_GFX10-NEXT: v_mov_b32_e32 v2, s2
; G_GFX10-NEXT: v_mov_b32_e32 v3, s3 ; G_GFX10-NEXT: v_mov_b32_e32 v3, s3
; G_GFX10-NEXT: global_atomic_fmax_x2 v[0:1], v[0:1], v[2:3], off glc ; G_GFX10-NEXT: global_atomic_fmax_x2 v[0:1], v[0:1], v[2:3], off glc
; G_GFX10-NEXT: s_endpgm ; G_GFX10-NEXT: s_endpgm
main_body: main_body:
%ret = call double @llvm.amdgcn.global.atomic.fmax.f64.p1f64.f64(double addrspace(1)* %ptr, double %data) %ret = call double @llvm.amdgcn.global.atomic.fmax.f64.p1f64.f64(double addrspace(1)* %ptr, double %data)
ret void ret void
} }
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llvm/test/CodeGen/AMDGPU/fp64-atomics-gfx90a.ll

Show First 20 Lines • Show All 440 Lines • ▼ Show 20 Linesmain_body:
%ret = atomicrmw fadd double addrspace(1)* %ptr, double 4.0 seq_cst %ret = atomicrmw fadd double addrspace(1)* %ptr, double 4.0 seq_cst
ret void ret void
} }
define amdgpu_kernel void @global_atomic_fadd_f64_noret_pat_agent(double addrspace(1)* %ptr) #1 { define amdgpu_kernel void @global_atomic_fadd_f64_noret_pat_agent(double addrspace(1)* %ptr) #1 {
; GFX90A-LABEL: global_atomic_fadd_f64_noret_pat_agent: ; GFX90A-LABEL: global_atomic_fadd_f64_noret_pat_agent:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
; GFX90A-NEXT: v_mov_b32_e32 v2, 0 ; GFX90A-NEXT: v_mov_b32_e32 v2, 0
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
; GFX90A-NEXT: v_mov_b32_e32 v1, 0x40100000 ; GFX90A-NEXT: v_mov_b32_e32 v1, 0x40100000
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: global_atomic_add_f64 v2, v[0:1], s[0:1] ; GFX90A-NEXT: global_atomic_add_f64 v2, v[0:1], s[0:1]
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
; GFX90A-NEXT: s_endpgm ; GFX90A-NEXT: s_endpgm
main_body: main_body:
%ret = atomicrmw fadd double addrspace(1)* %ptr, double 4.0 syncscope("agent") seq_cst %ret = atomicrmw fadd double addrspace(1)* %ptr, double 4.0 syncscope("agent") seq_cst
Show All 30 Linesmain_body:
%ret = atomicrmw fadd double addrspace(1)* %ptr, double 4.0 syncscope("one-as") seq_cst %ret = atomicrmw fadd double addrspace(1)* %ptr, double 4.0 syncscope("one-as") seq_cst
ret void ret void
} }
define amdgpu_kernel void @global_atomic_fadd_f64_noret_pat_flush(double addrspace(1)* %ptr) #0 { define amdgpu_kernel void @global_atomic_fadd_f64_noret_pat_flush(double addrspace(1)* %ptr) #0 {
; GFX90A-LABEL: global_atomic_fadd_f64_noret_pat_flush: ; GFX90A-LABEL: global_atomic_fadd_f64_noret_pat_flush:
; GFX90A: ; %bb.0: ; %main_body ; GFX90A: ; %bb.0: ; %main_body
; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
; GFX90A-NEXT: v_mov_b32_e32 v2, 0 ; GFX90A-NEXT: v_mov_b32_e32 v2, 0
; GFX90A-NEXT: v_mov_b32_e32 v0, 0
; GFX90A-NEXT: v_mov_b32_e32 v1, 0x40100000 ; GFX90A-NEXT: v_mov_b32_e32 v1, 0x40100000
; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX90A-NEXT: global_atomic_add_f64 v2, v[0:1], s[0:1] ; GFX90A-NEXT: global_atomic_add_f64 v2, v[0:1], s[0:1]
; GFX90A-NEXT: s_waitcnt vmcnt(0) ; GFX90A-NEXT: s_waitcnt vmcnt(0)
; GFX90A-NEXT: buffer_wbinvl1_vol ; GFX90A-NEXT: buffer_wbinvl1_vol
; GFX90A-NEXT: s_endpgm ; GFX90A-NEXT: s_endpgm
main_body: main_body:
%ret = atomicrmw fadd double addrspace(1)* %ptr, double 4.0 syncscope("agent") seq_cst %ret = atomicrmw fadd double addrspace(1)* %ptr, double 4.0 syncscope("agent") seq_cst
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llvm/test/CodeGen/AMDGPU/frem.ll

Show First 20 Lines • Show All 2,054 Lines • ▼ Show 20 Lines
; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; VI-NEXT: s_mov_b32 s2, 3 ; VI-NEXT: s_mov_b32 s2, 3
; VI-NEXT: s_mov_b32 s3, 0 ; VI-NEXT: s_mov_b32 s3, 0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v2, s6 ; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: s_add_u32 s0, s0, 32 ; VI-NEXT: s_add_u32 s0, s0, 32
; VI-NEXT: s_addc_u32 s1, s1, 0 ; VI-NEXT: s_addc_u32 s1, s1, 0
; VI-NEXT: v_mov_b32_e32 v5, s1
; VI-NEXT: v_mov_b32_e32 v3, s7 ; VI-NEXT: v_mov_b32_e32 v3, s7
; VI-NEXT: v_mov_b32_e32 v5, s1
; VI-NEXT: v_mov_b32_e32 v4, s0 ; VI-NEXT: v_mov_b32_e32 v4, s0
; VI-NEXT: flat_load_dwordx2 v[2:3], v[2:3] ; VI-NEXT: flat_load_dwordx2 v[2:3], v[2:3]
; VI-NEXT: flat_load_dwordx2 v[4:5], v[4:5] ; VI-NEXT: flat_load_dwordx2 v[4:5], v[4:5]
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_div_scale_f32 v7, s[0:1], v5, v5, v3 ; VI-NEXT: v_div_scale_f32 v7, s[0:1], v5, v5, v3
; VI-NEXT: v_div_scale_f32 v6, vcc, v3, v5, v3 ; VI-NEXT: v_div_scale_f32 v6, vcc, v3, v5, v3
▲ Show 20 Lines • Show All 296 Lines • ▼ Show 20 Lines
; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; VI-NEXT: s_mov_b32 s2, 3 ; VI-NEXT: s_mov_b32 s2, 3
; VI-NEXT: s_mov_b32 s3, 0 ; VI-NEXT: s_mov_b32 s3, 0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s6 ; VI-NEXT: v_mov_b32_e32 v0, s6
; VI-NEXT: s_add_u32 s0, s0, 64 ; VI-NEXT: s_add_u32 s0, s0, 64
; VI-NEXT: s_addc_u32 s1, s1, 0 ; VI-NEXT: s_addc_u32 s1, s1, 0
; VI-NEXT: v_mov_b32_e32 v5, s1
; VI-NEXT: v_mov_b32_e32 v1, s7 ; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: v_mov_b32_e32 v5, s1
; VI-NEXT: v_mov_b32_e32 v4, s0 ; VI-NEXT: v_mov_b32_e32 v4, s0
; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; VI-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; VI-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; VI-NEXT: v_mov_b32_e32 v8, s4 ; VI-NEXT: v_mov_b32_e32 v8, s4
; VI-NEXT: v_mov_b32_e32 v9, s5 ; VI-NEXT: v_mov_b32_e32 v9, s5
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_div_scale_f32 v11, s[0:1], v7, v7, v3 ; VI-NEXT: v_div_scale_f32 v11, s[0:1], v7, v7, v3
; VI-NEXT: v_div_scale_f32 v10, vcc, v3, v7, v3 ; VI-NEXT: v_div_scale_f32 v10, vcc, v3, v7, v3
▲ Show 20 Lines • Show All 351 Lines • ▼ Show 20 Lines
; VI-LABEL: frem_v2f64: ; VI-LABEL: frem_v2f64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s6 ; VI-NEXT: v_mov_b32_e32 v0, s6
; VI-NEXT: s_add_u32 s0, s0, 64 ; VI-NEXT: s_add_u32 s0, s0, 64
; VI-NEXT: s_addc_u32 s1, s1, 0 ; VI-NEXT: s_addc_u32 s1, s1, 0
; VI-NEXT: v_mov_b32_e32 v5, s1
; VI-NEXT: v_mov_b32_e32 v1, s7 ; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: v_mov_b32_e32 v5, s1
; VI-NEXT: v_mov_b32_e32 v4, s0 ; VI-NEXT: v_mov_b32_e32 v4, s0
; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; VI-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; VI-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; VI-NEXT: v_mov_b32_e32 v8, s4 ; VI-NEXT: v_mov_b32_e32 v8, s4
; VI-NEXT: v_mov_b32_e32 v9, s5 ; VI-NEXT: v_mov_b32_e32 v9, s5
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_div_scale_f64 v[10:11], s[0:1], v[6:7], v[6:7], v[2:3] ; VI-NEXT: v_div_scale_f64 v[10:11], s[0:1], v[6:7], v[6:7], v[2:3]
; VI-NEXT: v_rcp_f64_e32 v[12:13], v[10:11] ; VI-NEXT: v_rcp_f64_e32 v[12:13], v[10:11]
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llvm/test/CodeGen/AMDGPU/fshl.ll

Show First 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: fshl_i32_imm: ; VI-LABEL: fshl_i32_imm:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_mov_b32_e32 v0, s1 ; VI-NEXT: v_mov_b32_e32 v0, s1
; VI-NEXT: v_alignbit_b32 v2, s0, v0, 25 ; VI-NEXT: v_alignbit_b32 v2, s0, v0, 25
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: fshl_i32_imm: ; GFX9-LABEL: fshl_i32_imm:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c
; GFX9-NEXT: v_mov_b32_e32 v0, 0 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
▲ Show 20 Lines • Show All 58 Lines • ▼ Show 20 Lines
; ;
; VI-LABEL: fshl_v2i32: ; VI-LABEL: fshl_v2i32:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c
; VI-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x34
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x3c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x3c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: v_mov_b32_e32 v0, s7 ; VI-NEXT: v_mov_b32_e32 v0, s7
; VI-NEXT: s_not_b32 s1, s1 ; VI-NEXT: s_not_b32 s1, s1
; VI-NEXT: s_lshr_b32 s7, s5, 1 ; VI-NEXT: s_lshr_b32 s7, s5, 1
; VI-NEXT: v_alignbit_b32 v0, s5, v0, 1 ; VI-NEXT: v_alignbit_b32 v0, s5, v0, 1
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_alignbit_b32 v1, s7, v0, v1 ; VI-NEXT: v_alignbit_b32 v1, s7, v0, v1
; VI-NEXT: v_mov_b32_e32 v0, s6 ; VI-NEXT: v_mov_b32_e32 v0, s6
; VI-NEXT: s_not_b32 s0, s0 ; VI-NEXT: s_not_b32 s0, s0
; VI-NEXT: v_alignbit_b32 v0, s4, v0, 1 ; VI-NEXT: v_alignbit_b32 v0, s4, v0, 1
; VI-NEXT: s_lshr_b32 s1, s4, 1 ; VI-NEXT: s_lshr_b32 s1, s4, 1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: v_alignbit_b32 v0, s1, v0, v2 ; VI-NEXT: v_alignbit_b32 v0, s1, v0, v2
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: fshl_v2i32: ; GFX9-LABEL: fshl_v2i32:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c
; GFX9-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x34
▲ Show 20 Lines • Show All 75 Lines • ▼ Show 20 Lines
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: fshl_v2i32_imm: ; VI-LABEL: fshl_v2i32_imm:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: v_mov_b32_e32 v0, s1 ; VI-NEXT: v_mov_b32_e32 v0, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: v_alignbit_b32 v1, s5, v0, 23 ; VI-NEXT: v_alignbit_b32 v1, s5, v0, 23
; VI-NEXT: v_alignbit_b32 v0, s4, v2, 25 ; VI-NEXT: v_alignbit_b32 v0, s4, v2, 25
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: fshl_v2i32_imm: ; GFX9-LABEL: fshl_v2i32_imm:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c
; GFX9-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x34
▲ Show 20 Lines • Show All 77 Lines • ▼ Show 20 Lines
; ;
; VI-LABEL: fshl_v4i32: ; VI-LABEL: fshl_v4i32:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[12:13], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[12:13], s[0:1], 0x24
; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
; VI-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x44 ; VI-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x44
; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x54 ; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x54
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v5, s13
; VI-NEXT: v_mov_b32_e32 v0, s11 ; VI-NEXT: v_mov_b32_e32 v0, s11
; VI-NEXT: s_not_b32 s3, s3 ; VI-NEXT: s_not_b32 s3, s3
; VI-NEXT: s_lshr_b32 s11, s7, 1 ; VI-NEXT: s_lshr_b32 s11, s7, 1
; VI-NEXT: v_alignbit_b32 v0, s7, v0, 1 ; VI-NEXT: v_alignbit_b32 v0, s7, v0, 1
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_alignbit_b32 v3, s11, v0, v1 ; VI-NEXT: v_alignbit_b32 v3, s11, v0, v1
; VI-NEXT: v_mov_b32_e32 v0, s10 ; VI-NEXT: v_mov_b32_e32 v0, s10
; VI-NEXT: s_not_b32 s2, s2 ; VI-NEXT: s_not_b32 s2, s2
Show All 9 Lines
; VI-NEXT: v_alignbit_b32 v1, s2, v0, v1 ; VI-NEXT: v_alignbit_b32 v1, s2, v0, v1
; VI-NEXT: v_mov_b32_e32 v0, s8 ; VI-NEXT: v_mov_b32_e32 v0, s8
; VI-NEXT: s_not_b32 s0, s0 ; VI-NEXT: s_not_b32 s0, s0
; VI-NEXT: v_alignbit_b32 v0, s4, v0, 1 ; VI-NEXT: v_alignbit_b32 v0, s4, v0, 1
; VI-NEXT: s_lshr_b32 s1, s4, 1 ; VI-NEXT: s_lshr_b32 s1, s4, 1
; VI-NEXT: v_mov_b32_e32 v4, s0 ; VI-NEXT: v_mov_b32_e32 v4, s0
; VI-NEXT: v_alignbit_b32 v0, s1, v0, v4 ; VI-NEXT: v_alignbit_b32 v0, s1, v0, v4
; VI-NEXT: v_mov_b32_e32 v4, s12 ; VI-NEXT: v_mov_b32_e32 v4, s12
; VI-NEXT: v_mov_b32_e32 v5, s13
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: fshl_v4i32: ; GFX9-LABEL: fshl_v4i32:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
; GFX9-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x44 ; GFX9-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x44
▲ Show 20 Lines • Show All 183 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/fshr.ll

Show First 20 Lines • Show All 101 Lines • ▼ Show 20 Lines
; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; SI-NEXT: buffer_store_dword v0, off, s[4:7], 0
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: fshr_i32_imm: ; VI-LABEL: fshr_i32_imm:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_mov_b32_e32 v0, s1 ; VI-NEXT: v_mov_b32_e32 v0, s1
; VI-NEXT: v_alignbit_b32 v2, s0, v0, 7 ; VI-NEXT: v_alignbit_b32 v2, s0, v0, 7
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: fshr_i32_imm: ; GFX9-LABEL: fshr_i32_imm:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c
; GFX9-NEXT: v_mov_b32_e32 v0, 0 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
▲ Show 20 Lines • Show All 52 Lines • ▼ Show 20 Lines
; ;
; VI-LABEL: fshr_v2i32: ; VI-LABEL: fshr_v2i32:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c
; VI-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x34
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x3c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x3c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: v_mov_b32_e32 v0, s7 ; VI-NEXT: v_mov_b32_e32 v0, s7
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_alignbit_b32 v1, s5, v0, v1 ; VI-NEXT: v_alignbit_b32 v1, s5, v0, v1
; VI-NEXT: v_mov_b32_e32 v0, s6 ; VI-NEXT: v_mov_b32_e32 v0, s6
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: v_alignbit_b32 v0, s4, v0, v2 ; VI-NEXT: v_alignbit_b32 v0, s4, v0, v2
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: fshr_v2i32: ; GFX9-LABEL: fshr_v2i32:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c
; GFX9-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x34
▲ Show 20 Lines • Show All 61 Lines • ▼ Show 20 Lines
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: fshr_v2i32_imm: ; VI-LABEL: fshr_v2i32_imm:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: v_mov_b32_e32 v0, s1 ; VI-NEXT: v_mov_b32_e32 v0, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: v_alignbit_b32 v1, s5, v0, 9 ; VI-NEXT: v_alignbit_b32 v1, s5, v0, 9
; VI-NEXT: v_alignbit_b32 v0, s4, v2, 7 ; VI-NEXT: v_alignbit_b32 v0, s4, v2, 7
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: fshr_v2i32_imm: ; GFX9-LABEL: fshr_v2i32_imm:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c
; GFX9-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x34
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; ;
; VI-LABEL: fshr_v4i32: ; VI-LABEL: fshr_v4i32:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[12:13], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[12:13], s[0:1], 0x24
; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
; VI-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x44 ; VI-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x44
; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x54 ; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x54
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v5, s13
; VI-NEXT: v_mov_b32_e32 v0, s11 ; VI-NEXT: v_mov_b32_e32 v0, s11
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_alignbit_b32 v3, s7, v0, v1 ; VI-NEXT: v_alignbit_b32 v3, s7, v0, v1
; VI-NEXT: v_mov_b32_e32 v0, s10 ; VI-NEXT: v_mov_b32_e32 v0, s10
; VI-NEXT: v_mov_b32_e32 v1, s2 ; VI-NEXT: v_mov_b32_e32 v1, s2
; VI-NEXT: v_alignbit_b32 v2, s6, v0, v1 ; VI-NEXT: v_alignbit_b32 v2, s6, v0, v1
; VI-NEXT: v_mov_b32_e32 v0, s9 ; VI-NEXT: v_mov_b32_e32 v0, s9
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_alignbit_b32 v1, s5, v0, v1 ; VI-NEXT: v_alignbit_b32 v1, s5, v0, v1
; VI-NEXT: v_mov_b32_e32 v0, s8 ; VI-NEXT: v_mov_b32_e32 v0, s8
; VI-NEXT: v_mov_b32_e32 v4, s0 ; VI-NEXT: v_mov_b32_e32 v4, s0
; VI-NEXT: v_alignbit_b32 v0, s4, v0, v4 ; VI-NEXT: v_alignbit_b32 v0, s4, v0, v4
; VI-NEXT: v_mov_b32_e32 v4, s12 ; VI-NEXT: v_mov_b32_e32 v4, s12
; VI-NEXT: v_mov_b32_e32 v5, s13
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: fshr_v4i32: ; GFX9-LABEL: fshr_v4i32:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
; GFX9-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x44 ; GFX9-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x44
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llvm/test/CodeGen/AMDGPU/half.ll

Show First 20 Lines • Show All 58 Lines • ▼ Show 20 Lines
define amdgpu_kernel void @load_v3f16_arg(<3 x half> addrspace(1)* %out, <3 x half> %arg) #0 { define amdgpu_kernel void @load_v3f16_arg(<3 x half> addrspace(1)* %out, <3 x half> %arg) #0 {
; SI-LABEL: load_v3f16_arg: ; SI-LABEL: load_v3f16_arg:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; SI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; SI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_add_u32 s4, s0, 4 ; SI-NEXT: s_add_u32 s4, s0, 4
; SI-NEXT: s_addc_u32 s5, s1, 0 ; SI-NEXT: s_addc_u32 s5, s1, 0
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: v_mov_b32_e32 v4, s3 ; SI-NEXT: v_mov_b32_e32 v4, s3
; SI-NEXT: v_mov_b32_e32 v0, s0 ; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: v_mov_b32_e32 v3, s5 ; SI-NEXT: v_mov_b32_e32 v3, s5
; SI-NEXT: v_mov_b32_e32 v0, s0
; SI-NEXT: v_mov_b32_e32 v1, s1 ; SI-NEXT: v_mov_b32_e32 v1, s1
; SI-NEXT: v_mov_b32_e32 v5, s2 ; SI-NEXT: v_mov_b32_e32 v5, s2
; SI-NEXT: flat_store_short v[2:3], v4 ; SI-NEXT: flat_store_short v[2:3], v4
; SI-NEXT: flat_store_dword v[0:1], v5 ; SI-NEXT: flat_store_dword v[0:1], v5
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: load_v3f16_arg: ; VI-LABEL: load_v3f16_arg:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s4, s0, 4 ; VI-NEXT: s_add_u32 s4, s0, 4
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v4, s3 ; VI-NEXT: v_mov_b32_e32 v4, s3
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v3, s5 ; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v5, s2 ; VI-NEXT: v_mov_b32_e32 v5, s2
; VI-NEXT: flat_store_short v[2:3], v4 ; VI-NEXT: flat_store_short v[2:3], v4
; VI-NEXT: flat_store_dword v[0:1], v5 ; VI-NEXT: flat_store_dword v[0:1], v5
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
store <3 x half> %arg, <3 x half> addrspace(1)* %out store <3 x half> %arg, <3 x half> addrspace(1)* %out
ret void ret void
} }
; FIXME: Why not one load? ; FIXME: Why not one load?
define amdgpu_kernel void @load_v4f16_arg(<4 x half> addrspace(1)* %out, <4 x half> %arg) #0 { define amdgpu_kernel void @load_v4f16_arg(<4 x half> addrspace(1)* %out, <4 x half> %arg) #0 {
; SI-LABEL: load_v4f16_arg: ; SI-LABEL: load_v4f16_arg:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; SI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; SI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_mov_b32_e32 v0, s0 ; SI-NEXT: v_mov_b32_e32 v0, s0
; SI-NEXT: v_mov_b32_e32 v2, s2
; SI-NEXT: v_mov_b32_e32 v1, s1 ; SI-NEXT: v_mov_b32_e32 v1, s1
; SI-NEXT: v_mov_b32_e32 v2, s2
; SI-NEXT: v_mov_b32_e32 v3, s3 ; SI-NEXT: v_mov_b32_e32 v3, s3
; SI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; SI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: load_v4f16_arg: ; VI-LABEL: load_v4f16_arg:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
store <4 x half> %arg, <4 x half> addrspace(1)* %out store <4 x half> %arg, <4 x half> addrspace(1)* %out
ret void ret void
} }
define amdgpu_kernel void @load_v8f16_arg(<8 x half> addrspace(1)* %out, <8 x half> %arg) #0 { define amdgpu_kernel void @load_v8f16_arg(<8 x half> addrspace(1)* %out, <8 x half> %arg) #0 {
; SI-LABEL: load_v8f16_arg: ; SI-LABEL: load_v8f16_arg:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4 ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_mov_b32_e32 v4, s6 ; SI-NEXT: v_mov_b32_e32 v4, s6
; SI-NEXT: v_mov_b32_e32 v0, s0
; SI-NEXT: v_mov_b32_e32 v5, s7 ; SI-NEXT: v_mov_b32_e32 v5, s7
; SI-NEXT: v_mov_b32_e32 v0, s0
; SI-NEXT: v_mov_b32_e32 v1, s1 ; SI-NEXT: v_mov_b32_e32 v1, s1
; SI-NEXT: v_mov_b32_e32 v2, s2 ; SI-NEXT: v_mov_b32_e32 v2, s2
; SI-NEXT: v_mov_b32_e32 v3, s3 ; SI-NEXT: v_mov_b32_e32 v3, s3
; SI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; SI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: load_v8f16_arg: ; VI-LABEL: load_v8f16_arg:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v4, s6 ; VI-NEXT: v_mov_b32_e32 v4, s6
; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v5, s7 ; VI-NEXT: v_mov_b32_e32 v5, s7
; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
store <8 x half> %arg, <8 x half> addrspace(1)* %out store <8 x half> %arg, <8 x half> addrspace(1)* %out
ret void ret void
} }
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define amdgpu_kernel void @extload_v8f16_to_v8f32_arg(<8 x float> addrspace(1)* %out, <8 x half> %arg) #0 { define amdgpu_kernel void @extload_v8f16_to_v8f32_arg(<8 x float> addrspace(1)* %out, <8 x half> %arg) #0 {
; SI-LABEL: extload_v8f16_to_v8f32_arg: ; SI-LABEL: extload_v8f16_to_v8f32_arg:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4 ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_lshr_b32 s4, s1, 16 ; SI-NEXT: s_lshr_b32 s4, s1, 16
; SI-NEXT: s_lshr_b32 s5, s0, 16
; SI-NEXT: s_lshr_b32 s8, s3, 16 ; SI-NEXT: s_lshr_b32 s8, s3, 16
; SI-NEXT: v_cvt_f32_f16_e32 v3, s4 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s4
; SI-NEXT: s_lshr_b32 s4, s2, 16 ; SI-NEXT: s_lshr_b32 s4, s2, 16
; SI-NEXT: s_lshr_b32 s5, s0, 16
; SI-NEXT: v_cvt_f32_f16_e32 v7, s8 ; SI-NEXT: v_cvt_f32_f16_e32 v7, s8
; SI-NEXT: v_cvt_f32_f16_e32 v5, s4 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s4
; SI-NEXT: v_cvt_f32_f16_e32 v0, s0
; SI-NEXT: v_cvt_f32_f16_e32 v6, s3 ; SI-NEXT: v_cvt_f32_f16_e32 v6, s3
; SI-NEXT: v_cvt_f32_f16_e32 v4, s2 ; SI-NEXT: v_cvt_f32_f16_e32 v4, s2
; SI-NEXT: s_add_u32 s0, s6, 16 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s5
; SI-NEXT: v_cvt_f32_f16_e32 v2, s1 ; SI-NEXT: v_cvt_f32_f16_e32 v2, s1
; SI-NEXT: v_cvt_f32_f16_e32 v0, s0
; SI-NEXT: s_add_u32 s0, s6, 16
; SI-NEXT: s_addc_u32 s1, s7, 0 ; SI-NEXT: s_addc_u32 s1, s7, 0
; SI-NEXT: v_cvt_f32_f16_e32 v1, s5
; SI-NEXT: v_mov_b32_e32 v9, s1 ; SI-NEXT: v_mov_b32_e32 v9, s1
; SI-NEXT: v_mov_b32_e32 v8, s0 ; SI-NEXT: v_mov_b32_e32 v8, s0
; SI-NEXT: flat_store_dwordx4 v[8:9], v[4:7] ; SI-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
; SI-NEXT: s_nop 0 ; SI-NEXT: s_nop 0
; SI-NEXT: v_mov_b32_e32 v4, s6 ; SI-NEXT: v_mov_b32_e32 v4, s6
; SI-NEXT: v_mov_b32_e32 v5, s7 ; SI-NEXT: v_mov_b32_e32 v5, s7
; SI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; SI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: extload_v8f16_to_v8f32_arg: ; VI-LABEL: extload_v8f16_to_v8f32_arg:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_lshr_b32 s4, s1, 16 ; VI-NEXT: s_lshr_b32 s4, s1, 16
; VI-NEXT: s_lshr_b32 s5, s0, 16
; VI-NEXT: s_lshr_b32 s8, s3, 16 ; VI-NEXT: s_lshr_b32 s8, s3, 16
; VI-NEXT: v_cvt_f32_f16_e32 v3, s4 ; VI-NEXT: v_cvt_f32_f16_e32 v3, s4
; VI-NEXT: s_lshr_b32 s4, s2, 16 ; VI-NEXT: s_lshr_b32 s4, s2, 16
; VI-NEXT: s_lshr_b32 s5, s0, 16
; VI-NEXT: v_cvt_f32_f16_e32 v7, s8 ; VI-NEXT: v_cvt_f32_f16_e32 v7, s8
; VI-NEXT: v_cvt_f32_f16_e32 v5, s4 ; VI-NEXT: v_cvt_f32_f16_e32 v5, s4
; VI-NEXT: v_cvt_f32_f16_e32 v0, s0
; VI-NEXT: v_cvt_f32_f16_e32 v6, s3 ; VI-NEXT: v_cvt_f32_f16_e32 v6, s3
; VI-NEXT: v_cvt_f32_f16_e32 v4, s2 ; VI-NEXT: v_cvt_f32_f16_e32 v4, s2
; VI-NEXT: s_add_u32 s0, s6, 16 ; VI-NEXT: v_cvt_f32_f16_e32 v1, s5
; VI-NEXT: v_cvt_f32_f16_e32 v2, s1 ; VI-NEXT: v_cvt_f32_f16_e32 v2, s1
; VI-NEXT: v_cvt_f32_f16_e32 v0, s0
; VI-NEXT: s_add_u32 s0, s6, 16
; VI-NEXT: s_addc_u32 s1, s7, 0 ; VI-NEXT: s_addc_u32 s1, s7, 0
; VI-NEXT: v_cvt_f32_f16_e32 v1, s5
; VI-NEXT: v_mov_b32_e32 v9, s1 ; VI-NEXT: v_mov_b32_e32 v9, s1
; VI-NEXT: v_mov_b32_e32 v8, s0 ; VI-NEXT: v_mov_b32_e32 v8, s0
; VI-NEXT: flat_store_dwordx4 v[8:9], v[4:7] ; VI-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
; VI-NEXT: s_nop 0 ; VI-NEXT: s_nop 0
; VI-NEXT: v_mov_b32_e32 v4, s6 ; VI-NEXT: v_mov_b32_e32 v4, s6
; VI-NEXT: v_mov_b32_e32 v5, s7 ; VI-NEXT: v_mov_b32_e32 v5, s7
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 Lines
} }
define amdgpu_kernel void @extload_v3f16_to_v3f64_arg(<3 x double> addrspace(1)* %out, <3 x half> %arg) #0 { define amdgpu_kernel void @extload_v3f16_to_v3f64_arg(<3 x double> addrspace(1)* %out, <3 x half> %arg) #0 {
; SI-LABEL: extload_v3f16_to_v3f64_arg: ; SI-LABEL: extload_v3f16_to_v3f64_arg:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; SI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; SI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v0, s3
; SI-NEXT: s_lshr_b32 s4, s2, 16 ; SI-NEXT: s_lshr_b32 s4, s2, 16
; SI-NEXT: v_cvt_f32_f16_e32 v0, s3
; SI-NEXT: v_cvt_f32_f16_e32 v1, s2 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s2
; SI-NEXT: v_cvt_f32_f16_e32 v2, s4 ; SI-NEXT: v_cvt_f32_f16_e32 v2, s4
; SI-NEXT: s_add_u32 s2, s0, 16 ; SI-NEXT: s_add_u32 s2, s0, 16
; SI-NEXT: v_cvt_f64_f32_e32 v[4:5], v0 ; SI-NEXT: v_cvt_f64_f32_e32 v[4:5], v0
; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v1 ; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v1
; SI-NEXT: v_cvt_f64_f32_e32 v[2:3], v2 ; SI-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: v_mov_b32_e32 v7, s3 ; SI-NEXT: v_mov_b32_e32 v7, s3
; SI-NEXT: v_mov_b32_e32 v6, s2 ; SI-NEXT: v_mov_b32_e32 v6, s2
; SI-NEXT: flat_store_dwordx2 v[6:7], v[4:5] ; SI-NEXT: flat_store_dwordx2 v[6:7], v[4:5]
; SI-NEXT: v_mov_b32_e32 v5, s1 ; SI-NEXT: v_mov_b32_e32 v5, s1
; SI-NEXT: v_mov_b32_e32 v4, s0 ; SI-NEXT: v_mov_b32_e32 v4, s0
; SI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; SI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: extload_v3f16_to_v3f64_arg: ; VI-LABEL: extload_v3f16_to_v3f64_arg:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_cvt_f32_f16_e32 v1, s3
; VI-NEXT: s_lshr_b32 s4, s2, 16 ; VI-NEXT: s_lshr_b32 s4, s2, 16
; VI-NEXT: v_cvt_f32_f16_e32 v1, s3
; VI-NEXT: v_cvt_f32_f16_e32 v0, s2 ; VI-NEXT: v_cvt_f32_f16_e32 v0, s2
; VI-NEXT: v_cvt_f32_f16_e32 v2, s4 ; VI-NEXT: v_cvt_f32_f16_e32 v2, s4
; VI-NEXT: s_add_u32 s2, s0, 16 ; VI-NEXT: s_add_u32 s2, s0, 16
; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v1 ; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v1
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v0 ; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v2 ; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v7, s3 ; VI-NEXT: v_mov_b32_e32 v7, s3
; VI-NEXT: v_mov_b32_e32 v6, s2 ; VI-NEXT: v_mov_b32_e32 v6, s2
; VI-NEXT: flat_store_dwordx2 v[6:7], v[4:5] ; VI-NEXT: flat_store_dwordx2 v[6:7], v[4:5]
; VI-NEXT: v_mov_b32_e32 v5, s1 ; VI-NEXT: v_mov_b32_e32 v5, s1
; VI-NEXT: v_mov_b32_e32 v4, s0 ; VI-NEXT: v_mov_b32_e32 v4, s0
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%ext = fpext <3 x half> %arg to <3 x double> %ext = fpext <3 x half> %arg to <3 x double>
store <3 x double> %ext, <3 x double> addrspace(1)* %out store <3 x double> %ext, <3 x double> addrspace(1)* %out
ret void ret void
} }
define amdgpu_kernel void @extload_v4f16_to_v4f64_arg(<4 x double> addrspace(1)* %out, <4 x half> %arg) #0 { define amdgpu_kernel void @extload_v4f16_to_v4f64_arg(<4 x double> addrspace(1)* %out, <4 x half> %arg) #0 {
; SI-LABEL: extload_v4f16_to_v4f64_arg: ; SI-LABEL: extload_v4f16_to_v4f64_arg:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; SI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; SI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_lshr_b32 s4, s3, 16 ; SI-NEXT: s_lshr_b32 s4, s3, 16
; SI-NEXT: s_lshr_b32 s5, s2, 16
; SI-NEXT: v_cvt_f32_f16_e32 v4, s4 ; SI-NEXT: v_cvt_f32_f16_e32 v4, s4
; SI-NEXT: v_cvt_f32_f16_e32 v5, s3 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s3
; SI-NEXT: s_lshr_b32 s5, s2, 16
; SI-NEXT: v_cvt_f32_f16_e32 v0, s2 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s2
; SI-NEXT: v_cvt_f32_f16_e32 v2, s5 ; SI-NEXT: v_cvt_f32_f16_e32 v2, s5
; SI-NEXT: v_cvt_f64_f32_e32 v[6:7], v4 ; SI-NEXT: v_cvt_f64_f32_e32 v[6:7], v4
; SI-NEXT: v_cvt_f64_f32_e32 v[4:5], v5 ; SI-NEXT: v_cvt_f64_f32_e32 v[4:5], v5
; SI-NEXT: s_add_u32 s2, s0, 16
; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v0 ; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; SI-NEXT: v_cvt_f64_f32_e32 v[2:3], v2 ; SI-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
; SI-NEXT: s_add_u32 s2, s0, 16
; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: v_mov_b32_e32 v9, s3 ; SI-NEXT: v_mov_b32_e32 v9, s3
; SI-NEXT: v_mov_b32_e32 v8, s2 ; SI-NEXT: v_mov_b32_e32 v8, s2
; SI-NEXT: flat_store_dwordx4 v[8:9], v[4:7] ; SI-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
; SI-NEXT: s_nop 0 ; SI-NEXT: s_nop 0
; SI-NEXT: v_mov_b32_e32 v5, s1 ; SI-NEXT: v_mov_b32_e32 v5, s1
; SI-NEXT: v_mov_b32_e32 v4, s0 ; SI-NEXT: v_mov_b32_e32 v4, s0
; SI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; SI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: extload_v4f16_to_v4f64_arg: ; VI-LABEL: extload_v4f16_to_v4f64_arg:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; VI-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_lshr_b32 s5, s3, 16 ; VI-NEXT: s_lshr_b32 s5, s3, 16
; VI-NEXT: s_lshr_b32 s4, s2, 16
; VI-NEXT: v_cvt_f32_f16_e32 v4, s5 ; VI-NEXT: v_cvt_f32_f16_e32 v4, s5
; VI-NEXT: v_cvt_f32_f16_e32 v5, s3 ; VI-NEXT: v_cvt_f32_f16_e32 v5, s3
; VI-NEXT: s_lshr_b32 s4, s2, 16
; VI-NEXT: v_cvt_f32_f16_e32 v0, s2 ; VI-NEXT: v_cvt_f32_f16_e32 v0, s2
; VI-NEXT: v_cvt_f32_f16_e32 v2, s4 ; VI-NEXT: v_cvt_f32_f16_e32 v2, s4
; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v4 ; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v4
; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v5 ; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v5
; VI-NEXT: s_add_u32 s2, s0, 16
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v0 ; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v2 ; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
; VI-NEXT: s_add_u32 s2, s0, 16
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v9, s3 ; VI-NEXT: v_mov_b32_e32 v9, s3
; VI-NEXT: v_mov_b32_e32 v8, s2 ; VI-NEXT: v_mov_b32_e32 v8, s2
; VI-NEXT: flat_store_dwordx4 v[8:9], v[4:7] ; VI-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
; VI-NEXT: s_nop 0 ; VI-NEXT: s_nop 0
; VI-NEXT: v_mov_b32_e32 v5, s1 ; VI-NEXT: v_mov_b32_e32 v5, s1
; VI-NEXT: v_mov_b32_e32 v4, s0 ; VI-NEXT: v_mov_b32_e32 v4, s0
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%ext = fpext <4 x half> %arg to <4 x double> %ext = fpext <4 x half> %arg to <4 x double>
store <4 x double> %ext, <4 x double> addrspace(1)* %out store <4 x double> %ext, <4 x double> addrspace(1)* %out
ret void ret void
} }
define amdgpu_kernel void @extload_v8f16_to_v8f64_arg(<8 x double> addrspace(1)* %out, <8 x half> %arg) #0 { define amdgpu_kernel void @extload_v8f16_to_v8f64_arg(<8 x double> addrspace(1)* %out, <8 x half> %arg) #0 {
; SI-LABEL: extload_v8f16_to_v8f64_arg: ; SI-LABEL: extload_v8f16_to_v8f64_arg:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4 ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_lshr_b32 s4, s3, 16 ; SI-NEXT: s_lshr_b32 s4, s3, 16
; SI-NEXT: v_cvt_f32_f16_e32 v0, s4 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s4
; SI-NEXT: v_cvt_f32_f16_e32 v12, s3 ; SI-NEXT: v_cvt_f32_f16_e32 v12, s3
; SI-NEXT: s_lshr_b32 s5, s2, 16 ; SI-NEXT: s_lshr_b32 s5, s2, 16
; SI-NEXT: s_lshr_b32 s8, s1, 16 ; SI-NEXT: s_lshr_b32 s8, s1, 16
; SI-NEXT: s_lshr_b32 s4, s0, 16
; SI-NEXT: v_cvt_f32_f16_e32 v1, s5 ; SI-NEXT: v_cvt_f32_f16_e32 v1, s5
; SI-NEXT: v_cvt_f32_f16_e32 v8, s2 ; SI-NEXT: v_cvt_f32_f16_e32 v8, s2
; SI-NEXT: v_cvt_f32_f16_e32 v9, s0 ; SI-NEXT: v_cvt_f32_f16_e32 v9, s0
; SI-NEXT: s_add_u32 s0, s6, 48 ; SI-NEXT: v_cvt_f32_f16_e32 v4, s8
; SI-NEXT: s_lshr_b32 s4, s0, 16
; SI-NEXT: v_cvt_f32_f16_e32 v5, s1 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s1
; SI-NEXT: v_cvt_f32_f16_e32 v2, s4
; SI-NEXT: v_cvt_f64_f32_e32 v[14:15], v0 ; SI-NEXT: v_cvt_f64_f32_e32 v[14:15], v0
; SI-NEXT: v_cvt_f64_f32_e32 v[12:13], v12 ; SI-NEXT: v_cvt_f64_f32_e32 v[12:13], v12
; SI-NEXT: s_add_u32 s0, s6, 48
; SI-NEXT: s_addc_u32 s1, s7, 0 ; SI-NEXT: s_addc_u32 s1, s7, 0
; SI-NEXT: v_cvt_f32_f16_e32 v4, s8
; SI-NEXT: v_mov_b32_e32 v17, s1
; SI-NEXT: v_mov_b32_e32 v16, s0
; SI-NEXT: s_add_u32 s0, s6, 32
; SI-NEXT: v_cvt_f32_f16_e32 v2, s4
; SI-NEXT: v_cvt_f64_f32_e32 v[10:11], v1 ; SI-NEXT: v_cvt_f64_f32_e32 v[10:11], v1
; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v9 ; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v9
; SI-NEXT: v_cvt_f64_f32_e32 v[8:9], v8 ; SI-NEXT: v_cvt_f64_f32_e32 v[8:9], v8
; SI-NEXT: s_addc_u32 s1, s7, 0 ; SI-NEXT: v_mov_b32_e32 v16, s0
; SI-NEXT: flat_store_dwordx4 v[16:17], v[12:15] ; SI-NEXT: s_add_u32 s0, s6, 32
; SI-NEXT: v_cvt_f64_f32_e32 v[6:7], v4 ; SI-NEXT: v_cvt_f64_f32_e32 v[6:7], v4
; SI-NEXT: v_mov_b32_e32 v13, s1
; SI-NEXT: v_cvt_f64_f32_e32 v[4:5], v5 ; SI-NEXT: v_cvt_f64_f32_e32 v[4:5], v5
; SI-NEXT: v_mov_b32_e32 v17, s1
; SI-NEXT: s_addc_u32 s1, s7, 0
; SI-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
; SI-NEXT: flat_store_dwordx4 v[16:17], v[12:15]
; SI-NEXT: s_nop 0
; SI-NEXT: v_mov_b32_e32 v12, s0 ; SI-NEXT: v_mov_b32_e32 v12, s0
; SI-NEXT: s_add_u32 s0, s6, 16 ; SI-NEXT: s_add_u32 s0, s6, 16
; SI-NEXT: v_mov_b32_e32 v13, s1
; SI-NEXT: s_addc_u32 s1, s7, 0 ; SI-NEXT: s_addc_u32 s1, s7, 0
; SI-NEXT: v_cvt_f64_f32_e32 v[2:3], v2
; SI-NEXT: flat_store_dwordx4 v[12:13], v[8:11] ; SI-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
; SI-NEXT: s_nop 0 ; SI-NEXT: s_nop 0
; SI-NEXT: v_mov_b32_e32 v9, s1 ; SI-NEXT: v_mov_b32_e32 v9, s1
; SI-NEXT: v_mov_b32_e32 v8, s0 ; SI-NEXT: v_mov_b32_e32 v8, s0
; SI-NEXT: flat_store_dwordx4 v[8:9], v[4:7] ; SI-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
; SI-NEXT: s_nop 0 ; SI-NEXT: s_nop 0
; SI-NEXT: v_mov_b32_e32 v4, s6 ; SI-NEXT: v_mov_b32_e32 v4, s6
; SI-NEXT: v_mov_b32_e32 v5, s7 ; SI-NEXT: v_mov_b32_e32 v5, s7
; SI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; SI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: extload_v8f16_to_v8f64_arg: ; VI-LABEL: extload_v8f16_to_v8f64_arg:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_lshr_b32 s4, s0, 16
; VI-NEXT: s_lshr_b32 s8, s2, 16 ; VI-NEXT: s_lshr_b32 s8, s2, 16
; VI-NEXT: s_lshr_b32 s4, s0, 16
; VI-NEXT: s_lshr_b32 s9, s3, 16 ; VI-NEXT: s_lshr_b32 s9, s3, 16
; VI-NEXT: v_cvt_f32_f16_e32 v0, s4
; VI-NEXT: v_cvt_f32_f16_e32 v4, s8 ; VI-NEXT: v_cvt_f32_f16_e32 v4, s8
; VI-NEXT: v_cvt_f32_f16_e32 v0, s4
; VI-NEXT: v_cvt_f32_f16_e32 v5, s9 ; VI-NEXT: v_cvt_f32_f16_e32 v5, s9
; VI-NEXT: v_cvt_f32_f16_e32 v12, s3 ; VI-NEXT: v_cvt_f32_f16_e32 v12, s3
; VI-NEXT: s_lshr_b32 s5, s1, 16 ; VI-NEXT: s_lshr_b32 s5, s1, 16
; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v0
; VI-NEXT: v_cvt_f32_f16_e32 v0, s0
; VI-NEXT: v_cvt_f32_f16_e32 v8, s2 ; VI-NEXT: v_cvt_f32_f16_e32 v8, s2
; VI-NEXT: s_add_u32 s0, s6, 48 ; VI-NEXT: v_cvt_f32_f16_e32 v1, s5
; VI-NEXT: v_cvt_f64_f32_e32 v[10:11], v4 ; VI-NEXT: v_cvt_f64_f32_e32 v[10:11], v4
; VI-NEXT: v_cvt_f64_f32_e32 v[14:15], v5
; VI-NEXT: v_cvt_f32_f16_e32 v4, s1 ; VI-NEXT: v_cvt_f32_f16_e32 v4, s1
; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v0
; VI-NEXT: v_cvt_f64_f32_e32 v[14:15], v5
; VI-NEXT: v_cvt_f32_f16_e32 v0, s0
; VI-NEXT: v_cvt_f64_f32_e32 v[12:13], v12 ; VI-NEXT: v_cvt_f64_f32_e32 v[12:13], v12
; VI-NEXT: s_add_u32 s0, s6, 48
; VI-NEXT: s_addc_u32 s1, s7, 0 ; VI-NEXT: s_addc_u32 s1, s7, 0
; VI-NEXT: v_cvt_f32_f16_e32 v1, s5 ; VI-NEXT: v_cvt_f64_f32_e32 v[8:9], v8
; VI-NEXT: v_mov_b32_e32 v17, s1
; VI-NEXT: v_mov_b32_e32 v16, s0 ; VI-NEXT: v_mov_b32_e32 v16, s0
; VI-NEXT: s_add_u32 s0, s6, 32 ; VI-NEXT: s_add_u32 s0, s6, 32
; VI-NEXT: v_cvt_f64_f32_e32 v[8:9], v8
; VI-NEXT: s_addc_u32 s1, s7, 0
; VI-NEXT: flat_store_dwordx4 v[16:17], v[12:15]
; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v1 ; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v1
; VI-NEXT: v_mov_b32_e32 v13, s1
; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v4 ; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v4
; VI-NEXT: v_mov_b32_e32 v17, s1
; VI-NEXT: s_addc_u32 s1, s7, 0
; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; VI-NEXT: flat_store_dwordx4 v[16:17], v[12:15]
; VI-NEXT: s_nop 0
; VI-NEXT: v_mov_b32_e32 v12, s0 ; VI-NEXT: v_mov_b32_e32 v12, s0
; VI-NEXT: s_add_u32 s0, s6, 16 ; VI-NEXT: s_add_u32 s0, s6, 16
; VI-NEXT: v_mov_b32_e32 v13, s1
; VI-NEXT: s_addc_u32 s1, s7, 0 ; VI-NEXT: s_addc_u32 s1, s7, 0
; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v0
; VI-NEXT: flat_store_dwordx4 v[12:13], v[8:11] ; VI-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
; VI-NEXT: s_nop 0 ; VI-NEXT: s_nop 0
; VI-NEXT: v_mov_b32_e32 v9, s1 ; VI-NEXT: v_mov_b32_e32 v9, s1
; VI-NEXT: v_mov_b32_e32 v8, s0 ; VI-NEXT: v_mov_b32_e32 v8, s0
; VI-NEXT: flat_store_dwordx4 v[8:9], v[4:7] ; VI-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
; VI-NEXT: s_nop 0 ; VI-NEXT: s_nop 0
; VI-NEXT: v_mov_b32_e32 v4, s6 ; VI-NEXT: v_mov_b32_e32 v4, s6
; VI-NEXT: v_mov_b32_e32 v5, s7 ; VI-NEXT: v_mov_b32_e32 v5, s7
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} }
define amdgpu_kernel void @global_extload_v16f16_to_v16f32(<16 x float> addrspace(1)* %out, <16 x half> addrspace(1)* %in) #0 { define amdgpu_kernel void @global_extload_v16f16_to_v16f32(<16 x float> addrspace(1)* %out, <16 x half> addrspace(1)* %in) #0 {
; SI-LABEL: global_extload_v16f16_to_v16f32: ; SI-LABEL: global_extload_v16f16_to_v16f32:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_add_u32 s4, s2, 16 ; SI-NEXT: s_add_u32 s4, s2, 16
; SI-NEXT: v_mov_b32_e32 v5, s3
; SI-NEXT: s_addc_u32 s5, s3, 0 ; SI-NEXT: s_addc_u32 s5, s3, 0
; SI-NEXT: v_mov_b32_e32 v0, s4 ; SI-NEXT: v_mov_b32_e32 v5, s3
; SI-NEXT: v_mov_b32_e32 v4, s2 ; SI-NEXT: v_mov_b32_e32 v4, s2
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5 ; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; SI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; SI-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; SI-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; SI-NEXT: s_add_u32 s2, s0, 16 ; SI-NEXT: s_add_u32 s2, s0, 16
; SI-NEXT: s_addc_u32 s3, s1, 0 ; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: v_mov_b32_e32 v14, s3 ; SI-NEXT: v_mov_b32_e32 v14, s3
; SI-NEXT: v_mov_b32_e32 v13, s2 ; SI-NEXT: v_mov_b32_e32 v13, s2
; SI-NEXT: s_add_u32 s2, s0, 48 ; SI-NEXT: s_add_u32 s2, s0, 48
; SI-NEXT: s_addc_u32 s3, s1, 0 ; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: v_mov_b32_e32 v15, s3
; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v8, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v1
; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v11, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v11, v7
; SI-NEXT: v_cvt_f32_f16_e32 v9, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v6
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6 ; SI-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; SI-NEXT: v_cvt_f32_f16_e32 v12, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v12, v7
; SI-NEXT: v_cvt_f32_f16_e32 v10, v6 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v6
; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; SI-NEXT: flat_store_dwordx4 v[13:14], v[9:12] ; SI-NEXT: flat_store_dwordx4 v[13:14], v[9:12]
; SI-NEXT: s_nop 0 ; SI-NEXT: s_nop 0
; SI-NEXT: v_cvt_f32_f16_e32 v12, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v12, v3
; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v5 ; SI-NEXT: v_lshrrev_b32_e32 v16, 16, v5
; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v4 ; SI-NEXT: v_lshrrev_b32_e32 v17, 16, v4
; SI-NEXT: v_cvt_f32_f16_e32 v6, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v0
; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v0 ; SI-NEXT: v_lshrrev_b32_e32 v7, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v10, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v2
; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v2 ; SI-NEXT: v_lshrrev_b32_e32 v11, 16, v2
; SI-NEXT: v_cvt_f32_f16_e32 v2, v5 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v5
; SI-NEXT: v_cvt_f32_f16_e32 v0, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v0, v4
; SI-NEXT: v_mov_b32_e32 v5, s1
; SI-NEXT: v_cvt_f32_f16_e32 v9, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v1
; SI-NEXT: v_cvt_f32_f16_e32 v13, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v13, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, v16 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v16
; SI-NEXT: v_cvt_f32_f16_e32 v1, v17 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v17
; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
; SI-NEXT: v_mov_b32_e32 v4, s0 ; SI-NEXT: v_mov_b32_e32 v4, s0
; SI-NEXT: s_add_u32 s0, s0, 32 ; SI-NEXT: s_add_u32 s0, s0, 32
; SI-NEXT: v_cvt_f32_f16_e32 v11, v11
; SI-NEXT: s_addc_u32 s1, s1, 0
; SI-NEXT: v_cvt_f32_f16_e32 v7, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v7
; SI-NEXT: v_mov_b32_e32 v15, s3 ; SI-NEXT: v_mov_b32_e32 v5, s1
; SI-NEXT: v_mov_b32_e32 v17, s1 ; SI-NEXT: s_addc_u32 s1, s1, 0
; SI-NEXT: v_mov_b32_e32 v14, s2 ; SI-NEXT: v_mov_b32_e32 v14, s2
; SI-NEXT: v_mov_b32_e32 v17, s1
; SI-NEXT: v_mov_b32_e32 v16, s0 ; SI-NEXT: v_mov_b32_e32 v16, s0
; SI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; SI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; SI-NEXT: flat_store_dwordx4 v[14:15], v[10:13] ; SI-NEXT: flat_store_dwordx4 v[14:15], v[10:13]
; SI-NEXT: flat_store_dwordx4 v[16:17], v[6:9] ; SI-NEXT: flat_store_dwordx4 v[16:17], v[6:9]
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: global_extload_v16f16_to_v16f32: ; VI-LABEL: global_extload_v16f16_to_v16f32:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_add_u32 s2, s2, 16 ; VI-NEXT: s_add_u32 s2, s2, 16
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_addc_u32 s3, s3, 0 ; VI-NEXT: s_addc_u32 s3, s3, 0
; VI-NEXT: v_mov_b32_e32 v5, s3 ; VI-NEXT: v_mov_b32_e32 v5, s3
; VI-NEXT: v_mov_b32_e32 v4, s2 ; VI-NEXT: v_mov_b32_e32 v4, s2
; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; VI-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; VI-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; VI-NEXT: s_add_u32 s2, s0, 16 ; VI-NEXT: s_add_u32 s2, s0, 16
; VI-NEXT: s_addc_u32 s3, s1, 0 ; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v19, s3 ; VI-NEXT: v_mov_b32_e32 v19, s3
; VI-NEXT: v_mov_b32_e32 v18, s2 ; VI-NEXT: v_mov_b32_e32 v18, s2
; VI-NEXT: s_add_u32 s2, s0, 48 ; VI-NEXT: s_add_u32 s2, s0, 48
; VI-NEXT: v_mov_b32_e32 v17, s1
; VI-NEXT: s_addc_u32 s3, s1, 0 ; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v16, s0 ; VI-NEXT: v_mov_b32_e32 v16, s0
; VI-NEXT: s_add_u32 s0, s0, 32 ; VI-NEXT: s_add_u32 s0, s0, 32
; VI-NEXT: v_mov_b32_e32 v17, s1
; VI-NEXT: s_addc_u32 s1, s1, 0 ; VI-NEXT: s_addc_u32 s1, s1, 0
; VI-NEXT: v_mov_b32_e32 v21, s3 ; VI-NEXT: v_mov_b32_e32 v21, s3
; VI-NEXT: v_mov_b32_e32 v20, s2 ; VI-NEXT: v_mov_b32_e32 v20, s2
; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_cvt_f32_f16_e32 v14, v3 ; VI-NEXT: v_cvt_f32_f16_e32 v14, v3
; VI-NEXT: v_cvt_f32_f16_e32 v12, v2 ; VI-NEXT: v_cvt_f32_f16_e32 v12, v2
; VI-NEXT: v_cvt_f32_f16_sdwa v15, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f32_f16_sdwa v15, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f32_f16_sdwa v13, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f32_f16_sdwa v13, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
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; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; VI-NEXT: s_add_u32 s2, s0, 16 ; VI-NEXT: s_add_u32 s2, s0, 16
; VI-NEXT: s_addc_u32 s3, s1, 0 ; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v9, s3
; VI-NEXT: v_mov_b32_e32 v5, s1 ; VI-NEXT: v_mov_b32_e32 v5, s1
; VI-NEXT: v_mov_b32_e32 v4, s0 ; VI-NEXT: v_mov_b32_e32 v4, s0
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_cvt_f32_f16_e32 v3, v1 ; VI-NEXT: v_cvt_f32_f16_e32 v3, v1
; VI-NEXT: v_cvt_f32_f16_e32 v2, v0 ; VI-NEXT: v_cvt_f32_f16_e32 v2, v0
; VI-NEXT: v_cvt_f32_f16_sdwa v8, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f32_f16_sdwa v8, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v3 ; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v3
; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v2 ; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v2
; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v8 ; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v8
; VI-NEXT: v_mov_b32_e32 v9, s3
; VI-NEXT: v_mov_b32_e32 v8, s2 ; VI-NEXT: v_mov_b32_e32 v8, s2
; VI-NEXT: flat_store_dwordx2 v[8:9], v[6:7] ; VI-NEXT: flat_store_dwordx2 v[8:9], v[6:7]
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%val = load <3 x half>, <3 x half> addrspace(1)* %in %val = load <3 x half>, <3 x half> addrspace(1)* %in
%cvt = fpext <3 x half> %val to <3 x double> %cvt = fpext <3 x half> %val to <3 x double>
store <3 x double> %cvt, <3 x double> addrspace(1)* %out store <3 x double> %cvt, <3 x double> addrspace(1)* %out
ret void ret void
} }
define amdgpu_kernel void @global_extload_v4f16_to_v4f64(<4 x double> addrspace(1)* %out, <4 x half> addrspace(1)* %in) #0 { define amdgpu_kernel void @global_extload_v4f16_to_v4f64(<4 x double> addrspace(1)* %out, <4 x half> addrspace(1)* %in) #0 {
; SI-LABEL: global_extload_v4f16_to_v4f64: ; SI-LABEL: global_extload_v4f16_to_v4f64:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_mov_b32_e32 v0, s2 ; SI-NEXT: v_mov_b32_e32 v0, s2
; SI-NEXT: v_mov_b32_e32 v1, s3 ; SI-NEXT: v_mov_b32_e32 v1, s3
; SI-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; SI-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; SI-NEXT: s_add_u32 s2, s0, 16 ; SI-NEXT: s_add_u32 s2, s0, 16
; SI-NEXT: s_addc_u32 s3, s1, 0 ; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: v_mov_b32_e32 v11, s3
; SI-NEXT: v_mov_b32_e32 v9, s1 ; SI-NEXT: v_mov_b32_e32 v9, s1
; SI-NEXT: v_mov_b32_e32 v8, s0 ; SI-NEXT: v_mov_b32_e32 v8, s0
; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v1 ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v3, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v1
; SI-NEXT: v_cvt_f32_f16_e32 v1, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v1, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; SI-NEXT: v_cvt_f32_f16_e32 v2, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v2
; SI-NEXT: v_cvt_f32_f16_e32 v10, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v0
; SI-NEXT: v_cvt_f64_f32_e32 v[4:5], v3 ; SI-NEXT: v_cvt_f64_f32_e32 v[4:5], v3
; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v1 ; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v1
; SI-NEXT: v_cvt_f64_f32_e32 v[6:7], v2 ; SI-NEXT: v_cvt_f64_f32_e32 v[6:7], v2
; SI-NEXT: v_cvt_f64_f32_e32 v[2:3], v10 ; SI-NEXT: v_cvt_f64_f32_e32 v[2:3], v10
; SI-NEXT: v_mov_b32_e32 v11, s3
; SI-NEXT: v_mov_b32_e32 v10, s2 ; SI-NEXT: v_mov_b32_e32 v10, s2
; SI-NEXT: flat_store_dwordx4 v[10:11], v[4:7] ; SI-NEXT: flat_store_dwordx4 v[10:11], v[4:7]
; SI-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; SI-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: global_extload_v4f16_to_v4f64: ; VI-LABEL: global_extload_v4f16_to_v4f64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; VI-NEXT: s_add_u32 s2, s0, 16 ; VI-NEXT: s_add_u32 s2, s0, 16
; VI-NEXT: s_addc_u32 s3, s1, 0 ; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v11, s3
; VI-NEXT: v_mov_b32_e32 v9, s1 ; VI-NEXT: v_mov_b32_e32 v9, s1
; VI-NEXT: v_mov_b32_e32 v8, s0 ; VI-NEXT: v_mov_b32_e32 v8, s0
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_cvt_f32_f16_e32 v3, v1 ; VI-NEXT: v_cvt_f32_f16_e32 v3, v1
; VI-NEXT: v_cvt_f32_f16_sdwa v6, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f32_f16_sdwa v6, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f32_f16_e32 v2, v0 ; VI-NEXT: v_cvt_f32_f16_e32 v2, v0
; VI-NEXT: v_cvt_f32_f16_sdwa v10, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f32_f16_sdwa v10, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v3 ; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v3
; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v6 ; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v6
; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v2 ; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v2
; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v10 ; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v10
; VI-NEXT: v_mov_b32_e32 v11, s3
; VI-NEXT: v_mov_b32_e32 v10, s2 ; VI-NEXT: v_mov_b32_e32 v10, s2
; VI-NEXT: flat_store_dwordx4 v[10:11], v[4:7] ; VI-NEXT: flat_store_dwordx4 v[10:11], v[4:7]
; VI-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%val = load <4 x half>, <4 x half> addrspace(1)* %in %val = load <4 x half>, <4 x half> addrspace(1)* %in
%cvt = fpext <4 x half> %val to <4 x double> %cvt = fpext <4 x half> %val to <4 x double>
store <4 x double> %cvt, <4 x double> addrspace(1)* %out store <4 x double> %cvt, <4 x double> addrspace(1)* %out
ret void ret void
} }
define amdgpu_kernel void @global_extload_v8f16_to_v8f64(<8 x double> addrspace(1)* %out, <8 x half> addrspace(1)* %in) #0 { define amdgpu_kernel void @global_extload_v8f16_to_v8f64(<8 x double> addrspace(1)* %out, <8 x half> addrspace(1)* %in) #0 {
; SI-LABEL: global_extload_v8f16_to_v8f64: ; SI-LABEL: global_extload_v8f16_to_v8f64:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_mov_b32_e32 v0, s2 ; SI-NEXT: v_mov_b32_e32 v0, s2
; SI-NEXT: v_mov_b32_e32 v1, s3 ; SI-NEXT: v_mov_b32_e32 v1, s3
; SI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; SI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; SI-NEXT: s_add_u32 s2, s0, 48 ; SI-NEXT: s_add_u32 s2, s0, 48
; SI-NEXT: s_addc_u32 s3, s1, 0 ; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: v_mov_b32_e32 v7, s3 ; SI-NEXT: v_mov_b32_e32 v7, s3
; SI-NEXT: v_mov_b32_e32 v6, s2 ; SI-NEXT: v_mov_b32_e32 v6, s2
; SI-NEXT: s_add_u32 s2, s0, 32 ; SI-NEXT: s_add_u32 s2, s0, 32
; SI-NEXT: v_mov_b32_e32 v13, s1
; SI-NEXT: s_addc_u32 s3, s1, 0 ; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: v_mov_b32_e32 v12, s0 ; SI-NEXT: v_mov_b32_e32 v12, s0
; SI-NEXT: s_add_u32 s0, s0, 16 ; SI-NEXT: s_add_u32 s0, s0, 16
; SI-NEXT: v_mov_b32_e32 v13, s1
; SI-NEXT: v_mov_b32_e32 v15, s3 ; SI-NEXT: v_mov_b32_e32 v15, s3
; SI-NEXT: s_addc_u32 s1, s1, 0
; SI-NEXT: v_mov_b32_e32 v14, s2 ; SI-NEXT: v_mov_b32_e32 v14, s2
; SI-NEXT: s_addc_u32 s1, s1, 0
; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v3 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v3
; SI-NEXT: v_cvt_f32_f16_e32 v3, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v3, v3
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v2 ; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v2
; SI-NEXT: v_cvt_f32_f16_e32 v8, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v2
; SI-NEXT: v_cvt_f32_f16_e32 v2, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v2, v4
; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v1 ; SI-NEXT: v_lshrrev_b32_e32 v9, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v10, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v1
Show All 26 Lines
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; VI-NEXT: s_add_u32 s2, s0, 48 ; VI-NEXT: s_add_u32 s2, s0, 48
; VI-NEXT: s_addc_u32 s3, s1, 0 ; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v8, s3 ; VI-NEXT: v_mov_b32_e32 v8, s3
; VI-NEXT: v_mov_b32_e32 v7, s2 ; VI-NEXT: v_mov_b32_e32 v7, s2
; VI-NEXT: s_add_u32 s2, s0, 32 ; VI-NEXT: s_add_u32 s2, s0, 32
; VI-NEXT: v_mov_b32_e32 v13, s1
; VI-NEXT: s_addc_u32 s3, s1, 0 ; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v12, s0 ; VI-NEXT: v_mov_b32_e32 v12, s0
; VI-NEXT: s_add_u32 s0, s0, 16 ; VI-NEXT: s_add_u32 s0, s0, 16
; VI-NEXT: v_mov_b32_e32 v13, s1
; VI-NEXT: v_mov_b32_e32 v15, s3 ; VI-NEXT: v_mov_b32_e32 v15, s3
; VI-NEXT: s_addc_u32 s1, s1, 0
; VI-NEXT: v_mov_b32_e32 v14, s2 ; VI-NEXT: v_mov_b32_e32 v14, s2
; VI-NEXT: s_addc_u32 s1, s1, 0
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_cvt_f32_f16_e32 v9, v0 ; VI-NEXT: v_cvt_f32_f16_e32 v9, v0
; VI-NEXT: v_cvt_f32_f16_sdwa v16, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f32_f16_sdwa v16, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f32_f16_e32 v0, v3 ; VI-NEXT: v_cvt_f32_f16_e32 v0, v3
; VI-NEXT: v_cvt_f32_f16_sdwa v5, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f32_f16_sdwa v5, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f32_f16_e32 v10, v1 ; VI-NEXT: v_cvt_f32_f16_e32 v10, v1
; VI-NEXT: v_cvt_f32_f16_e32 v11, v2 ; VI-NEXT: v_cvt_f32_f16_e32 v11, v2
; VI-NEXT: v_cvt_f64_f32_e32 v[3:4], v0 ; VI-NEXT: v_cvt_f64_f32_e32 v[3:4], v0
Show All 20 Lines
} }
define amdgpu_kernel void @global_extload_v16f16_to_v16f64(<16 x double> addrspace(1)* %out, <16 x half> addrspace(1)* %in) #0 { define amdgpu_kernel void @global_extload_v16f16_to_v16f64(<16 x double> addrspace(1)* %out, <16 x half> addrspace(1)* %in) #0 {
; SI-LABEL: global_extload_v16f16_to_v16f64: ; SI-LABEL: global_extload_v16f16_to_v16f64:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_mov_b32_e32 v0, s2 ; SI-NEXT: v_mov_b32_e32 v0, s2
; SI-NEXT: v_mov_b32_e32 v1, s3
; SI-NEXT: s_add_u32 s2, s2, 16 ; SI-NEXT: s_add_u32 s2, s2, 16
; SI-NEXT: v_mov_b32_e32 v1, s3
; SI-NEXT: s_addc_u32 s3, s3, 0 ; SI-NEXT: s_addc_u32 s3, s3, 0
; SI-NEXT: v_mov_b32_e32 v2, s2 ; SI-NEXT: v_mov_b32_e32 v2, s2
; SI-NEXT: v_mov_b32_e32 v3, s3 ; SI-NEXT: v_mov_b32_e32 v3, s3
; SI-NEXT: flat_load_dwordx4 v[4:7], v[0:1] ; SI-NEXT: flat_load_dwordx4 v[4:7], v[0:1]
; SI-NEXT: flat_load_dwordx4 v[0:3], v[2:3] ; SI-NEXT: flat_load_dwordx4 v[0:3], v[2:3]
; SI-NEXT: s_add_u32 s2, s0, 48 ; SI-NEXT: s_add_u32 s2, s0, 48
; SI-NEXT: s_addc_u32 s3, s1, 0 ; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: v_mov_b32_e32 v14, s3 ; SI-NEXT: v_mov_b32_e32 v14, s3
; SI-NEXT: v_mov_b32_e32 v13, s2 ; SI-NEXT: v_mov_b32_e32 v13, s2
; SI-NEXT: s_add_u32 s2, s0, 32 ; SI-NEXT: s_add_u32 s2, s0, 32
; SI-NEXT: s_addc_u32 s3, s1, 0 ; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: v_mov_b32_e32 v16, s3 ; SI-NEXT: v_mov_b32_e32 v16, s3
; SI-NEXT: v_mov_b32_e32 v15, s2 ; SI-NEXT: v_mov_b32_e32 v15, s2
; SI-NEXT: s_add_u32 s2, s0, 16 ; SI-NEXT: s_add_u32 s2, s0, 16
; SI-NEXT: s_addc_u32 s3, s1, 0 ; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: v_mov_b32_e32 v18, s3 ; SI-NEXT: v_mov_b32_e32 v18, s3
; SI-NEXT: v_mov_b32_e32 v17, s2 ; SI-NEXT: v_mov_b32_e32 v17, s2
; SI-NEXT: s_add_u32 s2, s0, 0x70
; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: v_mov_b32_e32 v12, s1 ; SI-NEXT: v_mov_b32_e32 v12, s1
; SI-NEXT: v_mov_b32_e32 v11, s0 ; SI-NEXT: v_mov_b32_e32 v11, s0
; SI-NEXT: s_add_u32 s2, s0, 0x70
; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v7 ; SI-NEXT: v_lshrrev_b32_e32 v8, 16, v7
; SI-NEXT: v_cvt_f32_f16_e32 v7, v7 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v7
; SI-NEXT: v_cvt_f32_f16_e32 v9, v8 ; SI-NEXT: v_cvt_f32_f16_e32 v9, v8
; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f32_f16_e32 v19, v3 ; SI-NEXT: v_cvt_f32_f16_e32 v19, v3
; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v0 ; SI-NEXT: v_lshrrev_b32_e32 v20, 16, v0
; SI-NEXT: v_cvt_f64_f32_e32 v[7:8], v7 ; SI-NEXT: v_cvt_f64_f32_e32 v[7:8], v7
Show All 21 Lines
; SI-NEXT: s_nop 0 ; SI-NEXT: s_nop 0
; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v2 ; SI-NEXT: v_lshrrev_b32_e32 v4, 16, v2
; SI-NEXT: v_cvt_f32_f16_e32 v6, v2 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v2
; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v1 ; SI-NEXT: v_lshrrev_b32_e32 v5, 16, v1
; SI-NEXT: v_cvt_f32_f16_e32 v7, v1 ; SI-NEXT: v_cvt_f32_f16_e32 v7, v1
; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v9 ; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v9
; SI-NEXT: v_cvt_f64_f32_e32 v[2:3], v8 ; SI-NEXT: v_cvt_f64_f32_e32 v[2:3], v8
; SI-NEXT: v_cvt_f32_f16_e32 v8, v10 ; SI-NEXT: v_cvt_f32_f16_e32 v8, v10
; SI-NEXT: v_mov_b32_e32 v14, s3
; SI-NEXT: v_mov_b32_e32 v13, s2
; SI-NEXT: s_add_u32 s2, s0, 0x60
; SI-NEXT: v_cvt_f32_f16_e32 v10, v4 ; SI-NEXT: v_cvt_f32_f16_e32 v10, v4
; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: flat_store_dwordx4 v[11:12], v[0:3] ; SI-NEXT: flat_store_dwordx4 v[11:12], v[0:3]
; SI-NEXT: v_cvt_f32_f16_e32 v12, v5 ; SI-NEXT: s_nop 0
; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v19 ; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v19
; SI-NEXT: v_cvt_f64_f32_e32 v[2:3], v8 ; SI-NEXT: v_cvt_f64_f32_e32 v[2:3], v8
; SI-NEXT: v_mov_b32_e32 v16, s3 ; SI-NEXT: v_cvt_f32_f16_e32 v12, v5
; SI-NEXT: v_mov_b32_e32 v13, s2
; SI-NEXT: s_add_u32 s2, s0, 0x60
; SI-NEXT: v_cvt_f32_f16_e32 v19, v20 ; SI-NEXT: v_cvt_f32_f16_e32 v19, v20
; SI-NEXT: v_mov_b32_e32 v14, s3
; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: v_mov_b32_e32 v15, s2 ; SI-NEXT: v_mov_b32_e32 v15, s2
; SI-NEXT: s_add_u32 s2, s0, 0x50 ; SI-NEXT: s_add_u32 s2, s0, 0x50
; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: v_cvt_f64_f32_e32 v[8:9], v6 ; SI-NEXT: v_cvt_f64_f32_e32 v[8:9], v6
; SI-NEXT: v_cvt_f64_f32_e32 v[10:11], v10 ; SI-NEXT: v_cvt_f64_f32_e32 v[10:11], v10
; SI-NEXT: s_add_u32 s0, s0, 64 ; SI-NEXT: v_mov_b32_e32 v16, s3
; SI-NEXT: s_addc_u32 s3, s1, 0
; SI-NEXT: flat_store_dwordx4 v[13:14], v[0:3] ; SI-NEXT: flat_store_dwordx4 v[13:14], v[0:3]
; SI-NEXT: s_addc_u32 s1, s1, 0 ; SI-NEXT: s_add_u32 s0, s0, 64
; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v7 ; SI-NEXT: v_cvt_f64_f32_e32 v[0:1], v7
; SI-NEXT: v_cvt_f64_f32_e32 v[2:3], v12 ; SI-NEXT: v_cvt_f64_f32_e32 v[2:3], v12
; SI-NEXT: v_cvt_f64_f32_e32 v[4:5], v21 ; SI-NEXT: v_cvt_f64_f32_e32 v[4:5], v21
; SI-NEXT: v_cvt_f64_f32_e32 v[6:7], v19 ; SI-NEXT: v_cvt_f64_f32_e32 v[6:7], v19
; SI-NEXT: s_addc_u32 s1, s1, 0
; SI-NEXT: v_mov_b32_e32 v18, s3 ; SI-NEXT: v_mov_b32_e32 v18, s3
; SI-NEXT: v_mov_b32_e32 v13, s1
; SI-NEXT: v_mov_b32_e32 v17, s2 ; SI-NEXT: v_mov_b32_e32 v17, s2
; SI-NEXT: v_mov_b32_e32 v13, s1
; SI-NEXT: v_mov_b32_e32 v12, s0 ; SI-NEXT: v_mov_b32_e32 v12, s0
; SI-NEXT: flat_store_dwordx4 v[15:16], v[8:11] ; SI-NEXT: flat_store_dwordx4 v[15:16], v[8:11]
; SI-NEXT: flat_store_dwordx4 v[17:18], v[0:3] ; SI-NEXT: flat_store_dwordx4 v[17:18], v[0:3]
; SI-NEXT: flat_store_dwordx4 v[12:13], v[4:7] ; SI-NEXT: flat_store_dwordx4 v[12:13], v[4:7]
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: global_extload_v16f16_to_v16f64: ; VI-LABEL: global_extload_v16f16_to_v16f64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_add_u32 s2, s2, 16 ; VI-NEXT: s_add_u32 s2, s2, 16
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_addc_u32 s3, s3, 0 ; VI-NEXT: s_addc_u32 s3, s3, 0
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: flat_load_dwordx4 v[4:7], v[0:1] ; VI-NEXT: flat_load_dwordx4 v[4:7], v[0:1]
; VI-NEXT: flat_load_dwordx4 v[0:3], v[2:3] ; VI-NEXT: flat_load_dwordx4 v[0:3], v[2:3]
; VI-NEXT: s_add_u32 s2, s0, 48 ; VI-NEXT: s_add_u32 s2, s0, 48
; VI-NEXT: s_addc_u32 s3, s1, 0 ; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v14, s3 ; VI-NEXT: v_mov_b32_e32 v14, s3
; VI-NEXT: v_mov_b32_e32 v13, s2 ; VI-NEXT: v_mov_b32_e32 v13, s2
; VI-NEXT: s_add_u32 s2, s0, 32 ; VI-NEXT: s_add_u32 s2, s0, 32
; VI-NEXT: s_addc_u32 s3, s1, 0 ; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v16, s3 ; VI-NEXT: v_mov_b32_e32 v16, s3
; VI-NEXT: v_mov_b32_e32 v15, s2 ; VI-NEXT: v_mov_b32_e32 v15, s2
; VI-NEXT: s_add_u32 s2, s0, 16 ; VI-NEXT: s_add_u32 s2, s0, 16
; VI-NEXT: s_addc_u32 s3, s1, 0 ; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v18, s3 ; VI-NEXT: v_mov_b32_e32 v18, s3
; VI-NEXT: v_mov_b32_e32 v17, s2 ; VI-NEXT: v_mov_b32_e32 v17, s2
; VI-NEXT: s_add_u32 s2, s0, 0x70
; VI-NEXT: v_mov_b32_e32 v12, s1 ; VI-NEXT: v_mov_b32_e32 v12, s1
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v11, s0 ; VI-NEXT: v_mov_b32_e32 v11, s0
; VI-NEXT: s_add_u32 s2, s0, 0x70
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_cvt_f32_f16_e32 v8, v7 ; VI-NEXT: v_cvt_f32_f16_e32 v8, v7
; VI-NEXT: v_cvt_f32_f16_sdwa v9, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f32_f16_sdwa v9, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f64_f32_e32 v[7:8], v8 ; VI-NEXT: v_cvt_f64_f32_e32 v[7:8], v8
; VI-NEXT: v_cvt_f64_f32_e32 v[9:10], v9 ; VI-NEXT: v_cvt_f64_f32_e32 v[9:10], v9
; VI-NEXT: flat_store_dwordx4 v[13:14], v[7:10] ; VI-NEXT: flat_store_dwordx4 v[13:14], v[7:10]
; VI-NEXT: s_nop 0 ; VI-NEXT: s_nop 0
; VI-NEXT: v_cvt_f32_f16_e32 v7, v6 ; VI-NEXT: v_cvt_f32_f16_e32 v7, v6
; VI-NEXT: v_cvt_f32_f16_sdwa v8, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f32_f16_sdwa v8, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_cvt_f32_f16_e32 v10, v0 ; VI-NEXT: v_cvt_f32_f16_e32 v10, v0
; VI-NEXT: v_mov_b32_e32 v14, s3 ; VI-NEXT: v_mov_b32_e32 v13, s2
; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v7 ; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v7
; VI-NEXT: v_cvt_f64_f32_e32 v[8:9], v8 ; VI-NEXT: v_cvt_f64_f32_e32 v[8:9], v8
; VI-NEXT: flat_store_dwordx4 v[15:16], v[6:9] ; VI-NEXT: flat_store_dwordx4 v[15:16], v[6:9]
; VI-NEXT: s_nop 0 ; VI-NEXT: s_nop 0
; VI-NEXT: v_cvt_f32_f16_e32 v6, v5 ; VI-NEXT: v_cvt_f32_f16_e32 v6, v5
; VI-NEXT: v_cvt_f32_f16_sdwa v7, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f32_f16_sdwa v7, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f32_f16_e32 v8, v4 ; VI-NEXT: v_cvt_f32_f16_e32 v8, v4
; VI-NEXT: v_cvt_f32_f16_sdwa v9, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f32_f16_sdwa v9, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v6 ; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v6
; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v7 ; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v7
; VI-NEXT: flat_store_dwordx4 v[17:18], v[4:7] ; VI-NEXT: flat_store_dwordx4 v[17:18], v[4:7]
; VI-NEXT: s_nop 0 ; VI-NEXT: s_nop 0
; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v8 ; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v8
; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v9 ; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v9
; VI-NEXT: v_cvt_f32_f16_sdwa v8, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f32_f16_sdwa v8, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f32_f16_sdwa v17, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f32_f16_sdwa v17, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f32_f16_e32 v0, v3 ; VI-NEXT: v_cvt_f32_f16_e32 v0, v3
; VI-NEXT: v_mov_b32_e32 v13, s2
; VI-NEXT: s_add_u32 s2, s0, 0x60
; VI-NEXT: flat_store_dwordx4 v[11:12], v[4:7] ; VI-NEXT: flat_store_dwordx4 v[11:12], v[4:7]
; VI-NEXT: s_addc_u32 s3, s1, 0 ; VI-NEXT: v_cvt_f32_f16_sdwa v12, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f64_f32_e32 v[5:6], v8 ; VI-NEXT: v_cvt_f64_f32_e32 v[5:6], v8
; VI-NEXT: v_cvt_f32_f16_e32 v8, v2 ; VI-NEXT: v_cvt_f32_f16_e32 v8, v2
; VI-NEXT: v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 ; VI-NEXT: v_cvt_f32_f16_sdwa v2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f32_f16_e32 v7, v1 ; VI-NEXT: v_cvt_f32_f16_e32 v7, v1
; VI-NEXT: v_cvt_f32_f16_sdwa v12, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
; VI-NEXT: v_cvt_f64_f32_e32 v[3:4], v0 ; VI-NEXT: v_cvt_f64_f32_e32 v[3:4], v0
; VI-NEXT: v_mov_b32_e32 v16, s3 ; VI-NEXT: s_add_u32 s2, s0, 0x60
; VI-NEXT: v_mov_b32_e32 v14, s3
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v15, s2 ; VI-NEXT: v_mov_b32_e32 v15, s2
; VI-NEXT: s_add_u32 s2, s0, 0x50 ; VI-NEXT: s_add_u32 s2, s0, 0x50
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v10 ; VI-NEXT: v_cvt_f64_f32_e32 v[0:1], v10
; VI-NEXT: v_cvt_f64_f32_e32 v[8:9], v8 ; VI-NEXT: v_cvt_f64_f32_e32 v[8:9], v8
; VI-NEXT: v_cvt_f64_f32_e32 v[10:11], v2 ; VI-NEXT: v_cvt_f64_f32_e32 v[10:11], v2
; VI-NEXT: s_add_u32 s0, s0, 64 ; VI-NEXT: v_mov_b32_e32 v16, s3
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: flat_store_dwordx4 v[13:14], v[3:6] ; VI-NEXT: flat_store_dwordx4 v[13:14], v[3:6]
; VI-NEXT: s_addc_u32 s1, s1, 0 ; VI-NEXT: s_add_u32 s0, s0, 64
; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v7 ; VI-NEXT: v_cvt_f64_f32_e32 v[4:5], v7
; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v12 ; VI-NEXT: v_cvt_f64_f32_e32 v[6:7], v12
; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v17 ; VI-NEXT: v_cvt_f64_f32_e32 v[2:3], v17
; VI-NEXT: s_addc_u32 s1, s1, 0
; VI-NEXT: v_mov_b32_e32 v20, s3 ; VI-NEXT: v_mov_b32_e32 v20, s3
; VI-NEXT: v_mov_b32_e32 v13, s1
; VI-NEXT: v_mov_b32_e32 v19, s2 ; VI-NEXT: v_mov_b32_e32 v19, s2
; VI-NEXT: v_mov_b32_e32 v13, s1
; VI-NEXT: v_mov_b32_e32 v12, s0 ; VI-NEXT: v_mov_b32_e32 v12, s0
; VI-NEXT: flat_store_dwordx4 v[15:16], v[8:11] ; VI-NEXT: flat_store_dwordx4 v[15:16], v[8:11]
; VI-NEXT: flat_store_dwordx4 v[19:20], v[4:7] ; VI-NEXT: flat_store_dwordx4 v[19:20], v[4:7]
; VI-NEXT: flat_store_dwordx4 v[12:13], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[12:13], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%val = load <16 x half>, <16 x half> addrspace(1)* %in %val = load <16 x half>, <16 x half> addrspace(1)* %in
%cvt = fpext <16 x half> %val to <16 x double> %cvt = fpext <16 x half> %val to <16 x double>
store <16 x double> %cvt, <16 x double> addrspace(1)* %out store <16 x double> %cvt, <16 x double> addrspace(1)* %out
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; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: v_cvt_f16_f32_e32 v3, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v1
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_cvt_f16_f32_e32 v4, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v0
; SI-NEXT: v_mov_b32_e32 v0, s2 ; SI-NEXT: v_mov_b32_e32 v0, s2
; SI-NEXT: v_mov_b32_e32 v1, s3 ; SI-NEXT: v_mov_b32_e32 v1, s3
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: flat_store_short v[0:1], v2 ; SI-NEXT: flat_store_short v[0:1], v2
; SI-NEXT: v_mov_b32_e32 v0, s0
; SI-NEXT: v_or_b32_e32 v2, v4, v3 ; SI-NEXT: v_or_b32_e32 v2, v4, v3
; SI-NEXT: v_mov_b32_e32 v0, s0
; SI-NEXT: v_mov_b32_e32 v1, s1 ; SI-NEXT: v_mov_b32_e32 v1, s1
; SI-NEXT: flat_store_dword v[0:1], v2 ; SI-NEXT: flat_store_dword v[0:1], v2
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: global_truncstore_v3f32_to_v3f16: ; VI-LABEL: global_truncstore_v3f32_to_v3f16:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_load_dwordx3 v[0:2], v[0:1] ; VI-NEXT: flat_load_dwordx3 v[0:2], v[0:1]
; VI-NEXT: s_add_u32 s2, s0, 4 ; VI-NEXT: s_add_u32 s2, s0, 4
; VI-NEXT: s_addc_u32 s3, s1, 0 ; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_cvt_f16_f32_e32 v2, v2
; VI-NEXT: v_cvt_f16_f32_sdwa v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD ; VI-NEXT: v_cvt_f16_f32_sdwa v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
; VI-NEXT: v_cvt_f16_f32_e32 v4, v0 ; VI-NEXT: v_cvt_f16_f32_e32 v4, v0
; VI-NEXT: v_cvt_f16_f32_e32 v2, v2
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_or_b32_e32 v3, v4, v3
; VI-NEXT: flat_store_short v[0:1], v2 ; VI-NEXT: flat_store_short v[0:1], v2
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_or_b32_e32 v3, v4, v3
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: flat_store_dword v[0:1], v3 ; VI-NEXT: flat_store_dword v[0:1], v3
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%val = load <3 x float>, <3 x float> addrspace(1)* %in %val = load <3 x float>, <3 x float> addrspace(1)* %in
%cvt = fptrunc <3 x float> %val to <3 x half> %cvt = fptrunc <3 x float> %val to <3 x half>
store <3 x half> %cvt, <3 x half> addrspace(1)* %out store <3 x half> %cvt, <3 x half> addrspace(1)* %out
ret void ret void
} }
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} }
define amdgpu_kernel void @global_truncstore_v8f32_to_v8f16(<8 x half> addrspace(1)* %out, <8 x float> addrspace(1)* %in) #0 { define amdgpu_kernel void @global_truncstore_v8f32_to_v8f16(<8 x half> addrspace(1)* %out, <8 x float> addrspace(1)* %in) #0 {
; SI-LABEL: global_truncstore_v8f32_to_v8f16: ; SI-LABEL: global_truncstore_v8f32_to_v8f16:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_add_u32 s4, s2, 16 ; SI-NEXT: s_add_u32 s4, s2, 16
; SI-NEXT: v_mov_b32_e32 v5, s3
; SI-NEXT: s_addc_u32 s5, s3, 0 ; SI-NEXT: s_addc_u32 s5, s3, 0
; SI-NEXT: v_mov_b32_e32 v0, s4 ; SI-NEXT: v_mov_b32_e32 v5, s3
; SI-NEXT: v_mov_b32_e32 v4, s2 ; SI-NEXT: v_mov_b32_e32 v4, s2
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5 ; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; SI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; SI-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; SI-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; SI-NEXT: v_mov_b32_e32 v8, s0 ; SI-NEXT: v_mov_b32_e32 v8, s0
; SI-NEXT: v_mov_b32_e32 v9, s1 ; SI-NEXT: v_mov_b32_e32 v9, s1
; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_waitcnt vmcnt(0)
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; SI-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; SI-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: global_truncstore_v8f32_to_v8f16: ; VI-LABEL: global_truncstore_v8f32_to_v8f16:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s4, s2, 16 ; VI-NEXT: s_add_u32 s4, s2, 16
; VI-NEXT: v_mov_b32_e32 v5, s3
; VI-NEXT: s_addc_u32 s5, s3, 0 ; VI-NEXT: s_addc_u32 s5, s3, 0
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v5, s3
; VI-NEXT: v_mov_b32_e32 v4, s2 ; VI-NEXT: v_mov_b32_e32 v4, s2
; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; VI-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; VI-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; VI-NEXT: v_mov_b32_e32 v8, s0 ; VI-NEXT: v_mov_b32_e32 v8, s0
; VI-NEXT: v_mov_b32_e32 v9, s1 ; VI-NEXT: v_mov_b32_e32 v9, s1
; VI-NEXT: s_waitcnt vmcnt(1) ; VI-NEXT: s_waitcnt vmcnt(1)
; VI-NEXT: v_cvt_f16_f32_sdwa v3, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD ; VI-NEXT: v_cvt_f16_f32_sdwa v3, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
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define amdgpu_kernel void @global_truncstore_v16f32_to_v16f16(<16 x half> addrspace(1)* %out, <16 x float> addrspace(1)* %in) #0 { define amdgpu_kernel void @global_truncstore_v16f32_to_v16f16(<16 x half> addrspace(1)* %out, <16 x float> addrspace(1)* %in) #0 {
; SI-LABEL: global_truncstore_v16f32_to_v16f16: ; SI-LABEL: global_truncstore_v16f32_to_v16f16:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_add_u32 s4, s2, 32 ; SI-NEXT: s_add_u32 s4, s2, 32
; SI-NEXT: s_addc_u32 s5, s3, 0 ; SI-NEXT: s_addc_u32 s5, s3, 0
; SI-NEXT: v_mov_b32_e32 v0, s4 ; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_add_u32 s4, s2, 48 ; SI-NEXT: s_add_u32 s4, s2, 48
; SI-NEXT: v_mov_b32_e32 v13, s3 ; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: s_addc_u32 s5, s3, 0 ; SI-NEXT: s_addc_u32 s5, s3, 0
; SI-NEXT: v_mov_b32_e32 v12, s2 ; SI-NEXT: v_mov_b32_e32 v12, s2
; SI-NEXT: v_mov_b32_e32 v4, s4
; SI-NEXT: s_add_u32 s2, s2, 16 ; SI-NEXT: s_add_u32 s2, s2, 16
; SI-NEXT: v_mov_b32_e32 v13, s3
; SI-NEXT: v_mov_b32_e32 v4, s4
; SI-NEXT: v_mov_b32_e32 v5, s5 ; SI-NEXT: v_mov_b32_e32 v5, s5
; SI-NEXT: s_addc_u32 s3, s3, 0 ; SI-NEXT: s_addc_u32 s3, s3, 0
; SI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; SI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; SI-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; SI-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; SI-NEXT: v_mov_b32_e32 v9, s3 ; SI-NEXT: v_mov_b32_e32 v9, s3
; SI-NEXT: v_mov_b32_e32 v8, s2 ; SI-NEXT: v_mov_b32_e32 v8, s2
; SI-NEXT: flat_load_dwordx4 v[8:11], v[8:9] ; SI-NEXT: flat_load_dwordx4 v[8:11], v[8:9]
; SI-NEXT: flat_load_dwordx4 v[12:15], v[12:13] ; SI-NEXT: flat_load_dwordx4 v[12:15], v[12:13]
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; SI-NEXT: v_cvt_f16_f32_e32 v13, v13 ; SI-NEXT: v_cvt_f16_f32_e32 v13, v13
; SI-NEXT: v_cvt_f16_f32_e32 v11, v11 ; SI-NEXT: v_cvt_f16_f32_e32 v11, v11
; SI-NEXT: v_cvt_f16_f32_e32 v9, v9 ; SI-NEXT: v_cvt_f16_f32_e32 v9, v9
; SI-NEXT: v_cvt_f16_f32_e32 v14, v14 ; SI-NEXT: v_cvt_f16_f32_e32 v14, v14
; SI-NEXT: v_cvt_f16_f32_e32 v12, v12 ; SI-NEXT: v_cvt_f16_f32_e32 v12, v12
; SI-NEXT: v_cvt_f16_f32_e32 v10, v10 ; SI-NEXT: v_cvt_f16_f32_e32 v10, v10
; SI-NEXT: v_cvt_f16_f32_e32 v8, v8 ; SI-NEXT: v_cvt_f16_f32_e32 v8, v8
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_mov_b32_e32 v5, s3
; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v1 ; SI-NEXT: v_lshlrev_b32_e32 v18, 16, v1
; SI-NEXT: v_or_b32_e32 v1, v2, v3 ; SI-NEXT: v_or_b32_e32 v1, v2, v3
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v7 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v7
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v16 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v16
; SI-NEXT: v_mov_b32_e32 v5, s3
; SI-NEXT: v_mov_b32_e32 v4, s2 ; SI-NEXT: v_mov_b32_e32 v4, s2
; SI-NEXT: v_or_b32_e32 v0, v0, v18 ; SI-NEXT: v_or_b32_e32 v0, v0, v18
; SI-NEXT: v_or_b32_e32 v3, v6, v2 ; SI-NEXT: v_or_b32_e32 v3, v6, v2
; SI-NEXT: v_or_b32_e32 v2, v17, v7 ; SI-NEXT: v_or_b32_e32 v2, v17, v7
; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v15 ; SI-NEXT: v_lshlrev_b32_e32 v6, 16, v15
; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v13 ; SI-NEXT: v_lshlrev_b32_e32 v7, 16, v13
; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; SI-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; SI-NEXT: v_lshlrev_b32_e32 v9, 16, v9
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; ;
; VI-LABEL: global_truncstore_v16f32_to_v16f16: ; VI-LABEL: global_truncstore_v16f32_to_v16f16:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s4, s2, 32 ; VI-NEXT: s_add_u32 s4, s2, 32
; VI-NEXT: s_addc_u32 s5, s3, 0 ; VI-NEXT: s_addc_u32 s5, s3, 0
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: s_add_u32 s4, s2, 48 ; VI-NEXT: s_add_u32 s4, s2, 48
; VI-NEXT: v_mov_b32_e32 v13, s3 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: s_addc_u32 s5, s3, 0 ; VI-NEXT: s_addc_u32 s5, s3, 0
; VI-NEXT: v_mov_b32_e32 v12, s2 ; VI-NEXT: v_mov_b32_e32 v12, s2
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: s_add_u32 s2, s2, 16 ; VI-NEXT: s_add_u32 s2, s2, 16
; VI-NEXT: v_mov_b32_e32 v13, s3
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: s_addc_u32 s3, s3, 0 ; VI-NEXT: s_addc_u32 s3, s3, 0
; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; VI-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; VI-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; VI-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; VI-NEXT: v_mov_b32_e32 v9, s3 ; VI-NEXT: v_mov_b32_e32 v9, s3
; VI-NEXT: v_mov_b32_e32 v8, s2 ; VI-NEXT: v_mov_b32_e32 v8, s2
; VI-NEXT: flat_load_dwordx4 v[8:11], v[8:9] ; VI-NEXT: flat_load_dwordx4 v[8:11], v[8:9]
; VI-NEXT: flat_load_dwordx4 v[12:15], v[12:13] ; VI-NEXT: flat_load_dwordx4 v[12:15], v[12:13]
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; SI-NEXT: flat_store_short v[0:1], v2 ; SI-NEXT: flat_store_short v[0:1], v2
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: fadd_f16: ; VI-LABEL: fadd_f16:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: s_load_dword s2, s[4:5], 0x8 ; VI-NEXT: s_load_dword s2, s[4:5], 0x8
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: s_lshr_b32 s3, s2, 16 ; VI-NEXT: s_lshr_b32 s3, s2, 16
; VI-NEXT: v_mov_b32_e32 v0, s3 ; VI-NEXT: v_mov_b32_e32 v0, s3
; VI-NEXT: v_add_f16_e32 v2, s2, v0 ; VI-NEXT: v_add_f16_e32 v2, s2, v0
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: flat_store_short v[0:1], v2 ; VI-NEXT: flat_store_short v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%add = fadd half %a, %b %add = fadd half %a, %b
store half %add, half addrspace(1)* %out, align 4 store half %add, half addrspace(1)* %out, align 4
ret void ret void
} }
define amdgpu_kernel void @fadd_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %a, <2 x half> %b) #0 { define amdgpu_kernel void @fadd_v2f16(<2 x half> addrspace(1)* %out, <2 x half> %a, <2 x half> %b) #0 {
▲ Show 20 Lines • Show All 45 Lines • ▼ Show 20 Lines
} }
define amdgpu_kernel void @fadd_v4f16(<4 x half> addrspace(1)* %out, <4 x half> addrspace(1)* %in) #0 { define amdgpu_kernel void @fadd_v4f16(<4 x half> addrspace(1)* %out, <4 x half> addrspace(1)* %in) #0 {
; SI-LABEL: fadd_v4f16: ; SI-LABEL: fadd_v4f16:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_add_u32 s4, s2, 8 ; SI-NEXT: s_add_u32 s4, s2, 8
; SI-NEXT: v_mov_b32_e32 v0, s2
; SI-NEXT: s_addc_u32 s5, s3, 0 ; SI-NEXT: s_addc_u32 s5, s3, 0
; SI-NEXT: v_mov_b32_e32 v2, s4 ; SI-NEXT: v_mov_b32_e32 v0, s2
; SI-NEXT: v_mov_b32_e32 v1, s3 ; SI-NEXT: v_mov_b32_e32 v1, s3
; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: v_mov_b32_e32 v3, s5 ; SI-NEXT: v_mov_b32_e32 v3, s5
; SI-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; SI-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; SI-NEXT: flat_load_dwordx2 v[2:3], v[2:3] ; SI-NEXT: flat_load_dwordx2 v[2:3], v[2:3]
; SI-NEXT: v_mov_b32_e32 v4, s0 ; SI-NEXT: v_mov_b32_e32 v4, s0
; SI-NEXT: v_mov_b32_e32 v5, s1 ; SI-NEXT: v_mov_b32_e32 v5, s1
; SI-NEXT: s_waitcnt vmcnt(1) ; SI-NEXT: s_waitcnt vmcnt(1)
; SI-NEXT: v_cvt_f32_f16_e32 v6, v0 ; SI-NEXT: v_cvt_f32_f16_e32 v6, v0
; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; SI-NEXT: v_lshrrev_b32_e32 v0, 16, v0
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; SI-NEXT: flat_store_dwordx2 v[4:5], v[0:1] ; SI-NEXT: flat_store_dwordx2 v[4:5], v[0:1]
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: fadd_v4f16: ; VI-LABEL: fadd_v4f16:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s4, s2, 8 ; VI-NEXT: s_add_u32 s4, s2, 8
; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: s_addc_u32 s5, s3, 0 ; VI-NEXT: s_addc_u32 s5, s3, 0
; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v3, s5 ; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; VI-NEXT: flat_load_dwordx2 v[2:3], v[2:3] ; VI-NEXT: flat_load_dwordx2 v[2:3], v[2:3]
; VI-NEXT: v_mov_b32_e32 v4, s0 ; VI-NEXT: v_mov_b32_e32 v4, s0
; VI-NEXT: v_mov_b32_e32 v5, s1 ; VI-NEXT: v_mov_b32_e32 v5, s1
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_f16_sdwa v6, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; VI-NEXT: v_add_f16_sdwa v6, v1, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; VI-NEXT: v_add_f16_e32 v1, v1, v3 ; VI-NEXT: v_add_f16_e32 v1, v1, v3
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; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4 ; SI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x4
; SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x8 ; SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x8
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_lshr_b32 s10, s0, 16 ; SI-NEXT: s_lshr_b32 s10, s0, 16
; SI-NEXT: v_cvt_f32_f16_e32 v4, s0 ; SI-NEXT: v_cvt_f32_f16_e32 v4, s0
; SI-NEXT: s_lshr_b32 s0, s4, 16 ; SI-NEXT: s_lshr_b32 s0, s4, 16
; SI-NEXT: v_cvt_f32_f16_e32 v8, s0 ; SI-NEXT: v_cvt_f32_f16_e32 v8, s0
; SI-NEXT: s_lshr_b32 s0, s5, 16 ; SI-NEXT: s_lshr_b32 s0, s5, 16
; SI-NEXT: s_lshr_b32 s11, s1, 16
; SI-NEXT: v_cvt_f32_f16_e32 v0, s10 ; SI-NEXT: v_cvt_f32_f16_e32 v0, s10
; SI-NEXT: s_lshr_b32 s10, s2, 16 ; SI-NEXT: s_lshr_b32 s10, s2, 16
; SI-NEXT: v_cvt_f32_f16_e32 v9, s0 ; SI-NEXT: v_cvt_f32_f16_e32 v9, s0
; SI-NEXT: s_lshr_b32 s0, s6, 16 ; SI-NEXT: s_lshr_b32 s0, s6, 16
; SI-NEXT: v_cvt_f32_f16_e32 v1, s11 ; SI-NEXT: s_lshr_b32 s11, s1, 16
; SI-NEXT: v_cvt_f32_f16_e32 v2, s10 ; SI-NEXT: v_cvt_f32_f16_e32 v2, s10
; SI-NEXT: s_lshr_b32 s10, s3, 16 ; SI-NEXT: s_lshr_b32 s10, s3, 16
; SI-NEXT: v_cvt_f32_f16_e32 v10, s0 ; SI-NEXT: v_cvt_f32_f16_e32 v10, s0
; SI-NEXT: s_lshr_b32 s0, s7, 16 ; SI-NEXT: s_lshr_b32 s0, s7, 16
; SI-NEXT: v_cvt_f32_f16_e32 v1, s11
; SI-NEXT: v_cvt_f32_f16_e32 v3, s10 ; SI-NEXT: v_cvt_f32_f16_e32 v3, s10
; SI-NEXT: v_cvt_f32_f16_e32 v5, s1
; SI-NEXT: v_cvt_f32_f16_e32 v11, s0 ; SI-NEXT: v_cvt_f32_f16_e32 v11, s0
; SI-NEXT: v_cvt_f32_f16_e32 v12, s4 ; SI-NEXT: v_cvt_f32_f16_e32 v5, s1
; SI-NEXT: v_cvt_f32_f16_e32 v13, s5
; SI-NEXT: v_cvt_f32_f16_e32 v6, s2 ; SI-NEXT: v_cvt_f32_f16_e32 v6, s2
; SI-NEXT: v_cvt_f32_f16_e32 v7, s3 ; SI-NEXT: v_cvt_f32_f16_e32 v7, s3
; SI-NEXT: v_cvt_f32_f16_e32 v12, s4
; SI-NEXT: v_cvt_f32_f16_e32 v13, s5
; SI-NEXT: v_cvt_f32_f16_e32 v14, s7 ; SI-NEXT: v_cvt_f32_f16_e32 v14, s7
; SI-NEXT: v_cvt_f32_f16_e32 v15, s6 ; SI-NEXT: v_cvt_f32_f16_e32 v15, s6
; SI-NEXT: v_add_f32_e32 v1, v1, v9
; SI-NEXT: v_add_f32_e32 v0, v0, v8
; SI-NEXT: v_add_f32_e32 v3, v3, v11 ; SI-NEXT: v_add_f32_e32 v3, v3, v11
; SI-NEXT: v_add_f32_e32 v2, v2, v10 ; SI-NEXT: v_add_f32_e32 v2, v2, v10
; SI-NEXT: v_cvt_f16_f32_e32 v1, v1 ; SI-NEXT: v_add_f32_e32 v1, v1, v9
; SI-NEXT: v_add_f32_e32 v5, v5, v13 ; SI-NEXT: v_add_f32_e32 v0, v0, v8
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v4, v4, v12
; SI-NEXT: v_cvt_f16_f32_e32 v3, v3 ; SI-NEXT: v_cvt_f16_f32_e32 v3, v3
; SI-NEXT: v_add_f32_e32 v7, v7, v14 ; SI-NEXT: v_add_f32_e32 v7, v7, v14
; SI-NEXT: v_cvt_f16_f32_e32 v2, v2 ; SI-NEXT: v_cvt_f16_f32_e32 v2, v2
; SI-NEXT: v_add_f32_e32 v6, v6, v15 ; SI-NEXT: v_add_f32_e32 v6, v6, v15
; SI-NEXT: v_cvt_f16_f32_e32 v5, v5 ; SI-NEXT: v_cvt_f16_f32_e32 v1, v1
; SI-NEXT: v_cvt_f16_f32_e32 v4, v4 ; SI-NEXT: v_add_f32_e32 v5, v5, v13
; SI-NEXT: v_cvt_f16_f32_e32 v0, v0
; SI-NEXT: v_add_f32_e32 v4, v4, v12
; SI-NEXT: v_cvt_f16_f32_e32 v7, v7 ; SI-NEXT: v_cvt_f16_f32_e32 v7, v7
; SI-NEXT: v_cvt_f16_f32_e32 v6, v6 ; SI-NEXT: v_cvt_f16_f32_e32 v6, v6
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; SI-NEXT: v_cvt_f16_f32_e32 v5, v5
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; SI-NEXT: v_cvt_f16_f32_e32 v4, v4
; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; SI-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; SI-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; SI-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; SI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; SI-NEXT: v_or_b32_e32 v3, v7, v3
; SI-NEXT: v_or_b32_e32 v2, v6, v2
; SI-NEXT: v_or_b32_e32 v1, v5, v1 ; SI-NEXT: v_or_b32_e32 v1, v5, v1
; SI-NEXT: v_or_b32_e32 v0, v4, v0 ; SI-NEXT: v_or_b32_e32 v0, v4, v0
; SI-NEXT: v_mov_b32_e32 v4, s8 ; SI-NEXT: v_mov_b32_e32 v4, s8
; SI-NEXT: v_or_b32_e32 v3, v7, v3
; SI-NEXT: v_or_b32_e32 v2, v6, v2
; SI-NEXT: v_mov_b32_e32 v5, s9 ; SI-NEXT: v_mov_b32_e32 v5, s9
; SI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; SI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: fadd_v8f16: ; VI-LABEL: fadd_v8f16:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[8:9], s[4:5], 0x0
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x10
; VI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x20 ; VI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x20
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v5, s9
; VI-NEXT: s_lshr_b32 s11, s3, 16 ; VI-NEXT: s_lshr_b32 s11, s3, 16
; VI-NEXT: s_lshr_b32 s10, s7, 16 ; VI-NEXT: s_lshr_b32 s10, s7, 16
; VI-NEXT: v_mov_b32_e32 v0, s10 ; VI-NEXT: v_mov_b32_e32 v0, s10
; VI-NEXT: v_mov_b32_e32 v1, s11 ; VI-NEXT: v_mov_b32_e32 v1, s11
; VI-NEXT: v_add_f16_sdwa v0, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_sdwa v0, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_mov_b32_e32 v1, s7 ; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: v_add_f16_e32 v1, s3, v1 ; VI-NEXT: v_add_f16_e32 v1, s3, v1
; VI-NEXT: s_lshr_b32 s3, s6, 16 ; VI-NEXT: s_lshr_b32 s3, s6, 16
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; VI-NEXT: v_or_b32_e32 v1, v1, v0 ; VI-NEXT: v_or_b32_e32 v1, v1, v0
; VI-NEXT: v_mov_b32_e32 v0, s1 ; VI-NEXT: v_mov_b32_e32 v0, s1
; VI-NEXT: v_mov_b32_e32 v4, s2 ; VI-NEXT: v_mov_b32_e32 v4, s2
; VI-NEXT: v_add_f16_sdwa v0, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; VI-NEXT: v_add_f16_sdwa v0, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; VI-NEXT: v_mov_b32_e32 v4, s4 ; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_add_f16_e32 v4, s0, v4 ; VI-NEXT: v_add_f16_e32 v4, s0, v4
; VI-NEXT: v_or_b32_e32 v0, v4, v0 ; VI-NEXT: v_or_b32_e32 v0, v4, v0
; VI-NEXT: v_mov_b32_e32 v4, s8 ; VI-NEXT: v_mov_b32_e32 v4, s8
; VI-NEXT: v_mov_b32_e32 v5, s9
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%add = fadd <8 x half> %a, %b %add = fadd <8 x half> %a, %b
store <8 x half> %add, <8 x half> addrspace(1)* %out, align 32 store <8 x half> %add, <8 x half> addrspace(1)* %out, align 32
ret void ret void
} }
define amdgpu_kernel void @test_bitcast_from_half(half addrspace(1)* %in, i16 addrspace(1)* %out) #0 { define amdgpu_kernel void @test_bitcast_from_half(half addrspace(1)* %in, i16 addrspace(1)* %out) #0 {
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llvm/test/CodeGen/AMDGPU/idot4s.ll

Show First 20 Lines • Show All 441 Lines • ▼ Show 20 Lines
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: v_add_u32_e32 v0, vcc, s4, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, s4, v2
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_dword v4, v[0:1] ; GFX8-NEXT: flat_load_dword v4, v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_add_u32_e32 v0, vcc, s6, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, s6, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_ubyte v5, v[2:3] ; GFX8-NEXT: flat_load_ubyte v5, v[2:3]
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_waitcnt vmcnt(2) ; GFX8-NEXT: s_waitcnt vmcnt(2)
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v4
; GFX8-NEXT: v_lshrrev_b32_e32 v1, 16, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v1, 16, v4
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v4
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llvm/test/CodeGen/AMDGPU/idot4u.ll

Show First 20 Lines • Show All 424 Lines • ▼ Show 20 Lines
; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: v_add_u32_e32 v0, vcc, s4, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, s4, v2
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_dword v4, v[0:1] ; GFX8-NEXT: flat_load_dword v4, v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_add_u32_e32 v0, vcc, s6, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, s6, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_ubyte v5, v[2:3] ; GFX8-NEXT: flat_load_ubyte v5, v[2:3]
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_waitcnt vmcnt(2) ; GFX8-NEXT: s_waitcnt vmcnt(2)
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v4
; GFX8-NEXT: v_lshrrev_b32_e32 v1, 16, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v1, 16, v4
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v4
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; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: v_add_u32_e32 v0, vcc, s4, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, s4, v2
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_dword v4, v[0:1] ; GFX8-NEXT: flat_load_dword v4, v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_add_u32_e32 v0, vcc, s6, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, s6, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_ubyte v5, v[2:3] ; GFX8-NEXT: flat_load_ubyte v5, v[2:3]
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_waitcnt vmcnt(2) ; GFX8-NEXT: s_waitcnt vmcnt(2)
; GFX8-NEXT: v_lshrrev_b32_e32 v1, 8, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v1, 8, v4
; GFX8-NEXT: s_waitcnt vmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v0
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; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 2, v0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: v_add_u32_e32 v0, vcc, s4, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, s4, v2
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_dword v4, v[0:1] ; GFX8-NEXT: flat_load_dword v4, v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_add_u32_e32 v0, vcc, s6, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, s6, v2
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_ubyte v5, v[2:3] ; GFX8-NEXT: flat_load_ubyte v5, v[2:3]
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_waitcnt vmcnt(2) ; GFX8-NEXT: s_waitcnt vmcnt(2)
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v4
; GFX8-NEXT: v_lshrrev_b32_e32 v1, 16, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v1, 16, v4
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v4
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; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: v_add_u32_e32 v0, vcc, s4, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, s4, v2
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: flat_load_dword v4, v[0:1] ; GFX8-NEXT: flat_load_dword v4, v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v1, s7 ; GFX8-NEXT: v_mov_b32_e32 v1, s7
; GFX8-NEXT: v_add_u32_e32 v0, vcc, s6, v2 ; GFX8-NEXT: v_add_u32_e32 v0, vcc, s6, v2
; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; GFX8-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: flat_load_ushort v10, v[2:3] ; GFX8-NEXT: flat_load_ushort v10, v[2:3]
; GFX8-NEXT: s_waitcnt vmcnt(2) ; GFX8-NEXT: s_waitcnt vmcnt(2)
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v4
; GFX8-NEXT: v_and_b32_e32 v7, s2, v7 ; GFX8-NEXT: v_and_b32_e32 v7, s2, v7
; GFX8-NEXT: v_bfe_i32 v1, v4, 0, 8 ; GFX8-NEXT: v_bfe_i32 v1, v4, 0, 8
; GFX8-NEXT: v_and_b32_sdwa v9, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v9, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v4
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llvm/test/CodeGen/AMDGPU/insert_vector_elt.ll

Show First 20 Lines • Show All 162 Lines • ▼ Show 20 Lines
; SI-LABEL: insertelement_v4f32_1: ; SI-LABEL: insertelement_v4f32_1:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x4 ; SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x4
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s5, 0x40a00000 ; SI-NEXT: s_mov_b32 s5, 0x40a00000
; SI-NEXT: s_mov_b32 s3, 0x100f000 ; SI-NEXT: s_mov_b32 s3, 0x100f000
; SI-NEXT: s_mov_b32 s2, -1 ; SI-NEXT: s_mov_b32 s2, -1
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5 ; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v2, s6 ; SI-NEXT: v_mov_b32_e32 v2, s6
; SI-NEXT: v_mov_b32_e32 v3, s7 ; SI-NEXT: v_mov_b32_e32 v3, s7
; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: insertelement_v4f32_1: ; VI-LABEL: insertelement_v4f32_1:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x10 ; VI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x10
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s5, 0x40a00000 ; VI-NEXT: s_mov_b32 s5, 0x40a00000
; VI-NEXT: s_mov_b32 s3, 0x1100f000 ; VI-NEXT: s_mov_b32 s3, 0x1100f000
; VI-NEXT: s_mov_b32 s2, -1 ; VI-NEXT: s_mov_b32 s2, -1
; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_mov_b32_e32 v2, s6 ; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_mov_b32_e32 v3, s7 ; VI-NEXT: v_mov_b32_e32 v3, s7
; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 1 %vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 1
store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16 store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16
ret void ret void
} }
define amdgpu_kernel void @insertelement_v4f32_2(<4 x float> addrspace(1)* %out, <4 x float> %a) nounwind { define amdgpu_kernel void @insertelement_v4f32_2(<4 x float> addrspace(1)* %out, <4 x float> %a) nounwind {
; SI-LABEL: insertelement_v4f32_2: ; SI-LABEL: insertelement_v4f32_2:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x4 ; SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x4
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s6, 0x40a00000 ; SI-NEXT: s_mov_b32 s6, 0x40a00000
; SI-NEXT: s_mov_b32 s3, 0x100f000 ; SI-NEXT: s_mov_b32 s3, 0x100f000
; SI-NEXT: s_mov_b32 s2, -1 ; SI-NEXT: s_mov_b32 s2, -1
; SI-NEXT: v_mov_b32_e32 v2, s6
; SI-NEXT: v_mov_b32_e32 v0, s4 ; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5 ; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: v_mov_b32_e32 v2, s6
; SI-NEXT: v_mov_b32_e32 v3, s7 ; SI-NEXT: v_mov_b32_e32 v3, s7
; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: insertelement_v4f32_2: ; VI-LABEL: insertelement_v4f32_2:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x10 ; VI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x10
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s6, 0x40a00000 ; VI-NEXT: s_mov_b32 s6, 0x40a00000
; VI-NEXT: s_mov_b32 s3, 0x1100f000 ; VI-NEXT: s_mov_b32 s3, 0x1100f000
; VI-NEXT: s_mov_b32 s2, -1 ; VI-NEXT: s_mov_b32 s2, -1
; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_mov_b32_e32 v3, s7 ; VI-NEXT: v_mov_b32_e32 v3, s7
; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 2 %vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 2
store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16 store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16
ret void ret void
} }
define amdgpu_kernel void @insertelement_v4f32_3(<4 x float> addrspace(1)* %out, <4 x float> %a) nounwind { define amdgpu_kernel void @insertelement_v4f32_3(<4 x float> addrspace(1)* %out, <4 x float> %a) nounwind {
; SI-LABEL: insertelement_v4f32_3: ; SI-LABEL: insertelement_v4f32_3:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; SI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x4 ; SI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x4
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b32 s7, 0x40a00000 ; SI-NEXT: s_mov_b32 s7, 0x40a00000
; SI-NEXT: s_mov_b32 s3, 0x100f000 ; SI-NEXT: s_mov_b32 s3, 0x100f000
; SI-NEXT: s_mov_b32 s2, -1 ; SI-NEXT: s_mov_b32 s2, -1
; SI-NEXT: v_mov_b32_e32 v3, s7
; SI-NEXT: v_mov_b32_e32 v0, s4 ; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5 ; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: v_mov_b32_e32 v2, s6 ; SI-NEXT: v_mov_b32_e32 v2, s6
; SI-NEXT: v_mov_b32_e32 v3, s7
; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: insertelement_v4f32_3: ; VI-LABEL: insertelement_v4f32_3:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; VI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x10 ; VI-NEXT: s_load_dwordx4 s[4:7], s[4:5], 0x10
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_mov_b32 s7, 0x40a00000 ; VI-NEXT: s_mov_b32 s7, 0x40a00000
; VI-NEXT: s_mov_b32 s3, 0x1100f000 ; VI-NEXT: s_mov_b32 s3, 0x1100f000
; VI-NEXT: s_mov_b32 s2, -1 ; VI-NEXT: s_mov_b32 s2, -1
; VI-NEXT: v_mov_b32_e32 v3, s7
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: v_mov_b32_e32 v2, s6 ; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_mov_b32_e32 v3, s7
; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; VI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 3 %vecins = insertelement <4 x float> %a, float 5.000000e+00, i32 3
store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16 store <4 x float> %vecins, <4 x float> addrspace(1)* %out, align 16
ret void ret void
} }
define amdgpu_kernel void @insertelement_v4i32_0(<4 x i32> addrspace(1)* %out, <4 x i32> %a) nounwind { define amdgpu_kernel void @insertelement_v4i32_0(<4 x i32> addrspace(1)* %out, <4 x i32> %a) nounwind {
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; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b64 vcc, vcc ; SI-NEXT: s_mov_b64 vcc, vcc
; SI-NEXT: s_cbranch_vccz BB30_3 ; SI-NEXT: s_cbranch_vccz BB30_3
; SI-NEXT: s_branch BB30_4 ; SI-NEXT: s_branch BB30_4
; SI-NEXT: BB30_2: ; SI-NEXT: BB30_2:
; SI-NEXT: BB30_3: ; %if ; SI-NEXT: BB30_3: ; %if
; SI-NEXT: s_load_dword s7, s[2:3], 0x0 ; SI-NEXT: s_load_dword s7, s[2:3], 0x0
; SI-NEXT: BB30_4: ; %endif ; SI-NEXT: BB30_4: ; %endif
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_mov_b32_e32 v0, s6
; SI-NEXT: s_mov_b32 s3, 0x100f000 ; SI-NEXT: s_mov_b32 s3, 0x100f000
; SI-NEXT: s_mov_b32 s2, -1 ; SI-NEXT: s_mov_b32 s2, -1
; SI-NEXT: v_mov_b32_e32 v0, s6
; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: v_mov_b32_e32 v1, s7 ; SI-NEXT: v_mov_b32_e32 v1, s7
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: insert_split_bb: ; VI-LABEL: insert_split_bb:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dword s6, s[4:5], 0x10 ; VI-NEXT: s_load_dword s6, s[4:5], 0x10
; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; VI-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_cmp_lg_u32 s6, 0 ; VI-NEXT: s_cmp_lg_u32 s6, 0
; VI-NEXT: s_cbranch_scc0 BB30_2 ; VI-NEXT: s_cbranch_scc0 BB30_2
; VI-NEXT: ; %bb.1: ; %else ; VI-NEXT: ; %bb.1: ; %else
; VI-NEXT: s_load_dword s7, s[2:3], 0x4 ; VI-NEXT: s_load_dword s7, s[2:3], 0x4
; VI-NEXT: s_cbranch_execz BB30_3 ; VI-NEXT: s_cbranch_execz BB30_3
; VI-NEXT: s_branch BB30_4 ; VI-NEXT: s_branch BB30_4
; VI-NEXT: BB30_2: ; VI-NEXT: BB30_2:
; VI-NEXT: BB30_3: ; %if ; VI-NEXT: BB30_3: ; %if
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_load_dword s7, s[2:3], 0x0 ; VI-NEXT: s_load_dword s7, s[2:3], 0x0
; VI-NEXT: BB30_4: ; %endif ; VI-NEXT: BB30_4: ; %endif
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s6
; VI-NEXT: s_mov_b32 s3, 0x1100f000 ; VI-NEXT: s_mov_b32 s3, 0x1100f000
; VI-NEXT: s_mov_b32 s2, -1 ; VI-NEXT: s_mov_b32 s2, -1
; VI-NEXT: v_mov_b32_e32 v0, s6
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s7 ; VI-NEXT: v_mov_b32_e32 v1, s7
; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; VI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
entry: entry:
%0 = insertelement <2 x i32> undef, i32 %a, i32 0 %0 = insertelement <2 x i32> undef, i32 %a, i32 0
%1 = icmp eq i32 %a, 0 %1 = icmp eq i32 %a, 0
br i1 %1, label %if, label %else br i1 %1, label %if, label %else
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llvm/test/CodeGen/AMDGPU/kernel-args.ll

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; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: v2i32_arg: ; VI-LABEL: v2i32_arg:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v2i32_arg: ; GFX9-LABEL: v2i32_arg:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: v2f32_arg: ; VI-LABEL: v2f32_arg:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v2f32_arg: ; GFX9-LABEL: v2f32_arg:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; ;
; VI-LABEL: v3i16_arg: ; VI-LABEL: v3i16_arg:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s4, s2, 4 ; VI-NEXT: s_add_u32 s4, s2, 4
; VI-NEXT: s_addc_u32 s5, s3, 0 ; VI-NEXT: s_addc_u32 s5, s3, 0
; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v4, s1 ; VI-NEXT: v_mov_b32_e32 v4, s1
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v3, s5 ; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_mov_b32_e32 v5, s0 ; VI-NEXT: v_mov_b32_e32 v5, s0
; VI-NEXT: flat_store_short v[2:3], v4 ; VI-NEXT: flat_store_short v[2:3], v4
; VI-NEXT: flat_store_dword v[0:1], v5 ; VI-NEXT: flat_store_dword v[0:1], v5
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v3i16_arg: ; GFX9-LABEL: v3i16_arg:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
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; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: v4i16_arg: ; VI-LABEL: v4i16_arg:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v4i16_arg: ; GFX9-LABEL: v4i16_arg:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: v4i32_arg: ; VI-LABEL: v4i32_arg:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x34
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v4, s4 ; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v4i32_arg: ; GFX9-LABEL: v4i32_arg:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
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; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: v4f32_arg: ; VI-LABEL: v4f32_arg:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x34
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v4, s4 ; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v4f32_arg: ; GFX9-LABEL: v4f32_arg:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
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; ;
; VI-LABEL: v5i8_arg: ; VI-LABEL: v5i8_arg:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dword s4, s[0:1], 0x2c ; VI-NEXT: s_load_dword s4, s[0:1], 0x2c
; VI-NEXT: s_load_dword s1, s[0:1], 0x30 ; VI-NEXT: s_load_dword s1, s[0:1], 0x30
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s0, s2, 4 ; VI-NEXT: s_add_u32 s0, s2, 4
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: v_mov_b32_e32 v4, s1 ; VI-NEXT: v_mov_b32_e32 v4, s1
; VI-NEXT: s_addc_u32 s1, s3, 0 ; VI-NEXT: s_addc_u32 s1, s3, 0
; VI-NEXT: v_mov_b32_e32 v3, s1 ; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_byte v[2:3], v4 ; VI-NEXT: flat_store_byte v[2:3], v4
; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v5i8_arg: ; GFX9-LABEL: v5i8_arg:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
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; ;
; VI-LABEL: v5i16_arg: ; VI-LABEL: v5i16_arg:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
; VI-NEXT: s_load_dword s1, s[0:1], 0x3c ; VI-NEXT: s_load_dword s1, s[0:1], 0x3c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s0, s2, 8 ; VI-NEXT: s_add_u32 s0, s2, 8
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: v_mov_b32_e32 v4, s1 ; VI-NEXT: v_mov_b32_e32 v4, s1
; VI-NEXT: s_addc_u32 s1, s3, 0 ; VI-NEXT: s_addc_u32 s1, s3, 0
; VI-NEXT: v_mov_b32_e32 v3, s1 ; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_short v[2:3], v4 ; VI-NEXT: flat_store_short v[2:3], v4
; VI-NEXT: v_mov_b32_e32 v2, s4 ; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_mov_b32_e32 v3, s5 ; VI-NEXT: v_mov_b32_e32 v3, s5
; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v5i16_arg: ; GFX9-LABEL: v5i16_arg:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x10 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x10
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; ;
; VI-LABEL: v5i32_arg: ; VI-LABEL: v5i32_arg:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x44 ; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x44
; VI-NEXT: s_load_dword s1, s[0:1], 0x54 ; VI-NEXT: s_load_dword s1, s[0:1], 0x54
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s0, s2, 16 ; VI-NEXT: s_add_u32 s0, s2, 16
; VI-NEXT: v_mov_b32_e32 v5, s3 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v2, s1 ; VI-NEXT: v_mov_b32_e32 v2, s1
; VI-NEXT: s_addc_u32 s1, s3, 0 ; VI-NEXT: s_addc_u32 s1, s3, 0
; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v5, s3
; VI-NEXT: v_mov_b32_e32 v4, s2
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_mov_b32_e32 v4, s2
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: v_mov_b32_e32 v2, s6 ; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_mov_b32_e32 v3, s7 ; VI-NEXT: v_mov_b32_e32 v3, s7
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v5i32_arg: ; GFX9-LABEL: v5i32_arg:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
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; ;
; VI-LABEL: v5f32_arg: ; VI-LABEL: v5f32_arg:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x44 ; VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x44
; VI-NEXT: s_load_dword s1, s[0:1], 0x54 ; VI-NEXT: s_load_dword s1, s[0:1], 0x54
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_add_u32 s0, s2, 16 ; VI-NEXT: s_add_u32 s0, s2, 16
; VI-NEXT: v_mov_b32_e32 v5, s3 ; VI-NEXT: v_mov_b32_e32 v1, s0
; VI-NEXT: v_mov_b32_e32 v3, s1 ; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: s_addc_u32 s1, s3, 0 ; VI-NEXT: s_addc_u32 s1, s3, 0
; VI-NEXT: v_mov_b32_e32 v2, s1 ; VI-NEXT: v_mov_b32_e32 v2, s1
; VI-NEXT: v_mov_b32_e32 v1, s0
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: flat_store_dword v[1:2], v3 ; VI-NEXT: flat_store_dword v[1:2], v3
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: v_mov_b32_e32 v2, s6 ; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_mov_b32_e32 v3, s7 ; VI-NEXT: v_mov_b32_e32 v3, s7
; VI-NEXT: v_mov_b32_e32 v5, s3
; VI-NEXT: v_mov_b32_e32 v4, s2 ; VI-NEXT: v_mov_b32_e32 v4, s2
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v5f32_arg: ; GFX9-LABEL: v5f32_arg:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0
; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x20 ; GFX9-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x20
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; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x64 ; VI-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x64
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x84 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x84
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s8 ; VI-NEXT: v_mov_b32_e32 v0, s8
; VI-NEXT: s_add_u32 s8, s2, 16 ; VI-NEXT: s_add_u32 s8, s2, 16
; VI-NEXT: v_mov_b32_e32 v1, s9 ; VI-NEXT: v_mov_b32_e32 v1, s9
; VI-NEXT: s_addc_u32 s9, s3, 0 ; VI-NEXT: s_addc_u32 s9, s3, 0
; VI-NEXT: v_mov_b32_e32 v4, s8
; VI-NEXT: v_mov_b32_e32 v2, s10 ; VI-NEXT: v_mov_b32_e32 v2, s10
; VI-NEXT: v_mov_b32_e32 v3, s11 ; VI-NEXT: v_mov_b32_e32 v3, s11
; VI-NEXT: v_mov_b32_e32 v4, s8
; VI-NEXT: v_mov_b32_e32 v5, s9 ; VI-NEXT: v_mov_b32_e32 v5, s9
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: v_mov_b32_e32 v5, s3 ; VI-NEXT: v_mov_b32_e32 v4, s2
; VI-NEXT: s_add_u32 s2, s2, 32
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: v_mov_b32_e32 v2, s6 ; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_mov_b32_e32 v3, s7 ; VI-NEXT: v_mov_b32_e32 v3, s7
; VI-NEXT: v_mov_b32_e32 v4, s2 ; VI-NEXT: v_mov_b32_e32 v5, s3
; VI-NEXT: s_add_u32 s2, s2, 32
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_addc_u32 s3, s3, 0 ; VI-NEXT: s_addc_u32 s3, s3, 0
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_nop 0
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v5i64_arg: ; GFX9-LABEL: v5i64_arg:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x40 ; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x40
; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0
▲ Show 20 Lines • Show All 110 Lines • ▼ Show 20 Lines
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x64 ; VI-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x64
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x84 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x84
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s8 ; VI-NEXT: v_mov_b32_e32 v0, s8
; VI-NEXT: s_add_u32 s8, s2, 16 ; VI-NEXT: s_add_u32 s8, s2, 16
; VI-NEXT: v_mov_b32_e32 v1, s9 ; VI-NEXT: v_mov_b32_e32 v1, s9
; VI-NEXT: s_addc_u32 s9, s3, 0 ; VI-NEXT: s_addc_u32 s9, s3, 0
; VI-NEXT: v_mov_b32_e32 v4, s8
; VI-NEXT: v_mov_b32_e32 v2, s10 ; VI-NEXT: v_mov_b32_e32 v2, s10
; VI-NEXT: v_mov_b32_e32 v3, s11 ; VI-NEXT: v_mov_b32_e32 v3, s11
; VI-NEXT: v_mov_b32_e32 v4, s8
; VI-NEXT: v_mov_b32_e32 v5, s9 ; VI-NEXT: v_mov_b32_e32 v5, s9
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: v_mov_b32_e32 v5, s3 ; VI-NEXT: v_mov_b32_e32 v4, s2
; VI-NEXT: s_add_u32 s2, s2, 32
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: v_mov_b32_e32 v2, s6 ; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_mov_b32_e32 v3, s7 ; VI-NEXT: v_mov_b32_e32 v3, s7
; VI-NEXT: v_mov_b32_e32 v4, s2 ; VI-NEXT: v_mov_b32_e32 v5, s3
; VI-NEXT: s_add_u32 s2, s2, 32
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_addc_u32 s3, s3, 0 ; VI-NEXT: s_addc_u32 s3, s3, 0
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_nop 0
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; VI-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v5f64_arg: ; GFX9-LABEL: v5f64_arg:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x40 ; GFX9-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x40
; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx2 s[6:7], s[4:5], 0x0
▲ Show 20 Lines • Show All 94 Lines • ▼ Show 20 Lines
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: v8i8_arg: ; VI-LABEL: v8i8_arg:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v8i8_arg: ; GFX9-LABEL: v8i8_arg:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
▲ Show 20 Lines • Show All 236 Lines • ▼ Show 20 Lines
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: v8i16_arg: ; VI-LABEL: v8i16_arg:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x34
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v4, s4 ; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v8i16_arg: ; GFX9-LABEL: v8i16_arg:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
▲ Show 20 Lines • Show All 239 Lines • ▼ Show 20 Lines
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0x24
; VI-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x44 ; VI-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x44
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: s_add_u32 s4, s8, 16 ; VI-NEXT: s_add_u32 s4, s8, 16
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: s_addc_u32 s5, s9, 0 ; VI-NEXT: s_addc_u32 s5, s9, 0
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v2, s6 ; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_mov_b32_e32 v3, s7 ; VI-NEXT: v_mov_b32_e32 v3, s7
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: v_mov_b32_e32 v4, s8 ; VI-NEXT: v_mov_b32_e32 v4, s8
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: v_mov_b32_e32 v5, s9 ; VI-NEXT: v_mov_b32_e32 v5, s9
▲ Show 20 Lines • Show All 92 Lines • ▼ Show 20 Lines
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0x24
; VI-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x44 ; VI-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x44
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: s_add_u32 s4, s8, 16 ; VI-NEXT: s_add_u32 s4, s8, 16
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: s_addc_u32 s5, s9, 0 ; VI-NEXT: s_addc_u32 s5, s9, 0
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v2, s6 ; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_mov_b32_e32 v3, s7 ; VI-NEXT: v_mov_b32_e32 v3, s7
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: v_mov_b32_e32 v4, s8 ; VI-NEXT: v_mov_b32_e32 v4, s8
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: v_mov_b32_e32 v5, s9 ; VI-NEXT: v_mov_b32_e32 v5, s9
▲ Show 20 Lines • Show All 84 Lines • ▼ Show 20 Lines
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: v16i8_arg: ; VI-LABEL: v16i8_arg:
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x34
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v4, s4 ; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: v16i8_arg: ; GFX9-LABEL: v16i8_arg:
; GFX9: ; %bb.0: ; %entry ; GFX9: ; %bb.0: ; %entry
▲ Show 20 Lines • Show All 441 Lines • ▼ Show 20 Lines
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0x24
; VI-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x44 ; VI-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x44
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: s_add_u32 s4, s8, 16 ; VI-NEXT: s_add_u32 s4, s8, 16
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: s_addc_u32 s5, s9, 0 ; VI-NEXT: s_addc_u32 s5, s9, 0
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v2, s6 ; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_mov_b32_e32 v3, s7 ; VI-NEXT: v_mov_b32_e32 v3, s7
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: v_mov_b32_e32 v4, s8 ; VI-NEXT: v_mov_b32_e32 v4, s8
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: v_mov_b32_e32 v5, s9 ; VI-NEXT: v_mov_b32_e32 v5, s9
▲ Show 20 Lines • Show All 449 Lines • ▼ Show 20 Lines
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[16:17], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[16:17], s[0:1], 0x24
; VI-NEXT: s_load_dwordx16 s[0:15], s[0:1], 0x64 ; VI-NEXT: s_load_dwordx16 s[0:15], s[0:1], 0x64
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s12 ; VI-NEXT: v_mov_b32_e32 v0, s12
; VI-NEXT: s_add_u32 s12, s16, 48 ; VI-NEXT: s_add_u32 s12, s16, 48
; VI-NEXT: v_mov_b32_e32 v1, s13 ; VI-NEXT: v_mov_b32_e32 v1, s13
; VI-NEXT: s_addc_u32 s13, s17, 0 ; VI-NEXT: s_addc_u32 s13, s17, 0
; VI-NEXT: v_mov_b32_e32 v4, s12
; VI-NEXT: v_mov_b32_e32 v2, s14 ; VI-NEXT: v_mov_b32_e32 v2, s14
; VI-NEXT: v_mov_b32_e32 v3, s15 ; VI-NEXT: v_mov_b32_e32 v3, s15
; VI-NEXT: v_mov_b32_e32 v4, s12
; VI-NEXT: v_mov_b32_e32 v5, s13 ; VI-NEXT: v_mov_b32_e32 v5, s13
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_nop 0 ; VI-NEXT: s_nop 0
; VI-NEXT: v_mov_b32_e32 v0, s8 ; VI-NEXT: v_mov_b32_e32 v0, s8
; VI-NEXT: s_add_u32 s8, s16, 32 ; VI-NEXT: s_add_u32 s8, s16, 32
; VI-NEXT: v_mov_b32_e32 v1, s9 ; VI-NEXT: v_mov_b32_e32 v1, s9
; VI-NEXT: s_addc_u32 s9, s17, 0 ; VI-NEXT: s_addc_u32 s9, s17, 0
; VI-NEXT: v_mov_b32_e32 v4, s8
; VI-NEXT: v_mov_b32_e32 v2, s10 ; VI-NEXT: v_mov_b32_e32 v2, s10
; VI-NEXT: v_mov_b32_e32 v3, s11 ; VI-NEXT: v_mov_b32_e32 v3, s11
; VI-NEXT: v_mov_b32_e32 v4, s8
; VI-NEXT: v_mov_b32_e32 v5, s9 ; VI-NEXT: v_mov_b32_e32 v5, s9
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_nop 0 ; VI-NEXT: s_nop 0
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: s_add_u32 s4, s16, 16 ; VI-NEXT: s_add_u32 s4, s16, 16
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: s_addc_u32 s5, s17, 0 ; VI-NEXT: s_addc_u32 s5, s17, 0
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v2, s6 ; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_mov_b32_e32 v3, s7 ; VI-NEXT: v_mov_b32_e32 v3, s7
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: v_mov_b32_e32 v4, s16 ; VI-NEXT: v_mov_b32_e32 v4, s16
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: v_mov_b32_e32 v5, s17 ; VI-NEXT: v_mov_b32_e32 v5, s17
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; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[16:17], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[16:17], s[0:1], 0x24
; VI-NEXT: s_load_dwordx16 s[0:15], s[0:1], 0x64 ; VI-NEXT: s_load_dwordx16 s[0:15], s[0:1], 0x64
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s12 ; VI-NEXT: v_mov_b32_e32 v0, s12
; VI-NEXT: s_add_u32 s12, s16, 48 ; VI-NEXT: s_add_u32 s12, s16, 48
; VI-NEXT: v_mov_b32_e32 v1, s13 ; VI-NEXT: v_mov_b32_e32 v1, s13
; VI-NEXT: s_addc_u32 s13, s17, 0 ; VI-NEXT: s_addc_u32 s13, s17, 0
; VI-NEXT: v_mov_b32_e32 v4, s12
; VI-NEXT: v_mov_b32_e32 v2, s14 ; VI-NEXT: v_mov_b32_e32 v2, s14
; VI-NEXT: v_mov_b32_e32 v3, s15 ; VI-NEXT: v_mov_b32_e32 v3, s15
; VI-NEXT: v_mov_b32_e32 v4, s12
; VI-NEXT: v_mov_b32_e32 v5, s13 ; VI-NEXT: v_mov_b32_e32 v5, s13
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_nop 0 ; VI-NEXT: s_nop 0
; VI-NEXT: v_mov_b32_e32 v0, s8 ; VI-NEXT: v_mov_b32_e32 v0, s8
; VI-NEXT: s_add_u32 s8, s16, 32 ; VI-NEXT: s_add_u32 s8, s16, 32
; VI-NEXT: v_mov_b32_e32 v1, s9 ; VI-NEXT: v_mov_b32_e32 v1, s9
; VI-NEXT: s_addc_u32 s9, s17, 0 ; VI-NEXT: s_addc_u32 s9, s17, 0
; VI-NEXT: v_mov_b32_e32 v4, s8
; VI-NEXT: v_mov_b32_e32 v2, s10 ; VI-NEXT: v_mov_b32_e32 v2, s10
; VI-NEXT: v_mov_b32_e32 v3, s11 ; VI-NEXT: v_mov_b32_e32 v3, s11
; VI-NEXT: v_mov_b32_e32 v4, s8
; VI-NEXT: v_mov_b32_e32 v5, s9 ; VI-NEXT: v_mov_b32_e32 v5, s9
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_nop 0 ; VI-NEXT: s_nop 0
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: s_add_u32 s4, s16, 16 ; VI-NEXT: s_add_u32 s4, s16, 16
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: s_addc_u32 s5, s17, 0 ; VI-NEXT: s_addc_u32 s5, s17, 0
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v2, s6 ; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_mov_b32_e32 v3, s7 ; VI-NEXT: v_mov_b32_e32 v3, s7
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: v_mov_b32_e32 v4, s16 ; VI-NEXT: v_mov_b32_e32 v4, s16
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: v_mov_b32_e32 v5, s17 ; VI-NEXT: v_mov_b32_e32 v5, s17
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; ;
; VI-LABEL: i1_arg_sext_i64: ; VI-LABEL: i1_arg_sext_i64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dword s0, s[0:1], 0x2c ; VI-NEXT: s_load_dword s0, s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: s_bfe_i64 s[0:1], s[0:1], 0x10000 ; VI-NEXT: s_bfe_i64 s[0:1], s[0:1], 0x10000
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: i1_arg_sext_i64: ; GFX9-LABEL: i1_arg_sext_i64:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x8 ; GFX9-NEXT: s_load_dword s2, s[4:5], 0x8
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; ;
; VI-LABEL: packed_struct_argument_alignment: ; VI-LABEL: packed_struct_argument_alignment:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_add_u32 s2, s0, 49 ; VI-NEXT: s_add_u32 s2, s0, 49
; VI-NEXT: s_addc_u32 s3, s1, 0 ; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: s_add_u32 s4, s0, 50 ; VI-NEXT: s_add_u32 s4, s0, 50
; VI-NEXT: s_addc_u32 s5, s1, 0 ; VI-NEXT: s_addc_u32 s5, s1, 0
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: s_add_u32 s2, s2, 3 ; VI-NEXT: s_add_u32 s2, s2, 3
; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: s_addc_u32 s3, s3, 0 ; VI-NEXT: s_addc_u32 s3, s3, 0
; VI-NEXT: v_mov_b32_e32 v5, s3
; VI-NEXT: v_mov_b32_e32 v4, s2 ; VI-NEXT: v_mov_b32_e32 v4, s2
; VI-NEXT: s_add_u32 s2, s0, 51 ; VI-NEXT: s_add_u32 s2, s0, 51
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: v_mov_b32_e32 v7, s3
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: v_mov_b32_e32 v5, s3
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v6, s2 ; VI-NEXT: v_mov_b32_e32 v6, s2
; VI-NEXT: v_mov_b32_e32 v7, s3
; VI-NEXT: s_load_dword s4, s[0:1], 0x24 ; VI-NEXT: s_load_dword s4, s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x28 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x28
; VI-NEXT: flat_load_ubyte v8, v[0:1] ; VI-NEXT: flat_load_ubyte v8, v[0:1]
; VI-NEXT: flat_load_ubyte v9, v[2:3] ; VI-NEXT: flat_load_ubyte v9, v[2:3]
; VI-NEXT: flat_load_ubyte v10, v[4:5] ; VI-NEXT: flat_load_ubyte v10, v[4:5]
; VI-NEXT: flat_load_ubyte v6, v[6:7] ; VI-NEXT: flat_load_ubyte v6, v[6:7]
; VI-NEXT: s_add_u32 s0, s0, 53 ; VI-NEXT: s_add_u32 s0, s0, 53
; VI-NEXT: s_addc_u32 s1, s1, 0 ; VI-NEXT: s_addc_u32 s1, s1, 0
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; VI-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; VI-NEXT: v_mov_b32_e32 v2, 0 ; VI-NEXT: v_mov_b32_e32 v2, 0
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v5, s3
; VI-NEXT: v_mov_b32_e32 v3, 0 ; VI-NEXT: v_mov_b32_e32 v3, 0
; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v7, s4 ; VI-NEXT: v_mov_b32_e32 v7, s4
; VI-NEXT: v_mov_b32_e32 v5, s3
; VI-NEXT: v_mov_b32_e32 v4, s2 ; VI-NEXT: v_mov_b32_e32 v4, s2
; VI-NEXT: flat_store_dword v[2:3], v7 ; VI-NEXT: flat_store_dword v[2:3], v7
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: flat_store_dwordx2 v[2:3], v[4:5] ; VI-NEXT: flat_store_dwordx2 v[2:3], v[4:5]
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_lshlrev_b32_e32 v4, 8, v8 ; VI-NEXT: v_lshlrev_b32_e32 v4, 8, v8
; VI-NEXT: v_or_b32_e32 v4, v4, v9 ; VI-NEXT: v_or_b32_e32 v4, v4, v9
; VI-NEXT: v_lshlrev_b32_e32 v5, 8, v10 ; VI-NEXT: v_lshlrev_b32_e32 v5, 8, v10
▲ Show 20 Lines • Show All 416 Lines • ▼ Show 20 Lines
; ;
; VI-LABEL: array_3xi16: ; VI-LABEL: array_3xi16:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_add_u32 s2, s0, 38 ; VI-NEXT: s_add_u32 s2, s0, 38
; VI-NEXT: s_addc_u32 s3, s1, 0 ; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: s_add_u32 s4, s2, 2 ; VI-NEXT: s_add_u32 s4, s2, 2
; VI-NEXT: s_addc_u32 s5, s3, 0 ; VI-NEXT: s_addc_u32 s5, s3, 0
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: s_add_u32 s2, s0, 42 ; VI-NEXT: s_add_u32 s2, s0, 42
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: s_addc_u32 s3, s1, 0
; VI-NEXT: v_mov_b32_e32 v5, s3 ; VI-NEXT: v_mov_b32_e32 v5, s3
; VI-NEXT: v_mov_b32_e32 v4, s2 ; VI-NEXT: v_mov_b32_e32 v4, s2
; VI-NEXT: flat_load_ushort v0, v[0:1] ; VI-NEXT: flat_load_ushort v0, v[0:1]
; VI-NEXT: flat_load_ushort v1, v[2:3] ; VI-NEXT: flat_load_ushort v1, v[2:3]
; VI-NEXT: flat_load_ushort v2, v[4:5] ; VI-NEXT: flat_load_ushort v2, v[4:5]
; VI-NEXT: s_load_dword s0, s[0:1], 0x24 ; VI-NEXT: s_load_dword s0, s[0:1], 0x24
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v3, s0 ; VI-NEXT: v_mov_b32_e32 v3, s0
▲ Show 20 Lines • Show All 310 Lines • ▼ Show 20 Lines
; VI-NEXT: s_load_dwordx2 s[16:17], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[16:17], s[0:1], 0x24
; VI-NEXT: s_load_dword s18, s[0:1], 0xa4 ; VI-NEXT: s_load_dword s18, s[0:1], 0xa4
; VI-NEXT: s_load_dwordx16 s[0:15], s[0:1], 0x64 ; VI-NEXT: s_load_dwordx16 s[0:15], s[0:1], 0x64
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s12 ; VI-NEXT: v_mov_b32_e32 v0, s12
; VI-NEXT: s_add_u32 s12, s16, 48 ; VI-NEXT: s_add_u32 s12, s16, 48
; VI-NEXT: v_mov_b32_e32 v1, s13 ; VI-NEXT: v_mov_b32_e32 v1, s13
; VI-NEXT: s_addc_u32 s13, s17, 0 ; VI-NEXT: s_addc_u32 s13, s17, 0
; VI-NEXT: v_mov_b32_e32 v4, s12
; VI-NEXT: v_mov_b32_e32 v2, s14 ; VI-NEXT: v_mov_b32_e32 v2, s14
; VI-NEXT: v_mov_b32_e32 v3, s15 ; VI-NEXT: v_mov_b32_e32 v3, s15
; VI-NEXT: v_mov_b32_e32 v4, s12
; VI-NEXT: v_mov_b32_e32 v5, s13 ; VI-NEXT: v_mov_b32_e32 v5, s13
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s8 ; VI-NEXT: v_mov_b32_e32 v0, s8
; VI-NEXT: s_add_u32 s8, s16, 32 ; VI-NEXT: s_add_u32 s8, s16, 32
; VI-NEXT: v_mov_b32_e32 v1, s9 ; VI-NEXT: v_mov_b32_e32 v1, s9
; VI-NEXT: s_addc_u32 s9, s17, 0 ; VI-NEXT: s_addc_u32 s9, s17, 0
; VI-NEXT: v_mov_b32_e32 v4, s8
; VI-NEXT: v_mov_b32_e32 v2, s10 ; VI-NEXT: v_mov_b32_e32 v2, s10
; VI-NEXT: v_mov_b32_e32 v3, s11 ; VI-NEXT: v_mov_b32_e32 v3, s11
; VI-NEXT: v_mov_b32_e32 v4, s8
; VI-NEXT: v_mov_b32_e32 v5, s9 ; VI-NEXT: v_mov_b32_e32 v5, s9
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s4 ; VI-NEXT: v_mov_b32_e32 v0, s4
; VI-NEXT: s_add_u32 s4, s16, 16 ; VI-NEXT: s_add_u32 s4, s16, 16
; VI-NEXT: v_mov_b32_e32 v1, s5 ; VI-NEXT: v_mov_b32_e32 v1, s5
; VI-NEXT: s_addc_u32 s5, s17, 0 ; VI-NEXT: s_addc_u32 s5, s17, 0
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v2, s6 ; VI-NEXT: v_mov_b32_e32 v2, s6
; VI-NEXT: v_mov_b32_e32 v3, s7 ; VI-NEXT: v_mov_b32_e32 v3, s7
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; VI-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_mov_b32_e32 v4, s16 ; VI-NEXT: v_mov_b32_e32 v4, s16
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
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llvm/test/CodeGen/AMDGPU/lds-atomic-fmin-fmax.ll

Show First 20 Lines • Show All 609 Lines • ▼ Show 20 Lines
; SI-NEXT: s_mov_b32 m0, -1 ; SI-NEXT: s_mov_b32 m0, -1
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_lshl_b32 s1, s0, 4 ; SI-NEXT: s_lshl_b32 s1, s0, 4
; SI-NEXT: s_lshl_b32 s0, s0, 3 ; SI-NEXT: s_lshl_b32 s0, s0, 3
; SI-NEXT: s_add_i32 s4, s0, 32 ; SI-NEXT: s_add_i32 s4, s0, 32
; SI-NEXT: s_add_i32 s5, s1, 64 ; SI-NEXT: s_add_i32 s5, s1, 64
; SI-NEXT: s_mov_b32 s0, 0 ; SI-NEXT: s_mov_b32 s0, 0
; SI-NEXT: s_mov_b32 s1, 0x40450000 ; SI-NEXT: s_mov_b32 s1, 0x40450000
; SI-NEXT: v_mov_b32_e32 v0, s0
; SI-NEXT: v_mov_b32_e32 v2, s4 ; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: v_mov_b32_e32 v0, s0
; SI-NEXT: v_mov_b32_e32 v1, s1 ; SI-NEXT: v_mov_b32_e32 v1, s1
; SI-NEXT: ds_min_rtn_f64 v[2:3], v2, v[0:1] ; SI-NEXT: ds_min_rtn_f64 v[2:3], v2, v[0:1]
; SI-NEXT: v_mov_b32_e32 v4, s5 ; SI-NEXT: v_mov_b32_e32 v4, s5
; SI-NEXT: ds_min_f64 v4, v[0:1] ; SI-NEXT: ds_min_f64 v4, v[0:1]
; SI-NEXT: v_mov_b32_e32 v0, s3 ; SI-NEXT: v_mov_b32_e32 v0, s3
; SI-NEXT: s_waitcnt lgkmcnt(1) ; SI-NEXT: s_waitcnt lgkmcnt(1)
; SI-NEXT: ds_min_rtn_f64 v[0:1], v0, v[2:3] ; SI-NEXT: ds_min_rtn_f64 v[0:1], v0, v[2:3]
; SI-NEXT: s_add_i32 s0, s2, 4 ; SI-NEXT: s_add_i32 s0, s2, 4
Show All 15 Lines
; GFX7-NEXT: s_mov_b32 s11, 0xe8f000 ; GFX7-NEXT: s_mov_b32 s11, 0xe8f000
; GFX7-NEXT: s_add_u32 s8, s8, s3 ; GFX7-NEXT: s_add_u32 s8, s8, s3
; GFX7-NEXT: s_addc_u32 s9, s9, 0 ; GFX7-NEXT: s_addc_u32 s9, s9, 0
; GFX7-NEXT: s_mov_b32 s2, 0 ; GFX7-NEXT: s_mov_b32 s2, 0
; GFX7-NEXT: s_mov_b32 s3, 0x40450000 ; GFX7-NEXT: s_mov_b32 s3, 0x40450000
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshl_b32 s1, s0, 4 ; GFX7-NEXT: s_lshl_b32 s1, s0, 4
; GFX7-NEXT: s_lshl_b32 s0, s0, 3 ; GFX7-NEXT: s_lshl_b32 s0, s0, 3
; GFX7-NEXT: v_mov_b32_e32 v0, s2
; GFX7-NEXT: v_mov_b32_e32 v2, s0 ; GFX7-NEXT: v_mov_b32_e32 v2, s0
; GFX7-NEXT: v_mov_b32_e32 v0, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s3 ; GFX7-NEXT: v_mov_b32_e32 v1, s3
; GFX7-NEXT: s_mov_b32 m0, -1 ; GFX7-NEXT: s_mov_b32 m0, -1
; GFX7-NEXT: ds_min_rtn_f64 v[2:3], v2, v[0:1] offset:32 ; GFX7-NEXT: ds_min_rtn_f64 v[2:3], v2, v[0:1] offset:32
; GFX7-NEXT: v_mov_b32_e32 v4, s1 ; GFX7-NEXT: v_mov_b32_e32 v4, s1
; GFX7-NEXT: ds_min_f64 v4, v[0:1] offset:64 ; GFX7-NEXT: ds_min_f64 v4, v[0:1] offset:64
; GFX7-NEXT: v_mov_b32_e32 v0, s5 ; GFX7-NEXT: v_mov_b32_e32 v0, s5
; GFX7-NEXT: s_waitcnt lgkmcnt(1) ; GFX7-NEXT: s_waitcnt lgkmcnt(1)
; GFX7-NEXT: ds_min_rtn_f64 v[0:1], v0, v[2:3] ; GFX7-NEXT: ds_min_rtn_f64 v[0:1], v0, v[2:3]
Show All 15 Lines
; VI-NEXT: s_mov_b32 s91, 0xe80000 ; VI-NEXT: s_mov_b32 s91, 0xe80000
; VI-NEXT: s_add_u32 s88, s88, s3 ; VI-NEXT: s_add_u32 s88, s88, s3
; VI-NEXT: s_addc_u32 s89, s89, 0 ; VI-NEXT: s_addc_u32 s89, s89, 0
; VI-NEXT: s_mov_b32 s2, 0 ; VI-NEXT: s_mov_b32 s2, 0
; VI-NEXT: s_mov_b32 s3, 0x40450000 ; VI-NEXT: s_mov_b32 s3, 0x40450000
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_lshl_b32 s1, s0, 4 ; VI-NEXT: s_lshl_b32 s1, s0, 4
; VI-NEXT: s_lshl_b32 s0, s0, 3 ; VI-NEXT: s_lshl_b32 s0, s0, 3
; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_mov_b32 m0, -1 ; VI-NEXT: s_mov_b32 m0, -1
; VI-NEXT: ds_min_rtn_f64 v[2:3], v2, v[0:1] offset:32 ; VI-NEXT: ds_min_rtn_f64 v[2:3], v2, v[0:1] offset:32
; VI-NEXT: v_mov_b32_e32 v4, s1 ; VI-NEXT: v_mov_b32_e32 v4, s1
; VI-NEXT: ds_min_f64 v4, v[0:1] offset:64 ; VI-NEXT: ds_min_f64 v4, v[0:1] offset:64
; VI-NEXT: v_mov_b32_e32 v0, s5 ; VI-NEXT: v_mov_b32_e32 v0, s5
; VI-NEXT: s_waitcnt lgkmcnt(1) ; VI-NEXT: s_waitcnt lgkmcnt(1)
; VI-NEXT: ds_min_rtn_f64 v[0:1], v0, v[2:3] ; VI-NEXT: ds_min_rtn_f64 v[0:1], v0, v[2:3]
▲ Show 20 Lines • Show All 77 Lines • ▼ Show 20 Lines
; G_SI-NEXT: s_load_dword s3, s[0:1], 0xa ; G_SI-NEXT: s_load_dword s3, s[0:1], 0xa
; G_SI-NEXT: s_load_dword s4, s[0:1], 0x9 ; G_SI-NEXT: s_load_dword s4, s[0:1], 0x9
; G_SI-NEXT: s_addc_u32 s9, s9, 0 ; G_SI-NEXT: s_addc_u32 s9, s9, 0
; G_SI-NEXT: s_mov_b32 s0, 0 ; G_SI-NEXT: s_mov_b32 s0, 0
; G_SI-NEXT: s_waitcnt lgkmcnt(0) ; G_SI-NEXT: s_waitcnt lgkmcnt(0)
; G_SI-NEXT: s_add_i32 s2, s2, 4 ; G_SI-NEXT: s_add_i32 s2, s2, 4
; G_SI-NEXT: s_lshl_b32 s5, s2, 3 ; G_SI-NEXT: s_lshl_b32 s5, s2, 3
; G_SI-NEXT: s_mov_b32 s1, 0x40450000 ; G_SI-NEXT: s_mov_b32 s1, 0x40450000
; G_SI-NEXT: v_mov_b32_e32 v0, s0
; G_SI-NEXT: v_mov_b32_e32 v2, s5 ; G_SI-NEXT: v_mov_b32_e32 v2, s5
; G_SI-NEXT: v_mov_b32_e32 v0, s0
; G_SI-NEXT: v_mov_b32_e32 v1, s1 ; G_SI-NEXT: v_mov_b32_e32 v1, s1
; G_SI-NEXT: s_mov_b32 m0, -1 ; G_SI-NEXT: s_mov_b32 m0, -1
; G_SI-NEXT: ds_min_rtn_f64 v[2:3], v2, v[0:1] ; G_SI-NEXT: ds_min_rtn_f64 v[2:3], v2, v[0:1]
; G_SI-NEXT: s_lshl_b32 s2, s2, 4 ; G_SI-NEXT: s_lshl_b32 s2, s2, 4
; G_SI-NEXT: v_mov_b32_e32 v4, s2 ; G_SI-NEXT: v_mov_b32_e32 v4, s2
; G_SI-NEXT: ds_min_rtn_f64 v[0:1], v4, v[0:1] ; G_SI-NEXT: ds_min_rtn_f64 v[0:1], v4, v[0:1]
; G_SI-NEXT: s_waitcnt lgkmcnt(0) ; G_SI-NEXT: s_waitcnt lgkmcnt(0)
; G_SI-NEXT: v_mov_b32_e32 v0, s3 ; G_SI-NEXT: v_mov_b32_e32 v0, s3
Show All 12 Lines
; G_GFX7-NEXT: s_mov_b32 s8, SCRATCH_RSRC_DWORD0 ; G_GFX7-NEXT: s_mov_b32 s8, SCRATCH_RSRC_DWORD0
; G_GFX7-NEXT: s_mov_b32 s9, SCRATCH_RSRC_DWORD1 ; G_GFX7-NEXT: s_mov_b32 s9, SCRATCH_RSRC_DWORD1
; G_GFX7-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x9 ; G_GFX7-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x9
; G_GFX7-NEXT: s_load_dword s2, s[0:1], 0xb ; G_GFX7-NEXT: s_load_dword s2, s[0:1], 0xb
; G_GFX7-NEXT: s_mov_b32 s10, -1 ; G_GFX7-NEXT: s_mov_b32 s10, -1
; G_GFX7-NEXT: s_mov_b32 s11, 0xe8f000 ; G_GFX7-NEXT: s_mov_b32 s11, 0xe8f000
; G_GFX7-NEXT: s_add_u32 s8, s8, s3 ; G_GFX7-NEXT: s_add_u32 s8, s8, s3
; G_GFX7-NEXT: s_addc_u32 s9, s9, 0 ; G_GFX7-NEXT: s_addc_u32 s9, s9, 0
; G_GFX7-NEXT: s_mov_b32 s4, 0
; G_GFX7-NEXT: s_waitcnt lgkmcnt(0) ; G_GFX7-NEXT: s_waitcnt lgkmcnt(0)
; G_GFX7-NEXT: s_add_i32 s0, s2, 4 ; G_GFX7-NEXT: s_add_i32 s0, s2, 4
; G_GFX7-NEXT: s_mov_b32 s4, 0
; G_GFX7-NEXT: s_mov_b32 s5, 0x40450000 ; G_GFX7-NEXT: s_mov_b32 s5, 0x40450000
; G_GFX7-NEXT: s_lshl_b32 s1, s0, 3 ; G_GFX7-NEXT: s_lshl_b32 s1, s0, 3
; G_GFX7-NEXT: v_mov_b32_e32 v0, s4
; G_GFX7-NEXT: v_mov_b32_e32 v2, s1 ; G_GFX7-NEXT: v_mov_b32_e32 v2, s1
; G_GFX7-NEXT: v_mov_b32_e32 v0, s4
; G_GFX7-NEXT: v_mov_b32_e32 v1, s5 ; G_GFX7-NEXT: v_mov_b32_e32 v1, s5
; G_GFX7-NEXT: s_mov_b32 m0, -1 ; G_GFX7-NEXT: s_mov_b32 m0, -1
; G_GFX7-NEXT: ds_min_rtn_f64 v[2:3], v2, v[0:1] ; G_GFX7-NEXT: ds_min_rtn_f64 v[2:3], v2, v[0:1]
; G_GFX7-NEXT: s_lshl_b32 s0, s0, 4 ; G_GFX7-NEXT: s_lshl_b32 s0, s0, 4
; G_GFX7-NEXT: v_mov_b32_e32 v4, s0 ; G_GFX7-NEXT: v_mov_b32_e32 v4, s0
; G_GFX7-NEXT: ds_min_rtn_f64 v[0:1], v4, v[0:1] ; G_GFX7-NEXT: ds_min_rtn_f64 v[0:1], v4, v[0:1]
; G_GFX7-NEXT: s_waitcnt lgkmcnt(0) ; G_GFX7-NEXT: s_waitcnt lgkmcnt(0)
; G_GFX7-NEXT: v_mov_b32_e32 v0, s7 ; G_GFX7-NEXT: v_mov_b32_e32 v0, s7
Show All 11 Lines
; G_VI-NEXT: s_mov_b32 s88, SCRATCH_RSRC_DWORD0 ; G_VI-NEXT: s_mov_b32 s88, SCRATCH_RSRC_DWORD0
; G_VI-NEXT: s_mov_b32 s89, SCRATCH_RSRC_DWORD1 ; G_VI-NEXT: s_mov_b32 s89, SCRATCH_RSRC_DWORD1
; G_VI-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x24 ; G_VI-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x24
; G_VI-NEXT: s_load_dword s2, s[0:1], 0x2c ; G_VI-NEXT: s_load_dword s2, s[0:1], 0x2c
; G_VI-NEXT: s_mov_b32 s90, -1 ; G_VI-NEXT: s_mov_b32 s90, -1
; G_VI-NEXT: s_mov_b32 s91, 0xe80000 ; G_VI-NEXT: s_mov_b32 s91, 0xe80000
; G_VI-NEXT: s_add_u32 s88, s88, s3 ; G_VI-NEXT: s_add_u32 s88, s88, s3
; G_VI-NEXT: s_addc_u32 s89, s89, 0 ; G_VI-NEXT: s_addc_u32 s89, s89, 0
; G_VI-NEXT: s_mov_b32 s4, 0
; G_VI-NEXT: s_waitcnt lgkmcnt(0) ; G_VI-NEXT: s_waitcnt lgkmcnt(0)
; G_VI-NEXT: s_add_i32 s0, s2, 4 ; G_VI-NEXT: s_add_i32 s0, s2, 4
; G_VI-NEXT: s_mov_b32 s4, 0
; G_VI-NEXT: s_mov_b32 s5, 0x40450000 ; G_VI-NEXT: s_mov_b32 s5, 0x40450000
; G_VI-NEXT: s_lshl_b32 s1, s0, 3 ; G_VI-NEXT: s_lshl_b32 s1, s0, 3
; G_VI-NEXT: v_mov_b32_e32 v0, s4
; G_VI-NEXT: v_mov_b32_e32 v2, s1 ; G_VI-NEXT: v_mov_b32_e32 v2, s1
; G_VI-NEXT: v_mov_b32_e32 v0, s4
; G_VI-NEXT: v_mov_b32_e32 v1, s5 ; G_VI-NEXT: v_mov_b32_e32 v1, s5
; G_VI-NEXT: s_mov_b32 m0, -1 ; G_VI-NEXT: s_mov_b32 m0, -1
; G_VI-NEXT: ds_min_rtn_f64 v[2:3], v2, v[0:1] ; G_VI-NEXT: ds_min_rtn_f64 v[2:3], v2, v[0:1]
; G_VI-NEXT: s_lshl_b32 s0, s0, 4 ; G_VI-NEXT: s_lshl_b32 s0, s0, 4
; G_VI-NEXT: v_mov_b32_e32 v4, s0 ; G_VI-NEXT: v_mov_b32_e32 v4, s0
; G_VI-NEXT: ds_min_rtn_f64 v[0:1], v4, v[0:1] ; G_VI-NEXT: ds_min_rtn_f64 v[0:1], v4, v[0:1]
; G_VI-NEXT: s_waitcnt lgkmcnt(0) ; G_VI-NEXT: s_waitcnt lgkmcnt(0)
; G_VI-NEXT: v_mov_b32_e32 v0, s7 ; G_VI-NEXT: v_mov_b32_e32 v0, s7
Show All 10 Lines
; G_GFX9: ; %bb.0: ; G_GFX9: ; %bb.0:
; G_GFX9-NEXT: s_mov_b32 s8, SCRATCH_RSRC_DWORD0 ; G_GFX9-NEXT: s_mov_b32 s8, SCRATCH_RSRC_DWORD0
; G_GFX9-NEXT: s_mov_b32 s9, SCRATCH_RSRC_DWORD1 ; G_GFX9-NEXT: s_mov_b32 s9, SCRATCH_RSRC_DWORD1
; G_GFX9-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x24 ; G_GFX9-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x24
; G_GFX9-NEXT: s_load_dword s2, s[0:1], 0x2c ; G_GFX9-NEXT: s_load_dword s2, s[0:1], 0x2c
; G_GFX9-NEXT: s_mov_b32 s10, -1 ; G_GFX9-NEXT: s_mov_b32 s10, -1
; G_GFX9-NEXT: s_mov_b32 s11, 0xe00000 ; G_GFX9-NEXT: s_mov_b32 s11, 0xe00000
; G_GFX9-NEXT: s_add_u32 s8, s8, s3 ; G_GFX9-NEXT: s_add_u32 s8, s8, s3
; G_GFX9-NEXT: s_mov_b32 s0, 0
; G_GFX9-NEXT: s_addc_u32 s9, s9, 0 ; G_GFX9-NEXT: s_addc_u32 s9, s9, 0
; G_GFX9-NEXT: s_mov_b32 s0, 0
; G_GFX9-NEXT: s_mov_b32 s1, 0x40450000 ; G_GFX9-NEXT: s_mov_b32 s1, 0x40450000
; G_GFX9-NEXT: v_mov_b32_e32 v0, s0 ; G_GFX9-NEXT: v_mov_b32_e32 v0, s0
; G_GFX9-NEXT: v_mov_b32_e32 v1, s1
; G_GFX9-NEXT: s_waitcnt lgkmcnt(0) ; G_GFX9-NEXT: s_waitcnt lgkmcnt(0)
; G_GFX9-NEXT: s_add_i32 s0, s2, 4 ; G_GFX9-NEXT: s_add_i32 s0, s2, 4
; G_GFX9-NEXT: v_mov_b32_e32 v1, s1
; G_GFX9-NEXT: s_lshl_b32 s1, s0, 3 ; G_GFX9-NEXT: s_lshl_b32 s1, s0, 3
; G_GFX9-NEXT: v_mov_b32_e32 v2, s1 ; G_GFX9-NEXT: v_mov_b32_e32 v2, s1
; G_GFX9-NEXT: ds_min_rtn_f64 v[2:3], v2, v[0:1] ; G_GFX9-NEXT: ds_min_rtn_f64 v[2:3], v2, v[0:1]
; G_GFX9-NEXT: s_lshl_b32 s0, s0, 4 ; G_GFX9-NEXT: s_lshl_b32 s0, s0, 4
; G_GFX9-NEXT: v_mov_b32_e32 v5, s0 ; G_GFX9-NEXT: v_mov_b32_e32 v5, s0
; G_GFX9-NEXT: v_mov_b32_e32 v4, s7 ; G_GFX9-NEXT: v_mov_b32_e32 v4, s7
; G_GFX9-NEXT: ds_min_rtn_f64 v[0:1], v5, v[0:1] ; G_GFX9-NEXT: ds_min_rtn_f64 v[0:1], v5, v[0:1]
; G_GFX9-NEXT: s_waitcnt lgkmcnt(0) ; G_GFX9-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
; SI-NEXT: s_mov_b32 m0, -1 ; SI-NEXT: s_mov_b32 m0, -1
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_lshl_b32 s1, s0, 4 ; SI-NEXT: s_lshl_b32 s1, s0, 4
; SI-NEXT: s_lshl_b32 s0, s0, 3 ; SI-NEXT: s_lshl_b32 s0, s0, 3
; SI-NEXT: s_add_i32 s4, s0, 32 ; SI-NEXT: s_add_i32 s4, s0, 32
; SI-NEXT: s_add_i32 s5, s1, 64 ; SI-NEXT: s_add_i32 s5, s1, 64
; SI-NEXT: s_mov_b32 s0, 0 ; SI-NEXT: s_mov_b32 s0, 0
; SI-NEXT: s_mov_b32 s1, 0x40450000 ; SI-NEXT: s_mov_b32 s1, 0x40450000
; SI-NEXT: v_mov_b32_e32 v0, s0
; SI-NEXT: v_mov_b32_e32 v2, s4 ; SI-NEXT: v_mov_b32_e32 v2, s4
; SI-NEXT: v_mov_b32_e32 v0, s0
; SI-NEXT: v_mov_b32_e32 v1, s1 ; SI-NEXT: v_mov_b32_e32 v1, s1
; SI-NEXT: ds_max_rtn_f64 v[2:3], v2, v[0:1] ; SI-NEXT: ds_max_rtn_f64 v[2:3], v2, v[0:1]
; SI-NEXT: v_mov_b32_e32 v4, s5 ; SI-NEXT: v_mov_b32_e32 v4, s5
; SI-NEXT: ds_max_f64 v4, v[0:1] ; SI-NEXT: ds_max_f64 v4, v[0:1]
; SI-NEXT: v_mov_b32_e32 v0, s3 ; SI-NEXT: v_mov_b32_e32 v0, s3
; SI-NEXT: s_waitcnt lgkmcnt(1) ; SI-NEXT: s_waitcnt lgkmcnt(1)
; SI-NEXT: ds_max_rtn_f64 v[0:1], v0, v[2:3] ; SI-NEXT: ds_max_rtn_f64 v[0:1], v0, v[2:3]
; SI-NEXT: s_add_i32 s0, s2, 4 ; SI-NEXT: s_add_i32 s0, s2, 4
Show All 15 Lines
; GFX7-NEXT: s_mov_b32 s11, 0xe8f000 ; GFX7-NEXT: s_mov_b32 s11, 0xe8f000
; GFX7-NEXT: s_add_u32 s8, s8, s3 ; GFX7-NEXT: s_add_u32 s8, s8, s3
; GFX7-NEXT: s_addc_u32 s9, s9, 0 ; GFX7-NEXT: s_addc_u32 s9, s9, 0
; GFX7-NEXT: s_mov_b32 s2, 0 ; GFX7-NEXT: s_mov_b32 s2, 0
; GFX7-NEXT: s_mov_b32 s3, 0x40450000 ; GFX7-NEXT: s_mov_b32 s3, 0x40450000
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshl_b32 s1, s0, 4 ; GFX7-NEXT: s_lshl_b32 s1, s0, 4
; GFX7-NEXT: s_lshl_b32 s0, s0, 3 ; GFX7-NEXT: s_lshl_b32 s0, s0, 3
; GFX7-NEXT: v_mov_b32_e32 v0, s2
; GFX7-NEXT: v_mov_b32_e32 v2, s0 ; GFX7-NEXT: v_mov_b32_e32 v2, s0
; GFX7-NEXT: v_mov_b32_e32 v0, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s3 ; GFX7-NEXT: v_mov_b32_e32 v1, s3
; GFX7-NEXT: s_mov_b32 m0, -1 ; GFX7-NEXT: s_mov_b32 m0, -1
; GFX7-NEXT: ds_max_rtn_f64 v[2:3], v2, v[0:1] offset:32 ; GFX7-NEXT: ds_max_rtn_f64 v[2:3], v2, v[0:1] offset:32
; GFX7-NEXT: v_mov_b32_e32 v4, s1 ; GFX7-NEXT: v_mov_b32_e32 v4, s1
; GFX7-NEXT: ds_max_f64 v4, v[0:1] offset:64 ; GFX7-NEXT: ds_max_f64 v4, v[0:1] offset:64
; GFX7-NEXT: v_mov_b32_e32 v0, s5 ; GFX7-NEXT: v_mov_b32_e32 v0, s5
; GFX7-NEXT: s_waitcnt lgkmcnt(1) ; GFX7-NEXT: s_waitcnt lgkmcnt(1)
; GFX7-NEXT: ds_max_rtn_f64 v[0:1], v0, v[2:3] ; GFX7-NEXT: ds_max_rtn_f64 v[0:1], v0, v[2:3]
Show All 15 Lines
; VI-NEXT: s_mov_b32 s91, 0xe80000 ; VI-NEXT: s_mov_b32 s91, 0xe80000
; VI-NEXT: s_add_u32 s88, s88, s3 ; VI-NEXT: s_add_u32 s88, s88, s3
; VI-NEXT: s_addc_u32 s89, s89, 0 ; VI-NEXT: s_addc_u32 s89, s89, 0
; VI-NEXT: s_mov_b32 s2, 0 ; VI-NEXT: s_mov_b32 s2, 0
; VI-NEXT: s_mov_b32 s3, 0x40450000 ; VI-NEXT: s_mov_b32 s3, 0x40450000
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: s_lshl_b32 s1, s0, 4 ; VI-NEXT: s_lshl_b32 s1, s0, 4
; VI-NEXT: s_lshl_b32 s0, s0, 3 ; VI-NEXT: s_lshl_b32 s0, s0, 3
; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: s_mov_b32 m0, -1 ; VI-NEXT: s_mov_b32 m0, -1
; VI-NEXT: ds_max_rtn_f64 v[2:3], v2, v[0:1] offset:32 ; VI-NEXT: ds_max_rtn_f64 v[2:3], v2, v[0:1] offset:32
; VI-NEXT: v_mov_b32_e32 v4, s1 ; VI-NEXT: v_mov_b32_e32 v4, s1
; VI-NEXT: ds_max_f64 v4, v[0:1] offset:64 ; VI-NEXT: ds_max_f64 v4, v[0:1] offset:64
; VI-NEXT: v_mov_b32_e32 v0, s5 ; VI-NEXT: v_mov_b32_e32 v0, s5
; VI-NEXT: s_waitcnt lgkmcnt(1) ; VI-NEXT: s_waitcnt lgkmcnt(1)
; VI-NEXT: ds_max_rtn_f64 v[0:1], v0, v[2:3] ; VI-NEXT: ds_max_rtn_f64 v[0:1], v0, v[2:3]
▲ Show 20 Lines • Show All 77 Lines • ▼ Show 20 Lines
; G_SI-NEXT: s_load_dword s3, s[0:1], 0xa ; G_SI-NEXT: s_load_dword s3, s[0:1], 0xa
; G_SI-NEXT: s_load_dword s4, s[0:1], 0x9 ; G_SI-NEXT: s_load_dword s4, s[0:1], 0x9
; G_SI-NEXT: s_addc_u32 s9, s9, 0 ; G_SI-NEXT: s_addc_u32 s9, s9, 0
; G_SI-NEXT: s_mov_b32 s0, 0 ; G_SI-NEXT: s_mov_b32 s0, 0
; G_SI-NEXT: s_waitcnt lgkmcnt(0) ; G_SI-NEXT: s_waitcnt lgkmcnt(0)
; G_SI-NEXT: s_add_i32 s2, s2, 4 ; G_SI-NEXT: s_add_i32 s2, s2, 4
; G_SI-NEXT: s_lshl_b32 s5, s2, 3 ; G_SI-NEXT: s_lshl_b32 s5, s2, 3
; G_SI-NEXT: s_mov_b32 s1, 0x40450000 ; G_SI-NEXT: s_mov_b32 s1, 0x40450000
; G_SI-NEXT: v_mov_b32_e32 v0, s0
; G_SI-NEXT: v_mov_b32_e32 v2, s5 ; G_SI-NEXT: v_mov_b32_e32 v2, s5
; G_SI-NEXT: v_mov_b32_e32 v0, s0
; G_SI-NEXT: v_mov_b32_e32 v1, s1 ; G_SI-NEXT: v_mov_b32_e32 v1, s1
; G_SI-NEXT: s_mov_b32 m0, -1 ; G_SI-NEXT: s_mov_b32 m0, -1
; G_SI-NEXT: ds_max_rtn_f64 v[2:3], v2, v[0:1] ; G_SI-NEXT: ds_max_rtn_f64 v[2:3], v2, v[0:1]
; G_SI-NEXT: s_lshl_b32 s2, s2, 4 ; G_SI-NEXT: s_lshl_b32 s2, s2, 4
; G_SI-NEXT: v_mov_b32_e32 v4, s2 ; G_SI-NEXT: v_mov_b32_e32 v4, s2
; G_SI-NEXT: ds_max_rtn_f64 v[0:1], v4, v[0:1] ; G_SI-NEXT: ds_max_rtn_f64 v[0:1], v4, v[0:1]
; G_SI-NEXT: s_waitcnt lgkmcnt(0) ; G_SI-NEXT: s_waitcnt lgkmcnt(0)
; G_SI-NEXT: v_mov_b32_e32 v0, s3 ; G_SI-NEXT: v_mov_b32_e32 v0, s3
Show All 12 Lines
; G_GFX7-NEXT: s_mov_b32 s8, SCRATCH_RSRC_DWORD0 ; G_GFX7-NEXT: s_mov_b32 s8, SCRATCH_RSRC_DWORD0
; G_GFX7-NEXT: s_mov_b32 s9, SCRATCH_RSRC_DWORD1 ; G_GFX7-NEXT: s_mov_b32 s9, SCRATCH_RSRC_DWORD1
; G_GFX7-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x9 ; G_GFX7-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x9
; G_GFX7-NEXT: s_load_dword s2, s[0:1], 0xb ; G_GFX7-NEXT: s_load_dword s2, s[0:1], 0xb
; G_GFX7-NEXT: s_mov_b32 s10, -1 ; G_GFX7-NEXT: s_mov_b32 s10, -1
; G_GFX7-NEXT: s_mov_b32 s11, 0xe8f000 ; G_GFX7-NEXT: s_mov_b32 s11, 0xe8f000
; G_GFX7-NEXT: s_add_u32 s8, s8, s3 ; G_GFX7-NEXT: s_add_u32 s8, s8, s3
; G_GFX7-NEXT: s_addc_u32 s9, s9, 0 ; G_GFX7-NEXT: s_addc_u32 s9, s9, 0
; G_GFX7-NEXT: s_mov_b32 s4, 0
; G_GFX7-NEXT: s_waitcnt lgkmcnt(0) ; G_GFX7-NEXT: s_waitcnt lgkmcnt(0)
; G_GFX7-NEXT: s_add_i32 s0, s2, 4 ; G_GFX7-NEXT: s_add_i32 s0, s2, 4
; G_GFX7-NEXT: s_mov_b32 s4, 0
; G_GFX7-NEXT: s_mov_b32 s5, 0x40450000 ; G_GFX7-NEXT: s_mov_b32 s5, 0x40450000
; G_GFX7-NEXT: s_lshl_b32 s1, s0, 3 ; G_GFX7-NEXT: s_lshl_b32 s1, s0, 3
; G_GFX7-NEXT: v_mov_b32_e32 v0, s4
; G_GFX7-NEXT: v_mov_b32_e32 v2, s1 ; G_GFX7-NEXT: v_mov_b32_e32 v2, s1
; G_GFX7-NEXT: v_mov_b32_e32 v0, s4
; G_GFX7-NEXT: v_mov_b32_e32 v1, s5 ; G_GFX7-NEXT: v_mov_b32_e32 v1, s5
; G_GFX7-NEXT: s_mov_b32 m0, -1 ; G_GFX7-NEXT: s_mov_b32 m0, -1
; G_GFX7-NEXT: ds_max_rtn_f64 v[2:3], v2, v[0:1] ; G_GFX7-NEXT: ds_max_rtn_f64 v[2:3], v2, v[0:1]
; G_GFX7-NEXT: s_lshl_b32 s0, s0, 4 ; G_GFX7-NEXT: s_lshl_b32 s0, s0, 4
; G_GFX7-NEXT: v_mov_b32_e32 v4, s0 ; G_GFX7-NEXT: v_mov_b32_e32 v4, s0
; G_GFX7-NEXT: ds_max_rtn_f64 v[0:1], v4, v[0:1] ; G_GFX7-NEXT: ds_max_rtn_f64 v[0:1], v4, v[0:1]
; G_GFX7-NEXT: s_waitcnt lgkmcnt(0) ; G_GFX7-NEXT: s_waitcnt lgkmcnt(0)
; G_GFX7-NEXT: v_mov_b32_e32 v0, s7 ; G_GFX7-NEXT: v_mov_b32_e32 v0, s7
Show All 11 Lines
; G_VI-NEXT: s_mov_b32 s88, SCRATCH_RSRC_DWORD0 ; G_VI-NEXT: s_mov_b32 s88, SCRATCH_RSRC_DWORD0
; G_VI-NEXT: s_mov_b32 s89, SCRATCH_RSRC_DWORD1 ; G_VI-NEXT: s_mov_b32 s89, SCRATCH_RSRC_DWORD1
; G_VI-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x24 ; G_VI-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x24
; G_VI-NEXT: s_load_dword s2, s[0:1], 0x2c ; G_VI-NEXT: s_load_dword s2, s[0:1], 0x2c
; G_VI-NEXT: s_mov_b32 s90, -1 ; G_VI-NEXT: s_mov_b32 s90, -1
; G_VI-NEXT: s_mov_b32 s91, 0xe80000 ; G_VI-NEXT: s_mov_b32 s91, 0xe80000
; G_VI-NEXT: s_add_u32 s88, s88, s3 ; G_VI-NEXT: s_add_u32 s88, s88, s3
; G_VI-NEXT: s_addc_u32 s89, s89, 0 ; G_VI-NEXT: s_addc_u32 s89, s89, 0
; G_VI-NEXT: s_mov_b32 s4, 0
; G_VI-NEXT: s_waitcnt lgkmcnt(0) ; G_VI-NEXT: s_waitcnt lgkmcnt(0)
; G_VI-NEXT: s_add_i32 s0, s2, 4 ; G_VI-NEXT: s_add_i32 s0, s2, 4
; G_VI-NEXT: s_mov_b32 s4, 0
; G_VI-NEXT: s_mov_b32 s5, 0x40450000 ; G_VI-NEXT: s_mov_b32 s5, 0x40450000
; G_VI-NEXT: s_lshl_b32 s1, s0, 3 ; G_VI-NEXT: s_lshl_b32 s1, s0, 3
; G_VI-NEXT: v_mov_b32_e32 v0, s4
; G_VI-NEXT: v_mov_b32_e32 v2, s1 ; G_VI-NEXT: v_mov_b32_e32 v2, s1
; G_VI-NEXT: v_mov_b32_e32 v0, s4
; G_VI-NEXT: v_mov_b32_e32 v1, s5 ; G_VI-NEXT: v_mov_b32_e32 v1, s5
; G_VI-NEXT: s_mov_b32 m0, -1 ; G_VI-NEXT: s_mov_b32 m0, -1
; G_VI-NEXT: ds_max_rtn_f64 v[2:3], v2, v[0:1] ; G_VI-NEXT: ds_max_rtn_f64 v[2:3], v2, v[0:1]
; G_VI-NEXT: s_lshl_b32 s0, s0, 4 ; G_VI-NEXT: s_lshl_b32 s0, s0, 4
; G_VI-NEXT: v_mov_b32_e32 v4, s0 ; G_VI-NEXT: v_mov_b32_e32 v4, s0
; G_VI-NEXT: ds_max_rtn_f64 v[0:1], v4, v[0:1] ; G_VI-NEXT: ds_max_rtn_f64 v[0:1], v4, v[0:1]
; G_VI-NEXT: s_waitcnt lgkmcnt(0) ; G_VI-NEXT: s_waitcnt lgkmcnt(0)
; G_VI-NEXT: v_mov_b32_e32 v0, s7 ; G_VI-NEXT: v_mov_b32_e32 v0, s7
Show All 10 Lines
; G_GFX9: ; %bb.0: ; G_GFX9: ; %bb.0:
; G_GFX9-NEXT: s_mov_b32 s8, SCRATCH_RSRC_DWORD0 ; G_GFX9-NEXT: s_mov_b32 s8, SCRATCH_RSRC_DWORD0
; G_GFX9-NEXT: s_mov_b32 s9, SCRATCH_RSRC_DWORD1 ; G_GFX9-NEXT: s_mov_b32 s9, SCRATCH_RSRC_DWORD1
; G_GFX9-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x24 ; G_GFX9-NEXT: s_load_dwordx2 s[6:7], s[0:1], 0x24
; G_GFX9-NEXT: s_load_dword s2, s[0:1], 0x2c ; G_GFX9-NEXT: s_load_dword s2, s[0:1], 0x2c
; G_GFX9-NEXT: s_mov_b32 s10, -1 ; G_GFX9-NEXT: s_mov_b32 s10, -1
; G_GFX9-NEXT: s_mov_b32 s11, 0xe00000 ; G_GFX9-NEXT: s_mov_b32 s11, 0xe00000
; G_GFX9-NEXT: s_add_u32 s8, s8, s3 ; G_GFX9-NEXT: s_add_u32 s8, s8, s3
; G_GFX9-NEXT: s_mov_b32 s0, 0
; G_GFX9-NEXT: s_addc_u32 s9, s9, 0 ; G_GFX9-NEXT: s_addc_u32 s9, s9, 0
; G_GFX9-NEXT: s_mov_b32 s0, 0
; G_GFX9-NEXT: s_mov_b32 s1, 0x40450000 ; G_GFX9-NEXT: s_mov_b32 s1, 0x40450000
; G_GFX9-NEXT: v_mov_b32_e32 v0, s0 ; G_GFX9-NEXT: v_mov_b32_e32 v0, s0
; G_GFX9-NEXT: v_mov_b32_e32 v1, s1
; G_GFX9-NEXT: s_waitcnt lgkmcnt(0) ; G_GFX9-NEXT: s_waitcnt lgkmcnt(0)
; G_GFX9-NEXT: s_add_i32 s0, s2, 4 ; G_GFX9-NEXT: s_add_i32 s0, s2, 4
; G_GFX9-NEXT: v_mov_b32_e32 v1, s1
; G_GFX9-NEXT: s_lshl_b32 s1, s0, 3 ; G_GFX9-NEXT: s_lshl_b32 s1, s0, 3
; G_GFX9-NEXT: v_mov_b32_e32 v2, s1 ; G_GFX9-NEXT: v_mov_b32_e32 v2, s1
; G_GFX9-NEXT: ds_max_rtn_f64 v[2:3], v2, v[0:1] ; G_GFX9-NEXT: ds_max_rtn_f64 v[2:3], v2, v[0:1]
; G_GFX9-NEXT: s_lshl_b32 s0, s0, 4 ; G_GFX9-NEXT: s_lshl_b32 s0, s0, 4
; G_GFX9-NEXT: v_mov_b32_e32 v5, s0 ; G_GFX9-NEXT: v_mov_b32_e32 v5, s0
; G_GFX9-NEXT: v_mov_b32_e32 v4, s7 ; G_GFX9-NEXT: v_mov_b32_e32 v4, s7
; G_GFX9-NEXT: ds_max_rtn_f64 v[0:1], v5, v[0:1] ; G_GFX9-NEXT: ds_max_rtn_f64 v[0:1], v5, v[0:1]
; G_GFX9-NEXT: s_waitcnt lgkmcnt(0) ; G_GFX9-NEXT: s_waitcnt lgkmcnt(0)
▲ Show 20 Lines • Show All 49 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.dec.ll

Show First 20 Lines • Show All 383 Lines • ▼ Show 20 Lines
; GFX9: global_atomic_dec_x2 v[[ZERO]], v{{\[}}[[KLO]]:[[KHI]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}} offset:32{{$}} ; GFX9: global_atomic_dec_x2 v[[ZERO]], v{{\[}}[[KLO]]:[[KHI]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}} offset:32{{$}}
define amdgpu_kernel void @global_atomic_dec_noret_i64_offset(i64 addrspace(1)* %ptr) nounwind { define amdgpu_kernel void @global_atomic_dec_noret_i64_offset(i64 addrspace(1)* %ptr) nounwind {
%gep = getelementptr i64, i64 addrspace(1)* %ptr, i32 4 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i32 4
%result = call i64 @llvm.amdgcn.atomic.dec.i64.p1i64(i64 addrspace(1)* %gep, i64 42, i32 0, i32 0, i1 false) %result = call i64 @llvm.amdgcn.atomic.dec.i64.p1i64(i64 addrspace(1)* %gep, i64 42, i32 0, i32 0, i1 false)
ret void ret void
} }
; GCN-LABEL: {{^}}global_atomic_dec_ret_i64_offset_addr64: ; GCN-LABEL: {{^}}global_atomic_dec_ret_i64_offset_addr64:
; GCN: v_mov_b32_e32 v[[KLO:[0-9]+]], 42
; CI: v_mov_b32_e32 v{{[0-9]+}}, 0{{$}} ; CI: v_mov_b32_e32 v{{[0-9]+}}, 0{{$}}
; GCN: v_mov_b32_e32 v[[KLO:[0-9]+]], 42
; GCN: v_mov_b32_e32 v[[KHI:[0-9]+]], 0{{$}} ; GCN: v_mov_b32_e32 v[[KHI:[0-9]+]], 0{{$}}
; CI: buffer_atomic_dec_x2 v{{\[}}[[KLO]]:[[KHI]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:40 glc{{$}} ; CI: buffer_atomic_dec_x2 v{{\[}}[[KLO]]:[[KHI]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:40 glc{{$}}
; VI: flat_atomic_dec_x2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}} glc{{$}} ; VI: flat_atomic_dec_x2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}} glc{{$}}
define amdgpu_kernel void @global_atomic_dec_ret_i64_offset_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %ptr) #0 { define amdgpu_kernel void @global_atomic_dec_ret_i64_offset_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %ptr) #0 {
%id = call i32 @llvm.amdgcn.workitem.id.x() %id = call i32 @llvm.amdgcn.workitem.id.x()
%gep.tid = getelementptr i64, i64 addrspace(1)* %ptr, i32 %id %gep.tid = getelementptr i64, i64 addrspace(1)* %ptr, i32 %id
%out.gep = getelementptr i64, i64 addrspace(1)* %out, i32 %id %out.gep = getelementptr i64, i64 addrspace(1)* %out, i32 %id
%gep = getelementptr i64, i64 addrspace(1)* %gep.tid, i32 5 %gep = getelementptr i64, i64 addrspace(1)* %gep.tid, i32 5
%result = call i64 @llvm.amdgcn.atomic.dec.i64.p1i64(i64 addrspace(1)* %gep, i64 42, i32 0, i32 0, i1 false) %result = call i64 @llvm.amdgcn.atomic.dec.i64.p1i64(i64 addrspace(1)* %gep, i64 42, i32 0, i32 0, i1 false)
store i64 %result, i64 addrspace(1)* %out.gep store i64 %result, i64 addrspace(1)* %out.gep
ret void ret void
} }
; GCN-LABEL: {{^}}global_atomic_dec_noret_i64_offset_addr64: ; GCN-LABEL: {{^}}global_atomic_dec_noret_i64_offset_addr64:
; GCN: v_mov_b32_e32 v[[KLO:[0-9]+]], 42
; CI: v_mov_b32_e32 v{{[0-9]+}}, 0{{$}} ; CI: v_mov_b32_e32 v{{[0-9]+}}, 0{{$}}
; GCN: v_mov_b32_e32 v[[KLO:[0-9]+]], 42
; GCN: v_mov_b32_e32 v[[KHI:[0-9]+]], 0{{$}} ; GCN: v_mov_b32_e32 v[[KHI:[0-9]+]], 0{{$}}
; CI: buffer_atomic_dec_x2 v{{\[}}[[KLO]]:[[KHI]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:40{{$}} ; CI: buffer_atomic_dec_x2 v{{\[}}[[KLO]]:[[KHI]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:40{{$}}
; VI: flat_atomic_dec_x2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}}{{$}} ; VI: flat_atomic_dec_x2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}}{{$}}
define amdgpu_kernel void @global_atomic_dec_noret_i64_offset_addr64(i64 addrspace(1)* %ptr) #0 { define amdgpu_kernel void @global_atomic_dec_noret_i64_offset_addr64(i64 addrspace(1)* %ptr) #0 {
%id = call i32 @llvm.amdgcn.workitem.id.x() %id = call i32 @llvm.amdgcn.workitem.id.x()
%gep.tid = getelementptr i64, i64 addrspace(1)* %ptr, i32 %id %gep.tid = getelementptr i64, i64 addrspace(1)* %ptr, i32 %id
%gep = getelementptr i64, i64 addrspace(1)* %gep.tid, i32 5 %gep = getelementptr i64, i64 addrspace(1)* %gep.tid, i32 5
%result = call i64 @llvm.amdgcn.atomic.dec.i64.p1i64(i64 addrspace(1)* %gep, i64 42, i32 0, i32 0, i1 false) %result = call i64 @llvm.amdgcn.atomic.dec.i64.p1i64(i64 addrspace(1)* %gep, i64 42, i32 0, i32 0, i1 false)
Show All 24 Lines

llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll

Show First 20 Lines • Show All 234 Lines • ▼ Show 20 Lines
; GFX9: global_atomic_inc_x2 v[[ZERO]], v{{\[}}[[KLO]]:[[KHI]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}} offset:32{{$}} ; GFX9: global_atomic_inc_x2 v[[ZERO]], v{{\[}}[[KLO]]:[[KHI]]{{\]}}, s{{\[[0-9]+:[0-9]+\]}} offset:32{{$}}
define amdgpu_kernel void @global_atomic_inc_noret_i64_offset(i64 addrspace(1)* %ptr) nounwind { define amdgpu_kernel void @global_atomic_inc_noret_i64_offset(i64 addrspace(1)* %ptr) nounwind {
%gep = getelementptr i64, i64 addrspace(1)* %ptr, i32 4 %gep = getelementptr i64, i64 addrspace(1)* %ptr, i32 4
%result = call i64 @llvm.amdgcn.atomic.inc.i64.p1i64(i64 addrspace(1)* %gep, i64 42, i32 0, i32 0, i1 false) %result = call i64 @llvm.amdgcn.atomic.inc.i64.p1i64(i64 addrspace(1)* %gep, i64 42, i32 0, i32 0, i1 false)
ret void ret void
} }
; GCN-LABEL: {{^}}global_atomic_inc_ret_i64_offset_addr64: ; GCN-LABEL: {{^}}global_atomic_inc_ret_i64_offset_addr64:
; GCN: v_mov_b32_e32 v[[KLO:[0-9]+]], 42
; CI: v_mov_b32_e32 v{{[0-9]+}}, 0{{$}} ; CI: v_mov_b32_e32 v{{[0-9]+}}, 0{{$}}
; GCN: v_mov_b32_e32 v[[KLO:[0-9]+]], 42
; GCN: v_mov_b32_e32 v[[KHI:[0-9]+]], 0{{$}} ; GCN: v_mov_b32_e32 v[[KHI:[0-9]+]], 0{{$}}
; CI: buffer_atomic_inc_x2 v{{\[}}[[KLO]]:[[KHI]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:40 glc{{$}} ; CI: buffer_atomic_inc_x2 v{{\[}}[[KLO]]:[[KHI]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:40 glc{{$}}
; VI: flat_atomic_inc_x2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}} glc{{$}} ; VI: flat_atomic_inc_x2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}} glc{{$}}
define amdgpu_kernel void @global_atomic_inc_ret_i64_offset_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %ptr) #0 { define amdgpu_kernel void @global_atomic_inc_ret_i64_offset_addr64(i64 addrspace(1)* %out, i64 addrspace(1)* %ptr) #0 {
%id = call i32 @llvm.amdgcn.workitem.id.x() %id = call i32 @llvm.amdgcn.workitem.id.x()
%gep.tid = getelementptr i64, i64 addrspace(1)* %ptr, i32 %id %gep.tid = getelementptr i64, i64 addrspace(1)* %ptr, i32 %id
%out.gep = getelementptr i64, i64 addrspace(1)* %out, i32 %id %out.gep = getelementptr i64, i64 addrspace(1)* %out, i32 %id
%gep = getelementptr i64, i64 addrspace(1)* %gep.tid, i32 5 %gep = getelementptr i64, i64 addrspace(1)* %gep.tid, i32 5
%result = call i64 @llvm.amdgcn.atomic.inc.i64.p1i64(i64 addrspace(1)* %gep, i64 42, i32 0, i32 0, i1 false) %result = call i64 @llvm.amdgcn.atomic.inc.i64.p1i64(i64 addrspace(1)* %gep, i64 42, i32 0, i32 0, i1 false)
store i64 %result, i64 addrspace(1)* %out.gep store i64 %result, i64 addrspace(1)* %out.gep
ret void ret void
} }
; GCN-LABEL: {{^}}global_atomic_inc_noret_i64_offset_addr64: ; GCN-LABEL: {{^}}global_atomic_inc_noret_i64_offset_addr64:
; GCN: v_mov_b32_e32 v[[KLO:[0-9]+]], 42
; CI: v_mov_b32_e32 v{{[0-9]+}}, 0{{$}} ; CI: v_mov_b32_e32 v{{[0-9]+}}, 0{{$}}
; GCN: v_mov_b32_e32 v[[KLO:[0-9]+]], 42
; GCN: v_mov_b32_e32 v[[KHI:[0-9]+]], 0{{$}} ; GCN: v_mov_b32_e32 v[[KHI:[0-9]+]], 0{{$}}
; CI: buffer_atomic_inc_x2 v{{\[}}[[KLO]]:[[KHI]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:40{{$}} ; CI: buffer_atomic_inc_x2 v{{\[}}[[KLO]]:[[KHI]]{{\]}}, v{{\[[0-9]+:[0-9]+\]}}, s{{\[[0-9]+:[0-9]+\]}}, 0 addr64 offset:40{{$}}
; VI: flat_atomic_inc_x2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}}{{$}} ; VI: flat_atomic_inc_x2 v{{\[[0-9]+:[0-9]+\]}}, v{{\[}}[[KLO]]:[[KHI]]{{\]}}{{$}}
define amdgpu_kernel void @global_atomic_inc_noret_i64_offset_addr64(i64 addrspace(1)* %ptr) #0 { define amdgpu_kernel void @global_atomic_inc_noret_i64_offset_addr64(i64 addrspace(1)* %ptr) #0 {
%id = call i32 @llvm.amdgcn.workitem.id.x() %id = call i32 @llvm.amdgcn.workitem.id.x()
%gep.tid = getelementptr i64, i64 addrspace(1)* %ptr, i32 %id %gep.tid = getelementptr i64, i64 addrspace(1)* %ptr, i32 %id
%gep = getelementptr i64, i64 addrspace(1)* %gep.tid, i32 5 %gep = getelementptr i64, i64 addrspace(1)* %gep.tid, i32 5
%result = call i64 @llvm.amdgcn.atomic.inc.i64.p1i64(i64 addrspace(1)* %gep, i64 42, i32 0, i32 0, i1 false) %result = call i64 @llvm.amdgcn.atomic.inc.i64.p1i64(i64 addrspace(1)* %gep, i64 42, i32 0, i32 0, i1 false)
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llvm/test/CodeGen/AMDGPU/llvm.amdgcn.cvt.pkrtz.ll

Show All 16 Lines
; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: s_cvt_pkrtz_v2f16_f32: ; VI-LABEL: s_cvt_pkrtz_v2f16_f32:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x2c
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_mov_b32_e32 v0, s1 ; VI-NEXT: v_mov_b32_e32 v0, s1
; VI-NEXT: v_cvt_pkrtz_f16_f32 v2, s0, v0 ; VI-NEXT: v_cvt_pkrtz_f16_f32 v2, s0, v0
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: flat_store_dword v[0:1], v2 ; VI-NEXT: flat_store_dword v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX9-LABEL: s_cvt_pkrtz_v2f16_f32: ; GFX9-LABEL: s_cvt_pkrtz_v2f16_f32:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GFX9-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c ; GFX9-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x2c
; GFX9-NEXT: v_mov_b32_e32 v0, 0 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
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llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll

Show First 20 Lines • Show All 70 Lines • ▼ Show 20 Lines
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0 ; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: ; return to shader part epilog ; FIJI-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: load_1d_tfe: ; GFX6789-LABEL: load_1d_tfe:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: v_mov_b32_e32 v6, 0 ; GFX6789-NEXT: v_mov_b32_e32 v6, 0
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v7, v6 ; GFX6789-NEXT: v_mov_b32_e32 v7, v6
; GFX6789-NEXT: v_mov_b32_e32 v8, v6 ; GFX6789-NEXT: v_mov_b32_e32 v8, v6
; GFX6789-NEXT: v_mov_b32_e32 v9, v6 ; GFX6789-NEXT: v_mov_b32_e32 v9, v6
; GFX6789-NEXT: v_mov_b32_e32 v10, v6 ; GFX6789-NEXT: v_mov_b32_e32 v10, v6
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v6 ; GFX6789-NEXT: v_mov_b32_e32 v0, v6
; GFX6789-NEXT: v_mov_b32_e32 v1, v7 ; GFX6789-NEXT: v_mov_b32_e32 v1, v7
; GFX6789-NEXT: v_mov_b32_e32 v2, v8 ; GFX6789-NEXT: v_mov_b32_e32 v2, v8
; GFX6789-NEXT: v_mov_b32_e32 v3, v9 ; GFX6789-NEXT: v_mov_b32_e32 v3, v9
; GFX6789-NEXT: v_mov_b32_e32 v4, v10 ; GFX6789-NEXT: v_mov_b32_e32 v4, v10
; GFX6789-NEXT: image_load v[0:4], v5, s[0:7] dmask:0xf unorm tfe ; GFX6789-NEXT: image_load v[0:4], v5, s[0:7] dmask:0xf unorm tfe
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: global_store_dword v6, v4, s[8:9] ; GFX6789-NEXT: global_store_dword v6, v4, s[8:9]
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; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0 ; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: ; return to shader part epilog ; FIJI-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: load_1d_lwe: ; GFX6789-LABEL: load_1d_lwe:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: v_mov_b32_e32 v6, 0 ; GFX6789-NEXT: v_mov_b32_e32 v6, 0
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v7, v6 ; GFX6789-NEXT: v_mov_b32_e32 v7, v6
; GFX6789-NEXT: v_mov_b32_e32 v8, v6 ; GFX6789-NEXT: v_mov_b32_e32 v8, v6
; GFX6789-NEXT: v_mov_b32_e32 v9, v6 ; GFX6789-NEXT: v_mov_b32_e32 v9, v6
; GFX6789-NEXT: v_mov_b32_e32 v10, v6 ; GFX6789-NEXT: v_mov_b32_e32 v10, v6
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v6 ; GFX6789-NEXT: v_mov_b32_e32 v0, v6
; GFX6789-NEXT: v_mov_b32_e32 v1, v7 ; GFX6789-NEXT: v_mov_b32_e32 v1, v7
; GFX6789-NEXT: v_mov_b32_e32 v2, v8 ; GFX6789-NEXT: v_mov_b32_e32 v2, v8
; GFX6789-NEXT: v_mov_b32_e32 v3, v9 ; GFX6789-NEXT: v_mov_b32_e32 v3, v9
; GFX6789-NEXT: v_mov_b32_e32 v4, v10 ; GFX6789-NEXT: v_mov_b32_e32 v4, v10
; GFX6789-NEXT: image_load v[0:4], v5, s[0:7] dmask:0xf unorm lwe ; GFX6789-NEXT: image_load v[0:4], v5, s[0:7] dmask:0xf unorm lwe
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: global_store_dword v6, v4, s[8:9] ; GFX6789-NEXT: global_store_dword v6, v4, s[8:9]
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; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0 ; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: ; return to shader part epilog ; FIJI-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: load_2d_tfe: ; GFX6789-LABEL: load_2d_tfe:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: v_mov_b32_e32 v7, 0 ; GFX6789-NEXT: v_mov_b32_e32 v7, 0
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v8, v7 ; GFX6789-NEXT: v_mov_b32_e32 v8, v7
; GFX6789-NEXT: v_mov_b32_e32 v9, v7 ; GFX6789-NEXT: v_mov_b32_e32 v9, v7
; GFX6789-NEXT: v_mov_b32_e32 v10, v7 ; GFX6789-NEXT: v_mov_b32_e32 v10, v7
; GFX6789-NEXT: v_mov_b32_e32 v11, v7 ; GFX6789-NEXT: v_mov_b32_e32 v11, v7
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v7 ; GFX6789-NEXT: v_mov_b32_e32 v0, v7
; GFX6789-NEXT: v_mov_b32_e32 v1, v8 ; GFX6789-NEXT: v_mov_b32_e32 v1, v8
; GFX6789-NEXT: v_mov_b32_e32 v2, v9 ; GFX6789-NEXT: v_mov_b32_e32 v2, v9
; GFX6789-NEXT: v_mov_b32_e32 v3, v10 ; GFX6789-NEXT: v_mov_b32_e32 v3, v10
; GFX6789-NEXT: v_mov_b32_e32 v4, v11 ; GFX6789-NEXT: v_mov_b32_e32 v4, v11
; GFX6789-NEXT: image_load v[0:4], v[5:6], s[0:7] dmask:0xf unorm tfe ; GFX6789-NEXT: image_load v[0:4], v[5:6], s[0:7] dmask:0xf unorm tfe
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: global_store_dword v7, v4, s[8:9] ; GFX6789-NEXT: global_store_dword v7, v4, s[8:9]
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; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0 ; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: ; return to shader part epilog ; FIJI-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: load_3d_tfe_lwe: ; GFX6789-LABEL: load_3d_tfe_lwe:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: v_mov_b32_e32 v8, 0 ; GFX6789-NEXT: v_mov_b32_e32 v8, 0
; GFX6789-NEXT: v_mov_b32_e32 v7, v2
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v9, v8 ; GFX6789-NEXT: v_mov_b32_e32 v9, v8
; GFX6789-NEXT: v_mov_b32_e32 v10, v8 ; GFX6789-NEXT: v_mov_b32_e32 v10, v8
; GFX6789-NEXT: v_mov_b32_e32 v11, v8 ; GFX6789-NEXT: v_mov_b32_e32 v11, v8
; GFX6789-NEXT: v_mov_b32_e32 v12, v8 ; GFX6789-NEXT: v_mov_b32_e32 v12, v8
; GFX6789-NEXT: v_mov_b32_e32 v7, v2
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v8 ; GFX6789-NEXT: v_mov_b32_e32 v0, v8
; GFX6789-NEXT: v_mov_b32_e32 v1, v9 ; GFX6789-NEXT: v_mov_b32_e32 v1, v9
; GFX6789-NEXT: v_mov_b32_e32 v2, v10 ; GFX6789-NEXT: v_mov_b32_e32 v2, v10
; GFX6789-NEXT: v_mov_b32_e32 v3, v11 ; GFX6789-NEXT: v_mov_b32_e32 v3, v11
; GFX6789-NEXT: v_mov_b32_e32 v4, v12 ; GFX6789-NEXT: v_mov_b32_e32 v4, v12
; GFX6789-NEXT: image_load v[0:4], v[5:7], s[0:7] dmask:0xf unorm tfe lwe ; GFX6789-NEXT: image_load v[0:4], v[5:7], s[0:7] dmask:0xf unorm tfe lwe
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: global_store_dword v8, v4, s[8:9] ; GFX6789-NEXT: global_store_dword v8, v4, s[8:9]
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; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0 ; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: ; return to shader part epilog ; FIJI-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: load_cube_lwe: ; GFX6789-LABEL: load_cube_lwe:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: v_mov_b32_e32 v8, 0 ; GFX6789-NEXT: v_mov_b32_e32 v8, 0
; GFX6789-NEXT: v_mov_b32_e32 v7, v2
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v9, v8 ; GFX6789-NEXT: v_mov_b32_e32 v9, v8
; GFX6789-NEXT: v_mov_b32_e32 v10, v8 ; GFX6789-NEXT: v_mov_b32_e32 v10, v8
; GFX6789-NEXT: v_mov_b32_e32 v11, v8 ; GFX6789-NEXT: v_mov_b32_e32 v11, v8
; GFX6789-NEXT: v_mov_b32_e32 v12, v8 ; GFX6789-NEXT: v_mov_b32_e32 v12, v8
; GFX6789-NEXT: v_mov_b32_e32 v7, v2
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v8 ; GFX6789-NEXT: v_mov_b32_e32 v0, v8
; GFX6789-NEXT: v_mov_b32_e32 v1, v9 ; GFX6789-NEXT: v_mov_b32_e32 v1, v9
; GFX6789-NEXT: v_mov_b32_e32 v2, v10 ; GFX6789-NEXT: v_mov_b32_e32 v2, v10
; GFX6789-NEXT: v_mov_b32_e32 v3, v11 ; GFX6789-NEXT: v_mov_b32_e32 v3, v11
; GFX6789-NEXT: v_mov_b32_e32 v4, v12 ; GFX6789-NEXT: v_mov_b32_e32 v4, v12
; GFX6789-NEXT: image_load v[0:4], v[5:7], s[0:7] dmask:0xf unorm lwe da ; GFX6789-NEXT: image_load v[0:4], v[5:7], s[0:7] dmask:0xf unorm lwe da
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: global_store_dword v8, v4, s[8:9] ; GFX6789-NEXT: global_store_dword v8, v4, s[8:9]
▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0 ; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: ; return to shader part epilog ; FIJI-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: load_1darray_tfe: ; GFX6789-LABEL: load_1darray_tfe:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: v_mov_b32_e32 v7, 0 ; GFX6789-NEXT: v_mov_b32_e32 v7, 0
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v8, v7 ; GFX6789-NEXT: v_mov_b32_e32 v8, v7
; GFX6789-NEXT: v_mov_b32_e32 v9, v7 ; GFX6789-NEXT: v_mov_b32_e32 v9, v7
; GFX6789-NEXT: v_mov_b32_e32 v10, v7 ; GFX6789-NEXT: v_mov_b32_e32 v10, v7
; GFX6789-NEXT: v_mov_b32_e32 v11, v7 ; GFX6789-NEXT: v_mov_b32_e32 v11, v7
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v7 ; GFX6789-NEXT: v_mov_b32_e32 v0, v7
; GFX6789-NEXT: v_mov_b32_e32 v1, v8 ; GFX6789-NEXT: v_mov_b32_e32 v1, v8
; GFX6789-NEXT: v_mov_b32_e32 v2, v9 ; GFX6789-NEXT: v_mov_b32_e32 v2, v9
; GFX6789-NEXT: v_mov_b32_e32 v3, v10 ; GFX6789-NEXT: v_mov_b32_e32 v3, v10
; GFX6789-NEXT: v_mov_b32_e32 v4, v11 ; GFX6789-NEXT: v_mov_b32_e32 v4, v11
; GFX6789-NEXT: image_load v[0:4], v[5:6], s[0:7] dmask:0xf unorm tfe da ; GFX6789-NEXT: image_load v[0:4], v[5:6], s[0:7] dmask:0xf unorm tfe da
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: global_store_dword v7, v4, s[8:9] ; GFX6789-NEXT: global_store_dword v7, v4, s[8:9]
▲ Show 20 Lines • Show All 107 Lines • ▼ Show 20 Lines
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0 ; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: ; return to shader part epilog ; FIJI-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: load_2darray_lwe: ; GFX6789-LABEL: load_2darray_lwe:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: v_mov_b32_e32 v8, 0 ; GFX6789-NEXT: v_mov_b32_e32 v8, 0
; GFX6789-NEXT: v_mov_b32_e32 v7, v2
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v9, v8 ; GFX6789-NEXT: v_mov_b32_e32 v9, v8
; GFX6789-NEXT: v_mov_b32_e32 v10, v8 ; GFX6789-NEXT: v_mov_b32_e32 v10, v8
; GFX6789-NEXT: v_mov_b32_e32 v11, v8 ; GFX6789-NEXT: v_mov_b32_e32 v11, v8
; GFX6789-NEXT: v_mov_b32_e32 v12, v8 ; GFX6789-NEXT: v_mov_b32_e32 v12, v8
; GFX6789-NEXT: v_mov_b32_e32 v7, v2
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v8 ; GFX6789-NEXT: v_mov_b32_e32 v0, v8
; GFX6789-NEXT: v_mov_b32_e32 v1, v9 ; GFX6789-NEXT: v_mov_b32_e32 v1, v9
; GFX6789-NEXT: v_mov_b32_e32 v2, v10 ; GFX6789-NEXT: v_mov_b32_e32 v2, v10
; GFX6789-NEXT: v_mov_b32_e32 v3, v11 ; GFX6789-NEXT: v_mov_b32_e32 v3, v11
; GFX6789-NEXT: v_mov_b32_e32 v4, v12 ; GFX6789-NEXT: v_mov_b32_e32 v4, v12
; GFX6789-NEXT: image_load v[0:4], v[5:7], s[0:7] dmask:0xf unorm lwe da ; GFX6789-NEXT: image_load v[0:4], v[5:7], s[0:7] dmask:0xf unorm lwe da
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: global_store_dword v8, v4, s[8:9] ; GFX6789-NEXT: global_store_dword v8, v4, s[8:9]
▲ Show 20 Lines • Show All 108 Lines • ▼ Show 20 Lines
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0 ; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: ; return to shader part epilog ; FIJI-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: load_2dmsaa_both: ; GFX6789-LABEL: load_2dmsaa_both:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: v_mov_b32_e32 v8, 0 ; GFX6789-NEXT: v_mov_b32_e32 v8, 0
; GFX6789-NEXT: v_mov_b32_e32 v7, v2
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v9, v8 ; GFX6789-NEXT: v_mov_b32_e32 v9, v8
; GFX6789-NEXT: v_mov_b32_e32 v10, v8 ; GFX6789-NEXT: v_mov_b32_e32 v10, v8
; GFX6789-NEXT: v_mov_b32_e32 v11, v8 ; GFX6789-NEXT: v_mov_b32_e32 v11, v8
; GFX6789-NEXT: v_mov_b32_e32 v12, v8 ; GFX6789-NEXT: v_mov_b32_e32 v12, v8
; GFX6789-NEXT: v_mov_b32_e32 v7, v2
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v8 ; GFX6789-NEXT: v_mov_b32_e32 v0, v8
; GFX6789-NEXT: v_mov_b32_e32 v1, v9 ; GFX6789-NEXT: v_mov_b32_e32 v1, v9
; GFX6789-NEXT: v_mov_b32_e32 v2, v10 ; GFX6789-NEXT: v_mov_b32_e32 v2, v10
; GFX6789-NEXT: v_mov_b32_e32 v3, v11 ; GFX6789-NEXT: v_mov_b32_e32 v3, v11
; GFX6789-NEXT: v_mov_b32_e32 v4, v12 ; GFX6789-NEXT: v_mov_b32_e32 v4, v12
; GFX6789-NEXT: image_load v[0:4], v[5:7], s[0:7] dmask:0xf unorm tfe lwe ; GFX6789-NEXT: image_load v[0:4], v[5:7], s[0:7] dmask:0xf unorm tfe lwe
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: global_store_dword v8, v4, s[8:9] ; GFX6789-NEXT: global_store_dword v8, v4, s[8:9]
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; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0 ; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: ; return to shader part epilog ; FIJI-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: load_2darraymsaa_tfe: ; GFX6789-LABEL: load_2darraymsaa_tfe:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: v_mov_b32_e32 v9, 0 ; GFX6789-NEXT: v_mov_b32_e32 v9, 0
; GFX6789-NEXT: v_mov_b32_e32 v8, v3
; GFX6789-NEXT: v_mov_b32_e32 v7, v2
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v10, v9 ; GFX6789-NEXT: v_mov_b32_e32 v10, v9
; GFX6789-NEXT: v_mov_b32_e32 v11, v9 ; GFX6789-NEXT: v_mov_b32_e32 v11, v9
; GFX6789-NEXT: v_mov_b32_e32 v12, v9 ; GFX6789-NEXT: v_mov_b32_e32 v12, v9
; GFX6789-NEXT: v_mov_b32_e32 v13, v9 ; GFX6789-NEXT: v_mov_b32_e32 v13, v9
; GFX6789-NEXT: v_mov_b32_e32 v8, v3
; GFX6789-NEXT: v_mov_b32_e32 v7, v2
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v9 ; GFX6789-NEXT: v_mov_b32_e32 v0, v9
; GFX6789-NEXT: v_mov_b32_e32 v1, v10 ; GFX6789-NEXT: v_mov_b32_e32 v1, v10
; GFX6789-NEXT: v_mov_b32_e32 v2, v11 ; GFX6789-NEXT: v_mov_b32_e32 v2, v11
; GFX6789-NEXT: v_mov_b32_e32 v3, v12 ; GFX6789-NEXT: v_mov_b32_e32 v3, v12
; GFX6789-NEXT: v_mov_b32_e32 v4, v13 ; GFX6789-NEXT: v_mov_b32_e32 v4, v13
; GFX6789-NEXT: image_load v[0:4], v[5:8], s[0:7] dmask:0xf unorm tfe da ; GFX6789-NEXT: image_load v[0:4], v[5:8], s[0:7] dmask:0xf unorm tfe da
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: global_store_dword v9, v4, s[8:9] ; GFX6789-NEXT: global_store_dword v9, v4, s[8:9]
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; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0 ; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: ; return to shader part epilog ; FIJI-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: load_mip_1d_lwe: ; GFX6789-LABEL: load_mip_1d_lwe:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: v_mov_b32_e32 v7, 0 ; GFX6789-NEXT: v_mov_b32_e32 v7, 0
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v8, v7 ; GFX6789-NEXT: v_mov_b32_e32 v8, v7
; GFX6789-NEXT: v_mov_b32_e32 v9, v7 ; GFX6789-NEXT: v_mov_b32_e32 v9, v7
; GFX6789-NEXT: v_mov_b32_e32 v10, v7 ; GFX6789-NEXT: v_mov_b32_e32 v10, v7
; GFX6789-NEXT: v_mov_b32_e32 v11, v7 ; GFX6789-NEXT: v_mov_b32_e32 v11, v7
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v7 ; GFX6789-NEXT: v_mov_b32_e32 v0, v7
; GFX6789-NEXT: v_mov_b32_e32 v1, v8 ; GFX6789-NEXT: v_mov_b32_e32 v1, v8
; GFX6789-NEXT: v_mov_b32_e32 v2, v9 ; GFX6789-NEXT: v_mov_b32_e32 v2, v9
; GFX6789-NEXT: v_mov_b32_e32 v3, v10 ; GFX6789-NEXT: v_mov_b32_e32 v3, v10
; GFX6789-NEXT: v_mov_b32_e32 v4, v11 ; GFX6789-NEXT: v_mov_b32_e32 v4, v11
; GFX6789-NEXT: image_load_mip v[0:4], v[5:6], s[0:7] dmask:0xf unorm lwe ; GFX6789-NEXT: image_load_mip v[0:4], v[5:6], s[0:7] dmask:0xf unorm lwe
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: global_store_dword v7, v4, s[8:9] ; GFX6789-NEXT: global_store_dword v7, v4, s[8:9]
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; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0 ; FIJI-NEXT: buffer_store_dword v4, off, s[8:11], 0
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: ; return to shader part epilog ; FIJI-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: load_mip_2d_tfe: ; GFX6789-LABEL: load_mip_2d_tfe:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: v_mov_b32_e32 v8, 0 ; GFX6789-NEXT: v_mov_b32_e32 v8, 0
; GFX6789-NEXT: v_mov_b32_e32 v7, v2
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v9, v8 ; GFX6789-NEXT: v_mov_b32_e32 v9, v8
; GFX6789-NEXT: v_mov_b32_e32 v10, v8 ; GFX6789-NEXT: v_mov_b32_e32 v10, v8
; GFX6789-NEXT: v_mov_b32_e32 v11, v8 ; GFX6789-NEXT: v_mov_b32_e32 v11, v8
; GFX6789-NEXT: v_mov_b32_e32 v12, v8 ; GFX6789-NEXT: v_mov_b32_e32 v12, v8
; GFX6789-NEXT: v_mov_b32_e32 v7, v2
; GFX6789-NEXT: v_mov_b32_e32 v6, v1
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v8 ; GFX6789-NEXT: v_mov_b32_e32 v0, v8
; GFX6789-NEXT: v_mov_b32_e32 v1, v9 ; GFX6789-NEXT: v_mov_b32_e32 v1, v9
; GFX6789-NEXT: v_mov_b32_e32 v2, v10 ; GFX6789-NEXT: v_mov_b32_e32 v2, v10
; GFX6789-NEXT: v_mov_b32_e32 v3, v11 ; GFX6789-NEXT: v_mov_b32_e32 v3, v11
; GFX6789-NEXT: v_mov_b32_e32 v4, v12 ; GFX6789-NEXT: v_mov_b32_e32 v4, v12
; GFX6789-NEXT: image_load_mip v[0:4], v[5:7], s[0:7] dmask:0xf unorm tfe ; GFX6789-NEXT: image_load_mip v[0:4], v[5:7], s[0:7] dmask:0xf unorm tfe
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: global_store_dword v8, v4, s[8:9] ; GFX6789-NEXT: global_store_dword v8, v4, s[8:9]
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; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: buffer_store_dword v3, off, s[8:11], 0 ; FIJI-NEXT: buffer_store_dword v3, off, s[8:11], 0
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: ; return to shader part epilog ; FIJI-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: load_1d_tfe_V4_dmask3: ; GFX6789-LABEL: load_1d_tfe_V4_dmask3:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: v_mov_b32_e32 v5, 0 ; GFX6789-NEXT: v_mov_b32_e32 v5, 0
; GFX6789-NEXT: v_mov_b32_e32 v4, v0
; GFX6789-NEXT: v_mov_b32_e32 v6, v5 ; GFX6789-NEXT: v_mov_b32_e32 v6, v5
; GFX6789-NEXT: v_mov_b32_e32 v7, v5 ; GFX6789-NEXT: v_mov_b32_e32 v7, v5
; GFX6789-NEXT: v_mov_b32_e32 v8, v5 ; GFX6789-NEXT: v_mov_b32_e32 v8, v5
; GFX6789-NEXT: v_mov_b32_e32 v4, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v5 ; GFX6789-NEXT: v_mov_b32_e32 v0, v5
; GFX6789-NEXT: v_mov_b32_e32 v1, v6 ; GFX6789-NEXT: v_mov_b32_e32 v1, v6
; GFX6789-NEXT: v_mov_b32_e32 v2, v7 ; GFX6789-NEXT: v_mov_b32_e32 v2, v7
; GFX6789-NEXT: v_mov_b32_e32 v3, v8 ; GFX6789-NEXT: v_mov_b32_e32 v3, v8
; GFX6789-NEXT: image_load v[0:3], v4, s[0:7] dmask:0x7 unorm tfe ; GFX6789-NEXT: image_load v[0:3], v4, s[0:7] dmask:0x7 unorm tfe
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: global_store_dword v5, v3, s[8:9] ; GFX6789-NEXT: global_store_dword v5, v3, s[8:9]
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
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; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: buffer_store_dword v2, off, s[8:11], 0 ; FIJI-NEXT: buffer_store_dword v2, off, s[8:11], 0
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: ; return to shader part epilog ; FIJI-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: load_1d_tfe_V4_dmask2: ; GFX6789-LABEL: load_1d_tfe_V4_dmask2:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: v_mov_b32_e32 v4, 0 ; GFX6789-NEXT: v_mov_b32_e32 v4, 0
; GFX6789-NEXT: v_mov_b32_e32 v3, v0
; GFX6789-NEXT: v_mov_b32_e32 v5, v4 ; GFX6789-NEXT: v_mov_b32_e32 v5, v4
; GFX6789-NEXT: v_mov_b32_e32 v6, v4 ; GFX6789-NEXT: v_mov_b32_e32 v6, v4
; GFX6789-NEXT: v_mov_b32_e32 v3, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v4 ; GFX6789-NEXT: v_mov_b32_e32 v0, v4
; GFX6789-NEXT: v_mov_b32_e32 v1, v5 ; GFX6789-NEXT: v_mov_b32_e32 v1, v5
; GFX6789-NEXT: v_mov_b32_e32 v2, v6 ; GFX6789-NEXT: v_mov_b32_e32 v2, v6
; GFX6789-NEXT: image_load v[0:2], v3, s[0:7] dmask:0x6 unorm tfe ; GFX6789-NEXT: image_load v[0:2], v3, s[0:7] dmask:0x6 unorm tfe
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: global_store_dword v4, v2, s[8:9] ; GFX6789-NEXT: global_store_dword v4, v2, s[8:9]
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: ; return to shader part epilog ; GFX6789-NEXT: ; return to shader part epilog
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; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: buffer_store_dword v1, off, s[8:11], 0 ; FIJI-NEXT: buffer_store_dword v1, off, s[8:11], 0
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: ; return to shader part epilog ; FIJI-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: load_1d_tfe_V4_dmask1: ; GFX6789-LABEL: load_1d_tfe_V4_dmask1:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: v_mov_b32_e32 v3, 0 ; GFX6789-NEXT: v_mov_b32_e32 v3, 0
; GFX6789-NEXT: v_mov_b32_e32 v2, v0
; GFX6789-NEXT: v_mov_b32_e32 v4, v3 ; GFX6789-NEXT: v_mov_b32_e32 v4, v3
; GFX6789-NEXT: v_mov_b32_e32 v2, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v3 ; GFX6789-NEXT: v_mov_b32_e32 v0, v3
; GFX6789-NEXT: v_mov_b32_e32 v1, v4 ; GFX6789-NEXT: v_mov_b32_e32 v1, v4
; GFX6789-NEXT: image_load v[0:1], v2, s[0:7] dmask:0x8 unorm tfe ; GFX6789-NEXT: image_load v[0:1], v2, s[0:7] dmask:0x8 unorm tfe
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: global_store_dword v3, v1, s[8:9] ; GFX6789-NEXT: global_store_dword v3, v1, s[8:9]
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: ; return to shader part epilog ; GFX6789-NEXT: ; return to shader part epilog
; ;
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; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: buffer_store_dword v1, off, s[8:11], 0 ; FIJI-NEXT: buffer_store_dword v1, off, s[8:11], 0
; FIJI-NEXT: s_waitcnt vmcnt(0) ; FIJI-NEXT: s_waitcnt vmcnt(0)
; FIJI-NEXT: ; return to shader part epilog ; FIJI-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: load_1d_tfe_V2_dmask1: ; GFX6789-LABEL: load_1d_tfe_V2_dmask1:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: v_mov_b32_e32 v3, 0 ; GFX6789-NEXT: v_mov_b32_e32 v3, 0
; GFX6789-NEXT: v_mov_b32_e32 v2, v0
; GFX6789-NEXT: v_mov_b32_e32 v4, v3 ; GFX6789-NEXT: v_mov_b32_e32 v4, v3
; GFX6789-NEXT: v_mov_b32_e32 v2, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v3 ; GFX6789-NEXT: v_mov_b32_e32 v0, v3
; GFX6789-NEXT: v_mov_b32_e32 v1, v4 ; GFX6789-NEXT: v_mov_b32_e32 v1, v4
; GFX6789-NEXT: image_load v[0:1], v2, s[0:7] dmask:0x8 unorm tfe ; GFX6789-NEXT: image_load v[0:1], v2, s[0:7] dmask:0x8 unorm tfe
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: global_store_dword v3, v1, s[8:9] ; GFX6789-NEXT: global_store_dword v3, v1, s[8:9]
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
; GFX6789-NEXT: ; return to shader part epilog ; GFX6789-NEXT: ; return to shader part epilog
; ;
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llvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll

Show First 20 Lines • Show All 54 Lines • ▼ Show 20 Lines
; VERDE-NEXT: s_waitcnt vmcnt(0) expcnt(0) ; VERDE-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; VERDE-NEXT: ; return to shader part epilog ; VERDE-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: sample_1d_tfe: ; GFX6789-LABEL: sample_1d_tfe:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: s_mov_b64 s[14:15], exec ; GFX6789-NEXT: s_mov_b64 s[14:15], exec
; GFX6789-NEXT: s_wqm_b64 exec, exec ; GFX6789-NEXT: s_wqm_b64 exec, exec
; GFX6789-NEXT: v_mov_b32_e32 v6, 0 ; GFX6789-NEXT: v_mov_b32_e32 v6, 0
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v7, v6 ; GFX6789-NEXT: v_mov_b32_e32 v7, v6
; GFX6789-NEXT: v_mov_b32_e32 v8, v6 ; GFX6789-NEXT: v_mov_b32_e32 v8, v6
; GFX6789-NEXT: v_mov_b32_e32 v9, v6 ; GFX6789-NEXT: v_mov_b32_e32 v9, v6
; GFX6789-NEXT: v_mov_b32_e32 v10, v6 ; GFX6789-NEXT: v_mov_b32_e32 v10, v6
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v6 ; GFX6789-NEXT: v_mov_b32_e32 v0, v6
; GFX6789-NEXT: v_mov_b32_e32 v1, v7 ; GFX6789-NEXT: v_mov_b32_e32 v1, v7
; GFX6789-NEXT: v_mov_b32_e32 v2, v8 ; GFX6789-NEXT: v_mov_b32_e32 v2, v8
; GFX6789-NEXT: v_mov_b32_e32 v3, v9 ; GFX6789-NEXT: v_mov_b32_e32 v3, v9
; GFX6789-NEXT: v_mov_b32_e32 v4, v10 ; GFX6789-NEXT: v_mov_b32_e32 v4, v10
; GFX6789-NEXT: s_and_b64 exec, exec, s[14:15] ; GFX6789-NEXT: s_and_b64 exec, exec, s[14:15]
; GFX6789-NEXT: image_sample v[0:4], v5, s[0:7], s[8:11] dmask:0xf tfe ; GFX6789-NEXT: image_sample v[0:4], v5, s[0:7], s[8:11] dmask:0xf tfe
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
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; VERDE-NEXT: s_waitcnt vmcnt(0) expcnt(0) ; VERDE-NEXT: s_waitcnt vmcnt(0) expcnt(0)
; VERDE-NEXT: ; return to shader part epilog ; VERDE-NEXT: ; return to shader part epilog
; ;
; GFX6789-LABEL: sample_1d_lwe: ; GFX6789-LABEL: sample_1d_lwe:
; GFX6789: ; %bb.0: ; %main_body ; GFX6789: ; %bb.0: ; %main_body
; GFX6789-NEXT: s_mov_b64 s[14:15], exec ; GFX6789-NEXT: s_mov_b64 s[14:15], exec
; GFX6789-NEXT: s_wqm_b64 exec, exec ; GFX6789-NEXT: s_wqm_b64 exec, exec
; GFX6789-NEXT: v_mov_b32_e32 v6, 0 ; GFX6789-NEXT: v_mov_b32_e32 v6, 0
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v7, v6 ; GFX6789-NEXT: v_mov_b32_e32 v7, v6
; GFX6789-NEXT: v_mov_b32_e32 v8, v6 ; GFX6789-NEXT: v_mov_b32_e32 v8, v6
; GFX6789-NEXT: v_mov_b32_e32 v9, v6 ; GFX6789-NEXT: v_mov_b32_e32 v9, v6
; GFX6789-NEXT: v_mov_b32_e32 v10, v6 ; GFX6789-NEXT: v_mov_b32_e32 v10, v6
; GFX6789-NEXT: v_mov_b32_e32 v5, v0
; GFX6789-NEXT: v_mov_b32_e32 v0, v6 ; GFX6789-NEXT: v_mov_b32_e32 v0, v6
; GFX6789-NEXT: v_mov_b32_e32 v1, v7 ; GFX6789-NEXT: v_mov_b32_e32 v1, v7
; GFX6789-NEXT: v_mov_b32_e32 v2, v8 ; GFX6789-NEXT: v_mov_b32_e32 v2, v8
; GFX6789-NEXT: v_mov_b32_e32 v3, v9 ; GFX6789-NEXT: v_mov_b32_e32 v3, v9
; GFX6789-NEXT: v_mov_b32_e32 v4, v10 ; GFX6789-NEXT: v_mov_b32_e32 v4, v10
; GFX6789-NEXT: s_and_b64 exec, exec, s[14:15] ; GFX6789-NEXT: s_and_b64 exec, exec, s[14:15]
; GFX6789-NEXT: image_sample v[0:4], v5, s[0:7], s[8:11] dmask:0xf lwe ; GFX6789-NEXT: image_sample v[0:4], v5, s[0:7], s[8:11] dmask:0xf lwe
; GFX6789-NEXT: s_waitcnt vmcnt(0) ; GFX6789-NEXT: s_waitcnt vmcnt(0)
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llvm/test/CodeGen/AMDGPU/load-constant-i16.ll

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Show First 20 Lines • Show All 161 Lines • ▼ Show 20 Lines
; GCN-HSA-LABEL: constant_load_v3i16: ; GCN-HSA-LABEL: constant_load_v3i16:
; GCN-HSA: ; %bb.0: ; %entry ; GCN-HSA: ; %bb.0: ; %entry
; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0 ; GCN-HSA-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
; GCN-HSA-NEXT: s_add_u32 s4, s0, 4 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 4
; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s2
; GCN-HSA-NEXT: flat_store_short v[2:3], v4 ; GCN-HSA-NEXT: flat_store_short v[2:3], v4
; GCN-HSA-NEXT: flat_store_dword v[0:1], v5 ; GCN-HSA-NEXT: flat_store_dword v[0:1], v5
; GCN-HSA-NEXT: s_endpgm ; GCN-HSA-NEXT: s_endpgm
; ;
; GCN-NOHSA-VI-LABEL: constant_load_v3i16: ; GCN-NOHSA-VI-LABEL: constant_load_v3i16:
; GCN-NOHSA-VI: ; %bb.0: ; %entry ; GCN-NOHSA-VI: ; %bb.0: ; %entry
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; GCN-HSA-NEXT: s_addc_u32 s11, s9, 0 ; GCN-HSA-NEXT: s_addc_u32 s11, s9, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, s11
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7
; GCN-HSA-NEXT: flat_store_dwordx4 v[6:7], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: flat_store_dwordx4 v[6:7], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
; GCN-HSA-NEXT: s_endpgm ; GCN-HSA-NEXT: s_endpgm
; ;
; GCN-NOHSA-VI-LABEL: constant_load_v16i16: ; GCN-NOHSA-VI-LABEL: constant_load_v16i16:
; GCN-NOHSA-VI: ; %bb.0: ; %entry ; GCN-NOHSA-VI: ; %bb.0: ; %entry
; GCN-NOHSA-VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24 ; GCN-NOHSA-VI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
; GCN-NOHSA-VI-NEXT: s_mov_b32 s11, 0xf000 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s11, 0xf000
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; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT: s_endpgm ; GCN-NOHSA-SI-NEXT: s_endpgm
; ;
; GCN-HSA-LABEL: constant_load_v16i16_align2: ; GCN-HSA-LABEL: constant_load_v16i16_align2:
; GCN-HSA: ; %bb.0: ; %entry ; GCN-HSA: ; %bb.0: ; %entry
; GCN-HSA-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: s_waitcnt vmcnt(0)
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[0:3]
; GCN-HSA-NEXT: s_endpgm ; GCN-HSA-NEXT: s_endpgm
; ;
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; GCN-HSA-NEXT: s_and_b32 s5, s5, s8 ; GCN-HSA-NEXT: s_and_b32 s5, s5, s8
; GCN-HSA-NEXT: s_and_b32 s4, s4, s8 ; GCN-HSA-NEXT: s_and_b32 s4, s4, s8
; GCN-HSA-NEXT: s_and_b32 s7, s7, s8 ; GCN-HSA-NEXT: s_and_b32 s7, s7, s8
; GCN-HSA-NEXT: s_and_b32 s6, s6, s8 ; GCN-HSA-NEXT: s_and_b32 s6, s6, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
▲ Show 20 Lines • Show All 109 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_ashr_i32 s8, s5, 16 ; GCN-HSA-NEXT: s_ashr_i32 s8, s5, 16
; GCN-HSA-NEXT: s_ashr_i32 s9, s4, 16 ; GCN-HSA-NEXT: s_ashr_i32 s9, s4, 16
; GCN-HSA-NEXT: s_ashr_i32 s2, s7, 16 ; GCN-HSA-NEXT: s_ashr_i32 s2, s7, 16
; GCN-HSA-NEXT: s_ashr_i32 s3, s6, 16 ; GCN-HSA-NEXT: s_ashr_i32 s3, s6, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_sext_i32_i16 s7, s7 ; GCN-HSA-NEXT: s_sext_i32_i16 s7, s7
; GCN-HSA-NEXT: s_sext_i32_i16 s6, s6 ; GCN-HSA-NEXT: s_sext_i32_i16 s6, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_sext_i32_i16 s5, s5
; GCN-HSA-NEXT: s_sext_i32_i16 s4, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_sext_i32_i16 s5, s5
; GCN-HSA-NEXT: s_sext_i32_i16 s4, s4
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
▲ Show 20 Lines • Show All 142 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_and_b32 s9, s9, s12 ; GCN-HSA-NEXT: s_and_b32 s9, s9, s12
; GCN-HSA-NEXT: s_and_b32 s8, s8, s12 ; GCN-HSA-NEXT: s_and_b32 s8, s8, s12
; GCN-HSA-NEXT: s_and_b32 s11, s11, s12 ; GCN-HSA-NEXT: s_and_b32 s11, s11, s12
; GCN-HSA-NEXT: s_and_b32 s10, s10, s12 ; GCN-HSA-NEXT: s_and_b32 s10, s10, s12
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s11
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s18 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s18
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s17
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s16 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s16
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s15
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
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; GCN-HSA-NEXT: s_ashr_i32 s16, s9, 16 ; GCN-HSA-NEXT: s_ashr_i32 s16, s9, 16
; GCN-HSA-NEXT: s_ashr_i32 s17, s8, 16 ; GCN-HSA-NEXT: s_ashr_i32 s17, s8, 16
; GCN-HSA-NEXT: s_ashr_i32 s2, s11, 16 ; GCN-HSA-NEXT: s_ashr_i32 s2, s11, 16
; GCN-HSA-NEXT: s_ashr_i32 s3, s10, 16 ; GCN-HSA-NEXT: s_ashr_i32 s3, s10, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_sext_i32_i16 s11, s11 ; GCN-HSA-NEXT: s_sext_i32_i16 s11, s11
; GCN-HSA-NEXT: s_sext_i32_i16 s10, s10 ; GCN-HSA-NEXT: s_sext_i32_i16 s10, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s11
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_sext_i32_i16 s9, s9 ; GCN-HSA-NEXT: s_sext_i32_i16 s9, s9
; GCN-HSA-NEXT: s_sext_i32_i16 s8, s8 ; GCN-HSA-NEXT: s_sext_i32_i16 s8, s8
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: s_sext_i32_i16 s7, s7
; GCN-HSA-NEXT: s_sext_i32_i16 s6, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s17
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s16 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_sext_i32_i16 s7, s7 ; GCN-HSA-NEXT: s_sext_i32_i16 s5, s5
; GCN-HSA-NEXT: s_sext_i32_i16 s6, s6 ; GCN-HSA-NEXT: s_sext_i32_i16 s4, s4
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s15
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s14 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s14
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_sext_i32_i16 s5, s5
; GCN-HSA-NEXT: s_sext_i32_i16 s4, s4
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s13 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s13
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s12 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s12
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
▲ Show 20 Lines • Show All 240 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_lshr_b32 s15, s15, 16 ; GCN-HSA-NEXT: s_lshr_b32 s15, s15, 16
; GCN-HSA-NEXT: s_lshr_b32 s14, s14, 16 ; GCN-HSA-NEXT: s_lshr_b32 s14, s14, 16
; GCN-HSA-NEXT: s_lshr_b32 s17, s17, 16 ; GCN-HSA-NEXT: s_lshr_b32 s17, s17, 16
; GCN-HSA-NEXT: s_lshr_b32 s16, s16, 16 ; GCN-HSA-NEXT: s_lshr_b32 s16, s16, 16
; GCN-HSA-NEXT: s_lshr_b32 s19, s19, 16 ; GCN-HSA-NEXT: s_lshr_b32 s19, s19, 16
; GCN-HSA-NEXT: s_lshr_b32 s18, s18, 16 ; GCN-HSA-NEXT: s_lshr_b32 s18, s18, 16
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s20 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s20
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s18 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s18
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s36 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s36
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s19 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s19
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s35 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s35
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s16
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s16
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s34 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, s34
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, s17
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[4:7]
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s33 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s33
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 64
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s14 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s14
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s31 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s31
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s15
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s30 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s30
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s12 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s12
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s29 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s29
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s13 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s13
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s28 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s28
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s27 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s27
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s11
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s26 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s26
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s25 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s25
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s24 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s24
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s23 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s23
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
▲ Show 20 Lines • Show All 305 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_ashr_i32 s30, s15, 16 ; GCN-HSA-NEXT: s_ashr_i32 s30, s15, 16
; GCN-HSA-NEXT: s_ashr_i32 s31, s14, 16 ; GCN-HSA-NEXT: s_ashr_i32 s31, s14, 16
; GCN-HSA-NEXT: s_ashr_i32 s33, s17, 16 ; GCN-HSA-NEXT: s_ashr_i32 s33, s17, 16
; GCN-HSA-NEXT: s_ashr_i32 s34, s16, 16 ; GCN-HSA-NEXT: s_ashr_i32 s34, s16, 16
; GCN-HSA-NEXT: s_ashr_i32 s35, s19, 16 ; GCN-HSA-NEXT: s_ashr_i32 s35, s19, 16
; GCN-HSA-NEXT: s_ashr_i32 s36, s18, 16 ; GCN-HSA-NEXT: s_ashr_i32 s36, s18, 16
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s3
; GCN-HSA-NEXT: s_sext_i32_i16 s16, s16 ; GCN-HSA-NEXT: s_sext_i32_i16 s16, s16
; GCN-HSA-NEXT: s_sext_i32_i16 s19, s19 ; GCN-HSA-NEXT: s_sext_i32_i16 s19, s19
; GCN-HSA-NEXT: s_sext_i32_i16 s18, s18 ; GCN-HSA-NEXT: s_sext_i32_i16 s18, s18
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50
; GCN-HSA-NEXT: s_sext_i32_i16 s17, s17 ; GCN-HSA-NEXT: s_sext_i32_i16 s17, s17
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s18 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s18
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s36 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s36
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s19 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s19
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s35 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s35
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s34
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_sext_i32_i16 s15, s15
; GCN-HSA-NEXT: s_sext_i32_i16 s14, s14
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s34
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, s17
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s33 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, s33
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[4:7]
; GCN-HSA-NEXT: s_sext_i32_i16 s15, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_sext_i32_i16 s14, s14
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 64
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s14
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s31 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s31
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s15
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s30 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s30
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_sext_i32_i16 s13, s13 ; GCN-HSA-NEXT: s_sext_i32_i16 s13, s13
; GCN-HSA-NEXT: s_sext_i32_i16 s12, s12 ; GCN-HSA-NEXT: s_sext_i32_i16 s12, s12
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s12 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s12
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s29 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s29
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s13 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s13
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s28 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s28
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_sext_i32_i16 s11, s11 ; GCN-HSA-NEXT: s_sext_i32_i16 s11, s11
; GCN-HSA-NEXT: s_sext_i32_i16 s10, s10 ; GCN-HSA-NEXT: s_sext_i32_i16 s10, s10
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s27 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s27
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s11
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s26 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s26
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_sext_i32_i16 s9, s9 ; GCN-HSA-NEXT: s_sext_i32_i16 s9, s9
; GCN-HSA-NEXT: s_sext_i32_i16 s8, s8 ; GCN-HSA-NEXT: s_sext_i32_i16 s8, s8
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: s_sext_i32_i16 s7, s7
; GCN-HSA-NEXT: s_sext_i32_i16 s6, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s25 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s25
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s24 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s24
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_sext_i32_i16 s7, s7 ; GCN-HSA-NEXT: s_sext_i32_i16 s5, s5
; GCN-HSA-NEXT: s_sext_i32_i16 s6, s6 ; GCN-HSA-NEXT: s_sext_i32_i16 s4, s4
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s23 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s23
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s22 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s22
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_sext_i32_i16 s5, s5
; GCN-HSA-NEXT: s_sext_i32_i16 s4, s4
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s21 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s21
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s20 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s20
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
▲ Show 20 Lines • Show All 433 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_lshr_b32 s47, s47, 16 ; GCN-HSA-NEXT: s_lshr_b32 s47, s47, 16
; GCN-HSA-NEXT: s_lshr_b32 s46, s46, 16 ; GCN-HSA-NEXT: s_lshr_b32 s46, s46, 16
; GCN-HSA-NEXT: s_lshr_b32 s49, s49, 16 ; GCN-HSA-NEXT: s_lshr_b32 s49, s49, 16
; GCN-HSA-NEXT: s_lshr_b32 s48, s48, 16 ; GCN-HSA-NEXT: s_lshr_b32 s48, s48, 16
; GCN-HSA-NEXT: s_lshr_b32 s51, s51, 16 ; GCN-HSA-NEXT: s_lshr_b32 s51, s51, 16
; GCN-HSA-NEXT: s_lshr_b32 s50, s50, 16 ; GCN-HSA-NEXT: s_lshr_b32 s50, s50, 16
; GCN-HSA-NEXT: s_add_u32 s6, s16, 0xf0 ; GCN-HSA-NEXT: s_add_u32 s6, s16, 0xf0
; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v21, s6
; GCN-HSA-NEXT: s_add_u32 s6, s16, 0xe0 ; GCN-HSA-NEXT: s_add_u32 s6, s16, 0xe0
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s7
; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v25, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v24, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v24, s6
; GCN-HSA-NEXT: s_add_u32 s6, s16, 0xd0 ; GCN-HSA-NEXT: s_add_u32 s6, s16, 0xd0
; GCN-HSA-NEXT: v_mov_b32_e32 v25, s7
; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v27, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v26, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v26, s6
; GCN-HSA-NEXT: s_add_u32 s6, s16, 0xc0 ; GCN-HSA-NEXT: s_add_u32 s6, s16, 0xc0
; GCN-HSA-NEXT: v_mov_b32_e32 v27, s7
; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v29, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v28, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v28, s6
; GCN-HSA-NEXT: s_add_u32 s6, s16, 0xb0 ; GCN-HSA-NEXT: s_add_u32 s6, s16, 0xb0
; GCN-HSA-NEXT: v_mov_b32_e32 v29, s7
; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v31, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v30, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v30, s6
; GCN-HSA-NEXT: s_add_u32 s6, s16, 0xa0 ; GCN-HSA-NEXT: s_add_u32 s6, s16, 0xa0
; GCN-HSA-NEXT: v_mov_b32_e32 v31, s7
; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v33, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v32, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v32, s6
; GCN-HSA-NEXT: s_add_u32 s6, s16, 0x90 ; GCN-HSA-NEXT: s_add_u32 s6, s16, 0x90
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s67 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s67
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s48 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s48
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s66 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, s66
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s49 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, s49
; GCN-HSA-NEXT: v_mov_b32_e32 v33, s7
; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7]
; GCN-HSA-NEXT: v_mov_b32_e32 v25, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v24, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v24, s6
; GCN-HSA-NEXT: s_add_u32 s6, s16, 0x80 ; GCN-HSA-NEXT: s_add_u32 s6, s16, 0x80
; GCN-HSA-NEXT: v_mov_b32_e32 v25, s7
; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v35, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v34, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v34, s6
; GCN-HSA-NEXT: s_add_u32 s6, s16, 0x70 ; GCN-HSA-NEXT: s_add_u32 s6, s16, 0x70
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s61 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s61
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s42 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s42
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s60 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s60
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s43 ; GCN-HSA-NEXT: v_mov_b32_e32 v19, s43
; GCN-HSA-NEXT: v_mov_b32_e32 v35, s7
; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[16:19] ; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[16:19]
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s53 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s53
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s6
; GCN-HSA-NEXT: s_add_u32 s6, s16, 0x60 ; GCN-HSA-NEXT: s_add_u32 s6, s16, 0x60
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s7
; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s50 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s50
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s68 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s68
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s51 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s51
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s6
; GCN-HSA-NEXT: s_add_u32 s6, s16, 0x50
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s65 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s65
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s46 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s46
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s64 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s64
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s47 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s47
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s63 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s63
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s44 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s44
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s62 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s62
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s45 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s45
; GCN-HSA-NEXT: v_mov_b32_e32 v20, s59 ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s59
; GCN-HSA-NEXT: flat_store_dwordx4 v[21:22], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[21:22], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s40 ; GCN-HSA-NEXT: v_mov_b32_e32 v21, s40
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s57 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s57
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s58 ; GCN-HSA-NEXT: v_mov_b32_e32 v22, s58
; GCN-HSA-NEXT: v_mov_b32_e32 v23, s41 ; GCN-HSA-NEXT: v_mov_b32_e32 v23, s41
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s38 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s38
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s56 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s56
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s19 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s19
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s39 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s39
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s7
; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s36 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s36
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s6
; GCN-HSA-NEXT: s_add_u32 s6, s16, 0x50
; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[8:11] ; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[8:11]
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s18 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, s18
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s14 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s14
; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[12:15] ; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[12:15]
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s37 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, s37
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s12 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s12
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s52 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s52
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s15
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s35 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s35
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s34 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s34
; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[20:23] ; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[20:23]
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s13 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s13
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s33 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s33
; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[0:3]
; GCN-HSA-NEXT: flat_store_dwordx4 v[34:35], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[34:35], v[4:7]
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11] ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11]
; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[12:15] ; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[12:15]
; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6
; GCN-HSA-NEXT: s_add_u32 s6, s16, 64
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s31 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s31
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s11
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s30 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s30
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7
; GCN-HSA-NEXT: s_add_u32 s6, s16, 64
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6
; GCN-HSA-NEXT: s_add_u32 s6, s16, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s29 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s29
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s28 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s28
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7
; GCN-HSA-NEXT: s_add_u32 s6, s16, 48
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s55 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s55
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s27 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s27
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s54 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s54
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s26 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s26
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_nop 0 ; GCN-HSA-NEXT: s_nop 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: s_add_u32 s4, s16, 32 ; GCN-HSA-NEXT: s_add_u32 s4, s16, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5
; GCN-HSA-NEXT: s_addc_u32 s5, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s25 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s25
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s24 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s24
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_nop 0 ; GCN-HSA-NEXT: s_nop 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: s_add_u32 s2, s16, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s16, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s23 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s23
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s22 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s22
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s21 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s21
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s20 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s20
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17
▲ Show 20 Lines • Show All 574 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_ashr_i32 s63, s47, 16 ; GCN-HSA-NEXT: s_ashr_i32 s63, s47, 16
; GCN-HSA-NEXT: s_ashr_i32 s64, s46, 16 ; GCN-HSA-NEXT: s_ashr_i32 s64, s46, 16
; GCN-HSA-NEXT: s_ashr_i32 s65, s49, 16 ; GCN-HSA-NEXT: s_ashr_i32 s65, s49, 16
; GCN-HSA-NEXT: s_ashr_i32 s66, s48, 16 ; GCN-HSA-NEXT: s_ashr_i32 s66, s48, 16
; GCN-HSA-NEXT: s_ashr_i32 s67, s51, 16 ; GCN-HSA-NEXT: s_ashr_i32 s67, s51, 16
; GCN-HSA-NEXT: s_ashr_i32 s68, s50, 16 ; GCN-HSA-NEXT: s_ashr_i32 s68, s50, 16
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xf0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xf0
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v21, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xe0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xe0
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v25, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v24, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v24, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xd0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xd0
; GCN-HSA-NEXT: v_mov_b32_e32 v25, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v27, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v26, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v26, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xc0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xc0
; GCN-HSA-NEXT: v_mov_b32_e32 v27, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v29, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v28, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v28, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xb0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xb0
; GCN-HSA-NEXT: v_mov_b32_e32 v29, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v31, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v30, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v30, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xa0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xa0
; GCN-HSA-NEXT: v_mov_b32_e32 v31, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v33, s3
; GCN-HSA-NEXT: s_sext_i32_i16 s49, s49 ; GCN-HSA-NEXT: s_sext_i32_i16 s49, s49
; GCN-HSA-NEXT: s_sext_i32_i16 s48, s48 ; GCN-HSA-NEXT: s_sext_i32_i16 s48, s48
; GCN-HSA-NEXT: v_mov_b32_e32 v32, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v32, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x90 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x90
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s48 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s48
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s66 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s66
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s49 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, s49
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s65 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, s65
; GCN-HSA-NEXT: v_mov_b32_e32 v33, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7]
; GCN-HSA-NEXT: v_mov_b32_e32 v25, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v24, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v24, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80
; GCN-HSA-NEXT: v_mov_b32_e32 v25, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v35, s3
; GCN-HSA-NEXT: s_sext_i32_i16 s43, s43 ; GCN-HSA-NEXT: s_sext_i32_i16 s43, s43
; GCN-HSA-NEXT: s_sext_i32_i16 s42, s42 ; GCN-HSA-NEXT: s_sext_i32_i16 s42, s42
; GCN-HSA-NEXT: v_mov_b32_e32 v34, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v34, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s42 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s42
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s60 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s60
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s43 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s43
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s59 ; GCN-HSA-NEXT: v_mov_b32_e32 v19, s59
; GCN-HSA-NEXT: v_mov_b32_e32 v35, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[16:19] ; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[16:19]
; GCN-HSA-NEXT: s_sext_i32_i16 s51, s51 ; GCN-HSA-NEXT: s_sext_i32_i16 s51, s51
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_sext_i32_i16 s50, s50 ; GCN-HSA-NEXT: s_sext_i32_i16 s50, s50
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_sext_i32_i16 s36, s36 ; GCN-HSA-NEXT: s_sext_i32_i16 s36, s36
; GCN-HSA-NEXT: s_sext_i32_i16 s39, s39 ; GCN-HSA-NEXT: s_sext_i32_i16 s39, s39
; GCN-HSA-NEXT: s_sext_i32_i16 s38, s38 ; GCN-HSA-NEXT: s_sext_i32_i16 s38, s38
; GCN-HSA-NEXT: s_sext_i32_i16 s41, s41 ; GCN-HSA-NEXT: s_sext_i32_i16 s41, s41
; GCN-HSA-NEXT: s_sext_i32_i16 s40, s40 ; GCN-HSA-NEXT: s_sext_i32_i16 s40, s40
; GCN-HSA-NEXT: s_sext_i32_i16 s45, s45 ; GCN-HSA-NEXT: s_sext_i32_i16 s45, s45
; GCN-HSA-NEXT: s_sext_i32_i16 s44, s44 ; GCN-HSA-NEXT: s_sext_i32_i16 s44, s44
; GCN-HSA-NEXT: s_sext_i32_i16 s47, s47 ; GCN-HSA-NEXT: s_sext_i32_i16 s47, s47
Show All 22 Lines
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s58 ; GCN-HSA-NEXT: v_mov_b32_e32 v21, s58
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s38 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s38
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s41 ; GCN-HSA-NEXT: v_mov_b32_e32 v22, s41
; GCN-HSA-NEXT: v_mov_b32_e32 v23, s57 ; GCN-HSA-NEXT: v_mov_b32_e32 v23, s57
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s56 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s56
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s39 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s39
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s36 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s36
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s55 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s55
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s54 ; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_sext_i32_i16 s27, s27
; GCN-HSA-NEXT: s_sext_i32_i16 s26, s26
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s54
; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[8:11] ; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[8:11]
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s37 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, s37
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s30 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s30
; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[12:15] ; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[12:15]
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s53 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, s53
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s28 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s28
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s52 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s52
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s31 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s31
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s35 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s35
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s34 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s34
; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[20:23] ; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[20:23]
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s29 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s29
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s33 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s33
; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[0:3]
; GCN-HSA-NEXT: flat_store_dwordx4 v[34:35], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[34:35], v[4:7]
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11] ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11]
; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[12:15] ; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[12:15]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_sext_i32_i16 s27, s27
; GCN-HSA-NEXT: s_sext_i32_i16 s26, s26
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 64
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s26 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s26
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s25 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s25
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s27 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s27
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s24 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s24
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s23 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s23
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s21 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s21
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s22 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s22
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s20 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s20
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s19 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s19
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s17
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s18 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s18
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s16 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s15
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s13 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s13
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s14 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s14
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s12 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s12
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s11
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
▲ Show 20 Lines • Show All 882 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_lshr_b32 s4, s3, 16 ; GCN-HSA-NEXT: s_lshr_b32 s4, s3, 16
; GCN-HSA-NEXT: s_lshr_b32 s5, s2, 16 ; GCN-HSA-NEXT: s_lshr_b32 s5, s2, 16
; GCN-HSA-NEXT: s_and_b32 s7, s2, s6 ; GCN-HSA-NEXT: s_and_b32 s7, s2, s6
; GCN-HSA-NEXT: s_and_b32 s2, s3, s6 ; GCN-HSA-NEXT: s_and_b32 s2, s3, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_endpgm ; GCN-HSA-NEXT: s_endpgm
▲ Show 20 Lines • Show All 101 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[2:3], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[2:3], 0x100000
; GCN-HSA-NEXT: s_ashr_i64 s[2:3], s[2:3], 48 ; GCN-HSA-NEXT: s_ashr_i64 s[2:3], s[2:3], 48
; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[6:7], s[6:7], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[4:5], s[4:5], 0x100000
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
▲ Show 20 Lines • Show All 125 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_and_b32 s4, s4, s8 ; GCN-HSA-NEXT: s_and_b32 s4, s4, s8
; GCN-HSA-NEXT: s_and_b32 s6, s6, s8 ; GCN-HSA-NEXT: s_and_b32 s6, s6, s8
; GCN-HSA-NEXT: s_and_b32 s5, s5, s8 ; GCN-HSA-NEXT: s_and_b32 s5, s5, s8
; GCN-HSA-NEXT: s_and_b32 s3, s7, s8 ; GCN-HSA-NEXT: s_and_b32 s3, s7, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
▲ Show 20 Lines • Show All 154 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[12:13], s[12:13], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[10:11], s[10:11], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[8:9], s[8:9], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[2:3], s[2:3], 0x100000
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s16 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s16
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s17
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s11
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
▲ Show 20 Lines • Show All 197 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_and_b32 s5, s5, s12 ; GCN-HSA-NEXT: s_and_b32 s5, s5, s12
; GCN-HSA-NEXT: s_and_b32 s7, s7, s12 ; GCN-HSA-NEXT: s_and_b32 s7, s7, s12
; GCN-HSA-NEXT: s_and_b32 s11, s11, s12 ; GCN-HSA-NEXT: s_and_b32 s11, s11, s12
; GCN-HSA-NEXT: s_and_b32 s3, s9, s12 ; GCN-HSA-NEXT: s_and_b32 s3, s9, s12
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s11
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s15
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s14 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s14
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 64
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s13 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s13
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s16 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s17
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s18 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s18
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
▲ Show 20 Lines • Show All 259 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[26:27], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[14:15], s[26:27], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[24:25], s[24:25], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[22:23], s[22:23], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[20:21], s[20:21], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[18:19], s[18:19], 0x100000
; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[16:17], s[16:17], 0x100000
; GCN-HSA-NEXT: s_add_u32 s26, s0, 0x70 ; GCN-HSA-NEXT: s_add_u32 s26, s0, 0x70
; GCN-HSA-NEXT: s_addc_u32 s27, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s27, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s26
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s12 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, s12
; GCN-HSA-NEXT: s_add_u32 s12, s0, 0x50 ; GCN-HSA-NEXT: s_add_u32 s12, s0, 0x50
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s26
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s27 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s27
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s13 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, s13
; GCN-HSA-NEXT: s_addc_u32 s13, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s13, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s12
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s12
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s13 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s13
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[4:7]
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s10
; GCN-HSA-NEXT: s_add_u32 s10, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s10, s0, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s11
; GCN-HSA-NEXT: s_addc_u32 s11, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s11, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s18 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s18
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s19 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s19
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_nop 0 ; GCN-HSA-NEXT: s_nop 0
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s8
; GCN-HSA-NEXT: s_add_u32 s8, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s8, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s9
; GCN-HSA-NEXT: s_addc_u32 s9, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s9, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8
; GCN-HSA-NEXT: s_add_u32 s8, s0, 0x60
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s20 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s20
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s21 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s21
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9
; GCN-HSA-NEXT: s_add_u32 s8, s0, 0x60
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_addc_u32 s9, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s9, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8
; GCN-HSA-NEXT: s_add_u32 s8, s0, 64
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s34 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s34
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s35 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s35
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s22 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s22
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s23 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s23
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9
; GCN-HSA-NEXT: s_add_u32 s8, s0, 64
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_addc_u32 s9, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s9, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s30 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s30
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s31 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s31
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s24 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s24
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s25 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s25
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_nop 0 ; GCN-HSA-NEXT: s_nop 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: s_add_u32 s4, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s14 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s14
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s15
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
▲ Show 20 Lines • Show All 323 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_lshr_b32 s14, s14, 16 ; GCN-HSA-NEXT: s_lshr_b32 s14, s14, 16
; GCN-HSA-NEXT: s_lshr_b32 s12, s12, 16 ; GCN-HSA-NEXT: s_lshr_b32 s12, s12, 16
; GCN-HSA-NEXT: s_lshr_b32 s10, s10, 16 ; GCN-HSA-NEXT: s_lshr_b32 s10, s10, 16
; GCN-HSA-NEXT: s_lshr_b32 s8, s8, 16 ; GCN-HSA-NEXT: s_lshr_b32 s8, s8, 16
; GCN-HSA-NEXT: s_lshr_b32 s6, s6, 16 ; GCN-HSA-NEXT: s_lshr_b32 s6, s6, 16
; GCN-HSA-NEXT: s_lshr_b32 s4, s4, 16 ; GCN-HSA-NEXT: s_lshr_b32 s4, s4, 16
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xf0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xf0
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xd0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xd0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xb0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xb0
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x90 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x90
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s20 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s20
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s19 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s19
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s2
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s36 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s36
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s17
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s3
; GCN-HSA-NEXT: flat_store_dwordx4 v[6:7], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[6:7], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s35 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s35
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s15
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s34 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s34
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s13 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s13
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50
; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[0:3]
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s33 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s33
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s11
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s31 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s31
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s30 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s30
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xe0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xe0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s29 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s29
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xc0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xc0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s28 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s28
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s18 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s18
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xa0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xa0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s27 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s27
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s16 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s26 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s26
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s14 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s14
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s25 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s25
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s12 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s12
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 64
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s24 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s24
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s23 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s23
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s22 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s22
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
▲ Show 20 Lines • Show All 472 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x100000 ; GCN-HSA-NEXT: s_bfe_i64 s[44:45], s[44:45], 0x100000
; GCN-HSA-NEXT: s_add_u32 s56, s16, 0xf0 ; GCN-HSA-NEXT: s_add_u32 s56, s16, 0xf0
; GCN-HSA-NEXT: s_addc_u32 s57, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s57, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s44 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s44
; GCN-HSA-NEXT: s_add_u32 s44, s16, 0xd0 ; GCN-HSA-NEXT: s_add_u32 s44, s16, 0xd0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s45 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s45
; GCN-HSA-NEXT: s_addc_u32 s45, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s45, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v24, s44 ; GCN-HSA-NEXT: v_mov_b32_e32 v24, s44
; GCN-HSA-NEXT: v_mov_b32_e32 v25, s45
; GCN-HSA-NEXT: s_add_u32 s44, s16, 0xb0 ; GCN-HSA-NEXT: s_add_u32 s44, s16, 0xb0
; GCN-HSA-NEXT: v_mov_b32_e32 v25, s45
; GCN-HSA-NEXT: s_addc_u32 s45, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s45, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v26, s44 ; GCN-HSA-NEXT: v_mov_b32_e32 v26, s44
; GCN-HSA-NEXT: v_mov_b32_e32 v27, s45
; GCN-HSA-NEXT: s_add_u32 s44, s16, 0x90 ; GCN-HSA-NEXT: s_add_u32 s44, s16, 0x90
; GCN-HSA-NEXT: v_mov_b32_e32 v27, s45
; GCN-HSA-NEXT: s_addc_u32 s45, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s45, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v28, s44 ; GCN-HSA-NEXT: v_mov_b32_e32 v28, s44
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s56
; GCN-HSA-NEXT: v_mov_b32_e32 v29, s45
; GCN-HSA-NEXT: s_add_u32 s44, s16, 0x70 ; GCN-HSA-NEXT: s_add_u32 s44, s16, 0x70
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s56
; GCN-HSA-NEXT: v_mov_b32_e32 v23, s57 ; GCN-HSA-NEXT: v_mov_b32_e32 v23, s57
; GCN-HSA-NEXT: v_mov_b32_e32 v29, s45
; GCN-HSA-NEXT: s_addc_u32 s45, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s45, s17, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s40 ; GCN-HSA-NEXT: v_mov_b32_e32 v22, s40
; GCN-HSA-NEXT: s_add_u32 s40, s16, 0x50 ; GCN-HSA-NEXT: s_add_u32 s40, s16, 0x50
; GCN-HSA-NEXT: v_mov_b32_e32 v23, s41 ; GCN-HSA-NEXT: v_mov_b32_e32 v23, s41
; GCN-HSA-NEXT: s_addc_u32 s41, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s41, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s80
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s81
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s38 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s38
; GCN-HSA-NEXT: s_add_u32 s38, s16, 48 ; GCN-HSA-NEXT: s_add_u32 s38, s16, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s80
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s81
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s39 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s39
; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7]
; GCN-HSA-NEXT: s_addc_u32 s39, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s39, s17, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[4:7]
; GCN-HSA-NEXT: v_mov_b32_e32 v24, s38 ; GCN-HSA-NEXT: v_mov_b32_e32 v24, s38
; GCN-HSA-NEXT: v_mov_b32_e32 v25, s39
; GCN-HSA-NEXT: s_add_u32 s38, s16, 16 ; GCN-HSA-NEXT: s_add_u32 s38, s16, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s46 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s46
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s47 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s47
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s78 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s78
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s79 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s79
; GCN-HSA-NEXT: v_mov_b32_e32 v25, s39
; GCN-HSA-NEXT: s_addc_u32 s39, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s39, s17, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[8:11] ; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[8:11]
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s48 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s48
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s14 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s14
; GCN-HSA-NEXT: s_add_u32 s14, s16, 0xe0 ; GCN-HSA-NEXT: s_add_u32 s14, s16, 0xe0
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s49 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s49
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s76 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s76
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s77 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s77
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s15
; GCN-HSA-NEXT: s_addc_u32 s15, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s15, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v30, s44
; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[12:15] ; GCN-HSA-NEXT: flat_store_dwordx4 v[28:29], v[12:15]
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s50 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s50
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s12 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s12
; GCN-HSA-NEXT: s_add_u32 s12, s16, 0xc0 ; GCN-HSA-NEXT: s_add_u32 s12, s16, 0xc0
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s51 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s51
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s74 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s74
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s75 ; GCN-HSA-NEXT: v_mov_b32_e32 v19, s75
; GCN-HSA-NEXT: v_mov_b32_e32 v30, s44
; GCN-HSA-NEXT: v_mov_b32_e32 v31, s45 ; GCN-HSA-NEXT: v_mov_b32_e32 v31, s45
; GCN-HSA-NEXT: v_mov_b32_e32 v32, s40
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s13
; GCN-HSA-NEXT: s_addc_u32 s13, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v20, s52 ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s52
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s53 ; GCN-HSA-NEXT: v_mov_b32_e32 v21, s53
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s54 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s54
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s55 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s55
; GCN-HSA-NEXT: v_mov_b32_e32 v32, s40
; GCN-HSA-NEXT: v_mov_b32_e32 v33, s41 ; GCN-HSA-NEXT: v_mov_b32_e32 v33, s41
; GCN-HSA-NEXT: v_mov_b32_e32 v34, s38 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s13
; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[16:19] ; GCN-HSA-NEXT: s_addc_u32 s13, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s42 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s42
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s15
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s13
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s43 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s43
; GCN-HSA-NEXT: v_mov_b32_e32 v34, s38
; GCN-HSA-NEXT: v_mov_b32_e32 v35, s39 ; GCN-HSA-NEXT: v_mov_b32_e32 v35, s39
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s36 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, s36
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s37 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, s37
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s34 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s34
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s35 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s35
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s30 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s30
; GCN-HSA-NEXT: flat_store_dwordx4 v[30:31], v[16:19]
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s31 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s31
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s15
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s14 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s14
; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[20:23] ; GCN-HSA-NEXT: flat_store_dwordx4 v[32:33], v[20:23]
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s13
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s12 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s12
; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[0:3]
; GCN-HSA-NEXT: flat_store_dwordx4 v[34:35], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[34:35], v[4:7]
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11] ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11]
; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[12:15] ; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[12:15]
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s10
; GCN-HSA-NEXT: s_add_u32 s10, s16, 0xa0 ; GCN-HSA-NEXT: s_add_u32 s10, s16, 0xa0
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s11
; GCN-HSA-NEXT: s_addc_u32 s11, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s11, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s28 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s28
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s29 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s29
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_nop 0 ; GCN-HSA-NEXT: s_nop 0
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s8
; GCN-HSA-NEXT: s_add_u32 s8, s16, 0x80 ; GCN-HSA-NEXT: s_add_u32 s8, s16, 0x80
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s9
; GCN-HSA-NEXT: s_addc_u32 s9, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s9, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s26 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s26
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s27 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s27
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s9
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_nop 0 ; GCN-HSA-NEXT: s_nop 0
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s6
; GCN-HSA-NEXT: s_add_u32 s6, s16, 0x60 ; GCN-HSA-NEXT: s_add_u32 s6, s16, 0x60
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s7
; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s24 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s24
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s25 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s25
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s7
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_nop 0 ; GCN-HSA-NEXT: s_nop 0
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4
; GCN-HSA-NEXT: s_add_u32 s4, s16, 64 ; GCN-HSA-NEXT: s_add_u32 s4, s16, 64
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5
; GCN-HSA-NEXT: s_addc_u32 s5, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s22 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s22
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s23 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s23
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_nop 0 ; GCN-HSA-NEXT: s_nop 0
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2
; GCN-HSA-NEXT: s_add_u32 s2, s16, 32 ; GCN-HSA-NEXT: s_add_u32 s2, s16, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s17, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s17, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s20 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s20
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s21 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s21
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s18 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s18
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s19 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s19
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17
▲ Show 20 Lines • Show All 352 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/load-global-i16.ll

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; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 4 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 4
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s0
; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: s_waitcnt vmcnt(0)
; GCN-HSA-NEXT: flat_store_short v[4:5], v1 ; GCN-HSA-NEXT: flat_store_short v[4:5], v1
; GCN-HSA-NEXT: flat_store_dword v[2:3], v0 ; GCN-HSA-NEXT: flat_store_dword v[2:3], v0
; GCN-HSA-NEXT: s_endpgm ; GCN-HSA-NEXT: s_endpgm
; ;
; GCN-NOHSA-VI-LABEL: global_load_v3i16: ; GCN-NOHSA-VI-LABEL: global_load_v3i16:
; GCN-NOHSA-VI: ; %bb.0: ; %entry ; GCN-NOHSA-VI: ; %bb.0: ; %entry
▲ Show 20 Lines • Show All 281 Lines • ▼ Show 20 Lines
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[4:7], 0 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[4:7], off, s[4:7], 0
; GCN-NOHSA-SI-NEXT: s_endpgm ; GCN-NOHSA-SI-NEXT: s_endpgm
; ;
; GCN-HSA-LABEL: global_load_v16i16: ; GCN-HSA-LABEL: global_load_v16i16:
; GCN-HSA: ; %bb.0: ; %entry ; GCN-HSA: ; %bb.0: ; %entry
; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_add_u32 s4, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: s_add_u32 s2, s2, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s2, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s0
; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: s_waitcnt vmcnt(0)
; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[4:7]
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; GCN-HSA-NEXT: s_endpgm ; GCN-HSA-NEXT: s_endpgm
; ;
; GCN-NOHSA-VI-LABEL: global_load_v16i16: ; GCN-NOHSA-VI-LABEL: global_load_v16i16:
; GCN-NOHSA-VI: ; %bb.0: ; %entry ; GCN-NOHSA-VI: ; %bb.0: ; %entry
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; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
; GCN-NOHSA-SI-NEXT: s_endpgm ; GCN-NOHSA-SI-NEXT: s_endpgm
; ;
; GCN-HSA-LABEL: global_load_v16i16_align2: ; GCN-HSA-LABEL: global_load_v16i16_align2:
; GCN-HSA: ; %bb.0: ; %entry ; GCN-HSA: ; %bb.0: ; %entry
; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT: s_add_u32 s0, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; GCN-HSA-NEXT: s_add_u32 s0, s2, 16 ; GCN-HSA-NEXT: s_add_u32 s0, s2, 16
; GCN-HSA-NEXT: s_addc_u32 s1, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s1, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: s_waitcnt vmcnt(0)
; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[4:7]
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
; GCN-HSA-NEXT: s_endpgm ; GCN-HSA-NEXT: s_endpgm
; ;
; GCN-NOHSA-VI-LABEL: global_load_v16i16_align2: ; GCN-NOHSA-VI-LABEL: global_load_v16i16_align2:
; GCN-NOHSA-VI: ; %bb.0: ; %entry ; GCN-NOHSA-VI: ; %bb.0: ; %entry
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; GCN-HSA-NEXT: s_mov_b32 s4, 0xffff ; GCN-HSA-NEXT: s_mov_b32 s4, 0xffff
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s0
; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: s_waitcnt vmcnt(0)
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v3 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v3
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 16, v2 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 16, v2
; GCN-HSA-NEXT: v_and_b32_e32 v10, s4, v3 ; GCN-HSA-NEXT: v_and_b32_e32 v10, s4, v3
; GCN-HSA-NEXT: v_and_b32_e32 v8, s4, v2 ; GCN-HSA-NEXT: v_and_b32_e32 v8, s4, v2
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v1 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v1
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v0 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v0
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; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s0
; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: s_waitcnt vmcnt(0)
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 16, v3 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 16, v3
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 16, v2 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 16, v2
; GCN-HSA-NEXT: v_bfe_i32 v10, v3, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v10, v3, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v8, v2, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v8, v2, 0, 16
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 16, v1 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 16, v1
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 16, v0 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 16, v0
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; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT: s_endpgm ; GCN-NOHSA-SI-NEXT: s_endpgm
; ;
; GCN-HSA-LABEL: global_zextload_v16i16_to_v16i32: ; GCN-HSA-LABEL: global_zextload_v16i16_to_v16i32:
; GCN-HSA: ; %bb.0: ; GCN-HSA: ; %bb.0:
; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_add_u32 s4, s2, 16 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s1
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_mov_b32 s4, 0xffff ; GCN-HSA-NEXT: s_mov_b32 s4, 0xffff
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s0
; GCN-HSA-NEXT: s_add_u32 s0, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s1
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT: s_waitcnt vmcnt(1) ; GCN-HSA-NEXT: s_waitcnt vmcnt(1)
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v3 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v3
; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: s_waitcnt vmcnt(0)
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v10, 16, v7 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v10, 16, v7
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v8, 16, v6 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v8, 16, v6
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; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[8:11], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT: s_endpgm ; GCN-NOHSA-SI-NEXT: s_endpgm
; ;
; GCN-HSA-LABEL: global_sextload_v16i16_to_v16i32: ; GCN-HSA-LABEL: global_sextload_v16i16_to_v16i32:
; GCN-HSA: ; %bb.0: ; GCN-HSA: ; %bb.0:
; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_add_u32 s2, s2, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s2, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s0
; GCN-HSA-NEXT: s_add_u32 s0, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v21, s3
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v20, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s2
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v23, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v23, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v22, s0
; GCN-HSA-NEXT: s_waitcnt vmcnt(1) ; GCN-HSA-NEXT: s_waitcnt vmcnt(1)
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 16, v0 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 16, v0
; GCN-HSA-NEXT: v_bfe_i32 v10, v1, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v10, v1, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v8, v0, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v8, v0, 0, 16
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 16, v3 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 16, v3
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v13, 16, v2 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v13, 16, v2
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; GCN-HSA-LABEL: global_zextload_v32i16_to_v32i32: ; GCN-HSA-LABEL: global_zextload_v32i16_to_v32i32:
; GCN-HSA: ; %bb.0: ; GCN-HSA: ; %bb.0:
; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_mov_b32 s14, 0xffff ; GCN-HSA-NEXT: s_mov_b32 s14, 0xffff
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_add_u32 s4, s2, 16 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 16
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: s_add_u32 s4, s2, 32 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT: s_add_u32 s2, s2, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s2, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[8:9] ; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[8:9]
; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[12:13] ; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[12:13]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_add_u32 s4, s0, 0x60 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 0x60
; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT: s_add_u32 s6, s0, 0x70 ; GCN-HSA-NEXT: s_add_u32 s6, s0, 0x70
; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0
; GCN-HSA-NEXT: s_add_u32 s8, s0, 64 ; GCN-HSA-NEXT: s_add_u32 s8, s0, 64
; GCN-HSA-NEXT: s_addc_u32 s9, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s9, s1, 0
; GCN-HSA-NEXT: s_add_u32 s10, s0, 0x50 ; GCN-HSA-NEXT: s_add_u32 s10, s0, 0x50
; GCN-HSA-NEXT: s_addc_u32 s11, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s11, s1, 0
; GCN-HSA-NEXT: s_add_u32 s12, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s12, s0, 32
; GCN-HSA-NEXT: s_addc_u32 s13, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s13, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v20, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v22, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v21, s6
; GCN-HSA-NEXT: s_waitcnt vmcnt(3) ; GCN-HSA-NEXT: s_waitcnt vmcnt(3)
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v1 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v1
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 16, v0 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 16, v0
; GCN-HSA-NEXT: v_and_b32_e32 v18, s14, v1 ; GCN-HSA-NEXT: v_and_b32_e32 v18, s14, v1
; GCN-HSA-NEXT: v_and_b32_e32 v16, s14, v0 ; GCN-HSA-NEXT: v_and_b32_e32 v16, s14, v0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s12 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s12
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s13 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s13
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[16:19] ; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[16:19]
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s8
; GCN-HSA-NEXT: s_waitcnt vmcnt(3) ; GCN-HSA-NEXT: s_waitcnt vmcnt(3)
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v5 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v5
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 16, v4 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 16, v4
; GCN-HSA-NEXT: v_and_b32_e32 v18, s14, v5 ; GCN-HSA-NEXT: v_and_b32_e32 v18, s14, v5
; GCN-HSA-NEXT: v_and_b32_e32 v16, s14, v4 ; GCN-HSA-NEXT: v_and_b32_e32 v16, s14, v4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[16:19] ; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[16:19]
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v7 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v19, 16, v7
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 16, v6 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v17, 16, v6
; GCN-HSA-NEXT: v_and_b32_e32 v18, s14, v7 ; GCN-HSA-NEXT: v_and_b32_e32 v18, s14, v7
; GCN-HSA-NEXT: v_and_b32_e32 v16, s14, v6 ; GCN-HSA-NEXT: v_and_b32_e32 v16, s14, v6
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[16:19] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[16:19]
; GCN-HSA-NEXT: v_mov_b32_e32 v20, s3
; GCN-HSA-NEXT: s_waitcnt vmcnt(3) ; GCN-HSA-NEXT: s_waitcnt vmcnt(3)
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v13 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v13
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s2
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v12 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v12
; GCN-HSA-NEXT: v_and_b32_e32 v6, s14, v13 ; GCN-HSA-NEXT: v_and_b32_e32 v6, s14, v13
; GCN-HSA-NEXT: v_and_b32_e32 v4, s14, v12 ; GCN-HSA-NEXT: v_and_b32_e32 v4, s14, v12
; GCN-HSA-NEXT: s_add_u32 s0, s0, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s2
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v18, 16, v15 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v18, 16, v15
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v16, 16, v14 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v16, 16, v14
; GCN-HSA-NEXT: v_and_b32_e32 v17, s14, v15 ; GCN-HSA-NEXT: v_and_b32_e32 v17, s14, v15
; GCN-HSA-NEXT: v_and_b32_e32 v15, s14, v14 ; GCN-HSA-NEXT: v_and_b32_e32 v15, s14, v14
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 48
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[19:20], v[15:18] ; GCN-HSA-NEXT: flat_store_dwordx4 v[19:20], v[15:18]
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v6, 16, v3 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v6, 16, v3
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v18, 16, v9 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v18, 16, v9
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v16, 16, v8 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v16, 16, v8
; GCN-HSA-NEXT: v_and_b32_e32 v17, s14, v9 ; GCN-HSA-NEXT: v_and_b32_e32 v17, s14, v9
; GCN-HSA-NEXT: v_and_b32_e32 v15, s14, v8 ; GCN-HSA-NEXT: v_and_b32_e32 v15, s14, v8
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s1
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v2 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v2
; GCN-HSA-NEXT: v_and_b32_e32 v5, s14, v3 ; GCN-HSA-NEXT: v_and_b32_e32 v5, s14, v3
; GCN-HSA-NEXT: v_and_b32_e32 v3, s14, v2 ; GCN-HSA-NEXT: v_and_b32_e32 v3, s14, v2
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v14, 16, v11 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v14, 16, v11
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v12, 16, v10 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v12, 16, v10
; GCN-HSA-NEXT: v_and_b32_e32 v13, s14, v11 ; GCN-HSA-NEXT: v_and_b32_e32 v13, s14, v11
; GCN-HSA-NEXT: v_and_b32_e32 v11, s14, v10 ; GCN-HSA-NEXT: v_and_b32_e32 v11, s14, v10
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, s0
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[15:18] ; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[15:18]
; GCN-HSA-NEXT: flat_store_dwordx4 v[21:22], v[11:14] ; GCN-HSA-NEXT: flat_store_dwordx4 v[21:22], v[11:14]
; GCN-HSA-NEXT: flat_store_dwordx4 v[7:8], v[3:6] ; GCN-HSA-NEXT: flat_store_dwordx4 v[7:8], v[3:6]
; GCN-HSA-NEXT: s_endpgm ; GCN-HSA-NEXT: s_endpgm
; ;
; GCN-NOHSA-VI-LABEL: global_zextload_v32i16_to_v32i32: ; GCN-NOHSA-VI-LABEL: global_zextload_v32i16_to_v32i32:
; GCN-NOHSA-VI: ; %bb.0: ; GCN-NOHSA-VI: ; %bb.0:
▲ Show 20 Lines • Show All 311 Lines • ▼ Show 20 Lines
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:16 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[16:19], off, s[0:3], 0 offset:16
; GCN-NOHSA-SI-NEXT: s_endpgm ; GCN-NOHSA-SI-NEXT: s_endpgm
; ;
; GCN-HSA-LABEL: global_sextload_v32i16_to_v32i32: ; GCN-HSA-LABEL: global_sextload_v32i16_to_v32i32:
; GCN-HSA: ; %bb.0: ; GCN-HSA: ; %bb.0:
; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_add_u32 s4, s2, 48 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s5
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; GCN-HSA-NEXT: s_add_u32 s4, s2, 32 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 32
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: s_add_u32 s2, s2, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s2, 16
; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[8:9] ; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[8:9]
; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[12:13] ; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[12:13]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_waitcnt vmcnt(3) ; GCN-HSA-NEXT: s_waitcnt vmcnt(3)
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v19, 16, v1 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v19, 16, v1
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v17, 16, v0 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v17, 16, v0
; GCN-HSA-NEXT: v_bfe_i32 v18, v1, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v18, v1, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v16, v0, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v16, v0, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[16:19] ; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[16:19]
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v20, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v19, 16, v3 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v19, 16, v3
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v17, 16, v2 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v17, 16, v2
; GCN-HSA-NEXT: v_bfe_i32 v18, v3, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v18, v3, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v16, v2, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v16, v2, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[16:19] ; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[16:19]
; GCN-HSA-NEXT: s_waitcnt vmcnt(4) ; GCN-HSA-NEXT: s_waitcnt vmcnt(4)
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v5 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v5
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 64
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v4 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v4
; GCN-HSA-NEXT: v_bfe_i32 v2, v5, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v2, v5, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v0, v4, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v0, v4, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v20, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_add_u32 s0, s0, 48
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v7 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v7
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v6 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v6
; GCN-HSA-NEXT: v_bfe_i32 v2, v7, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v2, v7, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v0, v6, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v0, v6, 0, 16
; GCN-HSA-NEXT: s_waitcnt vmcnt(4) ; GCN-HSA-NEXT: s_waitcnt vmcnt(4)
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 16, v9 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 16, v9
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 16, v8 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 16, v8
; GCN-HSA-NEXT: v_bfe_i32 v6, v9, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v6, v9, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v4, v8, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v4, v8, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 48
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v11 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v11
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v10 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v10
; GCN-HSA-NEXT: v_bfe_i32 v2, v11, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v2, v11, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v0, v10, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v0, v10, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[4:7]
; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[0:3]
; GCN-HSA-NEXT: s_waitcnt vmcnt(6) ; GCN-HSA-NEXT: s_waitcnt vmcnt(6)
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 16, v13 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 16, v13
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 16, v12 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 16, v12
; GCN-HSA-NEXT: v_bfe_i32 v6, v13, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v6, v13, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v4, v12, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v4, v12, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s0
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v15 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v15
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v14 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v14
; GCN-HSA-NEXT: v_bfe_i32 v2, v15, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v2, v15, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v0, v14, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v0, v14, 0, 16
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[0:3]
; GCN-HSA-NEXT: s_endpgm ; GCN-HSA-NEXT: s_endpgm
▲ Show 20 Lines • Show All 440 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_movk_i32 s6, 0x50 ; GCN-HSA-NEXT: s_movk_i32 s6, 0x50
; GCN-HSA-NEXT: s_movk_i32 s7, 0x60 ; GCN-HSA-NEXT: s_movk_i32 s7, 0x60
; GCN-HSA-NEXT: s_movk_i32 s8, 0x70 ; GCN-HSA-NEXT: s_movk_i32 s8, 0x70
; GCN-HSA-NEXT: s_mov_b32 s9, 0xffff ; GCN-HSA-NEXT: s_mov_b32 s9, 0xffff
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_add_u32 s4, s2, s6 ; GCN-HSA-NEXT: s_add_u32 s4, s2, s6
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: s_add_u32 s4, s2, s7 ; GCN-HSA-NEXT: s_add_u32 s4, s2, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5
; GCN-HSA-NEXT: s_add_u32 s4, s2, s8 ; GCN-HSA-NEXT: s_add_u32 s4, s2, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s5
; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[0:1]
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[2:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s4
; GCN-HSA-NEXT: s_add_u32 s4, s2, 16 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s5
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s4
; GCN-HSA-NEXT: s_add_u32 s4, s2, 32 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 32
; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[0:1]
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[2:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s5
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: s_add_u32 s10, s2, 48 ; GCN-HSA-NEXT: s_add_u32 s10, s2, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v33, s3
; GCN-HSA-NEXT: s_addc_u32 s11, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s11, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v32, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v32, s2
; GCN-HSA-NEXT: s_add_u32 s2, s2, 64 ; GCN-HSA-NEXT: s_add_u32 s2, s2, 64
; GCN-HSA-NEXT: v_mov_b32_e32 v33, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0
; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[8:9] ; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[8:9]
; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[12:13] ; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[12:13]
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s11
; GCN-HSA-NEXT: v_mov_b32_e32 v29, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s11
; GCN-HSA-NEXT: v_mov_b32_e32 v20, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v29, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v28, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v28, s2
; GCN-HSA-NEXT: flat_load_dwordx4 v[16:19], v[16:17] ; GCN-HSA-NEXT: flat_load_dwordx4 v[16:19], v[16:17]
; GCN-HSA-NEXT: flat_load_dwordx4 v[20:23], v[20:21] ; GCN-HSA-NEXT: flat_load_dwordx4 v[20:23], v[20:21]
; GCN-HSA-NEXT: flat_load_dwordx4 v[28:31], v[28:29] ; GCN-HSA-NEXT: flat_load_dwordx4 v[28:31], v[28:29]
; GCN-HSA-NEXT: flat_load_dwordx4 v[32:35], v[32:33] ; GCN-HSA-NEXT: flat_load_dwordx4 v[32:35], v[32:33]
; GCN-HSA-NEXT: s_add_u32 s4, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 16
; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xe0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xe0
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_add_u32 s10, s0, 0xf0 ; GCN-HSA-NEXT: s_add_u32 s10, s0, 0xf0
; GCN-HSA-NEXT: s_addc_u32 s11, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s11, s1, 0
; GCN-HSA-NEXT: s_add_u32 s12, s0, 0xc0 ; GCN-HSA-NEXT: s_add_u32 s12, s0, 0xc0
; GCN-HSA-NEXT: s_addc_u32 s13, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s13, s1, 0
; GCN-HSA-NEXT: s_add_u32 s14, s0, 0xd0 ; GCN-HSA-NEXT: s_add_u32 s14, s0, 0xd0
; GCN-HSA-NEXT: s_addc_u32 s15, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s15, s1, 0
; GCN-HSA-NEXT: s_add_u32 s16, s0, 0xa0 ; GCN-HSA-NEXT: s_add_u32 s16, s0, 0xa0
; GCN-HSA-NEXT: s_addc_u32 s17, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s17, s1, 0
; GCN-HSA-NEXT: s_waitcnt vmcnt(7) ; GCN-HSA-NEXT: s_waitcnt vmcnt(7)
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v27, 16, v5
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v25, 16, v4 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v25, 16, v4
; GCN-HSA-NEXT: v_and_b32_e32 v26, s9, v5
; GCN-HSA-NEXT: v_and_b32_e32 v24, s9, v4 ; GCN-HSA-NEXT: v_and_b32_e32 v24, s9, v4
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17
; GCN-HSA-NEXT: s_add_u32 s16, s0, 0xb0 ; GCN-HSA-NEXT: s_add_u32 s16, s0, 0xb0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[24:27] ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v27, 16, v5
; GCN-HSA-NEXT: v_and_b32_e32 v26, s9, v5
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17
; GCN-HSA-NEXT: s_addc_u32 s17, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s17, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[24:27]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s16
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v27, 16, v7 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v27, 16, v7
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v25, 16, v6 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v25, 16, v6
; GCN-HSA-NEXT: v_and_b32_e32 v26, s9, v7 ; GCN-HSA-NEXT: v_and_b32_e32 v26, s9, v7
; GCN-HSA-NEXT: v_and_b32_e32 v24, s9, v6 ; GCN-HSA-NEXT: v_and_b32_e32 v24, s9, v6
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s17
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[24:27] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[24:27]
; GCN-HSA-NEXT: s_waitcnt vmcnt(8) ; GCN-HSA-NEXT: s_waitcnt vmcnt(8)
Show All 15 Lines
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v8 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v8
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v9 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v9
; GCN-HSA-NEXT: v_and_b32_e32 v2, s9, v9 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s9, v9
; GCN-HSA-NEXT: v_and_b32_e32 v0, s9, v8 ; GCN-HSA-NEXT: v_and_b32_e32 v0, s9, v8
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v25, s1
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v11 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v11
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v10 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v10
; GCN-HSA-NEXT: v_and_b32_e32 v2, s9, v11 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s9, v11
; GCN-HSA-NEXT: v_and_b32_e32 v0, s9, v10 ; GCN-HSA-NEXT: v_and_b32_e32 v0, s9, v10
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s11
; GCN-HSA-NEXT: v_mov_b32_e32 v24, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v27, s5
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80
; GCN-HSA-NEXT: v_mov_b32_e32 v25, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v24, s0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v26, s4 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_waitcnt vmcnt(6) ; GCN-HSA-NEXT: s_waitcnt vmcnt(6)
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v33 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v33
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v32 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v32
; GCN-HSA-NEXT: v_and_b32_e32 v2, s9, v33 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s9, v33
; GCN-HSA-NEXT: v_and_b32_e32 v0, s9, v32 ; GCN-HSA-NEXT: v_and_b32_e32 v0, s9, v32
; GCN-HSA-NEXT: v_mov_b32_e32 v27, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v26, s4
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v35 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v35
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v34 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v34
; GCN-HSA-NEXT: v_and_b32_e32 v6, s9, v35 ; GCN-HSA-NEXT: v_and_b32_e32 v6, s9, v35
; GCN-HSA-NEXT: v_and_b32_e32 v4, s9, v34 ; GCN-HSA-NEXT: v_and_b32_e32 v4, s9, v34
; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[24:25], v[0:3]
; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[26:27], v[4:7]
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x90 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x90
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v29 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v29
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 16, v28 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 16, v28
; GCN-HSA-NEXT: v_and_b32_e32 v10, s9, v29 ; GCN-HSA-NEXT: v_and_b32_e32 v10, s9, v29
; GCN-HSA-NEXT: v_and_b32_e32 v8, s9, v28 ; GCN-HSA-NEXT: v_and_b32_e32 v8, s9, v28
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, s7 ; GCN-HSA-NEXT: s_add_u32 s2, s0, s7
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[8:11] ; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[8:11]
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v31 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v31
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v30 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v30
; GCN-HSA-NEXT: v_and_b32_e32 v2, s9, v31 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s9, v31
; GCN-HSA-NEXT: v_and_b32_e32 v0, s9, v30 ; GCN-HSA-NEXT: v_and_b32_e32 v0, s9, v30
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, s8 ; GCN-HSA-NEXT: s_add_u32 s2, s0, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v21 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v21
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v20 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v20
; GCN-HSA-NEXT: v_and_b32_e32 v2, s9, v21 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s9, v21
; GCN-HSA-NEXT: v_and_b32_e32 v0, s9, v20 ; GCN-HSA-NEXT: v_and_b32_e32 v0, s9, v20
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 64
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v23 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v23
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v22 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v22
; GCN-HSA-NEXT: v_and_b32_e32 v6, s9, v23 ; GCN-HSA-NEXT: v_and_b32_e32 v6, s9, v23
; GCN-HSA-NEXT: v_and_b32_e32 v4, s9, v22 ; GCN-HSA-NEXT: v_and_b32_e32 v4, s9, v22
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v15
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v14
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
; GCN-HSA-NEXT: v_and_b32_e32 v2, s9, v15 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v3, 16, v15
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v13 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v13
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v12 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v12
; GCN-HSA-NEXT: v_and_b32_e32 v0, s9, v14
; GCN-HSA-NEXT: v_and_b32_e32 v6, s9, v13 ; GCN-HSA-NEXT: v_and_b32_e32 v6, s9, v13
; GCN-HSA-NEXT: v_and_b32_e32 v4, s9, v12 ; GCN-HSA-NEXT: v_and_b32_e32 v4, s9, v12
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v15, 16, v17
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v16 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v16
; GCN-HSA-NEXT: v_and_b32_e32 v14, s9, v17
; GCN-HSA-NEXT: v_and_b32_e32 v12, s9, v16 ; GCN-HSA-NEXT: v_and_b32_e32 v12, s9, v16
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, s6 ; GCN-HSA-NEXT: s_add_u32 s2, s0, s6
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v14
; GCN-HSA-NEXT: v_and_b32_e32 v2, s9, v15
; GCN-HSA-NEXT: v_and_b32_e32 v0, s9, v14
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v15, 16, v17
; GCN-HSA-NEXT: v_and_b32_e32 v14, s9, v17
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[12:15] ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[12:15]
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v19 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v19
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 16, v18 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 16, v18
; GCN-HSA-NEXT: v_and_b32_e32 v10, s9, v19 ; GCN-HSA-NEXT: v_and_b32_e32 v10, s9, v19
; GCN-HSA-NEXT: v_and_b32_e32 v8, s9, v18 ; GCN-HSA-NEXT: v_and_b32_e32 v8, s9, v18
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
; GCN-HSA-NEXT: s_add_u32 s0, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 48
; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
; GCN-HSA-NEXT: s_nop 0 ; GCN-HSA-NEXT: s_nop 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_endpgm ; GCN-HSA-NEXT: s_endpgm
; ;
; GCN-NOHSA-VI-LABEL: global_zextload_v64i16_to_v64i32: ; GCN-NOHSA-VI-LABEL: global_zextload_v64i16_to_v64i32:
▲ Show 20 Lines • Show All 588 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_movk_i32 s9, 0x70 ; GCN-HSA-NEXT: s_movk_i32 s9, 0x70
; GCN-HSA-NEXT: s_movk_i32 s10, 0x60 ; GCN-HSA-NEXT: s_movk_i32 s10, 0x60
; GCN-HSA-NEXT: s_movk_i32 s8, 0x50 ; GCN-HSA-NEXT: s_movk_i32 s8, 0x50
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_add_u32 s4, s2, s9 ; GCN-HSA-NEXT: s_add_u32 s4, s2, s9
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: s_add_u32 s4, s2, s10 ; GCN-HSA-NEXT: s_add_u32 s4, s2, s10
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5
; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[0:1]
; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[2:3] ; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[2:3]
; GCN-HSA-NEXT: s_add_u32 s4, s2, s8 ; GCN-HSA-NEXT: s_add_u32 s4, s2, s8
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; GCN-HSA-NEXT: s_add_u32 s4, s2, 64 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 64
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: s_add_u32 s6, s2, 48 ; GCN-HSA-NEXT: s_add_u32 s6, s2, 48
; GCN-HSA-NEXT: s_addc_u32 s7, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v20, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s6
; GCN-HSA-NEXT: flat_load_dwordx4 v[16:19], v[16:17] ; GCN-HSA-NEXT: flat_load_dwordx4 v[16:19], v[16:17]
; GCN-HSA-NEXT: flat_load_dwordx4 v[20:23], v[20:21] ; GCN-HSA-NEXT: flat_load_dwordx4 v[20:23], v[20:21]
; GCN-HSA-NEXT: s_add_u32 s4, s2, 32 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 32
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: s_add_u32 s2, s2, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s2, 16
; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v29, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v29, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v33, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v28, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v28, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v33, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v32, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v32, s2
; GCN-HSA-NEXT: flat_load_dwordx4 v[28:31], v[28:29] ; GCN-HSA-NEXT: flat_load_dwordx4 v[28:31], v[28:29]
; GCN-HSA-NEXT: flat_load_dwordx4 v[32:35], v[32:33] ; GCN-HSA-NEXT: flat_load_dwordx4 v[32:35], v[32:33]
; GCN-HSA-NEXT: s_add_u32 s4, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 16
; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xe0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xe0
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_waitcnt vmcnt(7) ; GCN-HSA-NEXT: s_waitcnt vmcnt(7)
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v27, 16, v13
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v25, 16, v12 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v25, 16, v12
; GCN-HSA-NEXT: v_bfe_i32 v26, v13, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v24, v12, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v24, v12, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xf0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xf0
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v27, 16, v13
; GCN-HSA-NEXT: v_bfe_i32 v26, v13, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[24:27] ; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[24:27]
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xc0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xc0
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v27, 16, v15 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v27, 16, v15
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v25, 16, v14 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v25, 16, v14
; GCN-HSA-NEXT: v_bfe_i32 v26, v15, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v26, v15, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v24, v14, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v24, v14, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[24:27] ; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[24:27]
; GCN-HSA-NEXT: s_waitcnt vmcnt(8) ; GCN-HSA-NEXT: s_waitcnt vmcnt(8)
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 16, v9
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v13, 16, v8 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v13, 16, v8
; GCN-HSA-NEXT: v_bfe_i32 v14, v9, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v12, v8, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v12, v8, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xd0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xd0
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 16, v9
; GCN-HSA-NEXT: v_bfe_i32 v14, v9, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[12:15] ; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[12:15]
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v14, 16, v11 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v14, 16, v11
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v12, 16, v10 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v12, 16, v10
; GCN-HSA-NEXT: v_bfe_i32 v13, v11, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v13, v11, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v11, v10, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v11, v10, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xa0
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[11:14] ; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[11:14]
; GCN-HSA-NEXT: s_waitcnt vmcnt(8) ; GCN-HSA-NEXT: s_waitcnt vmcnt(8)
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 16, v4 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 16, v4
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 16, v5 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 16, v5
; GCN-HSA-NEXT: v_bfe_i32 v10, v5, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v10, v5, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v8, v4, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v8, v4, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xa0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[8:11]
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 16, v7 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 16, v7
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 16, v2
; GCN-HSA-NEXT: v_bfe_i32 v8, v2, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xb0
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v13, 16, v6 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v13, 16, v6
; GCN-HSA-NEXT: v_bfe_i32 v14, v7, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v14, v7, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v12, v6, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v12, v6, 0, 16
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[8:11]
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 16, v1 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 16, v1
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 16, v0 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 16, v0
; GCN-HSA-NEXT: v_bfe_i32 v6, v1, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v6, v1, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v4, v0, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v4, v0, 0, 16
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 16, v3 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 16, v3
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 16, v2
; GCN-HSA-NEXT: v_bfe_i32 v10, v3, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v10, v3, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v8, v2, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xb0
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15] ; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[12:15]
; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[4:7]
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x90 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x90
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[8:11] ; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[8:11]
; GCN-HSA-NEXT: s_waitcnt vmcnt(11) ; GCN-HSA-NEXT: s_waitcnt vmcnt(11)
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v17 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v17
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v16 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v16
; GCN-HSA-NEXT: v_bfe_i32 v2, v17, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v2, v17, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v0, v16, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v0, v16, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, s10 ; GCN-HSA-NEXT: s_add_u32 s2, s0, s10
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v19 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v19
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v18 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v18
; GCN-HSA-NEXT: v_bfe_i32 v2, v19, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v2, v19, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v0, v18, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v0, v18, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, s9 ; GCN-HSA-NEXT: s_add_u32 s2, s0, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 64
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: s_waitcnt vmcnt(12) ; GCN-HSA-NEXT: s_waitcnt vmcnt(12)
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 16, v23 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 16, v23
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 16, v22 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 16, v22
; GCN-HSA-NEXT: v_bfe_i32 v10, v23, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v10, v23, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v8, v22, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v8, v22, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, s8 ; GCN-HSA-NEXT: s_add_u32 s2, s0, s8
; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[8:11] ; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
; GCN-HSA-NEXT: s_waitcnt vmcnt(12) ; GCN-HSA-NEXT: s_waitcnt vmcnt(12)
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 16, v29 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 16, v29
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v13, 16, v28 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v13, 16, v28
; GCN-HSA-NEXT: v_bfe_i32 v14, v29, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v14, v29, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v12, v28, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v12, v28, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[12:15] ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[12:15]
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 16, v31 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v21
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 16, v30 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: v_bfe_i32 v10, v31, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v8, v30, 0, 16
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v21
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v20 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v20
; GCN-HSA-NEXT: v_bfe_i32 v2, v21, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v2, v21, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v0, v20, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v0, v20, 0, 16
; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[8:11] ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 16, v31
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 16, v30
; GCN-HSA-NEXT: v_bfe_i32 v10, v31, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v8, v30, 0, 16
; GCN-HSA-NEXT: s_add_u32 s0, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_waitcnt vmcnt(14) ; GCN-HSA-NEXT: s_waitcnt vmcnt(13)
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 16, v33 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 16, v33
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 16, v32 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 16, v32
; GCN-HSA-NEXT: v_bfe_i32 v6, v33, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v6, v33, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v4, v32, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v4, v32, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[4:7] ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v35 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 16, v35
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v34 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 16, v34
; GCN-HSA-NEXT: v_bfe_i32 v2, v35, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v2, v35, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v0, v34, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v0, v34, 0, 16
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
; GCN-HSA-NEXT: s_nop 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_endpgm ; GCN-HSA-NEXT: s_endpgm
; ;
; GCN-NOHSA-VI-LABEL: global_sextload_v64i16_to_v64i32: ; GCN-NOHSA-VI-LABEL: global_sextload_v64i16_to_v64i32:
; GCN-NOHSA-VI: ; %bb.0: ; GCN-NOHSA-VI: ; %bb.0:
; GCN-NOHSA-VI-NEXT: s_mov_b32 s88, SCRATCH_RSRC_DWORD0 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s88, SCRATCH_RSRC_DWORD0
; GCN-NOHSA-VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN-NOHSA-VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
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; GCN-HSA: ; %bb.0: ; GCN-HSA: ; %bb.0:
; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_mov_b32 s4, 0xffff ; GCN-HSA-NEXT: s_mov_b32 s4, 0xffff
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: flat_load_dwordx2 v[8:9], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx2 v[8:9], v[0:1]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v3, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, v1
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v5, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, v1
; GCN-HSA-NEXT: v_mov_b32_e32 v7, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, v1
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s0
; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: s_waitcnt vmcnt(0)
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v2, 16, v9 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v2, 16, v9
; GCN-HSA-NEXT: v_and_b32_e32 v0, s4, v9 ; GCN-HSA-NEXT: v_and_b32_e32 v0, s4, v9
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v6, 16, v8 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v6, 16, v8
; GCN-HSA-NEXT: v_and_b32_e32 v4, s4, v8 ; GCN-HSA-NEXT: v_and_b32_e32 v4, s4, v8
; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[0:3]
; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[10:11], v[4:7]
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; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: flat_load_dwordx2 v[1:2], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx2 v[1:2], v[0:1]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s0
; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: s_waitcnt vmcnt(0)
; GCN-HSA-NEXT: v_mov_b32_e32 v3, v2 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, v2
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v1 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v1
; GCN-HSA-NEXT: v_ashr_i64 v[6:7], v[1:2], 48 ; GCN-HSA-NEXT: v_ashr_i64 v[6:7], v[1:2], 48
; GCN-HSA-NEXT: v_bfe_i32 v2, v4, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v2, v4, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v4, v3, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v4, v3, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v0, v1, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v0, v1, 0, 16
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; GCN-HSA-NEXT: v_mov_b32_e32 v14, v12 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, v12
; GCN-HSA-NEXT: v_mov_b32_e32 v15, v12 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, v12
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT: s_add_u32 s0, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v8, v12 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, v12
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v6, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v10, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, 0
; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: s_waitcnt vmcnt(0)
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v3 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v3
; GCN-HSA-NEXT: v_and_b32_e32 v11, s4, v3 ; GCN-HSA-NEXT: v_and_b32_e32 v11, s4, v3
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[11:14] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[11:14]
; GCN-HSA-NEXT: v_mov_b32_e32 v4, v12 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, v12
; GCN-HSA-NEXT: v_mov_b32_e32 v13, v12 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, v12
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v14, 16, v1 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v14, 16, v1
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v0
; GCN-HSA-NEXT: v_and_b32_e32 v3, s4, v0
; GCN-HSA-NEXT: v_and_b32_e32 v12, s4, v1 ; GCN-HSA-NEXT: v_and_b32_e32 v12, s4, v1
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 16, v2 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 16, v2
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v0
; GCN-HSA-NEXT: v_and_b32_e32 v3, s4, v0
; GCN-HSA-NEXT: v_and_b32_e32 v7, s4, v2 ; GCN-HSA-NEXT: v_and_b32_e32 v7, s4, v2
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[12:15] ; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[12:15]
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[7:10] ; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[7:10]
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[3:6] ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[3:6]
; GCN-HSA-NEXT: s_endpgm ; GCN-HSA-NEXT: s_endpgm
; ;
; GCN-NOHSA-VI-LABEL: global_zextload_v8i16_to_v8i64: ; GCN-NOHSA-VI-LABEL: global_zextload_v8i16_to_v8i64:
; GCN-NOHSA-VI: ; %bb.0: ; GCN-NOHSA-VI: ; %bb.0:
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; GCN-HSA: ; %bb.0: ; GCN-HSA: ; %bb.0:
; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s0
; GCN-HSA-NEXT: s_add_u32 s0, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s1
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s0
; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: s_waitcnt vmcnt(0)
; GCN-HSA-NEXT: v_ashr_i64 v[6:7], v[0:1], 48 ; GCN-HSA-NEXT: v_ashr_i64 v[6:7], v[0:1], 48
; GCN-HSA-NEXT: v_bfe_i32 v4, v1, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v4, v1, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v11, v3 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, v3
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4
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; GCN-HSA: ; %bb.0: ; GCN-HSA: ; %bb.0:
; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_mov_b32 s6, 0xffff ; GCN-HSA-NEXT: s_mov_b32 s6, 0xffff
; GCN-HSA-NEXT: v_mov_b32_e32 v8, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v10, v8 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, v8
; GCN-HSA-NEXT: v_mov_b32_e32 v12, v8 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, v8
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_add_u32 s4, s2, 16 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s5
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5] ; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[4:5]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_add_u32 s4, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 16
; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s4
; GCN-HSA-NEXT: s_add_u32 s4, s0, 0x50 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 0x50
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s5
; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s3
; GCN-HSA-NEXT: s_waitcnt vmcnt(0) ; GCN-HSA-NEXT: s_waitcnt vmcnt(0)
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v5 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v5
; GCN-HSA-NEXT: v_and_b32_e32 v9, s6, v5 ; GCN-HSA-NEXT: v_and_b32_e32 v9, s6, v5
; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[9:12] ; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[9:12]
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s4
; GCN-HSA-NEXT: s_add_u32 s4, s0, 0x70 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 0x70
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s5
; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v1 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v1
; GCN-HSA-NEXT: v_and_b32_e32 v9, s6, v1 ; GCN-HSA-NEXT: v_and_b32_e32 v9, s6, v1
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[9:12] ; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[9:12]
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s5
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s4
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v3 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v3
; GCN-HSA-NEXT: v_and_b32_e32 v9, s6, v3 ; GCN-HSA-NEXT: v_and_b32_e32 v9, s6, v3
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s3
; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[9:12]
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 64
; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[9:12]
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s3
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 16, v7 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v9, 16, v7
; GCN-HSA-NEXT: v_and_b32_e32 v7, s6, v7 ; GCN-HSA-NEXT: v_and_b32_e32 v7, s6, v7
; GCN-HSA-NEXT: s_add_u32 s2, s0, 64 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v14, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, 0
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v6 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v6
; GCN-HSA-NEXT: v_and_b32_e32 v11, s6, v6 ; GCN-HSA-NEXT: v_and_b32_e32 v11, s6, v6
; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[7:10] ; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[7:10]
; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[11:14] ; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[11:14]
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s1
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s0
; GCN-HSA-NEXT: s_add_u32 s0, s0, 0x60 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 0x60
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v1, v8 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, v8
; GCN-HSA-NEXT: v_mov_b32_e32 v3, v14 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, v14
; GCN-HSA-NEXT: v_mov_b32_e32 v7, v8 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, v8
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v8, 16, v0 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v8, 16, v0
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v2 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v13, 16, v2
; GCN-HSA-NEXT: v_and_b32_e32 v11, s6, v2 ; GCN-HSA-NEXT: v_and_b32_e32 v11, s6, v2
; GCN-HSA-NEXT: v_and_b32_e32 v6, s6, v0 ; GCN-HSA-NEXT: v_and_b32_e32 v6, s6, v0
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s1
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v2, 16, v4 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v2, 16, v4
; GCN-HSA-NEXT: v_and_b32_e32 v0, s6, v4 ; GCN-HSA-NEXT: v_and_b32_e32 v0, s6, v4
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v9, v14 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, v14
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[0:3]
; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[6:9] ; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[6:9]
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[11:14] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[11:14]
; GCN-HSA-NEXT: s_endpgm ; GCN-HSA-NEXT: s_endpgm
; ;
; GCN-NOHSA-VI-LABEL: global_zextload_v16i16_to_v16i64: ; GCN-NOHSA-VI-LABEL: global_zextload_v16i16_to_v16i64:
; GCN-NOHSA-VI: ; %bb.0: ; GCN-NOHSA-VI: ; %bb.0:
▲ Show 20 Lines • Show All 293 Lines • ▼ Show 20 Lines
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[5:8], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[5:8], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT: s_endpgm ; GCN-NOHSA-SI-NEXT: s_endpgm
; ;
; GCN-HSA-LABEL: global_sextload_v16i16_to_v16i64: ; GCN-HSA-LABEL: global_sextload_v16i16_to_v16i64:
; GCN-HSA: ; %bb.0: ; GCN-HSA: ; %bb.0:
; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_add_u32 s2, s2, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s2, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3
; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[0:1]
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[2:3] ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[2:3]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x70
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x50
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s0
; GCN-HSA-NEXT: s_waitcnt vmcnt(1) ; GCN-HSA-NEXT: s_waitcnt vmcnt(1)
; GCN-HSA-NEXT: v_ashr_i64 v[10:11], v[4:5], 48 ; GCN-HSA-NEXT: v_ashr_i64 v[10:11], v[4:5], 48
; GCN-HSA-NEXT: v_bfe_i32 v8, v5, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v8, v5, 0, 16
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 31, v8 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 31, v8
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11]
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v5, v7 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, v7
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[8:11]
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 32
; GCN-HSA-NEXT: v_bfe_i32 v8, v5, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v8, v5, 0, 16
; GCN-HSA-NEXT: v_ashr_i64 v[10:11], v[6:7], 48 ; GCN-HSA-NEXT: v_ashr_i64 v[10:11], v[6:7], 48
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v6
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 31, v8 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 31, v8
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v6
; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[8:11]
; GCN-HSA-NEXT: v_bfe_i32 v7, v5, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v7, v5, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s3
; GCN-HSA-NEXT: v_bfe_i32 v5, v6, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v5, v6, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s2 ; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[8:11]
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v6, 31, v5 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v6, 31, v5
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s2
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v8, 31, v7 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v8, 31, v7
; GCN-HSA-NEXT: flat_store_dwordx4 v[9:10], v[5:8] ; GCN-HSA-NEXT: flat_store_dwordx4 v[9:10], v[5:8]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v6, 16, v4 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v6, 16, v4
; GCN-HSA-NEXT: v_bfe_i32 v4, v4, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v4, v4, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v6, v6, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v6, v6, 0, 16
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 31, v6 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 31, v6
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[4:7]
; GCN-HSA-NEXT: s_add_u32 s0, s0, 64 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_waitcnt vmcnt(4) ; GCN-HSA-NEXT: s_waitcnt vmcnt(4)
; GCN-HSA-NEXT: v_ashr_i64 v[6:7], v[0:1], 48 ; GCN-HSA-NEXT: v_ashr_i64 v[6:7], v[0:1], 48
; GCN-HSA-NEXT: v_bfe_i32 v4, v1, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v4, v1, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v11, v3 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, v3
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v8, 16, v2 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v8, 16, v2
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 64
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[4:7]
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GCN-HSA-NEXT: v_bfe_i32 v4, v0, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v4, v0, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v10, v8, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v10, v8, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v8, v2, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v8, v2, 0, 16
; GCN-HSA-NEXT: v_ashr_i64 v[2:3], v[2:3], 48 ; GCN-HSA-NEXT: v_ashr_i64 v[2:3], v[2:3], 48
; GCN-HSA-NEXT: v_bfe_i32 v0, v11, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v0, v11, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s1
; GCN-HSA-NEXT: v_bfe_i32 v6, v1, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v6, v1, 0, 16
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 31, v0 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 31, v0
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v20, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s0
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 31, v8 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 31, v8
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 31, v6 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 31, v6
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 31, v10 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 31, v10
; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[0:3]
; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[8:11] ; GCN-HSA-NEXT: flat_store_dwordx4 v[14:15], v[8:11]
; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[4:7]
▲ Show 20 Lines • Show All 399 Lines • ▼ Show 20 Lines
; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_mov_b32 s16, 0xffff ; GCN-HSA-NEXT: s_mov_b32 s16, 0xffff
; GCN-HSA-NEXT: v_mov_b32_e32 v1, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v3, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, v1
; GCN-HSA-NEXT: v_mov_b32_e32 v5, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, v1
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_add_u32 s4, s2, 16 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 16
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, s4
; GCN-HSA-NEXT: s_add_u32 s4, s2, 32 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 32
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s5
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s4
; GCN-HSA-NEXT: flat_load_dwordx4 v[6:9], v[6:7] ; GCN-HSA-NEXT: flat_load_dwordx4 v[6:9], v[6:7]
; GCN-HSA-NEXT: flat_load_dwordx4 v[10:13], v[10:11] ; GCN-HSA-NEXT: flat_load_dwordx4 v[10:13], v[10:11]
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2
; GCN-HSA-NEXT: s_add_u32 s2, s2, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s2, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s2
; GCN-HSA-NEXT: flat_load_dwordx4 v[14:17], v[14:15] ; GCN-HSA-NEXT: flat_load_dwordx4 v[14:17], v[14:15]
; GCN-HSA-NEXT: flat_load_dwordx4 v[18:21], v[18:19] ; GCN-HSA-NEXT: flat_load_dwordx4 v[18:21], v[18:19]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_add_u32 s4, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 16
; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xf0 ; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xf0
; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0
; GCN-HSA-NEXT: s_add_u32 s8, s0, 0xd0 ; GCN-HSA-NEXT: s_add_u32 s8, s0, 0xd0
; GCN-HSA-NEXT: s_addc_u32 s9, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s9, s1, 0
; GCN-HSA-NEXT: s_add_u32 s10, s0, 0xb0 ; GCN-HSA-NEXT: s_add_u32 s10, s0, 0xb0
; GCN-HSA-NEXT: s_addc_u32 s11, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s11, s1, 0
; GCN-HSA-NEXT: s_add_u32 s12, s0, 0x90 ; GCN-HSA-NEXT: s_add_u32 s12, s0, 0x90
; GCN-HSA-NEXT: s_addc_u32 s13, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s13, s1, 0
; GCN-HSA-NEXT: s_add_u32 s14, s0, 0x70 ; GCN-HSA-NEXT: s_add_u32 s14, s0, 0x70
; GCN-HSA-NEXT: s_addc_u32 s15, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s15, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v23, s15
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s14 ; GCN-HSA-NEXT: v_mov_b32_e32 v22, s14
; GCN-HSA-NEXT: s_add_u32 s14, s0, 0x50 ; GCN-HSA-NEXT: s_add_u32 s14, s0, 0x50
; GCN-HSA-NEXT: v_mov_b32_e32 v23, s15
; GCN-HSA-NEXT: s_addc_u32 s15, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s15, s1, 0
; GCN-HSA-NEXT: s_waitcnt vmcnt(3) ; GCN-HSA-NEXT: s_waitcnt vmcnt(3)
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v9 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v9
; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v9 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v9
; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[2:5] ; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[2:5]
; GCN-HSA-NEXT: v_mov_b32_e32 v23, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v23, s15
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v7 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v7
; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v7 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v7
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s14 ; GCN-HSA-NEXT: v_mov_b32_e32 v22, s14
; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[2:5] ; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[2:5]
; GCN-HSA-NEXT: v_mov_b32_e32 v23, s11 ; GCN-HSA-NEXT: v_mov_b32_e32 v23, s11
; GCN-HSA-NEXT: s_waitcnt vmcnt(4) ; GCN-HSA-NEXT: s_waitcnt vmcnt(4)
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v13 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v13
; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v13 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v13
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v22, s10
; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[2:5] ; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[2:5]
; GCN-HSA-NEXT: v_mov_b32_e32 v23, s13 ; GCN-HSA-NEXT: v_mov_b32_e32 v23, s13
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v11 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v11
; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v11 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v11
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s12 ; GCN-HSA-NEXT: v_mov_b32_e32 v22, s12
; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[2:5] ; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[2:5]
; GCN-HSA-NEXT: v_mov_b32_e32 v23, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v22, s4
; GCN-HSA-NEXT: s_add_u32 s4, s0, 32
; GCN-HSA-NEXT: s_waitcnt vmcnt(4) ; GCN-HSA-NEXT: s_waitcnt vmcnt(4)
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v19 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v19
; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v19 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v19
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v23, s5
; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[2:5] ; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[2:5]
; GCN-HSA-NEXT: v_mov_b32_e32 v23, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v23, s7
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v17 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v17
; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v17 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v17
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v22, s6
; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xe0
; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[2:5] ; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[2:5]
; GCN-HSA-NEXT: v_mov_b32_e32 v23, s9 ; GCN-HSA-NEXT: v_mov_b32_e32 v23, s9
; GCN-HSA-NEXT: s_add_u32 s4, s0, 32
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v15 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v15
; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v15 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v15
; GCN-HSA-NEXT: v_mov_b32_e32 v22, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v22, s8
; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[2:5]
; GCN-HSA-NEXT: v_mov_b32_e32 v7, 0 ; GCN-HSA-NEXT: v_mov_b32_e32 v7, 0
; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[22:23], v[2:5]
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, v7
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v18 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v18
; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v18 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v18
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s1
; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xe0 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s6
; GCN-HSA-NEXT: v_mov_b32_e32 v5, v7 ; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xc0
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s0
; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[2:5] ; GCN-HSA-NEXT: flat_store_dwordx4 v[17:18], v[2:5]
; GCN-HSA-NEXT: v_and_b32_e32 v0, s16, v21 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s6
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v16 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v16
; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v16 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v16
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s6
; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xc0
; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0
; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xa0
; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[2:5] ; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[2:5]
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v11, s6
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v14 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v14
; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v14 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v14
; GCN-HSA-NEXT: v_mov_b32_e32 v14, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v14, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s6
; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xa0
; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0
; GCN-HSA-NEXT: s_add_u32 s6, s0, 0x80
; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[2:5] ; GCN-HSA-NEXT: flat_store_dwordx4 v[13:14], v[2:5]
; GCN-HSA-NEXT: v_mov_b32_e32 v15, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s6
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v12 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v12
; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v12 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v12
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v11, s6
; GCN-HSA-NEXT: s_add_u32 s6, s0, 0x80
; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[11:12], v[2:5] ; GCN-HSA-NEXT: flat_store_dwordx4 v[11:12], v[2:5]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, s2
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v10 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v4, 16, v10
; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v10 ; GCN-HSA-NEXT: v_and_b32_e32 v2, s16, v10
; GCN-HSA-NEXT: v_mov_b32_e32 v10, s7 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, s7
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s6 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT: flat_store_dwordx4 v[9:10], v[2:5] ; GCN-HSA-NEXT: flat_store_dwordx4 v[9:10], v[2:5]
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v6 ; GCN-HSA-NEXT: v_and_b32_e32 v0, s16, v21
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v2, 16, v21 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v2, 16, v21
; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[0:3] ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v6
; GCN-HSA-NEXT: v_and_b32_e32 v9, s16, v6 ; GCN-HSA-NEXT: v_and_b32_e32 v9, s16, v6
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v6, 16, v20 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v6, 16, v20
; GCN-HSA-NEXT: v_and_b32_e32 v4, s16, v20 ; GCN-HSA-NEXT: v_and_b32_e32 v4, s16, v20
; GCN-HSA-NEXT: flat_store_dwordx4 v[15:16], v[0:3]
; GCN-HSA-NEXT: v_mov_b32_e32 v5, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, v1
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[4:7]
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2
; GCN-HSA-NEXT: s_add_u32 s0, s0, 64 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 64
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v14, 16, v8 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v14, 16, v8
; GCN-HSA-NEXT: v_and_b32_e32 v12, s16, v8 ; GCN-HSA-NEXT: v_and_b32_e32 v12, s16, v8
; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[4:7]
; GCN-HSA-NEXT: v_mov_b32_e32 v13, v1 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, v1
; GCN-HSA-NEXT: v_mov_b32_e32 v15, v7 ; GCN-HSA-NEXT: v_mov_b32_e32 v15, v7
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v10, v1
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[12:15] ; GCN-HSA-NEXT: flat_store_dwordx4 v[2:3], v[12:15]
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1 ; GCN-HSA-NEXT: v_mov_b32_e32 v10, v1
; GCN-HSA-NEXT: v_mov_b32_e32 v12, v7 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, v7
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s0
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s1
; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[9:12] ; GCN-HSA-NEXT: flat_store_dwordx4 v[0:1], v[9:12]
; GCN-HSA-NEXT: s_endpgm ; GCN-HSA-NEXT: s_endpgm
; ;
; GCN-NOHSA-VI-LABEL: global_zextload_v32i16_to_v32i64: ; GCN-NOHSA-VI-LABEL: global_zextload_v32i16_to_v32i64:
; GCN-NOHSA-VI: ; %bb.0: ; GCN-NOHSA-VI: ; %bb.0:
; GCN-NOHSA-VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN-NOHSA-VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN-NOHSA-VI-NEXT: s_mov_b32 s3, 0xf000 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s3, 0xf000
; GCN-NOHSA-VI-NEXT: s_mov_b32 s2, -1 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s2, -1
▲ Show 20 Lines • Show All 542 Lines • ▼ Show 20 Lines
; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[1:4], off, s[0:3], 0 ; GCN-NOHSA-SI-NEXT: buffer_store_dwordx4 v[1:4], off, s[0:3], 0
; GCN-NOHSA-SI-NEXT: s_endpgm ; GCN-NOHSA-SI-NEXT: s_endpgm
; ;
; GCN-HSA-LABEL: global_sextload_v32i16_to_v32i64: ; GCN-HSA-LABEL: global_sextload_v32i16_to_v32i64:
; GCN-HSA: ; %bb.0: ; GCN-HSA: ; %bb.0:
; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0 ; GCN-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0) ; GCN-HSA-NEXT: s_waitcnt lgkmcnt(0)
; GCN-HSA-NEXT: s_add_u32 s4, s2, 48 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 48
; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v0, s2
; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v2, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v3, s5
; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[0:1] ; GCN-HSA-NEXT: flat_load_dwordx4 v[4:7], v[0:1]
; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[2:3] ; GCN-HSA-NEXT: flat_load_dwordx4 v[0:3], v[2:3]
; GCN-HSA-NEXT: s_add_u32 s4, s2, 32 ; GCN-HSA-NEXT: s_add_u32 s4, s2, 32
; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s3, 0
; GCN-HSA-NEXT: s_add_u32 s2, s2, 16 ; GCN-HSA-NEXT: s_add_u32 s2, s2, 16
; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s3, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s4
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[8:9] ; GCN-HSA-NEXT: flat_load_dwordx4 v[8:11], v[8:9]
; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[12:13] ; GCN-HSA-NEXT: flat_load_dwordx4 v[12:15], v[12:13]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 48 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 48
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_add_u32 s4, s0, 16 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 16
; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v21, s5
; GCN-HSA-NEXT: v_mov_b32_e32 v20, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s4
; GCN-HSA-NEXT: s_waitcnt vmcnt(3) ; GCN-HSA-NEXT: s_waitcnt vmcnt(3)
; GCN-HSA-NEXT: v_ashr_i64 v[18:19], v[4:5], 48 ; GCN-HSA-NEXT: v_ashr_i64 v[18:19], v[4:5], 48
; GCN-HSA-NEXT: v_bfe_i32 v16, v5, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v16, v5, 0, 16
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v17, 31, v16 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v17, 31, v16
; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[16:19] ; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[16:19]
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v20, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v20, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xf0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xf0
; GCN-HSA-NEXT: v_mov_b32_e32 v21, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: s_add_u32 s4, s0, 0xd0 ; GCN-HSA-NEXT: s_add_u32 s4, s0, 0xd0
; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s5, s1, 0
; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xb0 ; GCN-HSA-NEXT: s_add_u32 s6, s0, 0xb0
; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s7, s1, 0
; GCN-HSA-NEXT: s_add_u32 s8, s0, 0x90 ; GCN-HSA-NEXT: s_add_u32 s8, s0, 0x90
; GCN-HSA-NEXT: s_addc_u32 s9, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s9, s1, 0
; GCN-HSA-NEXT: s_add_u32 s10, s0, 0x70 ; GCN-HSA-NEXT: s_add_u32 s10, s0, 0x70
; GCN-HSA-NEXT: s_addc_u32 s11, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s11, s1, 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, v7 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, v7
; GCN-HSA-NEXT: s_add_u32 s12, s0, 0x50 ; GCN-HSA-NEXT: s_add_u32 s12, s0, 0x50
; GCN-HSA-NEXT: v_bfe_i32 v16, v5, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v16, v5, 0, 16
; GCN-HSA-NEXT: v_ashr_i64 v[18:19], v[6:7], 48 ; GCN-HSA-NEXT: v_ashr_i64 v[18:19], v[6:7], 48
; GCN-HSA-NEXT: s_addc_u32 s13, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s13, s1, 0
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v17, 31, v16 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v17, 31, v16
; GCN-HSA-NEXT: s_add_u32 s14, s0, 32 ; GCN-HSA-NEXT: s_add_u32 s14, s0, 32
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v6 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v6
; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[16:19] ; GCN-HSA-NEXT: flat_store_dwordx4 v[20:21], v[16:19]
; GCN-HSA-NEXT: s_addc_u32 s15, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s15, s1, 0
; GCN-HSA-NEXT: v_bfe_i32 v18, v5, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v18, v5, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v16, v6, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v16, v6, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s14
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v17, 31, v16 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v17, 31, v16
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v19, 31, v18 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v19, 31, v18
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s14
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s15 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, s15
; GCN-HSA-NEXT: flat_store_dwordx4 v[5:6], v[16:19] ; GCN-HSA-NEXT: flat_store_dwordx4 v[5:6], v[16:19]
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v4 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v4
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s1
; GCN-HSA-NEXT: v_bfe_i32 v4, v4, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v4, v4, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v6, v5, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v6, v5, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s0
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 31, v6 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 31, v6
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[4:7]
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s5 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s5
; GCN-HSA-NEXT: s_waitcnt vmcnt(6) ; GCN-HSA-NEXT: s_waitcnt vmcnt(6)
; GCN-HSA-NEXT: v_ashr_i64 v[6:7], v[0:1], 48 ; GCN-HSA-NEXT: v_ashr_i64 v[6:7], v[0:1], 48
; GCN-HSA-NEXT: v_bfe_i32 v4, v1, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v4, v1, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s4 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s4
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4
; GCN-HSA-NEXT: v_mov_b32_e32 v1, v3 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, v3
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[4:7]
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v19, s3
; GCN-HSA-NEXT: v_bfe_i32 v4, v1, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v4, v1, 0, 16
; GCN-HSA-NEXT: v_ashr_i64 v[6:7], v[2:3], 48 ; GCN-HSA-NEXT: v_ashr_i64 v[6:7], v[2:3], 48
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s2
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4
; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[4:7] ; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[4:7]
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s9
; GCN-HSA-NEXT: s_waitcnt vmcnt(7) ; GCN-HSA-NEXT: s_waitcnt vmcnt(7)
; GCN-HSA-NEXT: v_ashr_i64 v[5:6], v[8:9], 48
; GCN-HSA-NEXT: v_bfe_i32 v3, v9, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v3, v9, 0, 16
; GCN-HSA-NEXT: v_ashr_i64 v[5:6], v[8:9], 48
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s9
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s8 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s8
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v4, 31, v3 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v4, 31, v3
; GCN-HSA-NEXT: v_mov_b32_e32 v1, v11 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, v11
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s7
; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[3:6] ; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[3:6]
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s6 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s7
; GCN-HSA-NEXT: v_bfe_i32 v3, v1, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v3, v1, 0, 16
; GCN-HSA-NEXT: v_ashr_i64 v[5:6], v[10:11], 48 ; GCN-HSA-NEXT: v_ashr_i64 v[5:6], v[10:11], 48
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s6
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v4, 31, v3 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v4, 31, v3
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[3:6] ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[3:6]
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s13 ; GCN-HSA-NEXT: v_mov_b32_e32 v17, s13
; GCN-HSA-NEXT: s_waitcnt vmcnt(8) ; GCN-HSA-NEXT: s_waitcnt vmcnt(8)
; GCN-HSA-NEXT: v_ashr_i64 v[5:6], v[12:13], 48 ; GCN-HSA-NEXT: v_ashr_i64 v[5:6], v[12:13], 48
; GCN-HSA-NEXT: v_bfe_i32 v3, v13, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v3, v13, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s12 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s12
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v4, 31, v3 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v4, 31, v3
; GCN-HSA-NEXT: v_mov_b32_e32 v1, v15 ; GCN-HSA-NEXT: v_mov_b32_e32 v1, v15
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s11
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[3:6] ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[3:6]
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xe0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xe0
; GCN-HSA-NEXT: v_bfe_i32 v3, v1, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v3, v1, 0, 16
; GCN-HSA-NEXT: v_ashr_i64 v[5:6], v[14:15], 48 ; GCN-HSA-NEXT: v_ashr_i64 v[5:6], v[14:15], 48
; GCN-HSA-NEXT: v_mov_b32_e32 v19, s11
; GCN-HSA-NEXT: v_mov_b32_e32 v18, s10 ; GCN-HSA-NEXT: v_mov_b32_e32 v18, s10
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v2 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v7, 16, v2
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v4, 31, v3 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v4, 31, v3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[3:6] ; GCN-HSA-NEXT: flat_store_dwordx4 v[18:19], v[3:6]
; GCN-HSA-NEXT: v_bfe_i32 v1, v2, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v1, v2, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v3, v7, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v3, v7, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v6, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v6, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xc0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xc0
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v0 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v5, 16, v0
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v2, 31, v1 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v2, 31, v1
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v4, 31, v3 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v4, 31, v3
; GCN-HSA-NEXT: v_mov_b32_e32 v7, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: flat_store_dwordx4 v[6:7], v[1:4] ; GCN-HSA-NEXT: flat_store_dwordx4 v[6:7], v[1:4]
; GCN-HSA-NEXT: v_bfe_i32 v0, v0, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v0, v0, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v2, v5, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v2, v5, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xa0 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0xa0
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v15, 16, v10 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v15, 16, v10
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 31, v0 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 31, v0
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 31, v2 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 31, v2
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3 ; GCN-HSA-NEXT: v_mov_b32_e32 v5, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v6, 16, v14 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v6, 16, v14
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: v_bfe_i32 v4, v14, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v4, v14, 0, 16
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v2, 16, v12 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v2, 16, v12
; GCN-HSA-NEXT: v_bfe_i32 v0, v12, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v0, v12, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v12, v10, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v12, v10, 0, 16
; GCN-HSA-NEXT: v_bfe_i32 v14, v15, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v14, v15, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v16, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x80
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v13, 31, v12 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v13, 31, v12
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 31, v14 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v15, 31, v14
; GCN-HSA-NEXT: v_mov_b32_e32 v17, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v8 ; GCN-HSA-NEXT: v_lshrrev_b32_e32 v11, 16, v8
; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[12:15] ; GCN-HSA-NEXT: flat_store_dwordx4 v[16:17], v[12:15]
; GCN-HSA-NEXT: v_bfe_i32 v8, v8, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v8, v8, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: v_bfe_i32 v10, v11, 0, 16
; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2 ; GCN-HSA-NEXT: v_mov_b32_e32 v12, s2
; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60 ; GCN-HSA-NEXT: s_add_u32 s2, s0, 0x60
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 31, v8 ; GCN-HSA-NEXT: v_bfe_i32 v10, v11, 0, 16
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 31, v10 ; GCN-HSA-NEXT: v_mov_b32_e32 v13, s3
; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s3, s1, 0
; GCN-HSA-NEXT: v_bfe_i32 v6, v6, 0, 16 ; GCN-HSA-NEXT: v_bfe_i32 v6, v6, 0, 16
; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[8:11] ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v9, 31, v8
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v11, 31, v10
; GCN-HSA-NEXT: s_add_u32 s0, s0, 64 ; GCN-HSA-NEXT: s_add_u32 s0, s0, 64
; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v5, 31, v4
; GCN-HSA-NEXT: v_bfe_i32 v2, v2, 0, 16
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 31, v6 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v7, 31, v6
; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2 ; GCN-HSA-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0 ; GCN-HSA-NEXT: s_addc_u32 s1, s1, 0
; GCN-HSA-NEXT: v_bfe_i32 v2, v2, 0, 16 ; GCN-HSA-NEXT: v_mov_b32_e32 v9, s3
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[4:7] ; GCN-HSA-NEXT: v_mov_b32_e32 v8, s2
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 31, v0 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v1, 31, v0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 31, v2 ; GCN-HSA-NEXT: v_ashrrev_i32_e32 v3, 31, v2
; GCN-HSA-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
; GCN-HSA-NEXT: s_nop 0
; GCN-HSA-NEXT: v_mov_b32_e32 v5, s1
; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0 ; GCN-HSA-NEXT: v_mov_b32_e32 v4, s0
; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-HSA-NEXT: s_endpgm ; GCN-HSA-NEXT: s_endpgm
; ;
; GCN-NOHSA-VI-LABEL: global_sextload_v32i16_to_v32i64: ; GCN-NOHSA-VI-LABEL: global_sextload_v32i16_to_v32i64:
; GCN-NOHSA-VI: ; %bb.0: ; GCN-NOHSA-VI: ; %bb.0:
; GCN-NOHSA-VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24 ; GCN-NOHSA-VI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
; GCN-NOHSA-VI-NEXT: s_mov_b32 s3, 0xf000 ; GCN-NOHSA-VI-NEXT: s_mov_b32 s3, 0xf000
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llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-agent.ll

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; GFX7-LABEL: flat_agent_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: flat_agent_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_monotonic_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_agent_monotonic_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_monotonic_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_monotonic_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_monotonic_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_monotonic_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_agent_acquire_monotonic_cmpxchg: ; GFX7-LABEL: flat_agent_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_acquire_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_agent_acquire_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_acquire_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_acquire_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_acquire_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_acquire_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_agent_release_monotonic_cmpxchg: ; GFX7-LABEL: flat_agent_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_release_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_agent_release_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_release_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_release_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_release_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_release_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_agent_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: flat_agent_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_acq_rel_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_agent_acq_rel_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_acq_rel_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_acq_rel_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_acq_rel_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_acq_rel_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_agent_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: flat_agent_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_seq_cst_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_agent_seq_cst_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_seq_cst_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_seq_cst_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_seq_cst_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_seq_cst_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_agent_monotonic_acquire_cmpxchg: ; GFX7-LABEL: flat_agent_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_monotonic_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_agent_monotonic_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_monotonic_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_monotonic_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_monotonic_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_monotonic_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_agent_acquire_acquire_cmpxchg: ; GFX7-LABEL: flat_agent_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_acquire_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_agent_acquire_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_acquire_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_acquire_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_acquire_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_acquire_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_agent_release_acquire_cmpxchg: ; GFX7-LABEL: flat_agent_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_release_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_agent_release_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_release_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_release_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_release_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_release_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_agent_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: flat_agent_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_acq_rel_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_agent_acq_rel_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_acq_rel_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_acq_rel_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_acq_rel_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_acq_rel_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_agent_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: flat_agent_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_seq_cst_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_agent_seq_cst_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_seq_cst_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_seq_cst_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_seq_cst_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_seq_cst_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
Show All 31 Lines
; GFX7-LABEL: flat_agent_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: flat_agent_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_monotonic_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_monotonic_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_agent_monotonic_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_monotonic_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_monotonic_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_monotonic_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_monotonic_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_agent_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: flat_agent_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_acquire_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_acquire_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_agent_acquire_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_acquire_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_acquire_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_acquire_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_acquire_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_agent_release_seq_cst_cmpxchg: ; GFX7-LABEL: flat_agent_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_release_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_release_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_agent_release_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_release_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_release_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_release_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_release_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
Show All 31 Lines
; GFX7-LABEL: flat_agent_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: flat_agent_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_acq_rel_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_acq_rel_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_agent_acq_rel_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_acq_rel_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_acq_rel_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_acq_rel_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_acq_rel_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_agent_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: flat_agent_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_seq_cst_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_agent_seq_cst_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_seq_cst_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_seq_cst_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_seq_cst_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_seq_cst_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_agent_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_agent_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_monotonic_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_monotonic_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_monotonic_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_monotonic_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_monotonic_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_monotonic_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_agent_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_agent_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_acquire_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_acquire_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_acquire_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_acquire_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_acquire_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_acquire_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 35 Lines
; GFX7-LABEL: flat_agent_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_agent_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_release_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_release_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_release_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_release_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_release_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_release_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 36 Lines
; GFX7-LABEL: flat_agent_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_agent_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_acq_rel_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_acq_rel_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_acq_rel_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_acq_rel_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_acq_rel_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_acq_rel_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 38 Lines
; GFX7-LABEL: flat_agent_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_agent_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_seq_cst_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_seq_cst_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_seq_cst_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_seq_cst_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_seq_cst_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_seq_cst_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 38 Lines
; GFX7-LABEL: flat_agent_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_agent_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_monotonic_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_monotonic_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_monotonic_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_monotonic_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_monotonic_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_monotonic_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 35 Lines
; GFX7-LABEL: flat_agent_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_agent_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_acquire_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_acquire_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_acquire_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_acquire_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_acquire_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_acquire_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 35 Lines
; GFX7-LABEL: flat_agent_release_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_agent_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_release_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_release_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_release_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_release_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_release_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_release_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 38 Lines
; GFX7-LABEL: flat_agent_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_agent_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_acq_rel_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_acq_rel_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_acq_rel_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_acq_rel_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_acq_rel_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_acq_rel_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 38 Lines
; GFX7-LABEL: flat_agent_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_agent_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_seq_cst_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_seq_cst_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_seq_cst_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_seq_cst_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_seq_cst_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_seq_cst_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 38 Lines
; GFX7-LABEL: flat_agent_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_agent_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_monotonic_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_monotonic_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_monotonic_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_monotonic_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_monotonic_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_monotonic_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 38 Lines
; GFX7-LABEL: flat_agent_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_agent_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_acquire_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_acquire_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_acquire_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_acquire_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_acquire_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_acquire_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 38 Lines
; GFX7-LABEL: flat_agent_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_agent_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_release_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_release_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_release_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_release_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_release_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_release_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 38 Lines
; GFX7-LABEL: flat_agent_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_agent_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_acq_rel_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_acq_rel_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 38 Lines
; GFX7-LABEL: flat_agent_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_agent_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_seq_cst_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_seq_cst_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
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; GFX7-LABEL: flat_agent_one_as_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_monotonic_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_monotonic_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_monotonic_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_monotonic_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_monotonic_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_monotonic_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_agent_one_as_acquire_monotonic_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_acquire_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_acquire_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acquire_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acquire_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_acquire_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_acquire_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_agent_one_as_release_monotonic_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_release_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_release_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_release_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_release_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_release_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_release_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
Show All 26 Lines
; GFX7-LABEL: flat_agent_one_as_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_acq_rel_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_acq_rel_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acq_rel_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acq_rel_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_acq_rel_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_acq_rel_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_agent_one_as_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_seq_cst_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_seq_cst_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_seq_cst_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_seq_cst_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_seq_cst_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_seq_cst_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_agent_one_as_monotonic_acquire_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_monotonic_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_monotonic_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_monotonic_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_monotonic_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_monotonic_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_monotonic_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_agent_one_as_acquire_acquire_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_acquire_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_acquire_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acquire_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acquire_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_acquire_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_acquire_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_agent_one_as_release_acquire_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_release_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_release_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_release_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_release_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_release_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_release_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
Show All 31 Lines
; GFX7-LABEL: flat_agent_one_as_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_acq_rel_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_acq_rel_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acq_rel_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acq_rel_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_acq_rel_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_acq_rel_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
Show All 31 Lines
; GFX7-LABEL: flat_agent_one_as_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_seq_cst_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_seq_cst_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_seq_cst_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_seq_cst_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_seq_cst_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_seq_cst_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
Show All 31 Lines
; GFX7-LABEL: flat_agent_one_as_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_monotonic_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_monotonic_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_monotonic_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_monotonic_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_monotonic_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_monotonic_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_monotonic_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
Show All 31 Lines
; GFX7-LABEL: flat_agent_one_as_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_acquire_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_acquire_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_acquire_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acquire_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acquire_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_acquire_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_acquire_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_agent_one_as_release_seq_cst_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_release_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_release_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_release_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_release_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_release_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_release_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_release_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_agent_one_as_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_acq_rel_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_acq_rel_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_acq_rel_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acq_rel_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acq_rel_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_acq_rel_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_acq_rel_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
Show All 31 Lines
; GFX7-LABEL: flat_agent_one_as_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_seq_cst_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_seq_cst_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_seq_cst_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_seq_cst_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_seq_cst_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_agent_one_as_seq_cst_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
Show All 31 Lines
; GFX7-LABEL: flat_agent_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_monotonic_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_monotonic_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_agent_one_as_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_acquire_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_acquire_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_acquire_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_acquire_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acquire_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acquire_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 37 Lines
; GFX7-LABEL: flat_agent_one_as_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_release_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_release_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_release_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_release_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_release_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_release_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 36 Lines
; GFX7-LABEL: flat_agent_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acq_rel_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acq_rel_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 40 Lines
; GFX7-LABEL: flat_agent_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_seq_cst_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_seq_cst_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 40 Lines
; GFX7-LABEL: flat_agent_one_as_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_monotonic_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_monotonic_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_monotonic_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_monotonic_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_monotonic_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_monotonic_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 37 Lines
; GFX7-LABEL: flat_agent_one_as_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_acquire_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_acquire_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_acquire_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_acquire_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acquire_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acquire_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 37 Lines
; GFX7-LABEL: flat_agent_one_as_release_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_release_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_release_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_release_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_release_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_release_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_release_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 40 Lines
; GFX7-LABEL: flat_agent_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acq_rel_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acq_rel_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 40 Lines
; GFX7-LABEL: flat_agent_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_seq_cst_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_seq_cst_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 40 Lines
; GFX7-LABEL: flat_agent_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_monotonic_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_monotonic_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 40 Lines
; GFX7-LABEL: flat_agent_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acquire_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acquire_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 40 Lines
; GFX7-LABEL: flat_agent_one_as_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_release_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_release_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_release_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_release_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_release_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_release_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 40 Lines
; GFX7-LABEL: flat_agent_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acq_rel_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_acq_rel_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 40 Lines
; GFX7-LABEL: flat_agent_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_agent_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_agent_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_agent_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_agent_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_agent_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_agent_one_as_seq_cst_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_agent_one_as_seq_cst_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
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llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-singlethread.ll

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; GFX7-LABEL: flat_singlethread_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: flat_singlethread_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_monotonic_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_monotonic_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_monotonic_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_monotonic_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_monotonic_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_monotonic_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_acquire_monotonic_cmpxchg: ; GFX7-LABEL: flat_singlethread_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_acquire_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_acquire_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_acquire_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_acquire_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_acquire_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_acquire_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_release_monotonic_cmpxchg: ; GFX7-LABEL: flat_singlethread_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_release_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_release_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_release_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_release_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_release_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_release_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: flat_singlethread_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_acq_rel_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_acq_rel_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_acq_rel_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_acq_rel_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_acq_rel_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_acq_rel_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: flat_singlethread_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_seq_cst_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_seq_cst_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_seq_cst_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_seq_cst_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_seq_cst_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_seq_cst_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_monotonic_acquire_cmpxchg: ; GFX7-LABEL: flat_singlethread_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_monotonic_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_monotonic_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_monotonic_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_monotonic_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_monotonic_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_monotonic_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_acquire_acquire_cmpxchg: ; GFX7-LABEL: flat_singlethread_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_acquire_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_acquire_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_acquire_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_acquire_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_acquire_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_acquire_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_release_acquire_cmpxchg: ; GFX7-LABEL: flat_singlethread_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_release_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_release_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_release_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_release_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_release_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_release_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: flat_singlethread_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_acq_rel_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_acq_rel_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_acq_rel_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_acq_rel_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_acq_rel_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_acq_rel_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: flat_singlethread_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_seq_cst_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_seq_cst_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_seq_cst_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_seq_cst_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_seq_cst_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_seq_cst_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: flat_singlethread_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_monotonic_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_monotonic_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_monotonic_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_monotonic_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_monotonic_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_monotonic_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_monotonic_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: flat_singlethread_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_acquire_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_acquire_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_acquire_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_acquire_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_acquire_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_acquire_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_acquire_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_release_seq_cst_cmpxchg: ; GFX7-LABEL: flat_singlethread_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_release_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_release_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_release_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_release_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_release_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_release_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_release_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: flat_singlethread_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_acq_rel_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_acq_rel_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_acq_rel_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_acq_rel_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_acq_rel_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_acq_rel_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_acq_rel_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: flat_singlethread_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_seq_cst_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_seq_cst_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_seq_cst_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_seq_cst_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_seq_cst_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_seq_cst_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 23 Lines
; GFX7-LABEL: flat_singlethread_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_monotonic_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_monotonic_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_monotonic_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_monotonic_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_monotonic_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_monotonic_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_acquire_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_acquire_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_acquire_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_acquire_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_acquire_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_acquire_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_release_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_release_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_release_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_release_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_release_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_release_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_acq_rel_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_acq_rel_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_acq_rel_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_acq_rel_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_acq_rel_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_acq_rel_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_seq_cst_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_seq_cst_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_seq_cst_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_seq_cst_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_seq_cst_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_seq_cst_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_monotonic_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_monotonic_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_monotonic_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_monotonic_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_monotonic_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_monotonic_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_acquire_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_acquire_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_acquire_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_acquire_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_acquire_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_acquire_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_release_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_release_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_release_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_release_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_release_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_release_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_release_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_acq_rel_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_acq_rel_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_acq_rel_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_acq_rel_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_acq_rel_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_acq_rel_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_seq_cst_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_seq_cst_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_seq_cst_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_seq_cst_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_seq_cst_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_seq_cst_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_monotonic_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_monotonic_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_monotonic_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_monotonic_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_monotonic_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_monotonic_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_acquire_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_acquire_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_acquire_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_acquire_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_acquire_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_acquire_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_release_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_release_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_release_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_release_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_release_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_release_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_acq_rel_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_acq_rel_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
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; GFX7-LABEL: flat_singlethread_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_seq_cst_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_seq_cst_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 1,276 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_singlethread_one_as_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_monotonic_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_monotonic_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_monotonic_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_monotonic_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_monotonic_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_monotonic_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_one_as_acquire_monotonic_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_acquire_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_acquire_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acquire_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acquire_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_acquire_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_acquire_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_one_as_release_monotonic_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_release_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_release_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_release_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_release_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_release_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_release_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_one_as_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_acq_rel_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_acq_rel_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acq_rel_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acq_rel_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_acq_rel_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_acq_rel_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_one_as_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_seq_cst_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_seq_cst_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_seq_cst_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_seq_cst_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_seq_cst_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_seq_cst_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_one_as_monotonic_acquire_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_monotonic_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_monotonic_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_monotonic_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_monotonic_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_monotonic_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_monotonic_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 23 Lines
; GFX7-LABEL: flat_singlethread_one_as_acquire_acquire_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_acquire_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_acquire_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acquire_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acquire_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_acquire_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_acquire_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_one_as_release_acquire_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_release_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_release_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_release_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_release_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_release_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_release_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_one_as_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_acq_rel_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_acq_rel_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acq_rel_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acq_rel_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_acq_rel_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_acq_rel_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_one_as_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_seq_cst_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_seq_cst_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_seq_cst_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_seq_cst_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_seq_cst_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_seq_cst_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_one_as_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_monotonic_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_monotonic_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_monotonic_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_monotonic_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_monotonic_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_monotonic_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_monotonic_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 23 Lines
; GFX7-LABEL: flat_singlethread_one_as_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_acquire_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_acquire_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_acquire_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acquire_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acquire_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_acquire_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_acquire_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_one_as_release_seq_cst_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_release_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_release_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_release_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_release_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_release_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_release_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_release_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 23 Lines
; GFX7-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 23 Lines
; GFX7-LABEL: flat_singlethread_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_monotonic_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_monotonic_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_one_as_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_acquire_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_acquire_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_acquire_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_acquire_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acquire_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acquire_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_one_as_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_release_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_release_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_release_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_release_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_release_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_release_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acq_rel_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acq_rel_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_seq_cst_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_seq_cst_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_one_as_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_monotonic_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_monotonic_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_monotonic_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_monotonic_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_monotonic_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_monotonic_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_one_as_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_acquire_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_acquire_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_acquire_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_acquire_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acquire_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acquire_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_one_as_release_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_release_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_release_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_release_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_release_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_release_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_release_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acq_rel_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acq_rel_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_seq_cst_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_seq_cst_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_monotonic_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_monotonic_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acquire_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acquire_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_one_as_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_release_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_release_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_release_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_release_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_release_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_release_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_acq_rel_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_singlethread_one_as_seq_cst_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 32 Lines

llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-system.ll

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; GFX7-LABEL: flat_system_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: flat_system_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_system_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_monotonic_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_system_monotonic_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_monotonic_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_monotonic_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_monotonic_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_monotonic_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_system_acquire_monotonic_cmpxchg: ; GFX7-LABEL: flat_system_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_system_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_acquire_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_system_acquire_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_acquire_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_acquire_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_acquire_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_acquire_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_system_release_monotonic_cmpxchg: ; GFX7-LABEL: flat_system_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_system_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_release_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_system_release_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_release_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_release_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_release_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_release_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_system_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: flat_system_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_system_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_acq_rel_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_system_acq_rel_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_acq_rel_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_acq_rel_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_acq_rel_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_acq_rel_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: flat_system_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_system_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_seq_cst_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_system_seq_cst_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_seq_cst_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_seq_cst_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_seq_cst_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_seq_cst_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_monotonic_acquire_cmpxchg: ; GFX7-LABEL: flat_system_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_system_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_monotonic_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_system_monotonic_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_monotonic_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_monotonic_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_monotonic_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_monotonic_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_system_acquire_acquire_cmpxchg: ; GFX7-LABEL: flat_system_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_system_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_acquire_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_system_acquire_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_acquire_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_acquire_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_acquire_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_acquire_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_system_release_acquire_cmpxchg: ; GFX7-LABEL: flat_system_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_system_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_release_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_system_release_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_release_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_release_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_release_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_release_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: flat_system_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_system_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_acq_rel_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_system_acq_rel_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_acq_rel_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_acq_rel_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_acq_rel_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_acq_rel_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: flat_system_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_system_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_seq_cst_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_system_seq_cst_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_seq_cst_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_seq_cst_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_seq_cst_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_seq_cst_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: flat_system_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_system_monotonic_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_monotonic_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_system_monotonic_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_monotonic_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_monotonic_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_monotonic_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_monotonic_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
Show All 35 Lines
; GFX7-LABEL: flat_system_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: flat_system_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_system_acquire_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_acquire_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_system_acquire_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_acquire_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_acquire_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_acquire_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_acquire_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_release_seq_cst_cmpxchg: ; GFX7-LABEL: flat_system_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_system_release_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_release_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_system_release_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_release_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_release_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_release_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_release_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: flat_system_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_system_acq_rel_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_acq_rel_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_system_acq_rel_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_acq_rel_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_acq_rel_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_acq_rel_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_acq_rel_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: flat_system_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_system_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_seq_cst_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_system_seq_cst_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_seq_cst_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_seq_cst_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_seq_cst_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_seq_cst_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
Show All 35 Lines
; GFX7-LABEL: flat_system_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_system_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_monotonic_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_monotonic_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_monotonic_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_monotonic_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_monotonic_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_monotonic_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_system_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_system_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_acquire_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_acquire_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_acquire_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_acquire_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_acquire_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_acquire_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 37 Lines
; GFX7-LABEL: flat_system_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_system_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_release_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_release_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_release_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_release_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_release_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_release_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 38 Lines
; GFX7-LABEL: flat_system_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_system_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_acq_rel_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_acq_rel_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_acq_rel_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_acq_rel_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_acq_rel_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_acq_rel_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_system_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_seq_cst_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_seq_cst_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_seq_cst_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_seq_cst_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_seq_cst_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_seq_cst_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_system_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_monotonic_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_monotonic_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_monotonic_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_monotonic_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_monotonic_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_monotonic_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 37 Lines
; GFX7-LABEL: flat_system_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_system_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_acquire_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_acquire_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_acquire_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_acquire_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_acquire_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_acquire_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 37 Lines
; GFX7-LABEL: flat_system_release_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_system_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_release_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_release_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_release_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_release_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_release_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_release_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_system_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_acq_rel_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_acq_rel_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_acq_rel_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_acq_rel_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_acq_rel_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_acq_rel_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_system_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_seq_cst_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_seq_cst_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_seq_cst_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_seq_cst_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_seq_cst_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_seq_cst_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_system_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_monotonic_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_monotonic_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_monotonic_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_monotonic_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_monotonic_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_monotonic_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_system_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_acquire_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_acquire_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_acquire_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_acquire_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_acquire_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_acquire_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_system_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_release_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_release_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_release_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_release_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_release_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_release_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_system_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_acq_rel_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_acq_rel_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
▲ Show 20 Lines • Show All 42 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_system_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_seq_cst_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_seq_cst_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
▲ Show 20 Lines • Show All 1,475 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_one_as_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: flat_system_one_as_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_monotonic_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_monotonic_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_monotonic_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_monotonic_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_monotonic_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_monotonic_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_system_one_as_acquire_monotonic_cmpxchg: ; GFX7-LABEL: flat_system_one_as_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_acquire_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_acquire_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_acquire_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_acquire_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_acquire_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_acquire_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_system_one_as_release_monotonic_cmpxchg: ; GFX7-LABEL: flat_system_one_as_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_release_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_release_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_release_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_release_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_release_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_release_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_system_one_as_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: flat_system_one_as_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_acq_rel_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_acq_rel_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_acq_rel_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_acq_rel_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_acq_rel_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_acq_rel_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_one_as_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: flat_system_one_as_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_seq_cst_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_seq_cst_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_seq_cst_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_seq_cst_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_seq_cst_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_seq_cst_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_one_as_monotonic_acquire_cmpxchg: ; GFX7-LABEL: flat_system_one_as_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_monotonic_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_monotonic_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_monotonic_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_monotonic_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_monotonic_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_monotonic_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_system_one_as_acquire_acquire_cmpxchg: ; GFX7-LABEL: flat_system_one_as_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_acquire_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_acquire_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_acquire_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_acquire_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_acquire_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_acquire_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_system_one_as_release_acquire_cmpxchg: ; GFX7-LABEL: flat_system_one_as_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_release_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_release_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_release_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_release_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_release_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_release_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_one_as_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: flat_system_one_as_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_acq_rel_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_acq_rel_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_acq_rel_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_acq_rel_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_acq_rel_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_acq_rel_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_one_as_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: flat_system_one_as_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_seq_cst_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_seq_cst_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_seq_cst_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_seq_cst_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_seq_cst_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_seq_cst_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_one_as_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: flat_system_one_as_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_monotonic_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_monotonic_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_monotonic_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_monotonic_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_monotonic_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_monotonic_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_monotonic_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_one_as_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: flat_system_one_as_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_acquire_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_acquire_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_acquire_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_acquire_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_acquire_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_acquire_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_acquire_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
Show All 35 Lines
; GFX7-LABEL: flat_system_one_as_release_seq_cst_cmpxchg: ; GFX7-LABEL: flat_system_one_as_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_release_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_release_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_release_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_release_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_release_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_release_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_release_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_one_as_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: flat_system_one_as_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_acq_rel_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_acq_rel_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_acq_rel_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_acq_rel_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_acq_rel_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_acq_rel_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_acq_rel_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_one_as_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: flat_system_one_as_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_seq_cst_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_seq_cst_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_seq_cst_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_seq_cst_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_seq_cst_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_system_one_as_seq_cst_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_system_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_system_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_monotonic_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_monotonic_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_system_one_as_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_system_one_as_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_acquire_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_acquire_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_acquire_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_acquire_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_acquire_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_acquire_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 39 Lines
; GFX7-LABEL: flat_system_one_as_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_system_one_as_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_release_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_release_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_release_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_release_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_release_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_release_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 38 Lines
; GFX7-LABEL: flat_system_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_system_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_acq_rel_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_acq_rel_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_system_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_seq_cst_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_seq_cst_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_one_as_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_system_one_as_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_monotonic_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_monotonic_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_monotonic_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_monotonic_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_monotonic_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_monotonic_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 39 Lines
; GFX7-LABEL: flat_system_one_as_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_system_one_as_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_acquire_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_acquire_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_acquire_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_acquire_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_acquire_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_acquire_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 39 Lines
; GFX7-LABEL: flat_system_one_as_release_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_system_one_as_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_release_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_release_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_release_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_release_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_release_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_release_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_system_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_acq_rel_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_acq_rel_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_system_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_seq_cst_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_seq_cst_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_system_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_monotonic_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_monotonic_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_system_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_acquire_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_acquire_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_one_as_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_system_one_as_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_release_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_release_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_release_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_release_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_release_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_release_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_system_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_acq_rel_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_acq_rel_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 44 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_system_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_system_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_system_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_system_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: buffer_gl1_inv ; GFX10-WGP-NEXT: buffer_gl1_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_system_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_system_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-CU-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: buffer_gl0_inv ; GFX10-CU-NEXT: buffer_gl0_inv
; GFX10-CU-NEXT: buffer_gl1_inv ; GFX10-CU-NEXT: buffer_gl1_inv
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_system_one_as_seq_cst_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_system_one_as_seq_cst_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
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llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-wavefront.ll

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; GFX7-LABEL: flat_wavefront_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: flat_wavefront_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_monotonic_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_monotonic_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_monotonic_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_monotonic_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_monotonic_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_monotonic_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_acquire_monotonic_cmpxchg: ; GFX7-LABEL: flat_wavefront_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_acquire_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_acquire_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_acquire_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_acquire_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_acquire_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_acquire_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_release_monotonic_cmpxchg: ; GFX7-LABEL: flat_wavefront_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_release_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_release_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_release_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_release_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_release_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_release_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: flat_wavefront_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_acq_rel_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_acq_rel_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_acq_rel_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_acq_rel_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_acq_rel_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_acq_rel_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: flat_wavefront_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_seq_cst_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_seq_cst_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_seq_cst_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_seq_cst_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_seq_cst_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_seq_cst_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_monotonic_acquire_cmpxchg: ; GFX7-LABEL: flat_wavefront_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_monotonic_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_monotonic_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_monotonic_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_monotonic_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_monotonic_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_monotonic_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_acquire_acquire_cmpxchg: ; GFX7-LABEL: flat_wavefront_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_acquire_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_acquire_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_acquire_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_acquire_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_acquire_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_acquire_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_release_acquire_cmpxchg: ; GFX7-LABEL: flat_wavefront_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_release_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_release_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_release_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_release_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_release_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_release_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: flat_wavefront_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_acq_rel_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_acq_rel_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_acq_rel_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_acq_rel_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_acq_rel_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_acq_rel_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: flat_wavefront_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_seq_cst_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_seq_cst_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_seq_cst_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_seq_cst_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_seq_cst_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_seq_cst_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: flat_wavefront_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_monotonic_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_monotonic_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_monotonic_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_monotonic_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_monotonic_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_monotonic_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_monotonic_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: flat_wavefront_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_acquire_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_acquire_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_acquire_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_acquire_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_acquire_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_acquire_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_acquire_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 23 Lines
; GFX7-LABEL: flat_wavefront_release_seq_cst_cmpxchg: ; GFX7-LABEL: flat_wavefront_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_release_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_release_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_release_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_release_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_release_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_release_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_release_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: flat_wavefront_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_acq_rel_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_acq_rel_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_acq_rel_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_acq_rel_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_acq_rel_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_acq_rel_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_acq_rel_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: flat_wavefront_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_seq_cst_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_seq_cst_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_seq_cst_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_seq_cst_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_seq_cst_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_seq_cst_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 23 Lines
; GFX7-LABEL: flat_wavefront_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_monotonic_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_monotonic_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_monotonic_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_monotonic_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_monotonic_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_monotonic_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_acquire_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_acquire_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_acquire_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_acquire_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_acquire_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_acquire_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_release_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_release_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_release_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_release_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_release_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_release_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_acq_rel_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_acq_rel_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_acq_rel_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_acq_rel_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_acq_rel_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_acq_rel_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_seq_cst_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_seq_cst_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_seq_cst_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_seq_cst_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_seq_cst_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_seq_cst_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_monotonic_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_monotonic_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_monotonic_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_monotonic_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_monotonic_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_monotonic_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_acquire_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_acquire_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_acquire_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_acquire_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_acquire_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_acquire_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_release_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_release_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_release_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_release_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_release_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_release_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_release_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_acq_rel_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_acq_rel_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_acq_rel_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_acq_rel_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_acq_rel_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_acq_rel_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_seq_cst_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_seq_cst_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_seq_cst_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_seq_cst_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_seq_cst_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_seq_cst_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_monotonic_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_monotonic_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_monotonic_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_monotonic_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_monotonic_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_monotonic_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_acquire_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_acquire_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_acquire_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_acquire_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_acquire_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_acquire_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_release_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_release_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_release_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_release_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_release_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_release_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_acq_rel_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_acq_rel_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_seq_cst_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_seq_cst_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 1,276 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_wavefront_one_as_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_monotonic_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_monotonic_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_monotonic_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_monotonic_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_monotonic_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_monotonic_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 23 Lines
; GFX7-LABEL: flat_wavefront_one_as_acquire_monotonic_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_acquire_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_acquire_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acquire_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acquire_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_acquire_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_acquire_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_one_as_release_monotonic_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_release_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_release_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_release_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_release_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_release_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_release_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_one_as_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_acq_rel_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_acq_rel_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acq_rel_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acq_rel_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_acq_rel_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_acq_rel_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 23 Lines
; GFX7-LABEL: flat_wavefront_one_as_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_seq_cst_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_seq_cst_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_seq_cst_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_seq_cst_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_seq_cst_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_seq_cst_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 23 Lines
; GFX7-LABEL: flat_wavefront_one_as_monotonic_acquire_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_monotonic_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_monotonic_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_monotonic_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_monotonic_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_monotonic_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_monotonic_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 23 Lines
; GFX7-LABEL: flat_wavefront_one_as_acquire_acquire_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_acquire_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_acquire_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acquire_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acquire_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_acquire_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_acquire_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 23 Lines
; GFX7-LABEL: flat_wavefront_one_as_release_acquire_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_release_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_release_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_release_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_release_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_release_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_release_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_one_as_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_acq_rel_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_acq_rel_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acq_rel_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acq_rel_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_acq_rel_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_acq_rel_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 23 Lines
; GFX7-LABEL: flat_wavefront_one_as_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_seq_cst_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_seq_cst_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_seq_cst_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_seq_cst_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_seq_cst_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_seq_cst_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_one_as_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_monotonic_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_monotonic_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_monotonic_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_monotonic_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_monotonic_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_monotonic_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_monotonic_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_one_as_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_acquire_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_acquire_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_acquire_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acquire_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acquire_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_acquire_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_acquire_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_one_as_release_seq_cst_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_release_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_release_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_release_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_release_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_release_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_release_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_release_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_one_as_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_acq_rel_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_acq_rel_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_acq_rel_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acq_rel_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acq_rel_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_acq_rel_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_acq_rel_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 23 Lines
; GFX7-LABEL: flat_wavefront_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_monotonic_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_monotonic_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_one_as_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_acquire_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_acquire_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_acquire_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_acquire_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acquire_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acquire_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acq_rel_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acq_rel_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_seq_cst_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_seq_cst_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_one_as_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_monotonic_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_monotonic_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_monotonic_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_monotonic_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_monotonic_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_monotonic_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_one_as_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_acquire_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_acquire_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_acquire_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_acquire_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acquire_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acquire_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_one_as_release_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_release_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_release_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_release_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_release_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_release_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_release_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acq_rel_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acq_rel_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_seq_cst_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_seq_cst_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_monotonic_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_monotonic_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acquire_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acquire_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_one_as_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_release_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_release_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_release_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_release_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_release_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_release_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_one_as_acq_relc_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_acq_relc_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_acq_relc_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_acq_relc_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_acq_relc_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_acq_relc_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acq_relc_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_acq_relc_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_wavefront_one_as_seq_cst_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
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llvm/test/CodeGen/AMDGPU/memory-legalizer-flat-workgroup.ll

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; GFX7-LABEL: flat_workgroup_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: flat_workgroup_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_monotonic_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_monotonic_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_monotonic_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_monotonic_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_monotonic_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_monotonic_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_workgroup_acquire_monotonic_cmpxchg: ; GFX7-LABEL: flat_workgroup_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_acquire_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_acquire_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_acquire_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_acquire_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_acquire_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_acquire_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_workgroup_release_monotonic_cmpxchg: ; GFX7-LABEL: flat_workgroup_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_release_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_release_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_release_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_release_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_release_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_release_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_workgroup_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: flat_workgroup_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_acq_rel_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_acq_rel_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_acq_rel_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_acq_rel_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_acq_rel_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_acq_rel_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_workgroup_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: flat_workgroup_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_seq_cst_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_seq_cst_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_seq_cst_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_seq_cst_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_seq_cst_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_seq_cst_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_workgroup_monotonic_acquire_cmpxchg: ; GFX7-LABEL: flat_workgroup_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_monotonic_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_monotonic_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_monotonic_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_monotonic_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_monotonic_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_monotonic_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_workgroup_acquire_acquire_cmpxchg: ; GFX7-LABEL: flat_workgroup_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_acquire_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_acquire_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_acquire_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_acquire_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_acquire_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_acquire_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
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; GFX7-LABEL: flat_workgroup_release_acquire_cmpxchg: ; GFX7-LABEL: flat_workgroup_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_release_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_release_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_release_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_release_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_release_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_release_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_workgroup_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: flat_workgroup_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_acq_rel_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_acq_rel_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_acq_rel_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_acq_rel_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_acq_rel_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_acq_rel_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_workgroup_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: flat_workgroup_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_seq_cst_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_seq_cst_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_seq_cst_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_seq_cst_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_seq_cst_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_seq_cst_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_workgroup_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: flat_workgroup_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_seq_cst_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_seq_cst_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_seq_cst_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_seq_cst_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_seq_cst_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_seq_cst_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
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; GFX7-LABEL: flat_workgroup_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_monotonic_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_monotonic_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_monotonic_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_monotonic_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_monotonic_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_monotonic_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
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; GFX7-LABEL: flat_workgroup_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_acquire_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_acquire_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_acquire_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_acquire_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_acquire_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_acquire_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 35 Lines
; GFX7-LABEL: flat_workgroup_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_release_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_release_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_release_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_release_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_release_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_release_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 36 Lines
; GFX7-LABEL: flat_workgroup_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_acq_rel_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_acq_rel_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_acq_rel_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_acq_rel_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_acq_rel_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_acq_rel_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 38 Lines
; GFX7-LABEL: flat_workgroup_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_seq_cst_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_seq_cst_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_seq_cst_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_seq_cst_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_seq_cst_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_seq_cst_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 38 Lines
; GFX7-LABEL: flat_workgroup_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_monotonic_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_monotonic_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_monotonic_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_monotonic_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_monotonic_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_monotonic_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 35 Lines
; GFX7-LABEL: flat_workgroup_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_acquire_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_acquire_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_acquire_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_acquire_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_acquire_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_acquire_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
Show All 35 Lines
; GFX7-LABEL: flat_workgroup_release_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_release_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_release_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_release_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_release_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_release_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_release_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 38 Lines
; GFX7-LABEL: flat_workgroup_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_acq_rel_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_acq_rel_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_acq_rel_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_acq_rel_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_acq_rel_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_acq_rel_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 38 Lines
; GFX7-LABEL: flat_workgroup_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_seq_cst_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_seq_cst_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_seq_cst_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_seq_cst_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_seq_cst_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_seq_cst_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 38 Lines
; GFX7-LABEL: flat_workgroup_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_monotonic_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_monotonic_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_monotonic_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_monotonic_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_monotonic_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_monotonic_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 38 Lines
; GFX7-LABEL: flat_workgroup_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_acquire_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_acquire_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_acquire_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_acquire_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_acquire_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_acquire_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 38 Lines
; GFX7-LABEL: flat_workgroup_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_release_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_release_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_release_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_release_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_release_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_release_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 38 Lines
; GFX7-LABEL: flat_workgroup_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_acq_rel_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_acq_rel_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
Show All 38 Lines
; GFX7-LABEL: flat_workgroup_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_seq_cst_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_seq_cst_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 1,332 Lines • ▼ Show 20 Lines
; GFX7-LABEL: flat_workgroup_one_as_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_monotonic_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_monotonic_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_monotonic_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_monotonic_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_monotonic_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_monotonic_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 23 Lines
; GFX7-LABEL: flat_workgroup_one_as_acquire_monotonic_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_acquire_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_acquire_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acquire_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acquire_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_acquire_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_acquire_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_workgroup_one_as_release_monotonic_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_release_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_release_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_release_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_release_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_release_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_release_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_workgroup_one_as_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_acq_rel_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_acq_rel_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acq_rel_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acq_rel_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_acq_rel_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_acq_rel_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_workgroup_one_as_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_seq_cst_monotonic_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_seq_cst_monotonic_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_seq_cst_monotonic_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_seq_cst_monotonic_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_seq_cst_monotonic_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_seq_cst_monotonic_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_workgroup_one_as_monotonic_acquire_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_monotonic_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_monotonic_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_monotonic_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_monotonic_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_monotonic_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_monotonic_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_workgroup_one_as_acquire_acquire_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_acquire_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_acquire_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acquire_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acquire_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_acquire_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_acquire_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_workgroup_one_as_release_acquire_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_release_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_release_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_release_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_release_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_release_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_release_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_workgroup_one_as_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_acq_rel_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_acq_rel_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acq_rel_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acq_rel_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_acq_rel_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_acq_rel_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 26 Lines
; GFX7-LABEL: flat_workgroup_one_as_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_seq_cst_acquire_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_seq_cst_acquire_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_seq_cst_acquire_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_seq_cst_acquire_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_seq_cst_acquire_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_seq_cst_acquire_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 26 Lines
; GFX7-LABEL: flat_workgroup_one_as_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_monotonic_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_monotonic_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_monotonic_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_monotonic_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_monotonic_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_monotonic_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_monotonic_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 26 Lines
; GFX7-LABEL: flat_workgroup_one_as_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_acquire_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_acquire_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_acquire_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acquire_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acquire_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_acquire_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_acquire_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_workgroup_one_as_release_seq_cst_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_release_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_release_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_release_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_release_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_release_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_release_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_release_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
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; GFX7-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 26 Lines
; GFX7-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s0, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s1, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-WGP-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s0, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s0, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s1, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX10-CU-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s2, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s3, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_cmpxchg: ; GFX90A-NOTTGSPLIT-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_cmpxchg:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
Show All 26 Lines
; GFX7-LABEL: flat_workgroup_one_as_monotonicmonotonic_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_monotonicmonotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_monotonicmonotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_monotonicmonotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_monotonicmonotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_monotonicmonotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_monotonicmonotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_monotonicmonotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 33 Lines
; GFX7-LABEL: flat_workgroup_one_as_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_acquire_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_acquire_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_acquire_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_acquire_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acquire_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acquire_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 34 Lines
; GFX7-LABEL: flat_workgroup_one_as_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_release_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_release_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_release_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_release_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_release_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_release_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 34 Lines
; GFX7-LABEL: flat_workgroup_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acq_rel_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acq_rel_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 35 Lines
; GFX7-LABEL: flat_workgroup_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_seq_cst_monotonic_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_seq_cst_monotonic_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 35 Lines
; GFX7-LABEL: flat_workgroup_one_as_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_monotonic_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_monotonic_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_monotonic_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_monotonic_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_monotonic_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_monotonic_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 34 Lines
; GFX7-LABEL: flat_workgroup_one_as_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_acquire_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_acquire_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_acquire_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_acquire_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acquire_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acquire_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 34 Lines
; GFX7-LABEL: flat_workgroup_one_as_release_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_release_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_release_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_release_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_release_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_release_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_release_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 35 Lines
; GFX7-LABEL: flat_workgroup_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acq_rel_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acq_rel_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 35 Lines
; GFX7-LABEL: flat_workgroup_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_seq_cst_acquire_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_seq_cst_acquire_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 35 Lines
; GFX7-LABEL: flat_workgroup_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_monotonic_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_monotonic_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 35 Lines
; GFX7-LABEL: flat_workgroup_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acquire_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acquire_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 35 Lines
; GFX7-LABEL: flat_workgroup_one_as_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_release_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_release_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_release_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_release_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_release_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_release_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 35 Lines
; GFX7-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_acq_rel_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 35 Lines
; GFX7-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-WGP-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16 ; GFX10-WGP-NEXT: s_add_u32 s4, s0, 16
; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-WGP-NEXT: s_addc_u32 s5, s1, 0
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s4
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s5
; GFX10-WGP-NEXT: v_mov_b32_e32 v2, s2
; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-WGP-NEXT: v_mov_b32_e32 v3, s3
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0 ; GFX10-WGP-NEXT: s_waitcnt_vscnt null, 0x0
; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-WGP-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-WGP-NEXT: s_waitcnt vmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt vmcnt(0)
; GFX10-WGP-NEXT: buffer_gl0_inv ; GFX10-WGP-NEXT: buffer_gl0_inv
; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-WGP-NEXT: v_mov_b32_e32 v0, s0
; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-WGP-NEXT: v_mov_b32_e32 v1, s1
; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-WGP-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2 ; GFX10-WGP-NEXT: flat_store_dword v[0:1], v2
; GFX10-WGP-NEXT: s_endpgm ; GFX10-WGP-NEXT: s_endpgm
; ;
; GFX10-CU-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX10-CU-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX10-CU: ; %bb.0: ; %entry ; GFX10-CU: ; %bb.0: ; %entry
; GFX10-CU-NEXT: s_clause 0x1 ; GFX10-CU-NEXT: s_clause 0x1
; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX10-CU-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8 ; GFX10-CU-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x8
; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-CU-NEXT: s_add_u32 s4, s0, 16 ; GFX10-CU-NEXT: s_add_u32 s4, s0, 16
; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0 ; GFX10-CU-NEXT: s_addc_u32 s5, s1, 0
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s4
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s5
; GFX10-CU-NEXT: v_mov_b32_e32 v2, s2
; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3 ; GFX10-CU-NEXT: v_mov_b32_e32 v3, s3
; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX10-CU-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0 ; GFX10-CU-NEXT: v_mov_b32_e32 v0, s0
; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1 ; GFX10-CU-NEXT: v_mov_b32_e32 v1, s1
; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX10-CU-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX10-CU-NEXT: flat_store_dword v[0:1], v2 ; GFX10-CU-NEXT: flat_store_dword v[0:1], v2
; GFX10-CU-NEXT: s_endpgm ; GFX10-CU-NEXT: s_endpgm
; ;
; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_ret_cmpxchg: ; SKIP-CACHE-INV-LABEL: flat_workgroup_one_as_seq_cst_seq_cst_ret_cmpxchg:
; SKIP-CACHE-INV: ; %bb.0: ; %entry ; SKIP-CACHE-INV: ; %bb.0: ; %entry
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9 ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x9
; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; SKIP-CACHE-INV-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16 ; SKIP-CACHE-INV-NEXT: s_add_u32 s4, s2, 16
; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0 ; SKIP-CACHE-INV-NEXT: s_addc_u32 s5, s3, 0
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s4
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s5
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v3, s1
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v2, s0
; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; SKIP-CACHE-INV-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v0, s2
; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3 ; SKIP-CACHE-INV-NEXT: v_mov_b32_e32 v1, s3
; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; SKIP-CACHE-INV-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2 ; SKIP-CACHE-INV-NEXT: flat_store_dword v[0:1], v2
; SKIP-CACHE-INV-NEXT: s_endpgm ; SKIP-CACHE-INV-NEXT: s_endpgm
; ;
Show All 34 Lines

llvm/test/CodeGen/AMDGPU/memory-legalizer-global-agent.ll

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; GFX7-LABEL: global_agent_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: global_agent_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_agent_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_agent_acquire_monotonic_cmpxchg: ; GFX7-LABEL: global_agent_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_agent_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
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; GFX7-LABEL: global_agent_release_monotonic_cmpxchg: ; GFX7-LABEL: global_agent_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_agent_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
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; GFX7-LABEL: global_agent_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: global_agent_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_agent_acq_rel_monotonic_cmpxchg:
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; GFX7-LABEL: global_agent_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: global_agent_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_agent_seq_cst_monotonic_cmpxchg:
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; GFX7-LABEL: global_agent_monotonic_acquire_cmpxchg: ; GFX7-LABEL: global_agent_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_agent_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
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; GFX7-LABEL: global_agent_acquire_acquire_cmpxchg: ; GFX7-LABEL: global_agent_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_agent_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
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; GFX7-LABEL: global_agent_release_acquire_cmpxchg: ; GFX7-LABEL: global_agent_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_agent_release_acquire_cmpxchg:
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; GFX7-LABEL: global_agent_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: global_agent_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_agent_acq_rel_acquire_cmpxchg:
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; GFX7-LABEL: global_agent_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: global_agent_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_agent_seq_cst_acquire_cmpxchg:
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; GFX7-LABEL: global_agent_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: global_agent_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_agent_monotonic_seq_cst_cmpxchg:
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; GFX7-LABEL: global_agent_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: global_agent_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_agent_acquire_seq_cst_cmpxchg:
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; GFX7-LABEL: global_agent_release_seq_cst_cmpxchg: ; GFX7-LABEL: global_agent_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_agent_release_seq_cst_cmpxchg:
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; GFX7-LABEL: global_agent_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: global_agent_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_agent_acq_rel_seq_cst_cmpxchg:
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; GFX7-LABEL: global_agent_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: global_agent_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_agent_seq_cst_seq_cst_cmpxchg:
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; GFX7-LABEL: global_agent_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_agent_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_agent_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_agent_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
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; GFX7-LABEL: global_agent_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_agent_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
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; GFX7-LABEL: global_agent_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_agent_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_agent_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 105 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: global_agent_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 97 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: global_agent_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 98 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_release_acquire_ret_cmpxchg: ; GFX7-LABEL: global_agent_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: global_agent_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: global_agent_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_agent_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_agent_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_agent_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_agent_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_agent_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_agent_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_agent_one_as_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: global_agent_one_as_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_one_as_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_agent_one_as_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_agent_one_as_acquire_monotonic_cmpxchg: ; GFX7-LABEL: global_agent_one_as_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_one_as_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_agent_one_as_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
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; GFX7-LABEL: global_agent_one_as_release_monotonic_cmpxchg: ; GFX7-LABEL: global_agent_one_as_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_one_as_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_agent_one_as_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
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; GFX7-LABEL: global_agent_one_as_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: global_agent_one_as_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_one_as_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_agent_one_as_acq_rel_monotonic_cmpxchg:
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; GFX7-LABEL: global_agent_one_as_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: global_agent_one_as_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_one_as_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_agent_one_as_seq_cst_monotonic_cmpxchg:
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; GFX7-LABEL: global_agent_one_as_monotonic_acquire_cmpxchg: ; GFX7-LABEL: global_agent_one_as_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_one_as_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_agent_one_as_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
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; GFX7-LABEL: global_agent_one_as_acquire_acquire_cmpxchg: ; GFX7-LABEL: global_agent_one_as_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_one_as_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_agent_one_as_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
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; GFX7-LABEL: global_agent_one_as_release_acquire_cmpxchg: ; GFX7-LABEL: global_agent_one_as_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_one_as_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_agent_one_as_release_acquire_cmpxchg:
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; GFX7-LABEL: global_agent_one_as_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: global_agent_one_as_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_one_as_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_agent_one_as_acq_rel_acquire_cmpxchg:
▲ Show 20 Lines • Show All 95 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_one_as_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: global_agent_one_as_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_one_as_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_agent_one_as_seq_cst_acquire_cmpxchg:
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; GFX7-LABEL: global_agent_one_as_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: global_agent_one_as_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_one_as_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_agent_one_as_monotonic_seq_cst_cmpxchg:
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; GFX7-LABEL: global_agent_one_as_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: global_agent_one_as_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_one_as_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_agent_one_as_acquire_seq_cst_cmpxchg:
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; GFX7-LABEL: global_agent_one_as_release_seq_cst_cmpxchg: ; GFX7-LABEL: global_agent_one_as_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_one_as_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_agent_one_as_release_seq_cst_cmpxchg:
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; GFX7-LABEL: global_agent_one_as_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: global_agent_one_as_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_one_as_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_agent_one_as_acq_rel_seq_cst_cmpxchg:
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; GFX7-LABEL: global_agent_one_as_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: global_agent_one_as_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_agent_one_as_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_agent_one_as_seq_cst_seq_cst_cmpxchg:
▲ Show 20 Lines • Show All 94 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_agent_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 90 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_one_as_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_agent_one_as_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 98 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_agent_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_agent_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 105 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_one_as_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: global_agent_one_as_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 97 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_one_as_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: global_agent_one_as_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 98 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_one_as_release_acquire_ret_cmpxchg: ; GFX7-LABEL: global_agent_one_as_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: global_agent_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: global_agent_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_agent_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_agent_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_one_as_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_agent_one_as_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 106 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_agent_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_agent_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_agent_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_agent_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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llvm/test/CodeGen/AMDGPU/memory-legalizer-global-singlethread.ll

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; GFX7-LABEL: global_singlethread_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: global_singlethread_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_acquire_monotonic_cmpxchg: ; GFX7-LABEL: global_singlethread_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_release_monotonic_cmpxchg: ; GFX7-LABEL: global_singlethread_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: global_singlethread_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: global_singlethread_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_monotonic_acquire_cmpxchg: ; GFX7-LABEL: global_singlethread_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_acquire_acquire_cmpxchg: ; GFX7-LABEL: global_singlethread_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_release_acquire_cmpxchg: ; GFX7-LABEL: global_singlethread_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: global_singlethread_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: global_singlethread_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: global_singlethread_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_monotonic_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: global_singlethread_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_acquire_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_release_seq_cst_cmpxchg: ; GFX7-LABEL: global_singlethread_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_release_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: global_singlethread_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_acq_rel_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: global_singlethread_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_singlethread_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_singlethread_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_singlethread_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_singlethread_release_acquire_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_singlethread_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_singlethread_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_singlethread_one_as_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_one_as_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_one_as_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_one_as_acquire_monotonic_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_one_as_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_one_as_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_one_as_release_monotonic_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_one_as_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_one_as_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_one_as_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_one_as_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_one_as_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_one_as_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_one_as_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_one_as_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_one_as_monotonic_acquire_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_one_as_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_one_as_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_one_as_acquire_acquire_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_one_as_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_one_as_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_one_as_release_acquire_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_one_as_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_one_as_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_one_as_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_one_as_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_one_as_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_one_as_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_one_as_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_one_as_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_one_as_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_one_as_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_one_as_monotonic_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_one_as_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_one_as_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_one_as_acquire_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_one_as_release_seq_cst_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_one_as_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_one_as_release_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_one_as_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_one_as_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_one_as_acq_rel_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_one_as_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_singlethread_one_as_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_singlethread_one_as_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_singlethread_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_one_as_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_one_as_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_one_as_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_one_as_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_singlethread_one_as_release_acquire_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_singlethread_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_one_as_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_singlethread_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_singlethread_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_singlethread_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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llvm/test/CodeGen/AMDGPU/memory-legalizer-global-system.ll

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; GFX7-LABEL: global_system_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: global_system_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_system_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_system_acquire_monotonic_cmpxchg: ; GFX7-LABEL: global_system_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_system_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
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; GFX7-LABEL: global_system_release_monotonic_cmpxchg: ; GFX7-LABEL: global_system_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_system_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
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; GFX7-LABEL: global_system_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: global_system_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_system_acq_rel_monotonic_cmpxchg:
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; GFX7-LABEL: global_system_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: global_system_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_system_seq_cst_monotonic_cmpxchg:
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; GFX7-LABEL: global_system_monotonic_acquire_cmpxchg: ; GFX7-LABEL: global_system_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_system_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
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; GFX7-LABEL: global_system_acquire_acquire_cmpxchg: ; GFX7-LABEL: global_system_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_system_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
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; GFX7-LABEL: global_system_release_acquire_cmpxchg: ; GFX7-LABEL: global_system_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_system_release_acquire_cmpxchg:
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; GFX7-LABEL: global_system_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: global_system_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_system_acq_rel_acquire_cmpxchg:
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; GFX7-LABEL: global_system_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: global_system_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_system_seq_cst_acquire_cmpxchg:
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; GFX7-LABEL: global_system_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: global_system_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_system_seq_cst_seq_cst_cmpxchg:
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; GFX7-LABEL: global_system_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_system_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_system_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_system_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
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; GFX7-LABEL: global_system_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_system_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_system_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_system_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_system_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: global_system_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: global_system_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 100 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_release_acquire_ret_cmpxchg: ; GFX7-LABEL: global_system_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 110 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: global_system_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_system_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: global_system_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_system_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_system_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_system_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_system_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_system_relese_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_system_relese_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_system_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_system_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_system_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_system_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_system_one_as_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: global_system_one_as_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_one_as_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_system_one_as_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_system_one_as_acquire_monotonic_cmpxchg: ; GFX7-LABEL: global_system_one_as_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_one_as_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_system_one_as_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
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; GFX7-LABEL: global_system_one_as_release_monotonic_cmpxchg: ; GFX7-LABEL: global_system_one_as_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_one_as_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_system_one_as_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
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; GFX7-LABEL: global_system_one_as_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: global_system_one_as_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_one_as_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_system_one_as_acq_rel_monotonic_cmpxchg:
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_one_as_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: global_system_one_as_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_one_as_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_system_one_as_seq_cst_monotonic_cmpxchg:
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; GFX7-LABEL: global_system_one_as_monotonic_acquire_cmpxchg: ; GFX7-LABEL: global_system_one_as_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_one_as_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_system_one_as_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
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; GFX7-LABEL: global_system_one_as_acquire_acquire_cmpxchg: ; GFX7-LABEL: global_system_one_as_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_one_as_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_system_one_as_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
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; GFX7-LABEL: global_system_one_as_release_acquire_cmpxchg: ; GFX7-LABEL: global_system_one_as_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_one_as_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_system_one_as_release_acquire_cmpxchg:
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; GFX7-LABEL: global_system_one_as_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: global_system_one_as_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_one_as_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_system_one_as_acq_rel_acquire_cmpxchg:
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; GFX7-LABEL: global_system_one_as_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: global_system_one_as_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_one_as_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_system_one_as_seq_cst_acquire_cmpxchg:
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_one_as_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: global_system_one_as_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_one_as_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_system_one_as_monotonic_seq_cst_cmpxchg:
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_one_as_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: global_system_one_as_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_one_as_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_system_one_as_acquire_seq_cst_cmpxchg:
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_one_as_release_seq_cst_cmpxchg: ; GFX7-LABEL: global_system_one_as_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_one_as_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_system_one_as_release_seq_cst_cmpxchg:
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_one_as_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: global_system_one_as_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_one_as_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_system_one_as_acq_rel_seq_cst_cmpxchg:
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_one_as_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: global_system_one_as_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_system_one_as_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_system_one_as_seq_cst_seq_cst_cmpxchg:
▲ Show 20 Lines • Show All 98 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_system_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_system_one_as_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_system_one_as_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_one_as_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_system_one_as_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
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; GFX7-LABEL: global_system_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_system_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 110 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_system_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 109 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_one_as_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: global_system_one_as_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_one_as_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: global_system_one_as_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 100 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_one_as_release_acquire_ret_cmpxchg: ; GFX7-LABEL: global_system_one_as_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
▲ Show 20 Lines • Show All 110 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_system_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: global_system_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_system_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: global_system_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_system_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_system_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_system_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_system_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_system_one_as_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_system_one_as_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_system_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_system_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-LABEL: global_system_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_system_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: buffer_wbinvl1_vol ; GFX7-NEXT: buffer_wbinvl1_vol
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
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llvm/test/CodeGen/AMDGPU/memory-legalizer-global-wavefront.ll

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Show First 20 Lines • Show All 1,415 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: global_wavefront_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_acquire_monotonic_cmpxchg: ; GFX7-LABEL: global_wavefront_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_release_monotonic_cmpxchg: ; GFX7-LABEL: global_wavefront_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: global_wavefront_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: global_wavefront_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_monotonic_acquire_cmpxchg: ; GFX7-LABEL: global_wavefront_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_acquire_acquire_cmpxchg: ; GFX7-LABEL: global_wavefront_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_release_acquire_cmpxchg: ; GFX7-LABEL: global_wavefront_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: global_wavefront_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: global_wavefront_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: global_wavefront_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_monotonic_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: global_wavefront_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_acquire_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_release_seq_cst_cmpxchg: ; GFX7-LABEL: global_wavefront_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_release_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: global_wavefront_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_acq_rel_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: global_wavefront_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_wavefront_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_wavefront_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_wavefront_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_wavefront_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_wavefront_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_wavefront_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_release_acquire_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 1,480 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_one_as_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_one_as_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_one_as_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_one_as_acquire_monotonic_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_one_as_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_one_as_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_one_as_release_monotonic_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_one_as_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_one_as_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_one_as_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_one_as_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_one_as_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_one_as_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_one_as_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_one_as_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_one_as_monotonic_acquire_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_one_as_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_one_as_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_one_as_acquire_acquire_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_one_as_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_one_as_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_one_as_release_acquire_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_one_as_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_one_as_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_one_as_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_one_as_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_one_as_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_one_as_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_one_as_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_one_as_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_one_as_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_one_as_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_one_as_monotonic_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_one_as_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_one_as_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_one_as_acquire_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_one_as_release_seq_cst_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_one_as_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_one_as_release_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_one_as_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_one_as_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_one_as_acq_rel_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_one_as_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_wavefront_one_as_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_wavefront_one_as_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_wavefront_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_wavefront_one_as_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_wavefront_one_as_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_wavefront_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_one_as_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_one_as_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_one_as_release_acquire_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 89 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_wavefront_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_wavefront_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_wavefront_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_wavefront_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_wavefront_one_as_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_wavefront_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_wavefront_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_wavefront_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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llvm/test/CodeGen/AMDGPU/memory-legalizer-global-workgroup.ll

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Show First 20 Lines • Show All 1,497 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: global_workgroup_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_workgroup_acquire_monotonic_cmpxchg: ; GFX7-LABEL: global_workgroup_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_workgroup_release_monotonic_cmpxchg: ; GFX7-LABEL: global_workgroup_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
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; GFX7-LABEL: global_workgroup_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: global_workgroup_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
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; GFX7-LABEL: global_workgroup_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: global_workgroup_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
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; GFX7-LABEL: global_workgroup_monotonic_acquire_cmpxchg: ; GFX7-LABEL: global_workgroup_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_workgroup_acquire_acquire_cmpxchg: ; GFX7-LABEL: global_workgroup_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_workgroup_release_acquire_cmpxchg: ; GFX7-LABEL: global_workgroup_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
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; GFX7-LABEL: global_workgroup_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: global_workgroup_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
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; GFX7-LABEL: global_workgroup_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: global_workgroup_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
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; GFX7-LABEL: global_workgroup_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: global_workgroup_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_monotonic_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
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; GFX7-LABEL: global_workgroup_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: global_workgroup_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_acquire_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
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; GFX7-LABEL: global_workgroup_release_seq_cst_cmpxchg: ; GFX7-LABEL: global_workgroup_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_release_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
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; GFX7-LABEL: global_workgroup_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: global_workgroup_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_acq_rel_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
▲ Show 20 Lines • Show All 83 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: global_workgroup_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
▲ Show 20 Lines • Show All 84 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_workgroup_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_workgroup_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 97 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 98 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 91 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 92 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_release_acquire_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
▲ Show 20 Lines • Show All 1,533 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_one_as_monotonic_monotonic_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_monotonic_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_one_as_monotonic_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_one_as_monotonic_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
▲ Show 20 Lines • Show All 71 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_one_as_acquire_monotonic_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_acquire_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_one_as_acquire_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_one_as_acquire_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
▲ Show 20 Lines • Show All 75 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_one_as_release_monotonic_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_release_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_one_as_release_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_one_as_release_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
▲ Show 20 Lines • Show All 74 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_one_as_acq_rel_monotonic_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_acq_rel_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_one_as_acq_rel_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_one_as_acq_rel_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_workgroup_one_as_seq_cst_monotonic_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_seq_cst_monotonic_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_one_as_seq_cst_monotonic_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_one_as_seq_cst_monotonic_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_workgroup_one_as_monotonic_acquire_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_monotonic_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_one_as_monotonic_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_one_as_monotonic_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_workgroup_one_as_acquire_acquire_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_acquire_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_one_as_acquire_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_one_as_acquire_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_workgroup_one_as_release_acquire_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_release_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_one_as_release_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_one_as_release_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_workgroup_one_as_acq_rel_acquire_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_acq_rel_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_one_as_acq_rel_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_one_as_acq_rel_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_workgroup_one_as_seq_cst_acquire_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_seq_cst_acquire_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_one_as_seq_cst_acquire_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_one_as_seq_cst_acquire_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_workgroup_one_as_monotonic_seq_cst_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_monotonic_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_one_as_monotonic_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_one_as_monotonic_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
▲ Show 20 Lines • Show All 78 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_one_as_acquire_seq_cst_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_acquire_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_one_as_acquire_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_one_as_acquire_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
▲ Show 20 Lines • Show All 78 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_one_as_release_seq_cst_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_release_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_one_as_release_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_one_as_release_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_workgroup_one_as_acq_rel_seq_cst_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_acq_rel_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_one_as_acq_rel_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_one_as_acq_rel_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_workgroup_one_as_seq_cst_seq_cst_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_seq_cst_seq_cst_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s0, s0, 16 ; GFX7-NEXT: s_add_u32 s0, s0, 16
; GFX7-NEXT: s_addc_u32 s1, s1, 0 ; GFX7-NEXT: s_addc_u32 s1, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3] ; GFX7-NEXT: flat_atomic_cmpswap v[0:1], v[2:3]
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: global_workgroup_one_as_seq_cst_seq_cst_cmpxchg: ; GFX10-WGP-LABEL: global_workgroup_one_as_seq_cst_seq_cst_cmpxchg:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
; GFX10-WGP-NEXT: s_clause 0x1 ; GFX10-WGP-NEXT: s_clause 0x1
; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX10-WGP-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
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; GFX7-LABEL: global_workgroup_one_as_monotonic_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_monotonic_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_workgroup_one_as_acquire_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_acquire_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_workgroup_one_as_release_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_release_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_workgroup_one_as_acq_rel_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_acq_rel_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 94 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_one_as_seq_cst_monotonic_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_seq_cst_monotonic_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 94 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_one_as_monotonic_acquire_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_monotonic_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 91 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_one_as_acquire_acquire_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_acquire_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
▲ Show 20 Lines • Show All 91 Lines • ▼ Show 20 Lines
; GFX7-LABEL: global_workgroup_one_as_release_acquire_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_release_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_workgroup_one_as_acq_rel_acquire_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_acq_rel_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_workgroup_one_as_seq_cst_acquire_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_seq_cst_acquire_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_workgroup_one_as_monotonic_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_monotonic_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_workgroup_one_as_acquire_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_acquire_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_workgroup_one_as_release_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_release_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_workgroup_one_as_acq_rel_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_acq_rel_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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; GFX7-LABEL: global_workgroup_one_as_seq_cst_seq_cst_ret_cmpxchg: ; GFX7-LABEL: global_workgroup_one_as_seq_cst_seq_cst_ret_cmpxchg:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[4:5], 0x2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_add_u32 s4, s0, 16 ; GFX7-NEXT: s_add_u32 s4, s0, 16
; GFX7-NEXT: s_addc_u32 s5, s1, 0 ; GFX7-NEXT: s_addc_u32 s5, s1, 0
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc ; GFX7-NEXT: flat_atomic_cmpswap v2, v[0:1], v[2:3] glc
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: flat_store_dword v[0:1], v2 ; GFX7-NEXT: flat_store_dword v[0:1], v2
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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llvm/test/CodeGen/AMDGPU/memory-legalizer-private-nontemporal.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx600 -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX6 %s ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx600 -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX6 %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX7 %s ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx700 -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX7 %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX10-WGP %s ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX10-WGP %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -mattr=+cumode -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX10-CU %s ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -mattr=+cumode -verify-machineinstrs < %s | FileCheck --check-prefixes=GFX10-CU %s
; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx700 -amdgcn-skip-cache-invalidations -verify-machineinstrs < %s | FileCheck --check-prefixes=SKIP-CACHE-INV %s ; RUN: llc -mtriple=amdgcn-amd-amdpal -mcpu=gfx700 -amdgcn-skip-cache-invalidations -verify-machineinstrs < %s | FileCheck --check-prefixes=SKIP-CACHE-INV %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX90A-NOTTGSPLIT %s ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX90A-NOTTGSPLIT %s
; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -mattr=+tgsplit -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX90A-TGSPLIT %s ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx90a -mattr=+tgsplit -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX90A-TGSPLIT %s
define amdgpu_kernel void @private_nontemporal_load_0( define amdgpu_kernel void @private_nontemporal_load_0(
; GFX6-LABEL: private_nontemporal_load_0: ; GFX6-LABEL: private_nontemporal_load_0:
; GFX6: ; %bb.0: ; %entry ; GFX6: ; %bb.0: ; %entry
; GFX6-NEXT: s_mov_b64 s[10:11], s[2:3]
; GFX6-NEXT: s_mov_b64 s[8:9], s[0:1] ; GFX6-NEXT: s_mov_b64 s[8:9], s[0:1]
; GFX6-NEXT: s_load_dword s6, s[4:5], 0x0 ; GFX6-NEXT: s_load_dword s6, s[4:5], 0x0
; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
; GFX6-NEXT: s_mov_b64 s[10:11], s[2:3]
; GFX6-NEXT: s_add_u32 s8, s8, s7 ; GFX6-NEXT: s_add_u32 s8, s8, s7
; GFX6-NEXT: s_addc_u32 s9, s9, 0 ; GFX6-NEXT: s_addc_u32 s9, s9, 0
; GFX6-NEXT: s_mov_b32 s3, 0x100f000
; GFX6-NEXT: s_waitcnt lgkmcnt(0) ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
; GFX6-NEXT: v_mov_b32_e32 v0, s6 ; GFX6-NEXT: v_mov_b32_e32 v0, s6
; GFX6-NEXT: buffer_load_dword v0, v0, s[8:11], 0 offen glc slc ; GFX6-NEXT: buffer_load_dword v0, v0, s[8:11], 0 offen glc slc
; GFX6-NEXT: s_mov_b32 s3, 0x100f000
; GFX6-NEXT: s_mov_b32 s2, -1 ; GFX6-NEXT: s_mov_b32 s2, -1
; GFX6-NEXT: s_waitcnt vmcnt(0) ; GFX6-NEXT: s_waitcnt vmcnt(0)
; GFX6-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX6-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX6-NEXT: s_endpgm ; GFX6-NEXT: s_endpgm
; ;
; GFX7-LABEL: private_nontemporal_load_0: ; GFX7-LABEL: private_nontemporal_load_0:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_mov_b64 s[10:11], s[2:3] ; GFX7-NEXT: s_mov_b64 s[10:11], s[2:3]
▲ Show 20 Lines • Show All 99 Lines • ▼ Show 20 Linesentry:
%val = load i32, i32 addrspace(5)* %in, align 4, !nontemporal !0 %val = load i32, i32 addrspace(5)* %in, align 4, !nontemporal !0
store i32 %val, i32 addrspace(1)* %out store i32 %val, i32 addrspace(1)* %out
ret void ret void
} }
define amdgpu_kernel void @private_nontemporal_load_1( define amdgpu_kernel void @private_nontemporal_load_1(
; GFX6-LABEL: private_nontemporal_load_1: ; GFX6-LABEL: private_nontemporal_load_1:
; GFX6: ; %bb.0: ; %entry ; GFX6: ; %bb.0: ; %entry
; GFX6-NEXT: s_mov_b64 s[10:11], s[2:3]
; GFX6-NEXT: s_mov_b64 s[8:9], s[0:1] ; GFX6-NEXT: s_mov_b64 s[8:9], s[0:1]
; GFX6-NEXT: s_load_dword s6, s[4:5], 0x0 ; GFX6-NEXT: s_load_dword s6, s[4:5], 0x0
; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
; GFX6-NEXT: s_mov_b64 s[10:11], s[2:3]
; GFX6-NEXT: s_add_u32 s8, s8, s7 ; GFX6-NEXT: s_add_u32 s8, s8, s7
; GFX6-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX6-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX6-NEXT: s_addc_u32 s9, s9, 0 ; GFX6-NEXT: s_addc_u32 s9, s9, 0
; GFX6-NEXT: s_waitcnt lgkmcnt(0) ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
; GFX6-NEXT: v_add_i32_e32 v0, vcc, s6, v0 ; GFX6-NEXT: v_add_i32_e32 v0, vcc, s6, v0
; GFX6-NEXT: buffer_load_dword v0, v0, s[8:11], 0 offen glc slc ; GFX6-NEXT: buffer_load_dword v0, v0, s[8:11], 0 offen glc slc
; GFX6-NEXT: s_mov_b32 s3, 0x100f000 ; GFX6-NEXT: s_mov_b32 s3, 0x100f000
; GFX6-NEXT: s_mov_b32 s2, -1 ; GFX6-NEXT: s_mov_b32 s2, -1
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define amdgpu_kernel void @private_nontemporal_store_0( define amdgpu_kernel void @private_nontemporal_store_0(
; GFX6-LABEL: private_nontemporal_store_0: ; GFX6-LABEL: private_nontemporal_store_0:
; GFX6: ; %bb.0: ; %entry ; GFX6: ; %bb.0: ; %entry
; GFX6-NEXT: s_mov_b64 s[10:11], s[2:3] ; GFX6-NEXT: s_mov_b64 s[10:11], s[2:3]
; GFX6-NEXT: s_mov_b64 s[8:9], s[0:1] ; GFX6-NEXT: s_mov_b64 s[8:9], s[0:1]
; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX6-NEXT: s_load_dword s2, s[4:5], 0x2 ; GFX6-NEXT: s_load_dword s2, s[4:5], 0x2
; GFX6-NEXT: s_add_u32 s8, s8, s7 ; GFX6-NEXT: s_add_u32 s8, s8, s7
; GFX6-NEXT: s_addc_u32 s9, s9, 0
; GFX6-NEXT: s_waitcnt lgkmcnt(0) ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
; GFX6-NEXT: s_load_dword s0, s[0:1], 0x0 ; GFX6-NEXT: s_load_dword s0, s[0:1], 0x0
; GFX6-NEXT: s_addc_u32 s9, s9, 0
; GFX6-NEXT: v_mov_b32_e32 v1, s2 ; GFX6-NEXT: v_mov_b32_e32 v1, s2
; GFX6-NEXT: s_waitcnt lgkmcnt(0) ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
; GFX6-NEXT: v_mov_b32_e32 v0, s0 ; GFX6-NEXT: v_mov_b32_e32 v0, s0
; GFX6-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen glc slc ; GFX6-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen glc slc
; GFX6-NEXT: s_endpgm ; GFX6-NEXT: s_endpgm
; ;
; GFX7-LABEL: private_nontemporal_store_0: ; GFX7-LABEL: private_nontemporal_store_0:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_mov_b64 s[10:11], s[2:3] ; GFX7-NEXT: s_mov_b64 s[10:11], s[2:3]
; GFX7-NEXT: s_mov_b64 s[8:9], s[0:1] ; GFX7-NEXT: s_mov_b64 s[8:9], s[0:1]
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dword s2, s[4:5], 0x2 ; GFX7-NEXT: s_load_dword s2, s[4:5], 0x2
; GFX7-NEXT: s_add_u32 s8, s8, s7 ; GFX7-NEXT: s_add_u32 s8, s8, s7
; GFX7-NEXT: s_addc_u32 s9, s9, 0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s0, s[0:1], 0x0 ; GFX7-NEXT: s_load_dword s0, s[0:1], 0x0
; GFX7-NEXT: s_addc_u32 s9, s9, 0
; GFX7-NEXT: v_mov_b32_e32 v1, s2 ; GFX7-NEXT: v_mov_b32_e32 v1, s2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen glc slc ; GFX7-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen glc slc
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: private_nontemporal_store_0: ; GFX10-WGP-LABEL: private_nontemporal_store_0:
; GFX10-WGP: ; %bb.0: ; %entry ; GFX10-WGP: ; %bb.0: ; %entry
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; ;
; GFX90A-NOTTGSPLIT-LABEL: private_nontemporal_store_0: ; GFX90A-NOTTGSPLIT-LABEL: private_nontemporal_store_0:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_mov_b64 s[10:11], s[2:3] ; GFX90A-NOTTGSPLIT-NEXT: s_mov_b64 s[10:11], s[2:3]
; GFX90A-NOTTGSPLIT-NEXT: s_mov_b64 s[8:9], s[0:1] ; GFX90A-NOTTGSPLIT-NEXT: s_mov_b64 s[8:9], s[0:1]
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dword s2, s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dword s2, s[4:5], 0x8
; GFX90A-NOTTGSPLIT-NEXT: s_add_u32 s8, s8, s7 ; GFX90A-NOTTGSPLIT-NEXT: s_add_u32 s8, s8, s7
; GFX90A-NOTTGSPLIT-NEXT: s_addc_u32 s9, s9, 0
; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NOTTGSPLIT-NEXT: s_load_dword s0, s[0:1], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dword s0, s[0:1], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_addc_u32 s9, s9, 0
; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v1, s2 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v1, s2
; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v0, s0 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v0, s0
; GFX90A-NOTTGSPLIT-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen glc slc ; GFX90A-NOTTGSPLIT-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen glc slc
; GFX90A-NOTTGSPLIT-NEXT: s_endpgm ; GFX90A-NOTTGSPLIT-NEXT: s_endpgm
; ;
; GFX90A-TGSPLIT-LABEL: private_nontemporal_store_0: ; GFX90A-TGSPLIT-LABEL: private_nontemporal_store_0:
; GFX90A-TGSPLIT: ; %bb.0: ; %entry ; GFX90A-TGSPLIT: ; %bb.0: ; %entry
; GFX90A-TGSPLIT-NEXT: s_mov_b64 s[10:11], s[2:3] ; GFX90A-TGSPLIT-NEXT: s_mov_b64 s[10:11], s[2:3]
; GFX90A-TGSPLIT-NEXT: s_mov_b64 s[8:9], s[0:1] ; GFX90A-TGSPLIT-NEXT: s_mov_b64 s[8:9], s[0:1]
; GFX90A-TGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-TGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-TGSPLIT-NEXT: s_load_dword s2, s[4:5], 0x8 ; GFX90A-TGSPLIT-NEXT: s_load_dword s2, s[4:5], 0x8
; GFX90A-TGSPLIT-NEXT: s_add_u32 s8, s8, s7 ; GFX90A-TGSPLIT-NEXT: s_add_u32 s8, s8, s7
; GFX90A-TGSPLIT-NEXT: s_addc_u32 s9, s9, 0
; GFX90A-TGSPLIT-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-TGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-TGSPLIT-NEXT: s_load_dword s0, s[0:1], 0x0 ; GFX90A-TGSPLIT-NEXT: s_load_dword s0, s[0:1], 0x0
; GFX90A-TGSPLIT-NEXT: s_addc_u32 s9, s9, 0
; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v1, s2 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v1, s2
; GFX90A-TGSPLIT-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-TGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v0, s0 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v0, s0
; GFX90A-TGSPLIT-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen glc slc ; GFX90A-TGSPLIT-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen glc slc
; GFX90A-TGSPLIT-NEXT: s_endpgm ; GFX90A-TGSPLIT-NEXT: s_endpgm
i32 addrspace(1)* %in, i32 addrspace(5)* %out) { i32 addrspace(1)* %in, i32 addrspace(5)* %out) {
entry: entry:
%val = load i32, i32 addrspace(1)* %in, align 4 %val = load i32, i32 addrspace(1)* %in, align 4
store i32 %val, i32 addrspace(5)* %out, !nontemporal !0 store i32 %val, i32 addrspace(5)* %out, !nontemporal !0
ret void ret void
} }
define amdgpu_kernel void @private_nontemporal_store_1( define amdgpu_kernel void @private_nontemporal_store_1(
; GFX6-LABEL: private_nontemporal_store_1: ; GFX6-LABEL: private_nontemporal_store_1:
; GFX6: ; %bb.0: ; %entry ; GFX6: ; %bb.0: ; %entry
; GFX6-NEXT: s_mov_b64 s[10:11], s[2:3] ; GFX6-NEXT: s_mov_b64 s[10:11], s[2:3]
; GFX6-NEXT: s_mov_b64 s[8:9], s[0:1] ; GFX6-NEXT: s_mov_b64 s[8:9], s[0:1]
; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX6-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX6-NEXT: s_load_dword s2, s[4:5], 0x2 ; GFX6-NEXT: s_load_dword s2, s[4:5], 0x2
; GFX6-NEXT: s_add_u32 s8, s8, s7 ; GFX6-NEXT: s_add_u32 s8, s8, s7
; GFX6-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX6-NEXT: s_waitcnt lgkmcnt(0) ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
; GFX6-NEXT: s_load_dword s0, s[0:1], 0x0 ; GFX6-NEXT: s_load_dword s0, s[0:1], 0x0
; GFX6-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX6-NEXT: s_addc_u32 s9, s9, 0 ; GFX6-NEXT: s_addc_u32 s9, s9, 0
; GFX6-NEXT: v_add_i32_e32 v0, vcc, s2, v0 ; GFX6-NEXT: v_add_i32_e32 v0, vcc, s2, v0
; GFX6-NEXT: s_waitcnt lgkmcnt(0) ; GFX6-NEXT: s_waitcnt lgkmcnt(0)
; GFX6-NEXT: v_mov_b32_e32 v1, s0 ; GFX6-NEXT: v_mov_b32_e32 v1, s0
; GFX6-NEXT: buffer_store_dword v1, v0, s[8:11], 0 offen glc slc ; GFX6-NEXT: buffer_store_dword v1, v0, s[8:11], 0 offen glc slc
; GFX6-NEXT: s_endpgm ; GFX6-NEXT: s_endpgm
; ;
; GFX7-LABEL: private_nontemporal_store_1: ; GFX7-LABEL: private_nontemporal_store_1:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_mov_b64 s[10:11], s[2:3] ; GFX7-NEXT: s_mov_b64 s[10:11], s[2:3]
; GFX7-NEXT: s_mov_b64 s[8:9], s[0:1] ; GFX7-NEXT: s_mov_b64 s[8:9], s[0:1]
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dword s2, s[4:5], 0x2 ; GFX7-NEXT: s_load_dword s2, s[4:5], 0x2
; GFX7-NEXT: s_add_u32 s8, s8, s7 ; GFX7-NEXT: s_add_u32 s8, s8, s7
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s0, s[0:1], 0x0 ; GFX7-NEXT: s_load_dword s0, s[0:1], 0x0
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX7-NEXT: s_addc_u32 s9, s9, 0 ; GFX7-NEXT: s_addc_u32 s9, s9, 0
; GFX7-NEXT: v_add_i32_e32 v0, vcc, s2, v0 ; GFX7-NEXT: v_add_i32_e32 v0, vcc, s2, v0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v1, s0 ; GFX7-NEXT: v_mov_b32_e32 v1, s0
; GFX7-NEXT: buffer_store_dword v1, v0, s[8:11], 0 offen glc slc ; GFX7-NEXT: buffer_store_dword v1, v0, s[8:11], 0 offen glc slc
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: private_nontemporal_store_1: ; GFX10-WGP-LABEL: private_nontemporal_store_1:
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; ;
; GFX90A-NOTTGSPLIT-LABEL: private_nontemporal_store_1: ; GFX90A-NOTTGSPLIT-LABEL: private_nontemporal_store_1:
; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry ; GFX90A-NOTTGSPLIT: ; %bb.0: ; %entry
; GFX90A-NOTTGSPLIT-NEXT: s_mov_b64 s[10:11], s[2:3] ; GFX90A-NOTTGSPLIT-NEXT: s_mov_b64 s[10:11], s[2:3]
; GFX90A-NOTTGSPLIT-NEXT: s_mov_b64 s[8:9], s[0:1] ; GFX90A-NOTTGSPLIT-NEXT: s_mov_b64 s[8:9], s[0:1]
; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_load_dword s2, s[4:5], 0x8 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dword s2, s[4:5], 0x8
; GFX90A-NOTTGSPLIT-NEXT: s_add_u32 s8, s8, s7 ; GFX90A-NOTTGSPLIT-NEXT: s_add_u32 s8, s8, s7
; GFX90A-NOTTGSPLIT-NEXT: s_addc_u32 s9, s9, 0
; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NOTTGSPLIT-NEXT: s_load_dword s0, s[0:1], 0x0 ; GFX90A-NOTTGSPLIT-NEXT: s_load_dword s0, s[0:1], 0x0
; GFX90A-NOTTGSPLIT-NEXT: s_addc_u32 s9, s9, 0
; GFX90A-NOTTGSPLIT-NEXT: v_lshl_add_u32 v0, v0, 2, s2 ; GFX90A-NOTTGSPLIT-NEXT: v_lshl_add_u32 v0, v0, 2, s2
; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-NOTTGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v1, s0 ; GFX90A-NOTTGSPLIT-NEXT: v_mov_b32_e32 v1, s0
; GFX90A-NOTTGSPLIT-NEXT: buffer_store_dword v1, v0, s[8:11], 0 offen glc slc ; GFX90A-NOTTGSPLIT-NEXT: buffer_store_dword v1, v0, s[8:11], 0 offen glc slc
; GFX90A-NOTTGSPLIT-NEXT: s_endpgm ; GFX90A-NOTTGSPLIT-NEXT: s_endpgm
; ;
; GFX90A-TGSPLIT-LABEL: private_nontemporal_store_1: ; GFX90A-TGSPLIT-LABEL: private_nontemporal_store_1:
; GFX90A-TGSPLIT: ; %bb.0: ; %entry ; GFX90A-TGSPLIT: ; %bb.0: ; %entry
; GFX90A-TGSPLIT-NEXT: s_mov_b64 s[10:11], s[2:3] ; GFX90A-TGSPLIT-NEXT: s_mov_b64 s[10:11], s[2:3]
; GFX90A-TGSPLIT-NEXT: s_mov_b64 s[8:9], s[0:1] ; GFX90A-TGSPLIT-NEXT: s_mov_b64 s[8:9], s[0:1]
; GFX90A-TGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-TGSPLIT-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-TGSPLIT-NEXT: s_load_dword s2, s[4:5], 0x8 ; GFX90A-TGSPLIT-NEXT: s_load_dword s2, s[4:5], 0x8
; GFX90A-TGSPLIT-NEXT: s_add_u32 s8, s8, s7 ; GFX90A-TGSPLIT-NEXT: s_add_u32 s8, s8, s7
; GFX90A-TGSPLIT-NEXT: s_addc_u32 s9, s9, 0
; GFX90A-TGSPLIT-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-TGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-TGSPLIT-NEXT: s_load_dword s0, s[0:1], 0x0 ; GFX90A-TGSPLIT-NEXT: s_load_dword s0, s[0:1], 0x0
; GFX90A-TGSPLIT-NEXT: s_addc_u32 s9, s9, 0
; GFX90A-TGSPLIT-NEXT: v_lshl_add_u32 v0, v0, 2, s2 ; GFX90A-TGSPLIT-NEXT: v_lshl_add_u32 v0, v0, 2, s2
; GFX90A-TGSPLIT-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-TGSPLIT-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v1, s0 ; GFX90A-TGSPLIT-NEXT: v_mov_b32_e32 v1, s0
; GFX90A-TGSPLIT-NEXT: buffer_store_dword v1, v0, s[8:11], 0 offen glc slc ; GFX90A-TGSPLIT-NEXT: buffer_store_dword v1, v0, s[8:11], 0 offen glc slc
; GFX90A-TGSPLIT-NEXT: s_endpgm ; GFX90A-TGSPLIT-NEXT: s_endpgm
i32 addrspace(1)* %in, i32 addrspace(5)* %out) { i32 addrspace(1)* %in, i32 addrspace(5)* %out) {
entry: entry:
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%val = load i32, i32 addrspace(1)* %in, align 4 %val = load i32, i32 addrspace(1)* %in, align 4
%out.gep = getelementptr inbounds i32, i32 addrspace(5)* %out, i32 %tid %out.gep = getelementptr inbounds i32, i32 addrspace(5)* %out, i32 %tid
store i32 %val, i32 addrspace(5)* %out.gep, !nontemporal !0 store i32 %val, i32 addrspace(5)* %out.gep, !nontemporal !0
ret void ret void
} }
!0 = !{i32 1} !0 = !{i32 1}
declare i32 @llvm.amdgcn.workitem.id.x() declare i32 @llvm.amdgcn.workitem.id.x()

llvm/test/CodeGen/AMDGPU/memory-legalizer-private-volatile.ll

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; ;
; GFX7-LABEL: private_volatile_store_0: ; GFX7-LABEL: private_volatile_store_0:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_mov_b64 s[10:11], s[2:3] ; GFX7-NEXT: s_mov_b64 s[10:11], s[2:3]
; GFX7-NEXT: s_mov_b64 s[8:9], s[0:1] ; GFX7-NEXT: s_mov_b64 s[8:9], s[0:1]
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dword s2, s[4:5], 0x2 ; GFX7-NEXT: s_load_dword s2, s[4:5], 0x2
; GFX7-NEXT: s_add_u32 s8, s8, s7 ; GFX7-NEXT: s_add_u32 s8, s8, s7
; GFX7-NEXT: s_addc_u32 s9, s9, 0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s0, s[0:1], 0x0 ; GFX7-NEXT: s_load_dword s0, s[0:1], 0x0
; GFX7-NEXT: s_addc_u32 s9, s9, 0
; GFX7-NEXT: v_mov_b32_e32 v1, s2 ; GFX7-NEXT: v_mov_b32_e32 v1, s2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen ; GFX7-NEXT: buffer_store_dword v0, v1, s[8:11], 0 offen
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX10-WGP-LABEL: private_volatile_store_0: ; GFX10-WGP-LABEL: private_volatile_store_0:
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; ;
; GFX7-LABEL: private_volatile_store_1: ; GFX7-LABEL: private_volatile_store_1:
; GFX7: ; %bb.0: ; %entry ; GFX7: ; %bb.0: ; %entry
; GFX7-NEXT: s_mov_b64 s[10:11], s[2:3] ; GFX7-NEXT: s_mov_b64 s[10:11], s[2:3]
; GFX7-NEXT: s_mov_b64 s[8:9], s[0:1] ; GFX7-NEXT: s_mov_b64 s[8:9], s[0:1]
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX7-NEXT: s_load_dword s2, s[4:5], 0x2 ; GFX7-NEXT: s_load_dword s2, s[4:5], 0x2
; GFX7-NEXT: s_add_u32 s8, s8, s7 ; GFX7-NEXT: s_add_u32 s8, s8, s7
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_load_dword s0, s[0:1], 0x0 ; GFX7-NEXT: s_load_dword s0, s[0:1], 0x0
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX7-NEXT: s_addc_u32 s9, s9, 0 ; GFX7-NEXT: s_addc_u32 s9, s9, 0
; GFX7-NEXT: v_add_i32_e32 v0, vcc, s2, v0 ; GFX7-NEXT: v_add_i32_e32 v0, vcc, s2, v0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v1, s0 ; GFX7-NEXT: v_mov_b32_e32 v1, s0
; GFX7-NEXT: buffer_store_dword v1, v0, s[8:11], 0 offen ; GFX7-NEXT: buffer_store_dword v1, v0, s[8:11], 0 offen
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
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llvm/test/CodeGen/AMDGPU/memory_clause.ll

Show First 20 Lines • Show All 79 Lines • ▼ Show 20 Lines
; GCN-NEXT: s_load_dwordx4 s[8:11], s[16:17], 0x20 ; GCN-NEXT: s_load_dwordx4 s[8:11], s[16:17], 0x20
; GCN-NEXT: s_load_dwordx4 s[12:15], s[16:17], 0x30 ; GCN-NEXT: s_load_dwordx4 s[12:15], s[16:17], 0x30
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_mov_b32_e32 v0, s0 ; GCN-NEXT: v_mov_b32_e32 v0, s0
; GCN-NEXT: v_mov_b32_e32 v1, s1 ; GCN-NEXT: v_mov_b32_e32 v1, s1
; GCN-NEXT: v_mov_b32_e32 v2, s2 ; GCN-NEXT: v_mov_b32_e32 v2, s2
; GCN-NEXT: v_mov_b32_e32 v3, s3 ; GCN-NEXT: v_mov_b32_e32 v3, s3
; GCN-NEXT: v_mov_b32_e32 v4, s4 ; GCN-NEXT: v_mov_b32_e32 v4, s4
; GCN-NEXT: v_mov_b32_e32 v8, s8
; GCN-NEXT: v_mov_b32_e32 v5, s5 ; GCN-NEXT: v_mov_b32_e32 v5, s5
; GCN-NEXT: v_mov_b32_e32 v6, s6 ; GCN-NEXT: v_mov_b32_e32 v6, s6
; GCN-NEXT: v_mov_b32_e32 v7, s7 ; GCN-NEXT: v_mov_b32_e32 v7, s7
; GCN-NEXT: v_mov_b32_e32 v8, s8
; GCN-NEXT: v_mov_b32_e32 v9, s9 ; GCN-NEXT: v_mov_b32_e32 v9, s9
; GCN-NEXT: v_mov_b32_e32 v10, s10 ; GCN-NEXT: v_mov_b32_e32 v10, s10
; GCN-NEXT: v_mov_b32_e32 v11, s11 ; GCN-NEXT: v_mov_b32_e32 v11, s11
; GCN-NEXT: global_store_dwordx4 v12, v[0:3], s[18:19] ; GCN-NEXT: global_store_dwordx4 v12, v[0:3], s[18:19]
; GCN-NEXT: global_store_dwordx4 v12, v[4:7], s[18:19] offset:16 ; GCN-NEXT: global_store_dwordx4 v12, v[4:7], s[18:19] offset:16
; GCN-NEXT: global_store_dwordx4 v12, v[8:11], s[18:19] offset:32 ; GCN-NEXT: global_store_dwordx4 v12, v[8:11], s[18:19] offset:32
; GCN-NEXT: v_mov_b32_e32 v0, s12 ; GCN-NEXT: v_mov_b32_e32 v0, s12
; GCN-NEXT: v_mov_b32_e32 v1, s13 ; GCN-NEXT: v_mov_b32_e32 v1, s13
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; GCN-NEXT: s_load_dwordx2 s[14:15], s[0:1], 0x24 ; GCN-NEXT: s_load_dwordx2 s[14:15], s[0:1], 0x24
; GCN-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x44 ; GCN-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x44
; GCN-NEXT: buffer_store_dword v0, off, s[16:19], 0 offset:4 ; GCN-NEXT: buffer_store_dword v0, off, s[16:19], 0 offset:4
; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: ;;#ASMSTART ; GCN-NEXT: ;;#ASMSTART
; GCN-NEXT: ;;#ASMEND ; GCN-NEXT: ;;#ASMEND
; GCN-NEXT: buffer_load_dword v2, off, s[16:19], 0 offset:4 ; GCN-NEXT: buffer_load_dword v2, off, s[16:19], 0 offset:4
; GCN-NEXT: s_brev_b32 s0, 1 ; GCN-NEXT: s_brev_b32 s0, 1
; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_mov_b32_e32 v0, s14
; GCN-NEXT: s_mov_b32 s3, 0 ; GCN-NEXT: s_mov_b32 s3, 0
; GCN-NEXT: s_mov_b32 s1, s0 ; GCN-NEXT: s_mov_b32 s1, s0
; GCN-NEXT: s_mov_b32 s2, s0 ; GCN-NEXT: s_mov_b32 s2, s0
; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_mov_b32_e32 v0, s14
; GCN-NEXT: v_mov_b32_e32 v1, s15 ; GCN-NEXT: v_mov_b32_e32 v1, s15
; GCN-NEXT: s_and_b64 exec, exec, s[12:13] ; GCN-NEXT: s_and_b64 exec, exec, s[12:13]
; GCN-NEXT: image_sample v0, v[0:1], s[4:11], s[0:3] dmask:0x1 ; GCN-NEXT: image_sample v0, v[0:1], s[4:11], s[0:3] dmask:0x1
; GCN-NEXT: s_waitcnt vmcnt(0) ; GCN-NEXT: s_waitcnt vmcnt(0)
; GCN-NEXT: v_add_f32_e32 v0, v2, v0 ; GCN-NEXT: v_add_f32_e32 v0, v2, v0
; GCN-NEXT: exp mrt0 v0, off, off, off done vm ; GCN-NEXT: exp mrt0 v0, off, off, off done vm
; GCN-NEXT: s_endpgm ; GCN-NEXT: s_endpgm
; ;
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llvm/test/CodeGen/AMDGPU/pal-simple-indirect-call.ll

Show All 34 Lines
; GFX9-NEXT: s_mov_b32 s32, 0 ; GFX9-NEXT: s_mov_b32 s32, 0
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: s_add_u32 s36, s36, s0 ; GFX9-NEXT: s_add_u32 s36, s36, s0
; GFX9-NEXT: s_addc_u32 s37, s37, 0 ; GFX9-NEXT: s_addc_u32 s37, s37, 0
; GFX9-NEXT: s_mov_b64 s[0:1], s[36:37] ; GFX9-NEXT: s_mov_b64 s[0:1], s[36:37]
; GFX9-NEXT: s_mov_b64 s[2:3], s[38:39] ; GFX9-NEXT: s_mov_b64 s[2:3], s[38:39]
; GFX9-NEXT: s_swappc_b64 s[30:31], s[4:5] ; GFX9-NEXT: s_swappc_b64 s[30:31], s[4:5]
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
;
; GFX10-LABEL: test_simple_indirect_call: ; GFX10-LABEL: test_simple_indirect_call:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_getpc_b64 s[36:37] ; GFX10-NEXT: s_getpc_b64 s[36:37]
; GFX10-NEXT: s_mov_b32 s36, s0 ; GFX10-NEXT: s_mov_b32 s36, s0
; GFX10-NEXT: s_getpc_b64 s[4:5] ; GFX10-NEXT: s_getpc_b64 s[4:5]
; GFX10-NEXT: s_load_dwordx4 s[36:39], s[36:37], 0x10 ; GFX10-NEXT: s_load_dwordx4 s[36:39], s[36:37], 0x10
; GFX10-NEXT: s_mov_b32 s32, 0 ; GFX10-NEXT: s_mov_b32 s32, 0
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: s_bitset0_b32 s39, 21 ; GFX10-NEXT: s_bitset0_b32 s39, 21
; GFX10-NEXT: s_add_u32 s36, s36, s0 ; GFX10-NEXT: s_add_u32 s36, s36, s0
; GFX10-NEXT: s_addc_u32 s37, s37, 0 ; GFX10-NEXT: s_addc_u32 s37, s37, 0
; GFX10-NEXT: s_mov_b64 s[0:1], s[36:37]
; GFX10-NEXT: s_mov_b64 s[2:3], s[38:39] ; GFX10-NEXT: s_mov_b64 s[2:3], s[38:39]
; GFX10-NEXT: s_mov_b64 s[0:1], s[36:37]
; GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5] ; GFX10-NEXT: s_swappc_b64 s[30:31], s[4:5]
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
%pc = call i64 @llvm.amdgcn.s.getpc() %pc = call i64 @llvm.amdgcn.s.getpc()
%fun = inttoptr i64 %pc to void()* %fun = inttoptr i64 %pc to void()*
call amdgpu_gfx void %fun() call amdgpu_gfx void %fun()
ret void ret void
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llvm/test/CodeGen/AMDGPU/saddo.ll

Show First 20 Lines • Show All 288 Lines • ▼ Show 20 Lines
define amdgpu_kernel void @s_saddo_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %carryout, i64 %a, i64 %b) nounwind { define amdgpu_kernel void @s_saddo_i64(i64 addrspace(1)* %out, i1 addrspace(1)* %carryout, i64 %a, i64 %b) nounwind {
; SI-LABEL: s_saddo_i64: ; SI-LABEL: s_saddo_i64:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x9 ; SI-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x9
; SI-NEXT: s_mov_b32 s11, 0xf000 ; SI-NEXT: s_mov_b32 s11, 0xf000
; SI-NEXT: s_mov_b32 s10, -1 ; SI-NEXT: s_mov_b32 s10, -1
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_add_u32 s12, s4, s6 ; SI-NEXT: s_add_u32 s12, s4, s6
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: s_addc_u32 s13, s5, s7 ; SI-NEXT: s_addc_u32 s13, s5, s7
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5 ; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: v_cmp_lt_i64_e32 vcc, s[12:13], v[0:1] ; SI-NEXT: v_cmp_lt_i64_e32 vcc, s[12:13], v[0:1]
; SI-NEXT: v_cmp_lt_i64_e64 s[4:5], s[6:7], 0 ; SI-NEXT: v_cmp_lt_i64_e64 s[4:5], s[6:7], 0
; SI-NEXT: v_mov_b32_e32 v0, s12
; SI-NEXT: s_mov_b32 s8, s0 ; SI-NEXT: s_mov_b32 s8, s0
; SI-NEXT: s_mov_b32 s9, s1 ; SI-NEXT: s_mov_b32 s9, s1
; SI-NEXT: v_mov_b32_e32 v0, s12
; SI-NEXT: v_mov_b32_e32 v1, s13 ; SI-NEXT: v_mov_b32_e32 v1, s13
; SI-NEXT: s_xor_b64 s[4:5], s[4:5], vcc ; SI-NEXT: s_xor_b64 s[4:5], s[4:5], vcc
; SI-NEXT: s_mov_b32 s0, s2 ; SI-NEXT: s_mov_b32 s0, s2
; SI-NEXT: s_mov_b32 s1, s3 ; SI-NEXT: s_mov_b32 s1, s3
; SI-NEXT: s_mov_b32 s2, s10 ; SI-NEXT: s_mov_b32 s2, s10
; SI-NEXT: s_mov_b32 s3, s11 ; SI-NEXT: s_mov_b32 s3, s11
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0 ; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0
; SI-NEXT: s_waitcnt expcnt(0) ; SI-NEXT: s_waitcnt expcnt(0)
; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5] ; SI-NEXT: v_cndmask_b32_e64 v0, 0, 1, s[4:5]
; SI-NEXT: buffer_store_byte v0, off, s[0:3], 0 ; SI-NEXT: buffer_store_byte v0, off, s[0:3], 0
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: s_saddo_i64: ; VI-LABEL: s_saddo_i64:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x24
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s0 ; VI-NEXT: v_mov_b32_e32 v0, s0
; VI-NEXT: s_add_u32 s0, s4, s6 ; VI-NEXT: s_add_u32 s0, s4, s6
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: s_addc_u32 s1, s5, s7 ; VI-NEXT: s_addc_u32 s1, s5, s7
; VI-NEXT: v_mov_b32_e32 v4, s4
; VI-NEXT: v_mov_b32_e32 v5, s5 ; VI-NEXT: v_mov_b32_e32 v5, s5
; VI-NEXT: v_mov_b32_e32 v2, s2 ; VI-NEXT: v_mov_b32_e32 v2, s2
; VI-NEXT: v_mov_b32_e32 v3, s3 ; VI-NEXT: v_mov_b32_e32 v3, s3
; VI-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[4:5] ; VI-NEXT: v_cmp_lt_i64_e32 vcc, s[0:1], v[4:5]
; VI-NEXT: v_cmp_lt_i64_e64 s[2:3], s[6:7], 0 ; VI-NEXT: v_cmp_lt_i64_e64 s[2:3], s[6:7], 0
; VI-NEXT: v_mov_b32_e32 v5, s1 ; VI-NEXT: v_mov_b32_e32 v5, s1
; VI-NEXT: v_mov_b32_e32 v4, s0 ; VI-NEXT: v_mov_b32_e32 v4, s0
; VI-NEXT: s_xor_b64 s[0:1], s[2:3], vcc ; VI-NEXT: s_xor_b64 s[0:1], s[2:3], vcc
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llvm/test/CodeGen/AMDGPU/sdiv64.ll

Show First 20 Lines • Show All 174 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_or_b64 s[18:19], s[18:19], s[20:21] ; GCN-IR-NEXT: s_or_b64 s[18:19], s[18:19], s[20:21]
; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[20:21], s[12:13], 63 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[20:21], s[12:13], 63
; GCN-IR-NEXT: s_xor_b64 s[22:23], s[18:19], -1 ; GCN-IR-NEXT: s_xor_b64 s[22:23], s[18:19], -1
; GCN-IR-NEXT: s_and_b64 s[20:21], s[22:23], s[20:21] ; GCN-IR-NEXT: s_and_b64 s[20:21], s[22:23], s[20:21]
; GCN-IR-NEXT: s_and_b64 vcc, exec, s[20:21] ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[20:21]
; GCN-IR-NEXT: s_cbranch_vccz BB0_5 ; GCN-IR-NEXT: s_cbranch_vccz BB0_5
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
; GCN-IR-NEXT: s_add_u32 s18, s12, 1 ; GCN-IR-NEXT: s_add_u32 s18, s12, 1
; GCN-IR-NEXT: v_mov_b32_e32 v0, s12
; GCN-IR-NEXT: s_addc_u32 s19, s13, 0 ; GCN-IR-NEXT: s_addc_u32 s19, s13, 0
; GCN-IR-NEXT: v_mov_b32_e32 v0, s12
; GCN-IR-NEXT: v_mov_b32_e32 v1, s13 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s13
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[18:19], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[18:19], v[0:1]
; GCN-IR-NEXT: s_sub_i32 s12, 63, s12 ; GCN-IR-NEXT: s_sub_i32 s12, 63, s12
; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_lshl_b64 s[12:13], s[10:11], s12 ; GCN-IR-NEXT: s_lshl_b64 s[12:13], s[10:11], s12
; GCN-IR-NEXT: s_cbranch_vccz BB0_4 ; GCN-IR-NEXT: s_cbranch_vccz BB0_4
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: s_lshr_b64 s[18:19], s[10:11], s18 ; GCN-IR-NEXT: s_lshr_b64 s[18:19], s[10:11], s18
Show All 14 Lines
; GCN-IR-NEXT: s_or_b64 s[12:13], s[14:15], s[12:13] ; GCN-IR-NEXT: s_or_b64 s[12:13], s[14:15], s[12:13]
; GCN-IR-NEXT: s_sub_u32 s8, s20, s16 ; GCN-IR-NEXT: s_sub_u32 s8, s20, s16
; GCN-IR-NEXT: s_subb_u32 s8, s21, s17 ; GCN-IR-NEXT: s_subb_u32 s8, s21, s17
; GCN-IR-NEXT: s_ashr_i32 s14, s8, 31 ; GCN-IR-NEXT: s_ashr_i32 s14, s8, 31
; GCN-IR-NEXT: s_mov_b32 s15, s14 ; GCN-IR-NEXT: s_mov_b32 s15, s14
; GCN-IR-NEXT: s_and_b32 s8, s14, 1 ; GCN-IR-NEXT: s_and_b32 s8, s14, 1
; GCN-IR-NEXT: s_and_b64 s[18:19], s[14:15], s[6:7] ; GCN-IR-NEXT: s_and_b64 s[18:19], s[14:15], s[6:7]
; GCN-IR-NEXT: s_sub_u32 s18, s16, s18 ; GCN-IR-NEXT: s_sub_u32 s18, s16, s18
; GCN-IR-NEXT: v_mov_b32_e32 v0, s10
; GCN-IR-NEXT: s_subb_u32 s19, s17, s19 ; GCN-IR-NEXT: s_subb_u32 s19, s17, s19
; GCN-IR-NEXT: v_mov_b32_e32 v1, s11 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s10
; GCN-IR-NEXT: s_add_u32 s10, s10, 1 ; GCN-IR-NEXT: s_add_u32 s10, s10, 1
; GCN-IR-NEXT: v_mov_b32_e32 v1, s11
; GCN-IR-NEXT: s_addc_u32 s11, s11, 0 ; GCN-IR-NEXT: s_addc_u32 s11, s11, 0
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1]
; GCN-IR-NEXT: s_mov_b64 s[14:15], s[8:9] ; GCN-IR-NEXT: s_mov_b64 s[14:15], s[8:9]
; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_cbranch_vccz BB0_3 ; GCN-IR-NEXT: s_cbranch_vccz BB0_3
; GCN-IR-NEXT: BB0_4: ; %Flow6 ; GCN-IR-NEXT: BB0_4: ; %Flow6
; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[12:13], 1 ; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[12:13], 1
; GCN-IR-NEXT: s_or_b64 s[6:7], s[8:9], s[6:7] ; GCN-IR-NEXT: s_or_b64 s[6:7], s[8:9], s[6:7]
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; GCN-IR-NEXT: v_add_i32_e32 v16, vcc, 1, v11 ; GCN-IR-NEXT: v_add_i32_e32 v16, vcc, 1, v11
; GCN-IR-NEXT: v_or_b32_e32 v8, v17, v8 ; GCN-IR-NEXT: v_or_b32_e32 v8, v17, v8
; GCN-IR-NEXT: v_ashrrev_i32_e32 v13, 31, v9 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v13, 31, v9
; GCN-IR-NEXT: v_addc_u32_e32 v17, vcc, 0, v12, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v17, vcc, 0, v12, vcc
; GCN-IR-NEXT: v_and_b32_e32 v9, 1, v13 ; GCN-IR-NEXT: v_and_b32_e32 v9, 1, v13
; GCN-IR-NEXT: v_and_b32_e32 v20, v13, v3 ; GCN-IR-NEXT: v_and_b32_e32 v20, v13, v3
; GCN-IR-NEXT: v_and_b32_e32 v13, v13, v2 ; GCN-IR-NEXT: v_and_b32_e32 v13, v13, v2
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[16:17], v[11:12] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[16:17], v[11:12]
; GCN-IR-NEXT: v_mov_b32_e32 v11, v16
; GCN-IR-NEXT: v_sub_i32_e64 v14, s[4:5], v0, v13 ; GCN-IR-NEXT: v_sub_i32_e64 v14, s[4:5], v0, v13
; GCN-IR-NEXT: v_mov_b32_e32 v12, v17
; GCN-IR-NEXT: v_mov_b32_e32 v17, v10
; GCN-IR-NEXT: v_subb_u32_e64 v15, s[4:5], v15, v20, s[4:5] ; GCN-IR-NEXT: v_subb_u32_e64 v15, s[4:5], v15, v20, s[4:5]
; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
; GCN-IR-NEXT: v_mov_b32_e32 v11, v16
; GCN-IR-NEXT: v_mov_b32_e32 v12, v17
; GCN-IR-NEXT: v_mov_b32_e32 v17, v10
; GCN-IR-NEXT: v_mov_b32_e32 v16, v9 ; GCN-IR-NEXT: v_mov_b32_e32 v16, v9
; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: s_cbranch_execnz BB1_3 ; GCN-IR-NEXT: s_cbranch_execnz BB1_3
; GCN-IR-NEXT: ; %bb.4: ; %Flow ; GCN-IR-NEXT: ; %bb.4: ; %Flow
; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: BB1_5: ; %Flow3 ; GCN-IR-NEXT: BB1_5: ; %Flow3
; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[7:8], 1 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[7:8], 1
▲ Show 20 Lines • Show All 563 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_or_b64 s[18:19], s[18:19], s[20:21] ; GCN-IR-NEXT: s_or_b64 s[18:19], s[18:19], s[20:21]
; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[20:21], s[12:13], 63 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[20:21], s[12:13], 63
; GCN-IR-NEXT: s_xor_b64 s[22:23], s[18:19], -1 ; GCN-IR-NEXT: s_xor_b64 s[22:23], s[18:19], -1
; GCN-IR-NEXT: s_and_b64 s[20:21], s[22:23], s[20:21] ; GCN-IR-NEXT: s_and_b64 s[20:21], s[22:23], s[20:21]
; GCN-IR-NEXT: s_and_b64 vcc, exec, s[20:21] ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[20:21]
; GCN-IR-NEXT: s_cbranch_vccz BB9_5 ; GCN-IR-NEXT: s_cbranch_vccz BB9_5
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
; GCN-IR-NEXT: s_add_u32 s18, s12, 1 ; GCN-IR-NEXT: s_add_u32 s18, s12, 1
; GCN-IR-NEXT: v_mov_b32_e32 v0, s12
; GCN-IR-NEXT: s_addc_u32 s19, s13, 0 ; GCN-IR-NEXT: s_addc_u32 s19, s13, 0
; GCN-IR-NEXT: v_mov_b32_e32 v0, s12
; GCN-IR-NEXT: v_mov_b32_e32 v1, s13 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s13
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[18:19], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[18:19], v[0:1]
; GCN-IR-NEXT: s_sub_i32 s12, 63, s12 ; GCN-IR-NEXT: s_sub_i32 s12, 63, s12
; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_lshl_b64 s[12:13], s[10:11], s12 ; GCN-IR-NEXT: s_lshl_b64 s[12:13], s[10:11], s12
; GCN-IR-NEXT: s_cbranch_vccz BB9_4 ; GCN-IR-NEXT: s_cbranch_vccz BB9_4
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: s_lshr_b64 s[18:19], s[10:11], s18 ; GCN-IR-NEXT: s_lshr_b64 s[18:19], s[10:11], s18
Show All 14 Lines
; GCN-IR-NEXT: s_or_b64 s[12:13], s[14:15], s[12:13] ; GCN-IR-NEXT: s_or_b64 s[12:13], s[14:15], s[12:13]
; GCN-IR-NEXT: s_sub_u32 s8, s20, s16 ; GCN-IR-NEXT: s_sub_u32 s8, s20, s16
; GCN-IR-NEXT: s_subb_u32 s8, s21, s17 ; GCN-IR-NEXT: s_subb_u32 s8, s21, s17
; GCN-IR-NEXT: s_ashr_i32 s14, s8, 31 ; GCN-IR-NEXT: s_ashr_i32 s14, s8, 31
; GCN-IR-NEXT: s_mov_b32 s15, s14 ; GCN-IR-NEXT: s_mov_b32 s15, s14
; GCN-IR-NEXT: s_and_b32 s8, s14, 1 ; GCN-IR-NEXT: s_and_b32 s8, s14, 1
; GCN-IR-NEXT: s_and_b64 s[18:19], s[14:15], s[6:7] ; GCN-IR-NEXT: s_and_b64 s[18:19], s[14:15], s[6:7]
; GCN-IR-NEXT: s_sub_u32 s18, s16, s18 ; GCN-IR-NEXT: s_sub_u32 s18, s16, s18
; GCN-IR-NEXT: v_mov_b32_e32 v0, s10
; GCN-IR-NEXT: s_subb_u32 s19, s17, s19 ; GCN-IR-NEXT: s_subb_u32 s19, s17, s19
; GCN-IR-NEXT: v_mov_b32_e32 v1, s11 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s10
; GCN-IR-NEXT: s_add_u32 s10, s10, 1 ; GCN-IR-NEXT: s_add_u32 s10, s10, 1
; GCN-IR-NEXT: v_mov_b32_e32 v1, s11
; GCN-IR-NEXT: s_addc_u32 s11, s11, 0 ; GCN-IR-NEXT: s_addc_u32 s11, s11, 0
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1]
; GCN-IR-NEXT: s_mov_b64 s[14:15], s[8:9] ; GCN-IR-NEXT: s_mov_b64 s[14:15], s[8:9]
; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_cbranch_vccz BB9_3 ; GCN-IR-NEXT: s_cbranch_vccz BB9_3
; GCN-IR-NEXT: BB9_4: ; %Flow3 ; GCN-IR-NEXT: BB9_4: ; %Flow3
; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[12:13], 1 ; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[12:13], 1
; GCN-IR-NEXT: s_or_b64 s[6:7], s[8:9], s[6:7] ; GCN-IR-NEXT: s_or_b64 s[6:7], s[8:9], s[6:7]
▲ Show 20 Lines • Show All 163 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_or_b64 s[12:13], s[12:13], s[14:15] ; GCN-IR-NEXT: s_or_b64 s[12:13], s[12:13], s[14:15]
; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[14:15], s[10:11], 63 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[14:15], s[10:11], 63
; GCN-IR-NEXT: s_xor_b64 s[16:17], s[12:13], -1 ; GCN-IR-NEXT: s_xor_b64 s[16:17], s[12:13], -1
; GCN-IR-NEXT: s_and_b64 s[14:15], s[16:17], s[14:15] ; GCN-IR-NEXT: s_and_b64 s[14:15], s[16:17], s[14:15]
; GCN-IR-NEXT: s_and_b64 vcc, exec, s[14:15] ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[14:15]
; GCN-IR-NEXT: s_cbranch_vccz BB10_5 ; GCN-IR-NEXT: s_cbranch_vccz BB10_5
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
; GCN-IR-NEXT: s_add_u32 s12, s10, 1 ; GCN-IR-NEXT: s_add_u32 s12, s10, 1
; GCN-IR-NEXT: v_mov_b32_e32 v0, s10
; GCN-IR-NEXT: s_addc_u32 s13, s11, 0 ; GCN-IR-NEXT: s_addc_u32 s13, s11, 0
; GCN-IR-NEXT: v_mov_b32_e32 v0, s10
; GCN-IR-NEXT: v_mov_b32_e32 v1, s11 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s11
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[12:13], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[12:13], v[0:1]
; GCN-IR-NEXT: s_sub_i32 s9, 63, s10 ; GCN-IR-NEXT: s_sub_i32 s9, 63, s10
; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_lshl_b64 s[10:11], 24, s9 ; GCN-IR-NEXT: s_lshl_b64 s[10:11], 24, s9
; GCN-IR-NEXT: s_cbranch_vccz BB10_4 ; GCN-IR-NEXT: s_cbranch_vccz BB10_4
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: s_lshr_b64 s[14:15], 24, s12 ; GCN-IR-NEXT: s_lshr_b64 s[14:15], 24, s12
Show All 12 Lines
; GCN-IR-NEXT: s_or_b64 s[10:11], s[12:13], s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], s[12:13], s[10:11]
; GCN-IR-NEXT: s_sub_u32 s6, s16, s14 ; GCN-IR-NEXT: s_sub_u32 s6, s16, s14
; GCN-IR-NEXT: s_subb_u32 s6, s17, s15 ; GCN-IR-NEXT: s_subb_u32 s6, s17, s15
; GCN-IR-NEXT: s_ashr_i32 s12, s6, 31 ; GCN-IR-NEXT: s_ashr_i32 s12, s6, 31
; GCN-IR-NEXT: s_mov_b32 s13, s12 ; GCN-IR-NEXT: s_mov_b32 s13, s12
; GCN-IR-NEXT: s_and_b32 s6, s12, 1 ; GCN-IR-NEXT: s_and_b32 s6, s12, 1
; GCN-IR-NEXT: s_and_b64 s[18:19], s[12:13], s[2:3] ; GCN-IR-NEXT: s_and_b64 s[18:19], s[12:13], s[2:3]
; GCN-IR-NEXT: s_sub_u32 s14, s14, s18 ; GCN-IR-NEXT: s_sub_u32 s14, s14, s18
; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: s_subb_u32 s15, s15, s19 ; GCN-IR-NEXT: s_subb_u32 s15, s15, s19
; GCN-IR-NEXT: v_mov_b32_e32 v1, s9 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: s_add_u32 s8, s8, 1 ; GCN-IR-NEXT: s_add_u32 s8, s8, 1
; GCN-IR-NEXT: v_mov_b32_e32 v1, s9
; GCN-IR-NEXT: s_addc_u32 s9, s9, 0 ; GCN-IR-NEXT: s_addc_u32 s9, s9, 0
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[0:1]
; GCN-IR-NEXT: s_mov_b64 s[12:13], s[6:7] ; GCN-IR-NEXT: s_mov_b64 s[12:13], s[6:7]
; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_cbranch_vccz BB10_3 ; GCN-IR-NEXT: s_cbranch_vccz BB10_3
; GCN-IR-NEXT: BB10_4: ; %Flow5 ; GCN-IR-NEXT: BB10_4: ; %Flow5
; GCN-IR-NEXT: s_lshl_b64 s[2:3], s[10:11], 1 ; GCN-IR-NEXT: s_lshl_b64 s[2:3], s[10:11], 1
; GCN-IR-NEXT: s_or_b64 s[2:3], s[6:7], s[2:3] ; GCN-IR-NEXT: s_or_b64 s[2:3], s[6:7], s[2:3]
▲ Show 20 Lines • Show All 169 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5] ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
; GCN-IR-NEXT: s_cbranch_execz BB11_5 ; GCN-IR-NEXT: s_cbranch_execz BB11_5
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: v_add_i32_e32 v14, vcc, -1, v0 ; GCN-IR-NEXT: v_add_i32_e32 v14, vcc, -1, v0
; GCN-IR-NEXT: v_addc_u32_e32 v15, vcc, -1, v1, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v15, vcc, -1, v1, vcc
; GCN-IR-NEXT: v_lshr_b64 v[10:11], 24, v10 ; GCN-IR-NEXT: v_lshr_b64 v[10:11], 24, v10
; GCN-IR-NEXT: v_sub_i32_e32 v8, vcc, 58, v8 ; GCN-IR-NEXT: v_sub_i32_e32 v8, vcc, 58, v8
; GCN-IR-NEXT: v_mov_b32_e32 v12, 0
; GCN-IR-NEXT: v_subb_u32_e32 v9, vcc, 0, v9, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v9, vcc, 0, v9, vcc
; GCN-IR-NEXT: v_mov_b32_e32 v12, 0
; GCN-IR-NEXT: v_mov_b32_e32 v13, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v13, 0
; GCN-IR-NEXT: v_mov_b32_e32 v7, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v7, 0
; GCN-IR-NEXT: BB11_3: ; %udiv-do-while ; GCN-IR-NEXT: BB11_3: ; %udiv-do-while
; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-IR-NEXT: v_lshl_b64 v[10:11], v[10:11], 1 ; GCN-IR-NEXT: v_lshl_b64 v[10:11], v[10:11], 1
; GCN-IR-NEXT: v_lshrrev_b32_e32 v6, 31, v5 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v6, 31, v5
; GCN-IR-NEXT: v_or_b32_e32 v10, v10, v6 ; GCN-IR-NEXT: v_or_b32_e32 v10, v10, v6
; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1 ; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1
; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, v14, v10 ; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, v14, v10
; GCN-IR-NEXT: v_subb_u32_e32 v6, vcc, v15, v11, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v6, vcc, v15, v11, vcc
; GCN-IR-NEXT: v_or_b32_e32 v4, v12, v4 ; GCN-IR-NEXT: v_or_b32_e32 v4, v12, v4
; GCN-IR-NEXT: v_ashrrev_i32_e32 v12, 31, v6 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v12, 31, v6
; GCN-IR-NEXT: v_and_b32_e32 v6, 1, v12 ; GCN-IR-NEXT: v_and_b32_e32 v6, 1, v12
; GCN-IR-NEXT: v_and_b32_e32 v16, v12, v1 ; GCN-IR-NEXT: v_and_b32_e32 v16, v12, v1
; GCN-IR-NEXT: v_and_b32_e32 v17, v12, v0 ; GCN-IR-NEXT: v_and_b32_e32 v17, v12, v0
; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, 1, v8 ; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, 1, v8
; GCN-IR-NEXT: v_or_b32_e32 v5, v13, v5 ; GCN-IR-NEXT: v_or_b32_e32 v5, v13, v5
; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, 0, v9, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, 0, v9, vcc
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[12:13], v[8:9] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[12:13], v[8:9]
; GCN-IR-NEXT: v_mov_b32_e32 v8, v12
; GCN-IR-NEXT: v_sub_i32_e64 v10, s[4:5], v10, v17 ; GCN-IR-NEXT: v_sub_i32_e64 v10, s[4:5], v10, v17
; GCN-IR-NEXT: v_mov_b32_e32 v9, v13
; GCN-IR-NEXT: v_mov_b32_e32 v13, v7
; GCN-IR-NEXT: v_subb_u32_e64 v11, s[4:5], v11, v16, s[4:5] ; GCN-IR-NEXT: v_subb_u32_e64 v11, s[4:5], v11, v16, s[4:5]
; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
; GCN-IR-NEXT: v_mov_b32_e32 v8, v12
; GCN-IR-NEXT: v_mov_b32_e32 v9, v13
; GCN-IR-NEXT: v_mov_b32_e32 v13, v7
; GCN-IR-NEXT: v_mov_b32_e32 v12, v6 ; GCN-IR-NEXT: v_mov_b32_e32 v12, v6
; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: s_cbranch_execnz BB11_3 ; GCN-IR-NEXT: s_cbranch_execnz BB11_3
; GCN-IR-NEXT: ; %bb.4: ; %Flow ; GCN-IR-NEXT: ; %bb.4: ; %Flow
; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: BB11_5: ; %Flow3 ; GCN-IR-NEXT: BB11_5: ; %Flow3
; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[4:5], 1 ; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[4:5], 1
▲ Show 20 Lines • Show All 165 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5] ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
; GCN-IR-NEXT: s_cbranch_execz BB12_5 ; GCN-IR-NEXT: s_cbranch_execz BB12_5
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: v_add_i32_e32 v14, vcc, -1, v0 ; GCN-IR-NEXT: v_add_i32_e32 v14, vcc, -1, v0
; GCN-IR-NEXT: s_mov_b64 s[4:5], 0x8000 ; GCN-IR-NEXT: s_mov_b64 s[4:5], 0x8000
; GCN-IR-NEXT: v_addc_u32_e32 v15, vcc, -1, v1, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v15, vcc, -1, v1, vcc
; GCN-IR-NEXT: v_lshr_b64 v[10:11], s[4:5], v10 ; GCN-IR-NEXT: v_lshr_b64 v[10:11], s[4:5], v10
; GCN-IR-NEXT: v_sub_i32_e32 v8, vcc, 47, v8 ; GCN-IR-NEXT: v_sub_i32_e32 v8, vcc, 47, v8
; GCN-IR-NEXT: v_mov_b32_e32 v12, 0
; GCN-IR-NEXT: v_subb_u32_e32 v9, vcc, 0, v9, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v9, vcc, 0, v9, vcc
; GCN-IR-NEXT: v_mov_b32_e32 v12, 0
; GCN-IR-NEXT: v_mov_b32_e32 v13, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v13, 0
; GCN-IR-NEXT: v_mov_b32_e32 v7, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v7, 0
; GCN-IR-NEXT: BB12_3: ; %udiv-do-while ; GCN-IR-NEXT: BB12_3: ; %udiv-do-while
; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-IR-NEXT: v_lshl_b64 v[10:11], v[10:11], 1 ; GCN-IR-NEXT: v_lshl_b64 v[10:11], v[10:11], 1
; GCN-IR-NEXT: v_lshrrev_b32_e32 v6, 31, v5 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v6, 31, v5
; GCN-IR-NEXT: v_or_b32_e32 v10, v10, v6 ; GCN-IR-NEXT: v_or_b32_e32 v10, v10, v6
; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1 ; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1
; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, v14, v10 ; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, v14, v10
; GCN-IR-NEXT: v_subb_u32_e32 v6, vcc, v15, v11, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v6, vcc, v15, v11, vcc
; GCN-IR-NEXT: v_or_b32_e32 v4, v12, v4 ; GCN-IR-NEXT: v_or_b32_e32 v4, v12, v4
; GCN-IR-NEXT: v_ashrrev_i32_e32 v12, 31, v6 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v12, 31, v6
; GCN-IR-NEXT: v_and_b32_e32 v6, 1, v12 ; GCN-IR-NEXT: v_and_b32_e32 v6, 1, v12
; GCN-IR-NEXT: v_and_b32_e32 v16, v12, v1 ; GCN-IR-NEXT: v_and_b32_e32 v16, v12, v1
; GCN-IR-NEXT: v_and_b32_e32 v17, v12, v0 ; GCN-IR-NEXT: v_and_b32_e32 v17, v12, v0
; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, 1, v8 ; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, 1, v8
; GCN-IR-NEXT: v_or_b32_e32 v5, v13, v5 ; GCN-IR-NEXT: v_or_b32_e32 v5, v13, v5
; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, 0, v9, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, 0, v9, vcc
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[12:13], v[8:9] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[12:13], v[8:9]
; GCN-IR-NEXT: v_mov_b32_e32 v8, v12
; GCN-IR-NEXT: v_sub_i32_e64 v10, s[4:5], v10, v17 ; GCN-IR-NEXT: v_sub_i32_e64 v10, s[4:5], v10, v17
; GCN-IR-NEXT: v_mov_b32_e32 v9, v13
; GCN-IR-NEXT: v_mov_b32_e32 v13, v7
; GCN-IR-NEXT: v_subb_u32_e64 v11, s[4:5], v11, v16, s[4:5] ; GCN-IR-NEXT: v_subb_u32_e64 v11, s[4:5], v11, v16, s[4:5]
; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
; GCN-IR-NEXT: v_mov_b32_e32 v8, v12
; GCN-IR-NEXT: v_mov_b32_e32 v9, v13
; GCN-IR-NEXT: v_mov_b32_e32 v13, v7
; GCN-IR-NEXT: v_mov_b32_e32 v12, v6 ; GCN-IR-NEXT: v_mov_b32_e32 v12, v6
; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: s_cbranch_execnz BB12_3 ; GCN-IR-NEXT: s_cbranch_execnz BB12_3
; GCN-IR-NEXT: ; %bb.4: ; %Flow ; GCN-IR-NEXT: ; %bb.4: ; %Flow
; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: BB12_5: ; %Flow3 ; GCN-IR-NEXT: BB12_5: ; %Flow3
; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[4:5], 1 ; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[4:5], 1
▲ Show 20 Lines • Show All 56 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: v_mov_b32_e32 v6, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v6, 0
; GCN-IR-NEXT: s_mov_b64 s[10:11], 0 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5] ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
; GCN-IR-NEXT: s_cbranch_execz BB13_5 ; GCN-IR-NEXT: s_cbranch_execz BB13_5
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: v_lshr_b64 v[9:10], v[7:8], v9 ; GCN-IR-NEXT: v_lshr_b64 v[9:10], v[7:8], v9
; GCN-IR-NEXT: v_add_i32_e32 v7, vcc, 0xffffffcf, v0 ; GCN-IR-NEXT: v_add_i32_e32 v7, vcc, 0xffffffcf, v0
; GCN-IR-NEXT: v_mov_b32_e32 v11, 0
; GCN-IR-NEXT: v_addc_u32_e64 v8, s[4:5], 0, -1, vcc ; GCN-IR-NEXT: v_addc_u32_e64 v8, s[4:5], 0, -1, vcc
; GCN-IR-NEXT: v_mov_b32_e32 v11, 0
; GCN-IR-NEXT: v_mov_b32_e32 v12, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v12, 0
; GCN-IR-NEXT: v_mov_b32_e32 v6, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v6, 0
; GCN-IR-NEXT: s_movk_i32 s12, 0x7fff ; GCN-IR-NEXT: s_movk_i32 s12, 0x7fff
; GCN-IR-NEXT: BB13_3: ; %udiv-do-while ; GCN-IR-NEXT: BB13_3: ; %udiv-do-while
; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-IR-NEXT: v_lshl_b64 v[9:10], v[9:10], 1 ; GCN-IR-NEXT: v_lshl_b64 v[9:10], v[9:10], 1
; GCN-IR-NEXT: v_lshrrev_b32_e32 v0, 31, v4 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v0, 31, v4
; GCN-IR-NEXT: v_or_b32_e32 v0, v9, v0 ; GCN-IR-NEXT: v_or_b32_e32 v0, v9, v0
; GCN-IR-NEXT: v_lshl_b64 v[3:4], v[3:4], 1 ; GCN-IR-NEXT: v_lshl_b64 v[3:4], v[3:4], 1
; GCN-IR-NEXT: v_sub_i32_e32 v5, vcc, s12, v0 ; GCN-IR-NEXT: v_sub_i32_e32 v5, vcc, s12, v0
; GCN-IR-NEXT: v_subb_u32_e32 v5, vcc, 0, v10, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v5, vcc, 0, v10, vcc
; GCN-IR-NEXT: v_or_b32_e32 v3, v11, v3 ; GCN-IR-NEXT: v_or_b32_e32 v3, v11, v3
; GCN-IR-NEXT: v_add_i32_e32 v11, vcc, 1, v7 ; GCN-IR-NEXT: v_add_i32_e32 v11, vcc, 1, v7
; GCN-IR-NEXT: v_or_b32_e32 v4, v12, v4 ; GCN-IR-NEXT: v_or_b32_e32 v4, v12, v4
; GCN-IR-NEXT: v_ashrrev_i32_e32 v9, 31, v5 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v9, 31, v5
; GCN-IR-NEXT: v_addc_u32_e32 v12, vcc, 0, v8, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v12, vcc, 0, v8, vcc
; GCN-IR-NEXT: v_and_b32_e32 v5, 1, v9 ; GCN-IR-NEXT: v_and_b32_e32 v5, 1, v9
; GCN-IR-NEXT: v_and_b32_e32 v9, 0x8000, v9 ; GCN-IR-NEXT: v_and_b32_e32 v9, 0x8000, v9
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[11:12], v[7:8] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[11:12], v[7:8]
; GCN-IR-NEXT: v_mov_b32_e32 v7, v11
; GCN-IR-NEXT: v_mov_b32_e32 v13, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v13, 0
; GCN-IR-NEXT: v_sub_i32_e64 v9, s[4:5], v0, v9 ; GCN-IR-NEXT: v_sub_i32_e64 v9, s[4:5], v0, v9
; GCN-IR-NEXT: v_mov_b32_e32 v8, v12
; GCN-IR-NEXT: v_mov_b32_e32 v12, v6
; GCN-IR-NEXT: v_subb_u32_e64 v10, s[4:5], v10, v13, s[4:5] ; GCN-IR-NEXT: v_subb_u32_e64 v10, s[4:5], v10, v13, s[4:5]
; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
; GCN-IR-NEXT: v_mov_b32_e32 v7, v11
; GCN-IR-NEXT: v_mov_b32_e32 v8, v12
; GCN-IR-NEXT: v_mov_b32_e32 v12, v6
; GCN-IR-NEXT: v_mov_b32_e32 v11, v5 ; GCN-IR-NEXT: v_mov_b32_e32 v11, v5
; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: s_cbranch_execnz BB13_3 ; GCN-IR-NEXT: s_cbranch_execnz BB13_3
; GCN-IR-NEXT: ; %bb.4: ; %Flow ; GCN-IR-NEXT: ; %bb.4: ; %Flow
; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: BB13_5: ; %Flow3 ; GCN-IR-NEXT: BB13_5: ; %Flow3
; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
; GCN-IR-NEXT: v_lshl_b64 v[3:4], v[3:4], 1 ; GCN-IR-NEXT: v_lshl_b64 v[3:4], v[3:4], 1
▲ Show 20 Lines • Show All 254 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/select64.ll

Show All 24 Lines
; VI: ; %bb.0: ; %entry ; VI: ; %bb.0: ; %entry
; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; VI-NEXT: s_load_dword s4, s[0:1], 0x2c ; VI-NEXT: s_load_dword s4, s[0:1], 0x2c
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x34
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v0, s2 ; VI-NEXT: v_mov_b32_e32 v0, s2
; VI-NEXT: s_cmp_lt_u32 s4, 6 ; VI-NEXT: s_cmp_lt_u32 s4, 6
; VI-NEXT: s_cselect_b64 s[0:1], s[0:1], 0 ; VI-NEXT: s_cselect_b64 s[0:1], s[0:1], 0
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v1, s3 ; VI-NEXT: v_mov_b32_e32 v1, s3
; VI-NEXT: v_mov_b32_e32 v3, s1
; VI-NEXT: v_mov_b32_e32 v2, s0 ; VI-NEXT: v_mov_b32_e32 v2, s0
; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3] ; VI-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
; ;
; GFX90A-LABEL: select0: ; GFX90A-LABEL: select0:
; GFX90A: ; %bb.0: ; %entry ; GFX90A: ; %bb.0: ; %entry
; GFX90A-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GFX90A-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GFX90A-NEXT: s_load_dword s6, s[0:1], 0x2c ; GFX90A-NEXT: s_load_dword s6, s[0:1], 0x2c
▲ Show 20 Lines • Show All 214 Lines • ▼ Show 20 Lines
; GFX90A-LABEL: v_select_i64_split_imm: ; GFX90A-LABEL: v_select_i64_split_imm:
; GFX90A: ; %bb.0: ; GFX90A: ; %bb.0:
; GFX90A-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24 ; GFX90A-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
; GFX90A-NEXT: s_load_dword s6, s[0:1], 0x2c ; GFX90A-NEXT: s_load_dword s6, s[0:1], 0x2c
; GFX90A-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34 ; GFX90A-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
; GFX90A-NEXT: v_mov_b32_e32 v2, 0 ; GFX90A-NEXT: v_mov_b32_e32 v2, 0
; GFX90A-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0 ; GFX90A-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x0
; GFX90A-NEXT: s_mov_b32 s4, 0
; GFX90A-NEXT: s_cmp_gt_u32 s6, 5 ; GFX90A-NEXT: s_cmp_gt_u32 s6, 5
; GFX90A-NEXT: s_mov_b32 s4, 0
; GFX90A-NEXT: s_mov_b32 s5, 63 ; GFX90A-NEXT: s_mov_b32 s5, 63
; GFX90A-NEXT: s_waitcnt lgkmcnt(0) ; GFX90A-NEXT: s_waitcnt lgkmcnt(0)
; GFX90A-NEXT: s_cselect_b64 s[0:1], s[0:1], s[4:5] ; GFX90A-NEXT: s_cselect_b64 s[0:1], s[0:1], s[4:5]
; GFX90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1] ; GFX90A-NEXT: v_pk_mov_b32 v[0:1], s[0:1], s[0:1] op_sel:[0,1]
; GFX90A-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3] ; GFX90A-NEXT: global_store_dwordx2 v2, v[0:1], s[2:3]
; GFX90A-NEXT: s_endpgm ; GFX90A-NEXT: s_endpgm
%cmp = icmp ugt i32 %cond, 5 %cmp = icmp ugt i32 %cond, 5
%a = load i64, i64 addrspace(1)* %aptr, align 8 %a = load i64, i64 addrspace(1)* %aptr, align 8
%b = load i64, i64 addrspace(1)* %bptr, align 8 %b = load i64, i64 addrspace(1)* %bptr, align 8
%sel = select i1 %cmp, i64 %a, i64 270582939648 ; 63 << 32 %sel = select i1 %cmp, i64 %a, i64 270582939648 ; 63 << 32
store i64 %sel, i64 addrspace(1)* %out, align 8 store i64 %sel, i64 addrspace(1)* %out, align 8
ret void ret void
} }

llvm/test/CodeGen/AMDGPU/sgpr-phys-copy.mir

Show First 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
... ...
--- ---
name: sgpr96_aligned_src_dst name: sgpr96_aligned_src_dst
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2 liveins: $sgpr0_sgpr1_sgpr2
; GFX9-LABEL: name: sgpr96_aligned_src_dst ; GFX9-LABEL: name: sgpr96_aligned_src_dst
; GFX9: $sgpr8 = S_MOV_B32 $sgpr2, implicit $sgpr0_sgpr1_sgpr2, implicit-def $sgpr6_sgpr7_sgpr8 ; GFX9: $sgpr8 = S_MOV_B32 $sgpr2
; GFX9: $sgpr6_sgpr7 = S_MOV_B64 $sgpr0_sgpr1, implicit $sgpr0_sgpr1_sgpr2 ; GFX9: $sgpr6_sgpr7 = S_MOV_B64 $sgpr0_sgpr1
$sgpr6_sgpr7_sgpr8 = COPY $sgpr0_sgpr1_sgpr2 $sgpr6_sgpr7_sgpr8 = COPY $sgpr0_sgpr1_sgpr2
... ...
--- ---
name: sgpr96_aligned_src name: sgpr96_aligned_src
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2 liveins: $sgpr0_sgpr1_sgpr2
; GFX9-LABEL: name: sgpr96_aligned_src ; GFX9-LABEL: name: sgpr96_aligned_src
; GFX9: $sgpr5 = S_MOV_B32 $sgpr2, implicit $sgpr0_sgpr1_sgpr2, implicit-def $sgpr3_sgpr4_sgpr5 ; GFX9: $sgpr5 = S_MOV_B32 $sgpr2
; GFX9: $sgpr4 = S_MOV_B32 $sgpr1, implicit $sgpr0_sgpr1_sgpr2 ; GFX9: $sgpr4 = S_MOV_B32 $sgpr1
; GFX9: $sgpr3 = S_MOV_B32 $sgpr0, implicit $sgpr0_sgpr1_sgpr2 ; GFX9: $sgpr3 = S_MOV_B32 $sgpr0
$sgpr3_sgpr4_sgpr5 = COPY $sgpr0_sgpr1_sgpr2 $sgpr3_sgpr4_sgpr5 = COPY $sgpr0_sgpr1_sgpr2
... ...
--- ---
name: sgpr96_aligned_dst name: sgpr96_aligned_dst
body: | body: |
bb.0: bb.0:
liveins: $sgpr3_sgpr4_sgpr5 liveins: $sgpr3_sgpr4_sgpr5
; GFX9-LABEL: name: sgpr96_aligned_dst ; GFX9-LABEL: name: sgpr96_aligned_dst
; GFX9: $sgpr0 = S_MOV_B32 $sgpr3, implicit $sgpr3_sgpr4_sgpr5, implicit-def $sgpr0_sgpr1_sgpr2 ; GFX9: $sgpr0 = S_MOV_B32 $sgpr3
; GFX9: $sgpr1 = S_MOV_B32 $sgpr4, implicit $sgpr3_sgpr4_sgpr5 ; GFX9: $sgpr1 = S_MOV_B32 $sgpr4
; GFX9: $sgpr2 = S_MOV_B32 $sgpr5, implicit $sgpr3_sgpr4_sgpr5 ; GFX9: $sgpr2 = S_MOV_B32 $sgpr5
$sgpr0_sgpr1_sgpr2 = COPY $sgpr3_sgpr4_sgpr5 $sgpr0_sgpr1_sgpr2 = COPY $sgpr3_sgpr4_sgpr5
... ...
--- ---
name: sgpr96_unaligned_src_dst name: sgpr96_unaligned_src_dst
body: | body: |
bb.0: bb.0:
liveins: $sgpr3_sgpr4_sgpr5 liveins: $sgpr3_sgpr4_sgpr5
; GFX9-LABEL: name: sgpr96_unaligned_src_dst ; GFX9-LABEL: name: sgpr96_unaligned_src_dst
; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr4_sgpr5, implicit $sgpr3_sgpr4_sgpr5, implicit-def $sgpr9_sgpr10_sgpr11 ; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr4_sgpr5
; GFX9: $sgpr9 = S_MOV_B32 $sgpr3, implicit $sgpr3_sgpr4_sgpr5 ; GFX9: $sgpr9 = S_MOV_B32 $sgpr3
$sgpr9_sgpr10_sgpr11 = COPY $sgpr3_sgpr4_sgpr5 $sgpr9_sgpr10_sgpr11 = COPY $sgpr3_sgpr4_sgpr5
... ...
--- ---
name: sgpr96_killed name: sgpr96_killed
body: | body: |
bb.0: bb.0:
liveins: $sgpr3_sgpr4_sgpr5 liveins: $sgpr3_sgpr4_sgpr5
; GFX9-LABEL: name: sgpr96_killed ; GFX9-LABEL: name: sgpr96_killed
; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr4_sgpr5, implicit $sgpr3_sgpr4_sgpr5, implicit-def $sgpr9_sgpr10_sgpr11 ; GFX9: $sgpr10_sgpr11 = S_MOV_B64 killed $sgpr4_sgpr5
; GFX9: $sgpr9 = S_MOV_B32 $sgpr3, implicit killed $sgpr3_sgpr4_sgpr5 ; GFX9: $sgpr9 = S_MOV_B32 killed $sgpr3
$sgpr9_sgpr10_sgpr11 = COPY killed $sgpr3_sgpr4_sgpr5 $sgpr9_sgpr10_sgpr11 = COPY killed $sgpr3_sgpr4_sgpr5
... ...
--- ---
name: sgpr128_forward name: sgpr128_forward
body: | body: |
bb.0: bb.0:
liveins: $sgpr4_sgpr5_sgpr6_sgpr7 liveins: $sgpr4_sgpr5_sgpr6_sgpr7
; GFX9-LABEL: name: sgpr128_forward ; GFX9-LABEL: name: sgpr128_forward
; GFX9: $sgpr0_sgpr1 = S_MOV_B64 $sgpr4_sgpr5, implicit $sgpr4_sgpr5_sgpr6_sgpr7, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX9: $sgpr0_sgpr1 = S_MOV_B64 $sgpr4_sgpr5
; GFX9: $sgpr2_sgpr3 = S_MOV_B64 $sgpr6_sgpr7, implicit $sgpr4_sgpr5_sgpr6_sgpr7 ; GFX9: $sgpr2_sgpr3 = S_MOV_B64 $sgpr6_sgpr7
$sgpr0_sgpr1_sgpr2_sgpr3 = COPY $sgpr4_sgpr5_sgpr6_sgpr7 $sgpr0_sgpr1_sgpr2_sgpr3 = COPY $sgpr4_sgpr5_sgpr6_sgpr7
... ...
--- ---
name: sgpr128_backward name: sgpr128_backward
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2_sgpr3 liveins: $sgpr0_sgpr1_sgpr2_sgpr3
; GFX9-LABEL: name: sgpr128_backward ; GFX9-LABEL: name: sgpr128_backward
; GFX9: $sgpr6_sgpr7 = S_MOV_B64 $sgpr2_sgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3, implicit-def $sgpr4_sgpr5_sgpr6_sgpr7 ; GFX9: $sgpr6_sgpr7 = S_MOV_B64 $sgpr2_sgpr3
; GFX9: $sgpr4_sgpr5 = S_MOV_B64 $sgpr0_sgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX9: $sgpr4_sgpr5 = S_MOV_B64 $sgpr0_sgpr1
$sgpr4_sgpr5_sgpr6_sgpr7 = COPY $sgpr0_sgpr1_sgpr2_sgpr3 $sgpr4_sgpr5_sgpr6_sgpr7 = COPY $sgpr0_sgpr1_sgpr2_sgpr3
... ...
--- ---
name: sgpr128_killed name: sgpr128_killed
body: | body: |
bb.0: bb.0:
liveins: $sgpr4_sgpr5_sgpr6_sgpr7 liveins: $sgpr4_sgpr5_sgpr6_sgpr7
; GFX9-LABEL: name: sgpr128_killed ; GFX9-LABEL: name: sgpr128_killed
; GFX9: $sgpr0_sgpr1 = S_MOV_B64 $sgpr4_sgpr5, implicit $sgpr4_sgpr5_sgpr6_sgpr7, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3 ; GFX9: $sgpr0_sgpr1 = S_MOV_B64 killed $sgpr4_sgpr5
; GFX9: $sgpr2_sgpr3 = S_MOV_B64 $sgpr6_sgpr7, implicit killed $sgpr4_sgpr5_sgpr6_sgpr7 ; GFX9: $sgpr2_sgpr3 = S_MOV_B64 killed $sgpr6_sgpr7
$sgpr0_sgpr1_sgpr2_sgpr3 = COPY killed $sgpr4_sgpr5_sgpr6_sgpr7 $sgpr0_sgpr1_sgpr2_sgpr3 = COPY killed $sgpr4_sgpr5_sgpr6_sgpr7
... ...
--- ---
name: sgpr160_forward name: sgpr160_forward
body: | body: |
bb.0: bb.0:
liveins: $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12 liveins: $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12
; GFX9-LABEL: name: sgpr160_forward ; GFX9-LABEL: name: sgpr160_forward
; GFX9: $sgpr0_sgpr1 = S_MOV_B64 $sgpr8_sgpr9, implicit $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4 ; GFX9: $sgpr0_sgpr1 = S_MOV_B64 $sgpr8_sgpr9
; GFX9: $sgpr2_sgpr3 = S_MOV_B64 $sgpr10_sgpr11, implicit $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12 ; GFX9: $sgpr2_sgpr3 = S_MOV_B64 $sgpr10_sgpr11
; GFX9: $sgpr4 = S_MOV_B32 $sgpr12, implicit $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12 ; GFX9: $sgpr4 = S_MOV_B32 $sgpr12
$sgpr0_sgpr1_sgpr2_sgpr3_sgpr4 = COPY $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12 $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4 = COPY $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12
... ...
--- ---
name: sgpr160_backward name: sgpr160_backward
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4
; GFX9-LABEL: name: sgpr160_backward ; GFX9-LABEL: name: sgpr160_backward
; GFX9: $sgpr12 = S_MOV_B32 $sgpr4, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12 ; GFX9: $sgpr12 = S_MOV_B32 $sgpr4
; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr2_sgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4 ; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr2_sgpr3
; GFX9: $sgpr8_sgpr9 = S_MOV_B64 $sgpr0_sgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4 ; GFX9: $sgpr8_sgpr9 = S_MOV_B64 $sgpr0_sgpr1
$sgpr8_sgpr9_sgpr10_sgpr11_sgpr12 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4 $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4
... ...
--- ---
name: sgpr160_killed name: sgpr160_killed
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4
; GFX9-LABEL: name: sgpr160_killed ; GFX9-LABEL: name: sgpr160_killed
; GFX9: $sgpr12 = S_MOV_B32 $sgpr4, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12 ; GFX9: $sgpr12 = S_MOV_B32 killed $sgpr4
; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr2_sgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4 ; GFX9: $sgpr10_sgpr11 = S_MOV_B64 killed $sgpr2_sgpr3
; GFX9: $sgpr8_sgpr9 = S_MOV_B64 $sgpr0_sgpr1, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4 ; GFX9: $sgpr8_sgpr9 = S_MOV_B64 killed $sgpr0_sgpr1
$sgpr8_sgpr9_sgpr10_sgpr11_sgpr12 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4 $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4
... ...
--- ---
name: sgpr192_forward name: sgpr192_forward
body: | body: |
bb.0: bb.0:
liveins: $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13 liveins: $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13
; GFX9-LABEL: name: sgpr192_forward ; GFX9-LABEL: name: sgpr192_forward
; GFX9: $sgpr0_sgpr1 = S_MOV_B64 $sgpr8_sgpr9, implicit $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX9: $sgpr0_sgpr1 = S_MOV_B64 $sgpr8_sgpr9
; GFX9: $sgpr2_sgpr3 = S_MOV_B64 $sgpr10_sgpr11, implicit $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13 ; GFX9: $sgpr2_sgpr3 = S_MOV_B64 $sgpr10_sgpr11
; GFX9: $sgpr4_sgpr5 = S_MOV_B64 $sgpr12_sgpr13, implicit $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13 ; GFX9: $sgpr4_sgpr5 = S_MOV_B64 $sgpr12_sgpr13
$sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 = COPY $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13 $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 = COPY $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13
... ...
--- ---
name: sgpr192_backward name: sgpr192_backward
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5
; GFX9-LABEL: name: sgpr192_backward ; GFX9-LABEL: name: sgpr192_backward
; GFX9: $sgpr12_sgpr13 = S_MOV_B64 $sgpr4_sgpr5, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13 ; GFX9: $sgpr12_sgpr13 = S_MOV_B64 $sgpr4_sgpr5
; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr2_sgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr2_sgpr3
; GFX9: $sgpr8_sgpr9 = S_MOV_B64 $sgpr0_sgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX9: $sgpr8_sgpr9 = S_MOV_B64 $sgpr0_sgpr1
$sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5
... ...
--- ---
name: sgpr192_killed name: sgpr192_killed
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5
; GFX9-LABEL: name: sgpr192_killed ; GFX9-LABEL: name: sgpr192_killed
; GFX9: $sgpr12_sgpr13 = S_MOV_B64 $sgpr4_sgpr5, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13 ; GFX9: $sgpr12_sgpr13 = S_MOV_B64 killed $sgpr4_sgpr5
; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr2_sgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX9: $sgpr10_sgpr11 = S_MOV_B64 killed $sgpr2_sgpr3
; GFX9: $sgpr8_sgpr9 = S_MOV_B64 $sgpr0_sgpr1, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 ; GFX9: $sgpr8_sgpr9 = S_MOV_B64 killed $sgpr0_sgpr1
$sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5 $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5
... ...
--- ---
name: sgpr256_forward name: sgpr256_forward
body: | body: |
bb.0: bb.0:
liveins: $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 liveins: $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX9-LABEL: name: sgpr256_forward ; GFX9-LABEL: name: sgpr256_forward
; GFX9: $sgpr0_sgpr1 = S_MOV_B64 $sgpr8_sgpr9, implicit $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX9: $sgpr0_sgpr1 = S_MOV_B64 $sgpr8_sgpr9
; GFX9: $sgpr2_sgpr3 = S_MOV_B64 $sgpr10_sgpr11, implicit $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr2_sgpr3 = S_MOV_B64 $sgpr10_sgpr11
; GFX9: $sgpr4_sgpr5 = S_MOV_B64 $sgpr12_sgpr13, implicit $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr4_sgpr5 = S_MOV_B64 $sgpr12_sgpr13
; GFX9: $sgpr6_sgpr7 = S_MOV_B64 $sgpr14_sgpr15, implicit $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr6_sgpr7 = S_MOV_B64 $sgpr14_sgpr15
$sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 = COPY $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 = COPY $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
... ...
--- ---
name: sgpr256_backward name: sgpr256_backward
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX9-LABEL: name: sgpr256_backward ; GFX9-LABEL: name: sgpr256_backward
; GFX9: $sgpr14_sgpr15 = S_MOV_B64 $sgpr6_sgpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr14_sgpr15 = S_MOV_B64 $sgpr6_sgpr7
; GFX9: $sgpr12_sgpr13 = S_MOV_B64 $sgpr4_sgpr5, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX9: $sgpr12_sgpr13 = S_MOV_B64 $sgpr4_sgpr5
; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr2_sgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr2_sgpr3
; GFX9: $sgpr8_sgpr9 = S_MOV_B64 $sgpr0_sgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX9: $sgpr8_sgpr9 = S_MOV_B64 $sgpr0_sgpr1
$sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
... ...
--- ---
name: sgpr256_killed name: sgpr256_killed
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
; GFX9-LABEL: name: sgpr256_killed ; GFX9-LABEL: name: sgpr256_killed
; GFX9: $sgpr14_sgpr15 = S_MOV_B64 $sgpr6_sgpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7, implicit-def $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr14_sgpr15 = S_MOV_B64 killed $sgpr6_sgpr7
; GFX9: $sgpr12_sgpr13 = S_MOV_B64 $sgpr4_sgpr5, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX9: $sgpr12_sgpr13 = S_MOV_B64 killed $sgpr4_sgpr5
; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr2_sgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX9: $sgpr10_sgpr11 = S_MOV_B64 killed $sgpr2_sgpr3
; GFX9: $sgpr8_sgpr9 = S_MOV_B64 $sgpr0_sgpr1, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 ; GFX9: $sgpr8_sgpr9 = S_MOV_B64 killed $sgpr0_sgpr1
$sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7 $sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7
... ...
--- ---
name: sgpr512_forward name: sgpr512_forward
body: | body: |
bb.0: bb.0:
liveins: $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 liveins: $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31
; GFX9-LABEL: name: sgpr512_forward ; GFX9-LABEL: name: sgpr512_forward
; GFX9: $sgpr0_sgpr1 = S_MOV_B64 $sgpr16_sgpr17, implicit $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr0_sgpr1 = S_MOV_B64 $sgpr16_sgpr17
; GFX9: $sgpr2_sgpr3 = S_MOV_B64 $sgpr18_sgpr19, implicit $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr2_sgpr3 = S_MOV_B64 $sgpr18_sgpr19
; GFX9: $sgpr4_sgpr5 = S_MOV_B64 $sgpr20_sgpr21, implicit $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr4_sgpr5 = S_MOV_B64 $sgpr20_sgpr21
; GFX9: $sgpr6_sgpr7 = S_MOV_B64 $sgpr22_sgpr23, implicit $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr6_sgpr7 = S_MOV_B64 $sgpr22_sgpr23
; GFX9: $sgpr8_sgpr9 = S_MOV_B64 $sgpr24_sgpr25, implicit $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr8_sgpr9 = S_MOV_B64 $sgpr24_sgpr25
; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr26_sgpr27, implicit $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr26_sgpr27
; GFX9: $sgpr12_sgpr13 = S_MOV_B64 $sgpr28_sgpr29, implicit $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr12_sgpr13 = S_MOV_B64 $sgpr28_sgpr29
; GFX9: $sgpr14_sgpr15 = S_MOV_B64 $sgpr30_sgpr31, implicit $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr14_sgpr15 = S_MOV_B64 $sgpr30_sgpr31
$sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 = COPY $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 = COPY $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31
... ...
--- ---
name: sgpr512_backward name: sgpr512_backward
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX9-LABEL: name: sgpr512_backward ; GFX9-LABEL: name: sgpr512_backward
; GFX9: $sgpr30_sgpr31 = S_MOV_B64 $sgpr14_sgpr15, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15, implicit-def $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr30_sgpr31 = S_MOV_B64 $sgpr14_sgpr15
; GFX9: $sgpr28_sgpr29 = S_MOV_B64 $sgpr12_sgpr13, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr28_sgpr29 = S_MOV_B64 $sgpr12_sgpr13
; GFX9: $sgpr26_sgpr27 = S_MOV_B64 $sgpr10_sgpr11, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr26_sgpr27 = S_MOV_B64 $sgpr10_sgpr11
; GFX9: $sgpr24_sgpr25 = S_MOV_B64 $sgpr8_sgpr9, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr24_sgpr25 = S_MOV_B64 $sgpr8_sgpr9
; GFX9: $sgpr22_sgpr23 = S_MOV_B64 $sgpr6_sgpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr22_sgpr23 = S_MOV_B64 $sgpr6_sgpr7
; GFX9: $sgpr20_sgpr21 = S_MOV_B64 $sgpr4_sgpr5, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr20_sgpr21 = S_MOV_B64 $sgpr4_sgpr5
; GFX9: $sgpr18_sgpr19 = S_MOV_B64 $sgpr2_sgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr18_sgpr19 = S_MOV_B64 $sgpr2_sgpr3
; GFX9: $sgpr16_sgpr17 = S_MOV_B64 $sgpr0_sgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr16_sgpr17 = S_MOV_B64 $sgpr0_sgpr1
$sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
... ...
--- ---
name: sgpr512_killed name: sgpr512_killed
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
; GFX9-LABEL: name: sgpr512_killed ; GFX9-LABEL: name: sgpr512_killed
; GFX9: $sgpr30_sgpr31 = S_MOV_B64 $sgpr14_sgpr15, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15, implicit-def $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr30_sgpr31 = S_MOV_B64 killed $sgpr14_sgpr15
; GFX9: $sgpr28_sgpr29 = S_MOV_B64 $sgpr12_sgpr13, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr28_sgpr29 = S_MOV_B64 killed $sgpr12_sgpr13
; GFX9: $sgpr26_sgpr27 = S_MOV_B64 $sgpr10_sgpr11, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr26_sgpr27 = S_MOV_B64 killed $sgpr10_sgpr11
; GFX9: $sgpr24_sgpr25 = S_MOV_B64 $sgpr8_sgpr9, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr24_sgpr25 = S_MOV_B64 killed $sgpr8_sgpr9
; GFX9: $sgpr22_sgpr23 = S_MOV_B64 $sgpr6_sgpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr22_sgpr23 = S_MOV_B64 killed $sgpr6_sgpr7
; GFX9: $sgpr20_sgpr21 = S_MOV_B64 $sgpr4_sgpr5, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr20_sgpr21 = S_MOV_B64 killed $sgpr4_sgpr5
; GFX9: $sgpr18_sgpr19 = S_MOV_B64 $sgpr2_sgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr18_sgpr19 = S_MOV_B64 killed $sgpr2_sgpr3
; GFX9: $sgpr16_sgpr17 = S_MOV_B64 $sgpr0_sgpr1, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 ; GFX9: $sgpr16_sgpr17 = S_MOV_B64 killed $sgpr0_sgpr1
$sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15 $sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15
... ...
--- ---
name: sgpr1024_forward name: sgpr1024_forward
body: | body: |
bb.0: bb.0:
liveins: $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 liveins: $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63
; GFX9-LABEL: name: sgpr1024_forward ; GFX9-LABEL: name: sgpr1024_forward
; GFX9: $sgpr0_sgpr1 = S_MOV_B64 $sgpr32_sgpr33, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63, implicit-def $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr0_sgpr1 = S_MOV_B64 $sgpr32_sgpr33
; GFX9: $sgpr2_sgpr3 = S_MOV_B64 $sgpr34_sgpr35, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr2_sgpr3 = S_MOV_B64 $sgpr34_sgpr35
; GFX9: $sgpr4_sgpr5 = S_MOV_B64 $sgpr36_sgpr37, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr4_sgpr5 = S_MOV_B64 $sgpr36_sgpr37
; GFX9: $sgpr6_sgpr7 = S_MOV_B64 $sgpr38_sgpr39, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr6_sgpr7 = S_MOV_B64 $sgpr38_sgpr39
; GFX9: $sgpr8_sgpr9 = S_MOV_B64 $sgpr40_sgpr41, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr8_sgpr9 = S_MOV_B64 $sgpr40_sgpr41
; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr42_sgpr43, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr10_sgpr11 = S_MOV_B64 $sgpr42_sgpr43
; GFX9: $sgpr12_sgpr13 = S_MOV_B64 $sgpr44_sgpr45, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr12_sgpr13 = S_MOV_B64 $sgpr44_sgpr45
; GFX9: $sgpr14_sgpr15 = S_MOV_B64 $sgpr46_sgpr47, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr14_sgpr15 = S_MOV_B64 $sgpr46_sgpr47
; GFX9: $sgpr16_sgpr17 = S_MOV_B64 $sgpr48_sgpr49, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr16_sgpr17 = S_MOV_B64 $sgpr48_sgpr49
; GFX9: $sgpr18_sgpr19 = S_MOV_B64 $sgpr50_sgpr51, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr18_sgpr19 = S_MOV_B64 $sgpr50_sgpr51
; GFX9: $sgpr20_sgpr21 = S_MOV_B64 $sgpr52_sgpr53, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr20_sgpr21 = S_MOV_B64 $sgpr52_sgpr53
; GFX9: $sgpr22_sgpr23 = S_MOV_B64 $sgpr54_sgpr55, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr22_sgpr23 = S_MOV_B64 $sgpr54_sgpr55
; GFX9: $sgpr24_sgpr25 = S_MOV_B64 $sgpr56_sgpr57, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr24_sgpr25 = S_MOV_B64 $sgpr56_sgpr57
; GFX9: $sgpr26_sgpr27 = S_MOV_B64 $sgpr58_sgpr59, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr26_sgpr27 = S_MOV_B64 $sgpr58_sgpr59
; GFX9: $sgpr28_sgpr29 = S_MOV_B64 $sgpr60_sgpr61, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr28_sgpr29 = S_MOV_B64 $sgpr60_sgpr61
; GFX9: $sgpr30_sgpr31 = S_MOV_B64 $sgpr62_sgpr63, implicit $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr30_sgpr31 = S_MOV_B64 $sgpr62_sgpr63
$sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 = COPY $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 = COPY $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63
... ...
--- ---
name: sgpr1024_backward name: sgpr1024_backward
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31
; GFX9-LABEL: name: sgpr1024_backward ; GFX9-LABEL: name: sgpr1024_backward
; GFX9: $sgpr62_sgpr63 = S_MOV_B64 $sgpr30_sgpr31, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31, implicit-def $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr62_sgpr63 = S_MOV_B64 $sgpr30_sgpr31
; GFX9: $sgpr60_sgpr61 = S_MOV_B64 $sgpr28_sgpr29, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr60_sgpr61 = S_MOV_B64 $sgpr28_sgpr29
; GFX9: $sgpr58_sgpr59 = S_MOV_B64 $sgpr26_sgpr27, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr58_sgpr59 = S_MOV_B64 $sgpr26_sgpr27
; GFX9: $sgpr56_sgpr57 = S_MOV_B64 $sgpr24_sgpr25, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr56_sgpr57 = S_MOV_B64 $sgpr24_sgpr25
; GFX9: $sgpr54_sgpr55 = S_MOV_B64 $sgpr22_sgpr23, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr54_sgpr55 = S_MOV_B64 $sgpr22_sgpr23
; GFX9: $sgpr52_sgpr53 = S_MOV_B64 $sgpr20_sgpr21, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr52_sgpr53 = S_MOV_B64 $sgpr20_sgpr21
; GFX9: $sgpr50_sgpr51 = S_MOV_B64 $sgpr18_sgpr19, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr50_sgpr51 = S_MOV_B64 $sgpr18_sgpr19
; GFX9: $sgpr48_sgpr49 = S_MOV_B64 $sgpr16_sgpr17, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr48_sgpr49 = S_MOV_B64 $sgpr16_sgpr17
; GFX9: $sgpr46_sgpr47 = S_MOV_B64 $sgpr14_sgpr15, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr46_sgpr47 = S_MOV_B64 $sgpr14_sgpr15
; GFX9: $sgpr44_sgpr45 = S_MOV_B64 $sgpr12_sgpr13, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr44_sgpr45 = S_MOV_B64 $sgpr12_sgpr13
; GFX9: $sgpr42_sgpr43 = S_MOV_B64 $sgpr10_sgpr11, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr42_sgpr43 = S_MOV_B64 $sgpr10_sgpr11
; GFX9: $sgpr40_sgpr41 = S_MOV_B64 $sgpr8_sgpr9, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr40_sgpr41 = S_MOV_B64 $sgpr8_sgpr9
; GFX9: $sgpr38_sgpr39 = S_MOV_B64 $sgpr6_sgpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr38_sgpr39 = S_MOV_B64 $sgpr6_sgpr7
; GFX9: $sgpr36_sgpr37 = S_MOV_B64 $sgpr4_sgpr5, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr36_sgpr37 = S_MOV_B64 $sgpr4_sgpr5
; GFX9: $sgpr34_sgpr35 = S_MOV_B64 $sgpr2_sgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr34_sgpr35 = S_MOV_B64 $sgpr2_sgpr3
; GFX9: $sgpr32_sgpr33 = S_MOV_B64 $sgpr0_sgpr1, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr32_sgpr33 = S_MOV_B64 $sgpr0_sgpr1
$sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 = COPY $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31
... ...
--- ---
name: sgpr1024_killed name: sgpr1024_killed
body: | body: |
bb.0: bb.0:
liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 liveins: $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31
; GFX9-LABEL: name: sgpr1024_killed ; GFX9-LABEL: name: sgpr1024_killed
; GFX9: $sgpr62_sgpr63 = S_MOV_B64 $sgpr30_sgpr31, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31, implicit-def $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 ; GFX9: $sgpr62_sgpr63 = S_MOV_B64 killed $sgpr30_sgpr31
; GFX9: $sgpr60_sgpr61 = S_MOV_B64 $sgpr28_sgpr29, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr60_sgpr61 = S_MOV_B64 killed $sgpr28_sgpr29
; GFX9: $sgpr58_sgpr59 = S_MOV_B64 $sgpr26_sgpr27, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr58_sgpr59 = S_MOV_B64 killed $sgpr26_sgpr27
; GFX9: $sgpr56_sgpr57 = S_MOV_B64 $sgpr24_sgpr25, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr56_sgpr57 = S_MOV_B64 killed $sgpr24_sgpr25
; GFX9: $sgpr54_sgpr55 = S_MOV_B64 $sgpr22_sgpr23, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr54_sgpr55 = S_MOV_B64 killed $sgpr22_sgpr23
; GFX9: $sgpr52_sgpr53 = S_MOV_B64 $sgpr20_sgpr21, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr52_sgpr53 = S_MOV_B64 killed $sgpr20_sgpr21
; GFX9: $sgpr50_sgpr51 = S_MOV_B64 $sgpr18_sgpr19, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr50_sgpr51 = S_MOV_B64 killed $sgpr18_sgpr19
; GFX9: $sgpr48_sgpr49 = S_MOV_B64 $sgpr16_sgpr17, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr48_sgpr49 = S_MOV_B64 killed $sgpr16_sgpr17
; GFX9: $sgpr46_sgpr47 = S_MOV_B64 $sgpr14_sgpr15, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr46_sgpr47 = S_MOV_B64 killed $sgpr14_sgpr15
; GFX9: $sgpr44_sgpr45 = S_MOV_B64 $sgpr12_sgpr13, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr44_sgpr45 = S_MOV_B64 killed $sgpr12_sgpr13
; GFX9: $sgpr42_sgpr43 = S_MOV_B64 $sgpr10_sgpr11, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr42_sgpr43 = S_MOV_B64 killed $sgpr10_sgpr11
; GFX9: $sgpr40_sgpr41 = S_MOV_B64 $sgpr8_sgpr9, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr40_sgpr41 = S_MOV_B64 killed $sgpr8_sgpr9
; GFX9: $sgpr38_sgpr39 = S_MOV_B64 $sgpr6_sgpr7, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr38_sgpr39 = S_MOV_B64 killed $sgpr6_sgpr7
; GFX9: $sgpr36_sgpr37 = S_MOV_B64 $sgpr4_sgpr5, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr36_sgpr37 = S_MOV_B64 killed $sgpr4_sgpr5
; GFX9: $sgpr34_sgpr35 = S_MOV_B64 $sgpr2_sgpr3, implicit $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr34_sgpr35 = S_MOV_B64 killed $sgpr2_sgpr3
; GFX9: $sgpr32_sgpr33 = S_MOV_B64 $sgpr0_sgpr1, implicit killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 ; GFX9: $sgpr32_sgpr33 = S_MOV_B64 killed $sgpr0_sgpr1
$sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31 $sgpr32_sgpr33_sgpr34_sgpr35_sgpr36_sgpr37_sgpr38_sgpr39_sgpr40_sgpr41_sgpr42_sgpr43_sgpr44_sgpr45_sgpr46_sgpr47_sgpr48_sgpr49_sgpr50_sgpr51_sgpr52_sgpr53_sgpr54_sgpr55_sgpr56_sgpr57_sgpr58_sgpr59_sgpr60_sgpr61_sgpr62_sgpr63 = COPY killed $sgpr0_sgpr1_sgpr2_sgpr3_sgpr4_sgpr5_sgpr6_sgpr7_sgpr8_sgpr9_sgpr10_sgpr11_sgpr12_sgpr13_sgpr14_sgpr15_sgpr16_sgpr17_sgpr18_sgpr19_sgpr20_sgpr21_sgpr22_sgpr23_sgpr24_sgpr25_sgpr26_sgpr27_sgpr28_sgpr29_sgpr30_sgpr31
... ...

llvm/test/CodeGen/AMDGPU/shift-i128.ll

Show First 20 Lines • Show All 256 Lines • ▼ Show 20 Lines; GCN-NEXT: s_endpgm
store i128 %shift, i128 addrspace(1)* null store i128 %shift, i128 addrspace(1)* null
ret void ret void
} }
define amdgpu_kernel void @s_ashr_i128_ss(i128 %lhs, i128 %rhs) { define amdgpu_kernel void @s_ashr_i128_ss(i128 %lhs, i128 %rhs) {
; GCN-LABEL: s_ashr_i128_ss: ; GCN-LABEL: s_ashr_i128_ss:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx8 s[4:11], s[4:5], 0x0 ; GCN-NEXT: s_load_dwordx8 s[4:11], s[4:5], 0x0
; GCN-NEXT: v_mov_b32_e32 v5, 0
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_ashr_i32 s2, s7, 31 ; GCN-NEXT: s_ashr_i32 s2, s7, 31
; GCN-NEXT: s_ashr_i64 s[0:1], s[6:7], s8 ; GCN-NEXT: s_ashr_i64 s[0:1], s[6:7], s8
; GCN-NEXT: s_cmp_lt_u32 s8, 64 ; GCN-NEXT: s_cmp_lt_u32 s8, 64
; GCN-NEXT: v_mov_b32_e32 v0, s2 ; GCN-NEXT: v_mov_b32_e32 v0, s2
; GCN-NEXT: v_mov_b32_e32 v1, s1 ; GCN-NEXT: v_mov_b32_e32 v1, s1
; GCN-NEXT: s_cselect_b64 vcc, -1, 0 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
; GCN-NEXT: v_cndmask_b32_e32 v3, v0, v1, vcc ; GCN-NEXT: v_cndmask_b32_e32 v3, v0, v1, vcc
Show All 12 Lines
; GCN-NEXT: v_mov_b32_e32 v1, s5 ; GCN-NEXT: v_mov_b32_e32 v1, s5
; GCN-NEXT: s_cselect_b64 s[0:1], -1, 0 ; GCN-NEXT: s_cselect_b64 s[0:1], -1, 0
; GCN-NEXT: v_cndmask_b32_e64 v1, v0, v1, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v1, v0, v1, s[0:1]
; GCN-NEXT: v_mov_b32_e32 v0, s2 ; GCN-NEXT: v_mov_b32_e32 v0, s2
; GCN-NEXT: v_mov_b32_e32 v4, s6 ; GCN-NEXT: v_mov_b32_e32 v4, s6
; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc ; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc
; GCN-NEXT: v_mov_b32_e32 v6, s4 ; GCN-NEXT: v_mov_b32_e32 v6, s4
; GCN-NEXT: v_mov_b32_e32 v4, 0 ; GCN-NEXT: v_mov_b32_e32 v4, 0
; GCN-NEXT: v_mov_b32_e32 v5, 0
; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v6, s[0:1] ; GCN-NEXT: v_cndmask_b32_e64 v0, v0, v6, s[0:1]
; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GCN-NEXT: s_endpgm ; GCN-NEXT: s_endpgm
%shift = ashr i128 %lhs, %rhs %shift = ashr i128 %lhs, %rhs
store i128 %shift, i128 addrspace(1)* null store i128 %shift, i128 addrspace(1)* null
ret void ret void
} }
▲ Show 20 Lines • Show All 147 Lines • ▼ Show 20 Lines
} }
define amdgpu_kernel void @s_shl_v2i128ss(<2 x i128> %lhs, <2 x i128> %rhs) { define amdgpu_kernel void @s_shl_v2i128ss(<2 x i128> %lhs, <2 x i128> %rhs) {
; GCN-LABEL: s_shl_v2i128ss: ; GCN-LABEL: s_shl_v2i128ss:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x8 ; GCN-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x8
; GCN-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x0 ; GCN-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x0
; GCN-NEXT: v_mov_b32_e32 v10, 16 ; GCN-NEXT: v_mov_b32_e32 v10, 16
; GCN-NEXT: v_mov_b32_e32 v8, 0
; GCN-NEXT: v_mov_b32_e32 v11, 0 ; GCN-NEXT: v_mov_b32_e32 v11, 0
; GCN-NEXT: v_mov_b32_e32 v8, 0
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_cmp_lt_u64_e64 s[0:1], s[16:17], 64 ; GCN-NEXT: v_cmp_lt_u64_e64 s[0:1], s[16:17], 64
; GCN-NEXT: v_cmp_eq_u64_e64 s[2:3], s[18:19], 0 ; GCN-NEXT: v_cmp_eq_u64_e64 s[2:3], s[18:19], 0
; GCN-NEXT: s_sub_i32 s6, 64, s16 ; GCN-NEXT: s_sub_i32 s6, 64, s16
; GCN-NEXT: s_sub_i32 s4, s16, 64 ; GCN-NEXT: s_sub_i32 s4, s16, 64
; GCN-NEXT: s_lshr_b64 s[6:7], s[8:9], s6 ; GCN-NEXT: s_lshr_b64 s[6:7], s[8:9], s6
; GCN-NEXT: s_lshl_b64 s[24:25], s[10:11], s16 ; GCN-NEXT: s_lshl_b64 s[24:25], s[10:11], s16
; GCN-NEXT: s_lshl_b64 s[4:5], s[8:9], s4 ; GCN-NEXT: s_lshl_b64 s[4:5], s[8:9], s4
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} }
define amdgpu_kernel void @s_lshr_v2i128_ss(<2 x i128> %lhs, <2 x i128> %rhs) { define amdgpu_kernel void @s_lshr_v2i128_ss(<2 x i128> %lhs, <2 x i128> %rhs) {
; GCN-LABEL: s_lshr_v2i128_ss: ; GCN-LABEL: s_lshr_v2i128_ss:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x8 ; GCN-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x8
; GCN-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x0 ; GCN-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x0
; GCN-NEXT: v_mov_b32_e32 v10, 16 ; GCN-NEXT: v_mov_b32_e32 v10, 16
; GCN-NEXT: v_mov_b32_e32 v8, 0
; GCN-NEXT: v_mov_b32_e32 v11, 0 ; GCN-NEXT: v_mov_b32_e32 v11, 0
; GCN-NEXT: v_mov_b32_e32 v8, 0
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_cmp_lt_u64_e64 s[0:1], s[16:17], 64 ; GCN-NEXT: v_cmp_lt_u64_e64 s[0:1], s[16:17], 64
; GCN-NEXT: v_cmp_eq_u64_e64 s[2:3], s[18:19], 0 ; GCN-NEXT: v_cmp_eq_u64_e64 s[2:3], s[18:19], 0
; GCN-NEXT: s_sub_i32 s6, 64, s16 ; GCN-NEXT: s_sub_i32 s6, 64, s16
; GCN-NEXT: s_sub_i32 s4, s16, 64 ; GCN-NEXT: s_sub_i32 s4, s16, 64
; GCN-NEXT: s_lshl_b64 s[6:7], s[10:11], s6 ; GCN-NEXT: s_lshl_b64 s[6:7], s[10:11], s6
; GCN-NEXT: s_lshr_b64 s[24:25], s[8:9], s16 ; GCN-NEXT: s_lshr_b64 s[24:25], s[8:9], s16
; GCN-NEXT: s_lshr_b64 s[4:5], s[10:11], s4 ; GCN-NEXT: s_lshr_b64 s[4:5], s[10:11], s4
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} }
define amdgpu_kernel void @s_ashr_v2i128_ss(<2 x i128> %lhs, <2 x i128> %rhs) { define amdgpu_kernel void @s_ashr_v2i128_ss(<2 x i128> %lhs, <2 x i128> %rhs) {
; GCN-LABEL: s_ashr_v2i128_ss: ; GCN-LABEL: s_ashr_v2i128_ss:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x8 ; GCN-NEXT: s_load_dwordx8 s[16:23], s[4:5], 0x8
; GCN-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x0 ; GCN-NEXT: s_load_dwordx8 s[8:15], s[4:5], 0x0
; GCN-NEXT: v_mov_b32_e32 v10, 16 ; GCN-NEXT: v_mov_b32_e32 v10, 16
; GCN-NEXT: v_mov_b32_e32 v8, 0
; GCN-NEXT: v_mov_b32_e32 v11, 0 ; GCN-NEXT: v_mov_b32_e32 v11, 0
; GCN-NEXT: v_mov_b32_e32 v8, 0
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: v_cmp_lt_u64_e64 s[0:1], s[16:17], 64 ; GCN-NEXT: v_cmp_lt_u64_e64 s[0:1], s[16:17], 64
; GCN-NEXT: v_cmp_eq_u64_e64 s[2:3], s[18:19], 0 ; GCN-NEXT: v_cmp_eq_u64_e64 s[2:3], s[18:19], 0
; GCN-NEXT: s_sub_i32 s6, 64, s16 ; GCN-NEXT: s_sub_i32 s6, 64, s16
; GCN-NEXT: s_sub_i32 s4, s16, 64 ; GCN-NEXT: s_sub_i32 s4, s16, 64
; GCN-NEXT: s_lshl_b64 s[6:7], s[10:11], s6 ; GCN-NEXT: s_lshl_b64 s[6:7], s[10:11], s6
; GCN-NEXT: s_lshr_b64 s[24:25], s[8:9], s16 ; GCN-NEXT: s_lshr_b64 s[24:25], s[8:9], s16
; GCN-NEXT: s_ashr_i64 s[4:5], s[10:11], s4 ; GCN-NEXT: s_ashr_i64 s[4:5], s[10:11], s4
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llvm/test/CodeGen/AMDGPU/shl.ll

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} }
define amdgpu_kernel void @v_shl_32_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in) { define amdgpu_kernel void @v_shl_32_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in) {
; SI-LABEL: v_shl_32_i64: ; SI-LABEL: v_shl_32_i64:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9 ; SI-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
; SI-NEXT: s_ashr_i32 s3, s2, 31 ; SI-NEXT: s_ashr_i32 s3, s2, 31
; SI-NEXT: s_lshl_b64 s[0:1], s[2:3], 3 ; SI-NEXT: s_lshl_b64 s[0:1], s[2:3], 3
; SI-NEXT: v_mov_b32_e32 v0, s0
; SI-NEXT: s_mov_b32 s7, 0xf000 ; SI-NEXT: s_mov_b32 s7, 0xf000
; SI-NEXT: s_mov_b32 s6, 0 ; SI-NEXT: s_mov_b32 s6, 0
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_mov_b64 s[4:5], s[10:11] ; SI-NEXT: s_mov_b64 s[4:5], s[10:11]
; SI-NEXT: v_mov_b32_e32 v0, s0
; SI-NEXT: v_mov_b32_e32 v1, s1 ; SI-NEXT: v_mov_b32_e32 v1, s1
; SI-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64 ; SI-NEXT: buffer_load_dword v3, v[0:1], s[4:7], 0 addr64
; SI-NEXT: s_mov_b64 s[10:11], s[6:7] ; SI-NEXT: s_mov_b64 s[10:11], s[6:7]
; SI-NEXT: v_mov_b32_e32 v2, 0 ; SI-NEXT: v_mov_b32_e32 v2, 0
; SI-NEXT: s_waitcnt vmcnt(0) ; SI-NEXT: s_waitcnt vmcnt(0)
; SI-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[8:11], 0 addr64 ; SI-NEXT: buffer_store_dwordx2 v[2:3], v[0:1], s[8:11], 0 addr64
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
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llvm/test/CodeGen/AMDGPU/sint_to_fp.i64.ll

Show First 20 Lines • Show All 272 Lines • ▼ Show 20 Lines
; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX6-NEXT: s_endpgm ; GFX6-NEXT: s_endpgm
; ;
; GFX8-LABEL: s_sint_to_fp_v2i64_to_v2f32: ; GFX8-LABEL: s_sint_to_fp_v2i64_to_v2f32:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v3, s5
; GFX8-NEXT: s_xor_b32 s7, s2, s3 ; GFX8-NEXT: s_xor_b32 s7, s2, s3
; GFX8-NEXT: s_flbit_i32 s6, s3 ; GFX8-NEXT: s_flbit_i32 s6, s3
; GFX8-NEXT: s_ashr_i32 s7, s7, 31 ; GFX8-NEXT: s_ashr_i32 s7, s7, 31
; GFX8-NEXT: s_add_i32 s6, s6, -1 ; GFX8-NEXT: s_add_i32 s6, s6, -1
; GFX8-NEXT: s_add_i32 s7, s7, 32 ; GFX8-NEXT: s_add_i32 s7, s7, 32
; GFX8-NEXT: s_min_u32 s6, s6, s7 ; GFX8-NEXT: s_min_u32 s6, s6, s7
; GFX8-NEXT: s_lshl_b64 s[2:3], s[2:3], s6 ; GFX8-NEXT: s_lshl_b64 s[2:3], s[2:3], s6
; GFX8-NEXT: s_min_u32 s2, s2, 1 ; GFX8-NEXT: s_min_u32 s2, s2, 1
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; GFX8-NEXT: s_min_u32 s0, s0, 1 ; GFX8-NEXT: s_min_u32 s0, s0, 1
; GFX8-NEXT: s_or_b32 s0, s1, s0 ; GFX8-NEXT: s_or_b32 s0, s1, s0
; GFX8-NEXT: v_cvt_f32_i32_e32 v2, s0 ; GFX8-NEXT: v_cvt_f32_i32_e32 v2, s0
; GFX8-NEXT: s_sub_i32 s0, 32, s6 ; GFX8-NEXT: s_sub_i32 s0, 32, s6
; GFX8-NEXT: v_ldexp_f32 v1, v0, s0 ; GFX8-NEXT: v_ldexp_f32 v1, v0, s0
; GFX8-NEXT: s_sub_i32 s0, 32, s2 ; GFX8-NEXT: s_sub_i32 s0, 32, s2
; GFX8-NEXT: v_ldexp_f32 v0, v2, s0 ; GFX8-NEXT: v_ldexp_f32 v0, v2, s0
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s5
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
%result = sitofp <2 x i64> %in to <2 x float> %result = sitofp <2 x i64> %in to <2 x float>
store <2 x float> %result, <2 x float> addrspace(1)* %out store <2 x float> %result, <2 x float> addrspace(1)* %out
ret void ret void
} }
define amdgpu_kernel void @v_sint_to_fp_v4i64_to_v4f32(<4 x float> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) #0 { define amdgpu_kernel void @v_sint_to_fp_v4i64_to_v4f32(<4 x float> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) #0 {
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llvm/test/CodeGen/AMDGPU/srem64.ll

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; GCN-IR-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17] ; GCN-IR-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17]
; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[16:17], s[10:11], 63 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[16:17], s[10:11], 63
; GCN-IR-NEXT: s_xor_b64 s[18:19], s[14:15], -1 ; GCN-IR-NEXT: s_xor_b64 s[18:19], s[14:15], -1
; GCN-IR-NEXT: s_and_b64 s[16:17], s[18:19], s[16:17] ; GCN-IR-NEXT: s_and_b64 s[16:17], s[18:19], s[16:17]
; GCN-IR-NEXT: s_and_b64 vcc, exec, s[16:17] ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[16:17]
; GCN-IR-NEXT: s_cbranch_vccz BB0_5 ; GCN-IR-NEXT: s_cbranch_vccz BB0_5
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
; GCN-IR-NEXT: s_add_u32 s14, s10, 1 ; GCN-IR-NEXT: s_add_u32 s14, s10, 1
; GCN-IR-NEXT: v_mov_b32_e32 v0, s10
; GCN-IR-NEXT: s_addc_u32 s15, s11, 0 ; GCN-IR-NEXT: s_addc_u32 s15, s11, 0
; GCN-IR-NEXT: v_mov_b32_e32 v0, s10
; GCN-IR-NEXT: v_mov_b32_e32 v1, s11 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s11
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[14:15], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[14:15], v[0:1]
; GCN-IR-NEXT: s_sub_i32 s10, 63, s10 ; GCN-IR-NEXT: s_sub_i32 s10, 63, s10
; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_lshl_b64 s[10:11], s[6:7], s10 ; GCN-IR-NEXT: s_lshl_b64 s[10:11], s[6:7], s10
; GCN-IR-NEXT: s_cbranch_vccz BB0_4 ; GCN-IR-NEXT: s_cbranch_vccz BB0_4
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: s_lshr_b64 s[14:15], s[6:7], s14 ; GCN-IR-NEXT: s_lshr_b64 s[14:15], s[6:7], s14
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; GCN-IR-NEXT: s_or_b64 s[10:11], s[12:13], s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], s[12:13], s[10:11]
; GCN-IR-NEXT: s_sub_u32 s2, s16, s14 ; GCN-IR-NEXT: s_sub_u32 s2, s16, s14
; GCN-IR-NEXT: s_subb_u32 s2, s17, s15 ; GCN-IR-NEXT: s_subb_u32 s2, s17, s15
; GCN-IR-NEXT: s_ashr_i32 s12, s2, 31 ; GCN-IR-NEXT: s_ashr_i32 s12, s2, 31
; GCN-IR-NEXT: s_mov_b32 s13, s12 ; GCN-IR-NEXT: s_mov_b32 s13, s12
; GCN-IR-NEXT: s_and_b32 s2, s12, 1 ; GCN-IR-NEXT: s_and_b32 s2, s12, 1
; GCN-IR-NEXT: s_and_b64 s[18:19], s[12:13], s[0:1] ; GCN-IR-NEXT: s_and_b64 s[18:19], s[12:13], s[0:1]
; GCN-IR-NEXT: s_sub_u32 s14, s14, s18 ; GCN-IR-NEXT: s_sub_u32 s14, s14, s18
; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: s_subb_u32 s15, s15, s19 ; GCN-IR-NEXT: s_subb_u32 s15, s15, s19
; GCN-IR-NEXT: v_mov_b32_e32 v1, s9 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: s_add_u32 s8, s8, 1 ; GCN-IR-NEXT: s_add_u32 s8, s8, 1
; GCN-IR-NEXT: v_mov_b32_e32 v1, s9
; GCN-IR-NEXT: s_addc_u32 s9, s9, 0 ; GCN-IR-NEXT: s_addc_u32 s9, s9, 0
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[0:1]
; GCN-IR-NEXT: s_mov_b64 s[12:13], s[2:3] ; GCN-IR-NEXT: s_mov_b64 s[12:13], s[2:3]
; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_cbranch_vccz BB0_3 ; GCN-IR-NEXT: s_cbranch_vccz BB0_3
; GCN-IR-NEXT: BB0_4: ; %Flow6 ; GCN-IR-NEXT: BB0_4: ; %Flow6
; GCN-IR-NEXT: s_lshl_b64 s[8:9], s[10:11], 1 ; GCN-IR-NEXT: s_lshl_b64 s[8:9], s[10:11], 1
; GCN-IR-NEXT: s_or_b64 s[2:3], s[2:3], s[8:9] ; GCN-IR-NEXT: s_or_b64 s[2:3], s[2:3], s[8:9]
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; GCN-IR-NEXT: s_cbranch_execz BB1_5 ; GCN-IR-NEXT: s_cbranch_execz BB1_5
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: v_add_i32_e32 v18, vcc, -1, v5 ; GCN-IR-NEXT: v_add_i32_e32 v18, vcc, -1, v5
; GCN-IR-NEXT: v_addc_u32_e32 v19, vcc, -1, v6, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v19, vcc, -1, v6, vcc
; GCN-IR-NEXT: v_not_b32_e32 v3, v3 ; GCN-IR-NEXT: v_not_b32_e32 v3, v3
; GCN-IR-NEXT: v_lshr_b64 v[14:15], v[0:1], v14 ; GCN-IR-NEXT: v_lshr_b64 v[14:15], v[0:1], v14
; GCN-IR-NEXT: v_not_b32_e32 v9, v11 ; GCN-IR-NEXT: v_not_b32_e32 v9, v11
; GCN-IR-NEXT: v_add_i32_e32 v11, vcc, v3, v12 ; GCN-IR-NEXT: v_add_i32_e32 v11, vcc, v3, v12
; GCN-IR-NEXT: v_mov_b32_e32 v16, 0
; GCN-IR-NEXT: v_addc_u32_e32 v12, vcc, v9, v13, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v12, vcc, v9, v13, vcc
; GCN-IR-NEXT: v_mov_b32_e32 v16, 0
; GCN-IR-NEXT: v_mov_b32_e32 v17, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v17, 0
; GCN-IR-NEXT: v_mov_b32_e32 v10, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
; GCN-IR-NEXT: BB1_3: ; %udiv-do-while ; GCN-IR-NEXT: BB1_3: ; %udiv-do-while
; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-IR-NEXT: v_lshl_b64 v[14:15], v[14:15], 1 ; GCN-IR-NEXT: v_lshl_b64 v[14:15], v[14:15], 1
; GCN-IR-NEXT: v_lshrrev_b32_e32 v3, 31, v8 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v3, 31, v8
; GCN-IR-NEXT: v_or_b32_e32 v3, v14, v3 ; GCN-IR-NEXT: v_or_b32_e32 v3, v14, v3
; GCN-IR-NEXT: v_lshl_b64 v[7:8], v[7:8], 1 ; GCN-IR-NEXT: v_lshl_b64 v[7:8], v[7:8], 1
; GCN-IR-NEXT: v_sub_i32_e32 v9, vcc, v18, v3 ; GCN-IR-NEXT: v_sub_i32_e32 v9, vcc, v18, v3
; GCN-IR-NEXT: v_subb_u32_e32 v9, vcc, v19, v15, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v9, vcc, v19, v15, vcc
; GCN-IR-NEXT: v_or_b32_e32 v7, v16, v7 ; GCN-IR-NEXT: v_or_b32_e32 v7, v16, v7
; GCN-IR-NEXT: v_add_i32_e32 v16, vcc, 1, v11 ; GCN-IR-NEXT: v_add_i32_e32 v16, vcc, 1, v11
; GCN-IR-NEXT: v_or_b32_e32 v8, v17, v8 ; GCN-IR-NEXT: v_or_b32_e32 v8, v17, v8
; GCN-IR-NEXT: v_ashrrev_i32_e32 v13, 31, v9 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v13, 31, v9
; GCN-IR-NEXT: v_addc_u32_e32 v17, vcc, 0, v12, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v17, vcc, 0, v12, vcc
; GCN-IR-NEXT: v_and_b32_e32 v9, 1, v13 ; GCN-IR-NEXT: v_and_b32_e32 v9, 1, v13
; GCN-IR-NEXT: v_and_b32_e32 v20, v13, v6 ; GCN-IR-NEXT: v_and_b32_e32 v20, v13, v6
; GCN-IR-NEXT: v_and_b32_e32 v13, v13, v5 ; GCN-IR-NEXT: v_and_b32_e32 v13, v13, v5
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[16:17], v[11:12] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[16:17], v[11:12]
; GCN-IR-NEXT: v_mov_b32_e32 v11, v16
; GCN-IR-NEXT: v_sub_i32_e64 v14, s[4:5], v3, v13 ; GCN-IR-NEXT: v_sub_i32_e64 v14, s[4:5], v3, v13
; GCN-IR-NEXT: v_mov_b32_e32 v12, v17
; GCN-IR-NEXT: v_mov_b32_e32 v17, v10
; GCN-IR-NEXT: v_subb_u32_e64 v15, s[4:5], v15, v20, s[4:5] ; GCN-IR-NEXT: v_subb_u32_e64 v15, s[4:5], v15, v20, s[4:5]
; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
; GCN-IR-NEXT: v_mov_b32_e32 v11, v16
; GCN-IR-NEXT: v_mov_b32_e32 v12, v17
; GCN-IR-NEXT: v_mov_b32_e32 v17, v10
; GCN-IR-NEXT: v_mov_b32_e32 v16, v9 ; GCN-IR-NEXT: v_mov_b32_e32 v16, v9
; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: s_cbranch_execnz BB1_3 ; GCN-IR-NEXT: s_cbranch_execnz BB1_3
; GCN-IR-NEXT: ; %bb.4: ; %Flow ; GCN-IR-NEXT: ; %bb.4: ; %Flow
; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: BB1_5: ; %Flow3 ; GCN-IR-NEXT: BB1_5: ; %Flow3
; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
; GCN-IR-NEXT: v_lshl_b64 v[7:8], v[7:8], 1 ; GCN-IR-NEXT: v_lshl_b64 v[7:8], v[7:8], 1
▲ Show 20 Lines • Show All 598 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_or_b64 s[16:17], s[16:17], s[18:19] ; GCN-IR-NEXT: s_or_b64 s[16:17], s[16:17], s[18:19]
; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[18:19], s[12:13], 63 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[18:19], s[12:13], 63
; GCN-IR-NEXT: s_xor_b64 s[20:21], s[16:17], -1 ; GCN-IR-NEXT: s_xor_b64 s[20:21], s[16:17], -1
; GCN-IR-NEXT: s_and_b64 s[18:19], s[20:21], s[18:19] ; GCN-IR-NEXT: s_and_b64 s[18:19], s[20:21], s[18:19]
; GCN-IR-NEXT: s_and_b64 vcc, exec, s[18:19] ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[18:19]
; GCN-IR-NEXT: s_cbranch_vccz BB8_5 ; GCN-IR-NEXT: s_cbranch_vccz BB8_5
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
; GCN-IR-NEXT: s_add_u32 s16, s12, 1 ; GCN-IR-NEXT: s_add_u32 s16, s12, 1
; GCN-IR-NEXT: v_mov_b32_e32 v0, s12
; GCN-IR-NEXT: s_addc_u32 s17, s13, 0 ; GCN-IR-NEXT: s_addc_u32 s17, s13, 0
; GCN-IR-NEXT: v_mov_b32_e32 v0, s12
; GCN-IR-NEXT: v_mov_b32_e32 v1, s13 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s13
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[16:17], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[16:17], v[0:1]
; GCN-IR-NEXT: s_sub_i32 s12, 63, s12 ; GCN-IR-NEXT: s_sub_i32 s12, 63, s12
; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_lshl_b64 s[12:13], s[2:3], s12 ; GCN-IR-NEXT: s_lshl_b64 s[12:13], s[2:3], s12
; GCN-IR-NEXT: s_cbranch_vccz BB8_4 ; GCN-IR-NEXT: s_cbranch_vccz BB8_4
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: s_lshr_b64 s[16:17], s[2:3], s16 ; GCN-IR-NEXT: s_lshr_b64 s[16:17], s[2:3], s16
Show All 14 Lines
; GCN-IR-NEXT: s_or_b64 s[12:13], s[14:15], s[12:13] ; GCN-IR-NEXT: s_or_b64 s[12:13], s[14:15], s[12:13]
; GCN-IR-NEXT: s_sub_u32 s6, s18, s16 ; GCN-IR-NEXT: s_sub_u32 s6, s18, s16
; GCN-IR-NEXT: s_subb_u32 s6, s19, s17 ; GCN-IR-NEXT: s_subb_u32 s6, s19, s17
; GCN-IR-NEXT: s_ashr_i32 s14, s6, 31 ; GCN-IR-NEXT: s_ashr_i32 s14, s6, 31
; GCN-IR-NEXT: s_mov_b32 s15, s14 ; GCN-IR-NEXT: s_mov_b32 s15, s14
; GCN-IR-NEXT: s_and_b32 s6, s14, 1 ; GCN-IR-NEXT: s_and_b32 s6, s14, 1
; GCN-IR-NEXT: s_and_b64 s[20:21], s[14:15], s[8:9] ; GCN-IR-NEXT: s_and_b64 s[20:21], s[14:15], s[8:9]
; GCN-IR-NEXT: s_sub_u32 s16, s16, s20 ; GCN-IR-NEXT: s_sub_u32 s16, s16, s20
; GCN-IR-NEXT: v_mov_b32_e32 v0, s10
; GCN-IR-NEXT: s_subb_u32 s17, s17, s21 ; GCN-IR-NEXT: s_subb_u32 s17, s17, s21
; GCN-IR-NEXT: v_mov_b32_e32 v1, s11 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s10
; GCN-IR-NEXT: s_add_u32 s10, s10, 1 ; GCN-IR-NEXT: s_add_u32 s10, s10, 1
; GCN-IR-NEXT: v_mov_b32_e32 v1, s11
; GCN-IR-NEXT: s_addc_u32 s11, s11, 0 ; GCN-IR-NEXT: s_addc_u32 s11, s11, 0
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1]
; GCN-IR-NEXT: s_mov_b64 s[14:15], s[6:7] ; GCN-IR-NEXT: s_mov_b64 s[14:15], s[6:7]
; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_cbranch_vccz BB8_3 ; GCN-IR-NEXT: s_cbranch_vccz BB8_3
; GCN-IR-NEXT: BB8_4: ; %Flow6 ; GCN-IR-NEXT: BB8_4: ; %Flow6
; GCN-IR-NEXT: s_lshl_b64 s[10:11], s[12:13], 1 ; GCN-IR-NEXT: s_lshl_b64 s[10:11], s[12:13], 1
; GCN-IR-NEXT: s_or_b64 s[6:7], s[6:7], s[10:11] ; GCN-IR-NEXT: s_or_b64 s[6:7], s[6:7], s[10:11]
▲ Show 20 Lines • Show All 110 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_or_b64 s[16:17], s[16:17], s[18:19] ; GCN-IR-NEXT: s_or_b64 s[16:17], s[16:17], s[18:19]
; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[18:19], s[12:13], 63 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[18:19], s[12:13], 63
; GCN-IR-NEXT: s_xor_b64 s[20:21], s[16:17], -1 ; GCN-IR-NEXT: s_xor_b64 s[20:21], s[16:17], -1
; GCN-IR-NEXT: s_and_b64 s[18:19], s[20:21], s[18:19] ; GCN-IR-NEXT: s_and_b64 s[18:19], s[20:21], s[18:19]
; GCN-IR-NEXT: s_and_b64 vcc, exec, s[18:19] ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[18:19]
; GCN-IR-NEXT: s_cbranch_vccz BB9_5 ; GCN-IR-NEXT: s_cbranch_vccz BB9_5
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
; GCN-IR-NEXT: s_add_u32 s16, s12, 1 ; GCN-IR-NEXT: s_add_u32 s16, s12, 1
; GCN-IR-NEXT: v_mov_b32_e32 v0, s12
; GCN-IR-NEXT: s_addc_u32 s17, s13, 0 ; GCN-IR-NEXT: s_addc_u32 s17, s13, 0
; GCN-IR-NEXT: v_mov_b32_e32 v0, s12
; GCN-IR-NEXT: v_mov_b32_e32 v1, s13 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s13
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[16:17], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[16:17], v[0:1]
; GCN-IR-NEXT: s_sub_i32 s12, 63, s12 ; GCN-IR-NEXT: s_sub_i32 s12, 63, s12
; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_lshl_b64 s[12:13], s[2:3], s12 ; GCN-IR-NEXT: s_lshl_b64 s[12:13], s[2:3], s12
; GCN-IR-NEXT: s_cbranch_vccz BB9_4 ; GCN-IR-NEXT: s_cbranch_vccz BB9_4
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: s_lshr_b64 s[16:17], s[2:3], s16 ; GCN-IR-NEXT: s_lshr_b64 s[16:17], s[2:3], s16
Show All 14 Lines
; GCN-IR-NEXT: s_or_b64 s[12:13], s[14:15], s[12:13] ; GCN-IR-NEXT: s_or_b64 s[12:13], s[14:15], s[12:13]
; GCN-IR-NEXT: s_sub_u32 s8, s18, s16 ; GCN-IR-NEXT: s_sub_u32 s8, s18, s16
; GCN-IR-NEXT: s_subb_u32 s8, s19, s17 ; GCN-IR-NEXT: s_subb_u32 s8, s19, s17
; GCN-IR-NEXT: s_ashr_i32 s14, s8, 31 ; GCN-IR-NEXT: s_ashr_i32 s14, s8, 31
; GCN-IR-NEXT: s_mov_b32 s15, s14 ; GCN-IR-NEXT: s_mov_b32 s15, s14
; GCN-IR-NEXT: s_and_b32 s8, s14, 1 ; GCN-IR-NEXT: s_and_b32 s8, s14, 1
; GCN-IR-NEXT: s_and_b64 s[20:21], s[14:15], s[6:7] ; GCN-IR-NEXT: s_and_b64 s[20:21], s[14:15], s[6:7]
; GCN-IR-NEXT: s_sub_u32 s16, s16, s20 ; GCN-IR-NEXT: s_sub_u32 s16, s16, s20
; GCN-IR-NEXT: v_mov_b32_e32 v0, s10
; GCN-IR-NEXT: s_subb_u32 s17, s17, s21 ; GCN-IR-NEXT: s_subb_u32 s17, s17, s21
; GCN-IR-NEXT: v_mov_b32_e32 v1, s11 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s10
; GCN-IR-NEXT: s_add_u32 s10, s10, 1 ; GCN-IR-NEXT: s_add_u32 s10, s10, 1
; GCN-IR-NEXT: v_mov_b32_e32 v1, s11
; GCN-IR-NEXT: s_addc_u32 s11, s11, 0 ; GCN-IR-NEXT: s_addc_u32 s11, s11, 0
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1]
; GCN-IR-NEXT: s_mov_b64 s[14:15], s[8:9] ; GCN-IR-NEXT: s_mov_b64 s[14:15], s[8:9]
; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_cbranch_vccz BB9_3 ; GCN-IR-NEXT: s_cbranch_vccz BB9_3
; GCN-IR-NEXT: BB9_4: ; %Flow3 ; GCN-IR-NEXT: BB9_4: ; %Flow3
; GCN-IR-NEXT: s_lshl_b64 s[10:11], s[12:13], 1 ; GCN-IR-NEXT: s_lshl_b64 s[10:11], s[12:13], 1
; GCN-IR-NEXT: s_or_b64 s[8:9], s[8:9], s[10:11] ; GCN-IR-NEXT: s_or_b64 s[8:9], s[8:9], s[10:11]
▲ Show 20 Lines • Show All 165 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_or_b64 s[10:11], s[10:11], s[12:13] ; GCN-IR-NEXT: s_or_b64 s[10:11], s[10:11], s[12:13]
; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[12:13], s[8:9], 63 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[12:13], s[8:9], 63
; GCN-IR-NEXT: s_xor_b64 s[14:15], s[10:11], -1 ; GCN-IR-NEXT: s_xor_b64 s[14:15], s[10:11], -1
; GCN-IR-NEXT: s_and_b64 s[12:13], s[14:15], s[12:13] ; GCN-IR-NEXT: s_and_b64 s[12:13], s[14:15], s[12:13]
; GCN-IR-NEXT: s_and_b64 vcc, exec, s[12:13] ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[12:13]
; GCN-IR-NEXT: s_cbranch_vccz BB10_5 ; GCN-IR-NEXT: s_cbranch_vccz BB10_5
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
; GCN-IR-NEXT: s_add_u32 s10, s8, 1 ; GCN-IR-NEXT: s_add_u32 s10, s8, 1
; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: s_addc_u32 s11, s9, 0 ; GCN-IR-NEXT: s_addc_u32 s11, s9, 0
; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: v_mov_b32_e32 v1, s9 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s9
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1]
; GCN-IR-NEXT: s_sub_i32 s7, 63, s8 ; GCN-IR-NEXT: s_sub_i32 s7, 63, s8
; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_lshl_b64 s[8:9], 24, s7 ; GCN-IR-NEXT: s_lshl_b64 s[8:9], 24, s7
; GCN-IR-NEXT: s_cbranch_vccz BB10_4 ; GCN-IR-NEXT: s_cbranch_vccz BB10_4
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: s_lshr_b64 s[12:13], 24, s10 ; GCN-IR-NEXT: s_lshr_b64 s[12:13], 24, s10
Show All 12 Lines
; GCN-IR-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9] ; GCN-IR-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9]
; GCN-IR-NEXT: s_sub_u32 s2, s14, s12 ; GCN-IR-NEXT: s_sub_u32 s2, s14, s12
; GCN-IR-NEXT: s_subb_u32 s2, s15, s13 ; GCN-IR-NEXT: s_subb_u32 s2, s15, s13
; GCN-IR-NEXT: s_ashr_i32 s10, s2, 31 ; GCN-IR-NEXT: s_ashr_i32 s10, s2, 31
; GCN-IR-NEXT: s_mov_b32 s11, s10 ; GCN-IR-NEXT: s_mov_b32 s11, s10
; GCN-IR-NEXT: s_and_b32 s2, s10, 1 ; GCN-IR-NEXT: s_and_b32 s2, s10, 1
; GCN-IR-NEXT: s_and_b64 s[16:17], s[10:11], s[4:5] ; GCN-IR-NEXT: s_and_b64 s[16:17], s[10:11], s[4:5]
; GCN-IR-NEXT: s_sub_u32 s12, s12, s16 ; GCN-IR-NEXT: s_sub_u32 s12, s12, s16
; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
; GCN-IR-NEXT: s_subb_u32 s13, s13, s17 ; GCN-IR-NEXT: s_subb_u32 s13, s13, s17
; GCN-IR-NEXT: v_mov_b32_e32 v1, s7 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
; GCN-IR-NEXT: s_add_u32 s6, s6, 1 ; GCN-IR-NEXT: s_add_u32 s6, s6, 1
; GCN-IR-NEXT: v_mov_b32_e32 v1, s7
; GCN-IR-NEXT: s_addc_u32 s7, s7, 0 ; GCN-IR-NEXT: s_addc_u32 s7, s7, 0
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1]
; GCN-IR-NEXT: s_mov_b64 s[10:11], s[2:3] ; GCN-IR-NEXT: s_mov_b64 s[10:11], s[2:3]
; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_cbranch_vccz BB10_3 ; GCN-IR-NEXT: s_cbranch_vccz BB10_3
; GCN-IR-NEXT: BB10_4: ; %Flow5 ; GCN-IR-NEXT: BB10_4: ; %Flow5
; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[8:9], 1 ; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[8:9], 1
; GCN-IR-NEXT: s_or_b64 s[2:3], s[2:3], s[6:7] ; GCN-IR-NEXT: s_or_b64 s[2:3], s[2:3], s[6:7]
▲ Show 20 Lines • Show All 166 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5] ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
; GCN-IR-NEXT: s_cbranch_execz BB11_5 ; GCN-IR-NEXT: s_cbranch_execz BB11_5
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, -1, v0 ; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, -1, v0
; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, -1, v1, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, -1, v1, vcc
; GCN-IR-NEXT: v_lshr_b64 v[8:9], 24, v8 ; GCN-IR-NEXT: v_lshr_b64 v[8:9], 24, v8
; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, 58, v6 ; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, 58, v6
; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
; GCN-IR-NEXT: v_subb_u32_e32 v7, vcc, 0, v7, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v7, vcc, 0, v7, vcc
; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
; GCN-IR-NEXT: v_mov_b32_e32 v11, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v11, 0
; GCN-IR-NEXT: v_mov_b32_e32 v5, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
; GCN-IR-NEXT: BB11_3: ; %udiv-do-while ; GCN-IR-NEXT: BB11_3: ; %udiv-do-while
; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-IR-NEXT: v_lshl_b64 v[8:9], v[8:9], 1 ; GCN-IR-NEXT: v_lshl_b64 v[8:9], v[8:9], 1
; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3
; GCN-IR-NEXT: v_or_b32_e32 v8, v8, v4 ; GCN-IR-NEXT: v_or_b32_e32 v8, v8, v4
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, v12, v8 ; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, v12, v8
; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, v13, v9, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, v13, v9, vcc
; GCN-IR-NEXT: v_or_b32_e32 v2, v10, v2 ; GCN-IR-NEXT: v_or_b32_e32 v2, v10, v2
; GCN-IR-NEXT: v_ashrrev_i32_e32 v10, 31, v4 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v10, 31, v4
; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v10 ; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v10
; GCN-IR-NEXT: v_and_b32_e32 v14, v10, v1 ; GCN-IR-NEXT: v_and_b32_e32 v14, v10, v1
; GCN-IR-NEXT: v_and_b32_e32 v15, v10, v0 ; GCN-IR-NEXT: v_and_b32_e32 v15, v10, v0
; GCN-IR-NEXT: v_add_i32_e32 v10, vcc, 1, v6 ; GCN-IR-NEXT: v_add_i32_e32 v10, vcc, 1, v6
; GCN-IR-NEXT: v_or_b32_e32 v3, v11, v3 ; GCN-IR-NEXT: v_or_b32_e32 v3, v11, v3
; GCN-IR-NEXT: v_addc_u32_e32 v11, vcc, 0, v7, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v11, vcc, 0, v7, vcc
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[10:11], v[6:7] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[10:11], v[6:7]
; GCN-IR-NEXT: v_mov_b32_e32 v6, v10
; GCN-IR-NEXT: v_sub_i32_e64 v8, s[4:5], v8, v15 ; GCN-IR-NEXT: v_sub_i32_e64 v8, s[4:5], v8, v15
; GCN-IR-NEXT: v_mov_b32_e32 v7, v11
; GCN-IR-NEXT: v_mov_b32_e32 v11, v5
; GCN-IR-NEXT: v_subb_u32_e64 v9, s[4:5], v9, v14, s[4:5] ; GCN-IR-NEXT: v_subb_u32_e64 v9, s[4:5], v9, v14, s[4:5]
; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
; GCN-IR-NEXT: v_mov_b32_e32 v6, v10
; GCN-IR-NEXT: v_mov_b32_e32 v7, v11
; GCN-IR-NEXT: v_mov_b32_e32 v11, v5
; GCN-IR-NEXT: v_mov_b32_e32 v10, v4 ; GCN-IR-NEXT: v_mov_b32_e32 v10, v4
; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: s_cbranch_execnz BB11_3 ; GCN-IR-NEXT: s_cbranch_execnz BB11_3
; GCN-IR-NEXT: ; %bb.4: ; %Flow ; GCN-IR-NEXT: ; %bb.4: ; %Flow
; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: BB11_5: ; %Flow3 ; GCN-IR-NEXT: BB11_5: ; %Flow3
; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
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; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5] ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
; GCN-IR-NEXT: s_cbranch_execz BB12_5 ; GCN-IR-NEXT: s_cbranch_execz BB12_5
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, -1, v0 ; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, -1, v0
; GCN-IR-NEXT: s_mov_b64 s[4:5], 0x8000 ; GCN-IR-NEXT: s_mov_b64 s[4:5], 0x8000
; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, -1, v1, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, -1, v1, vcc
; GCN-IR-NEXT: v_lshr_b64 v[8:9], s[4:5], v8 ; GCN-IR-NEXT: v_lshr_b64 v[8:9], s[4:5], v8
; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, 47, v6 ; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, 47, v6
; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
; GCN-IR-NEXT: v_subb_u32_e32 v7, vcc, 0, v7, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v7, vcc, 0, v7, vcc
; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
; GCN-IR-NEXT: v_mov_b32_e32 v11, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v11, 0
; GCN-IR-NEXT: v_mov_b32_e32 v5, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
; GCN-IR-NEXT: BB12_3: ; %udiv-do-while ; GCN-IR-NEXT: BB12_3: ; %udiv-do-while
; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-IR-NEXT: v_lshl_b64 v[8:9], v[8:9], 1 ; GCN-IR-NEXT: v_lshl_b64 v[8:9], v[8:9], 1
; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3
; GCN-IR-NEXT: v_or_b32_e32 v8, v8, v4 ; GCN-IR-NEXT: v_or_b32_e32 v8, v8, v4
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, v12, v8 ; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, v12, v8
; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, v13, v9, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, v13, v9, vcc
; GCN-IR-NEXT: v_or_b32_e32 v2, v10, v2 ; GCN-IR-NEXT: v_or_b32_e32 v2, v10, v2
; GCN-IR-NEXT: v_ashrrev_i32_e32 v10, 31, v4 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v10, 31, v4
; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v10 ; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v10
; GCN-IR-NEXT: v_and_b32_e32 v14, v10, v1 ; GCN-IR-NEXT: v_and_b32_e32 v14, v10, v1
; GCN-IR-NEXT: v_and_b32_e32 v15, v10, v0 ; GCN-IR-NEXT: v_and_b32_e32 v15, v10, v0
; GCN-IR-NEXT: v_add_i32_e32 v10, vcc, 1, v6 ; GCN-IR-NEXT: v_add_i32_e32 v10, vcc, 1, v6
; GCN-IR-NEXT: v_or_b32_e32 v3, v11, v3 ; GCN-IR-NEXT: v_or_b32_e32 v3, v11, v3
; GCN-IR-NEXT: v_addc_u32_e32 v11, vcc, 0, v7, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v11, vcc, 0, v7, vcc
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[10:11], v[6:7] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[10:11], v[6:7]
; GCN-IR-NEXT: v_mov_b32_e32 v6, v10
; GCN-IR-NEXT: v_sub_i32_e64 v8, s[4:5], v8, v15 ; GCN-IR-NEXT: v_sub_i32_e64 v8, s[4:5], v8, v15
; GCN-IR-NEXT: v_mov_b32_e32 v7, v11
; GCN-IR-NEXT: v_mov_b32_e32 v11, v5
; GCN-IR-NEXT: v_subb_u32_e64 v9, s[4:5], v9, v14, s[4:5] ; GCN-IR-NEXT: v_subb_u32_e64 v9, s[4:5], v9, v14, s[4:5]
; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
; GCN-IR-NEXT: v_mov_b32_e32 v6, v10
; GCN-IR-NEXT: v_mov_b32_e32 v7, v11
; GCN-IR-NEXT: v_mov_b32_e32 v11, v5
; GCN-IR-NEXT: v_mov_b32_e32 v10, v4 ; GCN-IR-NEXT: v_mov_b32_e32 v10, v4
; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: s_cbranch_execnz BB12_3 ; GCN-IR-NEXT: s_cbranch_execnz BB12_3
; GCN-IR-NEXT: ; %bb.4: ; %Flow ; GCN-IR-NEXT: ; %bb.4: ; %Flow
; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: BB12_5: ; %Flow3 ; GCN-IR-NEXT: BB12_5: ; %Flow3
; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
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; GCN-IR-NEXT: v_mov_b32_e32 v7, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v7, 0
; GCN-IR-NEXT: s_mov_b64 s[10:11], 0 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5] ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
; GCN-IR-NEXT: s_cbranch_execz BB13_5 ; GCN-IR-NEXT: s_cbranch_execz BB13_5
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: v_lshr_b64 v[10:11], v[0:1], v9 ; GCN-IR-NEXT: v_lshr_b64 v[10:11], v[0:1], v9
; GCN-IR-NEXT: v_add_i32_e32 v8, vcc, 0xffffffcf, v8 ; GCN-IR-NEXT: v_add_i32_e32 v8, vcc, 0xffffffcf, v8
; GCN-IR-NEXT: v_mov_b32_e32 v12, 0
; GCN-IR-NEXT: v_addc_u32_e64 v9, s[4:5], 0, -1, vcc ; GCN-IR-NEXT: v_addc_u32_e64 v9, s[4:5], 0, -1, vcc
; GCN-IR-NEXT: v_mov_b32_e32 v12, 0
; GCN-IR-NEXT: v_mov_b32_e32 v13, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v13, 0
; GCN-IR-NEXT: v_mov_b32_e32 v7, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v7, 0
; GCN-IR-NEXT: s_movk_i32 s12, 0x7fff ; GCN-IR-NEXT: s_movk_i32 s12, 0x7fff
; GCN-IR-NEXT: BB13_3: ; %udiv-do-while ; GCN-IR-NEXT: BB13_3: ; %udiv-do-while
; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-IR-NEXT: v_lshl_b64 v[10:11], v[10:11], 1 ; GCN-IR-NEXT: v_lshl_b64 v[10:11], v[10:11], 1
; GCN-IR-NEXT: v_lshrrev_b32_e32 v6, 31, v5 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v6, 31, v5
; GCN-IR-NEXT: v_or_b32_e32 v10, v10, v6 ; GCN-IR-NEXT: v_or_b32_e32 v10, v10, v6
; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1 ; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1
; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, s12, v10 ; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, s12, v10
; GCN-IR-NEXT: v_subb_u32_e32 v6, vcc, 0, v11, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v6, vcc, 0, v11, vcc
; GCN-IR-NEXT: v_or_b32_e32 v4, v12, v4 ; GCN-IR-NEXT: v_or_b32_e32 v4, v12, v4
; GCN-IR-NEXT: v_ashrrev_i32_e32 v12, 31, v6 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v12, 31, v6
; GCN-IR-NEXT: v_and_b32_e32 v6, 1, v12 ; GCN-IR-NEXT: v_and_b32_e32 v6, 1, v12
; GCN-IR-NEXT: v_and_b32_e32 v15, 0x8000, v12 ; GCN-IR-NEXT: v_and_b32_e32 v15, 0x8000, v12
; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, 1, v8 ; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, 1, v8
; GCN-IR-NEXT: v_or_b32_e32 v5, v13, v5 ; GCN-IR-NEXT: v_or_b32_e32 v5, v13, v5
; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, 0, v9, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, 0, v9, vcc
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[12:13], v[8:9] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[12:13], v[8:9]
; GCN-IR-NEXT: v_mov_b32_e32 v8, v12
; GCN-IR-NEXT: v_mov_b32_e32 v14, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v14, 0
; GCN-IR-NEXT: v_sub_i32_e64 v10, s[4:5], v10, v15 ; GCN-IR-NEXT: v_sub_i32_e64 v10, s[4:5], v10, v15
; GCN-IR-NEXT: v_mov_b32_e32 v9, v13
; GCN-IR-NEXT: v_mov_b32_e32 v13, v7
; GCN-IR-NEXT: v_subb_u32_e64 v11, s[4:5], v11, v14, s[4:5] ; GCN-IR-NEXT: v_subb_u32_e64 v11, s[4:5], v11, v14, s[4:5]
; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
; GCN-IR-NEXT: v_mov_b32_e32 v8, v12
; GCN-IR-NEXT: v_mov_b32_e32 v9, v13
; GCN-IR-NEXT: v_mov_b32_e32 v13, v7
; GCN-IR-NEXT: v_mov_b32_e32 v12, v6 ; GCN-IR-NEXT: v_mov_b32_e32 v12, v6
; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: s_cbranch_execnz BB13_3 ; GCN-IR-NEXT: s_cbranch_execnz BB13_3
; GCN-IR-NEXT: ; %bb.4: ; %Flow ; GCN-IR-NEXT: ; %bb.4: ; %Flow
; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: BB13_5: ; %Flow3 ; GCN-IR-NEXT: BB13_5: ; %Flow3
; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1 ; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1
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llvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs | FileCheck -check-prefix=MUBUF %s ; RUN: llc < %s -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs | FileCheck -check-prefix=MUBUF %s
; RUN: llc < %s -march=amdgcn -mcpu=gfx1010 -amdgpu-enable-flat-scratch -verify-machineinstrs | FileCheck -check-prefix=FLATSCR %s ; RUN: llc < %s -march=amdgcn -mcpu=gfx1010 -amdgpu-enable-flat-scratch -verify-machineinstrs | FileCheck -check-prefix=FLATSCR %s
; During instruction selection, we use immediate const zero for soffset in ; During instruction selection, we use immediate const zero for soffset in
; MUBUF stack accesses and let eliminateFrameIndex to fix up this field to use ; MUBUF stack accesses and let eliminateFrameIndex to fix up this field to use
; the correct frame register whenever required. ; the correct frame register whenever required.
define amdgpu_kernel void @kernel_background_evaluate(float addrspace(5)* %kg, <4 x i32> addrspace(1)* %input, <4 x float> addrspace(1)* %output, i32 %i) { define amdgpu_kernel void @kernel_background_evaluate(float addrspace(5)* %kg, <4 x i32> addrspace(1)* %input, <4 x float> addrspace(1)* %output, i32 %i) {
; MUBUF-LABEL: kernel_background_evaluate: ; MUBUF-LABEL: kernel_background_evaluate:
; MUBUF: ; %bb.0: ; %entry ; MUBUF: ; %bb.0: ; %entry
; MUBUF-NEXT: s_load_dword s0, s[4:5], 0x24 ; MUBUF-NEXT: s_load_dword s0, s[4:5], 0x24
; MUBUF-NEXT: s_mov_b32 s36, SCRATCH_RSRC_DWORD0 ; MUBUF-NEXT: s_mov_b32 s36, SCRATCH_RSRC_DWORD0
; MUBUF-NEXT: s_mov_b32 s37, SCRATCH_RSRC_DWORD1 ; MUBUF-NEXT: s_mov_b32 s37, SCRATCH_RSRC_DWORD1
; MUBUF-NEXT: s_mov_b32 s38, -1 ; MUBUF-NEXT: s_mov_b32 s38, -1
; MUBUF-NEXT: s_mov_b32 s39, 0x31c16000 ; MUBUF-NEXT: s_mov_b32 s39, 0x31c16000
; MUBUF-NEXT: s_add_u32 s36, s36, s11 ; MUBUF-NEXT: s_add_u32 s36, s36, s11
; MUBUF-NEXT: s_addc_u32 s37, s37, 0
; MUBUF-NEXT: v_mov_b32_e32 v1, 0x2000 ; MUBUF-NEXT: v_mov_b32_e32 v1, 0x2000
; MUBUF-NEXT: v_mov_b32_e32 v2, 0x4000 ; MUBUF-NEXT: v_mov_b32_e32 v2, 0x4000
; MUBUF-NEXT: v_mov_b32_e32 v3, 0 ; MUBUF-NEXT: v_mov_b32_e32 v3, 0
; MUBUF-NEXT: v_mov_b32_e32 v4, 0x400000 ; MUBUF-NEXT: v_mov_b32_e32 v4, 0x400000
; MUBUF-NEXT: s_addc_u32 s37, s37, 0
; MUBUF-NEXT: s_mov_b64 s[2:3], s[38:39]
; MUBUF-NEXT: s_mov_b32 s32, 0xc0000 ; MUBUF-NEXT: s_mov_b32 s32, 0xc0000
; MUBUF-NEXT: v_add_nc_u32_e64 v40, 4, 0x4000 ; MUBUF-NEXT: v_add_nc_u32_e64 v40, 4, 0x4000
; MUBUF-NEXT: s_getpc_b64 s[4:5] ; MUBUF-NEXT: s_getpc_b64 s[4:5]
; MUBUF-NEXT: s_add_u32 s4, s4, svm_eval_nodes@rel32@lo+4 ; MUBUF-NEXT: s_add_u32 s4, s4, svm_eval_nodes@rel32@lo+4
; MUBUF-NEXT: s_addc_u32 s5, s5, svm_eval_nodes@rel32@hi+12 ; MUBUF-NEXT: s_addc_u32 s5, s5, svm_eval_nodes@rel32@hi+12
; MUBUF-NEXT: s_waitcnt lgkmcnt(0) ; MUBUF-NEXT: s_waitcnt lgkmcnt(0)
; MUBUF-NEXT: v_mov_b32_e32 v0, s0 ; MUBUF-NEXT: v_mov_b32_e32 v0, s0
; MUBUF-NEXT: s_mov_b64 s[0:1], s[36:37] ; MUBUF-NEXT: s_mov_b64 s[0:1], s[36:37]
; MUBUF-NEXT: s_mov_b64 s[2:3], s[38:39]
; MUBUF-NEXT: s_swappc_b64 s[30:31], s[4:5] ; MUBUF-NEXT: s_swappc_b64 s[30:31], s[4:5]
; MUBUF-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0 ; MUBUF-NEXT: v_cmp_ne_u32_e32 vcc_lo, 0, v0
; MUBUF-NEXT: s_and_saveexec_b32 s0, vcc_lo ; MUBUF-NEXT: s_and_saveexec_b32 s0, vcc_lo
; MUBUF-NEXT: s_cbranch_execz BB0_2 ; MUBUF-NEXT: s_cbranch_execz BB0_2
; MUBUF-NEXT: ; %bb.1: ; %if.then4.i ; MUBUF-NEXT: ; %bb.1: ; %if.then4.i
; MUBUF-NEXT: s_clause 0x1 ; MUBUF-NEXT: s_clause 0x1
; MUBUF-NEXT: buffer_load_dword v0, v40, s[36:39], 0 offen ; MUBUF-NEXT: buffer_load_dword v0, v40, s[36:39], 0 offen
; MUBUF-NEXT: buffer_load_dword v1, v40, s[36:39], 0 offen offset:4 ; MUBUF-NEXT: buffer_load_dword v1, v40, s[36:39], 0 offen offset:4
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llvm/test/CodeGen/AMDGPU/store-local.128.ll

Show First 20 Lines • Show All 430 Lines • ▼ Show 20 Lines
define amdgpu_kernel void @store_lds_v4i32_align8(<4 x i32> addrspace(3)* %out, <4 x i32> %x) { define amdgpu_kernel void @store_lds_v4i32_align8(<4 x i32> addrspace(3)* %out, <4 x i32> %x) {
; GFX9-LABEL: store_lds_v4i32_align8: ; GFX9-LABEL: store_lds_v4i32_align8:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dword s2, s[0:1], 0x24 ; GFX9-NEXT: s_load_dword s2, s[0:1], 0x24
; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34 ; GFX9-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
; GFX9-NEXT: s_waitcnt lgkmcnt(0) ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
; GFX9-NEXT: v_mov_b32_e32 v4, s2 ; GFX9-NEXT: v_mov_b32_e32 v4, s2
; GFX9-NEXT: v_mov_b32_e32 v0, s4 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NEXT: v_mov_b32_e32 v2, s6
; GFX9-NEXT: v_mov_b32_e32 v1, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NEXT: v_mov_b32_e32 v2, s6
; GFX9-NEXT: v_mov_b32_e32 v3, s7 ; GFX9-NEXT: v_mov_b32_e32 v3, s7
; GFX9-NEXT: ds_write2_b64 v4, v[0:1], v[2:3] offset1:1 ; GFX9-NEXT: ds_write2_b64 v4, v[0:1], v[2:3] offset1:1
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX7-LABEL: store_lds_v4i32_align8: ; GFX7-LABEL: store_lds_v4i32_align8:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dword s4, s[0:1], 0x9 ; GFX7-NEXT: s_load_dword s4, s[0:1], 0x9
; GFX7-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0xd ; GFX7-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0xd
; GFX7-NEXT: s_mov_b32 m0, -1 ; GFX7-NEXT: s_mov_b32 m0, -1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v4, s4 ; GFX7-NEXT: v_mov_b32_e32 v4, s4
; GFX7-NEXT: v_mov_b32_e32 v0, s0 ; GFX7-NEXT: v_mov_b32_e32 v0, s0
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s1 ; GFX7-NEXT: v_mov_b32_e32 v1, s1
; GFX7-NEXT: v_mov_b32_e32 v2, s2
; GFX7-NEXT: v_mov_b32_e32 v3, s3 ; GFX7-NEXT: v_mov_b32_e32 v3, s3
; GFX7-NEXT: ds_write2_b64 v4, v[0:1], v[2:3] offset1:1 ; GFX7-NEXT: ds_write2_b64 v4, v[0:1], v[2:3] offset1:1
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
; ;
; GFX6-LABEL: store_lds_v4i32_align8: ; GFX6-LABEL: store_lds_v4i32_align8:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
; GFX6-NEXT: s_load_dword s4, s[0:1], 0x9 ; GFX6-NEXT: s_load_dword s4, s[0:1], 0x9
; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0xd ; GFX6-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0xd
Show All 10 Lines
; GFX10-LABEL: store_lds_v4i32_align8: ; GFX10-LABEL: store_lds_v4i32_align8:
; GFX10: ; %bb.0: ; GFX10: ; %bb.0:
; GFX10-NEXT: s_clause 0x1 ; GFX10-NEXT: s_clause 0x1
; GFX10-NEXT: s_load_dword s2, s[0:1], 0x24 ; GFX10-NEXT: s_load_dword s2, s[0:1], 0x24
; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
; GFX10-NEXT: s_waitcnt lgkmcnt(0) ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
; GFX10-NEXT: v_mov_b32_e32 v4, s2 ; GFX10-NEXT: v_mov_b32_e32 v4, s2
; GFX10-NEXT: v_mov_b32_e32 v0, s4 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
; GFX10-NEXT: v_mov_b32_e32 v2, s6
; GFX10-NEXT: v_mov_b32_e32 v1, s5 ; GFX10-NEXT: v_mov_b32_e32 v1, s5
; GFX10-NEXT: v_mov_b32_e32 v2, s6
; GFX10-NEXT: v_mov_b32_e32 v3, s7 ; GFX10-NEXT: v_mov_b32_e32 v3, s7
; GFX10-NEXT: ds_write2_b64 v4, v[0:1], v[2:3] offset1:1 ; GFX10-NEXT: ds_write2_b64 v4, v[0:1], v[2:3] offset1:1
; GFX10-NEXT: s_endpgm ; GFX10-NEXT: s_endpgm
store <4 x i32> %x, <4 x i32> addrspace(3)* %out, align 8 store <4 x i32> %x, <4 x i32> addrspace(3)* %out, align 8
ret void ret void
} }
define amdgpu_kernel void @store_lds_v4i32_align16(<4 x i32> addrspace(3)* %out, <4 x i32> %x) { define amdgpu_kernel void @store_lds_v4i32_align16(<4 x i32> addrspace(3)* %out, <4 x i32> %x) {
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llvm/test/CodeGen/AMDGPU/store-weird-sizes.ll

Show First 20 Lines • Show All 190 Lines • ▼ Show 20 Lines
; HAWAII-LABEL: local_store_i65: ; HAWAII-LABEL: local_store_i65:
; HAWAII: ; %bb.0: ; HAWAII: ; %bb.0:
; HAWAII-NEXT: s_load_dword s2, s[4:5], 0x0 ; HAWAII-NEXT: s_load_dword s2, s[4:5], 0x0
; HAWAII-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2 ; HAWAII-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
; HAWAII-NEXT: s_load_dword s3, s[4:5], 0x4 ; HAWAII-NEXT: s_load_dword s3, s[4:5], 0x4
; HAWAII-NEXT: s_mov_b32 m0, -1 ; HAWAII-NEXT: s_mov_b32 m0, -1
; HAWAII-NEXT: s_waitcnt lgkmcnt(0) ; HAWAII-NEXT: s_waitcnt lgkmcnt(0)
; HAWAII-NEXT: v_mov_b32_e32 v2, s2 ; HAWAII-NEXT: v_mov_b32_e32 v2, s2
; HAWAII-NEXT: v_mov_b32_e32 v1, s1
; HAWAII-NEXT: s_and_b32 s3, s3, 1 ; HAWAII-NEXT: s_and_b32 s3, s3, 1
; HAWAII-NEXT: v_mov_b32_e32 v0, s3 ; HAWAII-NEXT: v_mov_b32_e32 v0, s3
; HAWAII-NEXT: ds_write_b8 v2, v0 offset:8 ; HAWAII-NEXT: ds_write_b8 v2, v0 offset:8
; HAWAII-NEXT: v_mov_b32_e32 v0, s0 ; HAWAII-NEXT: v_mov_b32_e32 v0, s0
; HAWAII-NEXT: v_mov_b32_e32 v1, s1
; HAWAII-NEXT: ds_write_b64 v2, v[0:1] ; HAWAII-NEXT: ds_write_b64 v2, v[0:1]
; HAWAII-NEXT: s_endpgm ; HAWAII-NEXT: s_endpgm
; ;
; FIJI-LABEL: local_store_i65: ; FIJI-LABEL: local_store_i65:
; FIJI: ; %bb.0: ; FIJI: ; %bb.0:
; FIJI-NEXT: s_load_dword s2, s[4:5], 0x0 ; FIJI-NEXT: s_load_dword s2, s[4:5], 0x0
; FIJI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; FIJI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
; FIJI-NEXT: s_load_dword s3, s[4:5], 0x10 ; FIJI-NEXT: s_load_dword s3, s[4:5], 0x10
; FIJI-NEXT: s_mov_b32 m0, -1 ; FIJI-NEXT: s_mov_b32 m0, -1
; FIJI-NEXT: s_waitcnt lgkmcnt(0) ; FIJI-NEXT: s_waitcnt lgkmcnt(0)
; FIJI-NEXT: v_mov_b32_e32 v2, s2 ; FIJI-NEXT: v_mov_b32_e32 v2, s2
; FIJI-NEXT: v_mov_b32_e32 v1, s1
; FIJI-NEXT: s_and_b32 s3, s3, 1 ; FIJI-NEXT: s_and_b32 s3, s3, 1
; FIJI-NEXT: v_mov_b32_e32 v0, s3 ; FIJI-NEXT: v_mov_b32_e32 v0, s3
; FIJI-NEXT: ds_write_b8 v2, v0 offset:8 ; FIJI-NEXT: ds_write_b8 v2, v0 offset:8
; FIJI-NEXT: v_mov_b32_e32 v0, s0 ; FIJI-NEXT: v_mov_b32_e32 v0, s0
; FIJI-NEXT: v_mov_b32_e32 v1, s1
; FIJI-NEXT: ds_write_b64 v2, v[0:1] ; FIJI-NEXT: ds_write_b64 v2, v[0:1]
; FIJI-NEXT: s_endpgm ; FIJI-NEXT: s_endpgm
; ;
; GFX9-LABEL: local_store_i65: ; GFX9-LABEL: local_store_i65:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0 ; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0
; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
; GFX9-NEXT: s_load_dword s3, s[4:5], 0x10 ; GFX9-NEXT: s_load_dword s3, s[4:5], 0x10
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llvm/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -march=amdgcn -mcpu=tahiti -amdgpu-dce-in-ra=0 -o - %s | FileCheck %s ; RUN: llc -march=amdgcn -mcpu=tahiti -amdgpu-dce-in-ra=0 -o - %s | FileCheck %s
; Don't crash when the use of an undefined value is only detected by the ; Don't crash when the use of an undefined value is only detected by the
; register coalescer because it is hidden with subregister insert/extract. ; register coalescer because it is hidden with subregister insert/extract.
target triple="amdgcn--" target triple="amdgcn--"
define amdgpu_kernel void @foobar(float %a0, float %a1, float addrspace(1)* %out) nounwind { define amdgpu_kernel void @foobar(float %a0, float %a1, float addrspace(1)* %out) nounwind {
; CHECK-LABEL: foobar: ; CHECK-LABEL: foobar:
; CHECK: ; %bb.0: ; %entry ; CHECK: ; %bb.0: ; %entry
; CHECK-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9 ; CHECK-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x9
; CHECK-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb ; CHECK-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0xb
; CHECK-NEXT: v_mbcnt_lo_u32_b32_e64 v0, -1, 0 ; CHECK-NEXT: v_mbcnt_lo_u32_b32_e64 v0, -1, 0
; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
; CHECK-NEXT: s_mov_b32 s2, -1 ; CHECK-NEXT: s_mov_b32 s2, -1
; CHECK-NEXT: v_cmp_eq_u32_e32 vcc, 0, v0
; CHECK-NEXT: s_waitcnt lgkmcnt(0) ; CHECK-NEXT: s_waitcnt lgkmcnt(0)
; CHECK-NEXT: v_mov_b32_e32 v0, s4 ; CHECK-NEXT: v_mov_b32_e32 v0, s4
; CHECK-NEXT: v_mov_b32_e32 v1, s5 ; CHECK-NEXT: v_mov_b32_e32 v1, s5
; CHECK-NEXT: v_mov_b32_e32 v2, s6
; CHECK-NEXT: v_mov_b32_e32 v3, s7
; CHECK-NEXT: s_and_saveexec_b64 s[6:7], vcc ; CHECK-NEXT: s_and_saveexec_b64 s[6:7], vcc
; CHECK-NEXT: ; %bb.1: ; %ift ; CHECK-NEXT: ; %bb.1: ; %ift
; CHECK-NEXT: s_mov_b32 s4, s5 ; CHECK-NEXT: s_mov_b32 s4, s5
; CHECK-NEXT: v_mov_b32_e32 v0, s4 ; CHECK-NEXT: v_mov_b32_e32 v0, s4
; CHECK-NEXT: v_mov_b32_e32 v1, s5
; CHECK-NEXT: v_mov_b32_e32 v2, s6 ; CHECK-NEXT: v_mov_b32_e32 v2, s6
; CHECK-NEXT: v_mov_b32_e32 v3, s7 ; CHECK-NEXT: v_mov_b32_e32 v3, s7
; CHECK-NEXT: ; %bb.2: ; %ife ; CHECK-NEXT: ; %bb.2: ; %ife
; CHECK-NEXT: s_or_b64 exec, exec, s[6:7] ; CHECK-NEXT: s_or_b64 exec, exec, s[6:7]
; CHECK-NEXT: s_mov_b32 s3, 0xf000 ; CHECK-NEXT: s_mov_b32 s3, 0xf000
; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], 0 ; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], 0
; CHECK-NEXT: s_endpgm ; CHECK-NEXT: s_endpgm
Show All 25 Lines

llvm/test/CodeGen/AMDGPU/trap-abis.ll

Show First 20 Lines • Show All 483 Lines • ▼ Show 20 Lines
; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v0, s0 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v0, s0
; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v1, s1 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v1, s1
; HSA-TRAP-GFX803-V2-NEXT: flat_load_dword v0, v[0:1] glc ; HSA-TRAP-GFX803-V2-NEXT: flat_load_dword v0, v[0:1] glc
; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt vmcnt(0) ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt vmcnt(0)
; HSA-TRAP-GFX803-V2-NEXT: v_cmp_eq_u32_e32 vcc, -1, v0 ; HSA-TRAP-GFX803-V2-NEXT: v_cmp_eq_u32_e32 vcc, -1, v0
; HSA-TRAP-GFX803-V2-NEXT: s_and_b64 vcc, exec, vcc ; HSA-TRAP-GFX803-V2-NEXT: s_and_b64 vcc, exec, vcc
; HSA-TRAP-GFX803-V2-NEXT: s_cbranch_vccz BB1_2 ; HSA-TRAP-GFX803-V2-NEXT: s_cbranch_vccz BB1_2
; HSA-TRAP-GFX803-V2-NEXT: ; %bb.1: ; %ret ; HSA-TRAP-GFX803-V2-NEXT: ; %bb.1: ; %ret
; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v0, s0
; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v2, 3 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v2, 3
; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v0, s0
; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v1, s1 ; HSA-TRAP-GFX803-V2-NEXT: v_mov_b32_e32 v1, s1
; HSA-TRAP-GFX803-V2-NEXT: flat_store_dword v[0:1], v2 ; HSA-TRAP-GFX803-V2-NEXT: flat_store_dword v[0:1], v2
; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt vmcnt(0) ; HSA-TRAP-GFX803-V2-NEXT: s_waitcnt vmcnt(0)
; HSA-TRAP-GFX803-V2-NEXT: s_endpgm ; HSA-TRAP-GFX803-V2-NEXT: s_endpgm
; HSA-TRAP-GFX803-V2-NEXT: BB1_2: ; %trap ; HSA-TRAP-GFX803-V2-NEXT: BB1_2: ; %trap
; HSA-TRAP-GFX803-V2-NEXT: s_mov_b64 s[0:1], s[4:5] ; HSA-TRAP-GFX803-V2-NEXT: s_mov_b64 s[0:1], s[4:5]
; HSA-TRAP-GFX803-V2-NEXT: s_trap 2 ; HSA-TRAP-GFX803-V2-NEXT: s_trap 2
; ;
; HSA-TRAP-GFX803-V3-LABEL: non_entry_trap: ; HSA-TRAP-GFX803-V3-LABEL: non_entry_trap:
; HSA-TRAP-GFX803-V3: ; %bb.0: ; %entry ; HSA-TRAP-GFX803-V3: ; %bb.0: ; %entry
; HSA-TRAP-GFX803-V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0 ; HSA-TRAP-GFX803-V3-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt lgkmcnt(0) ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt lgkmcnt(0)
; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v0, s0 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v0, s0
; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v1, s1 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v1, s1
; HSA-TRAP-GFX803-V3-NEXT: flat_load_dword v0, v[0:1] glc ; HSA-TRAP-GFX803-V3-NEXT: flat_load_dword v0, v[0:1] glc
; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt vmcnt(0) ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt vmcnt(0)
; HSA-TRAP-GFX803-V3-NEXT: v_cmp_eq_u32_e32 vcc, -1, v0 ; HSA-TRAP-GFX803-V3-NEXT: v_cmp_eq_u32_e32 vcc, -1, v0
; HSA-TRAP-GFX803-V3-NEXT: s_and_b64 vcc, exec, vcc ; HSA-TRAP-GFX803-V3-NEXT: s_and_b64 vcc, exec, vcc
; HSA-TRAP-GFX803-V3-NEXT: s_cbranch_vccz BB1_2 ; HSA-TRAP-GFX803-V3-NEXT: s_cbranch_vccz BB1_2
; HSA-TRAP-GFX803-V3-NEXT: ; %bb.1: ; %ret ; HSA-TRAP-GFX803-V3-NEXT: ; %bb.1: ; %ret
; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v0, s0
; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v2, 3 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v2, 3
; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v0, s0
; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v1, s1 ; HSA-TRAP-GFX803-V3-NEXT: v_mov_b32_e32 v1, s1
; HSA-TRAP-GFX803-V3-NEXT: flat_store_dword v[0:1], v2 ; HSA-TRAP-GFX803-V3-NEXT: flat_store_dword v[0:1], v2
; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt vmcnt(0) ; HSA-TRAP-GFX803-V3-NEXT: s_waitcnt vmcnt(0)
; HSA-TRAP-GFX803-V3-NEXT: s_endpgm ; HSA-TRAP-GFX803-V3-NEXT: s_endpgm
; HSA-TRAP-GFX803-V3-NEXT: BB1_2: ; %trap ; HSA-TRAP-GFX803-V3-NEXT: BB1_2: ; %trap
; HSA-TRAP-GFX803-V3-NEXT: s_mov_b64 s[0:1], s[4:5] ; HSA-TRAP-GFX803-V3-NEXT: s_mov_b64 s[0:1], s[4:5]
; HSA-TRAP-GFX803-V3-NEXT: s_trap 2 ; HSA-TRAP-GFX803-V3-NEXT: s_trap 2
; ;
; HSA-TRAP-GFX803-V4-LABEL: non_entry_trap: ; HSA-TRAP-GFX803-V4-LABEL: non_entry_trap:
; HSA-TRAP-GFX803-V4: ; %bb.0: ; %entry ; HSA-TRAP-GFX803-V4: ; %bb.0: ; %entry
; HSA-TRAP-GFX803-V4-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0 ; HSA-TRAP-GFX803-V4-NEXT: s_load_dwordx2 s[0:1], s[6:7], 0x0
; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt lgkmcnt(0) ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt lgkmcnt(0)
; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v0, s0 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v0, s0
; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v1, s1 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v1, s1
; HSA-TRAP-GFX803-V4-NEXT: flat_load_dword v0, v[0:1] glc ; HSA-TRAP-GFX803-V4-NEXT: flat_load_dword v0, v[0:1] glc
; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt vmcnt(0) ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt vmcnt(0)
; HSA-TRAP-GFX803-V4-NEXT: v_cmp_eq_u32_e32 vcc, -1, v0 ; HSA-TRAP-GFX803-V4-NEXT: v_cmp_eq_u32_e32 vcc, -1, v0
; HSA-TRAP-GFX803-V4-NEXT: s_and_b64 vcc, exec, vcc ; HSA-TRAP-GFX803-V4-NEXT: s_and_b64 vcc, exec, vcc
; HSA-TRAP-GFX803-V4-NEXT: s_cbranch_vccz BB1_2 ; HSA-TRAP-GFX803-V4-NEXT: s_cbranch_vccz BB1_2
; HSA-TRAP-GFX803-V4-NEXT: ; %bb.1: ; %ret ; HSA-TRAP-GFX803-V4-NEXT: ; %bb.1: ; %ret
; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v0, s0
; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v2, 3 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v2, 3
; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v0, s0
; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v1, s1 ; HSA-TRAP-GFX803-V4-NEXT: v_mov_b32_e32 v1, s1
; HSA-TRAP-GFX803-V4-NEXT: flat_store_dword v[0:1], v2 ; HSA-TRAP-GFX803-V4-NEXT: flat_store_dword v[0:1], v2
; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt vmcnt(0) ; HSA-TRAP-GFX803-V4-NEXT: s_waitcnt vmcnt(0)
; HSA-TRAP-GFX803-V4-NEXT: s_endpgm ; HSA-TRAP-GFX803-V4-NEXT: s_endpgm
; HSA-TRAP-GFX803-V4-NEXT: BB1_2: ; %trap ; HSA-TRAP-GFX803-V4-NEXT: BB1_2: ; %trap
; HSA-TRAP-GFX803-V4-NEXT: s_mov_b64 s[0:1], s[4:5] ; HSA-TRAP-GFX803-V4-NEXT: s_mov_b64 s[0:1], s[4:5]
; HSA-TRAP-GFX803-V4-NEXT: s_trap 2 ; HSA-TRAP-GFX803-V4-NEXT: s_trap 2
; ;
▲ Show 20 Lines • Show All 636 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/udiv64.ll

Show First 20 Lines • Show All 148 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17] ; GCN-IR-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17]
; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[16:17], s[8:9], 63 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[16:17], s[8:9], 63
; GCN-IR-NEXT: s_xor_b64 s[18:19], s[14:15], -1 ; GCN-IR-NEXT: s_xor_b64 s[18:19], s[14:15], -1
; GCN-IR-NEXT: s_and_b64 s[16:17], s[18:19], s[16:17] ; GCN-IR-NEXT: s_and_b64 s[16:17], s[18:19], s[16:17]
; GCN-IR-NEXT: s_and_b64 vcc, exec, s[16:17] ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[16:17]
; GCN-IR-NEXT: s_cbranch_vccz BB0_5 ; GCN-IR-NEXT: s_cbranch_vccz BB0_5
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
; GCN-IR-NEXT: s_add_u32 s14, s8, 1 ; GCN-IR-NEXT: s_add_u32 s14, s8, 1
; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: s_addc_u32 s15, s9, 0 ; GCN-IR-NEXT: s_addc_u32 s15, s9, 0
; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: v_mov_b32_e32 v1, s9 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s9
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[14:15], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[14:15], v[0:1]
; GCN-IR-NEXT: s_sub_i32 s8, 63, s8 ; GCN-IR-NEXT: s_sub_i32 s8, 63, s8
; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_lshl_b64 s[8:9], s[6:7], s8 ; GCN-IR-NEXT: s_lshl_b64 s[8:9], s[6:7], s8
; GCN-IR-NEXT: s_cbranch_vccz BB0_4 ; GCN-IR-NEXT: s_cbranch_vccz BB0_4
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: s_lshr_b64 s[14:15], s[6:7], s14 ; GCN-IR-NEXT: s_lshr_b64 s[14:15], s[6:7], s14
Show All 14 Lines
; GCN-IR-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9] ; GCN-IR-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9]
; GCN-IR-NEXT: s_sub_u32 s2, s16, s12 ; GCN-IR-NEXT: s_sub_u32 s2, s16, s12
; GCN-IR-NEXT: s_subb_u32 s2, s17, s13 ; GCN-IR-NEXT: s_subb_u32 s2, s17, s13
; GCN-IR-NEXT: s_ashr_i32 s10, s2, 31 ; GCN-IR-NEXT: s_ashr_i32 s10, s2, 31
; GCN-IR-NEXT: s_mov_b32 s11, s10 ; GCN-IR-NEXT: s_mov_b32 s11, s10
; GCN-IR-NEXT: s_and_b32 s2, s10, 1 ; GCN-IR-NEXT: s_and_b32 s2, s10, 1
; GCN-IR-NEXT: s_and_b64 s[14:15], s[10:11], s[0:1] ; GCN-IR-NEXT: s_and_b64 s[14:15], s[10:11], s[0:1]
; GCN-IR-NEXT: s_sub_u32 s14, s12, s14 ; GCN-IR-NEXT: s_sub_u32 s14, s12, s14
; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
; GCN-IR-NEXT: s_subb_u32 s15, s13, s15 ; GCN-IR-NEXT: s_subb_u32 s15, s13, s15
; GCN-IR-NEXT: v_mov_b32_e32 v1, s7 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
; GCN-IR-NEXT: s_add_u32 s6, s6, 1 ; GCN-IR-NEXT: s_add_u32 s6, s6, 1
; GCN-IR-NEXT: v_mov_b32_e32 v1, s7
; GCN-IR-NEXT: s_addc_u32 s7, s7, 0 ; GCN-IR-NEXT: s_addc_u32 s7, s7, 0
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1]
; GCN-IR-NEXT: s_mov_b64 s[10:11], s[2:3] ; GCN-IR-NEXT: s_mov_b64 s[10:11], s[2:3]
; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_cbranch_vccz BB0_3 ; GCN-IR-NEXT: s_cbranch_vccz BB0_3
; GCN-IR-NEXT: BB0_4: ; %Flow6 ; GCN-IR-NEXT: BB0_4: ; %Flow6
; GCN-IR-NEXT: s_lshl_b64 s[0:1], s[8:9], 1 ; GCN-IR-NEXT: s_lshl_b64 s[0:1], s[8:9], 1
; GCN-IR-NEXT: s_or_b64 s[0:1], s[2:3], s[0:1] ; GCN-IR-NEXT: s_or_b64 s[0:1], s[2:3], s[0:1]
▲ Show 20 Lines • Show All 170 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_cbranch_execz BB1_5 ; GCN-IR-NEXT: s_cbranch_execz BB1_5
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: v_add_i32_e32 v14, vcc, -1, v2 ; GCN-IR-NEXT: v_add_i32_e32 v14, vcc, -1, v2
; GCN-IR-NEXT: v_lshr_b64 v[12:13], v[0:1], v12 ; GCN-IR-NEXT: v_lshr_b64 v[12:13], v[0:1], v12
; GCN-IR-NEXT: v_addc_u32_e32 v15, vcc, -1, v3, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v15, vcc, -1, v3, vcc
; GCN-IR-NEXT: v_not_b32_e32 v0, v8 ; GCN-IR-NEXT: v_not_b32_e32 v0, v8
; GCN-IR-NEXT: v_not_b32_e32 v1, v9 ; GCN-IR-NEXT: v_not_b32_e32 v1, v9
; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, v0, v10 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, v0, v10
; GCN-IR-NEXT: v_mov_b32_e32 v8, 0
; GCN-IR-NEXT: v_addc_u32_e32 v1, vcc, v1, v11, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v1, vcc, v1, v11, vcc
; GCN-IR-NEXT: v_mov_b32_e32 v8, 0
; GCN-IR-NEXT: v_mov_b32_e32 v9, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v9, 0
; GCN-IR-NEXT: v_mov_b32_e32 v7, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v7, 0
; GCN-IR-NEXT: BB1_3: ; %udiv-do-while ; GCN-IR-NEXT: BB1_3: ; %udiv-do-while
; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-IR-NEXT: v_lshl_b64 v[10:11], v[12:13], 1 ; GCN-IR-NEXT: v_lshl_b64 v[10:11], v[12:13], 1
; GCN-IR-NEXT: v_lshrrev_b32_e32 v6, 31, v5 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v6, 31, v5
; GCN-IR-NEXT: v_or_b32_e32 v10, v10, v6 ; GCN-IR-NEXT: v_or_b32_e32 v10, v10, v6
; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1 ; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1
; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, v14, v10 ; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, v14, v10
; GCN-IR-NEXT: v_subb_u32_e32 v6, vcc, v15, v11, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v6, vcc, v15, v11, vcc
; GCN-IR-NEXT: v_or_b32_e32 v4, v8, v4 ; GCN-IR-NEXT: v_or_b32_e32 v4, v8, v4
; GCN-IR-NEXT: v_ashrrev_i32_e32 v8, 31, v6 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v8, 31, v6
; GCN-IR-NEXT: v_and_b32_e32 v6, 1, v8 ; GCN-IR-NEXT: v_and_b32_e32 v6, 1, v8
; GCN-IR-NEXT: v_and_b32_e32 v13, v8, v3 ; GCN-IR-NEXT: v_and_b32_e32 v13, v8, v3
; GCN-IR-NEXT: v_and_b32_e32 v12, v8, v2 ; GCN-IR-NEXT: v_and_b32_e32 v12, v8, v2
; GCN-IR-NEXT: v_add_i32_e32 v8, vcc, 1, v0 ; GCN-IR-NEXT: v_add_i32_e32 v8, vcc, 1, v0
; GCN-IR-NEXT: v_or_b32_e32 v5, v9, v5 ; GCN-IR-NEXT: v_or_b32_e32 v5, v9, v5
; GCN-IR-NEXT: v_addc_u32_e32 v9, vcc, 0, v1, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v9, vcc, 0, v1, vcc
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[8:9], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[8:9], v[0:1]
; GCN-IR-NEXT: v_mov_b32_e32 v0, v8
; GCN-IR-NEXT: v_sub_i32_e64 v12, s[4:5], v10, v12 ; GCN-IR-NEXT: v_sub_i32_e64 v12, s[4:5], v10, v12
; GCN-IR-NEXT: v_mov_b32_e32 v1, v9
; GCN-IR-NEXT: v_mov_b32_e32 v9, v7
; GCN-IR-NEXT: v_subb_u32_e64 v13, s[4:5], v11, v13, s[4:5] ; GCN-IR-NEXT: v_subb_u32_e64 v13, s[4:5], v11, v13, s[4:5]
; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
; GCN-IR-NEXT: v_mov_b32_e32 v0, v8
; GCN-IR-NEXT: v_mov_b32_e32 v1, v9
; GCN-IR-NEXT: v_mov_b32_e32 v9, v7
; GCN-IR-NEXT: v_mov_b32_e32 v8, v6 ; GCN-IR-NEXT: v_mov_b32_e32 v8, v6
; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: s_cbranch_execnz BB1_3 ; GCN-IR-NEXT: s_cbranch_execnz BB1_3
; GCN-IR-NEXT: ; %bb.4: ; %Flow ; GCN-IR-NEXT: ; %bb.4: ; %Flow
; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: BB1_5: ; %Flow3 ; GCN-IR-NEXT: BB1_5: ; %Flow3
; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[4:5], 1 ; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[4:5], 1
▲ Show 20 Lines • Show All 432 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17] ; GCN-IR-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17]
; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[16:17], s[8:9], 63 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[16:17], s[8:9], 63
; GCN-IR-NEXT: s_xor_b64 s[18:19], s[14:15], -1 ; GCN-IR-NEXT: s_xor_b64 s[18:19], s[14:15], -1
; GCN-IR-NEXT: s_and_b64 s[16:17], s[18:19], s[16:17] ; GCN-IR-NEXT: s_and_b64 s[16:17], s[18:19], s[16:17]
; GCN-IR-NEXT: s_and_b64 vcc, exec, s[16:17] ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[16:17]
; GCN-IR-NEXT: s_cbranch_vccz BB7_5 ; GCN-IR-NEXT: s_cbranch_vccz BB7_5
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
; GCN-IR-NEXT: s_add_u32 s14, s8, 1 ; GCN-IR-NEXT: s_add_u32 s14, s8, 1
; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: s_addc_u32 s15, s9, 0 ; GCN-IR-NEXT: s_addc_u32 s15, s9, 0
; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: v_mov_b32_e32 v1, s9 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s9
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[14:15], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[14:15], v[0:1]
; GCN-IR-NEXT: s_sub_i32 s8, 63, s8 ; GCN-IR-NEXT: s_sub_i32 s8, 63, s8
; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_lshl_b64 s[8:9], s[6:7], s8 ; GCN-IR-NEXT: s_lshl_b64 s[8:9], s[6:7], s8
; GCN-IR-NEXT: s_cbranch_vccz BB7_4 ; GCN-IR-NEXT: s_cbranch_vccz BB7_4
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: s_lshr_b64 s[14:15], s[6:7], s14 ; GCN-IR-NEXT: s_lshr_b64 s[14:15], s[6:7], s14
Show All 14 Lines
; GCN-IR-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9] ; GCN-IR-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9]
; GCN-IR-NEXT: s_sub_u32 s0, s16, s12 ; GCN-IR-NEXT: s_sub_u32 s0, s16, s12
; GCN-IR-NEXT: s_subb_u32 s0, s17, s13 ; GCN-IR-NEXT: s_subb_u32 s0, s17, s13
; GCN-IR-NEXT: s_ashr_i32 s10, s0, 31 ; GCN-IR-NEXT: s_ashr_i32 s10, s0, 31
; GCN-IR-NEXT: s_mov_b32 s11, s10 ; GCN-IR-NEXT: s_mov_b32 s11, s10
; GCN-IR-NEXT: s_and_b32 s0, s10, 1 ; GCN-IR-NEXT: s_and_b32 s0, s10, 1
; GCN-IR-NEXT: s_and_b64 s[14:15], s[10:11], s[2:3] ; GCN-IR-NEXT: s_and_b64 s[14:15], s[10:11], s[2:3]
; GCN-IR-NEXT: s_sub_u32 s14, s12, s14 ; GCN-IR-NEXT: s_sub_u32 s14, s12, s14
; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
; GCN-IR-NEXT: s_subb_u32 s15, s13, s15 ; GCN-IR-NEXT: s_subb_u32 s15, s13, s15
; GCN-IR-NEXT: v_mov_b32_e32 v1, s7 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
; GCN-IR-NEXT: s_add_u32 s6, s6, 1 ; GCN-IR-NEXT: s_add_u32 s6, s6, 1
; GCN-IR-NEXT: v_mov_b32_e32 v1, s7
; GCN-IR-NEXT: s_addc_u32 s7, s7, 0 ; GCN-IR-NEXT: s_addc_u32 s7, s7, 0
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1]
; GCN-IR-NEXT: s_mov_b64 s[10:11], s[0:1] ; GCN-IR-NEXT: s_mov_b64 s[10:11], s[0:1]
; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_cbranch_vccz BB7_3 ; GCN-IR-NEXT: s_cbranch_vccz BB7_3
; GCN-IR-NEXT: BB7_4: ; %Flow3 ; GCN-IR-NEXT: BB7_4: ; %Flow3
; GCN-IR-NEXT: s_lshl_b64 s[2:3], s[8:9], 1 ; GCN-IR-NEXT: s_lshl_b64 s[2:3], s[8:9], 1
; GCN-IR-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3] ; GCN-IR-NEXT: s_or_b64 s[0:1], s[0:1], s[2:3]
▲ Show 20 Lines • Show All 144 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_or_b64 s[10:11], s[10:11], s[12:13] ; GCN-IR-NEXT: s_or_b64 s[10:11], s[10:11], s[12:13]
; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[12:13], s[8:9], 63 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[12:13], s[8:9], 63
; GCN-IR-NEXT: s_xor_b64 s[14:15], s[10:11], -1 ; GCN-IR-NEXT: s_xor_b64 s[14:15], s[10:11], -1
; GCN-IR-NEXT: s_and_b64 s[12:13], s[14:15], s[12:13] ; GCN-IR-NEXT: s_and_b64 s[12:13], s[14:15], s[12:13]
; GCN-IR-NEXT: s_and_b64 vcc, exec, s[12:13] ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[12:13]
; GCN-IR-NEXT: s_cbranch_vccz BB8_5 ; GCN-IR-NEXT: s_cbranch_vccz BB8_5
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
; GCN-IR-NEXT: s_add_u32 s10, s8, 1 ; GCN-IR-NEXT: s_add_u32 s10, s8, 1
; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: s_addc_u32 s11, s9, 0 ; GCN-IR-NEXT: s_addc_u32 s11, s9, 0
; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: v_mov_b32_e32 v1, s9 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s9
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1]
; GCN-IR-NEXT: s_sub_i32 s7, 63, s8 ; GCN-IR-NEXT: s_sub_i32 s7, 63, s8
; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_lshl_b64 s[8:9], 24, s7 ; GCN-IR-NEXT: s_lshl_b64 s[8:9], 24, s7
; GCN-IR-NEXT: s_cbranch_vccz BB8_4 ; GCN-IR-NEXT: s_cbranch_vccz BB8_4
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: s_lshr_b64 s[12:13], 24, s10 ; GCN-IR-NEXT: s_lshr_b64 s[12:13], 24, s10
Show All 12 Lines
; GCN-IR-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9] ; GCN-IR-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9]
; GCN-IR-NEXT: s_sub_u32 s4, s14, s12 ; GCN-IR-NEXT: s_sub_u32 s4, s14, s12
; GCN-IR-NEXT: s_subb_u32 s4, s15, s13 ; GCN-IR-NEXT: s_subb_u32 s4, s15, s13
; GCN-IR-NEXT: s_ashr_i32 s10, s4, 31 ; GCN-IR-NEXT: s_ashr_i32 s10, s4, 31
; GCN-IR-NEXT: s_mov_b32 s11, s10 ; GCN-IR-NEXT: s_mov_b32 s11, s10
; GCN-IR-NEXT: s_and_b32 s4, s10, 1 ; GCN-IR-NEXT: s_and_b32 s4, s10, 1
; GCN-IR-NEXT: s_and_b64 s[16:17], s[10:11], s[2:3] ; GCN-IR-NEXT: s_and_b64 s[16:17], s[10:11], s[2:3]
; GCN-IR-NEXT: s_sub_u32 s12, s12, s16 ; GCN-IR-NEXT: s_sub_u32 s12, s12, s16
; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
; GCN-IR-NEXT: s_subb_u32 s13, s13, s17 ; GCN-IR-NEXT: s_subb_u32 s13, s13, s17
; GCN-IR-NEXT: v_mov_b32_e32 v1, s7 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
; GCN-IR-NEXT: s_add_u32 s6, s6, 1 ; GCN-IR-NEXT: s_add_u32 s6, s6, 1
; GCN-IR-NEXT: v_mov_b32_e32 v1, s7
; GCN-IR-NEXT: s_addc_u32 s7, s7, 0 ; GCN-IR-NEXT: s_addc_u32 s7, s7, 0
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1]
; GCN-IR-NEXT: s_mov_b64 s[10:11], s[4:5] ; GCN-IR-NEXT: s_mov_b64 s[10:11], s[4:5]
; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_cbranch_vccz BB8_3 ; GCN-IR-NEXT: s_cbranch_vccz BB8_3
; GCN-IR-NEXT: BB8_4: ; %Flow5 ; GCN-IR-NEXT: BB8_4: ; %Flow5
; GCN-IR-NEXT: s_lshl_b64 s[2:3], s[8:9], 1 ; GCN-IR-NEXT: s_lshl_b64 s[2:3], s[8:9], 1
; GCN-IR-NEXT: s_or_b64 s[2:3], s[4:5], s[2:3] ; GCN-IR-NEXT: s_or_b64 s[2:3], s[4:5], s[2:3]
▲ Show 20 Lines • Show All 152 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5] ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
; GCN-IR-NEXT: s_cbranch_execz BB9_5 ; GCN-IR-NEXT: s_cbranch_execz BB9_5
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, -1, v0 ; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, -1, v0
; GCN-IR-NEXT: s_mov_b64 s[4:5], 0x8000 ; GCN-IR-NEXT: s_mov_b64 s[4:5], 0x8000
; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, -1, v1, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, -1, v1, vcc
; GCN-IR-NEXT: v_lshr_b64 v[8:9], s[4:5], v8 ; GCN-IR-NEXT: v_lshr_b64 v[8:9], s[4:5], v8
; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, 47, v6 ; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, 47, v6
; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
; GCN-IR-NEXT: v_subb_u32_e32 v7, vcc, 0, v7, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v7, vcc, 0, v7, vcc
; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
; GCN-IR-NEXT: v_mov_b32_e32 v11, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v11, 0
; GCN-IR-NEXT: v_mov_b32_e32 v5, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
; GCN-IR-NEXT: BB9_3: ; %udiv-do-while ; GCN-IR-NEXT: BB9_3: ; %udiv-do-while
; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-IR-NEXT: v_lshl_b64 v[8:9], v[8:9], 1 ; GCN-IR-NEXT: v_lshl_b64 v[8:9], v[8:9], 1
; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3
; GCN-IR-NEXT: v_or_b32_e32 v8, v8, v4 ; GCN-IR-NEXT: v_or_b32_e32 v8, v8, v4
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, v12, v8 ; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, v12, v8
; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, v13, v9, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, v13, v9, vcc
; GCN-IR-NEXT: v_or_b32_e32 v2, v10, v2 ; GCN-IR-NEXT: v_or_b32_e32 v2, v10, v2
; GCN-IR-NEXT: v_ashrrev_i32_e32 v10, 31, v4 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v10, 31, v4
; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v10 ; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v10
; GCN-IR-NEXT: v_and_b32_e32 v14, v10, v1 ; GCN-IR-NEXT: v_and_b32_e32 v14, v10, v1
; GCN-IR-NEXT: v_and_b32_e32 v15, v10, v0 ; GCN-IR-NEXT: v_and_b32_e32 v15, v10, v0
; GCN-IR-NEXT: v_add_i32_e32 v10, vcc, 1, v6 ; GCN-IR-NEXT: v_add_i32_e32 v10, vcc, 1, v6
; GCN-IR-NEXT: v_or_b32_e32 v3, v11, v3 ; GCN-IR-NEXT: v_or_b32_e32 v3, v11, v3
; GCN-IR-NEXT: v_addc_u32_e32 v11, vcc, 0, v7, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v11, vcc, 0, v7, vcc
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[10:11], v[6:7] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[10:11], v[6:7]
; GCN-IR-NEXT: v_mov_b32_e32 v6, v10
; GCN-IR-NEXT: v_sub_i32_e64 v8, s[4:5], v8, v15 ; GCN-IR-NEXT: v_sub_i32_e64 v8, s[4:5], v8, v15
; GCN-IR-NEXT: v_mov_b32_e32 v7, v11
; GCN-IR-NEXT: v_mov_b32_e32 v11, v5
; GCN-IR-NEXT: v_subb_u32_e64 v9, s[4:5], v9, v14, s[4:5] ; GCN-IR-NEXT: v_subb_u32_e64 v9, s[4:5], v9, v14, s[4:5]
; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
; GCN-IR-NEXT: v_mov_b32_e32 v6, v10
; GCN-IR-NEXT: v_mov_b32_e32 v7, v11
; GCN-IR-NEXT: v_mov_b32_e32 v11, v5
; GCN-IR-NEXT: v_mov_b32_e32 v10, v4 ; GCN-IR-NEXT: v_mov_b32_e32 v10, v4
; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: s_cbranch_execnz BB9_3 ; GCN-IR-NEXT: s_cbranch_execnz BB9_3
; GCN-IR-NEXT: ; %bb.4: ; %Flow ; GCN-IR-NEXT: ; %bb.4: ; %Flow
; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: BB9_5: ; %Flow3 ; GCN-IR-NEXT: BB9_5: ; %Flow3
; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[2:3], 1 ; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[2:3], 1
▲ Show 20 Lines • Show All 45 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: v_mov_b32_e32 v5, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
; GCN-IR-NEXT: s_mov_b64 s[10:11], 0 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5] ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
; GCN-IR-NEXT: s_cbranch_execz BB10_5 ; GCN-IR-NEXT: s_cbranch_execz BB10_5
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: v_lshr_b64 v[7:8], v[0:1], v7 ; GCN-IR-NEXT: v_lshr_b64 v[7:8], v[0:1], v7
; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, 0xffffffcf, v6 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, 0xffffffcf, v6
; GCN-IR-NEXT: v_mov_b32_e32 v9, 0
; GCN-IR-NEXT: v_addc_u32_e64 v1, s[4:5], 0, -1, vcc ; GCN-IR-NEXT: v_addc_u32_e64 v1, s[4:5], 0, -1, vcc
; GCN-IR-NEXT: v_mov_b32_e32 v9, 0
; GCN-IR-NEXT: v_mov_b32_e32 v10, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
; GCN-IR-NEXT: v_mov_b32_e32 v5, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
; GCN-IR-NEXT: s_movk_i32 s12, 0x7fff ; GCN-IR-NEXT: s_movk_i32 s12, 0x7fff
; GCN-IR-NEXT: BB10_3: ; %udiv-do-while ; GCN-IR-NEXT: BB10_3: ; %udiv-do-while
; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-IR-NEXT: v_lshl_b64 v[7:8], v[7:8], 1 ; GCN-IR-NEXT: v_lshl_b64 v[7:8], v[7:8], 1
; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3
; GCN-IR-NEXT: v_or_b32_e32 v7, v7, v4 ; GCN-IR-NEXT: v_or_b32_e32 v7, v7, v4
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, s12, v7 ; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, s12, v7
; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, 0, v8, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, 0, v8, vcc
; GCN-IR-NEXT: v_or_b32_e32 v2, v9, v2 ; GCN-IR-NEXT: v_or_b32_e32 v2, v9, v2
; GCN-IR-NEXT: v_ashrrev_i32_e32 v9, 31, v4 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v9, 31, v4
; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v9 ; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v9
; GCN-IR-NEXT: v_and_b32_e32 v11, 0x8000, v9 ; GCN-IR-NEXT: v_and_b32_e32 v11, 0x8000, v9
; GCN-IR-NEXT: v_add_i32_e32 v9, vcc, 1, v0 ; GCN-IR-NEXT: v_add_i32_e32 v9, vcc, 1, v0
; GCN-IR-NEXT: v_or_b32_e32 v3, v10, v3 ; GCN-IR-NEXT: v_or_b32_e32 v3, v10, v3
; GCN-IR-NEXT: v_addc_u32_e32 v10, vcc, 0, v1, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v10, vcc, 0, v1, vcc
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[9:10], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[9:10], v[0:1]
; GCN-IR-NEXT: v_mov_b32_e32 v0, v9
; GCN-IR-NEXT: v_mov_b32_e32 v6, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v6, 0
; GCN-IR-NEXT: v_sub_i32_e64 v7, s[4:5], v7, v11 ; GCN-IR-NEXT: v_sub_i32_e64 v7, s[4:5], v7, v11
; GCN-IR-NEXT: v_mov_b32_e32 v1, v10
; GCN-IR-NEXT: v_mov_b32_e32 v10, v5
; GCN-IR-NEXT: v_subb_u32_e64 v8, s[4:5], v8, v6, s[4:5] ; GCN-IR-NEXT: v_subb_u32_e64 v8, s[4:5], v8, v6, s[4:5]
; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
; GCN-IR-NEXT: v_mov_b32_e32 v0, v9
; GCN-IR-NEXT: v_mov_b32_e32 v1, v10
; GCN-IR-NEXT: v_mov_b32_e32 v10, v5
; GCN-IR-NEXT: v_mov_b32_e32 v9, v4 ; GCN-IR-NEXT: v_mov_b32_e32 v9, v4
; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: s_cbranch_execnz BB10_3 ; GCN-IR-NEXT: s_cbranch_execnz BB10_3
; GCN-IR-NEXT: ; %bb.4: ; %Flow ; GCN-IR-NEXT: ; %bb.4: ; %Flow
; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: BB10_5: ; %Flow3 ; GCN-IR-NEXT: BB10_5: ; %Flow3
; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[2:3], 1 ; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[2:3], 1
▲ Show 20 Lines • Show All 133 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_or_b64 s[10:11], s[10:11], s[12:13] ; GCN-IR-NEXT: s_or_b64 s[10:11], s[10:11], s[12:13]
; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[12:13], s[6:7], 63 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[12:13], s[6:7], 63
; GCN-IR-NEXT: s_xor_b64 s[14:15], s[10:11], -1 ; GCN-IR-NEXT: s_xor_b64 s[14:15], s[10:11], -1
; GCN-IR-NEXT: s_and_b64 s[12:13], s[14:15], s[12:13] ; GCN-IR-NEXT: s_and_b64 s[12:13], s[14:15], s[12:13]
; GCN-IR-NEXT: s_and_b64 vcc, exec, s[12:13] ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[12:13]
; GCN-IR-NEXT: s_cbranch_vccz BB11_5 ; GCN-IR-NEXT: s_cbranch_vccz BB11_5
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
; GCN-IR-NEXT: s_add_u32 s10, s6, 1 ; GCN-IR-NEXT: s_add_u32 s10, s6, 1
; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
; GCN-IR-NEXT: s_addc_u32 s11, s7, 0 ; GCN-IR-NEXT: s_addc_u32 s11, s7, 0
; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
; GCN-IR-NEXT: v_mov_b32_e32 v1, s7 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s7
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1]
; GCN-IR-NEXT: s_sub_i32 s6, 63, s6 ; GCN-IR-NEXT: s_sub_i32 s6, 63, s6
; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[2:3], s6 ; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[2:3], s6
; GCN-IR-NEXT: s_cbranch_vccz BB11_4 ; GCN-IR-NEXT: s_cbranch_vccz BB11_4
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: s_lshr_b64 s[10:11], s[2:3], s10 ; GCN-IR-NEXT: s_lshr_b64 s[10:11], s[2:3], s10
Show All 9 Lines
; GCN-IR-NEXT: s_or_b64 s[10:11], s[10:11], s[4:5] ; GCN-IR-NEXT: s_or_b64 s[10:11], s[10:11], s[4:5]
; GCN-IR-NEXT: s_or_b64 s[6:7], s[8:9], s[6:7] ; GCN-IR-NEXT: s_or_b64 s[6:7], s[8:9], s[6:7]
; GCN-IR-NEXT: s_sub_u32 s4, 23, s10 ; GCN-IR-NEXT: s_sub_u32 s4, 23, s10
; GCN-IR-NEXT: s_subb_u32 s4, 0, s11 ; GCN-IR-NEXT: s_subb_u32 s4, 0, s11
; GCN-IR-NEXT: s_ashr_i32 s8, s4, 31 ; GCN-IR-NEXT: s_ashr_i32 s8, s4, 31
; GCN-IR-NEXT: s_and_b32 s4, s8, 1 ; GCN-IR-NEXT: s_and_b32 s4, s8, 1
; GCN-IR-NEXT: s_and_b32 s8, s8, 24 ; GCN-IR-NEXT: s_and_b32 s8, s8, 24
; GCN-IR-NEXT: s_sub_u32 s10, s10, s8 ; GCN-IR-NEXT: s_sub_u32 s10, s10, s8
; GCN-IR-NEXT: v_mov_b32_e32 v0, s2
; GCN-IR-NEXT: s_subb_u32 s11, s11, 0 ; GCN-IR-NEXT: s_subb_u32 s11, s11, 0
; GCN-IR-NEXT: v_mov_b32_e32 v1, s3 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s2
; GCN-IR-NEXT: s_add_u32 s2, s2, 1 ; GCN-IR-NEXT: s_add_u32 s2, s2, 1
; GCN-IR-NEXT: v_mov_b32_e32 v1, s3
; GCN-IR-NEXT: s_addc_u32 s3, s3, 0 ; GCN-IR-NEXT: s_addc_u32 s3, s3, 0
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[2:3], v[0:1]
; GCN-IR-NEXT: s_mov_b64 s[8:9], s[4:5] ; GCN-IR-NEXT: s_mov_b64 s[8:9], s[4:5]
; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_cbranch_vccz BB11_3 ; GCN-IR-NEXT: s_cbranch_vccz BB11_3
; GCN-IR-NEXT: BB11_4: ; %Flow5 ; GCN-IR-NEXT: BB11_4: ; %Flow5
; GCN-IR-NEXT: s_lshl_b64 s[2:3], s[6:7], 1 ; GCN-IR-NEXT: s_lshl_b64 s[2:3], s[6:7], 1
; GCN-IR-NEXT: s_or_b64 s[2:3], s[4:5], s[2:3] ; GCN-IR-NEXT: s_or_b64 s[2:3], s[4:5], s[2:3]
▲ Show 20 Lines • Show All 146 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: v_mov_b32_e32 v5, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
; GCN-IR-NEXT: s_mov_b64 s[10:11], 0 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5] ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
; GCN-IR-NEXT: s_cbranch_execz BB12_5 ; GCN-IR-NEXT: s_cbranch_execz BB12_5
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: v_lshr_b64 v[7:8], v[0:1], v7 ; GCN-IR-NEXT: v_lshr_b64 v[7:8], v[0:1], v7
; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, 0xffffffc4, v6 ; GCN-IR-NEXT: v_add_i32_e32 v0, vcc, 0xffffffc4, v6
; GCN-IR-NEXT: v_mov_b32_e32 v9, 0
; GCN-IR-NEXT: v_addc_u32_e64 v1, s[4:5], 0, -1, vcc ; GCN-IR-NEXT: v_addc_u32_e64 v1, s[4:5], 0, -1, vcc
; GCN-IR-NEXT: v_mov_b32_e32 v9, 0
; GCN-IR-NEXT: v_mov_b32_e32 v10, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
; GCN-IR-NEXT: v_mov_b32_e32 v5, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
; GCN-IR-NEXT: BB12_3: ; %udiv-do-while ; GCN-IR-NEXT: BB12_3: ; %udiv-do-while
; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-IR-NEXT: v_lshl_b64 v[7:8], v[7:8], 1 ; GCN-IR-NEXT: v_lshl_b64 v[7:8], v[7:8], 1
; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3
; GCN-IR-NEXT: v_or_b32_e32 v6, v7, v4 ; GCN-IR-NEXT: v_or_b32_e32 v6, v7, v4
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, 23, v6 ; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, 23, v6
; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, 0, v8, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, 0, v8, vcc
; GCN-IR-NEXT: v_or_b32_e32 v2, v9, v2 ; GCN-IR-NEXT: v_or_b32_e32 v2, v9, v2
; GCN-IR-NEXT: v_add_i32_e32 v9, vcc, 1, v0 ; GCN-IR-NEXT: v_add_i32_e32 v9, vcc, 1, v0
; GCN-IR-NEXT: v_or_b32_e32 v3, v10, v3 ; GCN-IR-NEXT: v_or_b32_e32 v3, v10, v3
; GCN-IR-NEXT: v_ashrrev_i32_e32 v7, 31, v4 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v7, 31, v4
; GCN-IR-NEXT: v_addc_u32_e32 v10, vcc, 0, v1, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v10, vcc, 0, v1, vcc
; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v7 ; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v7
; GCN-IR-NEXT: v_and_b32_e32 v7, 24, v7 ; GCN-IR-NEXT: v_and_b32_e32 v7, 24, v7
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[9:10], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[9:10], v[0:1]
; GCN-IR-NEXT: v_mov_b32_e32 v0, v9
; GCN-IR-NEXT: v_sub_i32_e64 v7, s[4:5], v6, v7 ; GCN-IR-NEXT: v_sub_i32_e64 v7, s[4:5], v6, v7
; GCN-IR-NEXT: v_mov_b32_e32 v1, v10
; GCN-IR-NEXT: v_mov_b32_e32 v10, v5
; GCN-IR-NEXT: v_subbrev_u32_e64 v8, s[4:5], 0, v8, s[4:5] ; GCN-IR-NEXT: v_subbrev_u32_e64 v8, s[4:5], 0, v8, s[4:5]
; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
; GCN-IR-NEXT: v_mov_b32_e32 v0, v9
; GCN-IR-NEXT: v_mov_b32_e32 v1, v10
; GCN-IR-NEXT: v_mov_b32_e32 v10, v5
; GCN-IR-NEXT: v_mov_b32_e32 v9, v4 ; GCN-IR-NEXT: v_mov_b32_e32 v9, v4
; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: s_cbranch_execnz BB12_3 ; GCN-IR-NEXT: s_cbranch_execnz BB12_3
; GCN-IR-NEXT: ; %bb.4: ; %Flow ; GCN-IR-NEXT: ; %bb.4: ; %Flow
; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: BB12_5: ; %Flow3 ; GCN-IR-NEXT: BB12_5: ; %Flow3
; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[2:3], 1 ; GCN-IR-NEXT: v_lshl_b64 v[0:1], v[2:3], 1
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llvm/test/CodeGen/AMDGPU/udivrem.ll

Show First 20 Lines • Show All 96 Lines • ▼ Show 20 Lines
; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v4, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v4, s[0:1]
; GFX8-NEXT: v_subrev_u32_e32 v4, vcc, s6, v3 ; GFX8-NEXT: v_subrev_u32_e32 v4, vcc, s6, v3
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[0:1]
; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2 ; GFX8-NEXT: v_add_u32_e32 v4, vcc, 1, v2
; GFX8-NEXT: v_cmp_le_u32_e64 s[0:1], s6, v3 ; GFX8-NEXT: v_cmp_le_u32_e64 s[0:1], s6, v3
; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v4, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v4, s[0:1]
; GFX8-NEXT: v_subrev_u32_e32 v4, vcc, s6, v3 ; GFX8-NEXT: v_subrev_u32_e32 v4, vcc, s6, v3
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_cndmask_b32_e64 v2, v3, v4, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v3, v4, s[0:1]
; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v1, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
%result0 = udiv i32 %x, %y %result0 = udiv i32 %x, %y
store i32 %result0, i32 addrspace(1)* %out0 store i32 %result0, i32 addrspace(1)* %out0
%result1 = urem i32 %x, %y %result1 = urem i32 %x, %y
store i32 %result1, i32 addrspace(1)* %out1 store i32 %result1, i32 addrspace(1)* %out1
ret void ret void
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llvm/test/CodeGen/AMDGPU/uint_to_fp.i64.ll

Show First 20 Lines • Show All 232 Lines • ▼ Show 20 Lines
; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX6-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX6-NEXT: s_endpgm ; GFX6-NEXT: s_endpgm
; ;
; GFX8-LABEL: s_uint_to_fp_v2i64_to_v2f32: ; GFX8-LABEL: s_uint_to_fp_v2i64_to_v2f32:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24 ; GFX8-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x24
; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x34 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x34
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v3, s5
; GFX8-NEXT: s_flbit_i32_b32 s6, s3 ; GFX8-NEXT: s_flbit_i32_b32 s6, s3
; GFX8-NEXT: s_flbit_i32_b32 s7, s1 ; GFX8-NEXT: s_flbit_i32_b32 s7, s1
; GFX8-NEXT: s_min_u32 s6, s6, 32 ; GFX8-NEXT: s_min_u32 s6, s6, 32
; GFX8-NEXT: s_min_u32 s7, s7, 32 ; GFX8-NEXT: s_min_u32 s7, s7, 32
; GFX8-NEXT: s_lshl_b64 s[2:3], s[2:3], s6 ; GFX8-NEXT: s_lshl_b64 s[2:3], s[2:3], s6
; GFX8-NEXT: s_lshl_b64 s[0:1], s[0:1], s7 ; GFX8-NEXT: s_lshl_b64 s[0:1], s[0:1], s7
; GFX8-NEXT: s_min_u32 s2, s2, 1 ; GFX8-NEXT: s_min_u32 s2, s2, 1
; GFX8-NEXT: s_or_b32 s2, s3, s2 ; GFX8-NEXT: s_or_b32 s2, s3, s2
; GFX8-NEXT: s_min_u32 s0, s0, 1 ; GFX8-NEXT: s_min_u32 s0, s0, 1
; GFX8-NEXT: v_cvt_f32_u32_e32 v0, s2 ; GFX8-NEXT: v_cvt_f32_u32_e32 v0, s2
; GFX8-NEXT: s_or_b32 s0, s1, s0 ; GFX8-NEXT: s_or_b32 s0, s1, s0
; GFX8-NEXT: v_cvt_f32_u32_e32 v2, s0 ; GFX8-NEXT: v_cvt_f32_u32_e32 v2, s0
; GFX8-NEXT: s_sub_i32 s0, 32, s6 ; GFX8-NEXT: s_sub_i32 s0, 32, s6
; GFX8-NEXT: v_ldexp_f32 v1, v0, s0 ; GFX8-NEXT: v_ldexp_f32 v1, v0, s0
; GFX8-NEXT: s_sub_i32 s0, 32, s7 ; GFX8-NEXT: s_sub_i32 s0, 32, s7
; GFX8-NEXT: v_ldexp_f32 v0, v2, s0 ; GFX8-NEXT: v_ldexp_f32 v0, v2, s0
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s5
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
%result = uitofp <2 x i64> %in to <2 x float> %result = uitofp <2 x i64> %in to <2 x float>
store <2 x float> %result, <2 x float> addrspace(1)* %out store <2 x float> %result, <2 x float> addrspace(1)* %out
ret void ret void
} }
define amdgpu_kernel void @v_uint_to_fp_v4i64_to_v4f32(<4 x float> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) #0 { define amdgpu_kernel void @v_uint_to_fp_v4i64_to_v4f32(<4 x float> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) #0 {
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llvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll

Show First 20 Lines • Show All 94 Lines • ▼ Show 20 Lines
; CHECK-NEXT: ;;#ASMSTART ; CHECK-NEXT: ;;#ASMSTART
; CHECK-NEXT: v_mov_b32_e32 v5, 5 ; CHECK-NEXT: v_mov_b32_e32 v5, 5
; CHECK-NEXT: ;;#ASMEND ; CHECK-NEXT: ;;#ASMEND
; CHECK-NEXT: ;;#ASMSTART ; CHECK-NEXT: ;;#ASMSTART
; CHECK-NEXT: v_mov_b32_e32 v6, 6 ; CHECK-NEXT: v_mov_b32_e32 v6, 6
; CHECK-NEXT: ;;#ASMEND ; CHECK-NEXT: ;;#ASMEND
; CHECK-NEXT: v_mov_b32_e32 v0, v5 ; CHECK-NEXT: v_mov_b32_e32 v0, v5
; CHECK-NEXT: v_mov_b32_e32 v1, v6 ; CHECK-NEXT: v_mov_b32_e32 v1, v6
; CHECK-NEXT: v_mov_b32_e32 v2, v7
; CHECK-NEXT: v_mov_b32_e32 v3, v8
; CHECK-NEXT: s_mov_b32 s3, 0xf000 ; CHECK-NEXT: s_mov_b32 s3, 0xf000
; CHECK-NEXT: s_mov_b32 s2, -1 ; CHECK-NEXT: s_mov_b32 s2, -1
; CHECK-NEXT: v_mov_b32_e32 v0, v6 ; CHECK-NEXT: v_mov_b32_e32 v0, v6
; CHECK-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; CHECK-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; CHECK-NEXT: s_waitcnt vmcnt(0) ; CHECK-NEXT: s_waitcnt vmcnt(0)
; CHECK-NEXT: ;;#ASMSTART ; CHECK-NEXT: ;;#ASMSTART
; CHECK-NEXT: v_nop ; CHECK-NEXT: v_nop
; CHECK-NEXT: ;;#ASMEND ; CHECK-NEXT: ;;#ASMEND
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llvm/test/CodeGen/AMDGPU/urem64.ll

Show First 20 Lines • Show All 147 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17] ; GCN-IR-NEXT: s_or_b64 s[14:15], s[14:15], s[16:17]
; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[16:17], s[10:11], 63 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[16:17], s[10:11], 63
; GCN-IR-NEXT: s_xor_b64 s[18:19], s[14:15], -1 ; GCN-IR-NEXT: s_xor_b64 s[18:19], s[14:15], -1
; GCN-IR-NEXT: s_and_b64 s[16:17], s[18:19], s[16:17] ; GCN-IR-NEXT: s_and_b64 s[16:17], s[18:19], s[16:17]
; GCN-IR-NEXT: s_and_b64 vcc, exec, s[16:17] ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[16:17]
; GCN-IR-NEXT: s_cbranch_vccz BB0_5 ; GCN-IR-NEXT: s_cbranch_vccz BB0_5
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
; GCN-IR-NEXT: s_add_u32 s14, s10, 1 ; GCN-IR-NEXT: s_add_u32 s14, s10, 1
; GCN-IR-NEXT: v_mov_b32_e32 v0, s10
; GCN-IR-NEXT: s_addc_u32 s15, s11, 0 ; GCN-IR-NEXT: s_addc_u32 s15, s11, 0
; GCN-IR-NEXT: v_mov_b32_e32 v0, s10
; GCN-IR-NEXT: v_mov_b32_e32 v1, s11 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s11
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[14:15], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[14:15], v[0:1]
; GCN-IR-NEXT: s_sub_i32 s10, 63, s10 ; GCN-IR-NEXT: s_sub_i32 s10, 63, s10
; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_lshl_b64 s[10:11], s[6:7], s10 ; GCN-IR-NEXT: s_lshl_b64 s[10:11], s[6:7], s10
; GCN-IR-NEXT: s_cbranch_vccz BB0_4 ; GCN-IR-NEXT: s_cbranch_vccz BB0_4
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: s_lshr_b64 s[14:15], s[6:7], s14 ; GCN-IR-NEXT: s_lshr_b64 s[14:15], s[6:7], s14
Show All 14 Lines
; GCN-IR-NEXT: s_or_b64 s[10:11], s[12:13], s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], s[12:13], s[10:11]
; GCN-IR-NEXT: s_sub_u32 s2, s16, s14 ; GCN-IR-NEXT: s_sub_u32 s2, s16, s14
; GCN-IR-NEXT: s_subb_u32 s2, s17, s15 ; GCN-IR-NEXT: s_subb_u32 s2, s17, s15
; GCN-IR-NEXT: s_ashr_i32 s12, s2, 31 ; GCN-IR-NEXT: s_ashr_i32 s12, s2, 31
; GCN-IR-NEXT: s_mov_b32 s13, s12 ; GCN-IR-NEXT: s_mov_b32 s13, s12
; GCN-IR-NEXT: s_and_b32 s2, s12, 1 ; GCN-IR-NEXT: s_and_b32 s2, s12, 1
; GCN-IR-NEXT: s_and_b64 s[18:19], s[12:13], s[0:1] ; GCN-IR-NEXT: s_and_b64 s[18:19], s[12:13], s[0:1]
; GCN-IR-NEXT: s_sub_u32 s14, s14, s18 ; GCN-IR-NEXT: s_sub_u32 s14, s14, s18
; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: s_subb_u32 s15, s15, s19 ; GCN-IR-NEXT: s_subb_u32 s15, s15, s19
; GCN-IR-NEXT: v_mov_b32_e32 v1, s9 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: s_add_u32 s8, s8, 1 ; GCN-IR-NEXT: s_add_u32 s8, s8, 1
; GCN-IR-NEXT: v_mov_b32_e32 v1, s9
; GCN-IR-NEXT: s_addc_u32 s9, s9, 0 ; GCN-IR-NEXT: s_addc_u32 s9, s9, 0
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[8:9], v[0:1]
; GCN-IR-NEXT: s_mov_b64 s[12:13], s[2:3] ; GCN-IR-NEXT: s_mov_b64 s[12:13], s[2:3]
; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_cbranch_vccz BB0_3 ; GCN-IR-NEXT: s_cbranch_vccz BB0_3
; GCN-IR-NEXT: BB0_4: ; %Flow6 ; GCN-IR-NEXT: BB0_4: ; %Flow6
; GCN-IR-NEXT: s_lshl_b64 s[8:9], s[10:11], 1 ; GCN-IR-NEXT: s_lshl_b64 s[8:9], s[10:11], 1
; GCN-IR-NEXT: s_or_b64 s[2:3], s[2:3], s[8:9] ; GCN-IR-NEXT: s_or_b64 s[2:3], s[2:3], s[8:9]
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; GCN-IR-NEXT: s_mov_b64 s[10:11], 0 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5] ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
; GCN-IR-NEXT: s_cbranch_execz BB1_5 ; GCN-IR-NEXT: s_cbranch_execz BB1_5
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: v_add_i32_e32 v14, vcc, -1, v2 ; GCN-IR-NEXT: v_add_i32_e32 v14, vcc, -1, v2
; GCN-IR-NEXT: v_addc_u32_e32 v15, vcc, -1, v3, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v15, vcc, -1, v3, vcc
; GCN-IR-NEXT: v_not_b32_e32 v6, v8 ; GCN-IR-NEXT: v_not_b32_e32 v6, v8
; GCN-IR-NEXT: v_lshr_b64 v[12:13], v[0:1], v12
; GCN-IR-NEXT: v_not_b32_e32 v7, v9 ; GCN-IR-NEXT: v_not_b32_e32 v7, v9
; GCN-IR-NEXT: v_add_i32_e32 v8, vcc, v6, v10 ; GCN-IR-NEXT: v_add_i32_e32 v8, vcc, v6, v10
; GCN-IR-NEXT: v_lshr_b64 v[12:13], v[0:1], v12
; GCN-IR-NEXT: v_addc_u32_e32 v9, vcc, v7, v11, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v9, vcc, v7, v11, vcc
; GCN-IR-NEXT: v_mov_b32_e32 v10, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
; GCN-IR-NEXT: v_mov_b32_e32 v11, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v11, 0
; GCN-IR-NEXT: v_mov_b32_e32 v7, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v7, 0
; GCN-IR-NEXT: BB1_3: ; %udiv-do-while ; GCN-IR-NEXT: BB1_3: ; %udiv-do-while
; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-IR-NEXT: v_lshl_b64 v[12:13], v[12:13], 1 ; GCN-IR-NEXT: v_lshl_b64 v[12:13], v[12:13], 1
; GCN-IR-NEXT: v_lshrrev_b32_e32 v6, 31, v5 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v6, 31, v5
; GCN-IR-NEXT: v_or_b32_e32 v12, v12, v6 ; GCN-IR-NEXT: v_or_b32_e32 v12, v12, v6
; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1 ; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1
; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, v14, v12 ; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, v14, v12
; GCN-IR-NEXT: v_subb_u32_e32 v6, vcc, v15, v13, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v6, vcc, v15, v13, vcc
; GCN-IR-NEXT: v_or_b32_e32 v4, v10, v4 ; GCN-IR-NEXT: v_or_b32_e32 v4, v10, v4
; GCN-IR-NEXT: v_ashrrev_i32_e32 v10, 31, v6 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v10, 31, v6
; GCN-IR-NEXT: v_and_b32_e32 v6, 1, v10 ; GCN-IR-NEXT: v_and_b32_e32 v6, 1, v10
; GCN-IR-NEXT: v_and_b32_e32 v16, v10, v3 ; GCN-IR-NEXT: v_and_b32_e32 v16, v10, v3
; GCN-IR-NEXT: v_and_b32_e32 v17, v10, v2 ; GCN-IR-NEXT: v_and_b32_e32 v17, v10, v2
; GCN-IR-NEXT: v_add_i32_e32 v10, vcc, 1, v8 ; GCN-IR-NEXT: v_add_i32_e32 v10, vcc, 1, v8
; GCN-IR-NEXT: v_or_b32_e32 v5, v11, v5 ; GCN-IR-NEXT: v_or_b32_e32 v5, v11, v5
; GCN-IR-NEXT: v_addc_u32_e32 v11, vcc, 0, v9, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v11, vcc, 0, v9, vcc
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[10:11], v[8:9] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[10:11], v[8:9]
; GCN-IR-NEXT: v_mov_b32_e32 v8, v10
; GCN-IR-NEXT: v_sub_i32_e64 v12, s[4:5], v12, v17 ; GCN-IR-NEXT: v_sub_i32_e64 v12, s[4:5], v12, v17
; GCN-IR-NEXT: v_mov_b32_e32 v9, v11
; GCN-IR-NEXT: v_mov_b32_e32 v11, v7
; GCN-IR-NEXT: v_subb_u32_e64 v13, s[4:5], v13, v16, s[4:5] ; GCN-IR-NEXT: v_subb_u32_e64 v13, s[4:5], v13, v16, s[4:5]
; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
; GCN-IR-NEXT: v_mov_b32_e32 v8, v10
; GCN-IR-NEXT: v_mov_b32_e32 v9, v11
; GCN-IR-NEXT: v_mov_b32_e32 v11, v7
; GCN-IR-NEXT: v_mov_b32_e32 v10, v6 ; GCN-IR-NEXT: v_mov_b32_e32 v10, v6
; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: s_cbranch_execnz BB1_3 ; GCN-IR-NEXT: s_cbranch_execnz BB1_3
; GCN-IR-NEXT: ; %bb.4: ; %Flow ; GCN-IR-NEXT: ; %bb.4: ; %Flow
; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: BB1_5: ; %Flow3 ; GCN-IR-NEXT: BB1_5: ; %Flow3
; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1 ; GCN-IR-NEXT: v_lshl_b64 v[4:5], v[4:5], 1
▲ Show 20 Lines • Show All 439 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_or_b64 s[10:11], s[10:11], s[12:13] ; GCN-IR-NEXT: s_or_b64 s[10:11], s[10:11], s[12:13]
; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[12:13], s[8:9], 63 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[12:13], s[8:9], 63
; GCN-IR-NEXT: s_xor_b64 s[14:15], s[10:11], -1 ; GCN-IR-NEXT: s_xor_b64 s[14:15], s[10:11], -1
; GCN-IR-NEXT: s_and_b64 s[12:13], s[14:15], s[12:13] ; GCN-IR-NEXT: s_and_b64 s[12:13], s[14:15], s[12:13]
; GCN-IR-NEXT: s_and_b64 vcc, exec, s[12:13] ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[12:13]
; GCN-IR-NEXT: s_cbranch_vccz BB6_5 ; GCN-IR-NEXT: s_cbranch_vccz BB6_5
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
; GCN-IR-NEXT: s_add_u32 s10, s8, 1 ; GCN-IR-NEXT: s_add_u32 s10, s8, 1
; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: s_addc_u32 s11, s9, 0 ; GCN-IR-NEXT: s_addc_u32 s11, s9, 0
; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: v_mov_b32_e32 v1, s9 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s9
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1]
; GCN-IR-NEXT: s_sub_i32 s7, 63, s8 ; GCN-IR-NEXT: s_sub_i32 s7, 63, s8
; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_lshl_b64 s[8:9], 24, s7 ; GCN-IR-NEXT: s_lshl_b64 s[8:9], 24, s7
; GCN-IR-NEXT: s_cbranch_vccz BB6_4 ; GCN-IR-NEXT: s_cbranch_vccz BB6_4
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: s_lshr_b64 s[12:13], 24, s10 ; GCN-IR-NEXT: s_lshr_b64 s[12:13], 24, s10
Show All 12 Lines
; GCN-IR-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9] ; GCN-IR-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9]
; GCN-IR-NEXT: s_sub_u32 s4, s14, s12 ; GCN-IR-NEXT: s_sub_u32 s4, s14, s12
; GCN-IR-NEXT: s_subb_u32 s4, s15, s13 ; GCN-IR-NEXT: s_subb_u32 s4, s15, s13
; GCN-IR-NEXT: s_ashr_i32 s10, s4, 31 ; GCN-IR-NEXT: s_ashr_i32 s10, s4, 31
; GCN-IR-NEXT: s_mov_b32 s11, s10 ; GCN-IR-NEXT: s_mov_b32 s11, s10
; GCN-IR-NEXT: s_and_b32 s4, s10, 1 ; GCN-IR-NEXT: s_and_b32 s4, s10, 1
; GCN-IR-NEXT: s_and_b64 s[16:17], s[10:11], s[2:3] ; GCN-IR-NEXT: s_and_b64 s[16:17], s[10:11], s[2:3]
; GCN-IR-NEXT: s_sub_u32 s12, s12, s16 ; GCN-IR-NEXT: s_sub_u32 s12, s12, s16
; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
; GCN-IR-NEXT: s_subb_u32 s13, s13, s17 ; GCN-IR-NEXT: s_subb_u32 s13, s13, s17
; GCN-IR-NEXT: v_mov_b32_e32 v1, s7 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
; GCN-IR-NEXT: s_add_u32 s6, s6, 1 ; GCN-IR-NEXT: s_add_u32 s6, s6, 1
; GCN-IR-NEXT: v_mov_b32_e32 v1, s7
; GCN-IR-NEXT: s_addc_u32 s7, s7, 0 ; GCN-IR-NEXT: s_addc_u32 s7, s7, 0
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1]
; GCN-IR-NEXT: s_mov_b64 s[10:11], s[4:5] ; GCN-IR-NEXT: s_mov_b64 s[10:11], s[4:5]
; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_cbranch_vccz BB6_3 ; GCN-IR-NEXT: s_cbranch_vccz BB6_3
; GCN-IR-NEXT: BB6_4: ; %Flow5 ; GCN-IR-NEXT: BB6_4: ; %Flow5
; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[8:9], 1 ; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[8:9], 1
; GCN-IR-NEXT: s_or_b64 s[4:5], s[4:5], s[6:7] ; GCN-IR-NEXT: s_or_b64 s[4:5], s[4:5], s[6:7]
▲ Show 20 Lines • Show All 146 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_or_b64 s[10:11], s[10:11], s[12:13] ; GCN-IR-NEXT: s_or_b64 s[10:11], s[10:11], s[12:13]
; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[12:13], s[8:9], 63 ; GCN-IR-NEXT: v_cmp_ne_u64_e64 s[12:13], s[8:9], 63
; GCN-IR-NEXT: s_xor_b64 s[14:15], s[10:11], -1 ; GCN-IR-NEXT: s_xor_b64 s[14:15], s[10:11], -1
; GCN-IR-NEXT: s_and_b64 s[12:13], s[14:15], s[12:13] ; GCN-IR-NEXT: s_and_b64 s[12:13], s[14:15], s[12:13]
; GCN-IR-NEXT: s_and_b64 vcc, exec, s[12:13] ; GCN-IR-NEXT: s_and_b64 vcc, exec, s[12:13]
; GCN-IR-NEXT: s_cbranch_vccz BB7_5 ; GCN-IR-NEXT: s_cbranch_vccz BB7_5
; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1 ; GCN-IR-NEXT: ; %bb.1: ; %udiv-bb1
; GCN-IR-NEXT: s_add_u32 s10, s8, 1 ; GCN-IR-NEXT: s_add_u32 s10, s8, 1
; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: s_addc_u32 s11, s9, 0 ; GCN-IR-NEXT: s_addc_u32 s11, s9, 0
; GCN-IR-NEXT: v_mov_b32_e32 v0, s8
; GCN-IR-NEXT: v_mov_b32_e32 v1, s9 ; GCN-IR-NEXT: v_mov_b32_e32 v1, s9
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[10:11], v[0:1]
; GCN-IR-NEXT: s_sub_i32 s7, 63, s8 ; GCN-IR-NEXT: s_sub_i32 s7, 63, s8
; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_andn2_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_lshl_b64 s[8:9], s[2:3], s7 ; GCN-IR-NEXT: s_lshl_b64 s[8:9], s[2:3], s7
; GCN-IR-NEXT: s_cbranch_vccz BB7_4 ; GCN-IR-NEXT: s_cbranch_vccz BB7_4
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: s_lshr_b64 s[12:13], s[2:3], s10 ; GCN-IR-NEXT: s_lshr_b64 s[12:13], s[2:3], s10
Show All 9 Lines
; GCN-IR-NEXT: s_or_b64 s[12:13], s[12:13], s[4:5] ; GCN-IR-NEXT: s_or_b64 s[12:13], s[12:13], s[4:5]
; GCN-IR-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9] ; GCN-IR-NEXT: s_or_b64 s[8:9], s[10:11], s[8:9]
; GCN-IR-NEXT: s_sub_u32 s4, 23, s12 ; GCN-IR-NEXT: s_sub_u32 s4, 23, s12
; GCN-IR-NEXT: s_subb_u32 s4, 0, s13 ; GCN-IR-NEXT: s_subb_u32 s4, 0, s13
; GCN-IR-NEXT: s_ashr_i32 s10, s4, 31 ; GCN-IR-NEXT: s_ashr_i32 s10, s4, 31
; GCN-IR-NEXT: s_and_b32 s4, s10, 1 ; GCN-IR-NEXT: s_and_b32 s4, s10, 1
; GCN-IR-NEXT: s_and_b32 s10, s10, 24 ; GCN-IR-NEXT: s_and_b32 s10, s10, 24
; GCN-IR-NEXT: s_sub_u32 s12, s12, s10 ; GCN-IR-NEXT: s_sub_u32 s12, s12, s10
; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
; GCN-IR-NEXT: s_subb_u32 s13, s13, 0 ; GCN-IR-NEXT: s_subb_u32 s13, s13, 0
; GCN-IR-NEXT: v_mov_b32_e32 v1, s7 ; GCN-IR-NEXT: v_mov_b32_e32 v0, s6
; GCN-IR-NEXT: s_add_u32 s6, s6, 1 ; GCN-IR-NEXT: s_add_u32 s6, s6, 1
; GCN-IR-NEXT: v_mov_b32_e32 v1, s7
; GCN-IR-NEXT: s_addc_u32 s7, s7, 0 ; GCN-IR-NEXT: s_addc_u32 s7, s7, 0
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, s[6:7], v[0:1]
; GCN-IR-NEXT: s_mov_b64 s[10:11], s[4:5] ; GCN-IR-NEXT: s_mov_b64 s[10:11], s[4:5]
; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc ; GCN-IR-NEXT: s_and_b64 vcc, exec, vcc
; GCN-IR-NEXT: s_cbranch_vccz BB7_3 ; GCN-IR-NEXT: s_cbranch_vccz BB7_3
; GCN-IR-NEXT: BB7_4: ; %Flow5 ; GCN-IR-NEXT: BB7_4: ; %Flow5
; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[8:9], 1 ; GCN-IR-NEXT: s_lshl_b64 s[6:7], s[8:9], 1
; GCN-IR-NEXT: s_or_b64 s[4:5], s[4:5], s[6:7] ; GCN-IR-NEXT: s_or_b64 s[4:5], s[4:5], s[6:7]
▲ Show 20 Lines • Show All 163 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5] ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
; GCN-IR-NEXT: s_cbranch_execz BB8_5 ; GCN-IR-NEXT: s_cbranch_execz BB8_5
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, -1, v0 ; GCN-IR-NEXT: v_add_i32_e32 v12, vcc, -1, v0
; GCN-IR-NEXT: s_mov_b64 s[4:5], 0x8000 ; GCN-IR-NEXT: s_mov_b64 s[4:5], 0x8000
; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, -1, v1, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v13, vcc, -1, v1, vcc
; GCN-IR-NEXT: v_lshr_b64 v[8:9], s[4:5], v8 ; GCN-IR-NEXT: v_lshr_b64 v[8:9], s[4:5], v8
; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, 47, v6 ; GCN-IR-NEXT: v_sub_i32_e32 v6, vcc, 47, v6
; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
; GCN-IR-NEXT: v_subb_u32_e32 v7, vcc, 0, v7, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v7, vcc, 0, v7, vcc
; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
; GCN-IR-NEXT: v_mov_b32_e32 v11, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v11, 0
; GCN-IR-NEXT: v_mov_b32_e32 v5, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
; GCN-IR-NEXT: BB8_3: ; %udiv-do-while ; GCN-IR-NEXT: BB8_3: ; %udiv-do-while
; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-IR-NEXT: v_lshl_b64 v[8:9], v[8:9], 1 ; GCN-IR-NEXT: v_lshl_b64 v[8:9], v[8:9], 1
; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3
; GCN-IR-NEXT: v_or_b32_e32 v8, v8, v4 ; GCN-IR-NEXT: v_or_b32_e32 v8, v8, v4
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, v12, v8 ; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, v12, v8
; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, v13, v9, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, v13, v9, vcc
; GCN-IR-NEXT: v_or_b32_e32 v2, v10, v2 ; GCN-IR-NEXT: v_or_b32_e32 v2, v10, v2
; GCN-IR-NEXT: v_ashrrev_i32_e32 v10, 31, v4 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v10, 31, v4
; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v10 ; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v10
; GCN-IR-NEXT: v_and_b32_e32 v14, v10, v1 ; GCN-IR-NEXT: v_and_b32_e32 v14, v10, v1
; GCN-IR-NEXT: v_and_b32_e32 v15, v10, v0 ; GCN-IR-NEXT: v_and_b32_e32 v15, v10, v0
; GCN-IR-NEXT: v_add_i32_e32 v10, vcc, 1, v6 ; GCN-IR-NEXT: v_add_i32_e32 v10, vcc, 1, v6
; GCN-IR-NEXT: v_or_b32_e32 v3, v11, v3 ; GCN-IR-NEXT: v_or_b32_e32 v3, v11, v3
; GCN-IR-NEXT: v_addc_u32_e32 v11, vcc, 0, v7, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v11, vcc, 0, v7, vcc
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[10:11], v[6:7] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[10:11], v[6:7]
; GCN-IR-NEXT: v_mov_b32_e32 v6, v10
; GCN-IR-NEXT: v_sub_i32_e64 v8, s[4:5], v8, v15 ; GCN-IR-NEXT: v_sub_i32_e64 v8, s[4:5], v8, v15
; GCN-IR-NEXT: v_mov_b32_e32 v7, v11
; GCN-IR-NEXT: v_mov_b32_e32 v11, v5
; GCN-IR-NEXT: v_subb_u32_e64 v9, s[4:5], v9, v14, s[4:5] ; GCN-IR-NEXT: v_subb_u32_e64 v9, s[4:5], v9, v14, s[4:5]
; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
; GCN-IR-NEXT: v_mov_b32_e32 v6, v10
; GCN-IR-NEXT: v_mov_b32_e32 v7, v11
; GCN-IR-NEXT: v_mov_b32_e32 v11, v5
; GCN-IR-NEXT: v_mov_b32_e32 v10, v4 ; GCN-IR-NEXT: v_mov_b32_e32 v10, v4
; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: s_cbranch_execnz BB8_3 ; GCN-IR-NEXT: s_cbranch_execnz BB8_3
; GCN-IR-NEXT: ; %bb.4: ; %Flow ; GCN-IR-NEXT: ; %bb.4: ; %Flow
; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: BB8_5: ; %Flow3 ; GCN-IR-NEXT: BB8_5: ; %Flow3
; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
▲ Show 20 Lines • Show All 51 Lines • ▼ Show 20 Lines
; GCN-IR-NEXT: v_mov_b32_e32 v5, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
; GCN-IR-NEXT: s_mov_b64 s[10:11], 0 ; GCN-IR-NEXT: s_mov_b64 s[10:11], 0
; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc ; GCN-IR-NEXT: s_and_saveexec_b64 s[4:5], vcc
; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5] ; GCN-IR-NEXT: s_xor_b64 s[8:9], exec, s[4:5]
; GCN-IR-NEXT: s_cbranch_execz BB9_5 ; GCN-IR-NEXT: s_cbranch_execz BB9_5
; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader ; GCN-IR-NEXT: ; %bb.2: ; %udiv-preheader
; GCN-IR-NEXT: v_lshr_b64 v[8:9], v[0:1], v7 ; GCN-IR-NEXT: v_lshr_b64 v[8:9], v[0:1], v7
; GCN-IR-NEXT: v_add_i32_e32 v6, vcc, 0xffffffcf, v6 ; GCN-IR-NEXT: v_add_i32_e32 v6, vcc, 0xffffffcf, v6
; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
; GCN-IR-NEXT: v_addc_u32_e64 v7, s[4:5], 0, -1, vcc ; GCN-IR-NEXT: v_addc_u32_e64 v7, s[4:5], 0, -1, vcc
; GCN-IR-NEXT: v_mov_b32_e32 v10, 0
; GCN-IR-NEXT: v_mov_b32_e32 v11, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v11, 0
; GCN-IR-NEXT: v_mov_b32_e32 v5, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v5, 0
; GCN-IR-NEXT: s_movk_i32 s12, 0x7fff ; GCN-IR-NEXT: s_movk_i32 s12, 0x7fff
; GCN-IR-NEXT: BB9_3: ; %udiv-do-while ; GCN-IR-NEXT: BB9_3: ; %udiv-do-while
; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1 ; GCN-IR-NEXT: ; =>This Inner Loop Header: Depth=1
; GCN-IR-NEXT: v_lshl_b64 v[8:9], v[8:9], 1 ; GCN-IR-NEXT: v_lshl_b64 v[8:9], v[8:9], 1
; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3 ; GCN-IR-NEXT: v_lshrrev_b32_e32 v4, 31, v3
; GCN-IR-NEXT: v_or_b32_e32 v8, v8, v4 ; GCN-IR-NEXT: v_or_b32_e32 v8, v8, v4
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, s12, v8 ; GCN-IR-NEXT: v_sub_i32_e32 v4, vcc, s12, v8
; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, 0, v9, vcc ; GCN-IR-NEXT: v_subb_u32_e32 v4, vcc, 0, v9, vcc
; GCN-IR-NEXT: v_or_b32_e32 v2, v10, v2 ; GCN-IR-NEXT: v_or_b32_e32 v2, v10, v2
; GCN-IR-NEXT: v_ashrrev_i32_e32 v10, 31, v4 ; GCN-IR-NEXT: v_ashrrev_i32_e32 v10, 31, v4
; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v10 ; GCN-IR-NEXT: v_and_b32_e32 v4, 1, v10
; GCN-IR-NEXT: v_and_b32_e32 v13, 0x8000, v10 ; GCN-IR-NEXT: v_and_b32_e32 v13, 0x8000, v10
; GCN-IR-NEXT: v_add_i32_e32 v10, vcc, 1, v6 ; GCN-IR-NEXT: v_add_i32_e32 v10, vcc, 1, v6
; GCN-IR-NEXT: v_or_b32_e32 v3, v11, v3 ; GCN-IR-NEXT: v_or_b32_e32 v3, v11, v3
; GCN-IR-NEXT: v_addc_u32_e32 v11, vcc, 0, v7, vcc ; GCN-IR-NEXT: v_addc_u32_e32 v11, vcc, 0, v7, vcc
; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[10:11], v[6:7] ; GCN-IR-NEXT: v_cmp_lt_u64_e32 vcc, v[10:11], v[6:7]
; GCN-IR-NEXT: v_mov_b32_e32 v6, v10
; GCN-IR-NEXT: v_mov_b32_e32 v12, 0 ; GCN-IR-NEXT: v_mov_b32_e32 v12, 0
; GCN-IR-NEXT: v_sub_i32_e64 v8, s[4:5], v8, v13 ; GCN-IR-NEXT: v_sub_i32_e64 v8, s[4:5], v8, v13
; GCN-IR-NEXT: v_mov_b32_e32 v7, v11
; GCN-IR-NEXT: v_mov_b32_e32 v11, v5
; GCN-IR-NEXT: v_subb_u32_e64 v9, s[4:5], v9, v12, s[4:5] ; GCN-IR-NEXT: v_subb_u32_e64 v9, s[4:5], v9, v12, s[4:5]
; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11] ; GCN-IR-NEXT: s_or_b64 s[10:11], vcc, s[10:11]
; GCN-IR-NEXT: v_mov_b32_e32 v6, v10
; GCN-IR-NEXT: v_mov_b32_e32 v7, v11
; GCN-IR-NEXT: v_mov_b32_e32 v11, v5
; GCN-IR-NEXT: v_mov_b32_e32 v10, v4 ; GCN-IR-NEXT: v_mov_b32_e32 v10, v4
; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_andn2_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: s_cbranch_execnz BB9_3 ; GCN-IR-NEXT: s_cbranch_execnz BB9_3
; GCN-IR-NEXT: ; %bb.4: ; %Flow ; GCN-IR-NEXT: ; %bb.4: ; %Flow
; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[10:11]
; GCN-IR-NEXT: BB9_5: ; %Flow3 ; GCN-IR-NEXT: BB9_5: ; %Flow3
; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9] ; GCN-IR-NEXT: s_or_b64 exec, exec, s[8:9]
; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1 ; GCN-IR-NEXT: v_lshl_b64 v[2:3], v[2:3], 1
▲ Show 20 Lines • Show All 235 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/v_mov_b64_expand_and_shrink.mir

# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass postrapseudos,si-shrink-instructions -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s # RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass postrapseudos,si-shrink-instructions -verify-machineinstrs %s -o - | FileCheck -check-prefix=GCN %s
--- ---
# GCN-LABEL: name: expand_imm64_sext_shrink_to_bfrev # GCN-LABEL: name: expand_imm64_sext_shrink_to_bfrev
# GCN: $vgpr0 = V_MOV_B32_e32 0, implicit $exec, implicit-def $vgpr0_vgpr1 # GCN: $vgpr0 = V_MOV_B32_e32 0, implicit $exec
# GCN: $vgpr1 = V_BFREV_B32_e32 1, implicit $exec, implicit-def $vgpr0_vgpr1 # GCN: $vgpr1 = V_BFREV_B32_e32 1, implicit $exec
name: expand_imm64_sext_shrink_to_bfrev name: expand_imm64_sext_shrink_to_bfrev
tracksRegLiveness: true tracksRegLiveness: true
body: | body: |
bb.0: bb.0:
$vgpr0_vgpr1 = V_MOV_B64_PSEUDO -9223372036854775808, implicit $exec $vgpr0_vgpr1 = V_MOV_B64_PSEUDO -9223372036854775808, implicit $exec
... ...

llvm/test/CodeGen/AMDGPU/v_mov_b64_expansion.mir

# RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass postrapseudos -verify-machineinstrs %s -o - | FileCheck -check-prefixes=GCN,GFX900 %s # RUN: llc -march=amdgcn -mcpu=gfx900 -run-pass postrapseudos -verify-machineinstrs %s -o - | FileCheck -check-prefixes=GCN,GFX900 %s
# RUN: llc -march=amdgcn -mcpu=gfx90a -run-pass postrapseudos -verify-machineinstrs %s -o - | FileCheck -check-prefixes=GCN,GFX90A %s # RUN: llc -march=amdgcn -mcpu=gfx90a -run-pass postrapseudos -verify-machineinstrs %s -o - | FileCheck -check-prefixes=GCN,GFX90A %s
# GCN-LABEL: name: v_mov_b64_from_vgpr # GCN-LABEL: name: v_mov_b64_from_vgpr
# GFX900: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec, implicit-def $vgpr0_vgpr1 # GFX900: $vgpr0 = V_MOV_B32_e32 $vgpr2, implicit $exec
# GFX900: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec, implicit-def $vgpr0_vgpr1 # GFX900: $vgpr1 = V_MOV_B32_e32 $vgpr3, implicit $exec
# GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, $vgpr2_vgpr3, 12, $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec # GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, $vgpr2_vgpr3, 12, $vgpr2_vgpr3, 0, 0, 0, 0, 0, implicit $exec
name: v_mov_b64_from_vgpr name: v_mov_b64_from_vgpr
body: | body: |
bb.0: bb.0:
$vgpr0_vgpr1 = V_MOV_B64_PSEUDO $vgpr2_vgpr3, implicit $exec $vgpr0_vgpr1 = V_MOV_B64_PSEUDO $vgpr2_vgpr3, implicit $exec
... ...
# GCN-LABEL: name: v_mov_b64_from_sgpr # GCN-LABEL: name: v_mov_b64_from_sgpr
# GFX900: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec, implicit-def $vgpr0_vgpr1 # GFX900: $vgpr0 = V_MOV_B32_e32 $sgpr2, implicit $exec
# GFX900: $vgpr1 = V_MOV_B32_e32 $sgpr3, implicit $exec, implicit-def $vgpr0_vgpr1 # GFX900: $vgpr1 = V_MOV_B32_e32 $sgpr3, implicit $exec
# GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, $sgpr2_sgpr3, 12, $sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec # GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, $sgpr2_sgpr3, 12, $sgpr2_sgpr3, 0, 0, 0, 0, 0, implicit $exec
name: v_mov_b64_from_sgpr name: v_mov_b64_from_sgpr
body: | body: |
bb.0: bb.0:
$vgpr0_vgpr1 = V_MOV_B64_PSEUDO $sgpr2_sgpr3, implicit $exec $vgpr0_vgpr1 = V_MOV_B64_PSEUDO $sgpr2_sgpr3, implicit $exec
... ...
# GCN-LABEL: name: v_mov_b64_from_sext_inline_imm # GCN-LABEL: name: v_mov_b64_from_sext_inline_imm
# GFX900: $vgpr0 = V_MOV_B32_e32 -2, implicit $exec, implicit-def $vgpr0_vgpr1 # GFX900: $vgpr0 = V_MOV_B32_e32 -2, implicit $exec
# GFX900: $vgpr1 = V_MOV_B32_e32 -1, implicit $exec, implicit-def $vgpr0_vgpr1 # GFX900: $vgpr1 = V_MOV_B32_e32 -1, implicit $exec
# GFX90A: $vgpr0 = V_MOV_B32_e32 -2, implicit $exec, implicit-def $vgpr0_vgpr1 # GFX90A: $vgpr0 = V_MOV_B32_e32 -2, implicit $exec
# GFX90A: $vgpr1 = V_MOV_B32_e32 -1, implicit $exec, implicit-def $vgpr0_vgpr1 # GFX90A: $vgpr1 = V_MOV_B32_e32 -1, implicit $exec
name: v_mov_b64_from_sext_inline_imm name: v_mov_b64_from_sext_inline_imm
body: | body: |
bb.0: bb.0:
$vgpr0_vgpr1 = V_MOV_B64_PSEUDO 18446744073709551614, implicit $exec $vgpr0_vgpr1 = V_MOV_B64_PSEUDO 18446744073709551614, implicit $exec
... ...
# GCN-LABEL: name: v_mov_b64_from_lit # GCN-LABEL: name: v_mov_b64_from_lit
# GCN: $vgpr0 = V_MOV_B32_e32 1430494974, implicit $exec, implicit-def $vgpr0_vgpr1 # GCN: $vgpr0 = V_MOV_B32_e32 1430494974, implicit $exec
# GCN: $vgpr1 = V_MOV_B32_e32 -232831, implicit $exec, implicit-def $vgpr0_vgpr1 # GCN: $vgpr1 = V_MOV_B32_e32 -232831, implicit $exec
name: v_mov_b64_from_lit name: v_mov_b64_from_lit
body: | body: |
bb.0: bb.0:
$vgpr0_vgpr1 = V_MOV_B64_PSEUDO 18445744073609551614, implicit $exec $vgpr0_vgpr1 = V_MOV_B64_PSEUDO 18445744073609551614, implicit $exec
... ...
# GCN-LABEL: name: v_mov_b64_from_first_inline_imm # GCN-LABEL: name: v_mov_b64_from_first_inline_imm
# GCN: $vgpr0 = V_MOV_B32_e32 -1, implicit $exec, implicit-def $vgpr0_vgpr1 # GCN: $vgpr0 = V_MOV_B32_e32 -1, implicit $exec
# GCN: $vgpr1 = V_MOV_B32_e32 268435455, implicit $exec, implicit-def $vgpr0_vgpr1 # GCN: $vgpr1 = V_MOV_B32_e32 268435455, implicit $exec
name: v_mov_b64_from_first_inline_imm name: v_mov_b64_from_first_inline_imm
body: | body: |
bb.0: bb.0:
$vgpr0_vgpr1 = V_MOV_B64_PSEUDO 1152921504606846975, implicit $exec $vgpr0_vgpr1 = V_MOV_B64_PSEUDO 1152921504606846975, implicit $exec
... ...
# GCN-LABEL: name: v_mov_b64_from_second_inline_imm # GCN-LABEL: name: v_mov_b64_from_second_inline_imm
# GCN: $vgpr0 = V_MOV_B32_e32 268435455, implicit $exec, implicit-def $vgpr0_vgpr1 # GCN: $vgpr0 = V_MOV_B32_e32 268435455, implicit $exec
# GCN: $vgpr1 = V_MOV_B32_e32 -1, implicit $exec, implicit-def $vgpr0_vgpr1 # GCN: $vgpr1 = V_MOV_B32_e32 -1, implicit $exec
name: v_mov_b64_from_second_inline_imm name: v_mov_b64_from_second_inline_imm
body: | body: |
bb.0: bb.0:
$vgpr0_vgpr1 = V_MOV_B64_PSEUDO 18446744069683019775, implicit $exec $vgpr0_vgpr1 = V_MOV_B64_PSEUDO 18446744069683019775, implicit $exec
... ...
# GCN-LABEL: name: v_mov_b64_from_same_sext_inline_imm # GCN-LABEL: name: v_mov_b64_from_same_sext_inline_imm
# GFX900: $vgpr0 = V_MOV_B32_e32 -1, implicit $exec, implicit-def $vgpr0_vgpr1 # GFX900: $vgpr0 = V_MOV_B32_e32 -1, implicit $exec
# GFX900: $vgpr1 = V_MOV_B32_e32 -1, implicit $exec, implicit-def $vgpr0_vgpr1 # GFX900: $vgpr1 = V_MOV_B32_e32 -1, implicit $exec
# GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, -1, 8, -1, 0, 0, 0, 0, 0, implicit $exec # GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, -1, 8, -1, 0, 0, 0, 0, 0, implicit $exec
name: v_mov_b64_from_same_sext_inline_imm name: v_mov_b64_from_same_sext_inline_imm
body: | body: |
bb.0: bb.0:
$vgpr0_vgpr1 = V_MOV_B64_PSEUDO 18446744073709551615, implicit $exec $vgpr0_vgpr1 = V_MOV_B64_PSEUDO 18446744073709551615, implicit $exec
... ...
# GCN-LABEL: name: v_mov_b64_from_same_fp_inline_imm # GCN-LABEL: name: v_mov_b64_from_same_fp_inline_imm
# GFX900: $vgpr0 = V_MOV_B32_e32 1065353216, implicit $exec, implicit-def $vgpr0_vgpr1 # GFX900: $vgpr0 = V_MOV_B32_e32 1065353216, implicit $exec
# GFX900: $vgpr1 = V_MOV_B32_e32 1065353216, implicit $exec, implicit-def $vgpr0_vgpr1 # GFX900: $vgpr1 = V_MOV_B32_e32 1065353216, implicit $exec
# GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, 1065353216, 8, 1065353216, 0, 0, 0, 0, 0, implicit $exec # GFX90A: $vgpr0_vgpr1 = V_PK_MOV_B32 8, 1065353216, 8, 1065353216, 0, 0, 0, 0, 0, implicit $exec
name: v_mov_b64_from_same_fp_inline_imm name: v_mov_b64_from_same_fp_inline_imm
body: | body: |
bb.0: bb.0:
$vgpr0_vgpr1 = V_MOV_B64_PSEUDO 4575657222473777152, implicit $exec $vgpr0_vgpr1 = V_MOV_B64_PSEUDO 4575657222473777152, implicit $exec
... ...

llvm/test/CodeGen/AMDGPU/widen-smrd-loads.ll

Show First 20 Lines • Show All 276 Lines • ▼ Show 20 Lines
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; VI-NEXT: v_lshlrev_b32_e32 v0, 1, v0 ; VI-NEXT: v_lshlrev_b32_e32 v0, 1, v0
; VI-NEXT: s_waitcnt lgkmcnt(0) ; VI-NEXT: s_waitcnt lgkmcnt(0)
; VI-NEXT: v_mov_b32_e32 v1, s1 ; VI-NEXT: v_mov_b32_e32 v1, s1
; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0 ; VI-NEXT: v_add_u32_e32 v0, vcc, s0, v0
; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc ; VI-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
; VI-NEXT: flat_load_ushort v0, v[0:1] ; VI-NEXT: flat_load_ushort v0, v[0:1]
; VI-NEXT: v_mov_b32_e32 v1, 0
; VI-NEXT: s_waitcnt vmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0)
; VI-NEXT: v_add_u16_e32 v2, 0x3e7, v0 ; VI-NEXT: v_add_u16_e32 v2, 0x3e7, v0
; VI-NEXT: v_mov_b32_e32 v0, 0 ; VI-NEXT: v_mov_b32_e32 v0, 0
; VI-NEXT: v_mov_b32_e32 v1, 0
; VI-NEXT: v_or_b32_e32 v2, 4, v2 ; VI-NEXT: v_or_b32_e32 v2, 4, v2
; VI-NEXT: flat_store_short v[0:1], v2 ; VI-NEXT: flat_store_short v[0:1], v2
; VI-NEXT: s_endpgm ; VI-NEXT: s_endpgm
%tid = call i32 @llvm.amdgcn.workitem.id.x() %tid = call i32 @llvm.amdgcn.workitem.id.x()
%tid.ext = zext i32 %tid to i64 %tid.ext = zext i32 %tid to i64
%gep.arg = getelementptr inbounds i16, i16 addrspace(4)* %arg, i64 %tid.ext %gep.arg = getelementptr inbounds i16, i16 addrspace(4)* %arg, i64 %tid.ext
%load = load i16, i16 addrspace(4)* %gep.arg, align 4 %load = load i16, i16 addrspace(4)* %gep.arg, align 4
%add = add i16 %load, 999 %add = add i16 %load, 999
▲ Show 20 Lines • Show All 84 Lines • ▼ Show 20 Lines
; SI-NEXT: s_mov_b32 s2, -1 ; SI-NEXT: s_mov_b32 s2, -1
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_load_dword s1, s[0:1], 0x0 ; SI-NEXT: s_load_dword s1, s[0:1], 0x0
; SI-NEXT: s_mov_b32 s0, 0 ; SI-NEXT: s_mov_b32 s0, 0
; SI-NEXT: s_waitcnt lgkmcnt(0) ; SI-NEXT: s_waitcnt lgkmcnt(0)
; SI-NEXT: s_and_b32 s1, s1, 1 ; SI-NEXT: s_and_b32 s1, s1, 1
; SI-NEXT: s_add_u32 s4, s1, 0x3e7 ; SI-NEXT: s_add_u32 s4, s1, 0x3e7
; SI-NEXT: s_addc_u32 s5, 0, 0 ; SI-NEXT: s_addc_u32 s5, 0, 0
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: s_mov_b32 s1, s0 ; SI-NEXT: s_mov_b32 s1, s0
; SI-NEXT: v_mov_b32_e32 v0, s4
; SI-NEXT: v_mov_b32_e32 v1, s5 ; SI-NEXT: v_mov_b32_e32 v1, s5
; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; SI-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; SI-NEXT: s_endpgm ; SI-NEXT: s_endpgm
; ;
; VI-LABEL: widen_i1_zext_to_i64_constant_load: ; VI-LABEL: widen_i1_zext_to_i64_constant_load:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24 ; VI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
; VI-NEXT: v_mov_b32_e32 v0, 0 ; VI-NEXT: v_mov_b32_e32 v0, 0
▲ Show 20 Lines • Show All 96 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/wwm-reserved-spill.ll

Show First 20 Lines • Show All 802 Lines • ▼ Show 20 Lines
; GFX9-O3-NEXT: v_mov_b32_e32 v4, s9 ; GFX9-O3-NEXT: v_mov_b32_e32 v4, s9
; GFX9-O3-NEXT: s_not_b64 exec, exec ; GFX9-O3-NEXT: s_not_b64 exec, exec
; GFX9-O3-NEXT: s_not_b64 exec, exec ; GFX9-O3-NEXT: s_not_b64 exec, exec
; GFX9-O3-NEXT: s_waitcnt vmcnt(0) ; GFX9-O3-NEXT: s_waitcnt vmcnt(0)
; GFX9-O3-NEXT: v_mov_b32_e32 v5, s8 ; GFX9-O3-NEXT: v_mov_b32_e32 v5, s8
; GFX9-O3-NEXT: v_mov_b32_e32 v6, s9 ; GFX9-O3-NEXT: v_mov_b32_e32 v6, s9
; GFX9-O3-NEXT: s_not_b64 exec, exec ; GFX9-O3-NEXT: s_not_b64 exec, exec
; GFX9-O3-NEXT: v_mov_b32_e32 v7, v1 ; GFX9-O3-NEXT: v_mov_b32_e32 v7, v1
; GFX9-O3-NEXT: v_mov_b32_e32 v9, v3
; GFX9-O3-NEXT: v_mov_b32_e32 v8, v2 ; GFX9-O3-NEXT: v_mov_b32_e32 v8, v2
; GFX9-O3-NEXT: v_mov_b32_e32 v9, v3
; GFX9-O3-NEXT: v_mov_b32_e32 v10, v4 ; GFX9-O3-NEXT: v_mov_b32_e32 v10, v4
; GFX9-O3-NEXT: v_mov_b32_e32 v11, v5 ; GFX9-O3-NEXT: v_mov_b32_e32 v11, v5
; GFX9-O3-NEXT: v_mov_b32_e32 v12, v6 ; GFX9-O3-NEXT: v_mov_b32_e32 v12, v6
; GFX9-O3-NEXT: buffer_store_dwordx4 v[7:10], v0, s[4:7], 0 offen ; GFX9-O3-NEXT: buffer_store_dwordx4 v[7:10], v0, s[4:7], 0 offen
; GFX9-O3-NEXT: buffer_store_dwordx2 v[11:12], v0, s[4:7], 0 offen offset:16 ; GFX9-O3-NEXT: buffer_store_dwordx2 v[11:12], v0, s[4:7], 0 offen offset:16
; GFX9-O3-NEXT: s_or_saveexec_b64 s[4:5], -1 ; GFX9-O3-NEXT: s_or_saveexec_b64 s[4:5], -1
; GFX9-O3-NEXT: buffer_load_dword v1, off, s[0:3], s32 ; 4-byte Folded Reload ; GFX9-O3-NEXT: buffer_load_dword v1, off, s[0:3], s32 ; 4-byte Folded Reload
; GFX9-O3-NEXT: s_nop 0 ; GFX9-O3-NEXT: s_nop 0
▲ Show 20 Lines • Show All 48 Lines • Show Last 20 Lines