Address Review comments.

Move codegen tests to CodeGen, add IR test for InferAddressSpace flat_atomic.

Rework approach of fix.

Hey Matt, Jay,

Address Review Comments.

In D130797#3688340, @kerbowa wrote:

Thanks! I like the idea behind the greedy solver. Not sure about SchedGroupSU. Maybe just a map between SUs and lists of schedgroups? I think trying to track sched_group_barriers by their order and assigning that an index is a bit confusing.

Remove unnecessary local var

LGTM

Address review comments.

Include test which which minimally reproduces the SmallVector error reported.

Remove unnecessary debug code.

Addressed review comments.

Hey Austin -- I like the removal of canAddMIs. In the original design, I was leaving open the possibility for users to pass in canAddMIs rather than a mask / SchedGroup name, but it looks like this isn't the direction we're going, and the classification functions defined in a general canAddMI makes things easier.

Remove accidental files

Run instnamer on testfile, explicitly use "source" (RRList) scheduler for InstSelection Scheduler in test.

Broke up logic in ScheduleDAGFast CheckForLiveRegDef to remove redundancy.

Ported over to phab review to land in Trunk. Addressed the requests in initial review, renamed test file to better align with naming of previous test.

Fix naming of the parser.

Thanks for addressing the post-commit requests in D125997. LGTM

In D125997#3541395, @kerbowa wrote:

I think your last diff overwrote the changes before last. I.e. the added comments and renamed cl opts are gone.

Write back the changes that were accidentally overwritten

Testing on CK uncovered an edge case error w/ the way bundle iteration was done.

Addressed Review comments:

1. Command line option naming.
2. Included comments where code was potentially confusing

Addressed review comments:

1. Added options for sizing of specific instruction groups
2. Renamed the DAG Mutation -- renaming suggestions welcomed.
3. Minor details

Resolve NITs

Fix algorithmic flaws:

1. Use chain as cluster shape (A->B->C->D) instead of fanout (A->{B,C,D}). With a chain, the scheduler will not miss cluster edges due to multiple cluster succs.
2. Create artificial edges in the cluster. This will coerce the scheduler to start from either the root or leaf of the cluster rather than potentially selecting the middle. In post RA scheduling, if the scheduler selects the middle, it will lose the cluster prefix.

Remove extraneous file

Add test to MIR after both scheduling passes in sequence to confirm clustering results hold.

Resolve silly arcconfig issue.

Updating D124678: [AMDGPU] Allow for MFMA Inst Clustering

In D124678#3482965, @rampitec wrote:

One thing to mention: transferring all successors and predecessors technically does not guarantee that an independent instruction will not be scheduled in between. I see that you are adding SDep::Cluster, but I remember it didn't use to work in the very similar scenario before. Not sure it is still so. It can happen that in a bigger program the cluster may be broken.

Also we probably need to consider dropping MFMA clustering along with load clustering during GCNScheduleDAGMILive::UnclusteredReschedule stage.