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[AMDGPU] Legalize operands of V_ADDC_U32_e32 and friends
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Authored by foad on Jul 27 2021, 5:54 AM.

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Summary

These instructions have an implicit use of vcc which counts towards the
constant bus limit. Pre gfx10 this means that the explicit operands
cannot be sgprs. Use the custom inserter hook to call legalizeOperands
to enforce that restriction.

Fixes https://bugs.llvm.org/show_bug.cgi?id=51217

Diff Detail

Event Timeline

foad created this revision.Jul 27 2021, 5:54 AM
foad requested review of this revision.Jul 27 2021, 5:54 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 27 2021, 5:54 AM
foad added a comment.Jul 27 2021, 5:58 AM

The patch attached to https://bugs.llvm.org/show_bug.cgi?id=51217 tests this. I'm not sure how else to test it, because normally 64-bit add/sub gets selected to a pseudo, which is expanded to add_co/addc by some code in EmitInstrWithCustomInserter which already calls legalizeOperands on the addc.

Can you test this with the carry out intrinsics?

foad added a comment.Jul 27 2021, 6:23 AM

Can you test this with the carry out intrinsics?

I don't think so because it only affects the carry-in instructions.

Can you test this with the carry out intrinsics?

I don't think so because it only affects the carry-in instructions.

If you have a wider carry out intrinsic (e.g. i128) it should need legalization involving carry in

foad updated this revision to Diff 362069.Jul 27 2021, 9:35 AM

Add a test case that fails verification without this fix.

Any objections? This is currently blocking D106471.

rampitec accepted this revision.Aug 2 2021, 2:02 PM

LGTM

This revision is now accepted and ready to land.Aug 2 2021, 2:02 PM
This revision was automatically updated to reflect the committed changes.