[PowerPC] swdiv_nochk Builtins for XL Compat

[quinnp]

Summary

This patch is in a series of patches to provide builtins for
compatibility with the XL compiler. This patch adds software divide
builtins with no checking. These builtins are each emitted as a fast
fdiv.

[nemanjai]

LGTM other than a couple of nits.

clang/lib/CodeGen/CGBuiltin.cpp

15627

Nit: naming convention for variables is that they are capitalized CamelCase.

clang/test/CodeGen/builtins-ppc-xlcompat-swdiv_nochk.c

3

One Linux run line and one AIX run line should suffice.

[quinnp]

Adressing review comments.

[quinnp]

Fixing a syntax error.

[quinnp]

Removing entry checks from front end test.

clang/include/clang/Basic/BuiltinsPPC.def

 BUILTIN(__builtin_ppc_fcfid, "dd", "")
 BUILTIN(__builtin_ppc_fcfud, "dd", "")
 BUILTIN(__builtin_ppc_fctid, "dd", "")
 BUILTIN(__builtin_ppc_fctidz, "dd", "")
 BUILTIN(__builtin_ppc_fctiw, "dd", "")
 BUILTIN(__builtin_ppc_fctiwz, "dd", "")
 BUILTIN(__builtin_ppc_fctudz, "dd", "")
 BUILTIN(__builtin_ppc_fctuwz, "dd", "")
+BUILTIN(__builtin_ppc_swdiv_nochk, "ddd", "")
+BUILTIN(__builtin_ppc_swdivs_nochk, "fff", "")
 // Compare
 BUILTIN(__builtin_ppc_cmpeqb, "LLiLLiLLi", "")
 BUILTIN(__builtin_ppc_cmprb, "iCIiii", "")
 BUILTIN(__builtin_ppc_setb, "LLiLLiLLi", "")
 // Multiply
 BUILTIN(__builtin_ppc_mulhd, "LLiLiLi", "")
 BUILTIN(__builtin_ppc_mulhdu, "ULLiULiULi", "")
 BUILTIN(__builtin_ppc_mulhw, "iii", "")

clang/lib/Basic/Targets/PPC.cpp

static void defineXLCompatMacros(MacroBuilder &Builder) {
   Builder.defineMacro("__rlwimi", "__builtin_ppc_rlwimi");
   Builder.defineMacro("__rldimi", "__builtin_ppc_rldimi");
   Builder.defineMacro("__load2r", "__builtin_ppc_load2r");
   Builder.defineMacro("__load4r", "__builtin_ppc_load4r");
   Builder.defineMacro("__load8r", "__builtin_ppc_load8r");
   Builder.defineMacro("__store2r", "__builtin_ppc_store2r");
   Builder.defineMacro("__store4r", "__builtin_ppc_store4r");
   Builder.defineMacro("__store8r", "__builtin_ppc_store8r");
+  Builder.defineMacro("__swdiv_nochk", "__builtin_ppc_swdiv_nochk");
+  Builder.defineMacro("__swdivs_nochk", "__builtin_ppc_swdivs_nochk");
 }
 
 /// PPCTargetInfo::getTargetDefines - Return a set of the PowerPC-specific
 /// #defines that are not tied to a specific subtarget.
 void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
                                      MacroBuilder &Builder) const {
 
   defineXLCompatMacros(Builder);

clang/lib/CodeGen/CGBuiltin.cpp

#include "clang/Basic/BuiltinsPPC.def"
   case PPC::BI__builtin_ppc_ldarx:
   case PPC::BI__builtin_ppc_lwarx:
     return emitPPCLoadReserveIntrinsic(*this, BuiltinID, E);
   case PPC::BI__builtin_ppc_popcntb: {
     Value *ArgValue = EmitScalarExpr(E->getArg(0));
     llvm::Type *ArgType = ArgValue->getType();
     Function *F = CGM.getIntrinsic(Intrinsic::ppc_popcntb, {ArgType, ArgType});
     return Builder.CreateCall(F, Ops, "popcntb");
+
+  case PPC::BI__builtin_ppc_swdiv_nochk:
+  case PPC::BI__builtin_ppc_swdivs_nochk: {
+    FastMathFlags FMF = Builder.getFastMathFlags();
+    Builder.getFastMathFlags().setFast();
+    Value *fdiv = Builder.CreateFDiv(Ops[0], Ops[1], "swdiv_nochk");
+    Builder.getFastMathFlags() &= (FMF);
+    return fdiv;
   }
   }
 }
 
 namespace {
 // If \p E is not null pointer, insert address space cast to match return
 // type of \p E if necessary.
 Value *EmitAMDGPUDispatchPtr(CodeGenFunction &CGF,
                              const CallExpr *E = nullptr) {
   auto *F = CGF.CGM.getIntrinsic(Intrinsic::amdgcn_dispatch_ptr);
   auto *Call = CGF.Builder.CreateCall(F);
   Call->addAttribute(
       AttributeList::ReturnIndex,

 // For processing memory ordering and memory scope arguments of various
 // amdgcn builtins.
 // \p Order takes a C++11 comptabile memory-ordering specifier and converts
 // it into LLVM's memory ordering specifier using atomic C ABI, and writes
 // to \p AO. \p Scope takes a const char * and converts it into AMDGCN
 // specific SyncScopeID and writes it to \p SSID.
 bool CodeGenFunction::ProcessOrderScopeAMDGCN(Value *Order, Value *Scope,
                                               llvm::AtomicOrdering &AO,
                                               llvm::SyncScope::ID &SSID) {
   if (isa<llvm::ConstantInt>(Order)) {
     int ord = cast<llvm::ConstantInt>(Order)->getZExtValue();
 
     // Map C11/C++11 memory ordering to LLVM memory ordering
     assert(llvm::isValidAtomicOrderingCABI(ord));
     switch (static_cast<llvm::AtomicOrderingCABI>(ord)) {
     case llvm::AtomicOrderingCABI::acquire:
     case llvm::AtomicOrderingCABI::consume:
if (isa<llvm::ConstantInt>(Order)) {
     llvm::getConstantStringInfo(Scope, scp);
     SSID = getLLVMContext().getOrInsertSyncScopeID(scp);
     return true;
   }
   return false;
 }
 
 Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
                                               const CallExpr *E) {
   llvm::AtomicOrdering AO = llvm::AtomicOrdering::SequentiallyConsistent;
   llvm::SyncScope::ID SSID;
   switch (BuiltinID) {
   case AMDGPU::BI__builtin_amdgcn_div_scale:
   case AMDGPU::BI__builtin_amdgcn_div_scalef: {
     // Translate from the intrinsics's struct return to the builtin's out
     // argument.
 
Value *CodeGenFunction::EmitAMDGPUBuiltinExpr(unsigned BuiltinID,
   }
 }
 
 /// Handle a SystemZ function in which the final argument is a pointer
 /// to an int that receives the post-instruction CC value.  At the LLVM level
 /// this is represented as a function that returns a {result, cc} pair.
 static Value *EmitSystemZIntrinsicWithCC(CodeGenFunction &CGF,
                                          unsigned IntrinsicID,
                                          const CallExpr *E) {
   unsigned NumArgs = E->getNumArgs() - 1;
   SmallVector<Value *, 8> Args(NumArgs);
   for (unsigned I = 0; I < NumArgs; ++I)
     Args[I] = CGF.EmitScalarExpr(E->getArg(I));
   Address CCPtr = CGF.EmitPointerWithAlignment(E->getArg(NumArgs));
   Function *F = CGF.CGM.getIntrinsic(IntrinsicID);
   Value *Call = CGF.Builder.CreateCall(F, Args);
   Value *CC = CGF.Builder.CreateExtractValue(Call, 1);
   CGF.Builder.CreateStore(CC, CCPtr);
   return CGF.Builder.CreateExtractValue(Call, 0);
 }
 
 Value *CodeGenFunction::EmitSystemZBuiltinExpr(unsigned BuiltinID,
                                                const CallExpr *E) {
   switch (BuiltinID) {
   case SystemZ::BI__builtin_tbegin: {
     Value *TDB = EmitScalarExpr(E->getArg(0));
     Value *Control = llvm::ConstantInt::get(Int32Ty, 0xff0c);
     Function *F = CGM.getIntrinsic(Intrinsic::s390_tbegin);
     return Builder.CreateCall(F, {TDB, Control});
   }
   case SystemZ::BI__builtin_tbegin_nofloat: {

 
 #undef INTRINSIC_WITH_CC
 
   default:
     return nullptr;
   }
 }
 
 namespace {
 // Helper classes for mapping MMA builtins to particular LLVM intrinsic variant.
 struct NVPTXMmaLdstInfo {
   unsigned NumResults;  // Number of elements to load/store
   // Intrinsic IDs for row/col variants. 0 if particular layout is unsupported.
   unsigned IID_col;
   unsigned IID_row;
 };
 

 #undef MMA_VARIANTS_I4
 #undef MMA_VARIANTS_B1_AND
 #undef MMA_VARIANTS_B1_XOR
 }
 
 } // namespace
 
 Value *
 CodeGenFunction::EmitNVPTXBuiltinExpr(unsigned BuiltinID, const CallExpr *E) {
   auto MakeLdg = [&](unsigned IntrinsicID) {
     Value *Ptr = EmitScalarExpr(E->getArg(0));
     clang::CharUnits Align =
         CGM.getNaturalPointeeTypeAlignment(E->getArg(0)->getType());
     return Builder.CreateCall(
         CGM.getIntrinsic(IntrinsicID, {Ptr->getType()->getPointerElementType(),
                                        Ptr->getType()}),
         {Ptr, ConstantInt::get(Builder.getInt32Ty(), Align.getQuantity())});
for (unsigned i = 0; i < MI.NumEltsD; ++i)
           CharUnits::fromQuantity(4));
     return Result;
   }
   default:
     return nullptr;
   }
 }
 
 namespace {
 struct BuiltinAlignArgs {
   llvm::Value *Src = nullptr;
   llvm::Type *SrcType = nullptr;
   llvm::Value *Alignment = nullptr;
   llvm::Value *Mask = nullptr;
   llvm::IntegerType *IntType = nullptr;
 
   BuiltinAlignArgs(const CallExpr *E, CodeGenFunction &CGF) {
BuiltinAlignArgs(const CallExpr *E, CodeGenFunction &CGF) {
     Alignment = CGF.Builder.CreateZExtOrTrunc(Alignment, IntType, "alignment");
     auto *One = llvm::ConstantInt::get(IntType, 1);
     Mask = CGF.Builder.CreateSub(Alignment, One, "mask");
   }
 };
 } // namespace
 
 /// Generate (x & (y-1)) == 0.
 RValue CodeGenFunction::EmitBuiltinIsAligned(const CallExpr *E) {
   BuiltinAlignArgs Args(E, *this);
   llvm::Value *SrcAddress = Args.Src;
   if (Args.SrcType->isPointerTy())
     SrcAddress =
         Builder.CreateBitOrPointerCast(Args.Src, Args.IntType, "src_addr");
   return RValue::get(Builder.CreateICmpEQ(
       Builder.CreateAnd(SrcAddress, Args.Mask, "set_bits"),
       llvm::Constant::getNullValue(Args.IntType), "is_aligned"));
 }
 
 /// Generate (x & ~(y-1)) to align down or ((x+(y-1)) & ~(y-1)) to align up.
 /// Note: For pointer types we can avoid ptrtoint/inttoptr pairs by using the
 /// llvm.ptrmask instrinsic (with a GEP before in the align_up case).
 /// TODO: actually use ptrmask once most optimization passes know about it.
 RValue CodeGenFunction::EmitBuiltinAlignTo(const CallExpr *E, bool AlignUp) {
   BuiltinAlignArgs Args(E, *this);
   llvm::Value *SrcAddr = Args.Src;
   if (Args.Src->getType()->isPointerTy())
     SrcAddr = Builder.CreatePtrToInt(Args.Src, Args.IntType, "intptr");
   llvm::Value *SrcForMask = SrcAddr;
   if (AlignUp) {
     // When aligning up we have to first add the mask to ensure we go over the
     // next alignment value and then align down to the next valid multiple.
if (Args.Src->getType()->isPointerTy()) {
     // propagated to loads/stores, etc.
     emitAlignmentAssumption(Result, E, E->getExprLoc(), Args.Alignment);
   }
   assert(Result->getType() == Args.SrcType);
   return RValue::get(Result);
 }
 
 Value *CodeGenFunction::EmitWebAssemblyBuiltinExpr(unsigned BuiltinID,
                                                    const CallExpr *E) {
   switch (BuiltinID) {
   case WebAssembly::BI__builtin_wasm_memory_size: {
     llvm::Type *ResultType = ConvertType(E->getType());
     Value *I = EmitScalarExpr(E->getArg(0));
     Function *Callee =
         CGM.getIntrinsic(Intrinsic::wasm_memory_size, ResultType);
     return Builder.CreateCall(Callee, I);
   }
case WebAssembly::BI__builtin_wasm_shuffle_i8x16: {
     return Builder.CreateCall(Callee, Ops);
   }
   default:
     return nullptr;
   }
 }
 
 static std::pair<Intrinsic::ID, unsigned>
 getIntrinsicForHexagonNonGCCBuiltin(unsigned BuiltinID) {
   struct Info {
     unsigned BuiltinID;
     Intrinsic::ID IntrinsicID;
     unsigned VecLen;
   };
   Info Infos[] = {
 #define CUSTOM_BUILTIN_MAPPING(x,s) \
   { Hexagon::BI__builtin_HEXAGON_##x, Intrinsic::hexagon_##x, s },
const Info *F = std::lower_bound(std::begin(Infos), std::end(Infos),
                                    Info{BuiltinID, 0, 0}, CmpInfo);
   if (F == std::end(Infos) || F->BuiltinID != BuiltinID)
     return {Intrinsic::not_intrinsic, 0};
 
   return {F->IntrinsicID, F->VecLen};
 }
 
 Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
                                                const CallExpr *E) {
   Intrinsic::ID ID;
   unsigned VecLen;
   std::tie(ID, VecLen) = getIntrinsicForHexagonNonGCCBuiltin(BuiltinID);
 
   auto MakeCircOp = [this, E](unsigned IntID, bool IsLoad) {
     // The base pointer is passed by address, so it needs to be loaded.
     Address A = EmitPointerWithAlignment(E->getArg(0));
     Address BP = Address(
Value *CodeGenFunction::EmitHexagonBuiltinExpr(unsigned BuiltinID,
   } // default
   } // switch
 
   return nullptr;
 }
 
 Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned BuiltinID,
                                              const CallExpr *E,
                                              ReturnValueSlot ReturnValue) {
   SmallVector<Value *, 4> Ops;
   llvm::Type *ResultType = ConvertType(E->getType());
 
   for (unsigned i = 0, e = E->getNumArgs(); i != e; i++)
     Ops.push_back(EmitScalarExpr(E->getArg(i)));
 
   Intrinsic::ID ID = Intrinsic::not_intrinsic;
   unsigned NF = 1;
Value *CodeGenFunction::EmitRISCVBuiltinExpr(unsigned BuiltinID,
   // Vector builtins are handled from here.
 #include "clang/Basic/riscv_vector_builtin_cg.inc"
   }
 
   assert(ID != Intrinsic::not_intrinsic);
 
   llvm::Function *F = CGM.getIntrinsic(ID, IntrinsicTypes);
   return Builder.CreateCall(F, Ops, "");
 }

clang/test/CodeGen/builtins-ppc-xlcompat-swdiv_nochk.c

+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// REQUIRES: powerpc-registered-target
+// RUN: %clang_cc1 -triple powerpc64-unknown-unknown \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64le-unknown-unknown \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr8 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc64-unknown-aix \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+// RUN: %clang_cc1 -triple powerpc-unknown-aix \
+// RUN:   -emit-llvm %s -o - -target-cpu pwr7 | FileCheck %s
+
+extern double a;
+extern double b;
+extern double c;
+extern float d;
+extern float e;
+extern float f;
+
+// CHECK-LABEL: @test_swdiv_nochk(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load double, double* @a, align 8
+// CHECK-NEXT:    [[TMP1:%.*]] = load double, double* @b, align 8
+// CHECK-NEXT:    [[SWDIV_NOCHK:%.*]] = fdiv fast double [[TMP0]], [[TMP1]]
+// CHECK-NEXT:    ret double [[SWDIV_NOCHK]]
+//
+double test_swdiv_nochk() {
+  return __swdiv_nochk(a, b);
+}
+
+// CHECK-LABEL: @test_swdivs_nochk(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @d, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = load float, float* @e, align 4
+// CHECK-NEXT:    [[SWDIV_NOCHK:%.*]] = fdiv fast float [[TMP0]], [[TMP1]]
+// CHECK-NEXT:    ret float [[SWDIV_NOCHK]]
+//
+float test_swdivs_nochk() {
+  return __swdivs_nochk(d, e);
+}
+
+// CHECK-LABEL: @test_flags_swdiv_nochk(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load double, double* @a, align 8
+// CHECK-NEXT:    [[TMP1:%.*]] = load double, double* @b, align 8
+// CHECK-NEXT:    [[SWDIV_NOCHK:%.*]] = fdiv fast double [[TMP0]], [[TMP1]]
+// CHECK-NEXT:    [[TMP2:%.*]] = load double, double* @c, align 8
+// CHECK-NEXT:    [[ADD:%.*]] = fadd double [[SWDIV_NOCHK]], [[TMP2]]
+// CHECK-NEXT:    ret double [[ADD]]
+//
+double test_flags_swdiv_nochk() {
+  return __swdiv_nochk(a, b) + c;
+}
+
+// CHECK-LABEL: @test_flags_swdivs_nochk(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @d, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = load float, float* @e, align 4
+// CHECK-NEXT:    [[SWDIV_NOCHK:%.*]] = fdiv fast float [[TMP0]], [[TMP1]]
+// CHECK-NEXT:    [[TMP2:%.*]] = load float, float* @f, align 4
+// CHECK-NEXT:    [[ADD:%.*]] = fadd float [[SWDIV_NOCHK]], [[TMP2]]
+// CHECK-NEXT:    ret float [[ADD]]
+//
+float test_flags_swdivs_nochk() {
+  return __swdivs_nochk(d, e) + f;
+}
+
+// CHECK-LABEL: @test_builtin_ppc_swdiv_nochk(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load double, double* @a, align 8
+// CHECK-NEXT:    [[TMP1:%.*]] = load double, double* @b, align 8
+// CHECK-NEXT:    [[SWDIV_NOCHK:%.*]] = fdiv fast double [[TMP0]], [[TMP1]]
+// CHECK-NEXT:    ret double [[SWDIV_NOCHK]]
+//
+double test_builtin_ppc_swdiv_nochk() {
+  return __builtin_ppc_swdiv_nochk(a, b);
+}
+
+// CHECK-LABEL: @test_builtin_ppc_swdivs_nochk(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @d, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = load float, float* @e, align 4
+// CHECK-NEXT:    [[SWDIV_NOCHK:%.*]] = fdiv fast float [[TMP0]], [[TMP1]]
+// CHECK-NEXT:    ret float [[SWDIV_NOCHK]]
+//
+float test_builtin_ppc_swdivs_nochk() {
+  return __builtin_ppc_swdivs_nochk(d, e);
+}
+
+// CHECK-LABEL: @test_flags_builtin_ppc_swdiv_nochk(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load double, double* @a, align 8
+// CHECK-NEXT:    [[TMP1:%.*]] = load double, double* @b, align 8
+// CHECK-NEXT:    [[SWDIV_NOCHK:%.*]] = fdiv fast double [[TMP0]], [[TMP1]]
+// CHECK-NEXT:    [[TMP2:%.*]] = load double, double* @c, align 8
+// CHECK-NEXT:    [[ADD:%.*]] = fadd double [[SWDIV_NOCHK]], [[TMP2]]
+// CHECK-NEXT:    ret double [[ADD]]
+//
+double test_flags_builtin_ppc_swdiv_nochk() {
+  return __builtin_ppc_swdiv_nochk(a, b) + c;
+}
+
+// CHECK-LABEL: @test_flags_builtin_ppc_swdivs_nochk(
+// CHECK-NEXT:  entry:
+// CHECK-NEXT:    [[TMP0:%.*]] = load float, float* @d, align 4
+// CHECK-NEXT:    [[TMP1:%.*]] = load float, float* @e, align 4
+// CHECK-NEXT:    [[SWDIV_NOCHK:%.*]] = fdiv fast float [[TMP0]], [[TMP1]]
+// CHECK-NEXT:    [[TMP2:%.*]] = load float, float* @f, align 4
+// CHECK-NEXT:    [[ADD:%.*]] = fadd float [[SWDIV_NOCHK]], [[TMP2]]
+// CHECK-NEXT:    ret float [[ADD]]
+//
+float test_flags_builtin_ppc_swdivs_nochk() {
+  return __builtin_ppc_swdivs_nochk(d, e) + f;
+}