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[PowerPC] Implement quadword atomic load/store
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Authored by lkail on Jul 8 2021, 12:21 AM.

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Summary

Add support to load/store i128 atomically.

Diff Detail

Event Timeline

lkail created this revision.Jul 8 2021, 12:21 AM
lkail requested review of this revision.Jul 8 2021, 12:21 AM
Herald added a project: Restricted Project. · View Herald TranscriptJul 8 2021, 12:21 AM
lkail edited the summary of this revision. (Show Details)Jul 8 2021, 12:47 AM
jsji accepted this revision as: jsji.Tue, Aug 31, 11:34 AM

LGTM with some nits. Thanks!

llvm/lib/Target/PowerPC/PPCISelLowering.cpp
10463

nit: multiline after if should be within {/}?

10543

Add comments to all the following code please.

12741

Looks like we can common up most of these code for LQX_PSEUDO/STQX_PSEUDO? Just need additional check for last BuildMI?

17390–17391

So we will set Flag to PPC::MOF_DoubleWordInt for 128. Although we haven't used the flags for now, I think it would be better if we add one more flag for 128?

llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
3107

nit: indent is off?

This revision is now accepted and ready to land.Tue, Aug 31, 11:34 AM
lkail updated this revision to Diff 369862.Tue, Aug 31, 11:28 PM
lkail marked 3 inline comments as done.Tue, Aug 31, 11:30 PM
lkail added inline comments.
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
17390–17391

Good catch. I'll add TODO at PPCTargetLowering::initializeAddrModeMap and address it with following patches.

llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
3107

Already run clang-format on it, it should have matched clang-format's behavior.

This revision was landed with ongoing or failed builds.Tue, Aug 31, 11:55 PM
This revision was automatically updated to reflect the committed changes.