Implement target independent TLS compatible with glibc's emutls.c.

[chh]

Summary

• The 'common' section TLS is not implemented. Current C/C++ TLS variables are not placed in common section.

• DWARF debug info to get the address of TLS variables is not generated yet.

clang and driver: (in http://reviews.llvm.org/D10524)

• Added -femulated-tls flag to select the emulated TLS model, which will be used for old targets like Android that do not support ELF TLS models.
• Added unit tests to check the effect of -femulated-tls.

llvm:

• Added TargetLowering::LowerToTLSEmulatedModel as a target-independent function to convert a SDNode of TLS variable address to a function call to __emutls_get_address.
• Added into lib/Target/*/*ISelLowering.cpp to call LowerToTLSEmulatedModel for TLSModel::Emulated. Although all targets supporting ELF TLS models are enhanced, emulated TLS model has been tested only for Android ELF targets.
• Modified AsmPrinter.cpp to print the emutls_v.* and emutls_t.* variables for emulated TLS variables.
• Modified DwarfCompileUnit.cpp to skip some DIE for emulated TLS variabls. TODO: Add proper DIE for emulated TLS variables.
• Added new unit tests with emulated TLS.

[chh]

The required changes to clang and driver are in http://reviews.llvm.org/D10524.

[chh]

ping.

[chh]

To fix bug https://llvm.org/bugs/show_bug.cgi?id=23566

[echristo]

Hi David,

Me, Chandler, Tim, or Owen (already on) are probably the best bets to review this.

-eric

[chh]

ping.

[danalbert]

Chris: Nick and Chandler mentioned that you're probably interested in this support too.

[beanz]

I'm definitely not the right person to approve this patch, but I skimmed it anyways. I did notice one small spelling error in one of the comments I called it out inline.

Really excited to see this going in! Thanks for putting this together.

docs/LangRef.rst

490

s/implemet/implement/

[davidxl]

The compile_rt runtime support is still missing. Is it in a different patch?

David

lib/CodeGen/AsmPrinter/AsmPrinter.cpp

381

Should GVSym be just overwritten for emulated tls?

388

This comment seems redundent

412

Note that this check is not necessary -- see previous early return.

422

Should this be moved into a helper routine to improve readability?

440

createEmuTLSInitSym is called later again which seems wrong.

505

Just overwrite GVSym?

506

This was called before.

[chh]

David, I have no patch for compile_rt since __emutls_get_address is already in libc.so of Android. Is that your concern?

[enh]

not really though --- i think you're getting that from libgcc. so
although short term you don't need to add this stuff to compiler-rt to
test, it will be necessary for anyone not using libgcc. (like us, at
some point in the future.)

[chh]

I see. It's probably more a package and license issue. GCC's code is small in
https://github.com/gcc-mirror/gcc/blob/master/libgcc/emutls.c
Maybe llvm compiler-rt expert can suggest a solution?

[davidxl]

The emulated tls support won't be complete until the builtins are
supported by llvm runtime. You will need to implemented. See
http://compiler-rt.llvm.org/ for project info.

David

[chh]

I will try an alternative flag as suggested in http://reviews.llvm.org/D10524.
This patch will be quite different with the new flag.

[chh]

docs/LangRef.rst

490

This part will be removed due to new simplified clang/driver flags.

lib/CodeGen/AsmPrinter/AsmPrinter.cpp

381

They are two different symbols in the emulated mode.
It helps debugging when GVSym is available even not emitted.

440

It's on purpose to get-or-create the symbol from one place, and createEmuTLSInitSym can be called multiple times.

505

It's useful to keep under emulated mode and debug both GVSym and EmittedInitSym.

506

It's okay. It returns the previously created symbol.

[srhines]

lib/CodeGen/AsmPrinter/AsmPrinter.cpp

440

In that case, let's not call the function "create...", since that implies something different. It might be better to call it getEmuTLSInitSym().

[davidxl]

lib/CodeGen/AsmPrinter/AsmPrinter.cpp

440

make it clear to change the interface name to be something like 'getOrCreat ...'

[chh]

Diff 2 uses -femulated-tls flag instead of the "emulated" attribute in C/C++ and IL level.
This will work with Diff 3 in http://reviews.llvm.org/D10524.

[chh]

Any comment on the new Diff 2, 29974?
Does it address all previous comments?

[rnk]

Looks good to me.

bindings/ocaml/llvm/llvm.ml

 
 module ThreadLocalMode = struct
   type t =
   | None
   | GeneralDynamic
   | LocalDynamic
   | InitialExec
   | LocalExec
+  | Emulated
 end
 
 module AtomicOrdering = struct
   type t =
   | NotAtomic
   | Unordered
   | Monotonic
   | Invalid

bindings/ocaml/llvm/llvm.mli

(** The thread local mode of a global value, accessed with {!thread_local_mode}
     See [llvm::GlobalVariable::ThreadLocalMode]. *)
 module ThreadLocalMode : sig
   type t =
   | None
   | GeneralDynamic
   | LocalDynamic
   | InitialExec
   | LocalExec
+  | Emulated
 end
 
 (** The ordering of an atomic [load], [store], [cmpxchg], [atomicrmw] or
     [fence] instruction. See [llvm::AtomicOrdering]. *)
 module AtomicOrdering : sig
   type t =
   | NotAtomic
   | Unordered

docs/BitCodeFormat.rst

 
 * *threadlocal*: If present, an encoding of the thread local storage mode of the
   variable:
   * ``not thread local``: code 0
   * ``thread local; default TLS model``: code 1
   * ``localdynamic``: code 2
   * ``initialexec``: code 3
   * ``localexec``: code 4
+  * ``emulated``: code 5
 
 * *unnamed_addr*: If present and non-zero, indicates that the variable has
   ``unnamed_addr``
 
 .. _bcdllstorageclass:
 
 * *dllstorageclass*: If present, an encoding of the DLL storage class of this variable:
 

docs/LangRef.rst

 TLS model may be specified:
 
 ``localdynamic``
     For variables that are only used within the current shared library.
 ``initialexec``
     For variables in modules that will not be loaded dynamically.
 ``localexec``
     For variables defined in the executable and only used within it.
+``emulated``
+    For variables to work on platforms that do not support ELF TLS models.
 
 If no explicit model is given, the "general dynamic" model is used.
+When a target does not implement "general dynamic" model, it might
+implemet the "emulated" mode as the default.
 
-The models correspond to the ELF TLS models; see `ELF Handling For
+The models, except the emulated,
+correspond to the ELF TLS models; see `ELF Handling For
 Thread-Local Storage <http://people.redhat.com/drepper/tls.pdf>`_ for
 more information on under which circumstances the different models may
 be used. The target may choose a different TLS model if the specified
 model is not supported, or if a better choice of model can be made.
 
 A model can also be specified in a alias, but then it only governs how
 the alias is accessed. It will not have any effect in the aliasee.
 

include/llvm-c/Core.h

typedef enum {
   LLVMLandingPadFilter    /**< A filter clause  */
 } LLVMLandingPadClauseTy;
 
 typedef enum {
   LLVMNotThreadLocal = 0,
   LLVMGeneralDynamicTLSModel,
   LLVMLocalDynamicTLSModel,
   LLVMInitialExecTLSModel,
-  LLVMLocalExecTLSModel
+  LLVMLocalExecTLSModel,
+  LLVMEmulatedTLSModel
 } LLVMThreadLocalMode;
 
 typedef enum {
   LLVMAtomicOrderingNotAtomic = 0, /**< A load or store which is not atomic */
   LLVMAtomicOrderingUnordered = 1, /**< Lowest level of atomicity, guarantees
                                      somewhat sane results, lock free. */
   LLVMAtomicOrderingMonotonic = 2, /**< guarantees that if you take all the
                                      operations affecting a specific address,

include/llvm/IR/GlobalValue.h

protected:
 
   Module *Parent;             // The containing module.
 public:
   enum ThreadLocalMode {
     NotThreadLocal = 0,
     GeneralDynamicTLSModel,
     LocalDynamicTLSModel,
     InitialExecTLSModel,
-    LocalExecTLSModel
+    LocalExecTLSModel,
+    EmulatedTLSModel
   };
 
   ~GlobalValue() override {
     removeDeadConstantUsers();   // remove any dead constants using this.
   }
 
   unsigned getAlignment() const;
 
public:
   void setVisibility(VisibilityTypes V) {
     assert((!hasLocalLinkage() || V == DefaultVisibility) &&
            "local linkage requires default visibility");
     Visibility = V;
   }
 
   /// If the value is "Thread Local", its value isn't shared by the threads.
   bool isThreadLocal() const { return getThreadLocalMode() != NotThreadLocal; }
+  /// Set thread local model to GeneralDynamicTLSModel if the argument is true.
+  /// Use setThreadLocalMode for other thread local models.
   void setThreadLocal(bool Val) {
     setThreadLocalMode(Val ? GeneralDynamicTLSModel : NotThreadLocal);
   }
   void setThreadLocalMode(ThreadLocalMode Val) {
     assert(Val == NotThreadLocal || getValueID() != Value::FunctionVal);
     ThreadLocal = Val;
   }
   ThreadLocalMode getThreadLocalMode() const {

include/llvm/MC/MCObjectFileInfo.h

public:
 
   unsigned getCompactUnwindDwarfEHFrameOnly() const {
     return CompactUnwindDwarfEHFrameOnly;
   }
 
   MCSection *getTextSection() const { return TextSection; }
   MCSection *getDataSection() const { return DataSection; }
   MCSection *getBSSSection() const { return BSSSection; }
+  MCSection *getReadOnlySection() const { return ReadOnlySection; }
   MCSection *getLSDASection() const { return LSDASection; }
   MCSection *getCompactUnwindSection() const { return CompactUnwindSection; }
   MCSection *getDwarfAbbrevSection() const { return DwarfAbbrevSection; }
   MCSection *getDwarfInfoSection() const { return DwarfInfoSection; }
   MCSection *getDwarfLineSection() const { return DwarfLineSection; }
   MCSection *getDwarfFrameSection() const { return DwarfFrameSection; }
   MCSection *getDwarfPubNamesSection() const { return DwarfPubNamesSection; }
   MCSection *getDwarfPubTypesSection() const { return DwarfPubTypesSection; }

include/llvm/Support/CodeGen.h

namespace llvm {
   }
 
   // TLS models.
   namespace TLSModel {
     enum Model {
       GeneralDynamic,
       LocalDynamic,
       InitialExec,
-      LocalExec
+      LocalExec,
+      Emulated
     };
   }
 
   // Code generation optimization level.
   namespace CodeGenOpt {
     enum Level {
       None,        // -O0
       Less,        // -O1

include/llvm/Target/TargetLowering.h

public:
   virtual void
   AdjustInstrPostInstrSelection(MachineInstr *MI, SDNode *Node) const;
 
   /// If this function returns true, SelectionDAGBuilder emits a
   /// LOAD_STACK_GUARD node when it is lowering Intrinsic::stackprotector.
   virtual bool useLoadStackGuardNode() const {
     return false;
   }
+
+  /// Lower TLS global address SDNode for target independent emulated TLS model.
+  virtual SDValue LowerToTLSEmulatedModel(const GlobalAddressSDNode *GA,
+                                          SelectionDAG &DAG) const;
 };
 
 /// Given an LLVM IR type and return type attributes, compute the return value
 /// EVTs and flags, and optionally also the offsets, if the return value is
 /// being lowered to memory.
 void GetReturnInfo(Type* ReturnType, AttributeSet attr,
                    SmallVectorImpl<ISD::OutputArg> &Outs,
                    const TargetLowering &TLI);
 
 } // end llvm namespace
 
 #endif

lib/AsmParser/LLLexer.cpp

#define KEYWORD(STR)                                                           \
   KEYWORD(unnamed_addr);
   KEYWORD(externally_initialized);
   KEYWORD(extern_weak);
   KEYWORD(external);
   KEYWORD(thread_local);
   KEYWORD(localdynamic);
   KEYWORD(initialexec);
   KEYWORD(localexec);
+  KEYWORD(emulated);
   KEYWORD(zeroinitializer);
   KEYWORD(undef);
   KEYWORD(null);
   KEYWORD(to);
   KEYWORD(tail);
   KEYWORD(musttail);
   KEYWORD(target);
   KEYWORD(triple);

lib/AsmParser/LLParser.cpp

bool LLParser::ParseUInt64(uint64_t &Val) {
   Lex.Lex();
   return false;
 }
 
 /// ParseTLSModel
 ///   := 'localdynamic'
 ///   := 'initialexec'
 ///   := 'localexec'
+///   := 'emulated'
 bool LLParser::ParseTLSModel(GlobalVariable::ThreadLocalMode &TLM) {
   switch (Lex.getKind()) {
     default:
-      return TokError("expected localdynamic, initialexec or localexec");
+      return TokError("expected localdynamic, initialexec, localexec, or emulated");
     case lltok::kw_localdynamic:
       TLM = GlobalVariable::LocalDynamicTLSModel;
       break;
     case lltok::kw_initialexec:
       TLM = GlobalVariable::InitialExecTLSModel;
       break;
     case lltok::kw_localexec:
       TLM = GlobalVariable::LocalExecTLSModel;
       break;
+    case lltok::kw_emulated:
+      TLM = GlobalVariable::EmulatedTLSModel;
+      break;
   }
 
   Lex.Lex();
   return false;
 }
 
 /// ParseOptionalThreadLocal
 ///   := /*empty*/

lib/AsmParser/LLToken.h

enum Kind {
     kw_weak, // Used as a linkage, and a modifier for "cmpxchg".
     kw_weak_odr, kw_appending,
     kw_dllimport, kw_dllexport, kw_common, kw_available_externally,
     kw_default, kw_hidden, kw_protected,
     kw_unnamed_addr,
     kw_externally_initialized,
     kw_extern_weak,
     kw_external, kw_thread_local,
-    kw_localdynamic, kw_initialexec, kw_localexec,
+    kw_localdynamic, kw_initialexec, kw_localexec, kw_emulated,
     kw_zeroinitializer,
     kw_undef, kw_null,
     kw_to,
     kw_tail,
     kw_musttail,
     kw_target,
     kw_triple,
     kw_unwind,

lib/Bitcode/Reader/BitcodeReader.cpp

 static GlobalVariable::ThreadLocalMode getDecodedThreadLocalMode(unsigned Val) {
   switch (Val) {
     case 0: return GlobalVariable::NotThreadLocal;
     default: // Map unknown non-zero value to general dynamic.
     case 1: return GlobalVariable::GeneralDynamicTLSModel;
     case 2: return GlobalVariable::LocalDynamicTLSModel;
     case 3: return GlobalVariable::InitialExecTLSModel;
     case 4: return GlobalVariable::LocalExecTLSModel;
+    case 5: return GlobalVariable::EmulatedTLSModel;
   }
 }
 
 static int getDecodedCastOpcode(unsigned Val) {
   switch (Val) {
   default: return -1;
   case bitc::CAST_TRUNC   : return Instruction::Trunc;
   case bitc::CAST_ZEXT    : return Instruction::ZExt;

lib/Bitcode/Writer/BitcodeWriter.cpp

 
 static unsigned getEncodedThreadLocalMode(const GlobalValue &GV) {
   switch (GV.getThreadLocalMode()) {
     case GlobalVariable::NotThreadLocal:         return 0;
     case GlobalVariable::GeneralDynamicTLSModel: return 1;
     case GlobalVariable::LocalDynamicTLSModel:   return 2;
     case GlobalVariable::InitialExecTLSModel:    return 3;
     case GlobalVariable::LocalExecTLSModel:      return 4;
+    case GlobalVariable::EmulatedTLSModel:       return 5;
   }
   llvm_unreachable("Invalid TLS model");
 }
 
 static unsigned getEncodedComdatSelectionKind(const Comdat &C) {
   switch (C.getSelectionKind()) {
   case Comdat::Any:
     return bitc::COMDAT_SELECTION_KIND_ANY;

lib/CodeGen/AsmPrinter/AsmPrinter.cpp

void AsmPrinter::getNameWithPrefix(SmallVectorImpl<char> &Name,
                                    const GlobalValue *GV) const {
   TM.getNameWithPrefix(Name, GV, *Mang);
 }
 
 MCSymbol *AsmPrinter::getSymbol(const GlobalValue *GV) const {
   return TM.getSymbol(GV, *Mang);
 }
 
+static MCSymbol *createEmuTLSControlSym(MCSymbol *GVSym, MCContext &C) {
+  return C.getOrCreateSymbol(Twine("__emutls_v.") + GVSym->getName());
+}
+
+static MCSymbol *createEmuTLSInitSym(MCSymbol *GVSym, MCContext &C) {
+  return C.getOrCreateSymbol(Twine("__emutls_t.") + GVSym->getName());
+}
+
 /// EmitGlobalVariable - Emit the specified global variable to the .s file.
 void AsmPrinter::EmitGlobalVariable(const GlobalVariable *GV) {
+  bool IsEmuTLSVar =
+      GV->getThreadLocalMode() == llvm::GlobalVariable::EmulatedTLSModel;
+  assert((!IsEmuTLSVar || getObjFileLowering().getDataRelLocalSection()) &&
+         "Need relocatable local section for emulated TLS variables");
+  assert(!(IsEmuTLSVar && GV->hasCommonLinkage()) &&
+         "No emulated TLS variables in the common section");
+
   if (GV->hasInitializer()) {
     // Check to see if this is a special global used by LLVM, if so, emit it.
     if (EmitSpecialLLVMGlobal(GV))
       return;
 
     // Skip the emission of global equivalents. The symbol can be emitted later
     // on by emitGlobalGOTEquivs in case it turns out to be needed.
     if (GlobalGOTEquivs.count(getSymbol(GV)))
       return;
 
-    if (isVerbose()) {
+    if (isVerbose() && !IsEmuTLSVar) {
+      // When printing the control variable __emutls_v.*,
+      // we don't need to print the original TLS variable name.
       GV->printAsOperand(OutStreamer->GetCommentOS(),
                      /*PrintType=*/false, GV->getParent());
       OutStreamer->GetCommentOS() << '\n';
     }
   }
 
   MCSymbol *GVSym = getSymbol(GV);
-  EmitVisibility(GVSym, GV->getVisibility(), !GV->isDeclaration());
+  MCSymbol *EmittedSym = IsEmuTLSVar ?
+      createEmuTLSControlSym(GVSym, OutContext) : GVSym;
+  // createEmuTLSControlSym only creates the symbol with name and default attributes.
+  // GV's or GVSym's attributes will be used for the EmittedSym.
+
+  EmitVisibility(EmittedSym, GV->getVisibility(), !GV->isDeclaration());
 
+  // A declaration has no initializer and no control variable in the current
+  // module for the emulated TLS model.
   if (!GV->hasInitializer())   // External globals require no extra code.
     return;
 
   GVSym->redefineIfPossible();
   if (GVSym->isDefined() || GVSym->isVariable())
     report_fatal_error("symbol '" + Twine(GVSym->getName()) +
                        "' is already defined");
 
   if (MAI->hasDotTypeDotSizeDirective())
-    OutStreamer->EmitSymbolAttribute(GVSym, MCSA_ELF_TypeObject);
+    OutStreamer->EmitSymbolAttribute(EmittedSym, MCSA_ELF_TypeObject);
 
   SectionKind GVKind = TargetLoweringObjectFile::getKindForGlobal(GV, TM);
 
   const DataLayout *DL = TM.getDataLayout();
   uint64_t Size = DL->getTypeAllocSize(GV->getType()->getElementType());
 
   // If the alignment is specified, we *must* obey it.  Overaligning a global
   // with a specified alignment is a prompt way to break globals emitted to
   // sections and expected to be contiguous (e.g. ObjC metadata).
   unsigned AlignLog = getGVAlignmentLog2(GV, *DL);
 
+  bool AllZeroInitValue = false;
+  if (GV->hasInitializer()) {
+    const Constant *InitValue = GV->getInitializer();
+    if (isa<ConstantAggregateZero>(InitValue))
+      AllZeroInitValue = true;
+    else {
+      const ConstantInt *InitIntValue = dyn_cast<ConstantInt>(InitValue);
+      if (InitIntValue && InitIntValue->isZero())
+        AllZeroInitValue = true;
+    }
+  }
+  if (IsEmuTLSVar) {
+    // If there is init value, use .data.rel.local section;
+    // otherwise use the .data section.
+    MCSection *TLSVarSection = const_cast<MCSection*>(
+        (GV->hasInitializer() && !AllZeroInitValue)
+        ? getObjFileLowering().getDataRelLocalSection()
+        : getObjFileLowering().getDataSection());
+    OutStreamer->SwitchSection(TLSVarSection);
+    EmitLinkage(GV, EmittedSym);  // same linkage as GV
+    unsigned WordSize = DL->getPointerSize();
+    unsigned Alignment = DL->getPointerABIAlignment();
+    EmitAlignment(Log2_32(Alignment));
+    OutStreamer->EmitLabel(EmittedSym);
+    OutStreamer->EmitIntValue(Size, WordSize);
+    OutStreamer->EmitIntValue((1 << AlignLog), WordSize);
+    OutStreamer->EmitIntValue(0, WordSize);
+    if (GV->hasInitializer() && !AllZeroInitValue) {
+      OutStreamer->EmitSymbolValue(
+          createEmuTLSInitSym(GVSym, OutContext), WordSize);
+    } else
+      OutStreamer->EmitIntValue(0, WordSize);
+    if (MAI->hasDotTypeDotSizeDirective())
+      OutStreamer->emitELFSize(cast<MCSymbolELF>(EmittedSym),
+                               MCConstantExpr::create(4 * WordSize, OutContext));
+    OutStreamer->AddBlankLine();  // End of the __emutls_v.* variable.
+  }
+
   for (const HandlerInfo &HI : Handlers) {
     NamedRegionTimer T(HI.TimerName, HI.TimerGroupName, TimePassesIsEnabled);
     HI.Handler->setSymbolSize(GVSym, Size);
   }
 
   // Handle common and BSS local symbols (.lcomm).
   if (GVKind.isCommon() || GVKind.isBSSLocal()) {
+    assert(!(IsEmuTLSVar && GVKind.isCommon()) &&
+           "No emulated TLS variables in the common section");
     if (Size == 0) Size = 1;   // .comm Foo, 0 is undefined, avoid it.
     unsigned Align = 1 << AlignLog;
 
     // Handle common symbols.
     if (GVKind.isCommon()) {
       if (!getObjFileLowering().getCommDirectiveSupportsAlignment())
         Align = 0;
 
if (GVKind.isCommon() || GVKind.isBSSLocal()) {
 
     // .local _foo
     OutStreamer->EmitSymbolAttribute(GVSym, MCSA_Local);
     // .comm _foo, 42, 4
     OutStreamer->EmitCommonSymbol(GVSym, Size, Align);
     return;
   }
 
-  MCSection *TheSection =
+  if (IsEmuTLSVar && AllZeroInitValue)
+    return;  // No need of initialization values.
+
+  MCSymbol *EmittedInitSym = IsEmuTLSVar ?
+      createEmuTLSInitSym(GVSym, OutContext) : GVSym;
+  // createEmuTLSInitSym only creates the symbol with name and default attributes.
+  // GV's or GVSym's attributes will be used for the EmittedInitSym.
+
+  MCSection *TheSection = IsEmuTLSVar ?
+      getObjFileLowering().getReadOnlySection() :
       getObjFileLowering().SectionForGlobal(GV, GVKind, *Mang, TM);
 
   // Handle the zerofill directive on darwin, which is a special form of BSS
   // emission.
-  if (GVKind.isBSSExtern() && MAI->hasMachoZeroFillDirective()) {
+  if (GVKind.isBSSExtern() && MAI->hasMachoZeroFillDirective() && !IsEmuTLSVar) {
     if (Size == 0) Size = 1;  // zerofill of 0 bytes is undefined.
 
     // .globl _foo
     OutStreamer->EmitSymbolAttribute(GVSym, MCSA_Global);
     // .zerofill __DATA, __common, _foo, 400, 5
     OutStreamer->EmitZerofill(TheSection, GVSym, Size, 1 << AlignLog);
     return;
   }
 
   // Handle thread local data for mach-o which requires us to output an
   // additional structure of data and mangle the original symbol so that we
   // can reference it later.
   //
   // TODO: This should become an "emit thread local global" method on TLOF.
   // All of this macho specific stuff should be sunk down into TLOFMachO and
   // stuff like "TLSExtraDataSection" should no longer be part of the parent
   // TLOF class.  This will also make it more obvious that stuff like
   // MCStreamer::EmitTBSSSymbol is macho specific and only called from macho
   // specific code.
-  if (GVKind.isThreadLocal() && MAI->hasMachoTBSSDirective()) {
+  if (GVKind.isThreadLocal() && MAI->hasMachoTBSSDirective() && !IsEmuTLSVar) {
     // Emit the .tbss symbol
     MCSymbol *MangSym =
       OutContext.getOrCreateSymbol(GVSym->getName() + Twine("$tlv$init"));
 
     if (GVKind.isThreadBSS()) {
       TheSection = getObjFileLowering().getTLSBSSSection();
       OutStreamer->EmitTBSSSymbol(TheSection, MangSym, Size, 1 << AlignLog);
     } else if (GVKind.isThreadData()) {
if (GVKind.isThreadLocal() && MAI->hasMachoTBSSDirective() && !IsEmuTLSVar) {
     OutStreamer->EmitSymbolValue(MangSym, PtrSize);
 
     OutStreamer->AddBlankLine();
     return;
   }
 
   OutStreamer->SwitchSection(TheSection);
 
-  EmitLinkage(GV, GVSym);
+  // emutls_t.* symbols are only used in the current compilation unit.
+  if (!IsEmuTLSVar)
+    EmitLinkage(GV, EmittedInitSym);
   EmitAlignment(AlignLog, GV);
 
-  OutStreamer->EmitLabel(GVSym);
+  OutStreamer->EmitLabel(EmittedInitSym);
 
   EmitGlobalConstant(GV->getInitializer());
 
   if (MAI->hasDotTypeDotSizeDirective())
     // .size foo, 42
-    OutStreamer->emitELFSize(cast<MCSymbolELF>(GVSym),
+    OutStreamer->emitELFSize(cast<MCSymbolELF>(EmittedInitSym),
                              MCConstantExpr::create(Size, OutContext));
 
   OutStreamer->AddBlankLine();
 }
 
 /// EmitFunctionHeader - This method emits the header for the current
 /// function.
 void AsmPrinter::EmitFunctionHeader() {

lib/CodeGen/AsmPrinter/DwarfCompileUnit.cpp

DIE *DwarfCompileUnit::getOrCreateGlobalVariableDIE(
 
   // Add location.
   bool addToAccelTable = false;
   if (auto *Global = dyn_cast_or_null<GlobalVariable>(GV->getVariable())) {
     addToAccelTable = true;
     DIELoc *Loc = new (DIEValueAllocator) DIELoc;
     const MCSymbol *Sym = Asm->getSymbol(Global);
     if (Global->isThreadLocal()) {
+      if (Global->getThreadLocalMode() ==
+          llvm::GlobalValue::ThreadLocalMode::EmulatedTLSModel) {
+        // TODO: add debug info for emulated thread local mode.
+      } else {
         // FIXME: Make this work with -gsplit-dwarf.
         unsigned PointerSize = Asm->getDataLayout().getPointerSize();
         assert((PointerSize == 4 || PointerSize == 8) &&
                "Add support for other sizes if necessary");
         // Based on GCC's support for TLS:
         if (!DD->useSplitDwarf()) {
           // 1) Start with a constNu of the appropriate pointer size
           addUInt(*Loc, dwarf::DW_FORM_data1,
                   PointerSize == 4 ? dwarf::DW_OP_const4u : dwarf::DW_OP_const8u);
           // 2) containing the (relocated) offset of the TLS variable
           //    within the module's TLS block.
           addExpr(*Loc, dwarf::DW_FORM_udata,
                   Asm->getObjFileLowering().getDebugThreadLocalSymbol(Sym));
         } else {
           addUInt(*Loc, dwarf::DW_FORM_data1, dwarf::DW_OP_GNU_const_index);
           addUInt(*Loc, dwarf::DW_FORM_udata,
                   DD->getAddressPool().getIndex(Sym, /* TLS */ true));
         }
         // 3) followed by an OP to make the debugger do a TLS lookup.
         addUInt(*Loc, dwarf::DW_FORM_data1,
                 DD->useGNUTLSOpcode() ? dwarf::DW_OP_GNU_push_tls_address
                                       : dwarf::DW_OP_form_tls_address);
+      }
     } else {
       DD->addArangeLabel(SymbolCU(this, Sym));
       addOpAddress(*Loc, Sym);
     }
 
     addBlock(*VariableDIE, dwarf::DW_AT_location, Loc);
     addLinkageName(*VariableDIE, GV->getLinkageName());
   } else if (const ConstantInt *CI =

lib/CodeGen/SelectionDAG/TargetLowering.cpp

bool TargetLowering::expandFP_TO_SINT(SDNode *Node, SDValue &Result,
   SDValue Ret = DAG.getNode(ISD::SUB, dl, NVT,
       DAG.getNode(ISD::XOR, dl, NVT, R, Sign),
       Sign);
 
   Result = DAG.getSelectCC(dl, Exponent, DAG.getConstant(0, dl, IntVT),
       DAG.getConstant(0, dl, NVT), Ret, ISD::SETLT);
   return true;
 }
+
+//===----------------------------------------------------------------------===//
+// Implementation of Emulated TLS Model
+//===----------------------------------------------------------------------===//
+
+SDValue TargetLowering::LowerToTLSEmulatedModel(const GlobalAddressSDNode *GA,
+                                                SelectionDAG &DAG) const {
+  // Access to address of TLS varialbe xyz is lowered to a function call:
+  //   __emutls_get_address( address of global variable named "__emutls_v.xyz" )
+  EVT PtrVT = getPointerTy();
+  PointerType *VoidPtrType = Type::getInt8PtrTy(*DAG.getContext());
+  SDLoc dl(GA);
+
+  ArgListTy Args;
+  ArgListEntry Entry;
+  std::string NameString = ("__emutls_v." + GA->getGlobal()->getName()).str();
+  Module *VariableModule = const_cast<Module*>(GA->getGlobal()->getParent());
+  StringRef EmuTlsVarName(NameString);
+  GlobalVariable *EmuTlsVar = VariableModule->getNamedGlobal(EmuTlsVarName);
+  if (!EmuTlsVar)
+    EmuTlsVar = dyn_cast_or_null<GlobalVariable>(
+        VariableModule->getOrInsertGlobal(EmuTlsVarName, VoidPtrType));
+  Entry.Node = DAG.getGlobalAddress(EmuTlsVar, dl, PtrVT);
+  Entry.Ty = VoidPtrType;
+  Args.push_back(Entry);
+
+  SDValue EmuTlsGetAddr = DAG.getExternalSymbol("__emutls_get_address", PtrVT);
+
+  TargetLowering::CallLoweringInfo CLI(DAG);
+  CLI.setDebugLoc(dl).setChain(DAG.getEntryNode());
+  CLI.setCallee(CallingConv::C, VoidPtrType, EmuTlsGetAddr, std::move(Args), 0);
+  std::pair<SDValue, SDValue> CallResult = LowerCallTo(CLI);
+
+  // TLSADDR will be codegen'ed as call. Inform MFI that function has calls.
+  // At last for X86 targets, maybe good for other targets too?
+  MachineFrameInfo *MFI = DAG.getMachineFunction().getFrameInfo();
+  MFI->setAdjustsStack(true);  // Is this only for X86 target?
+  MFI->setHasCalls(true);
+
+  assert((GA->getOffset() == 0) &&
+         "Emulated TLS must have zero offset in GlobalAddressSDNode");
+  return CallResult.first;
+}

lib/IR/AsmWriter.cpp

case GlobalVariable::LocalDynamicTLSModel:
       Out << "thread_local(localdynamic) ";
       break;
     case GlobalVariable::InitialExecTLSModel:
       Out << "thread_local(initialexec) ";
       break;
     case GlobalVariable::LocalExecTLSModel:
       Out << "thread_local(localexec) ";
       break;
+    case GlobalVariable::EmulatedTLSModel:
+      Out << "thread_local(emulated) ";
+      break;
   }
 }
 
 static void maybePrintComdat(formatted_raw_ostream &Out,
                              const GlobalObject &GO) {
   const Comdat *C = GO.getComdat();
   if (!C)
     return;

lib/IR/Core.cpp

LLVMThreadLocalMode LLVMGetThreadLocalMode(LLVMValueRef GlobalVar) {
   case GlobalVariable::GeneralDynamicTLSModel:
     return LLVMGeneralDynamicTLSModel;
   case GlobalVariable::LocalDynamicTLSModel:
     return LLVMLocalDynamicTLSModel;
   case GlobalVariable::InitialExecTLSModel:
     return LLVMInitialExecTLSModel;
   case GlobalVariable::LocalExecTLSModel:
     return LLVMLocalExecTLSModel;
+  case GlobalVariable::EmulatedTLSModel:
+    return LLVMEmulatedTLSModel;
   }
 
   llvm_unreachable("Invalid GlobalVariable thread local mode");
 }
 
 void LLVMSetThreadLocalMode(LLVMValueRef GlobalVar, LLVMThreadLocalMode Mode) {
   GlobalVariable *GV = unwrap<GlobalVariable>(GlobalVar);
 
   switch (Mode) {
   case LLVMNotThreadLocal:
     GV->setThreadLocalMode(GlobalVariable::NotThreadLocal);
     break;
   case LLVMGeneralDynamicTLSModel:
     GV->setThreadLocalMode(GlobalVariable::GeneralDynamicTLSModel);
     break;
   case LLVMLocalDynamicTLSModel:
     GV->setThreadLocalMode(GlobalVariable::LocalDynamicTLSModel);
     break;
   case LLVMInitialExecTLSModel:
     GV->setThreadLocalMode(GlobalVariable::InitialExecTLSModel);
     break;
   case LLVMLocalExecTLSModel:
     GV->setThreadLocalMode(GlobalVariable::LocalExecTLSModel);
     break;
+  case LLVMEmulatedTLSModel:
+    GV->setThreadLocalMode(GlobalVariable::EmulatedTLSModel);
+    break;
   }
 }
 
 LLVMBool LLVMIsExternallyInitialized(LLVMValueRef GlobalVar) {
   return unwrap<GlobalVariable>(GlobalVar)->isExternallyInitialized();
 }
 
 void LLVMSetExternallyInitialized(LLVMValueRef GlobalVar, LLVMBool IsExtInit) {

lib/Target/AArch64/AArch64ISelLowering.cpp

AArch64TargetLowering::LowerELFGlobalTLSAddress(SDValue Op,
   // Different choices can be made for the maximum size of the TLS area for a
   // module. For the small address model, the default TLS size is 16MiB and the
   // maximum TLS size is 4GiB.
   // FIXME: add -mtls-size command line option and make it control the 16MiB
   // vs. 4GiB code sequence generation.
   const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(Op);
 
   TLSModel::Model Model = getTargetMachine().getTLSModel(GA->getGlobal());
+
+  if (Model == TLSModel::Emulated)
+      return LowerToTLSEmulatedModel(GA, DAG);
+
   if (!EnableAArch64ELFLocalDynamicTLSGeneration) {
     if (Model == TLSModel::LocalDynamic)
       Model = TLSModel::GeneralDynamic;
   }
 
   SDValue TPOff;
   EVT PtrVT = getPointerTy();
   SDLoc DL(Op);

lib/Target/AArch64/AArch64MCInstLower.cpp

case TLSModel::LocalExec:
       RefFlags |= AArch64MCExpr::VK_TPREL;
       break;
     case TLSModel::LocalDynamic:
       RefFlags |= AArch64MCExpr::VK_DTPREL;
       break;
     case TLSModel::GeneralDynamic:
       RefFlags |= AArch64MCExpr::VK_TLSDESC;
       break;
+    case TLSModel::Emulated:
+      assert(false && "Unexpect TLSModel::Emulated");
+      break;
     }
   } else {
     // No modifier means this is a generic reference, classified as absolute for
     // the cases where it matters (:abs_g0: etc).
     RefFlags |= AArch64MCExpr::VK_ABS;
   }
 
   if ((MO.getTargetFlags() & AArch64II::MO_FRAGMENT) == AArch64II::MO_PAGE)

lib/Target/ARM/ARMISelLowering.cpp

ARMTargetLowering::LowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const {
 
   switch (model) {
     case TLSModel::GeneralDynamic:
     case TLSModel::LocalDynamic:
       return LowerToTLSGeneralDynamicModel(GA, DAG);
     case TLSModel::InitialExec:
     case TLSModel::LocalExec:
       return LowerToTLSExecModels(GA, DAG, model);
+    case TLSModel::Emulated:
+      return LowerToTLSEmulatedModel(GA, DAG);
   }
   llvm_unreachable("bogus TLS model");
 }
 
 SDValue ARMTargetLowering::LowerGlobalAddressELF(SDValue Op,
                                                  SelectionDAG &DAG) const {
   EVT PtrVT = getPointerTy();
   SDLoc dl(Op);

lib/Target/CppBackend/CPPBackend.cpp

case GlobalVariable::LocalDynamicTLSModel:
       Out << "GlobalVariable::LocalDynamicTLSModel";
       break;
     case GlobalVariable::InitialExecTLSModel:
       Out << "GlobalVariable::InitialExecTLSModel";
       break;
     case GlobalVariable::LocalExecTLSModel:
       Out << "GlobalVariable::LocalExecTLSModel";
       break;
+    case GlobalVariable::EmulatedTLSModel:
+      Out << "GlobalVariable::EmulatedTLSModel";
+      break;
   }
 }
 
 // printEscapedString - Print each character of the specified string, escaping
 // it if it is not printable or if it is an escape char.
 void CppWriter::printEscapedString(const std::string &Str) {
   for (unsigned i = 0, e = Str.size(); i != e; ++i) {
     unsigned char C = Str[i];

lib/Target/Mips/MipsISelLowering.cpp

lowerGlobalTLSAddress(SDValue Op, SelectionDAG &DAG) const
 
   GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(Op);
   SDLoc DL(GA);
   const GlobalValue *GV = GA->getGlobal();
   EVT PtrVT = getPointerTy();
 
   TLSModel::Model model = getTargetMachine().getTLSModel(GV);
 
+  if (model == TLSModel::Emulated) {
+    return LowerToTLSEmulatedModel(GA, DAG);
+  }
+
   if (model == TLSModel::GeneralDynamic || model == TLSModel::LocalDynamic) {
     // General Dynamic and Local Dynamic TLS Model.
     unsigned Flag = (model == TLSModel::LocalDynamic) ? MipsII::MO_TLSLDM
                                                       : MipsII::MO_TLSGD;
 
     SDValue TGA = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, Flag);
     SDValue Argument = DAG.getNode(MipsISD::Wrapper, DL, PtrVT,
                                    getGlobalReg(DAG, PtrVT), TGA);

lib/Target/PowerPC/PPCCTRLoops.cpp

static bool memAddrUsesCTR(const PPCTargetMachine *TM,
   const auto *GV = dyn_cast<GlobalValue>(MemAddr);
   if (!GV)
     return false;
   if (!GV->isThreadLocal())
     return false;
   if (!TM)
     return true;
   TLSModel::Model Model = TM->getTLSModel(GV);
-  return Model == TLSModel::GeneralDynamic || Model == TLSModel::LocalDynamic;
+  return Model == TLSModel::GeneralDynamic ||
+      Model == TLSModel::LocalDynamic || Model == TLSModel::Emulated;
 }
 
 bool PPCCTRLoops::mightUseCTR(const Triple &TT, BasicBlock *BB) {
   for (BasicBlock::iterator J = BB->begin(), JE = BB->end();
        J != JE; ++J) {
     if (CallInst *CI = dyn_cast<CallInst>(J)) {
       if (InlineAsm *IA = dyn_cast<InlineAsm>(CI->getCalledValue())) {
         // Inline ASM is okay, unless it clobbers the ctr register.

lib/Target/PowerPC/PPCISelLowering.cpp

SDValue PPCTargetLowering::LowerGlobalTLSAddress(SDValue Op,
   const GlobalValue *GV = GA->getGlobal();
   EVT PtrVT = getPointerTy();
   bool is64bit = Subtarget.isPPC64();
   const Module *M = DAG.getMachineFunction().getFunction()->getParent();
   PICLevel::Level picLevel = M->getPICLevel();
 
   TLSModel::Model Model = getTargetMachine().getTLSModel(GV);
 
+  if (Model == TLSModel::Emulated) {
+    return LowerToTLSEmulatedModel(GA, DAG);
+  }
+
   if (Model == TLSModel::LocalExec) {
     SDValue TGAHi = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
                                                PPCII::MO_TPREL_HA);
     SDValue TGALo = DAG.getTargetGlobalAddress(GV, dl, PtrVT, 0,
                                                PPCII::MO_TPREL_LO);
     SDValue TLSReg = DAG.getRegister(is64bit ? PPC::X13 : PPC::R2,
                                      is64bit ? MVT::i64 : MVT::i32);
     SDValue Hi = DAG.getNode(PPCISD::Hi, dl, PtrVT, TGAHi, TLSReg);

lib/Target/Sparc/SparcISelLowering.cpp

SDValue SparcTargetLowering::LowerGlobalTLSAddress(SDValue Op,
 
   GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(Op);
   SDLoc DL(GA);
   const GlobalValue *GV = GA->getGlobal();
   EVT PtrVT = getPointerTy();
 
   TLSModel::Model model = getTargetMachine().getTLSModel(GV);
 
+  if (model == TLSModel::Emulated) {
+    return LowerToTLSEmulatedModel(GA, DAG);
+  }
+
   if (model == TLSModel::GeneralDynamic || model == TLSModel::LocalDynamic) {
     unsigned HiTF = ((model == TLSModel::GeneralDynamic)
                      ? SparcMCExpr::VK_Sparc_TLS_GD_HI22
                      : SparcMCExpr::VK_Sparc_TLS_LDM_HI22);
     unsigned LoTF = ((model == TLSModel::GeneralDynamic)
                      ? SparcMCExpr::VK_Sparc_TLS_GD_LO10
                      : SparcMCExpr::VK_Sparc_TLS_LDM_LO10);
     unsigned addTF = ((model == TLSModel::GeneralDynamic)

lib/Target/SystemZ/SystemZISelLowering.cpp

case TLSModel::LocalExec: {
         SystemZConstantPoolValue::Create(GV, SystemZCP::NTPOFF);
 
       Offset = DAG.getConstantPool(CPV, PtrVT, 8);
       Offset = DAG.getLoad(PtrVT, DL, DAG.getEntryNode(),
                            Offset, MachinePointerInfo::getConstantPool(),
                            false, false, false, 0);
       break;
     }
+
+    case TLSModel::Emulated: {
+      return LowerToTLSEmulatedModel(Node, DAG);
+    }
   }
 
   // Add the base and offset together.
   return DAG.getNode(ISD::ADD, DL, PtrVT, TP, Offset);
 }
 
 SDValue SystemZTargetLowering::lowerBlockAddress(BlockAddressSDNode *Node,
                                                  SelectionDAG &DAG) const {

lib/Target/TargetMachine.cpp

static TLSModel::Model getSelectedTLSModel(const GlobalValue *GV) {
   case GlobalVariable::GeneralDynamicTLSModel:
     return TLSModel::GeneralDynamic;
   case GlobalVariable::LocalDynamicTLSModel:
     return TLSModel::LocalDynamic;
   case GlobalVariable::InitialExecTLSModel:
     return TLSModel::InitialExec;
   case GlobalVariable::LocalExecTLSModel:
     return TLSModel::LocalExec;
+  case GlobalVariable::EmulatedTLSModel:
+    return TLSModel::Emulated;
   }
   llvm_unreachable("invalid TLS model");
 }
 
 TLSModel::Model TargetMachine::getTLSModel(const GlobalValue *GV) const {
   bool isLocal = GV->hasLocalLinkage();
   bool isDeclaration = GV->isDeclaration();
   bool isPIC = getRelocationModel() == Reloc::PIC_;
if (isPIC && !isPIE) {
     if (!isDeclaration || isHidden)
       Model = TLSModel::LocalExec;
     else
       Model = TLSModel::InitialExec;
   }
 
   // If the user specified a more specific model, use that.
   TLSModel::Model SelectedModel = getSelectedTLSModel(GV);
-  if (SelectedModel > Model)
+  // If selected TLSModel::Emulated should be used since
+  // the target does not support other models.
+  if (SelectedModel > Model || SelectedModel == TLSModel::Emulated)
     return SelectedModel;
 
   return Model;
 }
 
 /// getOptLevel - Returns the optimization level: None, Less,
 /// Default, or Aggressive.
 CodeGenOpt::Level TargetMachine::getOptLevel() const {

lib/Target/X86/X86ISelLowering.cpp

switch (model) {
       case TLSModel::LocalDynamic:
         return LowerToTLSLocalDynamicModel(GA, DAG, getPointerTy(),
                                            Subtarget->is64Bit());
       case TLSModel::InitialExec:
       case TLSModel::LocalExec:
         return LowerToTLSExecModel(
             GA, DAG, getPointerTy(), model, Subtarget->is64Bit(),
             DAG.getTarget().getRelocationModel() == Reloc::PIC_);
+      case TLSModel::Emulated:
+        return LowerToTLSEmulatedModel(GA, DAG);
     }
     llvm_unreachable("Unknown TLS model.");
   }
 
   if (Subtarget->isTargetDarwin()) {
     // Darwin only has one model of TLS.  Lower to that.
     unsigned char OpFlag = 0;
     unsigned WrapperKind = Subtarget->isPICStyleRIPRel() ?

test/Assembler/tls-models.ll

 ; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s
 ; RUN: verify-uselistorder %s
 
 ; CHECK: @a = thread_local global i32 0
 ; CHECK: @b = thread_local(localdynamic) global i32 0
 ; CHECK: @c = thread_local(initialexec) global i32 0
 ; CHECK: @d = thread_local(localexec) global i32 0
+; CHECK: @e = thread_local(emulated) global i32 0
 
 @a = thread_local global i32 0
 @b = thread_local(localdynamic) global i32 0
 @c = thread_local(initialexec) global i32 0
 @d = thread_local(localexec) global i32 0
+@e = thread_local(emulated) global i32 0

test/CodeGen/AArch64/arm64-tls-dynamic-together.ll

 define i32 @test_generaldynamic() {
 ; CHECK-LABEL: test_generaldynamic:
 
   %val = load i32, i32* @general_dynamic_var
   ret i32 %val
 
 ; CHECK: .tlsdesccall general_dynamic_var
 ; CHECK-NEXT: blr {{x[0-9]+}}
+; CHECK-NOT: __emutls_v.general_dynamic_var:
+}
+
+@emulated_var = external thread_local(emulated) global i32
+
+define i32 @test_emulated() {
+; CHECK-LABEL: test_emulated:
+
+  %val = load i32, i32* @emulated_var
+  ret i32 %val
+
+; CHECK: adrp{{.+}}__emutls_v.emulated_var
+; CHECK: bl __emutls_get_address
+
+; CHECK-NOT: __emutls_v.general_dynamic_var:
+; CHECK-NOT: __emutls_v.emulated_var
+; CHECK-NOT: __emutls_t.emulated_var
+}
+
+@emulated_init_var = thread_local(emulated) global i32 37, align 8
+
+define i32 @test_emulated_init() {
+; CHECK-LABEL: test_emulated_init:
+
+  %val = load i32, i32* @emulated_init_var
+  ret i32 %val
+
+; CHECK: adrp{{.+}}__emutls_v.emulated_init_var
+; CHECK: bl __emutls_get_address
+
+; CHECK-NOT: __emutls_v.general_dynamic_var:
+
+; CHECK:      .align 3
+; CHECK-LABEL: __emutls_v.emulated_init_var:
+; CHECK-NEXT: .xword 4
+; CHECK-NEXT: .xword 8
+; CHECK-NEXT: .xword 0
+; CHECK-NEXT: .xword __emutls_t.emulated_init_var
+
+; CHECK-LABEL: __emutls_t.emulated_init_var:
+; CHECK-NEXT: .word 37
+
+; CHECK-NOT: __emutls_v.general_dynamic_var:
 }

test/CodeGen/AArch64/emutls.ll

+; RUN: llc -mtriple=arm-linux-android -relocation-model=pic < %s | FileCheck -check-prefix=ARM32 %s
+; RUN: llc -mtriple=aarch64-linux-android -relocation-model=pic < %s | FileCheck -check-prefix=ARM64 %s
+
+; Copied from X86/emutls.ll
+
+; Use my_emutls_get_address like __emutls_get_address.
+@my_emutls_v_xyz = external global i8*, align 4
+declare i8* @my_emutls_get_address(i8*)
+
+define i32 @my_get_xyz() {
+; ARM32-LABEL: my_get_xyz:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl my_emutls_get_address(PLT)
+; ARM32-NEXT:   ldr r0, [r0]
+; ARM64-LABEL: my_get_xyz:
+; ARM64:        adrp x0, :got:my_emutls_v_xyz
+; ARM64-NEXT:   ldr x0, [x0, :got_lo12:my_emutls_v_xyz]
+; ARM64-NEXT:   bl my_emutls_get_address
+; ARM64-NEXT:   ldr  w0, [x0]
+; ARM64-NEXT:   ldp x29, x30, [sp]
+
+entry:
+  %call = call i8* @my_emutls_get_address(i8* bitcast (i8** @my_emutls_v_xyz to i8*))
+  %0 = bitcast i8* %call to i32*
+  %1 = load i32, i32* %0, align 4
+  ret i32 %1
+}
+
+@i1 = thread_local(emulated) global i32 15
+@i2 = external thread_local(emulated) global i32
+@i3 = internal thread_local(emulated) global i32 15
+@i4 = hidden thread_local(emulated) global i32 15
+@i5 = external hidden thread_local(emulated) global i32
+@s1 = thread_local(emulated) global i16 15
+@b1 = thread_local(emulated) global i8 0
+
+define i32 @f1() {
+; ARM32-LABEL: f1:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldr r0, [r0]
+; ARM64-LABEL: f1:
+; ARM64:        adrp x0, :got:__emutls_v.i1
+; ARM64-NEXT:   ldr x0, [x0, :got_lo12:__emutls_v.i1]
+; ARM64-NEXT:   bl __emutls_get_address
+; ARM64-NEXT:   ldr  w0, [x0]
+; ARM64-NEXT:   ldp x29, x30, [sp]
+
+entry:
+  %tmp1 = load i32, i32* @i1
+  ret i32 %tmp1
+}
+
+define i32* @f2() {
+; ARM32-LABEL: f2:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   pop
+; ARM64-LABEL: f2:
+; ARM64:        adrp x0, :got:__emutls_v.i1
+; ARM64-NEXT:   ldr x0, [x0, :got_lo12:__emutls_v.i1]
+; ARM64-NEXT:   bl __emutls_get_address
+; ARM64-NEXT:   ldp x29, x30, [sp]
+
+entry:
+  ret i32* @i1
+}
+
+define i32 @f3() nounwind {
+; ARM32-LABEL: f3:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldr r0, [r0]
+
+entry:
+  %tmp1 = load i32, i32* @i2
+  ret i32 %tmp1
+}
+
+define i32* @f4() {
+; ARM32-LABEL: f4:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   pop
+
+entry:
+  ret i32* @i2
+}
+
+define i32 @f5() nounwind {
+; ARM32-LABEL: f5:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldr r0, [r0]
+
+entry:
+  %tmp1 = load i32, i32* @i3
+  ret i32 %tmp1
+}
+
+define i32* @f6() {
+; ARM32-LABEL: f6:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   pop
+
+entry:
+  ret i32* @i3
+}
+
+define i32 @f7() {
+; ARM32-LABEL: f7:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldr r0, [r0]
+
+entry:
+  %tmp1 = load i32, i32* @i4
+  ret i32 %tmp1
+}
+
+define i32* @f8() {
+; ARM32-LABEL: f8:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   pop
+
+entry:
+  ret i32* @i4
+}
+
+define i32 @f9() {
+; ARM32-LABEL: f9:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldr r0, [r0]
+
+entry:
+  %tmp1 = load i32, i32* @i5
+  ret i32 %tmp1
+}
+
+define i32* @f10() {
+; ARM32-LABEL: f10:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   pop
+
+entry:
+  ret i32* @i5
+}
+
+define i16 @f11() {
+; ARM32-LABEL: f11:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldrh r0, [r0]
+
+entry:
+  %tmp1 = load i16, i16* @s1
+  ret i16 %tmp1
+}
+
+define i32 @f12() {
+; ARM32-LABEL: f12:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldrsh r0, [r0]
+
+entry:
+  %tmp1 = load i16, i16* @s1
+  %tmp2 = sext i16 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+define i8 @f13() {
+; ARM32-LABEL: f13:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldrb r0, [r0]
+; ARM32-NEXT: pop
+
+entry:
+  %tmp1 = load i8, i8* @b1
+  ret i8 %tmp1
+}
+
+define i32 @f14() {
+; ARM32-LABEL: f14:
+; ARM32:        ldr r0,
+; ARM32-NEXT:   ldr r1,
+; ARM32:        add r0, pc, r0
+; ARM32-NEXT:   ldr r0, [r1, r0]
+; ARM32-NEXT:   bl __emutls_get_address(PLT)
+; ARM32-NEXT:   ldrsb r0, [r0]
+; ARM32-NEXT: pop
+
+entry:
+  %tmp1 = load i8, i8* @b1
+  %tmp2 = sext i8 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+;;;;;;;;;;;;;; 32-bit __emutls_v. and __emutls_t.
+
+; ARM32       .section .data.rel.local,
+; ARM32-LABEL: __emutls_v.i1:
+; ARM32-NEXT: .long 4
+; ARM32-NEXT: .long 4
+; ARM32-NEXT: .long 0
+; ARM32-NEXT: .long __emutls_t.i1
+
+; ARM32       .section .rodata,
+; ARM32-LABEL: __emutls_t.i1:
+; ARM32-NEXT: .long 15
+
+; ARM32-NOT:   __emutls_v.i2
+
+; ARM32       .section .data.rel.local,
+; ARM32-LABEL: __emutls_v.i3:
+; ARM32-NEXT: .long 4
+; ARM32-NEXT: .long 4
+; ARM32-NEXT: .long 0
+; ARM32-NEXT: .long __emutls_t.i3
+
+; ARM32       .section .rodata,
+; ARM32-LABEL: __emutls_t.i3:
+; ARM32-NEXT: .long 15
+
+; ARM32       .section .data.rel.local,
+; ARM32-LABEL: __emutls_v.i4:
+; ARM32-NEXT: .long 4
+; ARM32-NEXT: .long 4
+; ARM32-NEXT: .long 0
+; ARM32-NEXT: .long __emutls_t.i4
+
+; ARM32       .section .rodata,
+; ARM32-LABEL: __emutls_t.i4:
+; ARM32-NEXT: .long 15
+
+; ARM32-NOT:   __emutls_v.i5:
+; ARM32       .hidden __emutls_v.i5
+; ARM32-NOT:   __emutls_v.i5:
+
+; ARM32 .section .data.rel.local,
+; ARM32-LABEL: __emutls_v.s1:
+; ARM32-NEXT: .long 2
+; ARM32-NEXT: .long 2
+; ARM32-NEXT: .long 0
+; ARM32-NEXT: .long __emutls_t.s1
+
+; ARM32 .section .rodata,
+; ARM32-LABEL: __emutls_t.s1:
+; ARM32-NEXT: .short 15
+
+; ARM32 .section .data.rel.local,
+; ARM32-LABEL: __emutls_v.b1:
+; ARM32-NEXT: .long 1
+; ARM32-NEXT: .long 1
+; ARM32-NEXT: .long 0
+; ARM32-NEXT: .long 0
+
+; ARM32-NOT:   __emutls_t.b1
+
+;;;;;;;;;;;;;; 64-bit __emutls_v. and __emutls_t.
+
+; ARM64       .section .data.rel.local,
+; ARM64-LABEL: __emutls_v.i1:
+; ARM64-NEXT: .xword 4
+; ARM64-NEXT: .xword 4
+; ARM64-NEXT: .xword 0
+; ARM64-NEXT: .xword __emutls_t.i1
+
+; ARM64       .section .rodata,
+; ARM64-LABEL: __emutls_t.i1:
+; ARM64-NEXT: .word 15
+
+; ARM64-NOT:   __emutls_v.i2
+
+; ARM64       .section .data.rel.local,
+; ARM64-LABEL: __emutls_v.i3:
+; ARM64-NEXT: .xword 4
+; ARM64-NEXT: .xword 4
+; ARM64-NEXT: .xword 0
+; ARM64-NEXT: .xword __emutls_t.i3
+
+; ARM64       .section .rodata,
+; ARM64-LABEL: __emutls_t.i3:
+; ARM64-NEXT: .word 15
+
+; ARM64       .section .data.rel.local,
+; ARM64-LABEL: __emutls_v.i4:
+; ARM64-NEXT: .xword 4
+; ARM64-NEXT: .xword 4
+; ARM64-NEXT: .xword 0
+; ARM64-NEXT: .xword __emutls_t.i4
+
+; ARM64       .section .rodata,
+; ARM64-LABEL: __emutls_t.i4:
+; ARM64-NEXT: .word 15
+
+; ARM64-NOT:   __emutls_v.i5:
+; ARM64       .hidden __emutls_v.i5
+; ARM64-NOT:   __emutls_v.i5:
+
+; ARM64       .section .data.rel.local,
+; ARM64-LABEL: __emutls_v.s1:
+; ARM64-NEXT: .xword 2
+; ARM64-NEXT: .xword 2
+; ARM64-NEXT: .xword 0
+; ARM64-NEXT: .xword __emutls_t.s1
+
+; ARM64       .section .rodata,
+; ARM64-LABEL: __emutls_t.s1:
+; ARM64-NEXT: .hword 15
+
+; ARM64       .section .data.rel.local,
+; ARM64-LABEL: __emutls_v.b1:
+; ARM64-NEXT: .xword 1
+; ARM64-NEXT: .xword 1
+; ARM64-NEXT: .xword 0
+; ARM64-NEXT: .xword 0
+
+; ARM64-NOT:  __emutls_t.b1

test/CodeGen/ARM/emutls1.ll

+; RUN: llc < %s -march=arm -mtriple=arm-linux-androideabi | FileCheck %s
+; RUN: llc < %s -march=arm -mtriple=arm-linux-androideabi -relocation-model=pic | \
+; RUN:   FileCheck %s --check-prefix=PIC
+
+; Compared with tls1.ll, emulated mode should not use __aeabi_read_tp or __tls_get_addr.
+
+; CHECK-NOT: _aeabi_read_tp
+; CHECK-NOT: _tls_get_addr
+; CHECK:     __emutls_get_addr
+; CHECK-NOT: __aeabi_read_tp
+; CHECK-NOT: _tls_get_addr
+
+; PIC-NOT: _aeabi_read_tp
+; PIC-NOT: _tls_get_addr
+; PIC:     __emutls_get_addr
+; PIC-NOT: _aeabi_read_tp
+; PIC-NOT: _tls_get_addr
+
+@i = thread_local(emulated) global i32 15 ; <i32*> [#uses=2]
+
+define i32 @f() {
+entry:
+ %tmp1 = load i32, i32* @i ; <i32> [#uses=1]
+ ret i32 %tmp1
+}
+
+define i32* @g() {
+entry:
+ ret i32* @i
+}

test/CodeGen/ARM/tls-models.ll

 ; RUN: llc -march=arm -mtriple=arm-linux-gnueabi < %s | FileCheck -check-prefix=CHECK-NONPIC %s
 ; RUN: llc -march=arm -mtriple=arm-linux-gnueabi -relocation-model=pic < %s | FileCheck -check-prefix=CHECK-PIC %s
 
 
 @external_gd = external thread_local global i32
 @internal_gd = internal thread_local global i32 42
 
 @external_ld = external thread_local(localdynamic) global i32
 @internal_ld = internal thread_local(localdynamic) global i32 42
 
 @external_ie = external thread_local(initialexec) global i32
 @internal_ie = internal thread_local(initialexec) global i32 42
 
 @external_le = external thread_local(localexec) global i32
 @internal_le = internal thread_local(localexec) global i32 42
 
+@external_em = external thread_local(emulated) global i32
+@internal_em = internal thread_local(emulated) global i8 42
+
 ; ----- no model specified -----
 
 define i32* @f1() {
 entry:
   ret i32* @external_gd
 
   ; Non-PIC code can use initial-exec, PIC code has to use general dynamic.
   ; CHECK-NONPIC-LABEL:   f1:
entry:
   ret i32* @internal_le
 
   ; Non-PIC and PIC code will use local exec as specified.
   ; CHECK-NONPIC-LABEL:   f8:
   ; CHECK-NONPIC:   internal_le(TPOFF)
   ; CHECK-PIC-LABEL:      f8:
   ; CHECK-PIC:      internal_le(TPOFF)
 }
+
+
+; ----- emulated specified -----
+
+define i32* @f9() {
+entry:
+  ret i32* @external_em
+
+  ; Non-PIC and PIC code will use emulated TLS as specified.
+  ; CHECK-NONPIC-LABEL:   f9:
+  ; CHECK-NONPIC:     __emutls_get_address
+  ; CHECK-NONPIC:     .long __emutls_v.external_em
+  ; CHECK-NONPIC:     .size f9,
+  ; CHECK-PIC-LABEL:      f9:
+  ; CHECK-PIC:        __emutls_get_address
+  ; CHECK-PIC:        .long __emutls_v.external_em
+  ; CHECK-PIC:        .size f9,
+}
+
+define i8* @f10() {
+entry:
+  ret i8* @internal_em
+
+  ; Non-PIC and PIC code will use emulated TLS as specified.
+  ; CHECK-NONPIC-LABEL:   f10:
+  ; CHECK-NONPIC:      __emutls_get_address
+  ; CHECK-NONPIC:      .long __emutls_v.internal_em
+  ; CHECK-NONPIC:      .size f10,
+  ; CHECK-PIC-LABEL:      f10:
+  ; CHECK-PIC:         __emutls_get_address
+  ; CHECK-PIC:         .long __emutls_v.internal_em
+  ; CHECK-PIC:         .size f10,
+}
+
+; External declaration has no initializer.
+; Internal definition has initializer.
+
+; CHECK-NONPIC-NOT:   __emutls_t.external_em
+; CHECK-NONPIC-NOT:   __emutls_v.external_em
+; CHECK-NONPIC:       .align 2
+; CHECK-NONPIC:       __emutls_v.internal_em:
+; CHECK-NONPIC-NEXT:  .long 1
+; CHECK-NONPIC-NEXT:  .long 1
+; CHECK-NONPIC-NEXT:  .long 0
+; CHECK-NONPIC-NEXT:  .long __emutls_t.internal_em
+; CHECK-NONPIC:       __emutls_t.internal_em:
+; CHECK-NONPIC-NEXT:  .byte 42
+; CHECK-NONPIC-NOT:   __emutls_t.external_em
+
+; __emutls_t and __emutls_v are the same for PIC and non-PIC modes.
+
+; CHECK-PIC-NOT:   __emutls_t.external_em
+; CHECK-PIC-NOT:   __emutls_v.external_em
+; CHECK-PIC:       .align 2
+; CHECK-PIC:       __emutls_v.internal_em:
+; CHECK-PIC-NEXT:  .long 1
+; CHECK-PIC-NEXT:  .long 1
+; CHECK-PIC-NEXT:  .long 0
+; CHECK-PIC-NEXT:  .long __emutls_t.internal_em
+; CHECK-PIC:       __emutls_t.internal_em:
+; CHECK-PIC-NEXT:  .byte 42
+; CHECK-PIC-NOT:   __emutls_t.external_em

test/CodeGen/ARM/tls3.ll

 ; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | \
 ; RUN:     grep "tbss"
+; RUN: llc < %s -march=arm -mtriple=arm-linux-gnueabi | FileCheck %s
 
 %struct.anon = type { i32, i32 }
-@teste = internal thread_local global %struct.anon zeroinitializer    ; <%struct.anon*> [#uses=1]
+@teste = internal thread_local global %struct.anon zeroinitializer ; <%struct.anon*> [#uses=1]
 
 define i32 @main() {
 entry:
-  %tmp2 = load i32, i32* getelementptr (%struct.anon, %struct.anon* @teste, i32 0, i32 0), align 8    ; <i32> [#uses=1]
-  ret i32 %tmp2
+  %tmp2 = load i32, i32* getelementptr (%struct.anon, %struct.anon* @teste, i32 0, i32 0), align 8 ; <i32> [#uses=1]
+  ret i32 %tmp2
 }
+
+@testx = internal thread_local(emulated) global %struct.anon zeroinitializer ; <%struct.anon*> [#uses=1]
+
+define i32 @foo() {
+entry:
+  %tmp2 = load i32, i32* getelementptr (%struct.anon, %struct.anon* @testx, i32 0, i32 0), align 8 ; <i32> [#uses=1]
+  ret i32 %tmp2
+}
+
+; CHECK-LABEL: main:
+; CHECK-NOT:   __emutls_get_address
+; CHECK-LABEL: foo:
+; CHECK:       __emutls_get_address
+
+; CHECK-NOT: testx:
+
+; CHECK:       .section .tbss
+; CHECK-LABEL: teste:
+; CHECK-NEXT:  .zero 8
+
+; CHECK-NOT: testx:
+; CHECK-NOT: __emutls_t.testx
+
+; CHECK:       .align 2
+; CHECK-LABEL: __emutls_v.testx:
+; CHECK-NEXT:  .long 8
+; CHECK-NEXT:  .long 4
+; CHECK-NEXT:  .long 0
+; CHECK-NEXT:  .long 0
+
+; CHECK-NOT: testx:
+; CHECK-NOT: __emutls_t.testx

test/CodeGen/Generic/emutls.ll

+; RUN: llc < %s -mtriple=arm-linux-android -relocation-model=pic | FileCheck -check-prefix=ARM_32 %s
+; RUN: llc < %s -mtriple=arm-linux-androidabi -relocation-model=pic | FileCheck -check-prefix=ARM_32 %s
+; RUN: llc < %s -mtriple=aarch64-linux-android -relocation-model=pic | FileCheck -check-prefix=ARM_64 %s
+; RUN: llc < %s -mtriple=arm-linux-androidabi -relocation-model=pic -O3 | FileCheck -check-prefix=ARM_32 %s
+; RUN: llc < %s -mtriple=aarch64-linux-android -relocation-model=pic -O3 | FileCheck -check-prefix=ARM_64 %s
+; RUN: llc < %s -mtriple=arm-linux-androidabi -O3 | FileCheck -check-prefix=ARM_32 %s
+; RUN: llc < %s -mtriple=aarch64-linux-android -O3 | FileCheck -check-prefix=ARM_64 %s
+; RUN: llc < %s -mtriple=i686-linux-android -relocation-model=pic | FileCheck -check-prefix=X86_32 %s
+; RUN: llc < %s -mtriple=x86_64-linux-android -march=x86 -relocation-model=pic | FileCheck -check-prefix=X86_32 %s
+; RUN: llc < %s -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X86_64 %s
+; RUN: llc < %s -mtriple=mipsel-linux-android -relocation-model=pic | FileCheck -check-prefix=MIPS_32 %s
+; RUN: llc < %s -mtriple=mips64el-linux-android -relocation-model=pic | FileCheck -check-prefix=MIPS_64 %s
+; RUN: llc < %s -march=ppc64 -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -march=ppc32 -relocation-model=pic | FileCheck %s
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck %s
+
+; Make sure that TLS symbols are emitted in expected order.
+
+@external_x = external thread_local(emulated) global i32, align 8
+@external_y = thread_local(emulated) global i8 7, align 2
+@internal_y = internal thread_local(emulated) global i64 9, align 16
+
+define i32* @get_external_x() {
+entry:
+  ret i32* @external_x
+}
+
+define i8* @get_external_y() {
+entry:
+  ret i8* @external_y
+}
+
+define i64* @get_internal_y() {
+entry:
+  ret i64* @internal_y
+}
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; targets independent mode
+; CHECK-LABEL: get_external_x:
+; CHECK-NOT:   _tls_get_address
+; CHECK:       __emutls_get_address
+; CHECK-LABEL: get_external_y:
+; CHECK:       __emutls_get_address
+; CHECK-NOT:   _tls_get_address
+; CHECK-LABEL: get_internal_y:
+
+; CHECK-NOT:   __emutls_t.external_x:
+; CHECK-NOT:   __emutls_v.external_x:
+
+; CHECK-LABEL: __emutls_v.external_y:
+; CHECK-LABEL: __emutls_t.external_y:
+; CHECK:       __emutls_t.external_y
+
+; CHECK-LABEL: __emutls_v.internal_y:
+; CHECK-LABEL: __emutls_t.internal_y:
+; CHECK:       __emutls_t.internal_y
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 32-bit mode
+; ARM_32-LABEL:  get_external_x:
+; X86_32-LABEL:  get_external_x:
+; MIPS-LABEL:    get_external_x:
+
+; ARM_32:        bl __emutls_get_address
+; ARM_32:        .long __emutls_v.external_x
+
+; X86_32:        movl __emutls_v.external_x
+; X86_32:        calll __emutls_get_address
+
+; ARM_32-LABEL:  get_external_y:
+; X86_32-LABEL:  get_external_y:
+; MIPS_32-LABEL: get_external_y:
+
+; ARM_32:        bl __emutls_get_address
+; ARM_32:        .long __emutls_v.external_y
+
+; X86_32:        movl __emutls_v.external_y
+; X86_32:        calll __emutls_get_address
+
+; ARM_32-LABEL:  get_internal_y:
+; X86_32-LABEL:  get_internal_y:
+; MIPS_32-LABEL: get_internal_y:
+
+; ARM_32:      bl __emutls_get_address
+; ARM_32:      .long __emutls_v.internal_y
+
+; X86_32:      movl __emutls_v.internal_y
+; X86_32:      calll __emutls_get_address
+
+; MIPS_32:     lw {{.+}}(__emutls_v.internal_y
+; MIPS_32:     lw {{.+}}call16(__emutls_get_address
+
+; ARM_32-NOT:   __emutls_t.external_x
+; X86_32-NOT:   __emutls_t.external_x
+; MIPS_32-NOT:  __emutls_t.external_x
+
+; ARM_32-NOT:   __emutls_v.external_x:
+; X86_32-NOT:   __emutls_v.external_x:
+; MIPS_32-NOT:  __emutls_v.external_x:
+
+; ARM_32:        .section .data.rel.local
+; X86_32:        .section .data.rel.local
+; MIPS_32:       .section .data.rel.local
+
+; ARM_32:        .align 2
+; X86_32:        .align 4
+; MIPS_32:       .align 2
+
+; ARM_32-LABEL:  __emutls_v.external_y:
+; X86_32-LABEL:  __emutls_v.external_y:
+; MIPS_32-LABEL: __emutls_v.external_y:
+
+; ARM_32-NEXT:   .long 1
+; ARM_32-NEXT:   .long 2
+; ARM_32-NEXT:   .long 0
+; ARM_32-NEXT:   .long __emutls_t.external_y
+
+; X86_32-NEXT:   .long 1
+; X86_32-NEXT:   .long 2
+; X86_32-NEXT:   .long 0
+; X86_32-NEXT:   .long __emutls_t.external_y
+
+; ARM_32:        .section .rodata,
+; X86_32:        .section .rodata,
+; MIPS_32:       .section .rodata,
+
+; ARM_32-LABEL:  __emutls_t.external_y:
+; X86_32-LABEL:  __emutls_t.external_y:
+; MIPS_32-LABEL: __emutls_t.external_y:
+
+; ARM_32-NEXT:   .byte 7
+; X86_32-NEXT:   .byte 7
+; MIPS_32-NEXT:  .byte 7
+
+; ARM_32:        .section .data.rel.local
+; X86_32:        .section .data.rel.local
+; MIPS_32:       .section .data.rel.local
+
+; ARM_32:        .align 2
+; X86_32:        .align 4
+; MIPS_32:       .align 2
+
+; ARM_32-LABEL:  __emutls_v.internal_y:
+; X86_32-LABEL:  __emutls_v.internal_y:
+; MIPS_32-LABEL: __emutls_v.internal_y:
+
+; ARM_32-NEXT:   .long 8
+; ARM_32-NEXT:   .long 16
+; ARM_32-NEXT:   .long 0
+; ARM_32-NEXT:   .long __emutls_t.internal_y
+
+; X86_32-NEXT:   .long 8
+; X86_32-NEXT:   .long 16
+; X86_32-NEXT:   .long 0
+; X86_32-NEXT:   .long __emutls_t.internal_y
+
+; MIPS_32-NEXT:  .4byte 8
+; MIPS_32-NEXT:  .4byte 16
+; MIPS_32-NEXT:  .4byte 0
+; MIPS_32-NEXT:  .4byte __emutls_t.internal_y
+
+; ARM_32-LABEL:  __emutls_t.internal_y:
+; X86_32-LABEL:  __emutls_t.internal_y:
+; MIPS_32-LABEL: __emutls_t.internal_y:
+
+; ARM_32-NEXT:   .long 9
+; ARM_32-NEXT:   .long 0
+; X86_32-NEXT:   .quad 9
+; MIPS_32-NEXT:  .8byte 9
+
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 64-bit mode
+; X86_64-LABEL:  get_external_x:
+; ARM_64-LABEL:  get_external_x:
+; MIPS_64-LABEL: get_external_x:
+
+; X86_64:      __emutls_v.external_x
+; X86_64:      __emutls_get_address
+
+; ARM_64:      __emutls_v.external_x
+; ARM_64:      __emutls_get_address
+
+; X86_64-LABEL:  get_external_y:
+; ARM_64-LABEL:  get_external_y:
+; MIPS_64-LABEL: get_external_y:
+
+; X86_64:      __emutls_v.external_y
+; X86_64:      __emutls_get_address
+
+; ARM_64:      __emutls_v.external_y
+; ARM_64:      __emutls_get_address
+
+; X86_64-LABEL:  get_internal_y:
+; ARM_64-LABEL:  get_internal_y:
+; MIPS_64-LABEL: get_internal_y:
+
+; X86_64:      __emutls_v.internal_y
+; X86_64:      __emutls_get_address
+
+; ARM_64:      __emutls_v.internal_y
+; ARM_64:      __emutls_get_address
+
+; MIPS_64:     ld {{.+}}(__emutls_v.internal_y
+; MIPS_64:     ld {{.+}}call16(__emutls_get_address
+
+; ARM_64-NOT:   __emutls_t.external_x
+; X86_64-NOT:   __emutls_t.external_x
+; MIPS_64-NOT:  __emutls_t.external_x
+
+; X86_64-NOT:   __emutls_v.external_x:
+; ARM_64-NOT:   __emutls_v.external_x:
+; MIPS_64-NOT:  __emutls_v.external_x:
+
+; X86_64:        .align 8
+; ARM_64:        .align 3
+
+; X86_64-LABEL:  __emutls_v.external_y:
+; ARM_64-LABEL:  __emutls_v.external_y:
+; MIPS_64-LABEL: __emutls_v.external_y:
+
+; X86_64-NEXT:   .quad 1
+; X86_64-NEXT:   .quad 2
+; X86_64-NEXT:   .quad 0
+; X86_64-NEXT:   .quad __emutls_t.external_y
+
+; ARM_64-NEXT:   .xword 1
+; ARM_64-NEXT:   .xword 2
+; ARM_64-NEXT:   .xword 0
+; ARM_64-NEXT:   .xword __emutls_t.external_y
+
+; X86_64-NOT:    __emutls_v.external_x:
+; ARM_64-NOT:    __emutls_v.external_x:
+; MIPS_64-NOT:   __emutls_v.external_x:
+
+; ARM_64:        .section .rodata,
+; X86_64:        .section .rodata,
+; MIPS_64:       .section .rodata,
+
+; X86_64-LABEL:  __emutls_t.external_y:
+; ARM_64-LABEL:  __emutls_t.external_y:
+; MIPS_64-LABEL: __emutls_t.external_y:
+
+; X86_64-NEXT:   .byte 7
+; ARM_64-NEXT:   .byte 7
+; MIPS_64-NEXT:  .byte 7
+
+; ARM_64:        .section .data.rel.local
+; X86_64:        .section .data.rel.local
+; MIPS_64:       .section .data.rel.local
+
+; X86_64:        .align 8
+; ARM_64:        .align 3
+; MIPS_64:       .align 3
+
+; X86_64-LABEL:  __emutls_v.internal_y:
+; ARM_64-LABEL:  __emutls_v.internal_y:
+; MIPS_64-LABEL: __emutls_v.internal_y:
+
+; X86_64-NEXT:   .quad 8
+; X86_64-NEXT:   .quad 16
+; X86_64-NEXT:   .quad 0
+; X86_64-NEXT:   .quad __emutls_t.internal_y
+
+; ARM_64-NEXT:   .xword 8
+; ARM_64-NEXT:   .xword 16
+; ARM_64-NEXT:   .xword 0
+; ARM_64-NEXT:   .xword __emutls_t.internal_y
+
+; MIPS_64-NEXT:  .8byte 8
+; MIPS_64-NEXT:  .8byte 16
+; MIPS_64-NEXT:  .8byte 0
+; MIPS_64-NEXT:  .8byte __emutls_t.internal_y
+
+; ARM_64:        .section .rodata,
+; X86_64:        .section .rodata,
+; MIPS_64:       .section .rodata,
+
+; X86_64-LABEL:  __emutls_t.internal_y:
+; ARM_64-LABEL:  __emutls_t.internal_y:
+; MIPS_64-LABEL: __emutls_t.internal_y:
+
+; X86_64-NEXT:   .quad 9
+; ARM_64-NEXT:   .xword 9
+; MIPS_64-NEXT:  .8byte 9

test/CodeGen/X86/emutls-pic.ll

+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X32 %s
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu -relocation-model=pic | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -march=x86 -mtriple=i386-linux-android -relocation-model=pic | FileCheck -check-prefix=X32 %s
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
+
+; Use my_emutls_get_address like __emutls_get_address.
+@my_emutls_v_xyz = external global i8*, align 4
+declare i8* @my_emutls_get_address(i8*)
+
+define i32 @my_get_xyz() {
+; X32-LABEL: my_get_xyz:
+; X32:      movl my_emutls_v_xyz@GOT(%ebx), %eax
+; X32-NEXT: movl %eax, (%esp)
+; X32-NEXT: calll my_emutls_get_address@PLT
+; X64-LABEL: my_get_xyz:
+; X64:      movq my_emutls_v_xyz@GOTPCREL(%rip), %rdi
+; X64-NEXT: callq my_emutls_get_address@PLT
+; X64-NEXT: movl (%rax), %eax
+
+entry:
+  %call = call i8* @my_emutls_get_address(i8* bitcast (i8** @my_emutls_v_xyz to i8*))
+  %0 = bitcast i8* %call to i32*
+  %1 = load i32, i32* %0, align 4
+  ret i32 %1
+}
+
+@i = thread_local(emulated) global i32 15
+@j = internal thread_local(emulated) global i32 42
+@k = internal thread_local(emulated) global i32 0, align 8
+
+define i32 @f1() {
+entry:
+  %tmp1 = load i32, i32* @i
+  ret i32 %tmp1
+}
+
+; X32-LABEL: f1:
+; X32:      movl __emutls_v.i@GOT(%ebx), %eax
+; X32-NEXT: movl %eax, (%esp)
+; X32-NEXT: calll __emutls_get_address@PLT
+; X64-LABEL: f1:
+; X64:      movq __emutls_v.i@GOTPCREL(%rip), %rdi
+; X64-NEXT: callq __emutls_get_address@PLT
+; X64-NEXT: movl (%rax), %eax
+
+@i2 = external thread_local global i32
+
+define i32* @f2() {
+entry:
+  ret i32* @i
+}
+
+; X32-LABEL: f2:
+; X64-LABEL: f2:
+
+
+define i32 @f3() {
+entry:
+  %tmp1 = load i32, i32* @i  ; <i32> [#uses=1]
+  ret i32 %tmp1
+}
+
+; X32-LABEL: f3:
+; X64-LABEL: f3:
+
+
+define i32* @f4() nounwind {
+entry:
+  ret i32* @i
+}
+
+; X32-LABEL: f4:
+; X64-LABEL: f4:
+
+
+define i32 @f5() nounwind {
+entry:
+  %0 = load i32, i32* @j, align 4
+  %1 = load i32, i32* @k, align 4
+  %add = add nsw i32 %0, %1
+  ret i32 %add
+}
+
+; X32-LABEL: f5:
+; X32:      movl __emutls_v.j@GOT(%ebx), %eax
+; X32-NEXT: movl %eax, (%esp)
+; X32-NEXT: calll __emutls_get_address@PLT
+; X32-NEXT: movl (%eax), %esi
+; X32-NEXT: movl __emutls_v.k@GOT(%ebx), %eax
+; X32-NEXT: movl %eax, (%esp)
+; X32-NEXT: calll __emutls_get_address@PLT
+; X32-NEXT: addl (%eax), %esi
+; X32-NEXT: movl %esi, %eax
+
+; X64-LABEL: f5:
+; X64:      movq __emutls_v.j@GOTPCREL(%rip), %rdi
+; X64-NEXT: callq __emutls_get_address@PLT
+; X64-NEXT: movl (%rax), %ebx
+; X64-NEXT: movq __emutls_v.k@GOTPCREL(%rip), %rdi
+; X64-NEXT: callq __emutls_get_address@PLT
+; X64-NEXT: addl (%rax), %ebx
+; X64-NEXT: movl %ebx, %eax
+
+;;;;; 32-bit targets
+
+; X32:      .section .data.rel.local,
+; X32-LABEL: __emutls_v.i:
+; X32-NEXT: .long 4
+; X32-NEXT: .long 4
+; X32-NEXT: .long 0
+; X32-NEXT: .long __emutls_t.i
+
+; X32:      .section .rodata,
+; X32-LABEL: __emutls_t.i:
+; X32-NEXT: .long 15
+
+; X32:      .section .data.rel.local,
+; X32-LABEL: __emutls_v.j:
+; X32-NEXT: .long 4
+; X32-NEXT: .long 4
+; X32-NEXT: .long 0
+; X32-NEXT: .long __emutls_t.j
+
+; X32:      .section .rodata,
+; X32-LABEL: __emutls_t.j:
+; X32-NEXT: .long 42
+
+; X32:      .data
+; X32-LABEL: __emutls_v.k:
+; X32-NEXT: .long 4
+; X32-NEXT: .long 8
+; X32-NEXT: .long 0
+; X32-NEXT: .long 0
+
+; X32-NOT:   __emutls_t.k:
+
+;;;;; 64-bit targets
+
+; X64:      .section .data.rel.local,
+; X64-LABEL: __emutls_v.i:
+; X64-NEXT: .quad 4
+; X64-NEXT: .quad 4
+; X64-NEXT: .quad 0
+; X64-NEXT: .quad __emutls_t.i
+
+; X64:      .section .rodata,
+; X64-LABEL: __emutls_t.i:
+; X64-NEXT: .long 15
+
+; X64:      .section .data.rel.local,
+; X64-LABEL: __emutls_v.j:
+; X64-NEXT: .quad 4
+; X64-NEXT: .quad 4
+; X64-NEXT: .quad 0
+; X64-NEXT: .quad __emutls_t.j
+
+; X64:      .section .rodata,
+; X64-LABEL: __emutls_t.j:
+; X64-NEXT: .long 42
+
+; X64:      .data
+; X64-LABEL: __emutls_v.k:
+; X64-NEXT: .quad 4
+; X64-NEXT: .quad 8
+; X64-NEXT: .quad 0
+; X64-NEXT: .quad 0
+
+; X64-NOT:   __emutls_t.k:

test/CodeGen/X86/emutls-pie.ll

+; RUN: llc < %s -march=x86 -mcpu=generic -mtriple=i386-linux-gnu -relocation-model=pic -enable-pie \
+; RUN:   | FileCheck -check-prefix=X32 %s
+; RUN: llc < %s -march=x86-64 -mcpu=generic -mtriple=x86_64-linux-gnu -relocation-model=pic -enable-pie \
+; RUN:   | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -march=x86 -mcpu=generic -mtriple=i386-linux-android -relocation-model=pic -enable-pie \
+; RUN:   | FileCheck -check-prefix=X32 %s
+; RUN: llc < %s -march=x86-64 -mcpu=generic -mtriple=x86_64-linux-android -relocation-model=pic -enable-pie \
+; RUN:   | FileCheck -check-prefix=X64 %s
+
+; Use my_emutls_get_address like __emutls_get_address.
+@my_emutls_v_xyz = external global i8*, align 4
+declare i8* @my_emutls_get_address(i8*)
+
+define i32 @my_get_xyz() {
+; X32-LABEL: my_get_xyz:
+; X32:      movl my_emutls_v_xyz@GOT(%ebx), %eax
+; X32-NEXT: movl %eax, (%esp)
+; X32-NEXT: calll my_emutls_get_address@PLT
+; X32-NEXT: movl (%eax), %eax
+; X32-NEXT: addl $8, %esp
+; X32-NEXT: popl %ebx
+; X32-NEXT: retl
+; X64-LABEL: my_get_xyz:
+; X64:      movq my_emutls_v_xyz@GOTPCREL(%rip), %rdi
+; X64-NEXT: callq my_emutls_get_address@PLT
+; X64-NEXT: movl (%rax), %eax
+; X64-NEXT: popq %rdx
+; X64-NEXT: retq
+
+entry:
+  %call = call i8* @my_emutls_get_address(i8* bitcast (i8** @my_emutls_v_xyz to i8*))
+  %0 = bitcast i8* %call to i32*
+  %1 = load i32, i32* %0, align 4
+  ret i32 %1
+}
+
+@i = thread_local(emulated) global i32 15
+@i2 = external thread_local(emulated) global i32
+
+define i32 @f1() {
+; X32-LABEL: f1:
+; X32:      movl __emutls_v.i@GOT(%ebx), %eax
+; X32-NEXT: movl %eax, (%esp)
+; X32-NEXT: calll __emutls_get_address@PLT
+; X32-NEXT: movl (%eax), %eax
+; X32-NEXT: addl $8, %esp
+; X32-NEXT: popl %ebx
+; X32-NEXT: retl
+; X64-LABEL: f1:
+; X64:      movq __emutls_v.i@GOTPCREL(%rip), %rdi
+; X64-NEXT: callq __emutls_get_address@PLT
+; X64-NEXT: movl (%rax), %eax
+; X64-NEXT: popq %rdx
+; X64-NEXT: retq
+
+entry:
+  %tmp1 = load i32, i32* @i
+  ret i32 %tmp1
+}
+
+define i32* @f2() {
+; X32-LABEL: f2:
+; X32:      movl __emutls_v.i@GOT(%ebx), %eax
+; X32-NEXT: movl %eax, (%esp)
+; X32-NEXT: calll __emutls_get_address@PLT
+; X64-LABEL: f2:
+; X64:      movq __emutls_v.i@GOTPCREL(%rip), %rdi
+; X64-NEXT: callq __emutls_get_address@PLT
+
+entry:
+  ret i32* @i
+}
+
+define i32 @f3() {
+; X32-LABEL: f3:
+; X32:      movl __emutls_v.i2@GOT(%ebx), %eax
+; X32-NEXT: movl %eax, (%esp)
+; X32-NEXT: calll __emutls_get_address@PLT
+; X64-LABEL: f3:
+; X64:      movq __emutls_v.i2@GOTPCREL(%rip), %rdi
+; X64-NEXT: callq __emutls_get_address@PLT
+
+entry:
+  %tmp1 = load i32, i32* @i2
+  ret i32 %tmp1
+}
+
+define i32* @f4() {
+; X32-LABEL: f4:
+; X32:      movl __emutls_v.i2@GOT(%ebx), %eax
+; X32-NEXT: movl %eax, (%esp)
+; X32-NEXT: calll __emutls_get_address@PLT
+; X64-LABEL: f4:
+; X64:      movq __emutls_v.i2@GOTPCREL(%rip), %rdi
+; X64-NEXT: callq __emutls_get_address@PLT
+
+entry:
+  ret i32* @i2
+}
+
+;;;;; 32-bit targets
+
+; X32:      .section .data.rel.local,
+; X32-LABEL: __emutls_v.i:
+; X32-NEXT: .long 4
+; X32-NEXT: .long 4
+; X32-NEXT: .long 0
+; X32-NEXT: .long __emutls_t.i
+
+; X32:      .section .rodata,
+; X32-LABEL: __emutls_t.i:
+; X32-NEXT: .long 15
+
+; X32-NOT:   __emutls_v.i2
+; X32-NOT:   __emutls_t.i2
+
+;;;;; 64-bit targets
+
+; X64:      .section .data.rel.local,
+; X64-LABEL: __emutls_v.i:
+; X64-NEXT: .quad 4
+; X64-NEXT: .quad 4
+; X64-NEXT: .quad 0
+; X64-NEXT: .quad __emutls_t.i
+
+; X64:      .section .rodata,
+; X64-LABEL: __emutls_t.i:
+; X64-NEXT: .long 15
+
+; X64-NOT:   __emutls_v.i2
+; X64-NOT:   __emutls_t.i2

test/CodeGen/X86/emutls.ll

+; RUN: llc < %s -march=x86 -mtriple=i386-linux-gnu | FileCheck -check-prefix=X32 %s
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-gnu | FileCheck -check-prefix=X64 %s
+; RUN: llc < %s -march=x86 -mtriple=x86-linux-android | FileCheck -check-prefix=X32 %s
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-android | FileCheck -check-prefix=X64 %s
+
+; Copied from tls.ll; emulated TLS model is not implemented
+; for *-pc-win32 and *-pc-winows targets yet.
+
+; Use my_emutls_get_address like __emutls_get_address.
+@my_emutls_v_xyz = external global i8*, align 4
+declare i8* @my_emutls_get_address(i8*)
+
+define i32 @my_get_xyz() {
+; X32-LABEL: my_get_xyz:
+; X32:         movl $my_emutls_v_xyz, (%esp)
+; X32-NEXT:    calll my_emutls_get_address
+; X32-NEXT:    movl (%eax), %eax
+; X32-NEXT:    addl $12, %esp
+; X32-NEXT:    retl
+; X64-LABEL: my_get_xyz:
+; X64:         movl $my_emutls_v_xyz, %edi
+; X64-NEXT:    callq my_emutls_get_address
+; X64-NEXT:    movl (%rax), %eax
+; X64-NEXT:    popq %rdx
+; X64-NEXT:    retq
+
+entry:
+  %call = call i8* @my_emutls_get_address(i8* bitcast (i8** @my_emutls_v_xyz to i8*))
+  %0 = bitcast i8* %call to i32*
+  %1 = load i32, i32* %0, align 4
+  ret i32 %1
+}
+
+@i1 = thread_local(emulated) global i32 15
+@i2 = external thread_local(emulated) global i32
+@i3 = internal thread_local(emulated) global i32 15
+@i4 = hidden thread_local(emulated) global i32 15
+@i5 = external hidden thread_local(emulated) global i32
+@s1 = thread_local(emulated) global i16 15
+@b1 = thread_local(emulated) global i8 0
+
+define i32 @f1() {
+; X32-LABEL: f1:
+; X32:         movl $__emutls_v.i1, (%esp)
+; X32-NEXT:    calll __emutls_get_address
+; X32-NEXT:    movl (%eax), %eax
+; X32-NEXT:    addl $12, %esp
+; X32-NEXT:    retl
+; X64-LABEL: f1:
+; X64:         movl $__emutls_v.i1, %edi
+; X64-NEXT:    callq __emutls_get_address
+; X64-NEXT:    movl (%rax), %eax
+; X64-NEXT:    popq %rdx
+; X64-NEXT:    retq
+
+entry:
+  %tmp1 = load i32, i32* @i1
+  ret i32 %tmp1
+}
+
+define i32* @f2() {
+; X32-LABEL: f2:
+; X32:         movl $__emutls_v.i1, (%esp)
+; X32-NEXT:    calll __emutls_get_address
+; X32-NEXT:    addl $12, %esp
+; X32-NEXT:    retl
+; X64-LABEL: f2:
+; X64:         movl $__emutls_v.i1, %edi
+; X64-NEXT:    callq __emutls_get_address
+; X64-NEXT:    popq %rdx
+; X64-NEXT:    retq
+
+entry:
+  ret i32* @i1
+}
+
+define i32 @f3() nounwind {
+; X32-LABEL: f3:
+; X32:         movl $__emutls_v.i2, (%esp)
+; X32-NEXT:    calll __emutls_get_address
+; X32-NEXT:    movl (%eax), %eax
+; X32-NEXT:    addl $12, %esp
+; X32-NEXT:    retl
+
+entry:
+  %tmp1 = load i32, i32* @i2
+  ret i32 %tmp1
+}
+
+define i32* @f4() {
+; X32-LABEL: f4:
+; X32:         movl $__emutls_v.i2, (%esp)
+; X32-NEXT:    calll __emutls_get_address
+; X32-NEXT:    addl $12, %esp
+; X32-NEXT:    retl
+
+entry:
+  ret i32* @i2
+}
+
+define i32 @f5() nounwind {
+; X32-LABEL: f5:
+; X32:         movl $__emutls_v.i3, (%esp)
+; X32-NEXT:    calll __emutls_get_address
+; X32-NEXT:    movl (%eax), %eax
+; X32-NEXT:    addl $12, %esp
+; X32-NEXT:    retl
+
+entry:
+  %tmp1 = load i32, i32* @i3
+  ret i32 %tmp1
+}
+
+define i32* @f6() {
+; X32-LABEL: f6:
+; X32:         movl $__emutls_v.i3, (%esp)
+; X32-NEXT:    calll __emutls_get_address
+; X32-NEXT:    addl $12, %esp
+; X32-NEXT:    retl
+
+entry:
+  ret i32* @i3
+}
+
+define i32 @f7() {
+; X32-LABEL: f7:
+; X32:         movl $__emutls_v.i4, (%esp)
+; X32-NEXT:    calll __emutls_get_address
+; X32-NEXT:    movl (%eax), %eax
+; X32-NEXT:    addl $12, %esp
+; X32-NEXT:    retl
+
+entry:
+  %tmp1 = load i32, i32* @i4
+  ret i32 %tmp1
+}
+
+define i32* @f8() {
+; X32-LABEL: f8:
+; X32:         movl $__emutls_v.i4, (%esp)
+; X32-NEXT:    calll __emutls_get_address
+; X32-NEXT:    addl $12, %esp
+; X32-NEXT:    retl
+
+entry:
+  ret i32* @i4
+}
+
+define i32 @f9() {
+; X32-LABEL: f9:
+; X32:         movl $__emutls_v.i5, (%esp)
+; X32-NEXT:    calll __emutls_get_address
+; X32-NEXT:    movl (%eax), %eax
+; X32-NEXT:    addl $12, %esp
+; X32-NEXT:    retl
+
+entry:
+  %tmp1 = load i32, i32* @i5
+  ret i32 %tmp1
+}
+
+define i32* @f10() {
+; X32-LABEL: f10:
+; X32:         movl $__emutls_v.i5, (%esp)
+; X32-NEXT:    calll __emutls_get_address
+; X32-NEXT:    addl $12, %esp
+; X32-NEXT:    retl
+
+entry:
+  ret i32* @i5
+}
+
+define i16 @f11() {
+; X32-LABEL: f11:
+; X32:         movl $__emutls_v.s1, (%esp)
+; X32-NEXT:    calll __emutls_get_address
+; X32-NEXT:    movzwl (%eax), %eax
+; X32-NEXT:    addl $12, %esp
+; X32-NEXT:    retl
+
+entry:
+  %tmp1 = load i16, i16* @s1
+  ret i16 %tmp1
+}
+
+define i32 @f12() {
+; X32-LABEL: f12:
+; X32:         movl $__emutls_v.s1, (%esp)
+; X32-NEXT:    calll __emutls_get_address
+; X32-NEXT:    movswl (%eax), %eax
+; X32-NEXT:    addl $12, %esp
+; X32-NEXT:    retl
+
+entry:
+  %tmp1 = load i16, i16* @s1
+  %tmp2 = sext i16 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+define i8 @f13() {
+; X32-LABEL: f13:
+; X32:         movl $__emutls_v.b1, (%esp)
+; X32-NEXT:    calll __emutls_get_address
+; X32-NEXT:    movb (%eax), %al
+; X32-NEXT:    addl $12, %esp
+; X32-NEXT:    retl
+
+entry:
+  %tmp1 = load i8, i8* @b1
+  ret i8 %tmp1
+}
+
+define i32 @f14() {
+; X32-LABEL: f14:
+; X32:         movl $__emutls_v.b1, (%esp)
+; X32-NEXT:    calll __emutls_get_address
+; X32-NEXT:    movsbl (%eax), %eax
+; X32-NEXT:    addl $12, %esp
+; X32-NEXT:    retl
+
+entry:
+  %tmp1 = load i8, i8* @b1
+  %tmp2 = sext i8 %tmp1 to i32
+  ret i32 %tmp2
+}
+
+;;;;;;;;;;;;;; 32-bit __emutls_v. and __emutls_t.
+
+; X32       .section .data.rel.local,
+; X32-LABEL: __emutls_v.i1:
+; X32-NEXT: .long 4
+; X32-NEXT: .long 4
+; X32-NEXT: .long 0
+; X32-NEXT: .long __emutls_t.i1
+
+; X32       .section .rodata,
+; X32-LABEL: __emutls_t.i1:
+; X32-NEXT: .long 15
+
+; X32-NOT:   __emutls_v.i2
+
+; X32       .section .data.rel.local,
+; X32-LABEL: __emutls_v.i3:
+; X32-NEXT: .long 4
+; X32-NEXT: .long 4
+; X32-NEXT: .long 0
+; X32-NEXT: .long __emutls_t.i3
+
+; X32       .section .rodata,
+; X32-LABEL: __emutls_t.i3:
+; X32-NEXT: .long 15
+
+; X32       .section .data.rel.local,
+; X32-LABEL: __emutls_v.i4:
+; X32-NEXT: .long 4
+; X32-NEXT: .long 4
+; X32-NEXT: .long 0
+; X32-NEXT: .long __emutls_t.i4
+
+; X32       .section .rodata,
+; X32-LABEL: __emutls_t.i4:
+; X32-NEXT: .long 15
+
+; X32-NOT:   __emutls_v.i5:
+; X32       .hidden __emutls_v.i5
+; X32-NOT:   __emutls_v.i5:
+
+; X32 .section .data.rel.local,
+; X32-LABEL: __emutls_v.s1:
+; X32-NEXT: .long 2
+; X32-NEXT: .long 2
+; X32-NEXT: .long 0
+; X32-NEXT: .long __emutls_t.s1
+
+; X32 .section .rodata,
+; X32-LABEL: __emutls_t.s1:
+; X32-NEXT: .short 15
+
+; X32 .section .data.rel.local,
+; X32-LABEL: __emutls_v.b1:
+; X32-NEXT: .long 1
+; X32-NEXT: .long 1
+; X32-NEXT: .long 0
+; X32-NEXT: .long 0
+
+; X32-NOT:   __emutls_t.b1
+
+;;;;;;;;;;;;;; 64-bit __emutls_v. and __emutls_t.
+
+; X64       .section .data.rel.local,
+; X64-LABEL: __emutls_v.i1:
+; X64-NEXT: .quad 4
+; X64-NEXT: .quad 4
+; X64-NEXT: .quad 0
+; X64-NEXT: .quad __emutls_t.i1
+
+; X64       .section .rodata,
+; X64-LABEL: __emutls_t.i1:
+; X64-NEXT: .long 15
+
+; X64-NOT:   __emutls_v.i2
+
+; X64       .section .data.rel.local,
+; X64-LABEL: __emutls_v.i3:
+; X64-NEXT: .quad 4
+; X64-NEXT: .quad 4
+; X64-NEXT: .quad 0
+; X64-NEXT: .quad __emutls_t.i3
+
+; X64       .section .rodata,
+; X64-LABEL: __emutls_t.i3:
+; X64-NEXT: .long 15
+
+; X64       .section .data.rel.local,
+; X64-LABEL: __emutls_v.i4:
+; X64-NEXT: .quad 4
+; X64-NEXT: .quad 4
+; X64-NEXT: .quad 0
+; X64-NEXT: .quad __emutls_t.i4
+
+; X64       .section .rodata,
+; X64-LABEL: __emutls_t.i4:
+; X64-NEXT: .long 15
+
+; X64-NOT:   __emutls_v.i5:
+; X64       .hidden __emutls_v.i5
+; X64-NOT:   __emutls_v.i5:
+
+; X64       .section .data.rel.local,
+; X64-LABEL: __emutls_v.s1:
+; X64-NEXT: .quad 2
+; X64-NEXT: .quad 2
+; X64-NEXT: .quad 0
+; X64-NEXT: .quad __emutls_t.s1
+
+; X64       .section .rodata,
+; X64-LABEL: __emutls_t.s1:
+; X64-NEXT: .short 15
+
+; X64       .section .data.rel.local,
+; X64-LABEL: __emutls_v.b1:
+; X64-NEXT: .quad 1
+; X64-NEXT: .quad 1
+; X64-NEXT: .quad 0
+; X64-NEXT: .quad 0
+
+; X64-NOT:  __emutls_t.b1

test/CodeGen/X86/fast-isel-emutls.ll

+; RUN: llc < %s -march=x86 -relocation-model=pic -mtriple=i686-unknown-linux-gnu -fast-isel | FileCheck %s
+; PR3654
+
+@v = thread_local(emulated) global i32 0
+define i32 @f() nounwind {
+entry:
+          %t = load i32, i32* @v
+          %s = add i32 %t, 1
+          ret i32 %s
+}
+
+; CHECK-LABEL: f:
+; CHECK:      movl __emutls_v.v@GOT(%ebx), %eax
+; CHECK-NEXT: movl %eax, (%esp)
+; CHECK-NEXT: calll __emutls_get_address@PLT
+; CHECK-NEXT: movl (%eax), %eax
+
+@alias = internal alias i32* @v
+define i32 @f_alias() nounwind {
+entry:
+          %t = load i32, i32* @v
+          %s = add i32 %t, 1
+          ret i32 %s
+}
+
+; CHECK-LABEL: f_alias:
+; CHECK:      movl __emutls_v.v@GOT(%ebx), %eax
+; CHECK-NEXT: movl %eax, (%esp)
+; CHECK-NEXT: calll __emutls_get_address@PLT
+; CHECK-NEXT: movl (%eax), %eax
+
+; Use my_emutls_get_address like __emutls_get_address.
+@my_emutls_v_xyz = external global i8*, align 4
+declare i8* @my_emutls_get_address(i8*)
+
+define i32 @my_get_xyz() {
+entry:
+  %call = call i8* @my_emutls_get_address(i8* bitcast (i8** @my_emutls_v_xyz to i8*))
+  %0 = bitcast i8* %call to i32*
+  %1 = load i32, i32* %0, align 4
+  ret i32 %1
+}
+
+; CHECK-LABEL: my_get_xyz:
+; CHECK:      movl my_emutls_v_xyz@GOT(%ebx), %eax
+; CHECK-NEXT: movl %eax, (%esp)
+; CHECK-NEXT: calll my_emutls_get_address@PLT
+; CHECK-NEXT: movl (%eax), %eax

test/CodeGen/X86/tls-android-negative.ll

+; RUN: llc < %s -march=x86 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck  %s
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck  %s
+
+; Make sure that some symboles are not emitted in emulated TLS model.
+
+@external_x = external thread_local(emulated) global i32
+@external_y = thread_local(emulated) global i32 7
+@internal_y = internal thread_local(emulated) global i32 9
+@internal_y0 = internal thread_local(emulated) global i32 0
+
+define i32* @get_external_x() {
+entry:
+  ret i32* @external_x
+}
+
+define i32* @get_external_y() {
+entry:
+  ret i32* @external_y
+}
+
+define i32* @get_internal_y() {
+entry:
+  ret i32* @internal_y
+}
+
+define i32* @get_internal_y0() {
+entry:
+  ret i32* @internal_y0
+}
+
+; no direct access to emulated TLS variables.
+; no definition of emulated TLS variables.
+; no initializer for external TLS variables, __emutls_t.external_x
+; no initializer for 0-initialized TLS variables, __emutls_t.internal_y0
+; not global linkage for __emutls_t.external_y
+
+; CHECK-NOT: external_x@TLS
+; CHECK-NOT: external_y@TLS
+; CHECK-NOT: internal_y@TLS
+; CHECK-NOT: .size external_x
+; CHECK-NOT: .size external_y
+; CHECK-NOT: .size internal_y
+; CHECK-NOT: .size internal_y0
+; CHECK-NOT: __emutls_v.external_x:
+; CHECK-NOT: __emutls_t.external_x:
+; CHECK-NOT: __emutls_t.internal_y0:
+; CHECK-NOT: global __emutls_t.external_y
+; CHECK-NOT: global __emutls_v.internal_y
+; CHECK-NOT: global __emutls_v.internal_y0
+
+; CHECK:     __emutls_t.external_y
+
+; CHECK-NOT: external_x@TLS
+; CHECK-NOT: external_y@TLS
+; CHECK-NOT: internal_y@TLS
+; CHECK-NOT: .size external_x
+; CHECK-NOT: .size external_y
+; CHECK-NOT: .size internal_y
+; CHECK-NOT: .size internal_y0
+; CHECK-NOT: __emutls_v.external_x:
+; CHECK-NOT: __emutls_t.external_x:
+; CHECK-NOT: __emutls_t.internal_y0:
+; CHECK-NOT: global __emutls_t.external_y
+; CHECK-NOT: global __emutls_v.internal_y
+; CHECK-NOT: global __emutls_v.internal_y0

test/CodeGen/X86/tls-android.ll

+; RUN: llc < %s -march=x86 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck  %s
+; RUN: llc < %s -march=x86-64 -mtriple=x86_64-linux-android -relocation-model=pic | FileCheck -check-prefix=X64 %s
+
+; Make sure that TLS symboles are emitted in expected order.
+
+@external_x = external thread_local(emulated) global i32
+@external_y = thread_local(emulated) global i32 7
+@internal_y = internal thread_local(emulated) global i32 9
+
+define i32* @get_external_x() {
+entry:
+  ret i32* @external_x
+}
+
+define i32* @get_external_y() {
+entry:
+  ret i32* @external_y
+}
+
+define i32* @get_internal_y() {
+entry:
+  ret i32* @internal_y
+}
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 32-bit mode
+; CHECK-LABEL: get_external_x:
+; CHECK:  __emutls_v.external_x
+; CHECK:  __emutls_get_address
+
+; CHECK-LABEL: get_external_y:
+; CHECK:  __emutls_v.external_y
+; CHECK:  __emutls_get_address
+
+; CHECK-LABEL: get_internal_y:
+; CHECK:  __emutls_v.internal_y
+; CHECK:  __emutls_get_address
+
+; CHECK-NOT: __emutls_v.external_x:
+
+; CHECK:       .align 4
+; CHECK-LABEL: __emutls_v.external_y:
+; CHECK-NEXT:  .long 4
+; CHECK-NEXT:  .long 4
+; CHECK-NEXT:  .long 0
+; CHECK-NEXT:  .long __emutls_t.external_y
+; CHECK-LABEL: __emutls_t.external_y:
+; CHECK-NEXT:  .long 7
+
+; CHECK:       .align 4
+; CHECK-LABEL: __emutls_v.internal_y:
+; CHECK-NEXT:  .long 4
+; CHECK-NEXT:  .long 4
+; CHECK-NEXT:  .long 0
+; CHECK-NEXT:  .long __emutls_t.internal_y
+; CHECK-LABEL: __emutls_t.internal_y:
+; CHECK-NEXT:  .long 9
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; 64-bit mode
+; X64-LABEL: get_external_x:
+; X64:  __emutls_v.external_x
+; X64:  __emutls_get_address
+
+; X64-LABEL: get_external_y:
+; X64:  __emutls_v.external_y
+; X64:  __emutls_get_address
+
+; X64-LABEL: get_internal_y:
+; X64:  __emutls_v.internal_y
+; X64:  __emutls_get_address
+
+; X64-NOT: __emutls_v.external_x:
+
+; X64:       .align 8
+; X64-LABEL: __emutls_v.external_y:
+; X64-NEXT:  .quad 4
+; X64-NEXT:  .quad 4
+; X64-NEXT:  .quad 0
+; X64-NEXT:  .quad __emutls_t.external_y
+; X64-LABEL: __emutls_t.external_y:
+; X64-NEXT:  .long 7
+
+; X64:       .align 8
+; X64-LABEL: __emutls_v.internal_y:
+; X64-NEXT:  .quad 4
+; X64-NEXT:  .quad 4
+; X64-NEXT:  .quad 0
+; X64-NEXT:  .quad __emutls_t.internal_y
+; X64-LABEL: __emutls_t.internal_y:
+; X64-NEXT:  .long 9

test/CodeGen/X86/tls-models.ll

 @internal_ld = internal thread_local(localdynamic) global i32 42
 
 @external_ie = external thread_local(initialexec) global i32
 @internal_ie = internal thread_local(initialexec) global i32 42
 
 @external_le = external thread_local(localexec) global i32
 @internal_le = internal thread_local(localexec) global i32 42
 
+; See test cases for emulated model in emutls.ll, emutls-pic.ll and emutls-pie.ll.
+
 ; ----- no model specified -----
 
 define i32* @f1() {
 entry:
   ret i32* @external_gd
 
   ; Non-PIC code can use initial-exec, PIC code has to use general dynamic.
   ; X64-LABEL:     f1:

test/DebugInfo/ARM/tls.ll

 ; RUN: llc -O0 -filetype=asm -mtriple=armv7-linux-gnuehabi < %s | FileCheck %s
+; TODO: add test cases with thread_local(emulated), debug info.
 ;
 ; Generated with clang with source
 ; __thread int x;
 
 @x = thread_local global i32 0, align 4
 
 !llvm.dbg.cu = !{!0}
 !llvm.module.flags = !{!7, !8}

test/DebugInfo/X86/tls.ll

 ; RUN:   | FileCheck --check-prefix=SINGLE --check-prefix=SINGLE-64 --check-prefix=STDOP %s
 
 ; RUN: llc %s -o - -filetype=asm -O0 -mtriple=x86_64-apple-darwin \
 ; RUN:   | FileCheck --check-prefix=DARWIN --check-prefix=STDOP %s
 
 ; RUN: llc %s -o - -filetype=asm -O0 -mtriple=x86_64-unknown-freebsd \
 ; RUN:   | FileCheck --check-prefix=SINGLE --check-prefix=SINGLE-64 --check-prefix=GNUOP %s
 
+; TODO: add test cases with thread_local(emulated), debug info.
+
 ; FIXME: add relocation and DWARF expression support to llvm-dwarfdump & use
 ; that here instead of raw assembly printing
 
 ; FISSION: .section    .debug_info.dwo,
 ; 3 bytes of data in this DW_FORM_block1 representation of the location of 'tls'
 ; FISSION: .byte 3{{ *}}# DW_AT_location
 ; DW_OP_GNU_const_index (0xfx == 252) to refer to the debug_addr table
 ; FISSION-NEXT: .byte 252

test/Transforms/GlobalOpt/emutls.ll

+; RUN: opt < %s -globalopt -S | FileCheck %s
+
+; Identical to tls.ll, but use emulated TLS model.
+
+declare void @wait()
+declare void @signal()
+declare void @start_thread(void ()*)
+
+@x = internal thread_local(emulated) global [100 x i32] zeroinitializer, align 16
+@ip = internal global i32* null, align 8
+
+; PR14309: GlobalOpt would think that the value of @ip is always the address of
+; x[1]. However, that address is different for different threads so @ip cannot
+; be replaced with a constant.
+
+define i32 @f() {
+entry:
+  ; Set @ip to point to x[1] for thread 1.
+  store i32* getelementptr inbounds ([100 x i32], [100 x i32]* @x, i64 0, i64 1), i32** @ip, align 8
+
+  ; Run g on a new thread.
+  tail call void @start_thread(void ()* @g) nounwind
+  tail call void @wait() nounwind
+
+  ; Reset x[1] for thread 1.
+  store i32 0, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @x, i64 0, i64 1), align 4
+
+  ; Read the value of @ip, which now points at x[1] for thread 2.
+  %0 = load i32*, i32** @ip, align 8
+
+  %1 = load i32, i32* %0, align 4
+  ret i32 %1
+
+; CHECK-LABEL: @f(
+; Make sure that the load from @ip hasn't been removed.
+; CHECK: load i32*, i32** @ip
+; CHECK: ret
+}
+
+define internal void @g() nounwind uwtable {
+entry:
+  ; Set @ip to point to x[1] for thread 2.
+  store i32* getelementptr inbounds ([100 x i32], [100 x i32]* @x, i64 0, i64 1), i32** @ip, align 8
+
+  ; Store 50 in x[1] for thread 2.
+  store i32 50, i32* getelementptr inbounds ([100 x i32], [100 x i32]* @x, i64 0, i64 1), align 4
+
+  tail call void @signal() nounwind
+  ret void
+
+; CHECK-LABEL: @g(
+; Make sure that the store to @ip hasn't been removed.
+; CHECK: store {{.*}} @ip
+; CHECK: ret
+}

utils/vim/syntax/llvm.vim

 syn keyword llvmStatement xchg xor zext
 
 " Keywords.
 syn keyword llvmKeyword acq_rel acquire sanitize_address addrspace alias align
 syn keyword llvmKeyword alignstack alwaysinline appending arm_aapcs_vfpcc
 syn keyword llvmKeyword arm_aapcscc arm_apcscc asm atomic available_externally
 syn keyword llvmKeyword blockaddress byval c catch cc ccc cleanup coldcc common
 syn keyword llvmKeyword constant datalayout declare default define deplibs
-syn keyword llvmKeyword distinct dllexport dllimport except extern_weak external
+syn keyword llvmKeyword distinct dllexport dllimport emulated except extern_weak external
 syn keyword llvmKeyword externally_initialized fastcc filter gc global hidden
 syn keyword llvmKeyword initialexec inlinehint inreg intel_ocl_bicc inteldialect
 syn keyword llvmKeyword internal linkonce linkonce_odr localdynamic localexec
 syn keyword llvmKeyword minsize module monotonic msp430_intrcc naked nest
 syn keyword llvmKeyword noalias nocapture noimplicitfloat noinline nonlazybind
 syn keyword llvmKeyword noredzone noreturn nounwind optnone optsize personality
 syn keyword llvmKeyword private protected ptx_device ptx_kernel readnone
 syn keyword llvmKeyword readonly release returns_twice sanitize_thread