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[clang][AIX] Enable inlined quadword atomic operations
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Authored by lkail on Jun 1 2021, 7:41 PM.

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Reviewers
nemanjai
jsji
xingxue
hubert.reinterpretcast
cebowleratibm
jfb
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Summary

If target cpu is pwr8+, we can generate inlined quadword lock free atomic operations, thus no need to generate libcalls into libatomic.

Diff Detail

Event Timeline

lkail created this revision.Jun 1 2021, 7:41 PM
lkail requested review of this revision.Jun 1 2021, 7:41 PM
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qiucf added a subscriber: qiucf.Jun 7 2021, 2:19 AM
qiucf added inline comments.
clang/lib/Basic/Targets/PPC.cpp
336

What about ppc64?

Also, seems there's no need to add pwr10 here.

clang/lib/Basic/Targets/PPC.h
442

We don't need this at all for Linux?

lkail updated this revision to Diff 353268.Jun 20 2021, 10:03 PM

Address comments.

lkail added inline comments.Jun 20 2021, 10:07 PM
clang/lib/Basic/Targets/PPC.cpp
336

What about ppc64?

Instructions needed for inline quadword atomics like lqarx and stqcx are only user-space viable in pwr8 and above. However, pwr6 and pwr7 also feature ppc64.

lkail marked 2 inline comments as done.Jun 20 2021, 10:07 PM
clang/test/CodeGen/ppc64-quadword-atomics.c
11

Can you add a link to something that demonstrates that the implementation of __atomic_exchange is also lock-free when running on pwr8 and up?

lkail added inline comments.Jun 22 2021, 7:04 PM
clang/test/CodeGen/ppc64-quadword-atomics.c
11

https://reviews.llvm.org/D103614#C2646926NL5 All related lock-free codegen is in the parent revision.

clang/test/CodeGen/ppc64-quadword-atomics.c
11

That change is for the compiler. I am looking for something that makes the libatomic implementation correspondingly lock-free for this type (even if libatomic needs to be deployable on pwr7).

lkail planned changes to this revision.Jul 20 2021, 6:04 AM
lkail abandoned this revision.Mar 24 2022, 8:38 AM

Most are covered by https://reviews.llvm.org/D122377 already.

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