[AIX] Enable stackprotect feature

[jsji]

Summary

AIX use __ssp_canary_word instead of __stack_chk_guard.
This patch update the target hook to use correct symbol,
so that the basic stackprotect feature can work.

The traceback will be handled in follow up patch.

[hubert.reinterpretcast]

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

16409

Should this be a macro? A file-scope static const char[] will do.

16421

There's a number of instances of hard-coded "__stack_chk_guard" in what appears to be common code, e.g., in llvm/lib/Transforms/IPO/Internalize.cpp. I think those fall within the scope of this patch.

[jsji]

Address comments.

[jsji]

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

16421

I think InternalizePass is not used by default pass builder.
I can update it in a later patch if we really want to support it as well.

[jsji]

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

16421

https://reviews.llvm.org/D103043 just landed so that it is easier to check triple now, I will create a follow up patch later (maybe after a few days when https://reviews.llvm.org/D103043 stabilized). @hubert.reinterpretcast

[hubert.reinterpretcast]

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

16421

InternalizePass is used by LTO afaik; @w2yehia, can you comment?

[hubert.reinterpretcast]

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

133

Not declaring static explicitly means that some header somewhere declaring this as extern will cause this to be an external definition. I don't think that's great (and I don't think the case is strong for this file to contain a potentially-external definition of this name).

16409

Why remove the old comment? The code still does override and only use the base implementation for non-Linux.

[jsji]

Address comments.

[w2yehia]

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

16421

Yes, libLTO uses it directly, outside of any pass manager:

lto_codegen_compile_to_file
  LTOCodeGenerator::compile_to_file
    LTOCodeGenerator::optimize
      LTOCodeGenerator::applyScopeRestrictions
        llvm::internalizeModule
          InternalizePass(std::move(MustPreserveGV)).internalizeModule(TheModule, CG);

[jsji]

Handle Internalize.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

16421

Thanks Wael.

[shchenz]

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

16422

Is it better to add an assertion here to indicate that the return value will never be nullptr?

llvm/test/CodeGen/PowerPC/stack-guard-oob.ll

2

Should we add the RUN line for 32-bit AIX? I think the enablement is also helpful for 32-bit.

Another nice to have is: should we add RUN line for the other file which is for stack protector on PowerPC on Linux? llvm/test/CodeGen/PowerPC/stack-protector.ll.

If we do this, we can know better about the difference between stack protectors on AIX and Linux?

[jsji]

Address comments.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

16422

We can, but I don't think it is necessary.
We call M.getOrInsertGlobal in insertSSPDeclarations above, so there should not be nullptr.
Also none of the other targets like x86/arm adding the assert too.

[shchenz]

LGTM. Thanks.

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

16422

OK. I suggest this because some users of this function directly dereference the result without checking null.

llvm/lib/Target/PowerPC/PPCISelLowering.h

public:
     /// If a physical register, this returns the register that receives the
     /// exception typeid on entry to a landing pad.
     Register
     getExceptionSelectorRegister(const Constant *PersonalityFn) const override;
 
     /// Override to support customized stack guard loading.
     bool useLoadStackGuardNode() const override;
     void insertSSPDeclarations(Module &M) const override;
+    Value *getSDagStackGuard(const Module &M) const override;
 
     bool isFPImmLegal(const APFloat &Imm, EVT VT,
                       bool ForCodeSize) const override;
 
     unsigned getJumpTableEncoding() const override;
     bool isJumpTableRelative() const override;
     SDValue getPICJumpTableRelocBase(SDValue Table,
                                      SelectionDAG &DAG) const override;

llvm/lib/Target/PowerPC/PPCISelLowering.cpp

 STATISTIC(NumSiblingCalls, "Number of sibling calls");
 STATISTIC(ShufflesHandledWithVPERM, "Number of shuffles lowered to a VPERM");
 STATISTIC(NumDynamicAllocaProbed, "Number of dynamic stack allocation probed");
 
 static bool isNByteElemShuffleMask(ShuffleVectorSDNode *, unsigned, int);
 
 static SDValue widenVec(SelectionDAG &DAG, SDValue Vec, const SDLoc &dl);
 
 // FIXME: Remove this once the bug has been fixed!
 extern cl::opt<bool> ANDIGlueBug;
 
 PPCTargetLowering::PPCTargetLowering(const PPCTargetMachine &TM,
                                      const PPCSubtarget &STI)
     : TargetLowering(TM), Subtarget(STI) {
   // Initialize map that relates the PPC addressing modes to the computed flags
   // of a load/store instruction. The map is used to determine the optimal
   // addressing mode when selecting load and stores.

 
 // Override to enable LOAD_STACK_GUARD lowering on Linux.
 bool PPCTargetLowering::useLoadStackGuardNode() const {
   if (!Subtarget.isTargetLinux())
     return TargetLowering::useLoadStackGuardNode();
   return true;
 }
 
-// Override to disable global variable loading on Linux.
+#define AIX_SSP_CANARY_WORD "__ssp_canary_word"
+// Override to insert AIX canary word declaration.
 void PPCTargetLowering::insertSSPDeclarations(Module &M) const {
+  if (Subtarget.isAIXABI()) {
+    M.getOrInsertGlobal(AIX_SSP_CANARY_WORD,
+                        Type::getInt8PtrTy(M.getContext()));
+    return;
+  }
   if (!Subtarget.isTargetLinux())
     return TargetLowering::insertSSPDeclarations(M);
 }
 
+Value *PPCTargetLowering::getSDagStackGuard(const Module &M) const {
+  if (Subtarget.isAIXABI())
+    return M.getGlobalVariable(AIX_SSP_CANARY_WORD);
+  return TargetLowering::getSDagStackGuard(M);
+}
+
 bool PPCTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT,
                                      bool ForCodeSize) const {
   if (!VT.isSimple() || !Subtarget.hasVSX())
     return false;
 
   switch(VT.getSimpleVT().SimpleTy) {
   default:
     // For FP types that are currently not supported by PPC backend, return

llvm/test/CodeGen/PowerPC/stack-guard-oob.ll

 ; RUN: llc -mtriple=powerpc64le -O0 < %s | FileCheck %s
+; RUN: llc -mtriple=powerpc64-ibm-aix-xcoff -O0 < %s | FileCheck %s --check-prefix=AIX
 
 ; CHECK-LABEL: in_bounds:
 ; CHECK-NOT: __stack_chk_guard
+; AIX-NOT: __ssp_canary_word
 define i32 @in_bounds() #0 {
   %var = alloca i32, align 4
   store i32 0, i32* %var, align 4
   %gep = getelementptr inbounds i32, i32* %var, i32 0
   %ret = load i32, i32* %gep, align 4
   ret i32 %ret
 }
 
 ; CHECK-LABEL: constant_out_of_bounds:
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i32 @constant_out_of_bounds() #0 {
   %var = alloca i32, align 4
   store i32 0, i32* %var, align 4
   %gep = getelementptr inbounds i32, i32* %var, i32 1
   %ret = load i32, i32* %gep, align 4
   ret i32 %ret
 }
 
 ; CHECK-LABEL: nonconstant_out_of_bounds:
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i32 @nonconstant_out_of_bounds(i32 %n) #0 {
   %var = alloca i32, align 4
   store i32 0, i32* %var, align 4
   %gep = getelementptr inbounds i32, i32* %var, i32 %n
   %ret = load i32, i32* %gep, align 4
   ret i32 %ret
 }
 
 ; CHECK-LABEL: phi_before_gep_in_bounds:
 ; CHECK-NOT: __stack_chk_guard
+; AIX-NOT: __ssp_canary_word
 define i32 @phi_before_gep_in_bounds(i32 %k) #0 {
 entry:
   %var1 = alloca i32, align 4
   %var2 = alloca i32, align 4
   store i32 0, i32* %var1, align 4
   store i32 0, i32* %var2, align 4
   %cmp = icmp ne i32 %k, 0
   br i1 %cmp, label %if, label %then
 
 if:
   br label %then
 
 then:
   %ptr = phi i32* [ %var1, %entry ], [ %var2, %if ]
   %gep = getelementptr inbounds i32, i32* %ptr, i32 0
   %ret = load i32, i32* %gep, align 4
   ret i32 %ret
 }
 
 ; CHECK-LABEL: phi_before_gep_constant_out_of_bounds:
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i32 @phi_before_gep_constant_out_of_bounds(i32 %k) #0 {
 entry:
   %var1 = alloca i32, align 4
   %var2 = alloca i32, align 4
   store i32 0, i32* %var1, align 4
   store i32 0, i32* %var2, align 4
   %cmp = icmp ne i32 %k, 0
   br i1 %cmp, label %if, label %then
 
 if:
   br label %then
 
 then:
   %ptr = phi i32* [ %var1, %entry ], [ %var2, %if ]
   %gep = getelementptr inbounds i32, i32* %ptr, i32 1
   %ret = load i32, i32* %gep, align 4
   ret i32 %ret
 }
 
 ; CHECK-LABEL: phi_before_gep_nonconstant_out_of_bounds:
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i32 @phi_before_gep_nonconstant_out_of_bounds(i32 %k, i32 %n) #0 {
 entry:
   %var1 = alloca i32, align 4
   %var2 = alloca i32, align 4
   store i32 0, i32* %var1, align 4
   store i32 0, i32* %var2, align 4
   %cmp = icmp ne i32 %k, 0
   br i1 %cmp, label %if, label %then
 
 if:
   br label %then
 
 then:
   %ptr = phi i32* [ %var1, %entry ], [ %var2, %if ]
   %gep = getelementptr inbounds i32, i32* %ptr, i32 %n
   %ret = load i32, i32* %gep, align 4
   ret i32 %ret
 }
 
 ; CHECK-LABEL: phi_after_gep_in_bounds:
 ; CHECK-NOT: __stack_chk_guard
+; AIX-NOT: __ssp_canary_word
 define i32 @phi_after_gep_in_bounds(i32 %k) #0 {
 entry:
   %var1 = alloca i32, align 4
   %var2 = alloca i32, align 4
   store i32 0, i32* %var1, align 4
   store i32 0, i32* %var2, align 4
   %cmp = icmp ne i32 %k, 0
   br i1 %cmp, label %if, label %else

 then:
   %ptr = phi i32* [ %gep1, %if ], [ %gep2, %else ]
   %ret = load i32, i32* %ptr, align 4
   ret i32 %ret
 }
 
 ; CHECK-LABEL: phi_after_gep_constant_out_of_bounds_a:
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i32 @phi_after_gep_constant_out_of_bounds_a(i32 %k) #0 {
 entry:
   %var1 = alloca i32, align 4
   %var2 = alloca i32, align 4
   store i32 0, i32* %var1, align 4
   store i32 0, i32* %var2, align 4
   %cmp = icmp ne i32 %k, 0
   br i1 %cmp, label %if, label %else

 then:
   %ptr = phi i32* [ %gep1, %if ], [ %gep2, %else ]
   %ret = load i32, i32* %ptr, align 4
   ret i32 %ret
 }
 
 ; CHECK-LABEL: phi_after_gep_constant_out_of_bounds_b:
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i32 @phi_after_gep_constant_out_of_bounds_b(i32 %k) #0 {
 entry:
   %var1 = alloca i32, align 4
   %var2 = alloca i32, align 4
   store i32 0, i32* %var1, align 4
   store i32 0, i32* %var2, align 4
   %cmp = icmp ne i32 %k, 0
   br i1 %cmp, label %if, label %else

 then:
   %ptr = phi i32* [ %gep1, %if ], [ %gep2, %else ]
   %ret = load i32, i32* %ptr, align 4
   ret i32 %ret
 }
 
 ; CHECK-LABEL: phi_different_types_a:
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i64 @phi_different_types_a(i32 %k) #0 {
 entry:
   %var1 = alloca i64, align 4
   %var2 = alloca i32, align 4
   store i64 0, i64* %var1, align 4
   store i32 0, i32* %var2, align 4
   %cmp = icmp ne i32 %k, 0
   br i1 %cmp, label %if, label %then
 
 if:
   %bitcast = bitcast i32* %var2 to i64*
   br label %then
 
 then:
   %ptr = phi i64* [ %var1, %entry ], [ %bitcast, %if ]
   %ret = load i64, i64* %ptr, align 4
   ret i64 %ret
 }
 
 ; CHECK-LABEL: phi_different_types_b:
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i64 @phi_different_types_b(i32 %k) #0 {
 entry:
   %var1 = alloca i32, align 4
   %var2 = alloca i64, align 4
   store i32 0, i32* %var1, align 4
   store i64 0, i64* %var2, align 4
   %cmp = icmp ne i32 %k, 0
   br i1 %cmp, label %if, label %then
 
 if:
   %bitcast = bitcast i32* %var1 to i64*
   br label %then
 
 then:
   %ptr = phi i64* [ %var2, %entry ], [ %bitcast, %if ]
   %ret = load i64, i64* %ptr, align 4
   ret i64 %ret
 }
 
 ; CHECK-LABEL: phi_after_gep_nonconstant_out_of_bounds_a:
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i32 @phi_after_gep_nonconstant_out_of_bounds_a(i32 %k, i32 %n) #0 {
 entry:
   %var1 = alloca i32, align 4
   %var2 = alloca i32, align 4
   store i32 0, i32* %var1, align 4
   store i32 0, i32* %var2, align 4
   %cmp = icmp ne i32 %k, 0
   br i1 %cmp, label %if, label %else

 then:
   %ptr = phi i32* [ %gep1, %if ], [ %gep2, %else ]
   %ret = load i32, i32* %ptr, align 4
   ret i32 %ret
 }
 
 ; CHECK-LABEL: phi_after_gep_nonconstant_out_of_bounds_b:
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i32 @phi_after_gep_nonconstant_out_of_bounds_b(i32 %k, i32 %n) #0 {
 entry:
   %var1 = alloca i32, align 4
   %var2 = alloca i32, align 4
   store i32 0, i32* %var1, align 4
   store i32 0, i32* %var2, align 4
   %cmp = icmp ne i32 %k, 0
   br i1 %cmp, label %if, label %else
then:
   ret i32 %ret
 }
 
 %struct.outer = type { %struct.inner, %struct.inner }
 %struct.inner = type { i32, i32 }
 
 ; CHECK-LABEL: struct_in_bounds:
 ; CHECK-NOT: __stack_chk_guard
+; AIX-NOT: __ssp_canary_word
 define void @struct_in_bounds() #0 {
   %var = alloca %struct.outer, align 4
   %outergep = getelementptr inbounds %struct.outer, %struct.outer* %var, i32 0, i32 1
   %innergep = getelementptr inbounds %struct.inner, %struct.inner* %outergep, i32 0, i32 1
   store i32 0, i32* %innergep, align 4
   ret void
 }
 
 ; CHECK-LABEL: struct_constant_out_of_bounds_a:
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define void @struct_constant_out_of_bounds_a() #0 {
   %var = alloca %struct.outer, align 4
   %outergep = getelementptr inbounds %struct.outer, %struct.outer* %var, i32 1, i32 0
   %innergep = getelementptr inbounds %struct.inner, %struct.inner* %outergep, i32 0, i32 0
   store i32 0, i32* %innergep, align 4
   ret void
 }
 
 ; CHECK-LABEL: struct_constant_out_of_bounds_b:
 ; Here the offset is out-of-bounds of the addressed struct.inner member, but
 ; still within bounds of the outer struct so no stack guard is needed.
 ; CHECK-NOT: __stack_chk_guard
+; AIX-NOT: __ssp_canary_word
 define void @struct_constant_out_of_bounds_b() #0 {
   %var = alloca %struct.outer, align 4
   %outergep = getelementptr inbounds %struct.outer, %struct.outer* %var, i32 0, i32 0
   %innergep = getelementptr inbounds %struct.inner, %struct.inner* %outergep, i32 1, i32 0
   store i32 0, i32* %innergep, align 4
   ret void
 }
 
 ; CHECK-LABEL: struct_constant_out_of_bounds_c:
 ; Here we are out-of-bounds of both the inner and outer struct.
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define void @struct_constant_out_of_bounds_c() #0 {
   %var = alloca %struct.outer, align 4
   %outergep = getelementptr inbounds %struct.outer, %struct.outer* %var, i32 0, i32 1
   %innergep = getelementptr inbounds %struct.inner, %struct.inner* %outergep, i32 1, i32 0
   store i32 0, i32* %innergep, align 4
   ret void
 }
 
 ; CHECK-LABEL: struct_nonconstant_out_of_bounds_a:
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define void @struct_nonconstant_out_of_bounds_a(i32 %n) #0 {
   %var = alloca %struct.outer, align 4
   %outergep = getelementptr inbounds %struct.outer, %struct.outer* %var, i32 %n, i32 0
   %innergep = getelementptr inbounds %struct.inner, %struct.inner* %outergep, i32 0, i32 0
   store i32 0, i32* %innergep, align 4
   ret void
 }
 
 ; CHECK-LABEL: struct_nonconstant_out_of_bounds_b:
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define void @struct_nonconstant_out_of_bounds_b(i32 %n) #0 {
   %var = alloca %struct.outer, align 4
   %outergep = getelementptr inbounds %struct.outer, %struct.outer* %var, i32 0, i32 0
   %innergep = getelementptr inbounds %struct.inner, %struct.inner* %outergep, i32 %n, i32 0
   store i32 0, i32* %innergep, align 4
   ret void
 }
 
 ; CHECK-LABEL: bitcast_smaller_load
 ; CHECK-NOT: __stack_chk_guard
+; AIX-NOT: __ssp_canary_word
 define i32 @bitcast_smaller_load() #0 {
   %var = alloca i64, align 4
   store i64 0, i64* %var, align 4
   %bitcast = bitcast i64* %var to i32*
   %ret = load i32, i32* %bitcast, align 4
   ret i32 %ret
 }
 
 ; CHECK-LABEL: bitcast_same_size_load
 ; CHECK-NOT: __stack_chk_guard
+; AIX-NOT: __ssp_canary_word
 define i32 @bitcast_same_size_load() #0 {
   %var = alloca i64, align 4
   store i64 0, i64* %var, align 4
   %bitcast = bitcast i64* %var to %struct.inner*
   %gep = getelementptr inbounds %struct.inner, %struct.inner* %bitcast, i32 0, i32 1
   %ret = load i32, i32* %gep, align 4
   ret i32 %ret
 }
 
 ; CHECK-LABEL: bitcast_larger_load
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i64 @bitcast_larger_load() #0 {
   %var = alloca i32, align 4
   store i32 0, i32* %var, align 4
   %bitcast = bitcast i32* %var to i64*
   %ret = load i64, i64* %bitcast, align 4
   ret i64 %ret
 }
 
 ; CHECK-LABEL: bitcast_larger_store
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i32 @bitcast_larger_store() #0 {
   %var = alloca i32, align 4
   %bitcast = bitcast i32* %var to i64*
   store i64 0, i64* %bitcast, align 4
   %ret = load i32, i32* %var, align 4
   ret i32 %ret
 }
 
 ; CHECK-LABEL: bitcast_larger_cmpxchg
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i64 @bitcast_larger_cmpxchg(i64 %desired, i64 %new) #0 {
   %var = alloca i32, align 4
   %bitcast = bitcast i32* %var to i64*
   %pair = cmpxchg i64* %bitcast, i64 %desired, i64 %new seq_cst monotonic
   %ret = extractvalue { i64, i1 } %pair, 0
   ret i64 %ret
 }
 
 ; CHECK-LABEL: bitcast_larger_atomic_rmw
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i64 @bitcast_larger_atomic_rmw() #0 {
   %var = alloca i32, align 4
   %bitcast = bitcast i32* %var to i64*
   %ret = atomicrmw add i64* %bitcast, i64 1 monotonic
   ret i64 %ret
 }
 
 %struct.packed = type <{ i16, i32 }>
 
 ; CHECK-LABEL: bitcast_overlap
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i32 @bitcast_overlap() #0 {
   %var = alloca i32, align 4
   %bitcast = bitcast i32* %var to %struct.packed*
   %gep = getelementptr inbounds %struct.packed, %struct.packed* %bitcast, i32 0, i32 1
   %ret = load i32, i32* %gep, align 2
   ret i32 %ret
 }
 
 %struct.multi_dimensional = type { [10 x [10 x i32]], i32 }
 
 ; CHECK-LABEL: multi_dimensional_array
 ; CHECK: __stack_chk_guard
+; AIX: __ssp_canary_word
 define i32 @multi_dimensional_array() #0 {
   %var = alloca %struct.multi_dimensional, align 4
   %gep1 = getelementptr inbounds %struct.multi_dimensional, %struct.multi_dimensional* %var, i32 0, i32 0
   %gep2 = getelementptr inbounds [10 x [10 x i32]], [10 x [10 x i32]]* %gep1, i32 0, i32 10
   %gep3 = getelementptr inbounds [10 x i32], [10 x i32]* %gep2, i32 0, i32 5
   %ret = load i32, i32* %gep3, align 4
   ret i32 %ret
 }
 
 attributes #0 = { sspstrong }