[unittests][CodeGen] Mark tests that cannot be executed with GTEST_SKIP()

[ikudrin]

Summary

This helps to distinguish such tests from successfully passed ones.

[scott.linder]

I see // TODO: Use GTEST_SKIP() when GTest is updated to version 1.10.0 show up in llvm/unittests/CodeGen/DIEHashTest.cpp, llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp and clang/unittests/StaticAnalyzer/FalsePositiveRefutationBRVisitorTest.cpp; would you consider updating those at the same time?

Other than that this LGTM, thank you!

[dsanders]

LGTM too. Thanks!

[ikudrin]

In D102754#2769054, @scott.linder wrote:

I see // TODO: Use GTEST_SKIP() when GTest is updated to version 1.10.0 show up in llvm/unittests/CodeGen/DIEHashTest.cpp, llvm/unittests/ExecutionEngine/Orc/OrcCAPITest.cpp and clang/unittests/StaticAnalyzer/FalsePositiveRefutationBRVisitorTest.cpp; would you consider updating those at the same time?

This patch is for llvm/unittests/CodeGen. There are D102710 for llvm/unittests/ExecutionEngine and D102643 for clang/unittests/StaticAnalyzer by their corresponding authors.

Other than that this LGTM, thank you!

Thanks!

llvm/unittests/CodeGen/AArch64SelectionDAGTest.cpp

void SetUp() override {
 
     Triple TargetTriple("aarch64--");
     std::string Error;
     const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
     // FIXME: These tests do not depend on AArch64 specifically, but we have to
     // initialize a target. A skeleton Target for unittests would allow us to
     // always run these tests.
     if (!T)
-      return;
+      GTEST_SKIP();
 
     TargetOptions Options;
     TM = std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine *>(
         T->createTargetMachine("AArch64", "", "+sve", Options, None, None,
                                CodeGenOpt::Aggressive)));
     if (!TM)
-      return;
+      GTEST_SKIP();
 
     SMDiagnostic SMError;
     M = parseAssemblyString(Assembly, SMError, Context);
     if (!M)
       report_fatal_error(SMError.getMessage());
     M->setDataLayout(TM->createDataLayout());
 
     F = M->getFunction("f");
protected:
   std::unique_ptr<LLVMTargetMachine> TM;
   std::unique_ptr<Module> M;
   Function *F;
   std::unique_ptr<MachineFunction> MF;
   std::unique_ptr<SelectionDAG> DAG;
 };
 
 TEST_F(AArch64SelectionDAGTest, computeKnownBits_ZERO_EXTEND_VECTOR_INREG) {
-  if (!TM)
-    return;
   SDLoc Loc;
   auto Int8VT = EVT::getIntegerVT(Context, 8);
   auto Int16VT = EVT::getIntegerVT(Context, 16);
   auto InVecVT = EVT::getVectorVT(Context, Int8VT, 4);
   auto OutVecVT = EVT::getVectorVT(Context, Int16VT, 2);
   auto InVec = DAG->getConstant(0, Loc, InVecVT);
   auto Op = DAG->getNode(ISD::ZERO_EXTEND_VECTOR_INREG, Loc, OutVecVT, InVec);
   auto DemandedElts = APInt(2, 3);
   KnownBits Known = DAG->computeKnownBits(Op, DemandedElts);
   EXPECT_TRUE(Known.isZero());
 }
 
 TEST_F(AArch64SelectionDAGTest, computeKnownBitsSVE_ZERO_EXTEND_VECTOR_INREG) {
-  if (!TM)
-    return;
   SDLoc Loc;
   auto Int8VT = EVT::getIntegerVT(Context, 8);
   auto Int16VT = EVT::getIntegerVT(Context, 16);
   auto InVecVT = EVT::getVectorVT(Context, Int8VT, 4, true);
   auto OutVecVT = EVT::getVectorVT(Context, Int16VT, 2, true);
   auto InVec = DAG->getConstant(0, Loc, InVecVT);
   auto Op = DAG->getNode(ISD::ZERO_EXTEND_VECTOR_INREG, Loc, OutVecVT, InVec);
   auto DemandedElts = APInt(2, 3);
   KnownBits Known = DAG->computeKnownBits(Op, DemandedElts);
 
   // We don't know anything for SVE at the moment.
   EXPECT_EQ(Known.Zero, APInt(16, 0u));
   EXPECT_EQ(Known.One, APInt(16, 0u));
   EXPECT_FALSE(Known.isZero());
 }
 
 TEST_F(AArch64SelectionDAGTest, computeKnownBits_EXTRACT_SUBVECTOR) {
-  if (!TM)
-    return;
   SDLoc Loc;
   auto IntVT = EVT::getIntegerVT(Context, 8);
   auto VecVT = EVT::getVectorVT(Context, IntVT, 3);
   auto IdxVT = EVT::getIntegerVT(Context, 64);
   auto Vec = DAG->getConstant(0, Loc, VecVT);
   auto ZeroIdx = DAG->getConstant(0, Loc, IdxVT);
   auto Op = DAG->getNode(ISD::EXTRACT_SUBVECTOR, Loc, VecVT, Vec, ZeroIdx);
   auto DemandedElts = APInt(3, 7);
   KnownBits Known = DAG->computeKnownBits(Op, DemandedElts);
   EXPECT_TRUE(Known.isZero());
 }
 
 TEST_F(AArch64SelectionDAGTest, ComputeNumSignBits_SIGN_EXTEND_VECTOR_INREG) {
-  if (!TM)
-    return;
   SDLoc Loc;
   auto Int8VT = EVT::getIntegerVT(Context, 8);
   auto Int16VT = EVT::getIntegerVT(Context, 16);
   auto InVecVT = EVT::getVectorVT(Context, Int8VT, 4);
   auto OutVecVT = EVT::getVectorVT(Context, Int16VT, 2);
   auto InVec = DAG->getConstant(1, Loc, InVecVT);
   auto Op = DAG->getNode(ISD::SIGN_EXTEND_VECTOR_INREG, Loc, OutVecVT, InVec);
   auto DemandedElts = APInt(2, 3);
   EXPECT_EQ(DAG->ComputeNumSignBits(Op, DemandedElts), 15u);
 }
 
 TEST_F(AArch64SelectionDAGTest, ComputeNumSignBitsSVE_SIGN_EXTEND_VECTOR_INREG) {
-  if (!TM)
-    return;
   SDLoc Loc;
   auto Int8VT = EVT::getIntegerVT(Context, 8);
   auto Int16VT = EVT::getIntegerVT(Context, 16);
   auto InVecVT = EVT::getVectorVT(Context, Int8VT, 4, /*IsScalable=*/true);
   auto OutVecVT = EVT::getVectorVT(Context, Int16VT, 2, /*IsScalable=*/true);
   auto InVec = DAG->getConstant(1, Loc, InVecVT);
   auto Op = DAG->getNode(ISD::SIGN_EXTEND_VECTOR_INREG, Loc, OutVecVT, InVec);
   auto DemandedElts = APInt(2, 3);
   EXPECT_EQ(DAG->ComputeNumSignBits(Op, DemandedElts), 1u);
 }
 
 TEST_F(AArch64SelectionDAGTest, ComputeNumSignBits_EXTRACT_SUBVECTOR) {
-  if (!TM)
-    return;
   SDLoc Loc;
   auto IntVT = EVT::getIntegerVT(Context, 8);
   auto VecVT = EVT::getVectorVT(Context, IntVT, 3);
   auto IdxVT = EVT::getIntegerVT(Context, 64);
   auto Vec = DAG->getConstant(1, Loc, VecVT);
   auto ZeroIdx = DAG->getConstant(0, Loc, IdxVT);
   auto Op = DAG->getNode(ISD::EXTRACT_SUBVECTOR, Loc, VecVT, Vec, ZeroIdx);
   auto DemandedElts = APInt(3, 7);
   EXPECT_EQ(DAG->ComputeNumSignBits(Op, DemandedElts), 7u);
 }
 
 TEST_F(AArch64SelectionDAGTest, SimplifyDemandedVectorElts_EXTRACT_SUBVECTOR) {
-  if (!TM)
-    return;
-
   TargetLowering TL(*TM);
 
   SDLoc Loc;
   auto IntVT = EVT::getIntegerVT(Context, 8);
   auto VecVT = EVT::getVectorVT(Context, IntVT, 3);
   auto IdxVT = EVT::getIntegerVT(Context, 64);
   auto Vec = DAG->getConstant(1, Loc, VecVT);
   auto ZeroIdx = DAG->getConstant(0, Loc, IdxVT);
   auto Op = DAG->getNode(ISD::EXTRACT_SUBVECTOR, Loc, VecVT, Vec, ZeroIdx);
   auto DemandedElts = APInt(3, 7);
   auto KnownUndef = APInt(3, 0);
   auto KnownZero = APInt(3, 0);
   TargetLowering::TargetLoweringOpt TLO(*DAG, false, false);
   EXPECT_EQ(TL.SimplifyDemandedVectorElts(Op, DemandedElts, KnownUndef,
                                           KnownZero, TLO),
             false);
 }
 
 TEST_F(AArch64SelectionDAGTest, SimplifyDemandedBitsNEON) {
-  if (!TM)
-    return;
-
   TargetLowering TL(*TM);
 
   SDLoc Loc;
   auto Int8VT = EVT::getIntegerVT(Context, 8);
   auto InVecVT = EVT::getVectorVT(Context, Int8VT, 16);
   SDValue UnknownOp = DAG->getRegister(0, InVecVT);
   SDValue Mask1S = DAG->getConstant(0x8A, Loc, Int8VT);
   SDValue Mask1V = DAG->getSplatBuildVector(InVecVT, Loc, Mask1S);
TEST_F(AArch64SelectionDAGTest, SimplifyDemandedBitsNEON) {
   KnownBits Known;
   APInt DemandedBits = APInt(8, 0xFF);
   TargetLowering::TargetLoweringOpt TLO(*DAG, false, false);
   EXPECT_TRUE(TL.SimplifyDemandedBits(Op, DemandedBits, Known, TLO));
   EXPECT_EQ(Known.Zero, APInt(8, 0xAA));
 }
 
 TEST_F(AArch64SelectionDAGTest, SimplifyDemandedBitsSVE) {
-  if (!TM)
-    return;
-
   TargetLowering TL(*TM);
 
   SDLoc Loc;
   auto Int8VT = EVT::getIntegerVT(Context, 8);
   auto InVecVT = EVT::getVectorVT(Context, Int8VT, 16, /*IsScalable=*/true);
   SDValue UnknownOp = DAG->getRegister(0, InVecVT);
   SDValue Mask1S = DAG->getConstant(0x8A, Loc, Int8VT);
   SDValue Mask1V = DAG->getSplatVector(InVecVT, Loc, Mask1S);
   SDValue N0 = DAG->getNode(ISD::AND, Loc, InVecVT, Mask1V, UnknownOp);
 
   SDValue Mask2S = DAG->getConstant(0x55, Loc, Int8VT);
   SDValue Mask2V = DAG->getSplatVector(InVecVT, Loc, Mask2S);
 
   SDValue Op = DAG->getNode(ISD::AND, Loc, InVecVT, N0, Mask2V);
 
   KnownBits Known;
   APInt DemandedBits = APInt(8, 0xFF);
   TargetLowering::TargetLoweringOpt TLO(*DAG, false, false);
   EXPECT_FALSE(TL.SimplifyDemandedBits(Op, DemandedBits, Known, TLO));
   EXPECT_EQ(Known.Zero, APInt(8, 0));
 }
 
 // Piggy-backing on the AArch64 tests to verify SelectionDAG::computeKnownBits.
 TEST_F(AArch64SelectionDAGTest, ComputeKnownBits_ADD) {
-  if (!TM)
-    return;
   SDLoc Loc;
   auto IntVT = EVT::getIntegerVT(Context, 8);
   auto UnknownOp = DAG->getRegister(0, IntVT);
   auto Mask = DAG->getConstant(0x8A, Loc, IntVT);
   auto N0 = DAG->getNode(ISD::AND, Loc, IntVT, Mask, UnknownOp);
   auto N1 = DAG->getConstant(0x55, Loc, IntVT);
   auto Op = DAG->getNode(ISD::ADD, Loc, IntVT, N0, N1);
   // N0 = ?000?0?0
   // N1 = 01010101
   //  =>
   // Known.One  = 01010101 (0x55)
   // Known.Zero = 00100000 (0x20)
   KnownBits Known = DAG->computeKnownBits(Op);
   EXPECT_EQ(Known.Zero, APInt(8, 0x20));
   EXPECT_EQ(Known.One, APInt(8, 0x55));
 }
 
 // Piggy-backing on the AArch64 tests to verify SelectionDAG::computeKnownBits.
 TEST_F(AArch64SelectionDAGTest, ComputeKnownBits_SUB) {
-  if (!TM)
-    return;
   SDLoc Loc;
   auto IntVT = EVT::getIntegerVT(Context, 8);
   auto N0 = DAG->getConstant(0x55, Loc, IntVT);
   auto UnknownOp = DAG->getRegister(0, IntVT);
   auto Mask = DAG->getConstant(0x2e, Loc, IntVT);
   auto N1 = DAG->getNode(ISD::AND, Loc, IntVT, Mask, UnknownOp);
   auto Op = DAG->getNode(ISD::SUB, Loc, IntVT, N0, N1);
   // N0 = 01010101
   // N1 = 00?0???0
   //  =>
   // Known.One  = 00000001 (0x1)
   // Known.Zero = 10000000 (0x80)
   KnownBits Known = DAG->computeKnownBits(Op);
   EXPECT_EQ(Known.Zero, APInt(8, 0x80));
   EXPECT_EQ(Known.One, APInt(8, 0x1));
 }
 
 TEST_F(AArch64SelectionDAGTest, isSplatValue_Fixed_BUILD_VECTOR) {
-  if (!TM)
-    return;
-
   TargetLowering TL(*TM);
 
   SDLoc Loc;
   auto IntVT = EVT::getIntegerVT(Context, 8);
   auto VecVT = EVT::getVectorVT(Context, IntVT, 16, false);
   // Create a BUILD_VECTOR
   SDValue Op = DAG->getConstant(1, Loc, VecVT);
   EXPECT_EQ(Op->getOpcode(), ISD::BUILD_VECTOR);
   EXPECT_TRUE(DAG->isSplatValue(Op, /*AllowUndefs=*/false));
 
   APInt UndefElts;
   APInt DemandedElts;
   EXPECT_FALSE(DAG->isSplatValue(Op, DemandedElts, UndefElts));
 
   // Width=16, Mask=3
   DemandedElts = APInt(16, 3);
   EXPECT_TRUE(DAG->isSplatValue(Op, DemandedElts, UndefElts));
 }
 
 TEST_F(AArch64SelectionDAGTest, isSplatValue_Fixed_ADD_of_BUILD_VECTOR) {
-  if (!TM)
-    return;
-
   TargetLowering TL(*TM);
 
   SDLoc Loc;
   auto IntVT = EVT::getIntegerVT(Context, 8);
   auto VecVT = EVT::getVectorVT(Context, IntVT, 16, false);
 
   // Should create BUILD_VECTORs
   SDValue Val1 = DAG->getConstant(1, Loc, VecVT);
   SDValue Val2 = DAG->getConstant(3, Loc, VecVT);
   EXPECT_EQ(Val1->getOpcode(), ISD::BUILD_VECTOR);
   SDValue Op = DAG->getNode(ISD::ADD, Loc, VecVT, Val1, Val2);
 
   EXPECT_TRUE(DAG->isSplatValue(Op, /*AllowUndefs=*/false));
 
   APInt UndefElts;
   APInt DemandedElts;
   EXPECT_FALSE(DAG->isSplatValue(Op, DemandedElts, UndefElts));
 
   // Width=16, Mask=3
   DemandedElts = APInt(16, 3);
   EXPECT_TRUE(DAG->isSplatValue(Op, DemandedElts, UndefElts));
 }
 
 TEST_F(AArch64SelectionDAGTest, isSplatValue_Scalable_SPLAT_VECTOR) {
-  if (!TM)
-    return;
-
   TargetLowering TL(*TM);
 
   SDLoc Loc;
   auto IntVT = EVT::getIntegerVT(Context, 8);
   auto VecVT = EVT::getVectorVT(Context, IntVT, 16, true);
   // Create a SPLAT_VECTOR
   SDValue Op = DAG->getConstant(1, Loc, VecVT);
   EXPECT_EQ(Op->getOpcode(), ISD::SPLAT_VECTOR);
   EXPECT_TRUE(DAG->isSplatValue(Op, /*AllowUndefs=*/false));
 
   APInt UndefElts;
   APInt DemandedElts;
   EXPECT_TRUE(DAG->isSplatValue(Op, DemandedElts, UndefElts));
 
   // Width=16, Mask=3. These bits should be ignored.
   DemandedElts = APInt(16, 3);
   EXPECT_TRUE(DAG->isSplatValue(Op, DemandedElts, UndefElts));
 }
 
 TEST_F(AArch64SelectionDAGTest, isSplatValue_Scalable_ADD_of_SPLAT_VECTOR) {
-  if (!TM)
-    return;
-
   TargetLowering TL(*TM);
 
   SDLoc Loc;
   auto IntVT = EVT::getIntegerVT(Context, 8);
   auto VecVT = EVT::getVectorVT(Context, IntVT, 16, true);
 
   // Should create SPLAT_VECTORS
   SDValue Val1 = DAG->getConstant(1, Loc, VecVT);
   SDValue Val2 = DAG->getConstant(3, Loc, VecVT);
   EXPECT_EQ(Val1->getOpcode(), ISD::SPLAT_VECTOR);
   SDValue Op = DAG->getNode(ISD::ADD, Loc, VecVT, Val1, Val2);
 
   EXPECT_TRUE(DAG->isSplatValue(Op, /*AllowUndefs=*/false));
 
   APInt UndefElts;
   APInt DemandedElts;
   EXPECT_TRUE(DAG->isSplatValue(Op, DemandedElts, UndefElts));
 
   // Width=16, Mask=3. These bits should be ignored.
   DemandedElts = APInt(16, 3);
   EXPECT_TRUE(DAG->isSplatValue(Op, DemandedElts, UndefElts));
 }
 
 TEST_F(AArch64SelectionDAGTest, getSplatSourceVector_Fixed_BUILD_VECTOR) {
-  if (!TM)
-    return;
-
   TargetLowering TL(*TM);
 
   SDLoc Loc;
   auto IntVT = EVT::getIntegerVT(Context, 8);
   auto VecVT = EVT::getVectorVT(Context, IntVT, 16, false);
   // Create a BUILD_VECTOR
   SDValue Op = DAG->getConstant(1, Loc, VecVT);
   EXPECT_EQ(Op->getOpcode(), ISD::BUILD_VECTOR);
 
   int SplatIdx = -1;
   EXPECT_EQ(DAG->getSplatSourceVector(Op, SplatIdx), Op);
   EXPECT_EQ(SplatIdx, 0);
 }
 
 TEST_F(AArch64SelectionDAGTest, getSplatSourceVector_Fixed_ADD_of_BUILD_VECTOR) {
-  if (!TM)
-    return;
-
   TargetLowering TL(*TM);
 
   SDLoc Loc;
   auto IntVT = EVT::getIntegerVT(Context, 8);
   auto VecVT = EVT::getVectorVT(Context, IntVT, 16, false);
 
   // Should create BUILD_VECTORs
   SDValue Val1 = DAG->getConstant(1, Loc, VecVT);
   SDValue Val2 = DAG->getConstant(3, Loc, VecVT);
   EXPECT_EQ(Val1->getOpcode(), ISD::BUILD_VECTOR);
   SDValue Op = DAG->getNode(ISD::ADD, Loc, VecVT, Val1, Val2);
 
   int SplatIdx = -1;
   EXPECT_EQ(DAG->getSplatSourceVector(Op, SplatIdx), Op);
   EXPECT_EQ(SplatIdx, 0);
 }
 
 TEST_F(AArch64SelectionDAGTest, getSplatSourceVector_Scalable_SPLAT_VECTOR) {
-  if (!TM)
-    return;
-
   TargetLowering TL(*TM);
 
   SDLoc Loc;
   auto IntVT = EVT::getIntegerVT(Context, 8);
   auto VecVT = EVT::getVectorVT(Context, IntVT, 16, true);
   // Create a SPLAT_VECTOR
   SDValue Op = DAG->getConstant(1, Loc, VecVT);
   EXPECT_EQ(Op->getOpcode(), ISD::SPLAT_VECTOR);
 
   int SplatIdx = -1;
   EXPECT_EQ(DAG->getSplatSourceVector(Op, SplatIdx), Op);
   EXPECT_EQ(SplatIdx, 0);
 }
 
 TEST_F(AArch64SelectionDAGTest, getSplatSourceVector_Scalable_ADD_of_SPLAT_VECTOR) {
-  if (!TM)
-    return;
-
   TargetLowering TL(*TM);
 
   SDLoc Loc;
   auto IntVT = EVT::getIntegerVT(Context, 8);
   auto VecVT = EVT::getVectorVT(Context, IntVT, 16, true);
 
   // Should create SPLAT_VECTORS
   SDValue Val1 = DAG->getConstant(1, Loc, VecVT);
   SDValue Val2 = DAG->getConstant(3, Loc, VecVT);
   EXPECT_EQ(Val1->getOpcode(), ISD::SPLAT_VECTOR);
   SDValue Op = DAG->getNode(ISD::ADD, Loc, VecVT, Val1, Val2);
 
   int SplatIdx = -1;
   EXPECT_EQ(DAG->getSplatSourceVector(Op, SplatIdx), Op);
   EXPECT_EQ(SplatIdx, 0);
 }
 
 TEST_F(AArch64SelectionDAGTest, getRepeatedSequence_Patterns) {
-  if (!TM)
-    return;
-
   TargetLowering TL(*TM);
 
   SDLoc Loc;
   unsigned NumElts = 16;
   MVT IntVT = MVT::i8;
   MVT VecVT = MVT::getVectorVT(IntVT, NumElts);
 
   // Base scalar constants.
TEST_F(AArch64SelectionDAGTest, getRepeatedSequence_Patterns) {
   APInt Mask1_3 = APInt::getHighBitsSet(16, 8);
   EXPECT_TRUE(BV1_3->getRepeatedSequence(Mask1_3, Seq1_3, &Undefs1_3));
   EXPECT_EQ(Undefs1_3.count(), 0u);
   EXPECT_EQ(Seq1_3.size(), 1u);
   EXPECT_EQ(Seq1_3[0], Val3);
 }
 
 TEST_F(AArch64SelectionDAGTest, getTypeConversion_SplitScalableMVT) {
-  if (!TM)
-    return;
-
   MVT VT = MVT::nxv4i64;
   EXPECT_EQ(getTypeAction(VT), TargetLoweringBase::TypeSplitVector);
   ASSERT_TRUE(getTypeToTransformTo(VT).isScalableVector());
 }
 
 TEST_F(AArch64SelectionDAGTest, getTypeConversion_PromoteScalableMVT) {
-  if (!TM)
-    return;
-
   MVT VT = MVT::nxv2i32;
   EXPECT_EQ(getTypeAction(VT), TargetLoweringBase::TypePromoteInteger);
   ASSERT_TRUE(getTypeToTransformTo(VT).isScalableVector());
 }
 
 TEST_F(AArch64SelectionDAGTest, getTypeConversion_NoScalarizeMVT_nxv1f32) {
-  if (!TM)
-    return;
-
   MVT VT = MVT::nxv1f32;
   EXPECT_NE(getTypeAction(VT), TargetLoweringBase::TypeScalarizeVector);
   ASSERT_TRUE(getTypeToTransformTo(VT).isScalableVector());
 }
 
 TEST_F(AArch64SelectionDAGTest, getTypeConversion_SplitScalableEVT) {
-  if (!TM)
-    return;
-
   EVT VT = EVT::getVectorVT(Context, MVT::i64, 256, true);
   EXPECT_EQ(getTypeAction(VT), TargetLoweringBase::TypeSplitVector);
   EXPECT_EQ(getTypeToTransformTo(VT), VT.getHalfNumVectorElementsVT(Context));
 }
 
 TEST_F(AArch64SelectionDAGTest, getTypeConversion_WidenScalableEVT) {
-  if (!TM)
-    return;
-
   EVT FromVT = EVT::getVectorVT(Context, MVT::i64, 6, true);
   EVT ToVT = EVT::getVectorVT(Context, MVT::i64, 8, true);
 
   EXPECT_EQ(getTypeAction(FromVT), TargetLoweringBase::TypeWidenVector);
   EXPECT_EQ(getTypeToTransformTo(FromVT), ToVT);
 }
 
 TEST_F(AArch64SelectionDAGTest, getTypeConversion_NoScalarizeEVT_nxv1f128) {
-  if (!TM)
-    return;
-
   EVT FromVT = EVT::getVectorVT(Context, MVT::f128, 1, true);
   EXPECT_DEATH(getTypeAction(FromVT), "Cannot legalize this vector");
 }
 
 TEST_F(AArch64SelectionDAGTest, TestFold_STEP_VECTOR) {
-  if (!TM)
-    return;
-
   SDLoc Loc;
   auto IntVT = EVT::getIntegerVT(Context, 8);
   auto VecVT = EVT::getVectorVT(Context, MVT::i8, 16, true);
 
   // Should create SPLAT_VECTOR
   SDValue Zero = DAG->getConstant(0, Loc, IntVT);
   SDValue Op = DAG->getNode(ISD::STEP_VECTOR, Loc, VecVT, Zero);
   EXPECT_EQ(Op.getOpcode(), ISD::SPLAT_VECTOR);
 }
 
 } // end namespace llvm

llvm/unittests/CodeGen/AsmPrinterDwarfTest.cpp

protected:
   }
 
   MCSymbol *Val = nullptr;
   MCSymbol *SecBeginSymbol = nullptr;
 };
 
 TEST_F(AsmPrinterEmitDwarfSymbolReferenceTest, COFF) {
   if (!init("x86_64-pc-windows", /*DwarfVersion=*/4, dwarf::DWARF32))
-    return;
+    GTEST_SKIP();
 
   EXPECT_CALL(TestPrinter->getMS(), EmitCOFFSecRel32(Val, 0));
   TestPrinter->getAP()->emitDwarfSymbolReference(Val, false);
 }
 
 TEST_F(AsmPrinterEmitDwarfSymbolReferenceTest, COFFForceOffset) {
   if (!init("x86_64-pc-windows", /*DwarfVersion=*/4, dwarf::DWARF32))
-    return;
+    GTEST_SKIP();
 
   EXPECT_CALL(TestPrinter->getMS(),
               emitAbsoluteSymbolDiff(Val, SecBeginSymbol, 4));
   TestPrinter->getAP()->emitDwarfSymbolReference(Val, true);
 }
 
 TEST_F(AsmPrinterEmitDwarfSymbolReferenceTest, ELFDWARF32) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF32))
-    return;
+    GTEST_SKIP();
 
   const MCExpr *Arg0 = nullptr;
   EXPECT_CALL(TestPrinter->getMS(), emitValueImpl(_, 4, _))
       .WillOnce(SaveArg<0>(&Arg0));
   TestPrinter->getAP()->emitDwarfSymbolReference(Val, false);
 
   const MCSymbolRefExpr *ActualArg0 = dyn_cast_or_null<MCSymbolRefExpr>(Arg0);
   ASSERT_NE(ActualArg0, nullptr);
   EXPECT_EQ(&(ActualArg0->getSymbol()), Val);
 }
 
 TEST_F(AsmPrinterEmitDwarfSymbolReferenceTest, ELFDWARF32ForceOffset) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF32))
-    return;
+    GTEST_SKIP();
 
   EXPECT_CALL(TestPrinter->getMS(),
               emitAbsoluteSymbolDiff(Val, SecBeginSymbol, 4));
   TestPrinter->getAP()->emitDwarfSymbolReference(Val, true);
 }
 
 TEST_F(AsmPrinterEmitDwarfSymbolReferenceTest, ELFDWARF64) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF64))
-    return;
+    GTEST_SKIP();
 
   const MCExpr *Arg0 = nullptr;
   EXPECT_CALL(TestPrinter->getMS(), emitValueImpl(_, 8, _))
       .WillOnce(SaveArg<0>(&Arg0));
   TestPrinter->getAP()->emitDwarfSymbolReference(Val, false);
 
   const MCSymbolRefExpr *ActualArg0 = dyn_cast_or_null<MCSymbolRefExpr>(Arg0);
   ASSERT_NE(ActualArg0, nullptr);
   EXPECT_EQ(&(ActualArg0->getSymbol()), Val);
 }
 
 TEST_F(AsmPrinterEmitDwarfSymbolReferenceTest, ELFDWARF64ForceOffset) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF64))
-    return;
+    GTEST_SKIP();
 
   EXPECT_CALL(TestPrinter->getMS(),
               emitAbsoluteSymbolDiff(Val, SecBeginSymbol, 8));
   TestPrinter->getAP()->emitDwarfSymbolReference(Val, true);
 }
 
 class AsmPrinterEmitDwarfStringOffsetTest : public AsmPrinterFixtureBase {
 protected:
   bool init(const std::string &TripleStr, unsigned DwarfVersion,
             dwarf::DwarfFormat DwarfFormat) {
     if (!AsmPrinterFixtureBase::init(TripleStr, DwarfVersion, DwarfFormat))
       return false;
 
     Val.Index = DwarfStringPoolEntry::NotIndexed;
     Val.Symbol = TestPrinter->getCtx().createTempSymbol();
     Val.Offset = 42;
     return true;
   }
 
   DwarfStringPoolEntry Val;
 };
 
 TEST_F(AsmPrinterEmitDwarfStringOffsetTest, DWARF32) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF32))
-    return;
+    GTEST_SKIP();
 
   const MCExpr *Arg0 = nullptr;
   EXPECT_CALL(TestPrinter->getMS(), emitValueImpl(_, 4, _))
       .WillOnce(SaveArg<0>(&Arg0));
   TestPrinter->getAP()->emitDwarfStringOffset(Val);
 
   const MCSymbolRefExpr *ActualArg0 = dyn_cast_or_null<MCSymbolRefExpr>(Arg0);
   ASSERT_NE(ActualArg0, nullptr);
   EXPECT_EQ(&(ActualArg0->getSymbol()), Val.Symbol);
 }
 
 TEST_F(AsmPrinterEmitDwarfStringOffsetTest,
        DWARF32NoRelocationsAcrossSections) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF32))
-    return;
+    GTEST_SKIP();
 
   TestPrinter->setDwarfUsesRelocationsAcrossSections(false);
   EXPECT_CALL(TestPrinter->getMS(), emitIntValue(Val.Offset, 4));
   TestPrinter->getAP()->emitDwarfStringOffset(Val);
 }
 
 TEST_F(AsmPrinterEmitDwarfStringOffsetTest, DWARF64) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF64))
-    return;
+    GTEST_SKIP();
 
   const MCExpr *Arg0 = nullptr;
   EXPECT_CALL(TestPrinter->getMS(), emitValueImpl(_, 8, _))
       .WillOnce(SaveArg<0>(&Arg0));
   TestPrinter->getAP()->emitDwarfStringOffset(Val);
 
   const MCSymbolRefExpr *ActualArg0 = dyn_cast_or_null<MCSymbolRefExpr>(Arg0);
   ASSERT_NE(ActualArg0, nullptr);
   EXPECT_EQ(&(ActualArg0->getSymbol()), Val.Symbol);
 }
 
 TEST_F(AsmPrinterEmitDwarfStringOffsetTest,
        DWARF64NoRelocationsAcrossSections) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF64))
-    return;
+    GTEST_SKIP();
 
   TestPrinter->setDwarfUsesRelocationsAcrossSections(false);
   EXPECT_CALL(TestPrinter->getMS(), emitIntValue(Val.Offset, 8));
   TestPrinter->getAP()->emitDwarfStringOffset(Val);
 }
 
 class AsmPrinterEmitDwarfOffsetTest : public AsmPrinterFixtureBase {
 protected:
   bool init(const std::string &TripleStr, unsigned DwarfVersion,
             dwarf::DwarfFormat DwarfFormat) {
     if (!AsmPrinterFixtureBase::init(TripleStr, DwarfVersion, DwarfFormat))
       return false;
 
     Label = TestPrinter->getCtx().createTempSymbol();
     return true;
   }
 
   MCSymbol *Label = nullptr;
   uint64_t Offset = 42;
 };
 
 TEST_F(AsmPrinterEmitDwarfOffsetTest, DWARF32) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF32))
-    return;
+    GTEST_SKIP();
 
   const MCExpr *Arg0 = nullptr;
   EXPECT_CALL(TestPrinter->getMS(), emitValueImpl(_, 4, _))
       .WillOnce(SaveArg<0>(&Arg0));
   TestPrinter->getAP()->emitDwarfOffset(Label, Offset);
 
   const MCBinaryExpr *ActualArg0 = dyn_cast_or_null<MCBinaryExpr>(Arg0);
   ASSERT_NE(ActualArg0, nullptr);
   EXPECT_EQ(ActualArg0->getOpcode(), MCBinaryExpr::Add);
 
   const MCSymbolRefExpr *ActualLHS =
       dyn_cast_or_null<MCSymbolRefExpr>(ActualArg0->getLHS());
   ASSERT_NE(ActualLHS, nullptr);
   EXPECT_EQ(&(ActualLHS->getSymbol()), Label);
 
   const MCConstantExpr *ActualRHS =
       dyn_cast_or_null<MCConstantExpr>(ActualArg0->getRHS());
   ASSERT_NE(ActualRHS, nullptr);
   EXPECT_EQ(static_cast<uint64_t>(ActualRHS->getValue()), Offset);
 }
 
 TEST_F(AsmPrinterEmitDwarfOffsetTest, DWARF64) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF64))
-    return;
+    GTEST_SKIP();
 
   const MCExpr *Arg0 = nullptr;
   EXPECT_CALL(TestPrinter->getMS(), emitValueImpl(_, 8, _))
       .WillOnce(SaveArg<0>(&Arg0));
   TestPrinter->getAP()->emitDwarfOffset(Label, Offset);
 
   const MCBinaryExpr *ActualArg0 = dyn_cast_or_null<MCBinaryExpr>(Arg0);
   ASSERT_NE(ActualArg0, nullptr);

 
 class AsmPrinterEmitDwarfLengthOrOffsetTest : public AsmPrinterFixtureBase {
 protected:
   uint64_t Val = 42;
 };
 
 TEST_F(AsmPrinterEmitDwarfLengthOrOffsetTest, DWARF32) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF32))
-    return;
+    GTEST_SKIP();
 
   EXPECT_CALL(TestPrinter->getMS(), emitIntValue(Val, 4));
   TestPrinter->getAP()->emitDwarfLengthOrOffset(Val);
 }
 
 TEST_F(AsmPrinterEmitDwarfLengthOrOffsetTest, DWARF64) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF64))
-    return;
+    GTEST_SKIP();
 
   EXPECT_CALL(TestPrinter->getMS(), emitIntValue(Val, 8));
   TestPrinter->getAP()->emitDwarfLengthOrOffset(Val);
 }
 
 class AsmPrinterGetUnitLengthFieldByteSizeTest : public AsmPrinterFixtureBase {
 };
 
 TEST_F(AsmPrinterGetUnitLengthFieldByteSizeTest, DWARF32) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF32))
-    return;
+    GTEST_SKIP();
 
   EXPECT_EQ(TestPrinter->getAP()->getUnitLengthFieldByteSize(), 4u);
 }
 
 TEST_F(AsmPrinterGetUnitLengthFieldByteSizeTest, DWARF64) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF64))
-    return;
+    GTEST_SKIP();
 
   EXPECT_EQ(TestPrinter->getAP()->getUnitLengthFieldByteSize(), 12u);
 }
 
 class AsmPrinterEmitDwarfUnitLengthAsIntTest : public AsmPrinterFixtureBase {
 protected:
   uint64_t Val = 42;
 };
 
 TEST_F(AsmPrinterEmitDwarfUnitLengthAsIntTest, DWARF32) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF32))
-    return;
+    GTEST_SKIP();
 
   EXPECT_CALL(TestPrinter->getMS(), emitIntValue(Val, 4));
   TestPrinter->getAP()->emitDwarfUnitLength(Val, "");
 }
 
 TEST_F(AsmPrinterEmitDwarfUnitLengthAsIntTest, DWARF64) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF64))
-    return;
+    GTEST_SKIP();
 
   InSequence S;
   EXPECT_CALL(TestPrinter->getMS(), emitIntValue(dwarf::DW_LENGTH_DWARF64, 4));
   EXPECT_CALL(TestPrinter->getMS(), emitIntValue(Val, 8));
 
   TestPrinter->getAP()->emitDwarfUnitLength(Val, "");
 }
 
 class AsmPrinterEmitDwarfUnitLengthAsHiLoDiffTest
     : public AsmPrinterFixtureBase {
 protected:
   bool init(const std::string &TripleStr, unsigned DwarfVersion,
             dwarf::DwarfFormat DwarfFormat) {
     if (!AsmPrinterFixtureBase::init(TripleStr, DwarfVersion, DwarfFormat))
       return false;
 
     return true;
   }
 };
 
 TEST_F(AsmPrinterEmitDwarfUnitLengthAsHiLoDiffTest, DWARF32) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF32))
-    return;
+    GTEST_SKIP();
 
   InSequence S;
   const MCSymbol *Hi = nullptr;
   const MCSymbol *Lo = nullptr;
   EXPECT_CALL(TestPrinter->getMS(), emitAbsoluteSymbolDiff(_, _, 4))
       .WillOnce(DoAll(SaveArg<0>(&Hi), SaveArg<1>(&Lo)));
   MCSymbol *LTmp = nullptr;
   EXPECT_CALL(TestPrinter->getMS(), emitLabel(_, _))
       .WillOnce(SaveArg<0>(&LTmp));
 
   MCSymbol *HTmp = TestPrinter->getAP()->emitDwarfUnitLength("", "");
   EXPECT_NE(Lo, nullptr);
   EXPECT_EQ(Lo, LTmp);
   EXPECT_NE(Hi, nullptr);
   EXPECT_EQ(Hi, HTmp);
 }
 
 TEST_F(AsmPrinterEmitDwarfUnitLengthAsHiLoDiffTest, DWARF64) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF64))
-    return;
+    GTEST_SKIP();
 
   InSequence S;
   const MCSymbol *Hi = nullptr;
   const MCSymbol *Lo = nullptr;
   EXPECT_CALL(TestPrinter->getMS(), emitIntValue(dwarf::DW_LENGTH_DWARF64, 4));
   EXPECT_CALL(TestPrinter->getMS(), emitAbsoluteSymbolDiff(_, _, 8))
       .WillOnce(DoAll(SaveArg<0>(&Hi), SaveArg<1>(&Lo)));
   MCSymbol *LTmp = nullptr;
protected:
   }
 
   int BeginCount = 0;
   int EndCount = 0;
 };
 
 TEST_F(AsmPrinterHandlerTest, Basic) {
   if (!init("x86_64-pc-linux", /*DwarfVersion=*/4, dwarf::DWARF32))
-    return;
+    GTEST_SKIP();
 
   ASSERT_EQ(BeginCount, 3);
   ASSERT_EQ(EndCount, 3);
 }
 
 } // end namespace

llvm/unittests/CodeGen/DIEHashTest.cpp

 
 // Derived from:
 // struct A {
 //   const static float PI = 3.14;
 // };
 // A a;
 TEST_F(DIEHashTest, MemberBlock) {
   if (!this->getAsmPrinter())
-    // TODO: Use GTEST_SKIP() when GTest is updated to version 1.10.0
-    return;
+    GTEST_SKIP();
 
   DIE &A = *DIE::get(Alloc, dwarf::DW_TAG_structure_type);
   DIEInteger One(1);
   DIEString AStr = getString("A");
   A.addValue(Alloc, dwarf::DW_AT_name, dwarf::DW_FORM_strp, AStr);
   A.addValue(Alloc, dwarf::DW_AT_byte_size, dwarf::DW_FORM_data1, One);
   A.addValue(Alloc, dwarf::DW_AT_decl_file, dwarf::DW_FORM_data1, One);
   A.addValue(Alloc, dwarf::DW_AT_decl_line, dwarf::DW_FORM_data1, One);

llvm/unittests/CodeGen/DIETest.cpp

protected:
   void SetUp() override {
     unsigned Version;
     dwarf::DwarfFormat Format;
     std::tie(Version, Format, Form, Size) = GetParam();
     auto ExpectedTestPrinter =
         TestAsmPrinter::create("x86_64-pc-linux", Version, Format);
     ASSERT_THAT_EXPECTED(ExpectedTestPrinter, Succeeded());
     TestPrinter = std::move(ExpectedTestPrinter.get());
+    if (!TestPrinter)
+      GTEST_SKIP();
   }
 
   dwarf::Form Form;
   unsigned Size;
   std::unique_ptr<TestAsmPrinter> TestPrinter;
 };
 
 struct DIEExprFixture : public DIEFixtureBase {
   void SetUp() override {
     DIEFixtureBase::SetUp();
     if (!TestPrinter)
       return;
 
     Val = MCConstantExpr::create(42, TestPrinter->getCtx());
   }
 
   const MCExpr *Val = nullptr;
 };
 
 TEST_P(DIEExprFixture, SizeOf) {
-  if (!TestPrinter)
-    return;
-
   DIEExpr Tst(Val);
   EXPECT_EQ(Size, Tst.SizeOf(TestPrinter->getAP(), Form));
 }
 
 TEST_P(DIEExprFixture, EmitValue) {
-  if (!TestPrinter)
-    return;
-
   DIEExpr Tst(Val);
   EXPECT_CALL(TestPrinter->getMS(), emitValueImpl(Val, Size, _));
   Tst.emitValue(TestPrinter->getAP(), Form);
 }
 
 INSTANTIATE_TEST_SUITE_P(
     DIETestParams, DIEExprFixture,
     testing::Values(
void SetUp() override {
 
     Val = TestPrinter->getCtx().createTempSymbol();
   }
 
   const MCSymbol *Val = nullptr;
 };
 
 TEST_P(DIELabelFixture, SizeOf) {
-  if (!TestPrinter)
-    return;
-
   DIELabel Tst(Val);
   EXPECT_EQ(Size, Tst.SizeOf(TestPrinter->getAP(), Form));
 }
 
 TEST_P(DIELabelFixture, EmitValue) {
-  if (!TestPrinter)
-    return;
-
   DIELabel Tst(Val);
 
   const MCExpr *Arg0 = nullptr;
   EXPECT_CALL(TestPrinter->getMS(), emitValueImpl(_, Size, _))
       .WillOnce(SaveArg<0>(&Arg0));
   Tst.emitValue(TestPrinter->getAP(), Form);
 
   const MCSymbolRefExpr *ActualArg0 = dyn_cast_or_null<MCSymbolRefExpr>(Arg0);
void SetUp() override {
     Lo = TestPrinter->getCtx().createTempSymbol();
   }
 
   const MCSymbol *Hi = nullptr;
   const MCSymbol *Lo = nullptr;
 };
 
 TEST_P(DIEDeltaFixture, SizeOf) {
-  if (!TestPrinter)
-    return;
-
   DIEDelta Tst(Hi, Lo);
   EXPECT_EQ(Size, Tst.SizeOf(TestPrinter->getAP(), Form));
 }
 
 TEST_P(DIEDeltaFixture, EmitValue) {
-  if (!TestPrinter)
-    return;
-
   DIEDelta Tst(Hi, Lo);
   EXPECT_CALL(TestPrinter->getMS(), emitAbsoluteSymbolDiff(Hi, Lo, Size));
   Tst.emitValue(TestPrinter->getAP(), Form);
 }
 
 INSTANTIATE_TEST_SUITE_P(
     DIETestParams, DIEDeltaFixture,
     testing::Values(
         DIETestParams{4, dwarf::DWARF32, dwarf::DW_FORM_data4, 4u},
         DIETestParams{4, dwarf::DWARF32, dwarf::DW_FORM_data8, 8u},
         DIETestParams{4, dwarf::DWARF32, dwarf::DW_FORM_sec_offset, 4u},
         DIETestParams{4, dwarf::DWARF64, dwarf::DW_FORM_data4, 4u},
         DIETestParams{4, dwarf::DWARF64, dwarf::DW_FORM_data8, 8u},
         DIETestParams{4, dwarf::DWARF64, dwarf::DW_FORM_sec_offset, 8u}));
 
 struct DIELocListFixture : public DIEFixtureBase {
   void SetUp() override { DIEFixtureBase::SetUp(); }
 };
 
 TEST_P(DIELocListFixture, SizeOf) {
-  if (!TestPrinter)
-    return;
-
   DIELocList Tst(999);
   EXPECT_EQ(Size, Tst.SizeOf(TestPrinter->getAP(), Form));
 }
 
 INSTANTIATE_TEST_SUITE_P(
     DIETestParams, DIELocListFixture,
     testing::Values(
         DIETestParams{4, dwarf::DWARF32, dwarf::DW_FORM_loclistx, 2u},
         DIETestParams{4, dwarf::DWARF32, dwarf::DW_FORM_data4, 4u},
         DIETestParams{4, dwarf::DWARF32, dwarf::DW_FORM_sec_offset, 4u},
         DIETestParams{4, dwarf::DWARF64, dwarf::DW_FORM_loclistx, 2u},
         DIETestParams{4, dwarf::DWARF64, dwarf::DW_FORM_data8, 8u},
         DIETestParams{4, dwarf::DWARF64, dwarf::DW_FORM_sec_offset, 8u}));
 
 } // end namespace

llvm/unittests/CodeGen/PassManagerTest.cpp

PassManagerTest()
     TargetOptions Options;
     TM.reset(TheTarget->createTargetMachine(TripleName, "", "",
                                             Options, None));
   }
 };
 
 TEST_F(PassManagerTest, Basic) {
   if (!TM)
-    return;
+    GTEST_SKIP();
 
   LLVMTargetMachine *LLVMTM = static_cast<LLVMTargetMachine *>(TM.get());
   M->setDataLayout(TM->createDataLayout());
 
   LoopAnalysisManager LAM;
   FunctionAnalysisManager FAM;
   CGSCCAnalysisManager CGAM;
   ModuleAnalysisManager MAM;

llvm/unittests/CodeGen/SelectionDAGAddressAnalysisTest.cpp

void SetUp() override {
 
     Triple TargetTriple("aarch64--");
     std::string Error;
     const Target *T = TargetRegistry::lookupTarget("", TargetTriple, Error);
     // FIXME: These tests do not depend on AArch64 specifically, but we have to
     // initialize a target. A skeleton Target for unittests would allow us to
     // always run these tests.
     if (!T)
-      return;
+      GTEST_SKIP();
 
     TargetOptions Options;
     TM = std::unique_ptr<LLVMTargetMachine>(static_cast<LLVMTargetMachine *>(
         T->createTargetMachine("AArch64", "", "+sve", Options, None, None,
                                CodeGenOpt::Aggressive)));
     if (!TM)
-      return;
+      GTEST_SKIP();
 
     SMDiagnostic SMError;
     M = parseAssemblyString(Assembly, SMError, Context);
     if (!M)
       report_fatal_error(SMError.getMessage());
     M->setDataLayout(TM->createDataLayout());
 
     F = M->getFunction("f");
protected:
   std::unique_ptr<Module> M;
   Function *F;
   GlobalVariable *G;
   std::unique_ptr<MachineFunction> MF;
   std::unique_ptr<SelectionDAG> DAG;
 };
 
 TEST_F(SelectionDAGAddressAnalysisTest, sameFrameObject) {
-  if (!TM)
-    return;
   SDLoc Loc;
   auto Int8VT = EVT::getIntegerVT(Context, 8);
   auto VecVT = EVT::getVectorVT(Context, Int8VT, 4);
   SDValue FIPtr = DAG->CreateStackTemporary(VecVT);
   int FI = cast<FrameIndexSDNode>(FIPtr.getNode())->getIndex();
   MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(*MF, FI);
   TypeSize Offset = TypeSize::Fixed(0);
   SDValue Value = DAG->getConstant(0, Loc, VecVT);
   SDValue Index = DAG->getMemBasePlusOffset(FIPtr, Offset, Loc);
   SDValue Store = DAG->getStore(DAG->getEntryNode(), Loc, Value, Index,
                                 PtrInfo.getWithOffset(Offset));
   Optional<int64_t> NumBytes = MemoryLocation::getSizeOrUnknown(
       cast<StoreSDNode>(Store)->getMemoryVT().getStoreSize());
 
   bool IsAlias;
   bool IsValid = BaseIndexOffset::computeAliasing(
       Store.getNode(), NumBytes, Store.getNode(), NumBytes, *DAG, IsAlias);
 
   EXPECT_TRUE(IsValid);
   EXPECT_TRUE(IsAlias);
 }
 
 TEST_F(SelectionDAGAddressAnalysisTest, noAliasingFrameObjects) {
-  if (!TM)
-    return;
   SDLoc Loc;
   auto Int8VT = EVT::getIntegerVT(Context, 8);
   // <4 x i8>
   auto VecVT = EVT::getVectorVT(Context, Int8VT, 4);
   // <2 x i8>
   auto SubVecVT = EVT::getVectorVT(Context, Int8VT, 2);
   SDValue FIPtr = DAG->CreateStackTemporary(VecVT);
   int FI = cast<FrameIndexSDNode>(FIPtr.getNode())->getIndex();
TEST_F(SelectionDAGAddressAnalysisTest, noAliasingFrameObjects) {
   bool IsValid = BaseIndexOffset::computeAliasing(
       Store0.getNode(), NumBytes0, Store1.getNode(), NumBytes1, *DAG, IsAlias);
 
   EXPECT_TRUE(IsValid);
   EXPECT_FALSE(IsAlias);
 }
 
 TEST_F(SelectionDAGAddressAnalysisTest, unknownSizeFrameObjects) {
-  if (!TM)
-    return;
   SDLoc Loc;
   auto Int8VT = EVT::getIntegerVT(Context, 8);
   // <vscale x 4 x i8>
   auto VecVT = EVT::getVectorVT(Context, Int8VT, 4, true);
   // <vscale x 2 x i8>
   auto SubVecVT = EVT::getVectorVT(Context, Int8VT, 2, true);
   SDValue FIPtr = DAG->CreateStackTemporary(VecVT);
   int FI = cast<FrameIndexSDNode>(FIPtr.getNode())->getIndex();
TEST_F(SelectionDAGAddressAnalysisTest, unknownSizeFrameObjects) {
   bool IsAlias;
   bool IsValid = BaseIndexOffset::computeAliasing(
       Store0.getNode(), NumBytes0, Store1.getNode(), NumBytes1, *DAG, IsAlias);
 
   EXPECT_FALSE(IsValid);
 }
 
 TEST_F(SelectionDAGAddressAnalysisTest, globalWithFrameObject) {
-  if (!TM)
-    return;
   SDLoc Loc;
   auto Int8VT = EVT::getIntegerVT(Context, 8);
   // <vscale x 4 x i8>
   auto VecVT = EVT::getVectorVT(Context, Int8VT, 4, true);
   SDValue FIPtr = DAG->CreateStackTemporary(VecVT);
   int FI = cast<FrameIndexSDNode>(FIPtr.getNode())->getIndex();
   MachinePointerInfo PtrInfo = MachinePointerInfo::getFixedStack(*MF, FI);
   SDValue Value = DAG->getConstant(0, Loc, VecVT);
TEST_F(SelectionDAGAddressAnalysisTest, globalWithFrameObject) {
   bool IsValid = BaseIndexOffset::computeAliasing(
       Store.getNode(), NumBytes, GStore.getNode(), GNumBytes, *DAG, IsAlias);
 
   EXPECT_TRUE(IsValid);
   EXPECT_FALSE(IsAlias);
 }
 
 TEST_F(SelectionDAGAddressAnalysisTest, fixedSizeFrameObjectsWithinDiff) {
-  if (!TM)
-    return;
   SDLoc Loc;
   auto Int8VT = EVT::getIntegerVT(Context, 8);
   // <vscale x 4 x i8>
   auto VecVT = EVT::getVectorVT(Context, Int8VT, 4, true);
   // <vscale x 2 x i8>
   auto SubVecVT = EVT::getVectorVT(Context, Int8VT, 2, true);
   // <2 x i8>
   auto SubFixedVecVT2xi8 = EVT::getVectorVT(Context, Int8VT, 2);
TEST_F(SelectionDAGAddressAnalysisTest, fixedSizeFrameObjectsWithinDiff) {
 
   IsValid = BaseIndexOffset::computeAliasing(
       Store1.getNode(), NumBytes1, Store0.getNode(), NumBytes0, *DAG, IsAlias);
   EXPECT_TRUE(IsValid);
   EXPECT_FALSE(IsAlias);
 }
 
 TEST_F(SelectionDAGAddressAnalysisTest, fixedSizeFrameObjectsOutOfDiff) {
-  if (!TM)
-    return;
   SDLoc Loc;
   auto Int8VT = EVT::getIntegerVT(Context, 8);
   // <vscale x 4 x i8>
   auto VecVT = EVT::getVectorVT(Context, Int8VT, 4, true);
   // <vscale x 2 x i8>
   auto SubVecVT = EVT::getVectorVT(Context, Int8VT, 2, true);
   // <2 x i8>
   auto SubFixedVecVT2xi8 = EVT::getVectorVT(Context, Int8VT, 2);
TEST_F(SelectionDAGAddressAnalysisTest, fixedSizeFrameObjectsOutOfDiff) {
   bool IsAlias;
   bool IsValid = BaseIndexOffset::computeAliasing(
       Store0.getNode(), NumBytes0, Store1.getNode(), NumBytes1, *DAG, IsAlias);
   EXPECT_TRUE(IsValid);
   EXPECT_TRUE(IsAlias);
 }
 
 TEST_F(SelectionDAGAddressAnalysisTest, twoFixedStackObjects) {
-  if (!TM)
-    return;
   SDLoc Loc;
   auto Int8VT = EVT::getIntegerVT(Context, 8);
   // <vscale x 2 x i8>
   auto VecVT = EVT::getVectorVT(Context, Int8VT, 2, true);
   // <2 x i8>
   auto FixedVecVT = EVT::getVectorVT(Context, Int8VT, 2);
   SDValue FIPtr0 = DAG->CreateStackTemporary(FixedVecVT);
   SDValue FIPtr1 = DAG->CreateStackTemporary(VecVT);

llvm/unittests/CodeGen/TargetOptionsTest.cpp

 }
 
 typedef std::function<void(bool)> TargetOptionsTest;
 
 static void targetOptionsTest(bool EnableIPRA) {
   std::unique_ptr<TargetMachine> TM = createTargetMachine(EnableIPRA);
   // This test is designed for the X86 backend; stop if it is not available.
   if (!TM)
-    return;
+    GTEST_SKIP();
   legacy::PassManager PM;
   LLVMTargetMachine *LLVMTM = static_cast<LLVMTargetMachine *>(TM.get());
 
   TargetPassConfig *TPC = LLVMTM->createPassConfig(PM);
   (void)TPC;
 
   ASSERT_TRUE(TM->Options.EnableIPRA == EnableIPRA);