riscv-v-spec-0.10 page 59
The fourth case of instruction description is added
joker881 on Apr 8 2021, 8:28 AM.Authored by
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I think this is the case that a temp register is provided and the destination isn't v0. The user probably should use case 2 by not providing the temp register. But if they give the temp register should we accept it and match the spec or error for the destination not being v0(what we currently do)?
If the destination is not v0, case 2 is better than case 4. There should be no need to provide the temp register. I think the case 4 is useful when we could not determine vd is v0 or not, but it should not be the case in AsmParser. The registers in MCInst should be physical registers.
What does the GNU assembler do?
Can someone write inline assembly that requires this? If they let the compiler allocate the registers for the inline assembly we would need to support any register.
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