[AArch64] Add instruction costs for FP_TO_UINT and FP_TO_SINT with half types

[david-arm]

Summary

We were missing some instruction costs when converting vectors of
floating point half types into integers. This patch adds more costs
to the table in getCastInstrCost and updates an existing test:

Analysis/CostModel/AArch64/sve-fptoi.ll

[david-arm]

• After private discussions with @sdesmalen we realised that some of these costs were wrong, so I went back and manually generated assembly for all cases and chose costs according to the number of instructions needed.

[david-arm]

llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp

622

After private discussion with @sdesmalen it turns out we shouldn't need entries for illegal -> illegal types as they will both be split in the BasicTTIImpl::getCastInstrCost function.

[david-arm]

• Removed costs for illegal -> illegal type conversions.

[CarolineConcatto]

Hey @david-arm,
Just a comment, it is me or this table is not well suited to review?
It lists the types by their cost. It should have put together instruction/types instead of instruction/cost.
I see some types/sizes missing like nxv8i32 ->nxv8f32 and nxv4i64 -> nxv4f64, but I guess they are not legal types, or I could miss it, as this table does not help me to find the types.
Is that correct?

llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp

671

So much better to check if all types are covered when it is like this.

[david-arm]

• Tried to tidy up the table a bit more to group all the from type entries together.

[sdesmalen]

LGTM!

[CarolineConcatto]

Thank you @david-arm.
I like the way you put the table together now.
It is easier to check the types now/

llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp

ConversionTbl[] = {
     { ISD::FP_TO_UINT, MVT::v2i8,  MVT::v2f32, 1 },
 
     // Complex, from v4f32: legal type is v4i16, 1 narrowing => ~2
     { ISD::FP_TO_SINT, MVT::v4i16, MVT::v4f32, 2 },
     { ISD::FP_TO_SINT, MVT::v4i8,  MVT::v4f32, 2 },
     { ISD::FP_TO_UINT, MVT::v4i16, MVT::v4f32, 2 },
     { ISD::FP_TO_UINT, MVT::v4i8,  MVT::v4f32, 2 },
 
-    // Lowering scalable
+    // Complex, from nxv2f32.
+    { ISD::FP_TO_SINT, MVT::nxv2i64, MVT::nxv2f32, 1 },
     { ISD::FP_TO_SINT, MVT::nxv2i32, MVT::nxv2f32, 1 },
-    { ISD::FP_TO_SINT, MVT::nxv4i32, MVT::nxv4f32, 1 },
-    { ISD::FP_TO_SINT, MVT::nxv2i64, MVT::nxv2f64, 1 },
-    { ISD::FP_TO_UINT, MVT::nxv2i32, MVT::nxv2f32, 1 },
-    { ISD::FP_TO_UINT, MVT::nxv4i32, MVT::nxv4f32, 1 },
-    { ISD::FP_TO_UINT, MVT::nxv2i64, MVT::nxv2f64, 1 },
-
-
-    // Complex, from nxv2f32 legal type is nxv2i32 (no cost) or nxv2i64 (1 ext)
-    { ISD::FP_TO_SINT, MVT::nxv2i64, MVT::nxv2f32, 2 },
     { ISD::FP_TO_SINT, MVT::nxv2i16, MVT::nxv2f32, 1 },
     { ISD::FP_TO_SINT, MVT::nxv2i8,  MVT::nxv2f32, 1 },
-    { ISD::FP_TO_UINT, MVT::nxv2i64, MVT::nxv2f32, 2 },
+    { ISD::FP_TO_UINT, MVT::nxv2i64, MVT::nxv2f32, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv2i32, MVT::nxv2f32, 1 },
     { ISD::FP_TO_UINT, MVT::nxv2i16, MVT::nxv2f32, 1 },
     { ISD::FP_TO_UINT, MVT::nxv2i8,  MVT::nxv2f32, 1 },
 
     // Complex, from v2f64: legal type is v2i32, 1 narrowing => ~2.
     { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 },
     { ISD::FP_TO_SINT, MVT::v2i16, MVT::v2f64, 2 },
     { ISD::FP_TO_SINT, MVT::v2i8,  MVT::v2f64, 2 },
     { ISD::FP_TO_UINT, MVT::v2i32, MVT::v2f64, 2 },
     { ISD::FP_TO_UINT, MVT::v2i16, MVT::v2f64, 2 },
     { ISD::FP_TO_UINT, MVT::v2i8,  MVT::v2f64, 2 },
 
-    // Complex, from nxv2f64: legal type is nxv2i32, 1 narrowing => ~2.
-    { ISD::FP_TO_SINT, MVT::nxv2i32, MVT::nxv2f64, 2 },
-    { ISD::FP_TO_SINT, MVT::nxv2i16, MVT::nxv2f64, 2 },
-    { ISD::FP_TO_SINT, MVT::nxv2i8,  MVT::nxv2f64, 2 },
-    { ISD::FP_TO_UINT, MVT::nxv2i32, MVT::nxv2f64, 2 },
-    { ISD::FP_TO_UINT, MVT::nxv2i16, MVT::nxv2f64, 2 },
-    { ISD::FP_TO_UINT, MVT::nxv2i8,  MVT::nxv2f64, 2 },
-
-    // Complex, from nxv4f32 legal type is nxv4i16, 1 narrowing => ~2
-    { ISD::FP_TO_SINT, MVT::nxv4i16, MVT::nxv4f32, 2 },
-    { ISD::FP_TO_SINT, MVT::nxv4i8,  MVT::nxv4f32, 2 },
-    { ISD::FP_TO_UINT, MVT::nxv4i16, MVT::nxv4f32, 2 },
-    { ISD::FP_TO_UINT, MVT::nxv4i8,  MVT::nxv4f32, 2 },
-
-    // Complex, from nxv8f64: legal type is nxv8i32, 1 narrowing => ~2.
-    { ISD::FP_TO_SINT, MVT::nxv8i32, MVT::nxv8f64, 2 },
-    { ISD::FP_TO_SINT, MVT::nxv8i16, MVT::nxv8f64, 2 },
-    { ISD::FP_TO_SINT, MVT::nxv8i8,  MVT::nxv8f64, 2 },
-    { ISD::FP_TO_UINT, MVT::nxv8i32, MVT::nxv8f64, 2 },
-    { ISD::FP_TO_UINT, MVT::nxv8i16, MVT::nxv8f64, 2 },
-    { ISD::FP_TO_UINT, MVT::nxv8i8,  MVT::nxv8f64, 2 },
-
-    // Complex, from nxv4f64: legal type is nxv4i32, 1 narrowing => ~2.
-    { ISD::FP_TO_SINT, MVT::nxv4i32, MVT::nxv4f64, 2 },
-    { ISD::FP_TO_SINT, MVT::nxv4i16, MVT::nxv4f64, 2 },
-    { ISD::FP_TO_SINT, MVT::nxv4i8,  MVT::nxv4f64, 2 },
-    { ISD::FP_TO_UINT, MVT::nxv4i32, MVT::nxv4f64, 2 },
-    { ISD::FP_TO_UINT, MVT::nxv4i16, MVT::nxv4f64, 2 },
-    { ISD::FP_TO_UINT, MVT::nxv4i8,  MVT::nxv4f64, 2 },
+    // Complex, from nxv2f64.
+    { ISD::FP_TO_SINT, MVT::nxv2i64, MVT::nxv2f64, 1 },
+    { ISD::FP_TO_SINT, MVT::nxv2i32, MVT::nxv2f64, 1 },
+    { ISD::FP_TO_SINT, MVT::nxv2i16, MVT::nxv2f64, 1 },
+    { ISD::FP_TO_SINT, MVT::nxv2i8,  MVT::nxv2f64, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv2i64, MVT::nxv2f64, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv2i32, MVT::nxv2f64, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv2i16, MVT::nxv2f64, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv2i8,  MVT::nxv2f64, 1 },
+
+    // Complex, from nxv4f32.
+    { ISD::FP_TO_SINT, MVT::nxv4i64, MVT::nxv4f32, 4 },
+    { ISD::FP_TO_SINT, MVT::nxv4i32, MVT::nxv4f32, 1 },
+    { ISD::FP_TO_SINT, MVT::nxv4i16, MVT::nxv4f32, 1 },
+    { ISD::FP_TO_SINT, MVT::nxv4i8,  MVT::nxv4f32, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv4i64, MVT::nxv4f32, 4 },
+    { ISD::FP_TO_UINT, MVT::nxv4i32, MVT::nxv4f32, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv4i16, MVT::nxv4f32, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv4i8,  MVT::nxv4f32, 1 },
+
+    // Complex, from nxv8f64. Illegal -> illegal conversions not required.
+    { ISD::FP_TO_SINT, MVT::nxv8i16, MVT::nxv8f64, 7 },
+    { ISD::FP_TO_SINT, MVT::nxv8i8,  MVT::nxv8f64, 7 },
+    { ISD::FP_TO_UINT, MVT::nxv8i16, MVT::nxv8f64, 7 },
+    { ISD::FP_TO_UINT, MVT::nxv8i8,  MVT::nxv8f64, 7 },
+
+    // Complex, from nxv4f64. Illegal -> illegal conversions not required.
+    { ISD::FP_TO_SINT, MVT::nxv4i32, MVT::nxv4f64, 3 },
+    { ISD::FP_TO_SINT, MVT::nxv4i16, MVT::nxv4f64, 3 },
+    { ISD::FP_TO_SINT, MVT::nxv4i8,  MVT::nxv4f64, 3 },
+    { ISD::FP_TO_UINT, MVT::nxv4i32, MVT::nxv4f64, 3 },
+    { ISD::FP_TO_UINT, MVT::nxv4i16, MVT::nxv4f64, 3 },
+    { ISD::FP_TO_UINT, MVT::nxv4i8,  MVT::nxv4f64, 3 },
 
-    // Complex, from nxv8f32: legal type is nxv8i32 (no cost) or nxv8i64 (1 ext).
-    { ISD::FP_TO_SINT, MVT::nxv8i64, MVT::nxv8f32, 2 },
+    // Complex, from nxv8f32. Illegal -> illegal conversions not required.
     { ISD::FP_TO_SINT, MVT::nxv8i16, MVT::nxv8f32, 3 },
-    { ISD::FP_TO_SINT, MVT::nxv8i8,  MVT::nxv8f32, 1 },
-    { ISD::FP_TO_UINT, MVT::nxv8i64, MVT::nxv8f32, 2 },
-    { ISD::FP_TO_UINT, MVT::nxv8i16, MVT::nxv8f32, 1 },
-    { ISD::FP_TO_UINT, MVT::nxv8i8,  MVT::nxv8f32, 1 },
+    { ISD::FP_TO_SINT, MVT::nxv8i8,  MVT::nxv8f32, 3 },
+    { ISD::FP_TO_UINT, MVT::nxv8i16, MVT::nxv8f32, 3 },
+    { ISD::FP_TO_UINT, MVT::nxv8i8,  MVT::nxv8f32, 3 },
+
+    // Complex, from nxv8f16.
+    { ISD::FP_TO_SINT, MVT::nxv8i64, MVT::nxv8f16, 10 },
+    { ISD::FP_TO_SINT, MVT::nxv8i32, MVT::nxv8f16, 4 },
+    { ISD::FP_TO_SINT, MVT::nxv8i16, MVT::nxv8f16, 1 },
+    { ISD::FP_TO_SINT, MVT::nxv8i8,  MVT::nxv8f16, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv8i64, MVT::nxv8f16, 10 },
+    { ISD::FP_TO_UINT, MVT::nxv8i32, MVT::nxv8f16, 4 },
+    { ISD::FP_TO_UINT, MVT::nxv8i16, MVT::nxv8f16, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv8i8,  MVT::nxv8f16, 1 },
+
+    // Complex, from nxv4f16.
+    { ISD::FP_TO_SINT, MVT::nxv4i64, MVT::nxv4f16, 4 },
+    { ISD::FP_TO_SINT, MVT::nxv4i32, MVT::nxv4f16, 1 },
+    { ISD::FP_TO_SINT, MVT::nxv4i16, MVT::nxv4f16, 1 },
+    { ISD::FP_TO_SINT, MVT::nxv4i8,  MVT::nxv4f16, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv4i64, MVT::nxv4f16, 4 },
+    { ISD::FP_TO_UINT, MVT::nxv4i32, MVT::nxv4f16, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv4i16, MVT::nxv4f16, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv4i8,  MVT::nxv4f16, 1 },
+
+    // Complex, from nxv2f16.
+    { ISD::FP_TO_SINT, MVT::nxv2i64, MVT::nxv2f16, 1 },
+    { ISD::FP_TO_SINT, MVT::nxv2i32, MVT::nxv2f16, 1 },
+    { ISD::FP_TO_SINT, MVT::nxv2i16, MVT::nxv2f16, 1 },
+    { ISD::FP_TO_SINT, MVT::nxv2i8,  MVT::nxv2f16, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv2i64, MVT::nxv2f16, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv2i32, MVT::nxv2f16, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv2i16, MVT::nxv2f16, 1 },
+    { ISD::FP_TO_UINT, MVT::nxv2i8,  MVT::nxv2f16, 1 },
 
     // Truncate from nxvmf32 to nxvmf16.
     { ISD::FP_ROUND, MVT::nxv2f16, MVT::nxv2f32, 1 },
     { ISD::FP_ROUND, MVT::nxv4f16, MVT::nxv4f32, 1 },
     { ISD::FP_ROUND, MVT::nxv8f16, MVT::nxv8f32, 3 },
 
     // Truncate from nxvmf64 to nxvmf16.
     { ISD::FP_ROUND, MVT::nxv2f16, MVT::nxv2f64, 1 },

llvm/test/Analysis/CostModel/AArch64/sve-fptoi.ll

 ; RUN: opt -cost-model -analyze -mtriple aarch64-linux-gnu -mattr=+sve -o - -S < %s | FileCheck %s
 
 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
 target triple = "aarch64-unknown-linux-gnu"
 
 define void @sve-fptoi() {
-  ;CHECK-LABEL: 'sve-fptoi'
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f32_to_si8 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i8>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f32_to_ui8 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i8>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f32_to_si32 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i32>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f32_to_ui32 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i32>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv2f32_to_si64 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i64>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv2f32_to_ui64 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i64>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv2f64_to_si8 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i8>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv2f64_to_ui8 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i8>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv2f64_to_si32 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i32>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv2f64_to_ui32 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i32>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f64_to_si64 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i64>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f64_to_ui64 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i64>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv4f32_to_si8 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i8>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv4f32_to_ui8 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i8>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv4f32_to_si32 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i32>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv4f32_to_ui32 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i32>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction:   %nv4f32_to_si64 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i64>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 5 for instruction:   %nv4f32_to_ui64 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i64>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv4f64_to_si8 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i8>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv4f64_to_ui8 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i8>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv4f64_to_si32 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i32>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv4f64_to_ui32 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i32>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv4f64_to_si64 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i64>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv4f64_to_ui64 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i64>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv8f32_to_si8 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i8>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv8f32_to_ui8 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i8>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv8f32_to_si32 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i32>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv8f32_to_ui32 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i32>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv8f32_to_si64 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i64>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv8f32_to_ui64 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i64>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv8f64_to_si8 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i8>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv8f64_to_ui8 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i8>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv8f64_to_si32 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i32>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 2 for instruction:   %nv8f64_to_ui32 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i32>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction:   %nv8f64_to_si64 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i64>
-  ;CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction:   %nv8f64_to_ui64 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i64>
+; CHECK-LABEL: 'sve-fptoi'
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f16_to_si8 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f16_to_ui8 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f16_to_si32 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i32>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f16_to_ui32 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i32>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f16_to_si64 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i64>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f16_to_ui64 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i64>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f32_to_si8 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f32_to_ui8 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f32_to_si16 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i16>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f32_to_ui16 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i16>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f32_to_si64 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i64>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f32_to_ui64 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i64>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f64_to_si8 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f64_to_ui8 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f64_to_si16 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i16>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f64_to_ui16 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i16>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f64_to_si32 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i32>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv2f64_to_ui32 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i32>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv4f16_to_si8 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv4f16_to_ui8 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv4f16_to_si32 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i32>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv4f16_to_ui32 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i32>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction:   %nv4f16_to_si64 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i64>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction:   %nv4f16_to_ui64 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i64>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv4f32_to_si8 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv4f32_to_ui8 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv4f32_to_si16 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i16>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv4f32_to_ui16 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i16>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction:   %nv4f32_to_si64 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i64>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction:   %nv4f32_to_ui64 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i64>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction:   %nv4f64_to_si8 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction:   %nv4f64_to_ui8 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction:   %nv4f64_to_si16 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i16>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction:   %nv4f64_to_ui16 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i16>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction:   %nv4f64_to_si32 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i32>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction:   %nv4f64_to_ui32 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i32>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv8f16_to_si8 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction:   %nv8f16_to_ui8 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction:   %nv8f16_to_si32 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i32>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 4 for instruction:   %nv8f16_to_ui32 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i32>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 10 for instruction:   %nv8f16_to_si64 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i64>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 10 for instruction:   %nv8f16_to_ui64 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i64>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction:   %nv8f32_to_si8 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction:   %nv8f32_to_ui8 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction:   %nv8f32_to_si16 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i16>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 3 for instruction:   %nv8f32_to_ui16 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i16>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction:   %nv8f32_to_si64 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i64>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 8 for instruction:   %nv8f32_to_ui64 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i64>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 7 for instruction:   %nv8f64_to_si8 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 7 for instruction:   %nv8f64_to_ui8 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i8>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 7 for instruction:   %nv8f64_to_si16 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i16>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 7 for instruction:   %nv8f64_to_ui16 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i16>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction:   %nv8f64_to_si32 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i32>
+; CHECK-NEXT: Cost Model: Found an estimated cost of 6 for instruction:   %nv8f64_to_ui32 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i32>
+
+  %nv2f16_to_si8  = fptosi <vscale x 2 x half> undef to <vscale x 2 x i8>
+  %nv2f16_to_ui8  = fptoui <vscale x 2 x half> undef to <vscale x 2 x i8>
+  %nv2f16_to_si32 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i32>
+  %nv2f16_to_ui32 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i32>
+  %nv2f16_to_si64 = fptosi <vscale x 2 x half> undef to <vscale x 2 x i64>
+  %nv2f16_to_ui64 = fptoui <vscale x 2 x half> undef to <vscale x 2 x i64>
 
   %nv2f32_to_si8  = fptosi <vscale x 2 x float> undef to <vscale x 2 x i8>
   %nv2f32_to_ui8  = fptoui <vscale x 2 x float> undef to <vscale x 2 x i8>
-  %nv2f32_to_si32 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i32>
-  %nv2f32_to_ui32 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i32>
+  %nv2f32_to_si16 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i16>
+  %nv2f32_to_ui16 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i16>
   %nv2f32_to_si64 = fptosi <vscale x 2 x float> undef to <vscale x 2 x i64>
   %nv2f32_to_ui64 = fptoui <vscale x 2 x float> undef to <vscale x 2 x i64>
 
   %nv2f64_to_si8  = fptosi <vscale x 2 x double> undef to <vscale x 2 x i8>
   %nv2f64_to_ui8  = fptoui <vscale x 2 x double> undef to <vscale x 2 x i8>
+  %nv2f64_to_si16 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i16>
+  %nv2f64_to_ui16 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i16>
   %nv2f64_to_si32 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i32>
   %nv2f64_to_ui32 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i32>
-  %nv2f64_to_si64 = fptosi <vscale x 2 x double> undef to <vscale x 2 x i64>
-  %nv2f64_to_ui64 = fptoui <vscale x 2 x double> undef to <vscale x 2 x i64>
+
+  %nv4f16_to_si8  = fptosi <vscale x 4 x half> undef to <vscale x 4 x i8>
+  %nv4f16_to_ui8  = fptoui <vscale x 4 x half> undef to <vscale x 4 x i8>
+  %nv4f16_to_si32 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i32>
+  %nv4f16_to_ui32 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i32>
+  %nv4f16_to_si64 = fptosi <vscale x 4 x half> undef to <vscale x 4 x i64>
+  %nv4f16_to_ui64 = fptoui <vscale x 4 x half> undef to <vscale x 4 x i64>
 
   %nv4f32_to_si8  = fptosi <vscale x 4 x float> undef to <vscale x 4 x i8>
   %nv4f32_to_ui8  = fptoui <vscale x 4 x float> undef to <vscale x 4 x i8>
-  %nv4f32_to_si32 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i32>
-  %nv4f32_to_ui32 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i32>
+  %nv4f32_to_si16 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i16>
+  %nv4f32_to_ui16 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i16>
   %nv4f32_to_si64 = fptosi <vscale x 4 x float> undef to <vscale x 4 x i64>
   %nv4f32_to_ui64 = fptoui <vscale x 4 x float> undef to <vscale x 4 x i64>
 
   %nv4f64_to_si8  = fptosi <vscale x 4 x double> undef to <vscale x 4 x i8>
   %nv4f64_to_ui8  = fptoui <vscale x 4 x double> undef to <vscale x 4 x i8>
+  %nv4f64_to_si16 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i16>
+  %nv4f64_to_ui16 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i16>
   %nv4f64_to_si32 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i32>
   %nv4f64_to_ui32 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i32>
-  %nv4f64_to_si64 = fptosi <vscale x 4 x double> undef to <vscale x 4 x i64>
-  %nv4f64_to_ui64 = fptoui <vscale x 4 x double> undef to <vscale x 4 x i64>
+
+  %nv8f16_to_si8  = fptosi <vscale x 8 x half> undef to <vscale x 8 x i8>
+  %nv8f16_to_ui8  = fptoui <vscale x 8 x half> undef to <vscale x 8 x i8>
+  %nv8f16_to_si32 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i32>
+  %nv8f16_to_ui32 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i32>
+  %nv8f16_to_si64 = fptosi <vscale x 8 x half> undef to <vscale x 8 x i64>
+  %nv8f16_to_ui64 = fptoui <vscale x 8 x half> undef to <vscale x 8 x i64>
 
   %nv8f32_to_si8  = fptosi <vscale x 8 x float> undef to <vscale x 8 x i8>
   %nv8f32_to_ui8  = fptoui <vscale x 8 x float> undef to <vscale x 8 x i8>
-  %nv8f32_to_si32 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i32>
-  %nv8f32_to_ui32 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i32>
+  %nv8f32_to_si16 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i16>
+  %nv8f32_to_ui16 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i16>
   %nv8f32_to_si64 = fptosi <vscale x 8 x float> undef to <vscale x 8 x i64>
   %nv8f32_to_ui64 = fptoui <vscale x 8 x float> undef to <vscale x 8 x i64>
 
   %nv8f64_to_si8  = fptosi <vscale x 8 x double> undef to <vscale x 8 x i8>
   %nv8f64_to_ui8  = fptoui <vscale x 8 x double> undef to <vscale x 8 x i8>
+  %nv8f64_to_si16 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i16>
+  %nv8f64_to_ui16 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i16>
   %nv8f64_to_si32 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i32>
   %nv8f64_to_ui32 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i32>
-  %nv8f64_to_si64 = fptosi <vscale x 8 x double> undef to <vscale x 8 x i64>
-  %nv8f64_to_ui64 = fptoui <vscale x 8 x double> undef to <vscale x 8 x i64>
 
   ret void
 }