[SCEV] Improve modelling for pointer constants

[lebedev.ri]

Summary

This is a continuation of D89456.

As it was suggested there, now that SCEV models PtrToInt,
we can try to improve SCEV's pointer handling.
In particular, i believe, i will need this in the future
to further fix SCEVAddExproperation type handling.

This removes special handling of ConstantPointerNull
from ScalarEvolution::createSCEV(), and add constant folding
into ScalarEvolution::getPtrToIntExpr().
This way, null constants stay as such in SCEV's.

[Meinersbur]

I cannot see the mentioned null constant handling? Is it because removing the ConstantPointerNull condition it falls back to the generic case that now does handle null constants?

llvm/lib/Analysis/ScalarEvolution.cpp

1076

[typo] an ptr2int

IIUC, this is to reduce ptr2int(int2ptr(x)) -> x?

polly/test/Isl/CodeGen/partial_write_impossible_restriction.ll

9–10

Does it crash or a CHECK-line not match?

polly/test/ScopInfo/constant_functions_outside_scop_as_unknown.ll

9 ↗

(On Diff #328883)

Weird. A constant doesn't need to be parametrized.

polly/test/ScopInfo/memset_null.ll

16–22 ↗

(On Diff #328883)

Mmmh, the test description says that the memset should not be modeled (I think it should have optimistically assumed that it is never executed)

[lebedev.ri]

Thank you for taking a look!

In D98147#2610104, @Meinersbur wrote:

I cannot see the mentioned null constant handling?
Is it because removing the ConstantPointerNull condition it falls back to the generic case that now does handle null constants?

Null constant handling consists of not diffusing ConstantPointerNull into an integer zero, but keeping it as a pointer-typed SCEVUnknown.

Sorry, i have no clue about polly, i have never looked at it's code.

polly/test/Isl/CodeGen/partial_write_impossible_restriction.ll

9–10

FAIL: Polly :: Isl/CodeGen/partial_write_impossible_restriction.ll (1 of 1)
******************** TEST 'Polly :: Isl/CodeGen/partial_write_impossible_restriction.ll' FAILED ********************
Script:
--
: 'RUN: at line 1';   opt  -polly-process-unprofitable  -polly-remarks-minimal  -polly-use-llvm-names  -polly-import-jscop-dir=/repositories/llvm-project/polly/test/Isl/CodeGen  -polly-codegen-verify  -polly-stmt-granularity=bb -polly-import-jscop -polly-import-jscop-postfix=transformed -polly-codegen -S < /repositories/llvm-project/polly/test/Isl/CodeGen/partial_write_impossible_restriction.ll | FileCheck /repositories/llvm-project/polly/test/Isl/CodeGen/partial_write_impossible_restriction.ll
--
Exit Code: 2

Command Output (stderr):
--
Reading JScop '%for.body344---%if.then.i.i1141.loopexit' in function 'partial_write_impossible_restriction' from '/repositories/llvm-project/polly/test/Isl/CodeGen/partial_write_impossible_restriction___%for.body344---%if.then.i.i1141.loopexit.jscop.transformed'.
No match for array 'MemRef2' in JScop.
LLVM ERROR: Tried to import a malformed jscop file.
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace.

[Meinersbur]

This is my draft suggestion for changes required in Polly for this change. The main problem is that isZero() does not recognize a SCEVUnknown-wrapped ConstantNullExpr.

diff --git a/polly/lib/Analysis/ScopBuilder.cpp b/polly/lib/Analysis/ScopBuilder.cpp
index 4def17102925..d7cafb18e633 100644
--- a/polly/lib/Analysis/ScopBuilder.cpp
+++ b/polly/lib/Analysis/ScopBuilder.cpp
@@ -1760,6 +1760,10 @@ bool ScopBuilder::buildAccessMemIntrinsic(MemAccInst Inst, ScopStmt *Stmt) {
   //       as we know it would be undefined to execute this instruction anyway.
   if (DestAccFunc->isZero())
     return true;
+  if (auto *X = dyn_cast<SCEVUnknown>(DestAccFunc)) {
+    if (isa<ConstantPointerNull>(X->getValue()))
+      return true;
+  }

   auto *DestPtrSCEV = dyn_cast<SCEVUnknown>(SE.getPointerBase(DestAccFunc));
   assert(DestPtrSCEV);
@@ -1836,6 +1840,10 @@ bool ScopBuilder::buildAccessCallInst(MemAccInst Inst, ScopStmt *Stmt) {
       auto *ArgSCEV = SE.getSCEVAtScope(Arg, L);
       if (ArgSCEV->isZero())
         continue;
+      if (auto *X = dyn_cast<SCEVUnknown>(ArgSCEV)) {
+        if (isa<ConstantPointerNull>(X->getValue()))
+          return true;
+      }

       auto *ArgBasePtr = cast<SCEVUnknown>(SE.getPointerBase(ArgSCEV));
       addArrayAccess(Stmt, Inst, AccType, ArgBasePtr->getValue(),
diff --git a/polly/lib/Support/SCEVAffinator.cpp b/polly/lib/Support/SCEVAffinator.cpp
index 9d2e7d9a6fcb..1691b2aa242b 100644
--- a/polly/lib/Support/SCEVAffinator.cpp
+++ b/polly/lib/Support/SCEVAffinator.cpp
@@ -551,8 +551,15 @@ PWACtx SCEVAffinator::visitUnknown(const SCEVUnknown *Expr) {
     }
   }

-  llvm_unreachable(
-      "Unknowns SCEV was neither parameter nor a valid instruction.");
+  if (isa<ConstantPointerNull>(Expr->getValue())) {
+    isl::val v{Ctx, 0};
+    isl::space Space{Ctx, 0, NumIterators};
+    isl::local_space ls{Space};
+    return getPWACtxFromPWA(isl::aff(ls, v));
+  }
+
+  llvm_unreachable("Unknowns SCEV was neither a parameter, a constant nor a "
+                   "valid instruction.");
 }

 PWACtx SCEVAffinator::complexityBailout() {
diff --git a/polly/lib/Support/SCEVValidator.cpp b/polly/lib/Support/SCEVValidator.cpp
index 94b55167a9b4..0e0ec7358571 100644
--- a/polly/lib/Support/SCEVValidator.cpp
+++ b/polly/lib/Support/SCEVValidator.cpp
@@ -461,6 +461,11 @@ public:
       }
     }

+    if (Expr->getType()->isPointerTy()) {
+      if (isa<ConstantPointerNull>(V))
+        return ValidatorResult(SCEVType::INT); // "int"
+    }
+
     return ValidatorResult(SCEVType::PARAM, Expr);
   }
 };
diff --git a/polly/test/Isl/CodeGen/partial_write_impossible_restriction.ll b/polly/test/Isl/CodeGen/partial_write_impossible_restriction.ll
index e4c2ce20b82b..3b17518a3ef4 100644
--- a/polly/test/Isl/CodeGen/partial_write_impossible_restriction.ll
+++ b/polly/test/Isl/CodeGen/partial_write_impossible_restriction.ll
@@ -7,7 +7,7 @@
 ;
 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"

-define void @partial_write_impossible_restriction() {
+define void @partial_write_impossible_restriction(i32* %.pn) {
 entry:
   br i1 undef, label %invoke.cont258, label %cond.true.i.i.i.i1007

@@ -15,7 +15,6 @@ cond.true.i.i.i.i1007:
   br label %invoke.cont258

 invoke.cont258:
-  %.pn = phi i32* [ null, %cond.true.i.i.i.i1007 ], [ null, %entry ]
   br label %invoke.cont274

 invoke.cont274:                                   ; preds = %invoke.cont258
@@ -49,11 +48,11 @@ if.then.i.i1141.loopexit:                         ; preds = %cond.end


 ; CHECK-LABEL: polly.stmt.cond.false:
-; CHECK:         %polly.access..pn2 = getelementptr i32, i32* %.pn, i64 %polly.indvar
-; CHECK:         store i32 %cond.in.sroa.speculate.load.cond.false_p_scalar_, i32* %polly.access..pn2, align 4, !alias.scope !0, !noalias !2
+; CHECK:         %polly.access..pn{{[0-9]*}} = getelementptr i32, i32* %.pn, i64 %polly.indvar
+; CHECK:         store i32 %cond.in.sroa.speculate.load.cond.false_p_scalar_, i32* %polly.access..pn{{[0-9]*}}, align 4, !alias.scope !0, !noalias !2
 ; CHECK:         br label %polly.merge

-; CHECK-LABEL: polly.stmt.cond.false11:
-; CHECK:         %polly.access..pn14 = getelementptr i32, i32* %.pn, i64 0
-; CHECK:         store i32 %cond.in.sroa.speculate.load.cond.false_p_scalar_13, i32* %polly.access..pn14, align 4, !alias.scope !0, !noalias !2
-; CHECK:         br label %polly.stmt.cond.end15
+; CHECK-LABEL: polly.stmt.cond.false{{[0-9]*}}:
+; CHECK:         %polly.access..pn{{[0-9]*}} = getelementptr i32, i32* %.pn, i64 0
+; CHECK:         store i32 %cond.in.sroa.speculate.load.cond.false_p_scalar_{{[0-9]*}}, i32* %polly.access..pn{{[0-9]*}}, align 4, !alias.scope !0, !noalias !2
+; CHECK:         br label %polly.stmt.cond.end{{[0-9]*}}
diff --git a/polly/test/Isl/CodeGen/scev_looking_through_bitcasts.ll b/polly/test/Isl/CodeGen/scev_looking_through_bitcasts.ll
index 1012e23cd3a2..ea7a9b7976dc 100644
--- a/polly/test/Isl/CodeGen/scev_looking_through_bitcasts.ll
+++ b/polly/test/Isl/CodeGen/scev_looking_through_bitcasts.ll
@@ -31,7 +31,8 @@ bitmap_element_allocate.exit:
 }


-; CHECK:       polly.stmt.cond.end73.i:
-; CHECK-NEXT:   %0 = bitcast %structty** %b.s2a to i8**
-; CHECK-NEXT:   store i8* undef, i8** %0
+; CHECK:      polly.stmt.cond.end73.i:
+; CHECK-NEXT:   %scevgep = getelementptr i8, i8* null, i64 %a
+; CHECK-NEXT:   %scevgep1 = bitcast i8* %scevgep to %structty*
+; CHECK-NEXT:   store %structty* %scevgep1, %structty** %b.s2a, align 8
 ; CHECK-NEXT:   br label %polly.exiting

[lebedev.ri]

In D98147#2611563, @Meinersbur wrote:

This is my draft suggestion for changes required in Polly for this change. The main problem is that isZero() does not recognize a SCEVUnknown-wrapped ConstantNullExpr.

<...>

@Meinersbur Thank you! Applied.

[Meinersbur]

llvm/lib/Analysis/ScalarEvolution.cpp

1076

typo is still there

A GlobalValuewould but such a constant, but why handle it differently than a local value?

polly/lib/Analysis/ScopBuilder.cpp

1764

I used X to make a quick patch, maybe you can find a better name.

[lebedev.ri]

llvm/lib/Analysis/ScalarEvolution.cpp

1076

Because if we allow ConstantExpr::getPtrToInt() to return ptrtoint constant expression,
getSCEV() will immediately ask createSCEV() to model it as a SCEV expression,
which will result in calling ScalarEvolution::getPtrToIntExpr(),
which will then ask ConstantExpr::getPtrToInt(), which will then return ptrtoint constant expression,
getSCEV() will immediately ask createSCEV() to model it as a SCEV expression,
which will result in calling ScalarEvolution::getPtrToIntExpr(),
which will then ask ConstantExpr::getPtrToInt(), which will then return ptrtoint constant expression,
getSCEV() will immediately ask createSCEV() to model it as a SCEV expression,
which will result in calling ScalarEvolution::getPtrToIntExpr(),
which will then ask ConstantExpr::getPtrToInt(), which will then return ptrtoint constant expression,
getSCEV() will immediately ask createSCEV() to model it as a SCEV expression,
which will result in calling ScalarEvolution::getPtrToIntExpr(),
which will then ask ConstantExpr::getPtrToInt(), which will then return ptrtoint constant expression,
getSCEV() will immediately ask createSCEV() to model it as a SCEV expression,
which will result in calling ScalarEvolution::getPtrToIntExpr(),

[xbolva00]

llvm/test/Transforms/LoopVectorize/X86/cost-model-assert.ll

19

Maybe adjust testcase?

llvm/test/Transforms/LoopVectorize/pointer-induction.ll

15–17

Worse

[lebedev.ri]

llvm/lib/Analysis/ScalarEvolution.cpp

1076

Edit:

IIUC, this is to reduce ptr2int(int2ptr(x)) -> x?

Hm, that's funny. I thought i replied to that question yesterday, but the inline comment is gone.bold text

A GlobalValuewould but such a constant, but why handle it differently than a local value?

Mainly we want this so that if we call ScalarEvolution::getPtrToIntExpr()
on a SCEVUnknown that is ConstantPointerNull, we don't end up with a
SCEVPtrToIntCast of an SCEVUnknown of a ConstantPointerNull,
but with a nice SCEVConstant with a value of 0.

[lebedev.ri]

llvm/test/Transforms/LoopVectorize/pointer-induction.ll

15–17

Yep, and that actually highlights the general class of issues that i want to deal with,
this patch is a preparatory cleanup before that.

[Meinersbur]

llvm/lib/Analysis/ScalarEvolution.cpp

1076

Mainly we want this so that if we call ScalarEvolution::getPtrToIntExpr() on a SCEVUnknown that is ConstantPointerNull [...]

Why not test if (auto *PC = dyn_cast<ConstantPointerNull>(U->getValue())) specifically?

[lebedev.ri]

llvm/lib/Analysis/ScalarEvolution.cpp

1076

That would be conservatively correct for sure, yes.
But i'm just not sure as to why should we make such a restriction?

[Meinersbur]

llvm/lib/Analysis/ScalarEvolution.cpp

1076

Because does not match what the code intends to do and leaves room for bugs caused by unintentionally broaden what it should apply to. Looking at the code I was wondering how it would constant fold a GlobalValue, but apparently with OnlyIfReduced=true it returns nullptr in such cases (is it guaranteed to? What does is "ptrtoint(g + 0)" return?). If it would fold to something still involving a ptrtoint expression, it would go into the endless recursion.

Please also update the comment that the intention is (only) normalize a ptrtoint(NULL) to a 0 constant and that it relies on ConstantExpr::getPtrToInt to never return a ptr2int expression itself, before I LGTM this patch.

[Meinersbur]

llvm/lib/Analysis/ScalarEvolution.cpp

1075–1080

Alternatively, I suggest we point-out that SCEV canonicalization is deferred to LLVM's ConstantFold and check that it really has been removed.

[lebedev.ri]

@mkazantsev @efriedma any thoughts here? Does this look sane on it's own.

@Meinersbur after thinking about it, regardless of whether or not we should have that constant folding,
it is probably best to minimize this patch, and "only" move null handling from createSCEV()
into getPtrToIntExpr(), without adding more general pointer constant handling.

polly/lib/Analysis/ScopBuilder.cpp

1764

Let's go with Unknown, not sure if better?

[Meinersbur]

LGTM, thank you.

polly/lib/Analysis/ScopBuilder.cpp

1764

Find with me.

[morehouse]

This change appears to have broken the UBSan bot: https://lab.llvm.org/buildbot/#/builders/85/builds/3062/steps/7/logs/stdio

clang++: /b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm-project/llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp:5169: llvm::BasicBlock::iterator {anonymous}::LSRInstance::AdjustInsertPositionForExpand(llvm::BasicBlock::iterator, const {anonymous}::LSRFixup&, const {anonymous}::LSRUse&, llvm::SCEVExpander&) const: Assertion `!isa<PHINode>(LowestIP) && !LowestIP->isEHPad() && !isa<DbgInfoIntrinsic>(LowestIP) && "Insertion point must be a normal instruction"' failed.
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace, preprocessed source, and associated run script.
Stack dump:
0.	Program arguments: /b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang++ -DNDEBUG -D_GNU_SOURCE -D_LIBCPP_BUILDING_LIBRARY -D_LIBCPP_DISABLE_NEW_DELETE_DEFINITIONS -D_LIBCPP_HAS_NO_PRAGMA_SYSTEM_HEADER -D_LIBCPP_LINK_PTHREAD_LIB -D_LIBCPP_LINK_RT_LIB -D__STDC_CONSTANT_MACROS -D__STDC_FORMAT_MACROS -D__STDC_LIMIT_MACROS -Iprojects/libcxx/src -I/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm-project/libcxx/src -Iinclude -I/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm-project/llvm/include -Iprojects/libcxx/include/c++build -fPIC -fvisibility-inlines-hidden -Werror=date-time -Werror=unguarded-availability-new -Wall -Wextra -Wno-unused-parameter -Wwrite-strings -Wcast-qual -Wmissing-field-initializers -Wno-long-long -Wimplicit-fallthrough -Wcovered-switch-default -Wno-noexcept-type -Wnon-virtual-dtor -Wdelete-non-virtual-dtor -Wsuggest-override -Wstring-conversion -fno-omit-frame-pointer -gline-tables-only -fsanitize=undefined -fno-sanitize=vptr,function -fno-sanitize-recover=all -fsanitize-blacklist=/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm-project/llvm/utils/sanitizers/ubsan_blacklist.txt -fdiagnostics-color -ffunction-sections -fdata-sections -O3 -DLIBCXX_BUILDING_LIBCXXABI -UNDEBUG -faligned-allocation -nostdinc++ -fvisibility-inlines-hidden -fvisibility=hidden -Wall -Wextra -W -Wwrite-strings -Wno-unused-parameter -Wno-long-long -Werror=return-type -Wextra-semi -Wno-user-defined-literals -Wno-covered-switch-default -Wno-suggest-override -Wno-ignored-attributes -Wno-error -I /b/sanitizer-x86_64-linux-bootstrap-ubsan/build/libcxx_build_ubsan/include/c++/v1 -include /b/sanitizer-x86_64-linux-bootstrap-ubsan/build/libcxx_build_ubsan/projects/libcxx/__config_site -std=c++2a -MD -MT projects/libcxx/src/CMakeFiles/cxx_static.dir/ios.instantiations.cpp.o -MF projects/libcxx/src/CMakeFiles/cxx_static.dir/ios.instantiations.cpp.o.d -o projects/libcxx/src/CMakeFiles/cxx_static.dir/ios.instantiations.cpp.o -c /b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm-project/libcxx/src/ios.instantiations.cpp
1.	<eof> parser at end of file
2.	Code generation
3.	Running pass 'Function Pass Manager' on module '/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm-project/libcxx/src/ios.instantiations.cpp'.
4.	Running pass 'Loop Pass Manager' on function '@_ZNSt3__113basic_istreamIcNS_11char_traitsIcEEE7getlineEPclc'
5.	Running pass 'Loop Strength Reduction' on basic block '%invoke.cont'
 #0 0x000055e49af53b8c llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x33bcb8c)
 #1 0x000055e49af518c4 llvm::sys::RunSignalHandlers() (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x33ba8c4)
 #2 0x000055e49af51b3b llvm::sys::CleanupOnSignal(unsigned long) (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x33bab3b)
 #3 0x000055e49aeb4e98 CrashRecoverySignalHandler(int) CrashRecoveryContext.cpp:0:0
 #4 0x00007fb68097e730 __restore_rt (/lib/x86_64-linux-gnu/libpthread.so.0+0x12730)
 #5 0x00007fb6802647bb raise (/lib/x86_64-linux-gnu/libc.so.6+0x377bb)
 #6 0x00007fb68024f535 abort (/lib/x86_64-linux-gnu/libc.so.6+0x22535)
 #7 0x00007fb68024f40f (/lib/x86_64-linux-gnu/libc.so.6+0x2240f)
 #8 0x00007fb68025d102 (/lib/x86_64-linux-gnu/libc.so.6+0x30102)
 #9 0x000055e49ad467ff (anonymous namespace)::LSRInstance::Expand((anonymous namespace)::LSRUse const&, (anonymous namespace)::LSRFixup const&, (anonymous namespace)::Formula const&, llvm::ilist_iterator<llvm::ilist_detail::node_options<llvm::Instruction, true, false, void>, false, false>, llvm::SCEVExpander&, llvm::SmallVectorImpl<llvm::WeakTrackingVH>&) const LoopStrengthReduce.cpp:0:0
#10 0x000055e49ad52b02 (anonymous namespace)::LSRInstance::ImplementSolution(llvm::SmallVectorImpl<(anonymous namespace)::Formula const*> const&) LoopStrengthReduce.cpp:0:0
#11 0x000055e49ad581c1 (anonymous namespace)::LSRInstance::LSRInstance(llvm::Loop*, llvm::IVUsers&, llvm::ScalarEvolution&, llvm::DominatorTree&, llvm::LoopInfo&, llvm::TargetTransformInfo const&, llvm::AssumptionCache&, llvm::TargetLibraryInfo&, llvm::MemorySSAUpdater*) LoopStrengthReduce.cpp:0:0
#12 0x000055e49ad5a81e ReduceLoopStrength(llvm::Loop*, llvm::IVUsers&, llvm::ScalarEvolution&, llvm::DominatorTree&, llvm::LoopInfo&, llvm::TargetTransformInfo const&, llvm::AssumptionCache&, llvm::TargetLibraryInfo&, llvm::MemorySSA*) LoopStrengthReduce.cpp:0:0
#13 0x000055e49ad5d33a (anonymous namespace)::LoopStrengthReduce::runOnLoop(llvm::Loop*, llvm::LPPassManager&) LoopStrengthReduce.cpp:0:0
#14 0x000055e49a03b123 llvm::LPPassManager::runOnFunction(llvm::Function&) (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x24a4123)
#15 0x000055e49a7412bc llvm::FPPassManager::runOnFunction(llvm::Function&) (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x2baa2bc)
#16 0x000055e49a741de9 llvm::FPPassManager::runOnModule(llvm::Module&) (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x2baade9)
#17 0x000055e49a740c11 llvm::legacy::PassManagerImpl::run(llvm::Module&) (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x2ba9c11)
#18 0x000055e49b207e57 (anonymous namespace)::EmitAssemblyHelper::EmitAssemblyWithNewPassManager(clang::BackendAction, std::unique_ptr<llvm::raw_pwrite_stream, std::default_delete<llvm::raw_pwrite_stream> >) BackendUtil.cpp:0:0
#19 0x000055e49b20b075 clang::EmitBackendOutput(clang::DiagnosticsEngine&, clang::HeaderSearchOptions const&, clang::CodeGenOptions const&, clang::TargetOptions const&, clang::LangOptions const&, llvm::DataLayout const&, llvm::Module*, clang::BackendAction, std::unique_ptr<llvm::raw_pwrite_stream, std::default_delete<llvm::raw_pwrite_stream> >) (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x3674075)
#20 0x000055e49be46e53 clang::BackendConsumer::HandleTranslationUnit(clang::ASTContext&) crtstuff.c:0:0
#21 0x000055e49c959709 clang::ParseAST(clang::Sema&, bool, bool) (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x4dc2709)
#22 0x000055e49be45c88 clang::CodeGenAction::ExecuteAction() (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x42aec88)
#23 0x000055e49b7f0701 clang::FrontendAction::Execute() (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x3c59701)
#24 0x000055e49b78f921 clang::CompilerInstance::ExecuteAction(clang::FrontendAction&) (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x3bf8921)
#25 0x000055e49b8b4ac0 clang::ExecuteCompilerInvocation(clang::CompilerInstance*) (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x3d1dac0)
#26 0x000055e498bedae2 cc1_main(llvm::ArrayRef<char const*>, char const*, void*) (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x1056ae2)
#27 0x000055e498bea0e7 ExecuteCC1Tool(llvm::SmallVectorImpl<char const*>&) driver.cpp:0:0
#28 0x000055e49b647055 void llvm::function_ref<void ()>::callback_fn<clang::driver::CC1Command::Execute(llvm::ArrayRef<llvm::Optional<llvm::StringRef> >, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >*, bool*) const::'lambda'()>(long) Job.cpp:0:0
#29 0x000055e49aeb5002 llvm::CrashRecoveryContext::RunSafely(llvm::function_ref<void ()>) (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x331e002)
#30 0x000055e49b64838c clang::driver::CC1Command::Execute(llvm::ArrayRef<llvm::Optional<llvm::StringRef> >, std::__cxx11::basic_string<char, std::char_traits<char>, std::allocator<char> >*, bool*) const (.part.185) Job.cpp:0:0
#31 0x000055e49b621486 clang::driver::Compilation::ExecuteCommand(clang::driver::Command const&, clang::driver::Command const*&) const (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x3a8a486)
#32 0x000055e49b621f47 clang::driver::Compilation::ExecuteJobs(clang::driver::JobList const&, llvm::SmallVectorImpl<std::pair<int, clang::driver::Command const*> >&) const (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x3a8af47)
#33 0x000055e49b62a401 clang::driver::Driver::ExecuteCompilation(clang::driver::Compilation&, llvm::SmallVectorImpl<std::pair<int, clang::driver::Command const*> >&) (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x3a93401)
#34 0x000055e498b1b589 main (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0xf84589)
#35 0x00007fb68025109b __libc_start_main (/lib/x86_64-linux-gnu/libc.so.6+0x2409b)
#36 0x000055e498be9bba _start (/b/sanitizer-x86_64-linux-bootstrap-ubsan/build/llvm_build0/bin/clang+++0x1052bba)

Please take a look.

[lebedev.ri]

In D98147#2623549, @morehouse wrote:

This change appears to have broken the UBSan bot: https://lab.llvm.org/buildbot/#/builders/85/builds/3062/steps/7/logs/stdio

<...>

Please take a look.

Looking..
It would be very good for bots to actually provide reproducers that were already automatically produced.

llvm/lib/Analysis/ScalarEvolution.cpp

const SCEV *ScalarEvolution::getPtrToIntExpr(const SCEV *Op, Type *Ty,
 
   void *IP = nullptr;
 
   // Is there already an expression for such a cast?
   if (const SCEV *S = UniqueSCEVs.FindNodeOrInsertPos(ID, IP))
     return getTruncateOrZeroExtend(S, Ty);
 
   // If not, is this expression something we can't reduce any further?
-  if (isa<SCEVUnknown>(Op)) {
-    // Create an explicit cast node.
-    // We can reuse the existing insert position since if we get here,
-    // we won't have made any changes which would invalidate it.
+  if (auto *U = dyn_cast<SCEVUnknown>(Op)) {
     Type *IntPtrTy = getDataLayout().getIntPtrType(Op->getType());
     assert(getDataLayout().getTypeSizeInBits(getEffectiveSCEVType(
                Op->getType())) == getDataLayout().getTypeSizeInBits(IntPtrTy) &&
            "We can only model ptrtoint if SCEV's effective (integer) type is "
            "sufficiently wide to represent all possible pointer values.");
+
+    // Perform some basic constant folding. If the operand of the ptr2int cast
+    // is a null pointer, don't create a ptr2int SCEV expression (that will be
+    // left as-is), but produce a zero constant.
+    // NOTE: We could handle a more general case, but lack motivational cases.
+    if (isa<ConstantPointerNull>(U->getValue()))
+      return getZero(Ty);
+
+    // Create an explicit cast node.
+    // We can reuse the existing insert position since if we get here,
+    // we won't have made any changes which would invalidate it.
     SCEV *S = new (SCEVAllocator)
         SCEVPtrToIntExpr(ID.Intern(SCEVAllocator), Op, IntPtrTy);
     UniqueSCEVs.InsertNode(S, IP);
     addToLoopUseLists(S);
     return getTruncateOrZeroExtend(S, Ty);
   }
 
   assert(Depth == 0 &&
if (Instruction *I = dyn_cast<Instruction>(V)) {
     // Don't attempt to analyze instructions in blocks that aren't
     // reachable. Such instructions don't matter, and they aren't required
     // to obey basic rules for definitions dominating uses which this
     // analysis depends on.
     if (!DT.isReachableFromEntry(I->getParent()))
       return getUnknown(UndefValue::get(V->getType()));
   } else if (ConstantInt *CI = dyn_cast<ConstantInt>(V))
     return getConstant(CI);
-  else if (isa<ConstantPointerNull>(V))
-    // FIXME: we shouldn't special-case null pointer constant.
-    return getZero(V->getType());
   else if (GlobalAlias *GA = dyn_cast<GlobalAlias>(V))
     return GA->isInterposable() ? getUnknown(V) : getSCEV(GA->getAliasee());
   else if (!isa<ConstantExpr>(V))
     return getUnknown(V);
 
   Operator *U = cast<Operator>(V);
   if (auto BO = MatchBinaryOp(U, DT)) {
     switch (BO->Opcode) {
if (isSCEVable(U->getType()) && isSCEVable(U->getOperand(0)->getType()))
       return getSCEV(U->getOperand(0));
     break;
 
   case Instruction::PtrToInt: {
     // Pointer to integer cast is straight-forward, so do model it.
     Value *Ptr = U->getOperand(0);
     const SCEV *Op = getSCEV(Ptr);
     Type *DstIntTy = U->getType();
-    // SCEV doesn't have constant pointer expression type, but it supports
-    // nullptr constant (and only that one), which is modelled in SCEV as a
-    // zero integer constant. So just skip the ptrtoint cast for constants.
-    if (isa<SCEVConstant>(Op))
-      return getTruncateOrZeroExtend(Op, DstIntTy);
     Type *PtrTy = Ptr->getType();
     Type *IntPtrTy = getDataLayout().getIntPtrType(PtrTy);
     // But only if effective SCEV (integer) type is wide enough to represent
     // all possible pointer values.
     if (getDataLayout().getTypeSizeInBits(getEffectiveSCEVType(PtrTy)) !=
         getDataLayout().getTypeSizeInBits(IntPtrTy))
       return getUnknown(V);
     return getPtrToIntExpr(Op, DstIntTy);

llvm/test/Analysis/ScalarEvolution/load.ll

 ; CHECK-NEXT:    --> (4 + %n.01)<nuw> U: [4,0) S: [4,0) Exits: (4 + @node1)<nuw><nsw> LoopDispositions: { %for.body: Variant }
 ; CHECK-NEXT:    %0 = load i32, i32* %i, align 4
 ; CHECK-NEXT:    --> %0 U: full-set S: full-set Exits: 0 LoopDispositions: { %for.body: Variant }
 ; CHECK-NEXT:    %add = add nsw i32 %0, %sum.02
 ; CHECK-NEXT:    --> (%0 + %sum.02) U: full-set S: full-set Exits: 10 LoopDispositions: { %for.body: Variant }
 ; CHECK-NEXT:    %next = getelementptr inbounds %struct.ListNode, %struct.ListNode* %n.01, i64 0, i32 0
 ; CHECK-NEXT:    --> %n.01 U: full-set S: full-set Exits: @node1 LoopDispositions: { %for.body: Variant }
 ; CHECK-NEXT:    %1 = load %struct.ListNode*, %struct.ListNode** %next, align 8
-; CHECK-NEXT:    --> %1 U: full-set S: full-set Exits: 0 LoopDispositions: { %for.body: Variant }
+; CHECK-NEXT:    --> %1 U: full-set S: full-set Exits: null LoopDispositions: { %for.body: Variant }
 ; CHECK-NEXT:  Determining loop execution counts for: @test2
 ; CHECK-NEXT:  Loop %for.body: backedge-taken count is 4
 ; CHECK-NEXT:  Loop %for.body: max backedge-taken count is 4
 ; CHECK-NEXT:  Loop %for.body: Predicated backedge-taken count is 4
 ; CHECK-NEXT:   Predicates:
 ; CHECK:       Loop %for.body: Trip multiple is 5
 ;
 entry:

llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll

 exit:
   ret void
 }
 
 define void @crash(i8* %ptr) {
 ; CHECK-LABEL: 'crash'
 ; CHECK-NEXT:  Classifying expressions for: @crash
 ; CHECK-NEXT:    %text.addr.5 = phi i8* [ %incdec.ptr112, %while.cond111 ], [ null, %while.body ]
-; CHECK-NEXT:    --> {0,+,-1}<nw><%while.cond111> U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %while.cond111: Computable, %while.body: Variant }
+; CHECK-NEXT:    --> {null,+,-1}<nw><%while.cond111> U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %while.cond111: Computable, %while.body: Variant }
 ; CHECK-NEXT:    %incdec.ptr112 = getelementptr inbounds i8, i8* %text.addr.5, i64 -1
-; CHECK-NEXT:    --> {-1,+,-1}<nw><%while.cond111> U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %while.cond111: Computable, %while.body: Variant }
+; CHECK-NEXT:    --> {(-1 + null)<nuw><nsw>,+,-1}<nw><%while.cond111> U: full-set S: full-set Exits: <<Unknown>> LoopDispositions: { %while.cond111: Computable, %while.body: Variant }
 ; CHECK-NEXT:    %lastout.2271 = phi i8* [ %incdec.ptr126, %while.body125 ], [ %ptr, %while.end117 ]
-; CHECK-NEXT:    --> {%ptr,+,1}<nuw><%while.body125> U: full-set S: full-set Exits: {-2,+,-1}<nw><%while.cond111> LoopDispositions: { %while.body125: Computable }
+; CHECK-NEXT:    --> {%ptr,+,1}<nuw><%while.body125> U: full-set S: full-set Exits: {(-2 + null)<nuw><nsw>,+,-1}<nw><%while.cond111> LoopDispositions: { %while.body125: Computable }
 ; CHECK-NEXT:    %incdec.ptr126 = getelementptr inbounds i8, i8* %lastout.2271, i64 1
-; CHECK-NEXT:    --> {(1 + %ptr)<nuw>,+,1}<nuw><%while.body125> U: [1,0) S: [1,0) Exits: {-1,+,-1}<nw><%while.cond111> LoopDispositions: { %while.body125: Computable }
+; CHECK-NEXT:    --> {(1 + %ptr)<nuw>,+,1}<nuw><%while.body125> U: [1,0) S: [1,0) Exits: {(-1 + null)<nuw><nsw>,+,-1}<nw><%while.cond111> LoopDispositions: { %while.body125: Computable }
 ; CHECK-NEXT:  Determining loop execution counts for: @crash
-; CHECK-NEXT:  Loop %while.body125: backedge-taken count is {(-2 + (-1 * %ptr)),+,-1}<nw><%while.cond111>
+; CHECK-NEXT:  Loop %while.body125: backedge-taken count is {(-2 + (-1 * %ptr) + null),+,-1}<nw><%while.cond111>
 ; CHECK-NEXT:  Loop %while.body125: max backedge-taken count is -1
-; CHECK-NEXT:  Loop %while.body125: Predicated backedge-taken count is {(-2 + (-1 * %ptr)),+,-1}<nw><%while.cond111>
+; CHECK-NEXT:  Loop %while.body125: Predicated backedge-taken count is {(-2 + (-1 * %ptr) + null),+,-1}<nw><%while.cond111>
 ; CHECK-NEXT:   Predicates:
 ; CHECK:       Loop %while.body125: Trip multiple is 1
 ; CHECK-NEXT:  Loop %while.cond111: Unpredictable backedge-taken count.
 ; CHECK-NEXT:  Loop %while.cond111: Unpredictable max backedge-taken count.
 ; CHECK-NEXT:  Loop %while.cond111: Unpredictable predicated backedge-taken count.
 ; CHECK-NEXT:  Loop %while.body: Unpredictable backedge-taken count.
 ; CHECK-NEXT:  Loop %while.body: Unpredictable max backedge-taken count.
 ; CHECK-NEXT:  Loop %while.body: Unpredictable predicated backedge-taken count.

llvm/test/Analysis/ScalarEvolution/scalable-vector.ll

 ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
 ; RUN: opt -scalar-evolution -analyze -enable-new-pm=0 < %s | FileCheck %s
 ; RUN: opt "-passes=print<scalar-evolution>" -disable-output < %s 2>&1 | FileCheck %s
 
 define void @a(<vscale x 1 x i64> *%p) {
 ; CHECK-LABEL: 'a'
 ; CHECK-NEXT:  Classifying expressions for: @a
 ; CHECK-NEXT:    %1 = getelementptr <vscale x 4 x i32>, <vscale x 4 x i32>* null, i32 3
-; CHECK-NEXT:    --> (3 * sizeof(<vscale x 4 x i32>)) U: [0,-15) S: [-9223372036854775808,9223372036854775793)
+; CHECK-NEXT:    --> ((3 * sizeof(<vscale x 4 x i32>)) + null) U: [0,-15) S: [-9223372036854775808,9223372036854775793)
 ; CHECK-NEXT:    %2 = getelementptr <vscale x 1 x i64>, <vscale x 1 x i64>* %p, i32 1
 ; CHECK-NEXT:    --> (sizeof(<vscale x 1 x i64>) + %p) U: full-set S: full-set
 ; CHECK-NEXT:  Determining loop execution counts for: @a
 ;
   getelementptr <vscale x 4 x i32>, <vscale x 4 x i32> *null, i32 3
   getelementptr <vscale x 1 x i64>, <vscale x 1 x i64> *%p, i32 1
   ret void
 }

llvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll

define amdgpu_gs void @_amdgpu_gs_main(i32 inreg %primShaderTableAddrLow, <31 x i32> inreg %userData) {
   ; CHECK:   [[BUFFER_LOAD_FORMAT_X_IDXEN16:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_FORMAT_X_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM16]], 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from custom "BufferResource", align 1, addrspace 4)
   ; CHECK:   [[BUFFER_LOAD_DWORD_OFFSET1:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFSET [[S_LOAD_DWORDX4_IMM1]], 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from custom "BufferResource", align 1, addrspace 4)
   ; CHECK:   [[S_LSHL_B32_6:%[0-9]+]]:sreg_32 = S_LSHL_B32 [[COPY2]], 3, implicit-def dead $scc
   ; CHECK:   [[BUFFER_LOAD_DWORD_OFFSET2:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFSET [[S_LOAD_DWORDX4_IMM17]], 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from custom "BufferResource", align 1, addrspace 4)
   ; CHECK:   [[S_ASHR_I32_6:%[0-9]+]]:sreg_32_xm0 = S_ASHR_I32 [[S_LSHL_B32_6]], 31, implicit-def dead $scc
   ; CHECK:   [[S_ADD_I32_15:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_BUFFER_LOAD_DWORD_IMM4]], -467, implicit-def dead $scc
   ; CHECK:   undef %453.sub0:sreg_64 = S_ADD_U32 [[S_ADD_U32_4]], [[S_LSHL_B32_6]], implicit-def $scc
   ; CHECK:   %453.sub1:sreg_64 = S_ADDC_U32 [[S_ADDC_U32_4]], [[S_ASHR_I32_6]], implicit-def dead $scc, implicit $scc
-  ; CHECK:   %71.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM %453, 0, 0, 0 :: (load 8 from %ir.304, addrspace 4)
+  ; CHECK:   %71.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM %453, 0, 0, 0 :: (load 8 from %ir.308, addrspace 4)
   ; CHECK:   [[BUFFER_LOAD_DWORD_OFFSET3:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_DWORD_OFFSET [[S_LOAD_DWORDX4_IMM18]], 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from custom "BufferResource", align 1, addrspace 4)
   ; CHECK:   [[S_LOAD_DWORDX4_IMM19:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM %327, 0, 0, 0 :: (load 16 from %ir.223, addrspace 4)
   ; CHECK:   [[S_LOAD_DWORDX4_IMM20:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM %335, 0, 0, 0 :: (load 16 from %ir.230, addrspace 4)
   ; CHECK:   [[S_LOAD_DWORDX4_IMM21:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM %343, 0, 0, 0 :: (load 16 from %ir.236, addrspace 4)
   ; CHECK:   [[S_LOAD_DWORDX4_IMM22:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM %351, 0, 0, 0 :: (load 16 from %ir.242, addrspace 4)
   ; CHECK:   %71.sub1:sgpr_128 = S_AND_B32 %71.sub1, [[S_MOV_B32_]], implicit-def dead $scc
   ; CHECK:   [[S_BUFFER_LOAD_DWORD_IMM5:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_IMM %71, 0, 0, 0 :: (dereferenceable invariant load 4)
   ; CHECK:   [[BUFFER_LOAD_FORMAT_X_IDXEN17:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_FORMAT_X_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM19]], 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from custom "BufferResource", align 1, addrspace 4)
   ; CHECK:   [[BUFFER_LOAD_FORMAT_X_IDXEN18:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_FORMAT_X_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM20]], 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from custom "BufferResource", align 1, addrspace 4)
   ; CHECK:   [[BUFFER_LOAD_FORMAT_X_IDXEN19:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_FORMAT_X_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM21]], 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from custom "BufferResource", align 1, addrspace 4)
   ; CHECK:   [[S_LSHL_B32_7:%[0-9]+]]:sreg_32 = S_LSHL_B32 [[COPY1]], 3, implicit-def dead $scc
   ; CHECK:   [[BUFFER_LOAD_FORMAT_X_IDXEN20:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_FORMAT_X_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM22]], 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from custom "BufferResource", align 1, addrspace 4)
   ; CHECK:   [[S_ASHR_I32_7:%[0-9]+]]:sreg_32_xm0 = S_ASHR_I32 [[S_LSHL_B32_7]], 31, implicit-def dead $scc
   ; CHECK:   [[S_ADD_I32_16:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_BUFFER_LOAD_DWORD_IMM5]], -468, implicit-def dead $scc
   ; CHECK:   undef %468.sub0:sreg_64 = S_ADD_U32 [[S_ADD_U32_4]], [[S_LSHL_B32_7]], implicit-def $scc
   ; CHECK:   %468.sub1:sreg_64 = S_ADDC_U32 [[S_ADDC_U32_4]], [[S_ASHR_I32_7]], implicit-def dead $scc, implicit $scc
-  ; CHECK:   %71.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM %468, 0, 0, 0 :: (load 8 from %ir.316, addrspace 4)
+  ; CHECK:   %71.sub0_sub1:sgpr_128 = S_LOAD_DWORDX2_IMM %468, 0, 0, 0 :: (load 8 from %ir.320, addrspace 4)
   ; CHECK:   %71.sub1:sgpr_128 = S_AND_B32 %71.sub1, [[S_MOV_B32_]], implicit-def dead $scc
   ; CHECK:   [[S_BUFFER_LOAD_DWORD_IMM6:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_IMM %71, 0, 0, 0 :: (dereferenceable invariant load 4)
-  ; CHECK:   [[S_LOAD_DWORDX4_IMM23:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM %411, 0, 0, 0 :: (load 16 from %ir.278, addrspace 4)
+  ; CHECK:   [[S_LOAD_DWORDX4_IMM23:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM %411, 0, 0, 0 :: (load 16 from %ir.282, addrspace 4)
   ; CHECK:   [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM undef %488:sreg_64, 0, 0, 0 :: (load 4 from `i32 addrspace(4)* undef`, addrspace 4)
   ; CHECK:   KILL %411.sub0, %411.sub1
   ; CHECK:   KILL undef %488:sreg_64
   ; CHECK:   KILL %71.sub0_sub1
   ; CHECK:   [[S_LSHL_B32_8:%[0-9]+]]:sreg_32 = S_LSHL_B32 [[COPY11]], 3, implicit-def dead $scc
-  ; CHECK:   [[S_LOAD_DWORDX4_IMM24:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM %425, 0, 0, 0 :: (load 16 from %ir.287, addrspace 4)
+  ; CHECK:   [[S_LOAD_DWORDX4_IMM24:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM %425, 0, 0, 0 :: (load 16 from %ir.291, addrspace 4)
   ; CHECK:   [[S_ASHR_I32_8:%[0-9]+]]:sreg_32_xm0 = S_ASHR_I32 [[S_LSHL_B32_8]], 31, implicit-def dead $scc
   ; CHECK:   [[S_ADD_I32_17:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_BUFFER_LOAD_DWORD_IMM6]], -469, implicit-def dead $scc
   ; CHECK:   undef %485.sub0:sreg_64 = S_ADD_U32 [[S_ADD_U32_4]], [[S_LSHL_B32_8]], implicit-def $scc
   ; CHECK:   %485.sub1:sreg_64 = S_ADDC_U32 [[S_ADDC_U32_4]], [[S_ASHR_I32_8]], implicit-def dead $scc, implicit $scc
   ; CHECK:   %71.sub0:sgpr_128 = S_LOAD_DWORD_IMM %485, 0, 0, 0 :: (load 4 from %ir..i0100.i, align 8, addrspace 4)
   ; CHECK:   [[BUFFER_LOAD_FORMAT_X_IDXEN21:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_FORMAT_X_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM23]], 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from custom "BufferResource", align 1, addrspace 4)
   ; CHECK:   [[BUFFER_LOAD_FORMAT_X_IDXEN22:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_FORMAT_X_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM24]], 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from custom "BufferResource", align 1, addrspace 4)
   ; CHECK:   KILL [[S_LOAD_DWORDX4_IMM24]]
   ; CHECK:   KILL [[S_LOAD_DWORDX4_IMM23]]
   ; CHECK:   %71.sub1:sgpr_128 = S_AND_B32 [[S_LOAD_DWORD_IMM]], [[S_MOV_B32_]], implicit-def dead $scc
   ; CHECK:   [[S_BUFFER_LOAD_DWORD_IMM7:%[0-9]+]]:sreg_32_xm0_xexec = S_BUFFER_LOAD_DWORD_IMM %71, 0, 0, 0 :: (dereferenceable invariant load 4)
   ; CHECK:   [[S_ADD_I32_18:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_BUFFER_LOAD_DWORD_IMM]], -474, implicit-def dead $scc
   ; CHECK:   [[S_ADD_I32_19:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_BUFFER_LOAD_DWORD_SGPR3]], -475, implicit-def dead $scc
   ; CHECK:   [[S_ADD_I32_20:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_BUFFER_LOAD_DWORD_SGPR3]], -491, implicit-def dead $scc
   ; CHECK:   [[S_ADD_I32_21:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_BUFFER_LOAD_DWORD_SGPR3]], -507, implicit-def dead $scc
   ; CHECK:   [[S_ADD_I32_22:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_BUFFER_LOAD_DWORD_SGPR3]], -539, implicit-def dead $scc
   ; CHECK:   [[S_ADD_I32_23:%[0-9]+]]:sreg_32 = S_ADD_I32 [[S_BUFFER_LOAD_DWORD_IMM7]], -473, implicit-def dead $scc
   ; CHECK:   [[SI_SPILL_S32_RESTORE:%[0-9]+]]:sgpr_32 = SI_SPILL_S32_RESTORE %stack.2, implicit $exec, implicit $sgpr32 :: (load 4 from %stack.2, addrspace 5)
   ; CHECK:   [[S_ADD_U32_5:%[0-9]+]]:sreg_32 = S_ADD_U32 [[SI_SPILL_S32_RESTORE]], 96, implicit-def $scc
   ; CHECK:   [[S_ADDC_U32_5:%[0-9]+]]:sreg_32 = S_ADDC_U32 undef %33:sreg_32, 0, implicit-def dead $scc, implicit $scc
   ; CHECK:   undef %514.sub0:sreg_64 = S_ADD_U32 [[S_ADD_U32_5]], [[S_LSHL_B32_]], implicit-def $scc
   ; CHECK:   %514.sub1:sreg_64 = S_ADDC_U32 [[S_ADDC_U32_5]], [[S_ASHR_I32_]], implicit-def dead $scc, implicit $scc
-  ; CHECK:   [[S_LOAD_DWORDX4_IMM25:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM %514, 0, 0, 0 :: (load 16 from %ir.347, addrspace 4)
+  ; CHECK:   [[S_LOAD_DWORDX4_IMM25:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM %514, 0, 0, 0 :: (load 16 from %ir.351, addrspace 4)
   ; CHECK:   undef %522.sub0:sreg_64 = S_ADD_U32 [[S_ADD_U32_5]], [[S_LSHL_B32_1]], implicit-def $scc
   ; CHECK:   %522.sub1:sreg_64 = S_ADDC_U32 [[S_ADDC_U32_5]], [[S_ASHR_I32_1]], implicit-def dead $scc, implicit $scc
-  ; CHECK:   [[S_LOAD_DWORDX4_IMM26:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM %522, 0, 0, 0 :: (load 16 from %ir.353, addrspace 4)
+  ; CHECK:   [[S_LOAD_DWORDX4_IMM26:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM %522, 0, 0, 0 :: (load 16 from %ir.357, addrspace 4)
   ; CHECK:   undef %530.sub0:sreg_64 = S_ADD_U32 [[S_ADD_U32_5]], [[S_LSHL_B32_2]], implicit-def $scc
   ; CHECK:   %530.sub1:sreg_64 = S_ADDC_U32 [[S_ADDC_U32_5]], [[S_ASHR_I32_2]], implicit-def dead $scc, implicit $scc
-  ; CHECK:   [[S_LOAD_DWORDX4_IMM27:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM %530, 0, 0, 0 :: (load 16 from %ir.359, addrspace 4)
+  ; CHECK:   [[S_LOAD_DWORDX4_IMM27:%[0-9]+]]:sgpr_128 = S_LOAD_DWORDX4_IMM %530, 0, 0, 0 :: (load 16 from %ir.363, addrspace 4)
   ; CHECK:   [[BUFFER_LOAD_FORMAT_X_IDXEN23:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_FORMAT_X_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM25]], 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from custom "BufferResource", align 1, addrspace 4)
   ; CHECK:   [[BUFFER_LOAD_FORMAT_X_IDXEN24:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_FORMAT_X_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM26]], 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from custom "BufferResource", align 1, addrspace 4)
   ; CHECK:   [[BUFFER_LOAD_FORMAT_X_IDXEN25:%[0-9]+]]:vgpr_32 = BUFFER_LOAD_FORMAT_X_IDXEN [[V_MOV_B32_e32_]], [[S_LOAD_DWORDX4_IMM27]], 0, 0, 0, 0, 0, 0, 0, 0, implicit $exec :: (dereferenceable load 4 from custom "BufferResource", align 1, addrspace 4)
   ; CHECK:   KILL [[S_LOAD_DWORDX4_IMM27]]
   ; CHECK:   KILL [[S_LOAD_DWORDX4_IMM25]]
   ; CHECK:   KILL [[V_MOV_B32_e32_]]
   ; CHECK:   KILL [[S_LOAD_DWORDX4_IMM26]]
   ; CHECK:   [[V_ADD_U32_e32_:%[0-9]+]]:vgpr_32 = V_ADD_U32_e32 -2, [[BUFFER_LOAD_FORMAT_X_IDXEN]], implicit $exec

llvm/test/CodeGen/PowerPC/pr43527.ll

 ; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    .cfi_offset r29, -24
 ; CHECK-NEXT:    .cfi_offset r30, -16
 ; CHECK-NEXT:    std r29, -24(r1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std r30, -16(r1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std r0, 16(r1)
 ; CHECK-NEXT:    stdu r1, -64(r1)
 ; CHECK-NEXT:    sub r30, r4, r3
-; CHECK-NEXT:    li r29, 0
+; CHECK-NEXT:    li r29, -4
 ; CHECK-NEXT:    .p2align 5
 ; CHECK-NEXT:  .LBB0_3: # %bb5
 ; CHECK-NEXT:    #
-; CHECK-NEXT:    lfsx f1, 0, r29
+; CHECK-NEXT:    lfsu f1, 4(r29)
 ; CHECK-NEXT:    bl lrint
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    addi r30, r30, -1
-; CHECK-NEXT:    addi r29, r29, 4
 ; CHECK-NEXT:    cmpldi r30, 0
 ; CHECK-NEXT:    bne cr0, .LBB0_3
 ; CHECK-NEXT:  # %bb.4: # %bb15
 ; CHECK-NEXT:    stb r3, 0(r3)
 ; CHECK-NEXT:    addi r1, r1, 64
 ; CHECK-NEXT:    ld r0, 16(r1)
 ; CHECK-NEXT:    ld r30, -16(r1) # 8-byte Folded Reload
 ; CHECK-NEXT:    ld r29, -24(r1) # 8-byte Folded Reload

llvm/test/CodeGen/PowerPC/pr48519.ll

 ; CHECK-NEXT:    mflr r0
 ; CHECK-NEXT:    std r29, -32(r1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std r30, -24(r1) # 8-byte Folded Spill
 ; CHECK-NEXT:    stfd f31, -8(r1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std r0, 16(r1)
 ; CHECK-NEXT:    stdu r1, -64(r1)
 ; CHECK-NEXT:    fmr f31, f1
 ; CHECK-NEXT:    li r30, 0
+; CHECK-NEXT:    li r29, 0
 ; CHECK-NEXT:    .p2align 5
 ; CHECK-NEXT:  .LBB3_1: # %bb1
 ; CHECK-NEXT:    #
 ; CHECK-NEXT:    fmr f1, f31
-; CHECK-NEXT:    sldi r29, r30, 1
 ; CHECK-NEXT:    bl __gnu_f2h_ieee
 ; CHECK-NEXT:    nop
-; CHECK-NEXT:    addi r30, r30, 12
-; CHECK-NEXT:    sth r3, 0(r29)
-; CHECK-NEXT:    cmpldi r30, 0
+; CHECK-NEXT:    addi r29, r29, -12
+; CHECK-NEXT:    sth r3, 0(r30)
+; CHECK-NEXT:    addi r30, r30, 24
+; CHECK-NEXT:    cmpldi r29, 0
 ; CHECK-NEXT:    bne+ cr0, .LBB3_1
 ; CHECK-NEXT:  # %bb.2: # %bb5
 ;
 ; CHECK-P9-LABEL: func_48785:
 ; CHECK-P9:       # %bb.0: # %bb
 ; CHECK-P9-NEXT:    li r3, 1
 ; CHECK-P9-NEXT:    rldic r3, r3, 62, 1
 ; CHECK-P9-NEXT:    mtctr r3

llvm/test/CodeGen/PowerPC/sms-phi.ll

 ; REQUIRES: asserts
 ; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs\
 ; RUN:       -mcpu=pwr9 --ppc-enable-pipeliner -debug-only=pipeliner 2>&1 \
 ; RUN:       >/dev/null | FileCheck %s
 define dso_local void @sha512() #0 {
 ;CHECK: prolog:
-;CHECK:        %16:g8rc = ADD8 %21:g8rc, %20:g8rc
+;CHECK:        %18:g8rc = ADD8 %24:g8rc, %23:g8rc
 ;CHECK: epilog:
-;CHECK:        %23:g8rc_and_g8rc_nox0 = PHI %5:g8rc_and_g8rc_nox0, %bb.3, %18:g8rc_and_g8rc_nox0, %bb.4
-;CHECK-NEXT:   %24:g8rc = PHI %6:g8rc, %bb.3, %16:g8rc, %bb.4
-;CHECK-NEXT:   %25:g8rc = PHI %6:g8rc, %bb.3, %19:g8rc, %bb.4
+;CHECK:        %28:g8rc_and_g8rc_nox0 = PHI %6:g8rc_and_g8rc_nox0, %bb.3, %22:g8rc_and_g8rc_nox0, %bb.4
+;CHECK-NEXT:   %29:g8rc = PHI %12:g8rc, %bb.3, %16:g8rc, %bb.4
+;CHECK-NEXT:   %30:g8rc = PHI %15:g8rc, %bb.3, %19:g8rc, %bb.4
   br label %1
 
 1:                                                ; preds = %1, %0
   %2 = phi i64 [ 0, %0 ], [ %12, %1 ]
   %3 = phi i64 [ undef, %0 ], [ %11, %1 ]
   %4 = phi i64 [ undef, %0 ], [ %3, %1 ]
   %5 = getelementptr inbounds [80 x i64], [80 x i64]* null, i64 0, i64 %2
   %6 = load i64, i64* %5, align 8

llvm/test/Other/constant-fold-gep.ll

 ; SCEV:   -->  (-1 + inttoptr (i32 1 to i1*))
 ; SCEV: Classifying expressions for: @foo8
 ; SCEV:   %t = bitcast i8* getelementptr (i8, i8* inttoptr (i32 1 to i8*), i32 -2) to i8*
 ; SCEV:   -->  (-2 + inttoptr (i32 1 to i8*))
 ; SCEV: Classifying expressions for: @foo1
 ; SCEV:   %t = bitcast i1* getelementptr (i1, i1* inttoptr (i32 1 to i1*), i32 -2) to i1*
 ; SCEV:   -->  (-2 + inttoptr (i32 1 to i1*))
 ; SCEV: Classifying expressions for: @hoo8
-; SCEV:   -->  -1
+; SCEV:   -->  (-1 + null)<nuw><nsw> U: [-1,0) S: [-1,0)
 ; SCEV: Classifying expressions for: @hoo1
-; SCEV:   -->  -1
+; SCEV:   -->  (-1 + null)<nuw><nsw> U: [-1,0) S: [-1,0)
 
 define i8* @goo8() nounwind {
   %t = bitcast i8* getelementptr (i8, i8* inttoptr (i32 1 to i8*), i32 -1) to i8*
   ret i8* %t
 }
 define i1* @goo1() nounwind {
   %t = bitcast i1* getelementptr (i1, i1* inttoptr (i32 1 to i1*), i32 -1) to i1*
   ret i1* %t

 ; TO: define i64* @fN() local_unnamed_addr #0 {
 ; TO:   ret i64* inttoptr (i64 8 to i64*)
 ; TO: }
 ; TO: define i64* @fO() local_unnamed_addr #0 {
 ; TO:   ret i64* inttoptr (i64 8 to i64*)
 ; TO: }
 ; SCEV: Classifying expressions for: @fM
 ; SCEV:   %t = bitcast i64* getelementptr (i64, i64* null, i32 1) to i64*
-; SCEV:    --> 8
+; SCEV:    --> (8 + null)<nuw><nsw> U: [8,9) S: [8,9)
 ; SCEV: Classifying expressions for: @fN
 ; SCEV:   %t = bitcast i64* getelementptr ({ i64, i64 }, { i64, i64 }* null, i32 0, i32 1) to i64*
-; SCEV:   --> 8
+; SCEV:   --> (8 + null)<nuw><nsw> U: [8,9) S: [8,9)
 ; SCEV: Classifying expressions for: @fO
 ; SCEV:   %t = bitcast i64* getelementptr ([2 x i64], [2 x i64]* null, i32 0, i32 1) to i64*
-; SCEV:   --> 8
+; SCEV:   --> (8 + null)<nuw><nsw> U: [8,9) S: [8,9)
 
 define i64* @fM() nounwind {
   %t = bitcast i64* getelementptr (i64, i64* null, i32 1) to i64*
   ret i64* %t
 }
 define i64* @fN() nounwind {
   %t = bitcast i64* getelementptr ({ i64, i64 }, { i64, i64 }* null, i32 0, i32 1) to i64*
   ret i64* %t

llvm/test/Transforms/IndVarSimplify/2011-11-01-lftrptr.ll

 ; PTR64-NEXT:    [[CNT:%.*]] = sub i32 [[EI]], [[BI]]
 ; PTR64-NEXT:    [[GUARD:%.*]] = icmp ult i32 0, [[CNT]]
 ; PTR64-NEXT:    br i1 [[GUARD]], label [[PREHEADER:%.*]], label [[EXIT:%.*]]
 ; PTR64:       preheader:
 ; PTR64-NEXT:    [[TMP1:%.*]] = add i32 [[EI]], -1
 ; PTR64-NEXT:    [[TMP2:%.*]] = sub i32 [[TMP1]], [[BI]]
 ; PTR64-NEXT:    [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
 ; PTR64-NEXT:    [[TMP4:%.*]] = add nuw nsw i64 [[TMP3]], 1
-; PTR64-NEXT:    [[TMP5:%.*]] = inttoptr i64 [[TMP4]] to i8*
+; PTR64-NEXT:    [[SCEVGEP:%.*]] = getelementptr i8, i8* null, i64 [[TMP4]]
 ; PTR64-NEXT:    br label [[LOOP:%.*]]
 ; PTR64:       loop:
 ; PTR64-NEXT:    [[P_01_US_US:%.*]] = phi i8* [ null, [[PREHEADER]] ], [ [[GEP:%.*]], [[LOOP]] ]
 ; PTR64-NEXT:    [[GEP]] = getelementptr inbounds i8, i8* [[P_01_US_US]], i64 1
 ; PTR64-NEXT:    [[SNEXT:%.*]] = load i8, i8* [[GEP]], align 1
-; PTR64-NEXT:    [[EXITCOND:%.*]] = icmp ne i8* [[GEP]], [[TMP5]]
+; PTR64-NEXT:    [[EXITCOND:%.*]] = icmp ne i8* [[GEP]], [[SCEVGEP]]
 ; PTR64-NEXT:    br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
 ; PTR64:       exit.loopexit:
 ; PTR64-NEXT:    [[SNEXT_LCSSA:%.*]] = phi i8 [ [[SNEXT]], [[LOOP]] ]
 ; PTR64-NEXT:    br label [[EXIT]]
 ; PTR64:       exit:
 ; PTR64-NEXT:    [[RET:%.*]] = phi i8 [ 0, [[LOOPGUARD]] ], [ [[SNEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
 ; PTR64-NEXT:    ret i8 [[RET]]
 ;
 ; PTR32-LABEL: @testnullptrint(
 ; PTR32-NEXT:    br label [[LOOPGUARD:%.*]]
 ; PTR32:       loopguard:
 ; PTR32-NEXT:    [[BI:%.*]] = ptrtoint i8* [[BUF:%.*]] to i32
 ; PTR32-NEXT:    [[EI:%.*]] = ptrtoint i8* [[END:%.*]] to i32
 ; PTR32-NEXT:    [[CNT:%.*]] = sub i32 [[EI]], [[BI]]
-; PTR32-NEXT:    [[CNT1:%.*]] = inttoptr i32 [[CNT]] to i8*
 ; PTR32-NEXT:    [[GUARD:%.*]] = icmp ult i32 0, [[CNT]]
 ; PTR32-NEXT:    br i1 [[GUARD]], label [[PREHEADER:%.*]], label [[EXIT:%.*]]
 ; PTR32:       preheader:
+; PTR32-NEXT:    [[SCEVGEP:%.*]] = getelementptr i8, i8* null, i32 [[CNT]]
 ; PTR32-NEXT:    br label [[LOOP:%.*]]
 ; PTR32:       loop:
 ; PTR32-NEXT:    [[P_01_US_US:%.*]] = phi i8* [ null, [[PREHEADER]] ], [ [[GEP:%.*]], [[LOOP]] ]
 ; PTR32-NEXT:    [[GEP]] = getelementptr inbounds i8, i8* [[P_01_US_US]], i64 1
 ; PTR32-NEXT:    [[SNEXT:%.*]] = load i8, i8* [[GEP]], align 1
-; PTR32-NEXT:    [[EXITCOND:%.*]] = icmp ne i8* [[GEP]], [[CNT1]]
+; PTR32-NEXT:    [[EXITCOND:%.*]] = icmp ne i8* [[GEP]], [[SCEVGEP]]
 ; PTR32-NEXT:    br i1 [[EXITCOND]], label [[LOOP]], label [[EXIT_LOOPEXIT:%.*]]
 ; PTR32:       exit.loopexit:
 ; PTR32-NEXT:    [[SNEXT_LCSSA:%.*]] = phi i8 [ [[SNEXT]], [[LOOP]] ]
 ; PTR32-NEXT:    br label [[EXIT]]
 ; PTR32:       exit:
 ; PTR32-NEXT:    [[RET:%.*]] = phi i8 [ 0, [[LOOPGUARD]] ], [ [[SNEXT_LCSSA]], [[EXIT_LOOPEXIT]] ]
 ; PTR32-NEXT:    ret i8 [[RET]]
 ;

llvm/test/Transforms/IndVarSimplify/widen-i32-i8ptr.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s -indvars -S | FileCheck %s
 
 target datalayout = "e-m:e-i64:64-n32:64"
 
 define dso_local void @Widen_i32_i8ptr() local_unnamed_addr {
 ; CHECK-LABEL: @Widen_i32_i8ptr(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[PTRIDS:%.*]] = alloca [15 x i8*], align 8
 ; CHECK-NEXT:    [[ARRAYDECAY2032:%.*]] = getelementptr inbounds [15 x i8*], [15 x i8*]* [[PTRIDS]], i64 0, i64 0
 ; CHECK-NEXT:    store i8** [[ARRAYDECAY2032]], i8*** inttoptr (i64 8 to i8***), align 8
 ; CHECK-NEXT:    br label [[FOR_COND2106:%.*]]
 ; CHECK:       for.cond2106:
-; CHECK-NEXT:    [[GID_0:%.*]] = phi i8* [ null, [[ENTRY:%.*]] ], [ [[INCDEC_PTR:%.*]], [[FOR_COND2106]] ]
-; CHECK-NEXT:    [[I_0:%.*]] = phi i32 [ 0, [[ENTRY]] ], [ [[INC2117:%.*]], [[FOR_COND2106]] ]
+; CHECK-NEXT:    [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_COND2106]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[GID_0:%.*]] = phi i8* [ null, [[ENTRY]] ], [ [[INCDEC_PTR:%.*]], [[FOR_COND2106]] ]
 ; CHECK-NEXT:    [[INCDEC_PTR]] = getelementptr inbounds i8, i8* [[GID_0]], i64 1
-; CHECK-NEXT:    [[IDXPROM2114:%.*]] = zext i32 [[I_0]] to i64
-; CHECK-NEXT:    [[ARRAYIDX2115:%.*]] = getelementptr inbounds [15 x i8*], [15 x i8*]* [[PTRIDS]], i64 0, i64 [[IDXPROM2114]]
+; CHECK-NEXT:    [[ARRAYIDX2115:%.*]] = getelementptr inbounds [15 x i8*], [15 x i8*]* [[PTRIDS]], i64 0, i64 [[INDVARS_IV]]
 ; CHECK-NEXT:    store i8* [[GID_0]], i8** [[ARRAYIDX2115]], align 8
-; CHECK-NEXT:    [[INC2117]] = add nuw nsw i32 [[I_0]], 1
+; CHECK-NEXT:    [[INDVARS_IV_NEXT]] = add nuw i64 [[INDVARS_IV]], 1
 ; CHECK-NEXT:    br label [[FOR_COND2106]]
 ;
 entry:
   %ptrids = alloca [15 x i8*], align 8
   %arraydecay2032 = getelementptr inbounds [15 x i8*], [15 x i8*]* %ptrids, i64 0, i64 0
   store i8** %arraydecay2032, i8*** inttoptr (i64 8 to i8***), align 8
   br label %for.cond2106
 

llvm/test/Transforms/LoopStrengthReduce/2011-10-03-CritEdgeMerge.ll

 ; Verify that identical edges are merged. rdar://problem/6453893
 
 define i8* @test1() {
 ;
 ; CHECK-LABEL: @test1(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[LOOP:%.*]]
 ; CHECK:       loop:
-; CHECK-NEXT:    [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
-; CHECK-NEXT:    [[LSR_IV_NEXT]] = add nuw nsw i64 [[LSR_IV]], 1
-; CHECK-NEXT:    [[LSR_IV_NEXT1:%.*]] = inttoptr i64 [[LSR_IV_NEXT]] to i8*
+; CHECK-NEXT:    [[LSR_IV:%.*]] = phi i8* [ [[SCEVGEP:%.*]], [[LOOP]] ], [ null, [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[SCEVGEP]] = getelementptr i8, i8* [[LSR_IV]], i64 1
 ; CHECK-NEXT:    br i1 false, label [[LOOP]], label [[LOOPEXIT:%.*]]
 ; CHECK:       loopexit:
 ; CHECK-NEXT:    br i1 false, label [[BBA:%.*]], label [[BBB:%.*]]
 ; CHECK:       bbA:
 ; CHECK-NEXT:    switch i32 0, label [[BBA_BB89_CRIT_EDGE:%.*]] [
 ; CHECK-NEXT:    i32 47, label [[BBA_BB89_CRIT_EDGE]]
 ; CHECK-NEXT:    i32 58, label [[BBA_BB89_CRIT_EDGE]]
 ; CHECK-NEXT:    ]
 ; CHECK:       bbA.bb89_crit_edge:
 ; CHECK-NEXT:    br label [[BB89:%.*]]
 ; CHECK:       bbB:
 ; CHECK-NEXT:    switch i8 0, label [[BBB_BB89_CRIT_EDGE:%.*]] [
 ; CHECK-NEXT:    i8 47, label [[BBB_BB89_CRIT_EDGE]]
 ; CHECK-NEXT:    i8 58, label [[BBB_BB89_CRIT_EDGE]]
 ; CHECK-NEXT:    ]
 ; CHECK:       bbB.bb89_crit_edge:
 ; CHECK-NEXT:    br label [[BB89]]
 ; CHECK:       bb89:
-; CHECK-NEXT:    [[TMP75PHI:%.*]] = phi i8* [ [[LSR_IV_NEXT1]], [[BBA_BB89_CRIT_EDGE]] ], [ [[LSR_IV_NEXT1]], [[BBB_BB89_CRIT_EDGE]] ]
+; CHECK-NEXT:    [[TMP75PHI:%.*]] = phi i8* [ [[SCEVGEP]], [[BBA_BB89_CRIT_EDGE]] ], [ [[SCEVGEP]], [[BBB_BB89_CRIT_EDGE]] ]
 ; CHECK-NEXT:    br label [[EXIT:%.*]]
 ; CHECK:       exit:
 ; CHECK-NEXT:    ret i8* [[TMP75PHI]]
 ;
 entry:
   br label %loop
 
 loop:

 
 ; Handle single-predecessor phis: PR13756
 define i8* @test2() {
 ;
 ; CHECK-LABEL: @test2(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br label [[LOOP:%.*]]
 ; CHECK:       loop:
-; CHECK-NEXT:    [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[LOOP]] ], [ 0, [[ENTRY:%.*]] ]
-; CHECK-NEXT:    [[LSR_IV_NEXT]] = add nuw nsw i64 [[LSR_IV]], 1
-; CHECK-NEXT:    [[LSR_IV_NEXT1:%.*]] = inttoptr i64 [[LSR_IV_NEXT]] to i8*
+; CHECK-NEXT:    [[LSR_IV:%.*]] = phi i8* [ [[SCEVGEP:%.*]], [[LOOP]] ], [ null, [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[SCEVGEP]] = getelementptr i8, i8* [[LSR_IV]], i64 1
 ; CHECK-NEXT:    br i1 false, label [[LOOP]], label [[LOOPEXIT:%.*]]
 ; CHECK:       loopexit:
 ; CHECK-NEXT:    br i1 false, label [[BBA:%.*]], label [[BBB:%.*]]
 ; CHECK:       bbA:
 ; CHECK-NEXT:    switch i32 0, label [[BB89:%.*]] [
 ; CHECK-NEXT:    i32 47, label [[BB89]]
 ; CHECK-NEXT:    i32 58, label [[BB89]]
 ; CHECK-NEXT:    ]
 ; CHECK:       bbB:
 ; CHECK-NEXT:    switch i8 0, label [[BBB_EXIT_CRIT_EDGE:%.*]] [
 ; CHECK-NEXT:    i8 47, label [[BBB_EXIT_CRIT_EDGE]]
 ; CHECK-NEXT:    i8 58, label [[BBB_EXIT_CRIT_EDGE]]
 ; CHECK-NEXT:    ]
 ; CHECK:       bbB.exit_crit_edge:
 ; CHECK-NEXT:    br label [[EXIT:%.*]]
 ; CHECK:       bb89:
-; CHECK-NEXT:    [[TMP75PHI:%.*]] = phi i8* [ [[LSR_IV_NEXT1]], [[BBA]] ], [ [[LSR_IV_NEXT1]], [[BBA]] ], [ [[LSR_IV_NEXT1]], [[BBA]] ]
+; CHECK-NEXT:    [[TMP75PHI:%.*]] = phi i8* [ [[SCEVGEP]], [[BBA]] ], [ [[SCEVGEP]], [[BBA]] ], [ [[SCEVGEP]], [[BBA]] ]
 ; CHECK-NEXT:    br label [[EXIT]]
 ; CHECK:       exit:
-; CHECK-NEXT:    [[RESULT:%.*]] = phi i8* [ [[TMP75PHI]], [[BB89]] ], [ [[LSR_IV_NEXT1]], [[BBB_EXIT_CRIT_EDGE]] ]
+; CHECK-NEXT:    [[RESULT:%.*]] = phi i8* [ [[TMP75PHI]], [[BB89]] ], [ [[SCEVGEP]], [[BBB_EXIT_CRIT_EDGE]] ]
 ; CHECK-NEXT:    ret i8* [[RESULT]]
 ;
 entry:
   br label %loop
 
 loop:
   %rec = phi i32 [ %next, %loop ], [ 0, %entry ]
   %next = add i32 %rec, 1

llvm/test/Transforms/LoopStrengthReduce/AMDGPU/lsr-postinc-pos-addrspace.ll

-; RUN: llc -march=amdgcn -mcpu=bonaire -print-lsr-output < %s 2>&1 | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -march=amdgcn -mcpu=bonaire -loop-reduce -S < %s | FileCheck %s
 
 ; Test various conditions where OptimizeLoopTermCond doesn't look at a
 ; memory instruction use and fails to find the address space.
 
 target datalayout = "e-p:64:64-p1:64:64-p2:32:32-p3:32:32-p4:64:64-p5:32:32-p6:32:32-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-v2048:2048-n32:64-S32-A5"
 
+define amdgpu_kernel void @local_cmp_user(i32 %arg0) nounwind {
 ; CHECK-LABEL: @local_cmp_user(
-; CHECK: bb11:
-; CHECK: %lsr.iv1 = phi i32 [ %lsr.iv.next2, %bb ], [ 2, %entry ]
-; CHECK: %lsr.iv = phi i32 [ %lsr.iv.next, %bb ], [ %{{[0-9]+}}, %entry ]
-; CHECK: %lsr.iv.next = add i32 %lsr.iv, -1
-; CHECK: %lsr.iv.next2 = add i32 %lsr.iv1, -2
-; CHECK: br i1
-
-; CHECK: bb:
-; CHECK: inttoptr i32 %lsr.iv.next2 to i8 addrspace(3)*
-; CHECK: %c1 = icmp ne i8 addrspace(3)*
-define amdgpu_kernel void @local_cmp_user(i32 %arg0) nounwind {
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = add i32 [[ARG0:%.*]], 1
+; CHECK-NEXT:    br label [[BB11:%.*]]
+; CHECK:       bb11:
+; CHECK-NEXT:    [[LSR_IV2:%.*]] = phi i32 [ [[LSR_IV_NEXT3:%.*]], [[BB:%.*]] ], [ -2, [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[BB]] ], [ [[TMP0]], [[ENTRY]] ]
+; CHECK-NEXT:    [[LSR_IV_NEXT]] = add i32 [[LSR_IV]], -1
+; CHECK-NEXT:    [[LSR_IV_NEXT3]] = add i32 [[LSR_IV2]], 2
+; CHECK-NEXT:    [[C0:%.*]] = icmp eq i32 [[LSR_IV_NEXT]], 0
+; CHECK-NEXT:    br i1 [[C0]], label [[BB13:%.*]], label [[BB]]
+; CHECK:       bb:
+; CHECK-NEXT:    [[T:%.*]] = load i8 addrspace(3)*, i8 addrspace(3)* addrspace(3)* undef, align 4
+; CHECK-NEXT:    [[T1:%.*]] = ptrtoint i8 addrspace(3)* [[T]] to i32
+; CHECK-NEXT:    [[TMP1:%.*]] = sub i32 0, [[T1]]
+; CHECK-NEXT:    [[TMP2:%.*]] = inttoptr i32 [[TMP1]] to i8 addrspace(3)*
+; CHECK-NEXT:    [[TMP:%.*]] = inttoptr i32 [[LSR_IV_NEXT3]] to i8 addrspace(3)*
+; CHECK-NEXT:    [[C1:%.*]] = icmp ne i8 addrspace(3)* [[TMP2]], [[TMP]]
+; CHECK-NEXT:    br i1 [[C1]], label [[BB11]], label [[BB13]]
+; CHECK:       bb13:
+; CHECK-NEXT:    unreachable
+;
 entry:
   br label %bb11
 
-bb11:
+bb11:                                             ; preds = %bb, %entry
   %i = phi i32 [ 0, %entry ], [ %i.next, %bb ]
   %ii = shl i32 %i, 1
   %c0 = icmp eq i32 %i, %arg0
   br i1 %c0, label %bb13, label %bb
 
-bb:
-  %t = load i8 addrspace(3)*, i8 addrspace(3)* addrspace(3)* undef
+bb:                                               ; preds = %bb11
+  %t = load i8 addrspace(3)*, i8 addrspace(3)* addrspace(3)* undef, align 4
   %p = getelementptr i8, i8 addrspace(3)* %t, i32 %ii
   %c1 = icmp ne i8 addrspace(3)* %p, null
   %i.next = add i32 %i, 1
   br i1 %c1, label %bb11, label %bb13
 
-bb13:
+bb13:                                             ; preds = %bb, %bb11
   unreachable
 }
 
+define amdgpu_kernel void @global_cmp_user(i64 %arg0) nounwind {
 ; CHECK-LABEL: @global_cmp_user(
-; CHECK: %lsr.iv1 = phi i64
-; CHECK: %lsr.iv = phi i64
-; CHECK: %lsr.iv.next = add i64 %lsr.iv, -1
-; CHECK: %lsr.iv.next2 = add i64 %lsr.iv1, -2
-; CHECK: br i1
-
-; CHECK: bb:
-; CHECK: inttoptr i64 %lsr.iv.next2 to i8 addrspace(1)*
-; CHECK: icmp ne i8 addrspace(1)* %t
-define amdgpu_kernel void @global_cmp_user(i64 %arg0) nounwind {
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[ARG0:%.*]], 1
+; CHECK-NEXT:    br label [[BB11:%.*]]
+; CHECK:       bb11:
+; CHECK-NEXT:    [[LSR_IV2:%.*]] = phi i64 [ [[LSR_IV_NEXT3:%.*]], [[BB:%.*]] ], [ -2, [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[LSR_IV:%.*]] = phi i64 [ [[LSR_IV_NEXT:%.*]], [[BB]] ], [ [[TMP0]], [[ENTRY]] ]
+; CHECK-NEXT:    [[LSR_IV_NEXT]] = add i64 [[LSR_IV]], -1
+; CHECK-NEXT:    [[LSR_IV_NEXT3]] = add i64 [[LSR_IV2]], 2
+; CHECK-NEXT:    [[C0:%.*]] = icmp eq i64 [[LSR_IV_NEXT]], 0
+; CHECK-NEXT:    br i1 [[C0]], label [[BB13:%.*]], label [[BB]]
+; CHECK:       bb:
+; CHECK-NEXT:    [[T:%.*]] = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef, align 8
+; CHECK-NEXT:    [[T1:%.*]] = ptrtoint i8 addrspace(1)* [[T]] to i64
+; CHECK-NEXT:    [[TMP1:%.*]] = sub i64 0, [[T1]]
+; CHECK-NEXT:    [[TMP2:%.*]] = inttoptr i64 [[TMP1]] to i8 addrspace(1)*
+; CHECK-NEXT:    [[TMP:%.*]] = inttoptr i64 [[LSR_IV_NEXT3]] to i8 addrspace(1)*
+; CHECK-NEXT:    [[C1:%.*]] = icmp ne i8 addrspace(1)* [[TMP2]], [[TMP]]
+; CHECK-NEXT:    br i1 [[C1]], label [[BB11]], label [[BB13]]
+; CHECK:       bb13:
+; CHECK-NEXT:    unreachable
+;
 entry:
   br label %bb11
 
-bb11:
+bb11:                                             ; preds = %bb, %entry
   %i = phi i64 [ 0, %entry ], [ %i.next, %bb ]
   %ii = shl i64 %i, 1
   %c0 = icmp eq i64 %i, %arg0
   br i1 %c0, label %bb13, label %bb
 
-bb:
-  %t = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef
+bb:                                               ; preds = %bb11
+  %t = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef, align 8
   %p = getelementptr i8, i8 addrspace(1)* %t, i64 %ii
   %c1 = icmp ne i8 addrspace(1)* %p, null
   %i.next = add i64 %i, 1
   br i1 %c1, label %bb11, label %bb13
 
-bb13:
+bb13:                                             ; preds = %bb, %bb11
   unreachable
 }
 
+define amdgpu_kernel void @global_gep_user(i32 %arg0) nounwind {
 ; CHECK-LABEL: @global_gep_user(
-; CHECK: %lsr.iv1 = phi i32 [ %lsr.iv.next2, %bb ], [ 0, %entry ]
-; CHECK: %lsr.iv = phi i32 [ %lsr.iv.next, %bb ], [ %{{[0-9]+}}, %entry ]
-; CHECK: %lsr.iv.next = add i32 %lsr.iv, -1
-; CHECK: %lsr.iv.next2 = add i32 %lsr.iv1, 2
-; CHECK: br i1
-
-; CHECK: bb:
-; CHECK: %idxprom = sext i32 %lsr.iv1 to i64
-; CHECK: getelementptr i8, i8 addrspace(1)* %t, i64 %idxprom
-define amdgpu_kernel void @global_gep_user(i32 %arg0) nounwind {
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = add i32 [[ARG0:%.*]], 1
+; CHECK-NEXT:    br label [[BB11:%.*]]
+; CHECK:       bb11:
+; CHECK-NEXT:    [[LSR_IV1:%.*]] = phi i32 [ [[LSR_IV_NEXT2:%.*]], [[BB:%.*]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[BB]] ], [ [[TMP0]], [[ENTRY]] ]
+; CHECK-NEXT:    [[LSR_IV_NEXT]] = add i32 [[LSR_IV]], -1
+; CHECK-NEXT:    [[LSR_IV_NEXT2]] = add i32 [[LSR_IV1]], 2
+; CHECK-NEXT:    [[C0:%.*]] = icmp eq i32 [[LSR_IV_NEXT]], 0
+; CHECK-NEXT:    br i1 [[C0]], label [[BB13:%.*]], label [[BB]]
+; CHECK:       bb:
+; CHECK-NEXT:    [[T:%.*]] = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef, align 8
+; CHECK-NEXT:    [[IDXPROM:%.*]] = sext i32 [[LSR_IV1]] to i64
+; CHECK-NEXT:    [[P:%.*]] = getelementptr i8, i8 addrspace(1)* [[T]], i64 [[IDXPROM]]
+; CHECK-NEXT:    [[C1:%.*]] = icmp ne i8 addrspace(1)* [[P]], null
+; CHECK-NEXT:    br i1 [[C1]], label [[BB11]], label [[BB13]]
+; CHECK:       bb13:
+; CHECK-NEXT:    unreachable
+;
 entry:
   br label %bb11
 
-bb11:
+bb11:                                             ; preds = %bb, %entry
   %i = phi i32 [ 0, %entry ], [ %i.next, %bb ]
   %ii = shl i32 %i, 1
   %c0 = icmp eq i32 %i, %arg0
   br i1 %c0, label %bb13, label %bb
 
-bb:
-  %t = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef
-  %p = getelementptr i8, i8 addrspace(1)* %t, i32 %ii
+bb:                                               ; preds = %bb11
+  %t = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef, align 8
+  %idxprom = sext i32 %ii to i64
+  %p = getelementptr i8, i8 addrspace(1)* %t, i64 %idxprom
   %c1 = icmp ne i8 addrspace(1)* %p, null
   %i.next = add i32 %i, 1
   br i1 %c1, label %bb11, label %bb13
 
-bb13:
+bb13:                                             ; preds = %bb, %bb11
   unreachable
 }
 
-; CHECK-LABEL: @global_sext_scale_user(
-; CHECK: %lsr.iv1 = phi i32 [ %lsr.iv.next2, %bb ], [ 0, %entry ]
-; CHECK: %lsr.iv = phi i32 [ %lsr.iv.next, %bb ], [ %{{[0-9]+}}, %entry ]
-; CHECK: %lsr.iv.next = add i32 %lsr.iv, -1
-; CHECK: %lsr.iv.next2 = add i32 %lsr.iv1, 2
-; CHECK: br i1
-
-; CHECK: bb
-; CHECK: %p = getelementptr i8, i8 addrspace(1)* %t, i64 %ii.ext
 define amdgpu_kernel void @global_sext_scale_user(i32 %arg0) nounwind {
+; CHECK-LABEL: @global_sext_scale_user(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[TMP0:%.*]] = add i32 [[ARG0:%.*]], 1
+; CHECK-NEXT:    br label [[BB11:%.*]]
+; CHECK:       bb11:
+; CHECK-NEXT:    [[LSR_IV1:%.*]] = phi i32 [ [[LSR_IV_NEXT2:%.*]], [[BB:%.*]] ], [ 0, [[ENTRY:%.*]] ]
+; CHECK-NEXT:    [[LSR_IV:%.*]] = phi i32 [ [[LSR_IV_NEXT:%.*]], [[BB]] ], [ [[TMP0]], [[ENTRY]] ]
+; CHECK-NEXT:    [[II_EXT:%.*]] = sext i32 [[LSR_IV1]] to i64
+; CHECK-NEXT:    [[LSR_IV_NEXT]] = add i32 [[LSR_IV]], -1
+; CHECK-NEXT:    [[LSR_IV_NEXT2]] = add i32 [[LSR_IV1]], 2
+; CHECK-NEXT:    [[C0:%.*]] = icmp eq i32 [[LSR_IV_NEXT]], 0
+; CHECK-NEXT:    br i1 [[C0]], label [[BB13:%.*]], label [[BB]]
+; CHECK:       bb:
+; CHECK-NEXT:    [[T:%.*]] = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef, align 8
+; CHECK-NEXT:    [[P:%.*]] = getelementptr i8, i8 addrspace(1)* [[T]], i64 [[II_EXT]]
+; CHECK-NEXT:    [[C1:%.*]] = icmp ne i8 addrspace(1)* [[P]], null
+; CHECK-NEXT:    br i1 [[C1]], label [[BB11]], label [[BB13]]
+; CHECK:       bb13:
+; CHECK-NEXT:    unreachable
+;
 entry:
   br label %bb11
 
-bb11:
+bb11:                                             ; preds = %bb, %entry
   %i = phi i32 [ 0, %entry ], [ %i.next, %bb ]
   %ii = shl i32 %i, 1
   %ii.ext = sext i32 %ii to i64
   %c0 = icmp eq i32 %i, %arg0
   br i1 %c0, label %bb13, label %bb
 
-bb:
-  %t = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef
+bb:                                               ; preds = %bb11
+  %t = load i8 addrspace(1)*, i8 addrspace(1)* addrspace(1)* undef, align 8
   %p = getelementptr i8, i8 addrspace(1)* %t, i64 %ii.ext
   %c1 = icmp ne i8 addrspace(1)* %p, null
   %i.next = add i32 %i, 1
   br i1 %c1, label %bb11, label %bb13
 
-bb13:
+bb13:                                             ; preds = %bb, %bb11
   unreachable
 }

llvm/test/Transforms/LoopVectorize/X86/cost-model-assert.ll

 target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
 target triple = "x86_64-w64-windows-gnu"
 
 define void @cff_index_load_offsets(i1 %cond, i8 %x, i8* %p) #0 {
 ; CHECK-LABEL: @cff_index_load_offsets(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    br i1 [[COND:%.*]], label [[IF_THEN:%.*]], label [[EXIT:%.*]]
 ; CHECK:       if.then:
-; CHECK-NEXT:    [[UMAX:%.*]] = call i64 @llvm.umax.i64(i64 undef, i64 4)
-; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[UMAX]], -1
-; CHECK-NEXT:    [[TMP1:%.*]] = lshr i64 [[TMP0]], 2
-; CHECK-NEXT:    [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1
-; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP2]], 8
-; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
+; CHECK-NEXT:    br i1 true, label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
 ; CHECK:       vector.ph:
-; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[TMP2]], 8
-; CHECK-NEXT:    [[N_VEC:%.*]] = sub i64 [[TMP2]], [[N_MOD_VF]]
-; CHECK-NEXT:    [[TMP3:%.*]] = mul i64 [[N_VEC]], 4
-; CHECK-NEXT:    [[IND_END:%.*]] = getelementptr i8, i8* null, i64 [[TMP3]]
 ; CHECK-NEXT:    [[BROADCAST_SPLATINSERT:%.*]] = insertelement <4 x i8> poison, i8 [[X:%.*]], i32 0
 ; CHECK-NEXT:    [[BROADCAST_SPLAT:%.*]] = shufflevector <4 x i8> [[BROADCAST_SPLATINSERT]], <4 x i8> poison, <4 x i32> zeroinitializer
 ; CHECK-NEXT:    [[BROADCAST_SPLATINSERT2:%.*]] = insertelement <4 x i8> poison, i8 [[X]], i32 0
 ; CHECK-NEXT:    [[BROADCAST_SPLAT3:%.*]] = shufflevector <4 x i8> [[BROADCAST_SPLATINSERT2]], <4 x i8> poison, <4 x i32> zeroinitializer
 ; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
 ; CHECK:       vector.body:
 ; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[VECTOR_BODY]] ]
-; CHECK-NEXT:    [[TMP4:%.*]] = add i64 [[INDEX]], 0
-; CHECK-NEXT:    [[TMP5:%.*]] = mul i64 [[TMP4]], 4
-; CHECK-NEXT:    [[NEXT_GEP:%.*]] = getelementptr i8, i8* null, i64 [[TMP5]]
-; CHECK-NEXT:    [[TMP6:%.*]] = add i64 [[INDEX]], 4
-; CHECK-NEXT:    [[TMP7:%.*]] = mul i64 [[TMP6]], 4
-; CHECK-NEXT:    [[NEXT_GEP1:%.*]] = getelementptr i8, i8* null, i64 [[TMP7]]
-; CHECK-NEXT:    [[TMP8:%.*]] = zext <4 x i8> [[BROADCAST_SPLAT]] to <4 x i32>
-; CHECK-NEXT:    [[TMP9:%.*]] = zext <4 x i8> [[BROADCAST_SPLAT3]] to <4 x i32>
-; CHECK-NEXT:    [[TMP10:%.*]] = shl nuw <4 x i32> [[TMP8]], <i32 24, i32 24, i32 24, i32 24>
-; CHECK-NEXT:    [[TMP11:%.*]] = shl nuw <4 x i32> [[TMP9]], <i32 24, i32 24, i32 24, i32 24>
-; CHECK-NEXT:    [[TMP12:%.*]] = load i8, i8* [[P:%.*]], align 1, [[TBAA1:!tbaa !.*]]
-; CHECK-NEXT:    [[BROADCAST_SPLATINSERT4:%.*]] = insertelement <4 x i8> poison, i8 [[TMP12]], i32 0
+; CHECK-NEXT:    [[TMP0:%.*]] = add i64 [[INDEX]], 0
+; CHECK-NEXT:    [[TMP1:%.*]] = mul i64 [[TMP0]], 4
+; CHECK-NEXT:    [[NEXT_GEP:%.*]] = getelementptr i8, i8* null, i64 [[TMP1]]
+; CHECK-NEXT:    [[TMP2:%.*]] = add i64 [[INDEX]], 4
+; CHECK-NEXT:    [[TMP3:%.*]] = mul i64 [[TMP2]], 4
+; CHECK-NEXT:    [[NEXT_GEP1:%.*]] = getelementptr i8, i8* null, i64 [[TMP3]]
+; CHECK-NEXT:    [[TMP4:%.*]] = zext <4 x i8> [[BROADCAST_SPLAT]] to <4 x i32>
+; CHECK-NEXT:    [[TMP5:%.*]] = zext <4 x i8> [[BROADCAST_SPLAT3]] to <4 x i32>
+; CHECK-NEXT:    [[TMP6:%.*]] = shl nuw <4 x i32> [[TMP4]], <i32 24, i32 24, i32 24, i32 24>
+; CHECK-NEXT:    [[TMP7:%.*]] = shl nuw <4 x i32> [[TMP5]], <i32 24, i32 24, i32 24, i32 24>
+; CHECK-NEXT:    [[TMP8:%.*]] = load i8, i8* [[P:%.*]], align 1, [[TBAA1:!tbaa !.*]]
+; CHECK-NEXT:    [[BROADCAST_SPLATINSERT4:%.*]] = insertelement <4 x i8> poison, i8 [[TMP8]], i32 0
 ; CHECK-NEXT:    [[BROADCAST_SPLAT5:%.*]] = shufflevector <4 x i8> [[BROADCAST_SPLATINSERT4]], <4 x i8> poison, <4 x i32> zeroinitializer
-; CHECK-NEXT:    [[TMP13:%.*]] = load i8, i8* [[P]], align 1, [[TBAA1]]
-; CHECK-NEXT:    [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <4 x i8> poison, i8 [[TMP13]], i32 0
+; CHECK-NEXT:    [[TMP9:%.*]] = load i8, i8* [[P]], align 1, [[TBAA1]]
+; CHECK-NEXT:    [[BROADCAST_SPLATINSERT6:%.*]] = insertelement <4 x i8> poison, i8 [[TMP9]], i32 0
 ; CHECK-NEXT:    [[BROADCAST_SPLAT7:%.*]] = shufflevector <4 x i8> [[BROADCAST_SPLATINSERT6]], <4 x i8> poison, <4 x i32> zeroinitializer
-; CHECK-NEXT:    [[TMP14:%.*]] = zext <4 x i8> [[BROADCAST_SPLAT5]] to <4 x i32>
-; CHECK-NEXT:    [[TMP15:%.*]] = zext <4 x i8> [[BROADCAST_SPLAT7]] to <4 x i32>
-; CHECK-NEXT:    [[TMP16:%.*]] = shl nuw nsw <4 x i32> [[TMP14]], <i32 16, i32 16, i32 16, i32 16>
-; CHECK-NEXT:    [[TMP17:%.*]] = shl nuw nsw <4 x i32> [[TMP15]], <i32 16, i32 16, i32 16, i32 16>
-; CHECK-NEXT:    [[TMP18:%.*]] = or <4 x i32> [[TMP16]], [[TMP10]]
-; CHECK-NEXT:    [[TMP19:%.*]] = or <4 x i32> [[TMP17]], [[TMP11]]
-; CHECK-NEXT:    [[TMP20:%.*]] = load i8, i8* undef, align 1, [[TBAA1]]
-; CHECK-NEXT:    [[TMP21:%.*]] = load i8, i8* undef, align 1, [[TBAA1]]
-; CHECK-NEXT:    [[TMP22:%.*]] = or <4 x i32> [[TMP18]], zeroinitializer
-; CHECK-NEXT:    [[TMP23:%.*]] = or <4 x i32> [[TMP19]], zeroinitializer
-; CHECK-NEXT:    [[TMP24:%.*]] = or <4 x i32> [[TMP22]], zeroinitializer
-; CHECK-NEXT:    [[TMP25:%.*]] = or <4 x i32> [[TMP23]], zeroinitializer
-; CHECK-NEXT:    [[TMP26:%.*]] = extractelement <4 x i32> [[TMP24]], i32 0
-; CHECK-NEXT:    store i32 [[TMP26]], i32* undef, align 4, [[TBAA4:!tbaa !.*]]
-; CHECK-NEXT:    [[TMP27:%.*]] = extractelement <4 x i32> [[TMP24]], i32 1
+; CHECK-NEXT:    [[TMP10:%.*]] = zext <4 x i8> [[BROADCAST_SPLAT5]] to <4 x i32>
+; CHECK-NEXT:    [[TMP11:%.*]] = zext <4 x i8> [[BROADCAST_SPLAT7]] to <4 x i32>
+; CHECK-NEXT:    [[TMP12:%.*]] = shl nuw nsw <4 x i32> [[TMP10]], <i32 16, i32 16, i32 16, i32 16>
+; CHECK-NEXT:    [[TMP13:%.*]] = shl nuw nsw <4 x i32> [[TMP11]], <i32 16, i32 16, i32 16, i32 16>
+; CHECK-NEXT:    [[TMP14:%.*]] = or <4 x i32> [[TMP12]], [[TMP6]]
+; CHECK-NEXT:    [[TMP15:%.*]] = or <4 x i32> [[TMP13]], [[TMP7]]
+; CHECK-NEXT:    [[TMP16:%.*]] = load i8, i8* undef, align 1, [[TBAA1]]
+; CHECK-NEXT:    [[TMP17:%.*]] = load i8, i8* undef, align 1, [[TBAA1]]
+; CHECK-NEXT:    [[TMP18:%.*]] = or <4 x i32> [[TMP14]], zeroinitializer
+; CHECK-NEXT:    [[TMP19:%.*]] = or <4 x i32> [[TMP15]], zeroinitializer
+; CHECK-NEXT:    [[TMP20:%.*]] = or <4 x i32> [[TMP18]], zeroinitializer
+; CHECK-NEXT:    [[TMP21:%.*]] = or <4 x i32> [[TMP19]], zeroinitializer
+; CHECK-NEXT:    [[TMP22:%.*]] = extractelement <4 x i32> [[TMP20]], i32 0
+; CHECK-NEXT:    store i32 [[TMP22]], i32* undef, align 4, [[TBAA4:!tbaa !.*]]
+; CHECK-NEXT:    [[TMP23:%.*]] = extractelement <4 x i32> [[TMP20]], i32 1
+; CHECK-NEXT:    store i32 [[TMP23]], i32* undef, align 4, [[TBAA4]]
+; CHECK-NEXT:    [[TMP24:%.*]] = extractelement <4 x i32> [[TMP20]], i32 2
+; CHECK-NEXT:    store i32 [[TMP24]], i32* undef, align 4, [[TBAA4]]
+; CHECK-NEXT:    [[TMP25:%.*]] = extractelement <4 x i32> [[TMP20]], i32 3
+; CHECK-NEXT:    store i32 [[TMP25]], i32* undef, align 4, [[TBAA4]]
+; CHECK-NEXT:    [[TMP26:%.*]] = extractelement <4 x i32> [[TMP21]], i32 0
+; CHECK-NEXT:    store i32 [[TMP26]], i32* undef, align 4, [[TBAA4]]
+; CHECK-NEXT:    [[TMP27:%.*]] = extractelement <4 x i32> [[TMP21]], i32 1
 ; CHECK-NEXT:    store i32 [[TMP27]], i32* undef, align 4, [[TBAA4]]
-; CHECK-NEXT:    [[TMP28:%.*]] = extractelement <4 x i32> [[TMP24]], i32 2
+; CHECK-NEXT:    [[TMP28:%.*]] = extractelement <4 x i32> [[TMP21]], i32 2
 ; CHECK-NEXT:    store i32 [[TMP28]], i32* undef, align 4, [[TBAA4]]
-; CHECK-NEXT:    [[TMP29:%.*]] = extractelement <4 x i32> [[TMP24]], i32 3
+; CHECK-NEXT:    [[TMP29:%.*]] = extractelement <4 x i32> [[TMP21]], i32 3
 ; CHECK-NEXT:    store i32 [[TMP29]], i32* undef, align 4, [[TBAA4]]
-; CHECK-NEXT:    [[TMP30:%.*]] = extractelement <4 x i32> [[TMP25]], i32 0
-; CHECK-NEXT:    store i32 [[TMP30]], i32* undef, align 4, [[TBAA4]]
-; CHECK-NEXT:    [[TMP31:%.*]] = extractelement <4 x i32> [[TMP25]], i32 1
-; CHECK-NEXT:    store i32 [[TMP31]], i32* undef, align 4, [[TBAA4]]
-; CHECK-NEXT:    [[TMP32:%.*]] = extractelement <4 x i32> [[TMP25]], i32 2
-; CHECK-NEXT:    store i32 [[TMP32]], i32* undef, align 4, [[TBAA4]]
-; CHECK-NEXT:    [[TMP33:%.*]] = extractelement <4 x i32> [[TMP25]], i32 3
-; CHECK-NEXT:    store i32 [[TMP33]], i32* undef, align 4, [[TBAA4]]
 ; CHECK-NEXT:    [[INDEX_NEXT]] = add i64 [[INDEX]], 8
-; CHECK-NEXT:    [[TMP34:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
-; CHECK-NEXT:    br i1 [[TMP34]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP6:!llvm.loop !.*]]
+; CHECK-NEXT:    [[TMP30:%.*]] = icmp eq i64 [[INDEX_NEXT]], 0
+; CHECK-NEXT:    br i1 [[TMP30]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP6:!llvm.loop !.*]]
 ; CHECK:       middle.block:
-; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 [[TMP2]], [[N_VEC]]
+; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 1, 0
 ; CHECK-NEXT:    br i1 [[CMP_N]], label [[SW_EPILOG:%.*]], label [[SCALAR_PH]]
 ; CHECK:       scalar.ph:
-; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i8* [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ null, [[IF_THEN]] ]
+; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i8* [ null, [[MIDDLE_BLOCK]] ], [ null, [[IF_THEN]] ]
 ; CHECK-NEXT:    br label [[FOR_BODY68:%.*]]
 ; CHECK:       for.body68:
 ; CHECK-NEXT:    [[P_359:%.*]] = phi i8* [ [[ADD_PTR86:%.*]], [[FOR_BODY68]] ], [ [[BC_RESUME_VAL]], [[SCALAR_PH]] ]
 ; CHECK-NEXT:    [[CONV70:%.*]] = zext i8 [[X]] to i32
 ; CHECK-NEXT:    [[SHL71:%.*]] = shl nuw i32 [[CONV70]], 24
-; CHECK-NEXT:    [[TMP35:%.*]] = load i8, i8* [[P]], align 1, [[TBAA1]]
-; CHECK-NEXT:    [[CONV73:%.*]] = zext i8 [[TMP35]] to i32
+; CHECK-NEXT:    [[TMP31:%.*]] = load i8, i8* [[P]], align 1, [[TBAA1]]
+; CHECK-NEXT:    [[CONV73:%.*]] = zext i8 [[TMP31]] to i32
 ; CHECK-NEXT:    [[SHL74:%.*]] = shl nuw nsw i32 [[CONV73]], 16
 ; CHECK-NEXT:    [[OR75:%.*]] = or i32 [[SHL74]], [[SHL71]]
-; CHECK-NEXT:    [[TMP36:%.*]] = load i8, i8* undef, align 1, [[TBAA1]]
+; CHECK-NEXT:    [[TMP32:%.*]] = load i8, i8* undef, align 1, [[TBAA1]]
 ; CHECK-NEXT:    [[SHL78:%.*]] = shl nuw nsw i32 undef, 8
 ; CHECK-NEXT:    [[OR79:%.*]] = or i32 [[OR75]], [[SHL78]]
 ; CHECK-NEXT:    [[CONV81:%.*]] = zext i8 undef to i32
 ; CHECK-NEXT:    [[OR83:%.*]] = or i32 [[OR79]], [[CONV81]]
 ; CHECK-NEXT:    store i32 [[OR83]], i32* undef, align 4, [[TBAA4]]
 ; CHECK-NEXT:    [[ADD_PTR86]] = getelementptr inbounds i8, i8* [[P_359]], i64 4
 ; CHECK-NEXT:    [[CMP66:%.*]] = icmp ult i8* [[ADD_PTR86]], undef
 ; CHECK-NEXT:    br i1 [[CMP66]], label [[FOR_BODY68]], label [[SW_EPILOG]], [[LOOP8:!llvm.loop !.*]]

llvm/test/Transforms/LoopVectorize/pointer-induction.ll

 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt < %s  -loop-vectorize -force-vector-interleave=1 -force-vector-width=4 -S | FileCheck %s
 target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
 
 
 ; Function Attrs: nofree norecurse nounwind
 define void @a(i8* readnone %b) {
 ; CHECK-LABEL: @a(
 ; CHECK-NEXT:  entry:
 ; CHECK-NEXT:    [[B1:%.*]] = ptrtoint i8* [[B:%.*]] to i64
 ; CHECK-NEXT:    [[CMP_NOT4:%.*]] = icmp eq i8* [[B]], null
 ; CHECK-NEXT:    br i1 [[CMP_NOT4]], label [[FOR_COND_CLEANUP:%.*]], label [[FOR_BODY_PREHEADER:%.*]]
 ; CHECK:       for.body.preheader:
 ; CHECK-NEXT:    [[TMP0:%.*]] = sub i64 0, [[B1]]
-; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP0]], 4
+; CHECK-NEXT:    [[SCEVGEP:%.*]] = getelementptr i8, i8* null, i64 [[TMP0]]
+; CHECK-NEXT:    [[EXITCOUNT_PTRCNT_TO_INT:%.*]] = ptrtoint i8* [[SCEVGEP]] to i64
+; CHECK-NEXT:    [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[EXITCOUNT_PTRCNT_TO_INT]], 4
 ; CHECK-NEXT:    br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_PH:%.*]]
 ; CHECK:       vector.ph:
-; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[TMP0]], 4
-; CHECK-NEXT:    [[N_VEC:%.*]] = sub i64 [[TMP0]], [[N_MOD_VF]]
+; CHECK-NEXT:    [[N_MOD_VF:%.*]] = urem i64 [[EXITCOUNT_PTRCNT_TO_INT]], 4
+; CHECK-NEXT:    [[N_VEC:%.*]] = sub i64 [[EXITCOUNT_PTRCNT_TO_INT]], [[N_MOD_VF]]
 ; CHECK-NEXT:    [[TMP1:%.*]] = mul i64 [[N_VEC]], -1
 ; CHECK-NEXT:    [[IND_END:%.*]] = getelementptr i8, i8* null, i64 [[TMP1]]
 ; CHECK-NEXT:    br label [[VECTOR_BODY:%.*]]
 ; CHECK:       vector.body:
 ; CHECK-NEXT:    [[POINTER_PHI:%.*]] = phi i8* [ null, [[VECTOR_PH]] ], [ [[PTR_IND:%.*]], [[PRED_STORE_CONTINUE7:%.*]] ]
 ; CHECK-NEXT:    [[INDEX:%.*]] = phi i64 [ 0, [[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], [[PRED_STORE_CONTINUE7]] ]
 ; CHECK-NEXT:    [[TMP2:%.*]] = getelementptr i8, i8* [[POINTER_PHI]], <4 x i64> <i64 0, i64 -1, i64 -2, i64 -3>
 ; CHECK-NEXT:    [[TMP3:%.*]] = getelementptr inbounds i8, <4 x i8*> [[TMP2]], i64 -1

 ; CHECK-NEXT:    store i8 95, i8* [[TMP17]], align 1
 ; CHECK-NEXT:    br label [[PRED_STORE_CONTINUE7]]
 ; CHECK:       pred.store.continue7:
 ; CHECK-NEXT:    [[INDEX_NEXT]] = add i64 [[INDEX]], 4
 ; CHECK-NEXT:    [[TMP18:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
 ; CHECK-NEXT:    [[PTR_IND]] = getelementptr i8, i8* [[POINTER_PHI]], i64 -4
 ; CHECK-NEXT:    br i1 [[TMP18]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], [[LOOP0:!llvm.loop !.*]]
 ; CHECK:       middle.block:
-; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]
+; CHECK-NEXT:    [[CMP_N:%.*]] = icmp eq i64 [[EXITCOUNT_PTRCNT_TO_INT]], [[N_VEC]]
 ; CHECK-NEXT:    br i1 [[CMP_N]], label [[FOR_COND_CLEANUP_LOOPEXIT:%.*]], label [[SCALAR_PH]]
 ; CHECK:       scalar.ph:
 ; CHECK-NEXT:    [[BC_RESUME_VAL:%.*]] = phi i8* [ [[IND_END]], [[MIDDLE_BLOCK]] ], [ null, [[FOR_BODY_PREHEADER]] ]
 ; CHECK-NEXT:    br label [[FOR_BODY:%.*]]
 ; CHECK:       for.cond.cleanup.loopexit:
 ; CHECK-NEXT:    br label [[FOR_COND_CLEANUP]]
 ; CHECK:       for.cond.cleanup:
 ; CHECK-NEXT:    ret void

llvm/unittests/Transforms/Utils/ScalarEvolutionExpanderTest.cpp

runWithSE(*M, "test", [&](Function &F, LoopInfo &LI, ScalarEvolution &SE) {
     auto &I = GetInstByName(F, "ptr");
     auto PtrPlus1 =
         SE.getAddExpr(SE.getSCEV(&I), SE.getConstant(I.getType(), 1));
     SCEVExpander Exp(SE, M->getDataLayout(), "expander");
 
     Value *V = Exp.expandCodeFor(PtrPlus1, I.getType(), &I);
     I.replaceAllUsesWith(V);
 
-    // Check the expander created bitcast (gep i8* null, %offset).
+    // Check that the expander created:
+    // define float addrspace(1)* @test(i64 %off) {
+    //   %scevgep = getelementptr float, float addrspace(1)* null, i64 %off
+    //   %scevgep1 = bitcast float addrspace(1)* %scevgep to i8 addrspace(1)*
+    //   %uglygep = getelementptr i8, i8 addrspace(1)* %scevgep1, i64 1
+    //   %uglygep2 = bitcast i8 addrspace(1)* %uglygep to float addrspace(1)*
+    //   %ptr = getelementptr inbounds float, float addrspace(1)* null, i64 %off
+    //   ret float addrspace(1)* %uglygep2
+    // }
+
     auto *Cast = dyn_cast<BitCastInst>(V);
     EXPECT_TRUE(Cast);
     EXPECT_EQ(Cast->getType(), I.getType());
     auto *GEP = dyn_cast<GetElementPtrInst>(Cast->getOperand(0));
     EXPECT_TRUE(GEP);
-    EXPECT_TRUE(cast<Constant>(GEP->getPointerOperand())->isNullValue());
-    EXPECT_EQ(cast<PointerType>(GEP->getPointerOperand()->getType())
+    EXPECT_TRUE(match(GEP->getOperand(1), m_SpecificInt(1)));
+    auto *Cast1 = dyn_cast<BitCastInst>(GEP->getPointerOperand());
+    EXPECT_TRUE(Cast1);
+    auto *GEP1 = dyn_cast<GetElementPtrInst>(Cast1->getOperand(0));
+    EXPECT_TRUE(GEP1);
+    EXPECT_TRUE(cast<Constant>(GEP1->getPointerOperand())->isNullValue());
+    EXPECT_EQ(GEP1->getOperand(1), &*F.arg_begin());
+    EXPECT_EQ(cast<PointerType>(GEP1->getPointerOperand()->getType())
                   ->getAddressSpace(),
               cast<PointerType>(I.getType())->getAddressSpace());
-
-    // Check the expander created the expected index computation: add (shl
-    // %offset, 2), 1.
-    Value *Arg;
-    EXPECT_TRUE(
-        match(GEP->getOperand(1),
-              m_Add(m_Shl(m_Value(Arg), m_SpecificInt(2)), m_SpecificInt(1))));
-    EXPECT_EQ(Arg, &*F.arg_begin());
     EXPECT_FALSE(verifyFunction(F, &errs()));
   });
 }
 
 } // end namespace llvm

polly/lib/Analysis/ScopBuilder.cpp

bool ScopBuilder::buildAccessMemIntrinsic(MemAccInst Inst, ScopStmt *Stmt) {
   // Ignore accesses to "NULL".
   // TODO: We could use this to optimize the region further, e.g., intersect
   //       the context with
   //          isl_set_complement(isl_set_params(getDomain()))
   //       as we know it would be undefined to execute this instruction anyway.
   if (DestAccFunc->isZero())
     return true;
 
+  if (auto *U = dyn_cast<SCEVUnknown>(DestAccFunc)) {
+    if (isa<ConstantPointerNull>(U->getValue()))
+      return true;
+  }
+
   auto *DestPtrSCEV = dyn_cast<SCEVUnknown>(SE.getPointerBase(DestAccFunc));
   assert(DestPtrSCEV);
   DestAccFunc = SE.getMinusSCEV(DestAccFunc, DestPtrSCEV);
   addArrayAccess(Stmt, Inst, MemoryAccess::MUST_WRITE, DestPtrSCEV->getValue(),
                  IntegerType::getInt8Ty(DestPtrVal->getContext()),
                  LengthIsAffine, {DestAccFunc, LengthVal}, {nullptr},
                  Inst.getValueOperand());
 
case FMRB_OnlyAccessesArgumentPointees: {
     for (const auto &Arg : CI->arg_operands()) {
       if (!Arg->getType()->isPointerTy())
         continue;
 
       auto *ArgSCEV = SE.getSCEVAtScope(Arg, L);
       if (ArgSCEV->isZero())
         continue;
 
+      if (auto *U = dyn_cast<SCEVUnknown>(ArgSCEV)) {
+        if (isa<ConstantPointerNull>(U->getValue()))
+          return true;
+      }
+
       auto *ArgBasePtr = cast<SCEVUnknown>(SE.getPointerBase(ArgSCEV));
       addArrayAccess(Stmt, Inst, AccType, ArgBasePtr->getValue(),
                      ArgBasePtr->getType(), false, {AF}, {nullptr}, CI);
     }
     return true;
   }
   }
 

polly/lib/Support/SCEVAffinator.cpp

case Instruction::SDiv:
       return visitSDivInstruction(I);
     case Instruction::SRem:
       return visitSRemInstruction(I);
     default:
       break; // Fall through.
     }
   }
 
-  llvm_unreachable(
-      "Unknowns SCEV was neither parameter nor a valid instruction.");
+  if (isa<ConstantPointerNull>(Expr->getValue())) {
+    isl::val v{Ctx, 0};
+    isl::space Space{Ctx, 0, NumIterators};
+    isl::local_space ls{Space};
+    return getPWACtxFromPWA(isl::aff(ls, v));
+  }
+
+  llvm_unreachable("Unknowns SCEV was neither a parameter, a constant nor a "
+                   "valid instruction.");
 }
 
 PWACtx SCEVAffinator::complexityBailout() {
   // We hit the complexity limit for affine expressions; invalidate the scop
   // and return a constant zero.
   const DebugLoc &Loc = BB ? BB->getTerminator()->getDebugLoc() : DebugLoc();
   S->invalidate(COMPLEXITY, Loc);
   return visit(SE.getZero(Type::getInt32Ty(S->getFunction().getContext())));
 }

polly/lib/Support/SCEVValidator.cpp

if (Instruction *I = dyn_cast<Instruction>(Expr->getValue())) {
         return visitSRemInstruction(I, Expr);
       case Instruction::Call:
         return visitCallInstruction(I, Expr);
       default:
         return visitGenericInst(I, Expr);
       }
     }
 
+    if (Expr->getType()->isPointerTy()) {
+      if (isa<ConstantPointerNull>(V))
+        return ValidatorResult(SCEVType::INT); // "int"
+    }
+
     return ValidatorResult(SCEVType::PARAM, Expr);
   }
 };
 
 class SCEVHasIVParams {
   bool HasIVParams = false;
 
 public:

polly/test/Isl/CodeGen/partial_write_impossible_restriction.ll

 ; RUN: opt %loadPolly -polly-stmt-granularity=bb -polly-import-jscop -polly-import-jscop-postfix=transformed -polly-codegen -S < %s | FileCheck %s
 ;
 ; The isl scheduler isolates %cond.false into two instances.
 ; A partial write access in one of the instances was never executed,
 ; which caused problems when querying for its index expression, which
 ; is not available in that case.
 ;
 target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
 
-define void @partial_write_impossible_restriction() {
+define void @partial_write_impossible_restriction(i32* %.pn) {
 entry:
   br i1 undef, label %invoke.cont258, label %cond.true.i.i.i.i1007
 
 cond.true.i.i.i.i1007:
   br label %invoke.cont258
 
 invoke.cont258:
-  %.pn = phi i32* [ null, %cond.true.i.i.i.i1007 ], [ null, %entry ]
   br label %invoke.cont274
 
 invoke.cont274:                                   ; preds = %invoke.cont258
   %tmp4 = load i32*, i32** undef
   %tmp5 = load i32, i32* undef
   %tmp6 = zext i32 %tmp5 to i64
   %tmp7 = sext i32 %tmp5 to i64
   br label %for.body344
cond.end:                                         ; preds = %cond.false, %for.body344
   br i1 %cmp342, label %for.body344, label %if.then.i.i1141.loopexit
 
 if.then.i.i1141.loopexit:                         ; preds = %cond.end
   ret void
 }
 
 
 ; CHECK-LABEL: polly.stmt.cond.false:
-; CHECK:         %polly.access..pn2 = getelementptr i32, i32* %.pn, i64 %polly.indvar
-; CHECK:         store i32 %cond.in.sroa.speculate.load.cond.false_p_scalar_, i32* %polly.access..pn2, align 4, !alias.scope !0, !noalias !2
+; CHECK:         %polly.access..pn{{[0-9]*}} = getelementptr i32, i32* %.pn, i64 %polly.indvar
+; CHECK:         store i32 %cond.in.sroa.speculate.load.cond.false_p_scalar_, i32* %polly.access..pn{{[0-9]*}}, align 4, !alias.scope !0, !noalias !2
 ; CHECK:         br label %polly.merge
 
-; CHECK-LABEL: polly.stmt.cond.false11:
-; CHECK:         %polly.access..pn14 = getelementptr i32, i32* %.pn, i64 0
-; CHECK:         store i32 %cond.in.sroa.speculate.load.cond.false_p_scalar_13, i32* %polly.access..pn14, align 4, !alias.scope !0, !noalias !2
-; CHECK:         br label %polly.stmt.cond.end15
+; CHECK-LABEL: polly.stmt.cond.false{{[0-9]*}}:
+; CHECK:         %polly.access..pn{{[0-9]*}} = getelementptr i32, i32* %.pn, i64 0
+; CHECK:         store i32 %cond.in.sroa.speculate.load.cond.false_p_scalar_{{[0-9]*}}, i32* %polly.access..pn{{[0-9]*}}, align 4, !alias.scope !0, !noalias !2
+; CHECK:         br label %polly.stmt.cond.end{{[0-9]*}}

polly/test/Isl/CodeGen/scev_looking_through_bitcasts.ll

cond.end73.i:
   br label %bitmap_element_allocate.exit
 
 bitmap_element_allocate.exit:
   %tobool43 = icmp eq %structty* %b, null
   ret void
 }
 
 
-; CHECK:       polly.stmt.cond.end73.i:
-; CHECK-NEXT:   %0 = bitcast %structty** %b.s2a to i8**
-; CHECK-NEXT:   store i8* undef, i8** %0
+
+; CHECK:      polly.stmt.cond.end73.i:
+; CHECK-NEXT:   %scevgep = getelementptr i8, i8* null, i64 %a
+; CHECK-NEXT:   %scevgep1 = bitcast i8* %scevgep to %structty*
+; CHECK-NEXT:   store %structty* %scevgep1, %structty** %b.s2a, align 8
 ; CHECK-NEXT:   br label %polly.exiting