[RISCV] Prune unneeded indexed load/store pseudo instructions.

[craig.topper]

Summary

We were creating more combinations of value and index lmul than
we needed.

I've copied the loop structure used here from VPseudoAMOEI with
all data lmul values instead of just 32/64.

Similar can be done for segment loads/store, but we're testing
illegal combinations today that need to be cleaned up first.

[khchen]

LGTM! Thanks, I forget to update them when VPseudoAMOEI launch.

llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td

foreach lmul = MxSet<eew>.m in {
         def "E" # eew # "_V_" # LInfo # "_MASK" : VPseudoSLoadMask<vreg>;
       }
     }
   }
 }
 
 multiclass VPseudoILoad {
   foreach eew = EEWList in {
-    foreach lmul = MxList.m in
-    foreach idx_lmul = MxSet<eew>.m in {
+    foreach sew = EEWList in {
+      foreach lmul = MxSet<sew>.m in {
+        defvar octuple_lmul = octuple_from_str<lmul.MX>.ret;
+        // Calculate emul = eew * lmul / sew
+        defvar octuple_emul = !srl(!mul(eew, octuple_lmul), shift_amount<sew>.val);
+        if !and(!ge(octuple_emul, 1), !le(octuple_emul, 64)) then {
           defvar LInfo = lmul.MX;
+          defvar IdxLInfo = octuple_to_str<octuple_emul>.ret;
+          defvar idx_lmul = !cast<LMULInfo>("V_" # IdxLInfo);
           defvar Vreg = lmul.vrclass;
-      defvar IdxLInfo = idx_lmul.MX;
           defvar IdxVreg = idx_lmul.vrclass;
           let VLMul = lmul.value in {
             def "EI" # eew # "_V_" # IdxLInfo # "_" # LInfo : VPseudoILoadNoMask<Vreg, IdxVreg>;
             def "EI" # eew # "_V_" # IdxLInfo # "_" # LInfo # "_MASK" : VPseudoILoadMask<Vreg, IdxVreg>;
           }
         }
       }
     }
+  }
+}
 
 multiclass VPseudoUSStore {
   foreach eew = EEWList in {
     foreach lmul = MxSet<eew>.m in {
       defvar LInfo = lmul.MX;
       defvar vreg = lmul.vrclass;
       let VLMul = lmul.value in {
         def "E" # eew # "_V_" # LInfo : VPseudoUSStoreNoMask<vreg>;
foreach lmul = MxSet<eew>.m in {
         def "E" # eew # "_V_" # LInfo # "_MASK" : VPseudoSStoreMask<vreg>;
       }
     }
   }
 }
 
 multiclass VPseudoIStore {
   foreach eew = EEWList in {
-    foreach lmul = MxList.m in
-    foreach idx_lmul = MxSet<eew>.m in {
+    foreach sew = EEWList in {
+      foreach lmul = MxSet<sew>.m in {
+        defvar octuple_lmul = octuple_from_str<lmul.MX>.ret;
+        // Calculate emul = eew * lmul / sew
+        defvar octuple_emul = !srl(!mul(eew, octuple_lmul), shift_amount<sew>.val);
+        if !and(!ge(octuple_emul, 1), !le(octuple_emul, 64)) then {
           defvar LInfo = lmul.MX;
+          defvar IdxLInfo = octuple_to_str<octuple_emul>.ret;
+          defvar idx_lmul = !cast<LMULInfo>("V_" # IdxLInfo);
           defvar Vreg = lmul.vrclass;
-      defvar IdxLInfo = idx_lmul.MX;
           defvar IdxVreg = idx_lmul.vrclass;
           let VLMul = lmul.value in {
             def "EI" # eew # "_V_" # IdxLInfo # "_" # LInfo :
               VPseudoIStoreNoMask<Vreg, IdxVreg>;
             def "EI" # eew # "_V_" # IdxLInfo # "_" # LInfo # "_MASK" :
               VPseudoIStoreMask<Vreg, IdxVreg>;
           }
         }
       }
     }
+  }
+}
 
 multiclass VPseudoUnaryS_M {
   foreach mti = AllMasks in
   {
     let VLMul = mti.LMul.value in {
       def "_M_" # mti.BX : VPseudoUnaryNoMask<GPR, VR>;
       def "_M_" # mti.BX # "_MASK" : VPseudoMaskUnarySOutMask;
     }