[lldb] [Process/FreeBSDRemote] Introduce aarch64 hw break/watchpoint support

[mgorny]

Summary

Split out the common base of Linux hardware breakpoint/watchpoint
support for AArch64 into a Utility class, and use it to implement
the matching support on FreeBSD.

[mgorny]

@labath, the Linux/common part is working here. FreeBSD is still pending further kernel changes, so I'm not going to commit it until all the kernel patches are committed, and then I'll add appropriate #ifs.

In the meantime, please review the utility part. This is roughly the Linux code, minus the two functions to read/write dbregs, and… I've just realized that getters for number of break/watchpoints can be made common now. So another update incoming soon. In any case, the only real change in the code is using llvm::Error in new API.

[mgorny]

Move NumSupportedHardwareBreakpoints and NumSupportedHardwareWatchpoints into the shared code.

[mgorny]

Switch to LLDB_LOG_ERROR.

[labath]

I'm torn about the ReadHardwareDebugInfo interface. On one hand, there's no use case now for distinguishing the failure to retrieve breakpoint info from successfully determining that we support zero breakpoints. So we could make the function return void, move the log statement into the function, and simplify a bunch of stuff. OTOH, if those functions are later changed to propagate errors, they would become simpler too, and we might be able to forward this error all the way to the user...

Apart from that, I think this is fine, but maybe @omjavaid could take a quick look.

lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.h

67–68

maybe Optional<dbreg>

[mgorny]

lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.h

67–68

Tried it but it feels really artificial here. I think the bool is both cleaner and results in less code.

[mgorny]

Ok, the changes have landed in FreeBSD src, so I think we're ready to go here.

Changes from previous version:

• enabled hardware breakpoints on FreeBSD
• changed the existing names to use hbp consistently (instead of mix of hbp and hbr)
• added FreeBSD version checks

[mgorny]

Oh, and added the method to copy dbregs to new threads.

[mgorny]

clang-format.

[mhorne]

The FreeBSD API usage looks correct to me, but I can't comment on too much more than that. The code could benefit from fewer unnamed constants.

I should also note that it is my intention to merge the FreeBSD watchpoint patches into the 13.0 branch, in about a week's time. So your __FreeBSD_version checks will need to be updated after that point.

lldb/source/Plugins/Process/Utility/NativeRegisterContextBreakWatchpoint_arm64.cpp

57 ↗

(On Diff #324394)

These magic numbers would be better with names. I see quite a few instances of checking/setting the enable bit, but it is not obvious what is being done unless you already understand the control register layout.

[tatyana-krasnukha]

clang-tidy would not be happy;)

lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp

663–664

Redundant else after return.

lldb/source/Plugins/Process/Utility/NativeRegisterContextBreakWatchpoint_arm64.cpp

441 ↗

(On Diff #324394)

Redundant else after return.

456 ↗

(On Diff #324394)

Redundant else after return.

[omjavaid]

This looks fine to me builds ok on AArch64/Linux with no testsuite regressions.

I am wondering Whats the need for version checks? you are excluding hardware breakpoint mangement code from the build but then that lldb-server executable may well run on FreeBSD version which actually supports HW breakpoints. Isnt there a dynamic way of checking support for hardware break/watch points. May be query hardware debug registers and if it fails just disable hardware breakpoints for that thread.

Moreover, can we shrink class name NativeRegisterContextBreakWatchpoint_arm64 to may be NativeDebugRegisterContext_arm64.

[mgorny]

In D96548#2572770, @omjavaid wrote:

I am wondering Whats the need for version checks? you are excluding hardware breakpoint mangement code from the build but then that lldb-server executable may well run on FreeBSD version which actually supports HW breakpoints. Isnt there a dynamic way of checking support for hardware break/watch points. May be query hardware debug registers and if it fails just disable hardware breakpoints for that thread.

The code relies on struct members that are only present with this version. I'd like to avoid copying implementation details like that into the code.

Moreover, can we shrink class name NativeRegisterContextBreakWatchpoint_arm64 to may be NativeDebugRegisterContext_arm64.

I generally leave naming decisions to @labath ;-).

[omjavaid]

In D96548#2573245, @mgorny wrote:

In D96548#2572770, @omjavaid wrote:

I am wondering Whats the need for version checks? you are excluding hardware breakpoint mangement code from the build but then that lldb-server executable may well run on FreeBSD version which actually supports HW breakpoints. Isnt there a dynamic way of checking support for hardware break/watch points. May be query hardware debug registers and if it fails just disable hardware breakpoints for that thread.

The code relies on struct members that are only present with this version. I'd like to avoid copying implementation details like that into the code.

Only concern here is that someone might be cross-compiling lldb-server on an older system but eventually using it on a target which supports HW break/watchpoints. What chances do you think we have for such a scenario? if this is rare then this should be ok.

Moreover, can we shrink class name NativeRegisterContextBreakWatchpoint_arm64 to may be NativeDebugRegisterContext_arm64.

I generally leave naming decisions to @labath ;-).

Lets see what @labath has to say... IMO Debug Register is a general term used in other architecture specs for referring to hardware debug capabilities like breakpoints watchpoints etc.

[mgorny]

In D96548#2573954, @omjavaid wrote:

In D96548#2573245, @mgorny wrote:

In D96548#2572770, @omjavaid wrote:

I am wondering Whats the need for version checks? you are excluding hardware breakpoint mangement code from the build but then that lldb-server executable may well run on FreeBSD version which actually supports HW breakpoints. Isnt there a dynamic way of checking support for hardware break/watch points. May be query hardware debug registers and if it fails just disable hardware breakpoints for that thread.

The code relies on struct members that are only present with this version. I'd like to avoid copying implementation details like that into the code.

Only concern here is that someone might be cross-compiling lldb-server on an older system but eventually using it on a target which supports HW break/watchpoints. What chances do you think we have for such a scenario? if this is rare then this should be ok.

I don't think it's very likely. @emaste, any opinion on this?

Moreover, can we shrink class name NativeRegisterContextBreakWatchpoint_arm64 to may be NativeDebugRegisterContext_arm64.

I generally leave naming decisions to @labath ;-).

Lets see what @labath has to say... IMO Debug Register is a general term used in other architecture specs for referring to hardware debug capabilities like breakpoints watchpoints etc.

I agree. For consistency with the x86 class, maybe NativeRegisterContextDBReg_arm64? I wonder if we should rename the x86 class too.

[mgorny]

In D96548#2571489, @mhorne wrote:

I should also note that it is my intention to merge the FreeBSD watchpoint patches into the 13.0 branch, in about a week's time. So your __FreeBSD_version checks will need to be updated after that point.

Do you have any suggestion how we could check for kernel version from Python at runtime? (to determine whether we should expect watchpoint tests to work)

[mgorny]

lldb/source/Plugins/Process/Utility/NativeRegisterContextBreakWatchpoint_arm64.cpp

248 ↗

(On Diff #324394)

That's something to consider for a followup work but I'm thinking that instead of changing size here we could set bit-mask appropriately to watch only the exact bytes we need. If I read the manual correctly (https://developer.arm.com/documentation/ddi0595/2020-12/AArch64-Registers/DBGWCR-n--EL1--Debug-Watchpoint-Control-Registers?lang=en#fieldset_0-12_5), this should be doable.

e.g. if addr = 0x2002 and size = 2 ,
we currently set addr = 0x2000 and size = 4 and therefore watch 0x2000..0x2003
but we could instead set BAS to 0b00001100 to watch 0x2002..0x2003.

Am I grasping this correctly?

[mgorny]

• fixed broken FreeBSD release check in lldb
• fixed UB in FreeBSD's bp/wp impl
• implemented changes requested in comments
• refactored bp/wp code to use a few helper constants and utility functions

Please let me know if you think I should change more stuff here.

[labath]

In D96548#2574437, @mgorny wrote:

In D96548#2571489, @mhorne wrote:

I should also note that it is my intention to merge the FreeBSD watchpoint patches into the 13.0 branch, in about a week's time. So your __FreeBSD_version checks will need to be updated after that point.

Do you have any suggestion how we could check for kernel version from Python at runtime? (to determine whether we should expect watchpoint tests to work)

SBPlatform::GetOS{Major,Minor,Update}Version ?

In D96548#2574060, @mgorny wrote:

In D96548#2573954, @omjavaid wrote:

In D96548#2573245, @mgorny wrote:

Moreover, can we shrink class name NativeRegisterContextBreakWatchpoint_arm64 to may be NativeDebugRegisterContext_arm64.

I generally leave naming decisions to @labath ;-).

Lets see what @labath has to say... IMO Debug Register is a general term used in other architecture specs for referring to hardware debug capabilities like breakpoints watchpoints etc.

I agree. For consistency with the x86 class, maybe NativeRegisterContextDBReg_arm64? I wonder if we should rename the x86 class too.

Sounds reasonable to me. Renaming the x86 class as well would be great.

[mgorny]

In D96548#2577762, @labath wrote:

In D96548#2574437, @mgorny wrote:

In D96548#2571489, @mhorne wrote:

I should also note that it is my intention to merge the FreeBSD watchpoint patches into the 13.0 branch, in about a week's time. So your __FreeBSD_version checks will need to be updated after that point.

Do you have any suggestion how we could check for kernel version from Python at runtime? (to determine whether we should expect watchpoint tests to work)

SBPlatform::GetOS{Major,Minor,Update}Version ?

That comes from uname as well, so no difference. However, I'm going to replace the current code with it for reuse.

In D96548#2574060, @mgorny wrote:

In D96548#2573954, @omjavaid wrote:

In D96548#2573245, @mgorny wrote:

Moreover, can we shrink class name NativeRegisterContextBreakWatchpoint_arm64 to may be NativeDebugRegisterContext_arm64.

I generally leave naming decisions to @labath ;-).

Lets see what @labath has to say... IMO Debug Register is a general term used in other architecture specs for referring to hardware debug capabilities like breakpoints watchpoints etc.

I agree. For consistency with the x86 class, maybe NativeRegisterContextDBReg_arm64? I wonder if we should rename the x86 class too.

Sounds reasonable to me. Renaming the x86 class as well would be great.

I'll do x86 as a separate patch.

[mgorny]

Renamed the utility class/file and switched the test to use SBPlatform.

[emaste]

I don't think it's very likely. @emaste, any opinion on this?

I think it is fine to make this conditional on version. We are working on bringing arm64 to Tier-1 status in FreeBSD 13 (which will have the referenced kernel changes) and we can assume that as a minimum version for host and target.

[mgorny]

Gentle ping.

[mgorny]

Updated version conditions since watchpoint support was backported to FreeBSD 13.0-BETA4

[mhorne]

lldb/packages/Python/lldbsuite/test/dotest.py

807

It seems like this should become 13.0.

lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.h

28

This is technically correct, but I don't think it's important to make provisions for versions 1400000 to 1400004. The reason is that these represent development versions in a < 2 month time period. Anyone affected by this would simply be asked to update their kernel to a more recent snapshot.

__FreeBSD_version >= 1300139 should be enough.

[mgorny]

Updated to enable on FreeBSD 13+ unconditionally. I've left the #define to avoid repeating the version in a few places.

lldb/packages/Python/lldbsuite/test/dotest.py

if platform == "netbsd":
         try:
             output = subprocess.check_output(["/sbin/sysctl", "-n",
               "security.models.extensions.user_set_dbregs"]).decode().strip()
             if output == "1":
                 return True, "security.models.extensions.user_set_dbregs enabled"
         except subprocess.CalledProcessError:
             pass
         return False, "security.models.extensions.user_set_dbregs disabled"
+    elif platform == "freebsd" and configuration.arch == "aarch64":
+        import lldb
+        if lldb.SBPlatform.GetHostPlatform().GetOSMajorVersion() < 13:
+            return False, "Watchpoint support on arm64 requires FreeBSD 13.0"
     return True, "watchpoint support available"
 
 def checkWatchpointSupport():
     result, reason = canRunWatchpointTests()
     if result:
         return # watchpoints supported
     if "watchpoint" in configuration.categories_list:
         return # watchpoint category explicitly requested, let it run.

lldb/source/Plugins/Process/FreeBSD/NativeProcessFreeBSD.cpp

void NativeProcessFreeBSD::MonitorSIGTRAP(lldb::pid_t pid) {
 
   if (info.pl_flags & PL_FLAG_SI) {
     assert(info.pl_siginfo.si_signo == SIGTRAP);
     LLDB_LOG(log, "SIGTRAP siginfo: si_code = {0}, pid = {1}",
              info.pl_siginfo.si_code, info.pl_siginfo.si_pid);
 
     switch (info.pl_siginfo.si_code) {
     case TRAP_BRKPT:
+      LLDB_LOG(log, "SIGTRAP/TRAP_BRKPT: si_addr: {0}",
+               info.pl_siginfo.si_addr);
+
       if (thread) {
         auto thread_info =
             m_threads_stepping_with_breakpoint.find(thread->GetID());
         if (thread_info != m_threads_stepping_with_breakpoint.end()) {
           thread->SetStoppedByTrace();
           Status brkpt_error = RemoveBreakpoint(thread_info->second);
           if (brkpt_error.Fail())
             LLDB_LOG(log, "pid = {0} remove stepping breakpoint: {1}",
                      thread_info->first, brkpt_error);
           m_threads_stepping_with_breakpoint.erase(thread_info);
         } else
           thread->SetStoppedByBreakpoint();
         FixupBreakpointPCAsNeeded(*thread);
       }
       SetState(StateType::eStateStopped, true);
       return;
     case TRAP_TRACE:
+      LLDB_LOG(log, "SIGTRAP/TRAP_TRACE: si_addr: {0}",
+               info.pl_siginfo.si_addr);
+
       if (thread) {
         auto &regctx = static_cast<NativeRegisterContextFreeBSD &>(
             thread->GetRegisterContext());
         uint32_t wp_index = LLDB_INVALID_INDEX32;
-        Status error =
-            regctx.GetWatchpointHitIndex(wp_index, LLDB_INVALID_ADDRESS);
+        Status error = regctx.GetWatchpointHitIndex(
+            wp_index, reinterpret_cast<uintptr_t>(info.pl_siginfo.si_addr));
         if (error.Fail())
           LLDB_LOG(log,
                    "received error while checking for watchpoint hits, pid = "
                    "{0}, LWP = {1}, error = {2}",
                    pid, info.pl_lwpid, error);
         if (wp_index != LLDB_INVALID_INDEX32) {
           regctx.ClearWatchpointHit(wp_index);
           thread->SetStoppedByWatchpoint(wp_index);
Status NativeProcessFreeBSD::PopulateMemoryRegionCache() {
 
   return Status();
 }
 
 size_t NativeProcessFreeBSD::UpdateThreads() { return m_threads.size(); }
 
 Status NativeProcessFreeBSD::SetBreakpoint(lldb::addr_t addr, uint32_t size,
                                            bool hardware) {
   if (hardware)
-    return Status("NativeProcessFreeBSD does not support hardware breakpoints");
-  else
-    return SetSoftwareBreakpoint(addr, size);
+    return SetHardwareBreakpoint(addr, size);
 }
 
 Status NativeProcessFreeBSD::GetLoadedModuleFileSpec(const char *module_path,
                                                      FileSpec &file_spec) {
   Status error = PopulateMemoryRegionCache();
   if (error.Fail())
     return error;
 

lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.h

 //===-- NativeRegisterContextFreeBSD_arm64.h --------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #if defined(__aarch64__)
 
 #ifndef lldb_NativeRegisterContextFreeBSD_arm64_h
 #define lldb_NativeRegisterContextFreeBSD_arm64_h
 
 // clang-format off
 #include <sys/types.h>
+#include <sys/param.h>
 #include <machine/reg.h>
 // clang-format on
 
 #include "Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD.h"
+#include "Plugins/Process/Utility/NativeRegisterContextDBReg_arm64.h"
 #include "Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h"
 
 #include <array>
 
+#if __FreeBSD_version >= 1300139
+#  define LLDB_HAS_FREEBSD_WATCHPOINT 1
+#endif
+
 namespace lldb_private {
 namespace process_freebsd {
 
 class NativeProcessFreeBSD;
 
-class NativeRegisterContextFreeBSD_arm64 : public NativeRegisterContextFreeBSD {
+class NativeRegisterContextFreeBSD_arm64
+    : public NativeRegisterContextFreeBSD,
+      public NativeRegisterContextDBReg_arm64 {
 public:
   NativeRegisterContextFreeBSD_arm64(const ArchSpec &target_arch,
                                      NativeThreadProtocol &native_thread);
 
   uint32_t GetRegisterSetCount() const override;
 
   uint32_t GetUserRegisterCount() const override;
 
public:
   CopyHardwareWatchpointsFrom(NativeRegisterContextFreeBSD &source) override;
 
 private:
   // Due to alignment, FreeBSD reg/fpreg are a few bytes larger than
   // LLDB's GPR/FPU structs.  However, all fields have matching offsets
   // and sizes, so we do not have to worry about these (and we have
   // a unittest to assert that).
   std::array<uint8_t, sizeof(reg) + sizeof(fpreg)> m_reg_data;
+#ifdef LLDB_HAS_FREEBSD_WATCHPOINT
+  dbreg m_dbreg;
+  bool m_read_dbreg;
+#endif
 
   Status ReadRegisterSet(uint32_t set);
   Status WriteRegisterSet(uint32_t set);
 
+  llvm::Error ReadHardwareDebugInfo() override;
+  llvm::Error WriteHardwareDebugRegs(DREGType hwbType) override;
+
   RegisterInfoPOSIX_arm64 &GetRegisterInfo() const;
 };
 
 } // namespace process_freebsd
 } // namespace lldb_private
 
 #endif // #ifndef lldb_NativeRegisterContextFreeBSD_arm64_h
 
 #endif // defined (__aarch64__)

lldb/source/Plugins/Process/FreeBSD/NativeRegisterContextFreeBSD_arm64.cpp

 
 #include "NativeRegisterContextFreeBSD_arm64.h"
 
 #include "lldb/Utility/DataBufferHeap.h"
 #include "lldb/Utility/RegisterValue.h"
 #include "lldb/Utility/Status.h"
 
 #include "Plugins/Process/FreeBSD/NativeProcessFreeBSD.h"
+#include "Plugins/Process/POSIX/ProcessPOSIXLog.h"
 #include "Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h"
 
 // clang-format off
 #include <sys/param.h>
 #include <sys/ptrace.h>
 #include <sys/types.h>
 // clang-format on
 
 using namespace lldb;
 using namespace lldb_private;
 using namespace lldb_private::process_freebsd;
 
 NativeRegisterContextFreeBSD *
 NativeRegisterContextFreeBSD::CreateHostNativeRegisterContextFreeBSD(
     const ArchSpec &target_arch, NativeThreadProtocol &native_thread) {
   return new NativeRegisterContextFreeBSD_arm64(target_arch, native_thread);
 }
 
 NativeRegisterContextFreeBSD_arm64::NativeRegisterContextFreeBSD_arm64(
     const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
     : NativeRegisterContextRegisterInfo(
-          native_thread, new RegisterInfoPOSIX_arm64(target_arch)) {
+          native_thread, new RegisterInfoPOSIX_arm64(target_arch))
+#ifdef LLDB_HAS_FREEBSD_WATCHPOINT
+      ,
+      m_read_dbreg(false)
+#endif
+{
   GetRegisterInfo().ConfigureVectorRegisterInfos(
       RegisterInfoPOSIX_arm64::eVectorQuadwordAArch64);
+  ::memset(&m_hwp_regs, 0, sizeof(m_hwp_regs));
+  ::memset(&m_hbp_regs, 0, sizeof(m_hbp_regs));
 }
 
 RegisterInfoPOSIX_arm64 &
 NativeRegisterContextFreeBSD_arm64::GetRegisterInfo() const {
   return static_cast<RegisterInfoPOSIX_arm64 &>(*m_register_info_interface_up);
 }
 
 uint32_t NativeRegisterContextFreeBSD_arm64::GetRegisterSetCount() const {
Status NativeRegisterContextFreeBSD_arm64::WriteAllRegisterValues(
   if (error.Fail())
     return error;
 
   return WriteRegisterSet(RegisterInfoPOSIX_arm64::FPRegSet);
 }
 
 llvm::Error NativeRegisterContextFreeBSD_arm64::CopyHardwareWatchpointsFrom(
     NativeRegisterContextFreeBSD &source) {
+#ifdef LLDB_HAS_FREEBSD_WATCHPOINT
+  auto &r_source = static_cast<NativeRegisterContextFreeBSD_arm64 &>(source);
+  llvm::Error error = r_source.ReadHardwareDebugInfo();
+  if (error)
+    return error;
+
+  m_dbreg = r_source.m_dbreg;
+  m_hbp_regs = r_source.m_hbp_regs;
+  m_hwp_regs = r_source.m_hwp_regs;
+  m_max_hbp_supported = r_source.m_max_hbp_supported;
+  m_max_hwp_supported = r_source.m_max_hwp_supported;
+  m_read_dbreg = true;
+
+  // on FreeBSD this writes both breakpoints and watchpoints
+  return WriteHardwareDebugRegs(eDREGTypeWATCH);
+#else
   return llvm::Error::success();
+#endif
+}
+
+llvm::Error NativeRegisterContextFreeBSD_arm64::ReadHardwareDebugInfo() {
+#ifdef LLDB_HAS_FREEBSD_WATCHPOINT
+  Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_REGISTERS));
+
+  // we're fully stateful, so no need to reread control registers ever
+  if (m_read_dbreg)
+    return llvm::Error::success();
+
+  Status res = NativeProcessFreeBSD::PtraceWrapper(PT_GETDBREGS,
+                                                   m_thread.GetID(), &m_dbreg);
+  if (res.Fail())
+    return res.ToError();
+
+  LLDB_LOG(log, "m_dbreg read: debug_ver={0}, nbkpts={1}, nwtpts={2}",
+           m_dbreg.db_debug_ver, m_dbreg.db_nbkpts, m_dbreg.db_nwtpts);
+  m_max_hbp_supported = m_dbreg.db_nbkpts;
+  m_max_hwp_supported = m_dbreg.db_nwtpts;
+  assert(m_max_hbp_supported <= m_hbp_regs.size());
+  assert(m_max_hwp_supported <= m_hwp_regs.size());
+
+  m_read_dbreg = true;
+  return llvm::Error::success();
+#else
+  return llvm::createStringError(
+      llvm::inconvertibleErrorCode(),
+      "Hardware breakpoints/watchpoints require FreeBSD 14.0");
+#endif
+}
+
+llvm::Error
+NativeRegisterContextFreeBSD_arm64::WriteHardwareDebugRegs(DREGType) {
+#ifdef LLDB_HAS_FREEBSD_WATCHPOINT
+  assert(m_read_dbreg && "dbregs must be read before writing them back");
+
+  // copy data from m_*_regs to m_dbreg before writing it back
+  for (uint32_t i = 0; i < m_max_hbp_supported; i++) {
+    m_dbreg.db_breakregs[i].dbr_addr = m_hbp_regs[i].address;
+    m_dbreg.db_breakregs[i].dbr_ctrl = m_hbp_regs[i].control;
+  }
+  for (uint32_t i = 0; i < m_max_hwp_supported; i++) {
+    m_dbreg.db_watchregs[i].dbw_addr = m_hwp_regs[i].address;
+    m_dbreg.db_watchregs[i].dbw_ctrl = m_hwp_regs[i].control;
+  }
+
+  return NativeProcessFreeBSD::PtraceWrapper(PT_SETDBREGS, m_thread.GetID(),
+                                             &m_dbreg)
+      .ToError();
+#else
+  return llvm::createStringError(
+      llvm::inconvertibleErrorCode(),
+      "Hardware breakpoints/watchpoints require FreeBSD 14.0");
+#endif
 }
 
 #endif // defined (__aarch64__)

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.h

 //===-- NativeRegisterContextLinux_arm64.h ---------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #if defined(__arm64__) || defined(__aarch64__)
 
 #ifndef lldb_NativeRegisterContextLinux_arm64_h
 #define lldb_NativeRegisterContextLinux_arm64_h
 
 #include "Plugins/Process/Linux/NativeRegisterContextLinux.h"
+#include "Plugins/Process/Utility/NativeRegisterContextDBReg_arm64.h"
 #include "Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h"
 
 #include <asm/ptrace.h>
 
 namespace lldb_private {
 namespace process_linux {
 
 class NativeProcessLinux;
 
-class NativeRegisterContextLinux_arm64 : public NativeRegisterContextLinux {
+class NativeRegisterContextLinux_arm64
+    : public NativeRegisterContextLinux,
+      public NativeRegisterContextDBReg_arm64 {
 public:
   NativeRegisterContextLinux_arm64(const ArchSpec &target_arch,
                                    NativeThreadProtocol &native_thread);
 
   uint32_t GetRegisterSetCount() const override;
 
   uint32_t GetUserRegisterCount() const override;
 
public:
 
   void InvalidateAllRegisters() override;
 
   std::vector<uint32_t>
   GetExpeditedRegisters(ExpeditedRegs expType) const override;
 
   bool RegisterOffsetIsDynamic() const override { return true; }
 
-  // Hardware breakpoints/watchpoint management functions
-
-  uint32_t NumSupportedHardwareBreakpoints() override;
-
-  uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
-
-  bool ClearHardwareBreakpoint(uint32_t hw_idx) override;
-
-  Status ClearAllHardwareBreakpoints() override;
-
-  Status GetHardwareBreakHitIndex(uint32_t &bp_index,
-                                  lldb::addr_t trap_addr) override;
-
-  uint32_t NumSupportedHardwareWatchpoints() override;
-
-  uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size,
-                                 uint32_t watch_flags) override;
-
-  bool ClearHardwareWatchpoint(uint32_t hw_index) override;
-
-  Status ClearAllHardwareWatchpoints() override;
-
-  Status GetWatchpointHitIndex(uint32_t &wp_index,
-                               lldb::addr_t trap_addr) override;
-
-  lldb::addr_t GetWatchpointHitAddress(uint32_t wp_index) override;
-
-  lldb::addr_t GetWatchpointAddress(uint32_t wp_index) override;
-
-  uint32_t GetWatchpointSize(uint32_t wp_index);
-
-  bool WatchpointIsEnabled(uint32_t wp_index);
-
-  // Debug register type select
-  enum DREGType { eDREGTypeWATCH = 0, eDREGTypeBREAK };
-
 protected:
-
   Status ReadGPR() override;
 
   Status WriteGPR() override;
 
   Status ReadFPR() override;
 
   Status WriteFPR() override;
 
private:
 
   RegisterInfoPOSIX_arm64::FPU
       m_fpr; // floating-point registers including extended register sets.
 
   SVEState m_sve_state;
   struct user_sve_header m_sve_header;
   std::vector<uint8_t> m_sve_ptrace_payload;
 
-  // Debug register info for hardware breakpoints and watchpoints management.
-  struct DREG {
-    lldb::addr_t address;  // Breakpoint/watchpoint address value.
-    lldb::addr_t hit_addr; // Address at which last watchpoint trigger exception
-                           // occurred.
-    lldb::addr_t real_addr; // Address value that should cause target to stop.
-    uint32_t control;       // Breakpoint/watchpoint control value.
-    uint32_t refcount;      // Serves as enable/disable and reference counter.
-  };
-
-  struct DREG m_hbr_regs[16]; // Arm native linux hardware breakpoints
-  struct DREG m_hwp_regs[16]; // Arm native linux hardware watchpoints
-
-  uint32_t m_max_hwp_supported;
-  uint32_t m_max_hbp_supported;
   bool m_refresh_hwdebug_info;
 
   bool IsGPR(unsigned reg) const;
 
   bool IsFPR(unsigned reg) const;
 
   Status ReadAllSVE();
 
private:
   void *GetSVEHeader() { return &m_sve_header; }
 
   void *GetSVEBuffer();
 
   size_t GetSVEHeaderSize() { return sizeof(m_sve_header); }
 
   size_t GetSVEBufferSize() { return m_sve_ptrace_payload.size(); }
 
-  Status ReadHardwareDebugInfo();
+  llvm::Error ReadHardwareDebugInfo() override;
 
-  Status WriteHardwareDebugRegs(int hwbType);
+  llvm::Error WriteHardwareDebugRegs(DREGType hwbType) override;
 
   uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const;
 
   RegisterInfoPOSIX_arm64 &GetRegisterInfo() const;
 
   void ConfigureRegisterContext();
 
   uint32_t CalculateSVEOffset(const RegisterInfo *reg_info) const;
 };
 
 } // namespace process_linux
 } // namespace lldb_private
 
 #endif // #ifndef lldb_NativeRegisterContextLinux_arm64_h
 
 #endif // defined (__arm64__) || defined (__aarch64__)

lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm64.cpp

 
 NativeRegisterContextLinux_arm64::NativeRegisterContextLinux_arm64(
     const ArchSpec &target_arch, NativeThreadProtocol &native_thread)
     : NativeRegisterContextRegisterInfo(
           native_thread, new RegisterInfoPOSIX_arm64(target_arch)) {
   ::memset(&m_fpr, 0, sizeof(m_fpr));
   ::memset(&m_gpr_arm64, 0, sizeof(m_gpr_arm64));
   ::memset(&m_hwp_regs, 0, sizeof(m_hwp_regs));
-  ::memset(&m_hbr_regs, 0, sizeof(m_hbr_regs));
+  ::memset(&m_hbp_regs, 0, sizeof(m_hbp_regs));
   ::memset(&m_sve_header, 0, sizeof(m_sve_header));
 
   // 16 is just a maximum value, query hardware for actual watchpoint count
   m_max_hwp_supported = 16;
   m_max_hbp_supported = 16;
 
   m_refresh_hwdebug_info = true;
 

 
 bool NativeRegisterContextLinux_arm64::IsSVE(unsigned reg) const {
   if (GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
       RegisterInfoPOSIX_arm64::SVERegSet)
     return true;
   return false;
 }
 
-uint32_t NativeRegisterContextLinux_arm64::NumSupportedHardwareBreakpoints() {
-  Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_BREAKPOINTS));
-
-  LLDB_LOGF(log, "NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
-
-  Status error;
-
-  // Read hardware breakpoint and watchpoint information.
-  error = ReadHardwareDebugInfo();
-
-  if (error.Fail())
-    return 0;
-
-  return m_max_hbp_supported;
-}
-
-uint32_t
-NativeRegisterContextLinux_arm64::SetHardwareBreakpoint(lldb::addr_t addr,
-                                                        size_t size) {
-  Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_BREAKPOINTS));
-  LLDB_LOG(log, "addr: {0:x}, size: {1:x}", addr, size);
-
-  // Read hardware breakpoint and watchpoint information.
-  Status error = ReadHardwareDebugInfo();
-
-  if (error.Fail())
-    return LLDB_INVALID_INDEX32;
-
-  uint32_t control_value = 0, bp_index = 0;
-
-  // Check if size has a valid hardware breakpoint length.
-  if (size != 4)
-    return LLDB_INVALID_INDEX32; // Invalid size for a AArch64 hardware
-                                 // breakpoint
-
-  // Check 4-byte alignment for hardware breakpoint target address.
-  if (addr & 0x03)
-    return LLDB_INVALID_INDEX32; // Invalid address, should be 4-byte aligned.
-
-  // Setup control value
-  control_value = 0;
-  control_value |= ((1 << size) - 1) << 5;
-  control_value |= (2 << 1) | 1;
-
-  // Iterate over stored breakpoints and find a free bp_index
-  bp_index = LLDB_INVALID_INDEX32;
-  for (uint32_t i = 0; i < m_max_hbp_supported; i++) {
-    if ((m_hbr_regs[i].control & 1) == 0) {
-      bp_index = i; // Mark last free slot
-    } else if (m_hbr_regs[i].address == addr) {
-      return LLDB_INVALID_INDEX32; // We do not support duplicate breakpoints.
-    }
-  }
-
-  if (bp_index == LLDB_INVALID_INDEX32)
-    return LLDB_INVALID_INDEX32;
-
-  // Update breakpoint in local cache
-  m_hbr_regs[bp_index].real_addr = addr;
-  m_hbr_regs[bp_index].address = addr;
-  m_hbr_regs[bp_index].control = control_value;
-
-  // PTRACE call to set corresponding hardware breakpoint register.
-  error = WriteHardwareDebugRegs(eDREGTypeBREAK);
-
-  if (error.Fail()) {
-    m_hbr_regs[bp_index].address = 0;
-    m_hbr_regs[bp_index].control &= ~1;
-
-    return LLDB_INVALID_INDEX32;
-  }
-
-  return bp_index;
-}
-
-bool NativeRegisterContextLinux_arm64::ClearHardwareBreakpoint(
-    uint32_t hw_idx) {
-  Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_BREAKPOINTS));
-  LLDB_LOG(log, "hw_idx: {0}", hw_idx);
-
-  // Read hardware breakpoint and watchpoint information.
-  Status error = ReadHardwareDebugInfo();
-
-  if (error.Fail())
-    return false;
-
-  if (hw_idx >= m_max_hbp_supported)
-    return false;
-
-  // Create a backup we can revert to in case of failure.
-  lldb::addr_t tempAddr = m_hbr_regs[hw_idx].address;
-  uint32_t tempControl = m_hbr_regs[hw_idx].control;
-
-  m_hbr_regs[hw_idx].control &= ~1;
-  m_hbr_regs[hw_idx].address = 0;
-
-  // PTRACE call to clear corresponding hardware breakpoint register.
-  error = WriteHardwareDebugRegs(eDREGTypeBREAK);
-
-  if (error.Fail()) {
-    m_hbr_regs[hw_idx].control = tempControl;
-    m_hbr_regs[hw_idx].address = tempAddr;
-
-    return false;
-  }
-
-  return true;
-}
-
-Status NativeRegisterContextLinux_arm64::GetHardwareBreakHitIndex(
-    uint32_t &bp_index, lldb::addr_t trap_addr) {
-  Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_BREAKPOINTS));
-
-  LLDB_LOGF(log, "NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
-
-  lldb::addr_t break_addr;
-
-  for (bp_index = 0; bp_index < m_max_hbp_supported; ++bp_index) {
-    break_addr = m_hbr_regs[bp_index].address;
-
-    if ((m_hbr_regs[bp_index].control & 0x1) && (trap_addr == break_addr)) {
-      m_hbr_regs[bp_index].hit_addr = trap_addr;
-      return Status();
-    }
-  }
-
-  bp_index = LLDB_INVALID_INDEX32;
-  return Status();
-}
-
-Status NativeRegisterContextLinux_arm64::ClearAllHardwareBreakpoints() {
-  Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_BREAKPOINTS));
-
-  LLDB_LOGF(log, "NativeRegisterContextLinux_arm64::%s()", __FUNCTION__);
-
-  Status error;
-
-  // Read hardware breakpoint and watchpoint information.
-  error = ReadHardwareDebugInfo();
-
-  if (error.Fail())
-    return error;
-
-  lldb::addr_t tempAddr = 0;
-  uint32_t tempControl = 0;
-
-  for (uint32_t i = 0; i < m_max_hbp_supported; i++) {
-    if (m_hbr_regs[i].control & 0x01) {
-      // Create a backup we can revert to in case of failure.
-      tempAddr = m_hbr_regs[i].address;
-      tempControl = m_hbr_regs[i].control;
-
-      // Clear watchpoints in local cache
-      m_hbr_regs[i].control &= ~1;
-      m_hbr_regs[i].address = 0;
-
-      // Ptrace call to update hardware debug registers
-      error = WriteHardwareDebugRegs(eDREGTypeBREAK);
-
-      if (error.Fail()) {
-        m_hbr_regs[i].control = tempControl;
-        m_hbr_regs[i].address = tempAddr;
-
-        return error;
-      }
-    }
-  }
-
-  return Status();
-}
-
-uint32_t NativeRegisterContextLinux_arm64::NumSupportedHardwareWatchpoints() {
-  Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS));
-
-  // Read hardware breakpoint and watchpoint information.
-  Status error = ReadHardwareDebugInfo();
-
-  if (error.Fail())
-    return 0;
-
-  LLDB_LOG(log, "{0}", m_max_hwp_supported);
-  return m_max_hwp_supported;
-}
-
-uint32_t NativeRegisterContextLinux_arm64::SetHardwareWatchpoint(
-    lldb::addr_t addr, size_t size, uint32_t watch_flags) {
-  Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS));
-  LLDB_LOG(log, "addr: {0:x}, size: {1:x} watch_flags: {2:x}", addr, size,
-           watch_flags);
-
-  // Read hardware breakpoint and watchpoint information.
-  Status error = ReadHardwareDebugInfo();
-
-  if (error.Fail())
-    return LLDB_INVALID_INDEX32;
-
-  uint32_t control_value = 0, wp_index = 0;
-  lldb::addr_t real_addr = addr;
-
-  // Check if we are setting watchpoint other than read/write/access Also
-  // update watchpoint flag to match AArch64 write-read bit configuration.
-  switch (watch_flags) {
-  case 1:
-    watch_flags = 2;
-    break;
-  case 2:
-    watch_flags = 1;
-    break;
-  case 3:
-    break;
-  default:
-    return LLDB_INVALID_INDEX32;
-  }
-
-  // Check if size has a valid hardware watchpoint length.
-  if (size != 1 && size != 2 && size != 4 && size != 8)
-    return LLDB_INVALID_INDEX32;
-
-  // Check 8-byte alignment for hardware watchpoint target address. Below is a
-  // hack to recalculate address and size in order to make sure we can watch
-  // non 8-byte aligned addresses as well.
-  if (addr & 0x07) {
-    uint8_t watch_mask = (addr & 0x07) + size;
-
-    if (watch_mask > 0x08)
-      return LLDB_INVALID_INDEX32;
-    else if (watch_mask <= 0x02)
-      size = 2;
-    else if (watch_mask <= 0x04)
-      size = 4;
-    else
-      size = 8;
-
-    addr = addr & (~0x07);
-  }
-
-  // Setup control value
-  control_value = watch_flags << 3;
-  control_value |= ((1 << size) - 1) << 5;
-  control_value |= (2 << 1) | 1;
-
-  // Iterate over stored watchpoints and find a free wp_index
-  wp_index = LLDB_INVALID_INDEX32;
-  for (uint32_t i = 0; i < m_max_hwp_supported; i++) {
-    if ((m_hwp_regs[i].control & 1) == 0) {
-      wp_index = i; // Mark last free slot
-    } else if (m_hwp_regs[i].address == addr) {
-      return LLDB_INVALID_INDEX32; // We do not support duplicate watchpoints.
-    }
-  }
-
-  if (wp_index == LLDB_INVALID_INDEX32)
-    return LLDB_INVALID_INDEX32;
-
-  // Update watchpoint in local cache
-  m_hwp_regs[wp_index].real_addr = real_addr;
-  m_hwp_regs[wp_index].address = addr;
-  m_hwp_regs[wp_index].control = control_value;
-
-  // PTRACE call to set corresponding watchpoint register.
-  error = WriteHardwareDebugRegs(eDREGTypeWATCH);
-
-  if (error.Fail()) {
-    m_hwp_regs[wp_index].address = 0;
-    m_hwp_regs[wp_index].control &= ~1;
-
-    return LLDB_INVALID_INDEX32;
-  }
-
-  return wp_index;
-}
-
-bool NativeRegisterContextLinux_arm64::ClearHardwareWatchpoint(
-    uint32_t wp_index) {
-  Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS));
-  LLDB_LOG(log, "wp_index: {0}", wp_index);
-
-  // Read hardware breakpoint and watchpoint information.
-  Status error = ReadHardwareDebugInfo();
-
-  if (error.Fail())
-    return false;
-
-  if (wp_index >= m_max_hwp_supported)
-    return false;
-
-  // Create a backup we can revert to in case of failure.
-  lldb::addr_t tempAddr = m_hwp_regs[wp_index].address;
-  uint32_t tempControl = m_hwp_regs[wp_index].control;
-
-  // Update watchpoint in local cache
-  m_hwp_regs[wp_index].control &= ~1;
-  m_hwp_regs[wp_index].address = 0;
-
-  // Ptrace call to update hardware debug registers
-  error = WriteHardwareDebugRegs(eDREGTypeWATCH);
-
-  if (error.Fail()) {
-    m_hwp_regs[wp_index].control = tempControl;
-    m_hwp_regs[wp_index].address = tempAddr;
-
-    return false;
-  }
-
-  return true;
-}
-
-Status NativeRegisterContextLinux_arm64::ClearAllHardwareWatchpoints() {
-  // Read hardware breakpoint and watchpoint information.
-  Status error = ReadHardwareDebugInfo();
-
-  if (error.Fail())
-    return error;
-
-  lldb::addr_t tempAddr = 0;
-  uint32_t tempControl = 0;
-
-  for (uint32_t i = 0; i < m_max_hwp_supported; i++) {
-    if (m_hwp_regs[i].control & 0x01) {
-      // Create a backup we can revert to in case of failure.
-      tempAddr = m_hwp_regs[i].address;
-      tempControl = m_hwp_regs[i].control;
-
-      // Clear watchpoints in local cache
-      m_hwp_regs[i].control &= ~1;
-      m_hwp_regs[i].address = 0;
-
-      // Ptrace call to update hardware debug registers
-      error = WriteHardwareDebugRegs(eDREGTypeWATCH);
-
-      if (error.Fail()) {
-        m_hwp_regs[i].control = tempControl;
-        m_hwp_regs[i].address = tempAddr;
-
-        return error;
-      }
-    }
-  }
-
-  return Status();
-}
-
-uint32_t
-NativeRegisterContextLinux_arm64::GetWatchpointSize(uint32_t wp_index) {
-  Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS));
-  LLDB_LOG(log, "wp_index: {0}", wp_index);
-
-  switch ((m_hwp_regs[wp_index].control >> 5) & 0xff) {
-  case 0x01:
-    return 1;
-  case 0x03:
-    return 2;
-  case 0x0f:
-    return 4;
-  case 0xff:
-    return 8;
-  default:
-    return 0;
-  }
-}
-bool NativeRegisterContextLinux_arm64::WatchpointIsEnabled(uint32_t wp_index) {
-  Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS));
-  LLDB_LOG(log, "wp_index: {0}", wp_index);
-
-  if ((m_hwp_regs[wp_index].control & 0x1) == 0x1)
-    return true;
-  else
-    return false;
-}
-
-Status NativeRegisterContextLinux_arm64::GetWatchpointHitIndex(
-    uint32_t &wp_index, lldb::addr_t trap_addr) {
-  Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS));
-  LLDB_LOG(log, "wp_index: {0}, trap_addr: {1:x}", wp_index, trap_addr);
-
-  uint32_t watch_size;
-  lldb::addr_t watch_addr;
-
-  for (wp_index = 0; wp_index < m_max_hwp_supported; ++wp_index) {
-    watch_size = GetWatchpointSize(wp_index);
-    watch_addr = m_hwp_regs[wp_index].address;
-
-    if (WatchpointIsEnabled(wp_index) && trap_addr >= watch_addr &&
-        trap_addr < watch_addr + watch_size) {
-      m_hwp_regs[wp_index].hit_addr = trap_addr;
-      return Status();
-    }
-  }
-
-  wp_index = LLDB_INVALID_INDEX32;
-  return Status();
-}
-
-lldb::addr_t
-NativeRegisterContextLinux_arm64::GetWatchpointAddress(uint32_t wp_index) {
-  Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS));
-  LLDB_LOG(log, "wp_index: {0}", wp_index);
-
-  if (wp_index >= m_max_hwp_supported)
-    return LLDB_INVALID_ADDRESS;
-
-  if (WatchpointIsEnabled(wp_index))
-    return m_hwp_regs[wp_index].real_addr;
-  else
-    return LLDB_INVALID_ADDRESS;
-}
-
-lldb::addr_t
-NativeRegisterContextLinux_arm64::GetWatchpointHitAddress(uint32_t wp_index) {
-  Log *log(ProcessPOSIXLog::GetLogIfAllCategoriesSet(POSIX_LOG_WATCHPOINTS));
-  LLDB_LOG(log, "wp_index: {0}", wp_index);
-
-  if (wp_index >= m_max_hwp_supported)
-    return LLDB_INVALID_ADDRESS;
-
-  if (WatchpointIsEnabled(wp_index))
-    return m_hwp_regs[wp_index].hit_addr;
-  else
-    return LLDB_INVALID_ADDRESS;
-}
-
-Status NativeRegisterContextLinux_arm64::ReadHardwareDebugInfo() {
+llvm::Error NativeRegisterContextLinux_arm64::ReadHardwareDebugInfo() {
   if (!m_refresh_hwdebug_info) {
-    return Status();
+    return llvm::Error::success();
   }
 
   ::pid_t tid = m_thread.GetID();
 
   int regset = NT_ARM_HW_WATCH;
   struct iovec ioVec;
   struct user_hwdebug_state dreg_state;
   Status error;
 
   ioVec.iov_base = &dreg_state;
   ioVec.iov_len = sizeof(dreg_state);
   error = NativeProcessLinux::PtraceWrapper(PTRACE_GETREGSET, tid, &regset,
                                             &ioVec, ioVec.iov_len);
 
   if (error.Fail())
-    return error;
+    return error.ToError();
 
   m_max_hwp_supported = dreg_state.dbg_info & 0xff;
 
   regset = NT_ARM_HW_BREAK;
   error = NativeProcessLinux::PtraceWrapper(PTRACE_GETREGSET, tid, &regset,
                                             &ioVec, ioVec.iov_len);
 
   if (error.Fail())
-    return error;
+    return error.ToError();
 
   m_max_hbp_supported = dreg_state.dbg_info & 0xff;
   m_refresh_hwdebug_info = false;
 
-  return error;
+  return llvm::Error::success();
 }
 
-Status NativeRegisterContextLinux_arm64::WriteHardwareDebugRegs(int hwbType) {
+llvm::Error
+NativeRegisterContextLinux_arm64::WriteHardwareDebugRegs(DREGType hwbType) {
   struct iovec ioVec;
   struct user_hwdebug_state dreg_state;
-  Status error;
+  int regset;
 
   memset(&dreg_state, 0, sizeof(dreg_state));
   ioVec.iov_base = &dreg_state;
 
-  if (hwbType == eDREGTypeWATCH) {
-    hwbType = NT_ARM_HW_WATCH;
+  switch (hwbType) {
+  case eDREGTypeWATCH:
+    regset = NT_ARM_HW_WATCH;
     ioVec.iov_len = sizeof(dreg_state.dbg_info) + sizeof(dreg_state.pad) +
                     (sizeof(dreg_state.dbg_regs[0]) * m_max_hwp_supported);
 
     for (uint32_t i = 0; i < m_max_hwp_supported; i++) {
       dreg_state.dbg_regs[i].addr = m_hwp_regs[i].address;
       dreg_state.dbg_regs[i].ctrl = m_hwp_regs[i].control;
     }
-  } else {
-    hwbType = NT_ARM_HW_BREAK;
+    break;
+  case eDREGTypeBREAK:
+    regset = NT_ARM_HW_BREAK;
     ioVec.iov_len = sizeof(dreg_state.dbg_info) + sizeof(dreg_state.pad) +
                     (sizeof(dreg_state.dbg_regs[0]) * m_max_hbp_supported);
 
     for (uint32_t i = 0; i < m_max_hbp_supported; i++) {
-      dreg_state.dbg_regs[i].addr = m_hbr_regs[i].address;
-      dreg_state.dbg_regs[i].ctrl = m_hbr_regs[i].control;
+      dreg_state.dbg_regs[i].addr = m_hbp_regs[i].address;
+      dreg_state.dbg_regs[i].ctrl = m_hbp_regs[i].control;
     }
+    break;
   }
 
   return NativeProcessLinux::PtraceWrapper(PTRACE_SETREGSET, m_thread.GetID(),
-                                           &hwbType, &ioVec, ioVec.iov_len);
+                                           &regset, &ioVec, ioVec.iov_len)
+      .ToError();
 }
 
 Status NativeRegisterContextLinux_arm64::ReadGPR() {
   Status error;
 
   if (m_gpr_is_valid)
     return error;
 

lldb/source/Plugins/Process/Utility/CMakeLists.txt

 add_lldb_library(lldbPluginProcessUtility
   AuxVector.cpp
   DynamicRegisterInfo.cpp
   FreeBSDSignals.cpp
   GDBRemoteSignals.cpp
   HistoryThread.cpp
   HistoryUnwind.cpp
   InferiorCallPOSIX.cpp
   LinuxProcMaps.cpp
   LinuxSignals.cpp
   MipsLinuxSignals.cpp
   NativeProcessSoftwareSingleStep.cpp
+  NativeRegisterContextDBReg_arm64.cpp
   NativeRegisterContextDBReg_x86.cpp
   NativeRegisterContextRegisterInfo.cpp
   NetBSDSignals.cpp
   RegisterContext_x86.cpp
   RegisterContextDarwin_arm.cpp
   RegisterContextDarwin_arm64.cpp
   RegisterContextDarwin_i386.cpp
   RegisterContextDarwin_x86_64.cpp

lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_arm64.h

+//===-- NativeRegisterContextDBReg_arm64.h ----------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef lldb_NativeRegisterContextDBReg_arm64_h
+#define lldb_NativeRegisterContextDBReg_arm64_h
+
+#include "Plugins/Process/Utility/NativeRegisterContextRegisterInfo.h"
+
+#include <array>
+
+namespace lldb_private {
+
+class NativeRegisterContextDBReg_arm64
+    : public virtual NativeRegisterContextRegisterInfo {
+public:
+  uint32_t NumSupportedHardwareBreakpoints() override;
+
+  uint32_t SetHardwareBreakpoint(lldb::addr_t addr, size_t size) override;
+
+  bool ClearHardwareBreakpoint(uint32_t hw_idx) override;
+
+  Status ClearAllHardwareBreakpoints() override;
+
+  Status GetHardwareBreakHitIndex(uint32_t &bp_index,
+                                  lldb::addr_t trap_addr) override;
+
+  bool BreakpointIsEnabled(uint32_t bp_index);
+
+  uint32_t NumSupportedHardwareWatchpoints() override;
+
+  uint32_t SetHardwareWatchpoint(lldb::addr_t addr, size_t size,
+                                 uint32_t watch_flags) override;
+
+  bool ClearHardwareWatchpoint(uint32_t hw_index) override;
+
+  Status ClearAllHardwareWatchpoints() override;
+
+  Status GetWatchpointHitIndex(uint32_t &wp_index,
+                               lldb::addr_t trap_addr) override;
+
+  lldb::addr_t GetWatchpointHitAddress(uint32_t wp_index) override;
+
+  lldb::addr_t GetWatchpointAddress(uint32_t wp_index) override;
+
+  uint32_t GetWatchpointSize(uint32_t wp_index);
+
+  bool WatchpointIsEnabled(uint32_t wp_index);
+
+  // Debug register type select
+  enum DREGType { eDREGTypeWATCH = 0, eDREGTypeBREAK };
+
+protected:
+  // Debug register info for hardware breakpoints and watchpoints management.
+  struct DREG {
+    lldb::addr_t address;  // Breakpoint/watchpoint address value.
+    lldb::addr_t hit_addr; // Address at which last watchpoint trigger exception
+                           // occurred.
+    lldb::addr_t real_addr; // Address value that should cause target to stop.
+    uint32_t control;       // Breakpoint/watchpoint control value.
+  };
+
+  std::array<struct DREG, 16> m_hbp_regs; // hardware breakpoints
+  std::array<struct DREG, 16> m_hwp_regs; // hardware watchpoints
+
+  uint32_t m_max_hbp_supported;
+  uint32_t m_max_hwp_supported;
+
+  virtual llvm::Error ReadHardwareDebugInfo() = 0;
+  virtual llvm::Error WriteHardwareDebugRegs(DREGType hwbType) = 0;
+};
+
+} // namespace lldb_private
+
+#endif // #ifndef lldb_NativeRegisterContextDBReg_arm64_h

lldb/source/Plugins/Process/Utility/NativeRegisterContextDBReg_arm64.cpp

+//===-- NativeRegisterContextDBReg_arm64.cpp ------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "NativeRegisterContextDBReg_arm64.h"
+
+#include "lldb/Utility/Log.h"
+#include "lldb/Utility/RegisterValue.h"
+
+using namespace lldb_private;
+
+// E (bit 0), used to enable breakpoint/watchpoint
+constexpr uint32_t g_enable_bit = 1;
+// PAC (bits 2:1): 0b10
+constexpr uint32_t g_pac_bits = (2 << 1);
+
+// Returns appropriate control register bits for the specified size
+static constexpr inline uint64_t GetSizeBits(int size) {
+  // BAS (bits 12:5) hold a bit-mask of addresses to watch
+  // e.g. 0b00000001 means 1 byte at address
+  //      0b00000011 means 2 bytes (addr..addr+1)
+  //      ...
+  //      0b11111111 means 8 bytes (addr..addr+7)
+  return ((1 << size) - 1) << 5;
+}
+
+uint32_t NativeRegisterContextDBReg_arm64::NumSupportedHardwareBreakpoints() {
+  Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_BREAKPOINTS));
+  llvm::Error error = ReadHardwareDebugInfo();
+  if (error) {
+    LLDB_LOG_ERROR(log, std::move(error),
+                   "failed to read debug registers: {0}");
+    return 0;
+  }
+
+  return m_max_hbp_supported;
+}
+
+uint32_t
+NativeRegisterContextDBReg_arm64::SetHardwareBreakpoint(lldb::addr_t addr,
+                                                        size_t size) {
+  Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_BREAKPOINTS));
+  LLDB_LOG(log, "addr: {0:x}, size: {1:x}", addr, size);
+
+  // Read hardware breakpoint and watchpoint information.
+  llvm::Error error = ReadHardwareDebugInfo();
+  if (error) {
+    LLDB_LOG_ERROR(
+        log, std::move(error),
+        "unable to set breakpoint: failed to read debug registers: {0}");
+    return LLDB_INVALID_INDEX32;
+  }
+
+  uint32_t control_value = 0, bp_index = 0;
+
+  // Check if size has a valid hardware breakpoint length.
+  if (size != 4)
+    return LLDB_INVALID_INDEX32; // Invalid size for a AArch64 hardware
+                                 // breakpoint
+
+  // Check 4-byte alignment for hardware breakpoint target address.
+  if (addr & 0x03)
+    return LLDB_INVALID_INDEX32; // Invalid address, should be 4-byte aligned.
+
+  // Setup control value
+  control_value = g_enable_bit | g_pac_bits | GetSizeBits(size);
+
+  // Iterate over stored breakpoints and find a free bp_index
+  bp_index = LLDB_INVALID_INDEX32;
+  for (uint32_t i = 0; i < m_max_hbp_supported; i++) {
+    if (!BreakpointIsEnabled(i))
+      bp_index = i; // Mark last free slot
+    else if (m_hbp_regs[i].address == addr)
+      return LLDB_INVALID_INDEX32; // We do not support duplicate breakpoints.
+  }
+
+  if (bp_index == LLDB_INVALID_INDEX32)
+    return LLDB_INVALID_INDEX32;
+
+  // Update breakpoint in local cache
+  m_hbp_regs[bp_index].real_addr = addr;
+  m_hbp_regs[bp_index].address = addr;
+  m_hbp_regs[bp_index].control = control_value;
+
+  // PTRACE call to set corresponding hardware breakpoint register.
+  error = WriteHardwareDebugRegs(eDREGTypeBREAK);
+
+  if (error) {
+    m_hbp_regs[bp_index].address = 0;
+    m_hbp_regs[bp_index].control &= ~1;
+
+    LLDB_LOG_ERROR(
+        log, std::move(error),
+        "unable to set breakpoint: failed to write debug registers: {0}");
+    return LLDB_INVALID_INDEX32;
+  }
+
+  return bp_index;
+}
+
+bool NativeRegisterContextDBReg_arm64::ClearHardwareBreakpoint(
+    uint32_t hw_idx) {
+  Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_BREAKPOINTS));
+  LLDB_LOG(log, "hw_idx: {0}", hw_idx);
+
+  // Read hardware breakpoint and watchpoint information.
+  llvm::Error error = ReadHardwareDebugInfo();
+  if (error) {
+    LLDB_LOG_ERROR(
+        log, std::move(error),
+        "unable to clear breakpoint: failed to read debug registers: {0}");
+    return false;
+  }
+
+  if (hw_idx >= m_max_hbp_supported)
+    return false;
+
+  // Create a backup we can revert to in case of failure.
+  lldb::addr_t tempAddr = m_hbp_regs[hw_idx].address;
+  uint32_t tempControl = m_hbp_regs[hw_idx].control;
+
+  m_hbp_regs[hw_idx].control &= ~g_enable_bit;
+  m_hbp_regs[hw_idx].address = 0;
+
+  // PTRACE call to clear corresponding hardware breakpoint register.
+  error = WriteHardwareDebugRegs(eDREGTypeBREAK);
+
+  if (error) {
+    m_hbp_regs[hw_idx].control = tempControl;
+    m_hbp_regs[hw_idx].address = tempAddr;
+
+    LLDB_LOG_ERROR(
+        log, std::move(error),
+        "unable to clear breakpoint: failed to write debug registers: {0}");
+    return false;
+  }
+
+  return true;
+}
+
+Status NativeRegisterContextDBReg_arm64::GetHardwareBreakHitIndex(
+    uint32_t &bp_index, lldb::addr_t trap_addr) {
+  Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_BREAKPOINTS));
+
+  LLDB_LOGF(log, "NativeRegisterContextDBReg_arm64::%s()", __FUNCTION__);
+
+  lldb::addr_t break_addr;
+
+  for (bp_index = 0; bp_index < m_max_hbp_supported; ++bp_index) {
+    break_addr = m_hbp_regs[bp_index].address;
+
+    if (BreakpointIsEnabled(bp_index) && trap_addr == break_addr) {
+      m_hbp_regs[bp_index].hit_addr = trap_addr;
+      return Status();
+    }
+  }
+
+  bp_index = LLDB_INVALID_INDEX32;
+  return Status();
+}
+
+Status NativeRegisterContextDBReg_arm64::ClearAllHardwareBreakpoints() {
+  Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_BREAKPOINTS));
+
+  LLDB_LOGF(log, "NativeRegisterContextDBReg_arm64::%s()", __FUNCTION__);
+
+  // Read hardware breakpoint and watchpoint information.
+  llvm::Error error = ReadHardwareDebugInfo();
+  if (error)
+    return Status(std::move(error));
+
+  for (uint32_t i = 0; i < m_max_hbp_supported; i++) {
+    if (BreakpointIsEnabled(i)) {
+      // Create a backup we can revert to in case of failure.
+      lldb::addr_t tempAddr = m_hbp_regs[i].address;
+      uint32_t tempControl = m_hbp_regs[i].control;
+
+      // Clear watchpoints in local cache
+      m_hbp_regs[i].control &= ~g_enable_bit;
+      m_hbp_regs[i].address = 0;
+
+      // Ptrace call to update hardware debug registers
+      error = WriteHardwareDebugRegs(eDREGTypeBREAK);
+
+      if (error) {
+        m_hbp_regs[i].control = tempControl;
+        m_hbp_regs[i].address = tempAddr;
+
+        return Status(std::move(error));
+      }
+    }
+  }
+
+  return Status();
+}
+
+bool NativeRegisterContextDBReg_arm64::BreakpointIsEnabled(uint32_t bp_index) {
+  if ((m_hbp_regs[bp_index].control & g_enable_bit) != 0)
+    return true;
+  else
+    return false;
+}
+
+uint32_t NativeRegisterContextDBReg_arm64::NumSupportedHardwareWatchpoints() {
+  Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_WATCHPOINTS));
+  llvm::Error error = ReadHardwareDebugInfo();
+  if (error) {
+    LLDB_LOG_ERROR(log, std::move(error),
+                   "failed to read debug registers: {0}");
+    return 0;
+  }
+
+  return m_max_hwp_supported;
+}
+
+uint32_t NativeRegisterContextDBReg_arm64::SetHardwareWatchpoint(
+    lldb::addr_t addr, size_t size, uint32_t watch_flags) {
+  Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_WATCHPOINTS));
+  LLDB_LOG(log, "addr: {0:x}, size: {1:x} watch_flags: {2:x}", addr, size,
+           watch_flags);
+
+  // Read hardware breakpoint and watchpoint information.
+  llvm::Error error = ReadHardwareDebugInfo();
+  if (error) {
+    LLDB_LOG_ERROR(
+        log, std::move(error),
+        "unable to set watchpoint: failed to read debug registers: {0}");
+    return LLDB_INVALID_INDEX32;
+  }
+
+  uint32_t control_value = 0, wp_index = 0;
+  lldb::addr_t real_addr = addr;
+
+  // Check if we are setting watchpoint other than read/write/access Also
+  // update watchpoint flag to match AArch64 write-read bit configuration.
+  switch (watch_flags) {
+  case 1:
+    watch_flags = 2;
+    break;
+  case 2:
+    watch_flags = 1;
+    break;
+  case 3:
+    break;
+  default:
+    return LLDB_INVALID_INDEX32;
+  }
+
+  // Check if size has a valid hardware watchpoint length.
+  if (size != 1 && size != 2 && size != 4 && size != 8)
+    return LLDB_INVALID_INDEX32;
+
+  // Check 8-byte alignment for hardware watchpoint target address. Below is a
+  // hack to recalculate address and size in order to make sure we can watch
+  // non 8-byte aligned addresses as well.
+  if (addr & 0x07) {
+    uint8_t watch_mask = (addr & 0x07) + size;
+
+    if (watch_mask > 0x08)
+      return LLDB_INVALID_INDEX32;
+    else if (watch_mask <= 0x02)
+      size = 2;
+    else if (watch_mask <= 0x04)
+      size = 4;
+    else
+      size = 8;
+
+    addr = addr & (~0x07);
+  }
+
+  // Setup control value
+  control_value = g_enable_bit | g_pac_bits | GetSizeBits(size);
+  control_value |= watch_flags << 3;
+
+  // Iterate over stored watchpoints and find a free wp_index
+  wp_index = LLDB_INVALID_INDEX32;
+  for (uint32_t i = 0; i < m_max_hwp_supported; i++) {
+    if (!WatchpointIsEnabled(i))
+      wp_index = i; // Mark last free slot
+    else if (m_hwp_regs[i].address == addr) {
+      return LLDB_INVALID_INDEX32; // We do not support duplicate watchpoints.
+    }
+  }
+
+  if (wp_index == LLDB_INVALID_INDEX32)
+    return LLDB_INVALID_INDEX32;
+
+  // Update watchpoint in local cache
+  m_hwp_regs[wp_index].real_addr = real_addr;
+  m_hwp_regs[wp_index].address = addr;
+  m_hwp_regs[wp_index].control = control_value;
+
+  // PTRACE call to set corresponding watchpoint register.
+  error = WriteHardwareDebugRegs(eDREGTypeWATCH);
+
+  if (error) {
+    m_hwp_regs[wp_index].address = 0;
+    m_hwp_regs[wp_index].control &= ~g_enable_bit;
+
+    LLDB_LOG_ERROR(
+        log, std::move(error),
+        "unable to set watchpoint: failed to write debug registers: {0}");
+    return LLDB_INVALID_INDEX32;
+  }
+
+  return wp_index;
+}
+
+bool NativeRegisterContextDBReg_arm64::ClearHardwareWatchpoint(
+    uint32_t wp_index) {
+  Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_WATCHPOINTS));
+  LLDB_LOG(log, "wp_index: {0}", wp_index);
+
+  // Read hardware breakpoint and watchpoint information.
+  llvm::Error error = ReadHardwareDebugInfo();
+  if (error) {
+    LLDB_LOG_ERROR(
+        log, std::move(error),
+        "unable to clear watchpoint: failed to read debug registers: {0}");
+    return false;
+  }
+
+  if (wp_index >= m_max_hwp_supported)
+    return false;
+
+  // Create a backup we can revert to in case of failure.
+  lldb::addr_t tempAddr = m_hwp_regs[wp_index].address;
+  uint32_t tempControl = m_hwp_regs[wp_index].control;
+
+  // Update watchpoint in local cache
+  m_hwp_regs[wp_index].control &= ~g_enable_bit;
+  m_hwp_regs[wp_index].address = 0;
+
+  // Ptrace call to update hardware debug registers
+  error = WriteHardwareDebugRegs(eDREGTypeWATCH);
+
+  if (error) {
+    m_hwp_regs[wp_index].control = tempControl;
+    m_hwp_regs[wp_index].address = tempAddr;
+
+    LLDB_LOG_ERROR(
+        log, std::move(error),
+        "unable to clear watchpoint: failed to write debug registers: {0}");
+    return false;
+  }
+
+  return true;
+}
+
+Status NativeRegisterContextDBReg_arm64::ClearAllHardwareWatchpoints() {
+  // Read hardware breakpoint and watchpoint information.
+  llvm::Error error = ReadHardwareDebugInfo();
+  if (error)
+    return Status(std::move(error));
+
+  for (uint32_t i = 0; i < m_max_hwp_supported; i++) {
+    if (WatchpointIsEnabled(i)) {
+      // Create a backup we can revert to in case of failure.
+      lldb::addr_t tempAddr = m_hwp_regs[i].address;
+      uint32_t tempControl = m_hwp_regs[i].control;
+
+      // Clear watchpoints in local cache
+      m_hwp_regs[i].control &= ~g_enable_bit;
+      m_hwp_regs[i].address = 0;
+
+      // Ptrace call to update hardware debug registers
+      error = WriteHardwareDebugRegs(eDREGTypeWATCH);
+
+      if (error) {
+        m_hwp_regs[i].control = tempControl;
+        m_hwp_regs[i].address = tempAddr;
+
+        return Status(std::move(error));
+      }
+    }
+  }
+
+  return Status();
+}
+
+uint32_t
+NativeRegisterContextDBReg_arm64::GetWatchpointSize(uint32_t wp_index) {
+  Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_WATCHPOINTS));
+  LLDB_LOG(log, "wp_index: {0}", wp_index);
+
+  switch ((m_hwp_regs[wp_index].control >> 5) & 0xff) {
+  case 0x01:
+    return 1;
+  case 0x03:
+    return 2;
+  case 0x0f:
+    return 4;
+  case 0xff:
+    return 8;
+  default:
+    return 0;
+  }
+}
+
+bool NativeRegisterContextDBReg_arm64::WatchpointIsEnabled(uint32_t wp_index) {
+  Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_WATCHPOINTS));
+  LLDB_LOG(log, "wp_index: {0}", wp_index);
+
+  if ((m_hwp_regs[wp_index].control & g_enable_bit) != 0)
+    return true;
+  else
+    return false;
+}
+
+Status NativeRegisterContextDBReg_arm64::GetWatchpointHitIndex(
+    uint32_t &wp_index, lldb::addr_t trap_addr) {
+  Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_WATCHPOINTS));
+  LLDB_LOG(log, "wp_index: {0}, trap_addr: {1:x}", wp_index, trap_addr);
+
+  // Read hardware breakpoint and watchpoint information.
+  llvm::Error error = ReadHardwareDebugInfo();
+  if (error)
+    return Status(std::move(error));
+
+  uint32_t watch_size;
+  lldb::addr_t watch_addr;
+
+  for (wp_index = 0; wp_index < m_max_hwp_supported; ++wp_index) {
+    watch_size = GetWatchpointSize(wp_index);
+    watch_addr = m_hwp_regs[wp_index].address;
+
+    if (WatchpointIsEnabled(wp_index) && trap_addr >= watch_addr &&
+        trap_addr < watch_addr + watch_size) {
+      m_hwp_regs[wp_index].hit_addr = trap_addr;
+      return Status();
+    }
+  }
+
+  wp_index = LLDB_INVALID_INDEX32;
+  return Status();
+}
+
+lldb::addr_t
+NativeRegisterContextDBReg_arm64::GetWatchpointAddress(uint32_t wp_index) {
+  Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_WATCHPOINTS));
+  LLDB_LOG(log, "wp_index: {0}", wp_index);
+
+  if (wp_index >= m_max_hwp_supported)
+    return LLDB_INVALID_ADDRESS;
+
+  if (WatchpointIsEnabled(wp_index))
+    return m_hwp_regs[wp_index].real_addr;
+  return LLDB_INVALID_ADDRESS;
+}
+
+lldb::addr_t
+NativeRegisterContextDBReg_arm64::GetWatchpointHitAddress(uint32_t wp_index) {
+  Log *log(lldb_private::GetLogIfAllCategoriesSet(LIBLLDB_LOG_WATCHPOINTS));
+  LLDB_LOG(log, "wp_index: {0}", wp_index);
+
+  if (wp_index >= m_max_hwp_supported)
+    return LLDB_INVALID_ADDRESS;
+
+  if (WatchpointIsEnabled(wp_index))
+    return m_hwp_regs[wp_index].hit_addr;
+  return LLDB_INVALID_ADDRESS;
+}