[X86][AMX] Prohibit pointer cast on load.

[LuoYuanke]

Summary

The load/store instruction will be transformed to amx intrinsics in the
pass of AMX type lowering. Prohibiting the pointer cast make that pass
happy.

[LuoYuanke]

Fix typo in the comments.

[pengfei]

to amx intrinsics the the

to amx intrinsics that?

llvm/test/Transforms/InstCombine/load.ll

427

Missing check results?

[LuoYuanke]

llvm/test/Transforms/InstCombine/load.ll

427

Oops. Thank Pengfei. :)

[LuoYuanke]

Address Pengfei's comments.

[pengfei]

llvm/test/Transforms/InstCombine/load.ll

452

I think we had disabled the chance that x86_amx* been generated by compiler. It may mean somthing wrong if we see such load. So I think it's better just raise an assert fail for it here.
Besides, it looks safe and better for performance to combine

%vec = load x86_amx, x86_amx* %src, align 64
%bc = bitcast x86_amx %vec to <256 x i32>

to

%bc = load <256 x i32>, <256 x i32>* %src, align 64

[lebedev.ri]

This comment was removed by lebedev.ri.

[lebedev.ri]

What specifically is having problems after that transformation?

[LuoYuanke]

In D94372#2489048, @lebedev.ri wrote:

What specifically is having problems after that transformation?

The the amx load require shape and stride. We need transform "%vec = load x86_amx, x86_amx* %src" to "%vec = @llvm.x86.tileloadd64.internal(i16 %row, i16 %col, i8* %src, i64 %stride)". The %row, %col need to be deduced from the context. Prohibit the transform make pass "lower-amx-type" happy.

[LuoYuanke]

llvm/test/Transforms/InstCombine/load.ll

452

So we may delete this case, as we think "x86_amx*" is invalid. I can take x86_amx* as invalid in IR verification in another patch.

[LuoYuanke]

Address Pengfei's comments.

[pengfei]

LGTM, but I'd like to see if @lebedev.ri has any objections.

[LuoYuanke]

In D94372#2491970, @pengfei wrote:

LGTM, but I'd like to see if @lebedev.ri has any objections.

Ok, I'll wait 1 day to see if @lebedev.ri has any objection for the patch.

llvm/lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp

static Instruction *combineLoadToOperationType(InstCombinerImpl &IC,
   if (LI.getPointerOperand()->isSwiftError())
     return nullptr;
 
   const DataLayout &DL = IC.getDataLayout();
 
   // Fold away bit casts of the loaded value by loading the desired type.
   // Note that we should not do this for pointer<->integer casts,
   // because that would result in type punning.
-  if (LI.hasOneUse())
+  if (LI.hasOneUse()) {
+    // Don't transform when the type is x86_amx, it make the pass that lower
+    // x86_amx type happy.
+    if (auto *BC = dyn_cast<BitCastInst>(LI.user_back())) {
+      Value *V = BC->getOperand(0);
+      if (BC->getType()->isX86_AMXTy() || V->getType()->isX86_AMXTy())
+        return nullptr;
+    }
+
     if (auto* CI = dyn_cast<CastInst>(LI.user_back()))
       if (CI->isNoopCast(DL) && LI.getType()->isPtrOrPtrVectorTy() ==
                                     CI->getDestTy()->isPtrOrPtrVectorTy())
         if (!LI.isAtomic() || isSupportedAtomicType(CI->getDestTy())) {
           LoadInst *NewLoad = IC.combineLoadToNewType(LI, CI->getDestTy());
           CI->replaceAllUsesWith(NewLoad);
           IC.eraseInstFromFunction(*CI);
           return &LI;
         }
+  }
 
   // FIXME: We should also canonicalize loads of vectors when their elements are
   // cast to other types.
   return nullptr;
 }
 
 static Instruction *unpackLoadToAggregate(InstCombinerImpl &IC, LoadInst &LI) {
   // FIXME: We could probably with some care handle both volatile and atomic

llvm/test/Transforms/InstCombine/load.ll

 ; CHECK-NEXT:    ret <2 x i64> [[X]]
 ;
   %P.ptr = bitcast <2 x i64>* %P to <2 x i8 addrspace(1)*>*
   %X = load <2 x i64>, <2 x i64>* %P
   %Y = load <2 x i8 addrspace(1)*>, <2 x i8 addrspace(1)*>* %P.ptr
   call void @use.v2.p1(<2 x i8 addrspace(1)*> %Y)
   ret <2 x i64> %X
 }
+
+define dso_local void @test_amx_load_store(<256 x i32>* %src, x86_amx* %dst) {
+entry:
+  %vec = load <256 x i32>, <256 x i32>* %src, align 64
+  %bc = bitcast <256 x i32> %vec to x86_amx
+  store x86_amx %bc, x86_amx* %dst
+  ret void
+}
+
+define dso_local void @test_amx_load_store2(<256 x i32>* %dst, x86_amx* %src) {
+entry:
+  %vec = load x86_amx, x86_amx* %src, align 64
+  %bc = bitcast x86_amx %vec to <256 x i32>
+  store <256 x i32> %bc, <256 x i32>* %dst
+  ret void
+}