[NewPM][AMDGPU] Make amdgpu-aa work with NewPM

[aeubanks]

Summary

An AMDGPUAA class already existed that was supposed to work with the new
PM, but it wasn't tested and was a bit broken.

Fix up the existing classes to have the right keys/parameters.
Wire up AMDGPUAA inside AMDGPUTargetMachine.

Add it to the list of alias analyses for the "default" AAManager since
in adjustPassManager() amdgpu-aa is added into the pipeline at the
beginning.

[aeubanks]

separate out rename

llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.h

public:
   explicit AMDGPUAAResult(const DataLayout &DL, Triple T) : AAResultBase(),
     DL(DL) {}
   AMDGPUAAResult(AMDGPUAAResult &&Arg)
       : AAResultBase(std::move(Arg)), DL(Arg.DL) {}
 
   /// Handle invalidation events from the new pass manager.
   ///
   /// By definition, this result is stateless and so remains valid.
-  bool invalidate(Function &, const PreservedAnalyses &) { return false; }
+  bool invalidate(Function &, const PreservedAnalyses &,
+                  FunctionAnalysisManager::Invalidator &Inv) {
+    return false;
+  }
 
   AliasResult alias(const MemoryLocation &LocA, const MemoryLocation &LocB,
                     AAQueryInfo &AAQI);
   bool pointsToConstantMemory(const MemoryLocation &Loc, AAQueryInfo &AAQI,
                               bool OrLocal);
 };
 
 /// Analysis pass providing a never-invalidated alias analysis result.
 class AMDGPUAA : public AnalysisInfoMixin<AMDGPUAA> {
   friend AnalysisInfoMixin<AMDGPUAA>;
 
-  static char PassID;
+  static AnalysisKey Key;
 
 public:
   using Result = AMDGPUAAResult;
 
   AMDGPUAAResult run(Function &F, AnalysisManager<Function> &AM) {
     return AMDGPUAAResult(F.getParent()->getDataLayout(),
         Triple(F.getParent()->getTargetTriple()));
   }

llvm/lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp

 #include "llvm/Support/Casting.h"
 #include "llvm/Support/ErrorHandling.h"
 #include <cassert>
 
 using namespace llvm;
 
 #define DEBUG_TYPE "amdgpu-aa"
 
+AnalysisKey AMDGPUAA::Key;
+
 // Register this pass...
 char AMDGPUAAWrapperPass::ID = 0;
 char AMDGPUExternalAAWrapper::ID = 0;
 
 INITIALIZE_PASS(AMDGPUAAWrapperPass, "amdgpu-aa",
                 "AMDGPU Address space based Alias Analysis", false, true)
 
 INITIALIZE_PASS(AMDGPUExternalAAWrapper, "amdgpu-aa-wrapper",

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h

public:
   TargetLoweringObjectFile *getObjFileLowering() const override {
     return TLOF.get();
   }
 
   void adjustPassManager(PassManagerBuilder &) override;
 
   void registerPassBuilderCallbacks(PassBuilder &PB,
                                     bool DebugPassManager) override;
+  void registerAliasAnalyses(AAManager &) override;
 
   /// Get the integer value of a null pointer in the given address space.
   static int64_t getNullPointerValue(unsigned AddrSpace) {
     return (AddrSpace == AMDGPUAS::LOCAL_ADDRESS ||
             AddrSpace == AMDGPUAS::PRIVATE_ADDRESS ||
             AddrSpace == AMDGPUAS::REGION_ADDRESS) ? -1 : 0;
   }
 

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

[EnableOpt](const PassManagerBuilder &, legacy::PassManagerBase &PM) {
 
       // Promote alloca to vector before SROA and loop unroll. If we manage
       // to eliminate allocas before unroll we may choose to unroll less.
       if (EnableOpt)
         PM.add(createAMDGPUPromoteAllocaToVector());
   });
 }
 
+void AMDGPUTargetMachine::registerAliasAnalyses(AAManager &AAM) {
+  AAM.registerFunctionAnalysis<AMDGPUAA>();
+}
+
 void AMDGPUTargetMachine::registerPassBuilderCallbacks(PassBuilder &PB,
                                                        bool DebugPassManager) {
   PB.registerPipelineParsingCallback(
       [this](StringRef PassName, ModulePassManager &PM,
              ArrayRef<PassBuilder::PipelineElement>) {
         if (PassName == "amdgpu-propagate-attributes-late") {
           PM.addPass(AMDGPUPropagateAttributesLatePass(*this));
           return true;
PB.registerPipelineParsingCallback(
         if (PassName == "amdgpu-propagate-attributes-early") {
           PM.addPass(AMDGPUPropagateAttributesEarlyPass(*this));
           return true;
         }
 
         return false;
       });
 
+  PB.registerAnalysisRegistrationCallback([](FunctionAnalysisManager &FAM) {
+    FAM.registerPass([&] { return AMDGPUAA(); });
+  });
+
+  PB.registerParseAACallback([](StringRef AAName, AAManager &AAM) {
+    if (AAName == "amdgpu-aa") {
+      AAM.registerFunctionAnalysis<AMDGPUAA>();
+      return true;
+    }
+    return false;
+  });
+
   PB.registerPipelineStartEPCallback([this, DebugPassManager](
                                          ModulePassManager &PM,
                                          PassBuilder::OptimizationLevel Level) {
     FunctionPassManager FPM(DebugPassManager);
     FPM.addPass(AMDGPUPropagateAttributesEarlyPass(*this));
     FPM.addPass(AMDGPUUseNativeCallsPass());
     if (EnableLibCallSimplify && Level != PassBuilder::OptimizationLevel::O0)
       FPM.addPass(AMDGPUSimplifyLibCallsPass());

llvm/test/CodeGen/AMDGPU/amdgpu-alias-analysis.ll

 ; RUN: opt -mtriple=amdgcn-- -data-layout=A5 -aa-eval -amdgpu-aa -amdgpu-aa-wrapper -disable-basic-aa  -print-all-alias-modref-info -disable-output < %s 2>&1 | FileCheck %s
 ; RUN: opt -mtriple=r600-- -data-layout=A5 -aa-eval -amdgpu-aa -amdgpu-aa-wrapper -disable-basic-aa  -print-all-alias-modref-info -disable-output < %s 2>&1 | FileCheck %s
+; RUN: opt -mtriple=amdgcn-- -data-layout=A5 -passes=aa-eval -aa-pipeline=amdgpu-aa -print-all-alias-modref-info -disable-output < %s 2>&1 | FileCheck %s
+; RUN: opt -mtriple=r600-- -data-layout=A5 -passes=aa-eval -aa-pipeline=amdgpu-aa -print-all-alias-modref-info -disable-output < %s 2>&1 | FileCheck %s
 
 ; CHECK: NoAlias:      i8 addrspace(1)* %p1, i8 addrspace(5)* %p
 
 define void @test(i8 addrspace(5)* %p, i8 addrspace(1)* %p1) {
   ret void
 }
 
 ; CHECK: MayAlias:      i8 addrspace(1)* %p1, i8 addrspace(4)* %p