[amdgpu] Teach one more case for assumed global pointers.

[hliao]

Summary

• If a generic pointer is loaded from a readonly and noalias kernel pointer argument, it could be assumed as a global one. + readonly prevents the possible modifications from the device side, and + noalias ensures that pointer won't alias to any other objects in the whole kernel execution lifetime. + Taking them together, it's safe to assume that memory object could only be modified on the host side and contains global pointers only.

[arsenm]

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

553

Readonly is incorrect here, as it only indicates the function does not write to the memory and does not indicate the memory may be changed by another function/thread. I also don't think noalias is really the correct check for the owned object

[hliao]

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

553

That readonly atttribute is marked in function attribute deduction pass by checking every use of a pointer argument, including if it's passed into another sub-func. It's only marked as readonly when it's safe. It's safe to assume there's no write though a pointer argument marked with readonly.
noalias here is to ensure that there's no other path within the kernel function execution to modify that memory pointed by that pointer argument.
By checking both, we could ensure that memory is only prepared by the host.

[arsenm]

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

553

Yes, it infers that *this* function did not modify the memory. It's a step further to conclude that no function exists that's modifying the memory. A different kernel could have access to the same memory which it is writing to

[hliao]

the case is no longer valid considering concurrent kernel execution.

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

553

yeah, by allowing concurrent kernel execution, the assumption is no longer held.

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

 #include "AMDGPUTargetTransformInfo.h"
 #include "GCNIterativeScheduler.h"
 #include "GCNSchedStrategy.h"
 #include "MCTargetDesc/AMDGPUMCTargetDesc.h"
 #include "R600MachineScheduler.h"
 #include "SIMachineFunctionInfo.h"
 #include "SIMachineScheduler.h"
 #include "TargetInfo/AMDGPUTargetInfo.h"
+#include "llvm/Analysis/ValueTracking.h"
 #include "llvm/CodeGen/GlobalISel/IRTranslator.h"
 #include "llvm/CodeGen/GlobalISel/InstructionSelect.h"
 #include "llvm/CodeGen/GlobalISel/Legalizer.h"
 #include "llvm/CodeGen/GlobalISel/Localizer.h"
 #include "llvm/CodeGen/GlobalISel/RegBankSelect.h"
 #include "llvm/CodeGen/MIRParser/MIParser.h"
 #include "llvm/CodeGen/Passes.h"
 #include "llvm/CodeGen/TargetPassConfig.h"
unsigned AMDGPUTargetMachine::getAssumedAddrSpace(const Value *V) const {
   if (!LD)
     return AMDGPUAS::UNKNOWN_ADDRESS_SPACE;
 
   // It must be a generic pointer loaded.
   assert(V->getType()->isPointerTy() &&
          V->getType()->getPointerAddressSpace() == AMDGPUAS::FLAT_ADDRESS);
 
   const auto *Ptr = LD->getPointerOperand();
-  if (Ptr->getType()->getPointerAddressSpace() != AMDGPUAS::CONSTANT_ADDRESS)
-    return AMDGPUAS::UNKNOWN_ADDRESS_SPACE;
-  // For a generic pointer loaded from the constant memory, it could be assumed
-  // as a global pointer since the constant memory is only populated on the
-  // host side. As implied by the offload programming model, only global
-  // pointers could be referenced on the host side.
+
+  // For a generic pointer loaded from the constant memory, it could be
+  // assumed as a global pointer since the constant memory is only populated
+  // on the host side. As implied by the offload programming model, only
+  // global pointers could be referenced on the host side.
+  if (Ptr->getType()->getPointerAddressSpace() == AMDGPUAS::CONSTANT_ADDRESS)
+    return AMDGPUAS::GLOBAL_ADDRESS;
+
+  // For a generic pointer loaded from the readonly kernel function pointer
+  // arguments, it could be assumed as a global pointer since that memory is
+  // also only prepared on the host side.
+  const Argument *Arg = dyn_cast_or_null<Argument>(getUnderlyingObject(Ptr));
+  if (Arg && Arg->onlyReadsMemory() && Arg->hasNoAliasAttr() &&
+      Arg->getParent()->getCallingConv() == CallingConv::AMDGPU_KERNEL)
     return AMDGPUAS::GLOBAL_ADDRESS;
+
+  return AMDGPUAS::UNKNOWN_ADDRESS_SPACE;
 }
 
 TargetTransformInfo
 R600TargetMachine::getTargetTransformInfo(const Function &F) {
   return TargetTransformInfo(R600TTIImpl(this, F));
 }
 
 //===----------------------------------------------------------------------===//

llvm/test/Transforms/InferAddressSpaces/AMDGPU/assumed-addrspace.ll

define amdgpu_kernel void @generic_ptr_from_aggregate_argument(%struct.S addrspace(4)* byref(%struct.S) align 8 %0) {
   %p0 = load i32*, i32* addrspace(4)* %f0
   %f1 = getelementptr inbounds %struct.S, %struct.S addrspace(4)* %0, i64 0, i32 1
   %p1 = load float*, float* addrspace(4)* %f1
   %v0 = load i32, i32* %p0
   %v1 = sitofp i32 %v0 to float
   store float %v1, float* %p1
   ret void
 }
+
+%struct.arg = type { float* }
+
+; CHECK-LABEL: @generic_ptr_from_readonly_arg0
+; CHECK: addrspacecast i32* %p0 to i32 addrspace(1)*
+; CHECK: load i32, i32 addrspace(1)*
+; CHECK: store i32 %v0, i32 addrspace(1)*
+; CHECK: ret
+define amdgpu_kernel void @generic_ptr_from_readonly_arg0(%struct.arg addrspace(1)* noalias readonly %in, float addrspace(1)* nocapture %out) {
+  %f0 = bitcast %struct.arg addrspace(1)* %in to i32* addrspace(1)*
+  %p0 = load i32*, i32* addrspace(1)* %f0, align 8
+  %v0 = load i32, i32* %p0, align 4
+  %q0 = bitcast float addrspace(1)* %out to i32 addrspace(1)*
+  store i32 %v0, i32 addrspace(1)* %q0, align 4
+  ret void
+}
+
+; CHECK-LABEL: @generic_ptr_from_readonly_arg1
+; CHECK-NOT: addrspacecast i32* %p0 to i32 addrspace(1)*
+; CHECK-NOT: load i32, i32 addrspace(1)*
+; CHECK: store i32 %v0, i32 addrspace(1)*
+; CHECK: ret
+define amdgpu_kernel void @generic_ptr_from_readonly_arg1(%struct.arg addrspace(1)* readonly %in, float addrspace(1)* nocapture %out) {
+  %f0 = bitcast %struct.arg addrspace(1)* %in to i32* addrspace(1)*
+  %p0 = load i32*, i32* addrspace(1)* %f0, align 8
+  %v0 = load i32, i32* %p0, align 4
+  %q0 = bitcast float addrspace(1)* %out to i32 addrspace(1)*
+  store i32 %v0, i32 addrspace(1)* %q0, align 4
+  ret void
+}