The code is looking for (sext_inreg (or (shl X, C2), (shr (and Y, C3), C1))).
We need to ensure X and Y are the same.
The comment at the top of SelectRORIW says
// (SIGN_EXTEND_INREG (OR (SHL (AsserSext RS1, i32), VC2), // (SRL (AND (AssertSext RS2, i32), VC3), VC1)))
should it make it apparent that RS1 must equal RS2?
You could fix up the typo versio here, and has a roriw below.