[lld-macho] Add ARM64 target arch

[gkm]

Summary

This is an initial base commit for ARM64 target arch support. I don't represent that it complete or bug-free, but wish to put it out for review now that some basic things like branch target & load/store address relocs are working.

I can add more tests to this base commit, or add them in follow-up commits.

It is not entirely clear whether I use the "ARM64" (Apple) or "AArch64" (non-Apple) naming convention. Guidance is appreciated.

[gkm]

• remove some left-over X86_64 code

[gkm]

• add stubs support

[gkm]

• cleanups

[gkm]

• correct some reloc length validity sets in arm64RelocAttrs[]

[int3]

lld/MachO/Arch/ARM64.cpp

49

What's the difference between None and false here?

(Also, clang-tidy naming issues seem legit)

80–91

can we factor this out and reuse it across both architectures?

94–108

some comments about the different arm64 instruction formats would be helpful

lld/MachO/Arch/X86_64.cpp

83

what does 'base encoding' mean?

[smeenai]

It is not entirely clear whether I use the "ARM64" (Apple) or "AArch64" (non-Apple) naming convention. Guidance is appreciated.

I would use arm64, since we're targeting Apple platforms.

Still working through the target code, but an initial round of comments.

lld/MachO/Arch/X86_64.cpp

82–83

I think val makes more sense than va here, since it's the calculated value for the relocation that you're writing out, which isn't necessary the target's VA (e.g. for PC-relative relocations).

lld/MachO/Driver.cpp

455–456

This should be a comparison against the arch that we're targeting, not a comparison against all the archs we support, since the intent is to filter out lines that aren't for the current target arch.

lld/test/lit.cfg.py

70 ↗

(On Diff #295940)

I think the llvm-config output will always say AArch64 and not ARM64. Is this line needed?

[smeenai]

lld/MachO/Arch/ARM64.cpp

55

Representing the valid lengths as a bitfield is a neat idea :)

111

Would be helpful to elaborate on what "base encoding" is.

112

What is the term "fixup" supposed to refer to? It's a little confusing because ld64 appears to use the term "fixup" instead of "relocation", so I don't know if this is a reference to that or something else.

115

Would be helpful to comment the reason for this assertion (I imagine it's because an instruction VA should always be 4-byte aligned).

lld/MachO/Arch/X86_64.cpp

83

Is this comment applicable to X86_64?

lld/MachO/InputSection.cpp

89

Same comment here about VA vs. val. I think I'd prefer to just shift the pcrel handling entirely into relocateOne; yes, it's architecture-agnostic, so there's a *tiny* bit of duplication per-architecture, but then all the logic of going from a referent VA to an actual relocation value gets shifted into relocateOne, which is nicer IMO.

[MarcusJohnson91]

It is not entirely clear whether I use the "ARM64" (Apple) or "AArch64" (non-Apple) naming convention. Guidance is appreciated.

I'd go with AArch64 to match LLVM's naming convention with the backend, if you want to enable ARM64 support when compiling the monorepo, you have to add AArch64 to the cmake variable LLVM_TARGETS_TO_BUILD, so I say be consistent with that.

[gkm]

lld/MachO/Arch/ARM64.cpp

49

llvm::Optional<bool> is tri-state: true, false, and None meaning any / don't care / not applicable.

80–91

Yes. When the dust settles, I will look for this and other opportunities.

94–108

Indeed. When I find the document that catalogues and names the encoding formats I will reference those.

112

I renamed: s/encoding/base/; s/fixupRelocFormat/encodeRelocFormat/

lld/MachO/Arch/X86_64.cpp

82–83

This was intentional: va = Virtual Address. The caller InputSection::writeTo() used to combine the va and r.addend to yield the val, but I moved that inside the TargetInfo::relocateOne() members.

For clarity, I prefer VMA over VA for these names, but there are many instances, e.g., getVA(), so I'll only do that with consent, and in a separate diff.

83

No, I suspect not. I will try assert(r.addend == 0) in X86_64::prepareSymbolRelocation() to be certain.

lld/MachO/Driver.cpp

455–456

Do you know offhand what is the recommended API for comparing the target arch with an arch name string?

lld/test/lit.cfg.py

70 ↗

(On Diff #295940)

It's a temporary expediency so that test case REQUIRES: arm64 filter works. I'll iron this out when the AArch64 vs. ARM64 choice is resolved.

[tschuett]

@psmith might be able to help.

The encodings of adrp, add, stp, ldr, ... are described here:
https://developer.arm.com/documentation/ddi0487/latest/

I was referring to the fixup calls.

[gkm]

The encodings of adrp, add, stp, ldr, ... are described here:
https://developer.arm.com/documentation/ddi0487/latest/

😆 Yes, I have that 8248(!) page doc. Chapter C4: A64 Instruction Set Encoding has all the details. Unlike PowerPC, it fails to neatly classifies & names the main encodings. Even so, this ought to suffice.

[tschuett]

Sorry for being slow.

For every adrp instruction you call fixupPage21.

inline uint64_t fixupPage21(uint64_t encoding, uint64_t va) {
  return (encoding | bitField(va, 12, 2, 29) | bitField(va, 14, 19, 5));
}

According to the ARMARM. the PC relative address is encoded into two sections. One starting at offset 5 and the width is 19. The second one starts at offset 29 and the width is 2. That matches the 2 and 29 and the 19 and 5 in fixupPage 21. I don't know yet how the explain the 12 and 14.

is encoded as "immhi:immlo" times 4096. This could explain the 12 and 14 for division.

[tschuett]

only for the b instruction, you use

inline uint64_t fixupBranch26(uint64_t encoding, uint64_t va) {
  return (encoding | bitField(va, 2, 26, 0));
}

The label is encoded in a slot starting at 0 and the width is 26, which matches the 0 and 26. The label is encoded as imm26 times 4, which could explain the 2. The 2 in bitField divides by 4.

[gkm]

lld/MachO/InputSection.cpp

89

pcrel handling requires the value of InputSection::getVA(), accessible here via this. Moving it into relocateOne means passing another argument. I think it's better to keep it here.

[int3]

lld/MachO/Arch/ARM64.cpp

49

What I was trying to ask was: when is the distinction between false and None important? After looking a bit more closely at the code, I guess we want None for things like ARM64_RELOC_UNSIGNED which can refer to both TLV and non-TLV symbols. Anyway, would be good to have a comment about it...

lld/MachO/Arch/X86_64.cpp

82–83

I think what @smeenai meant is, even though this parameter doesn't include the addend, it still isn't the VA when we are handling pcrel relocations.

lld/MachO/InputSection.cpp

89

my preference would be to keep it here but also to keep Val over VA.

[int3]

lld/MachO/Arch/ARM64.cpp

94

nit: AFAIK inline doesn't have a major impact on the compiler's inlining decisions and isn't necessary within cpp files. OTOH we should mark this static.

[gkm]

lld/MachO/Arch/ARM64.cpp

49

non-None means perform the validity check against sym->isTlv(). I populated the table according to the checks performed in lld/MachO/Arch/X86_64.cpp. It occurs to me now that more relocation types can likely be non-None, e.g., ARM64_RELOC_BRANCH26 should be false. As I get further with test cases and understand more, I might find others.

lld/MachO/InputSection.cpp

89

"value" is even better than "val", to further distinguish it visually from "va". 🚲

[gkm]

• rebase & amend according to review feedback

[int3]

I can add more tests to this base commit, or add them in follow-up commits.

I'm fine with either. @smeenai, what's the typical approach here?

lld/MachO/Arch/ARM64.cpp

128–131

ultra nit: I think there should be spaces around em dashes, i.e. --

also s/relococatable/relocatable/

lld/MachO/InputSection.cpp

89

while we're 🚲🏠ing... I think we should keep the referentVA name in lines 38-51 above and create a new value variable above line 54. That gives a clearer indication that we are handling a VA until we subtract the PC. Moreover, I think referentValue / referentVal is actually a bit of a misnomer, despite its parallels to referentVA -- "address of the referent" makes sense, but subtracting the PC doesn't give us the "value of the referent". relocValue or just value seems more accurate.

[int3]

lld/test/MachO/relocations.s

1

nit: lld-elf's tests use x86-64 instead of x86_64 in their filenames

[gkm]

@smeenai and I agreed that this diff should contain a complete set of tests.

lld/MachO/Arch/ARM64.cpp

128–131

The real problem is that there are 4(!) em dashes in one tortuous run-on sentence. I reworded.

[gkm]

• amend according to review feedback

[gkm]

• move encoding bitfield comments outside their functions

[gkm]

• Factor skeletal paired-reloc support into a separate prerequisite diff
• ARM64RelocAttrs: drop type, add name, drop Optional<> from tlv
• s/getImplicitAddend/getAddend/ because it handles all forms of addend: implicit, explicit, paired.
• Add arm64 arch to test inputs MacOSX.sdk/usr/lib/lib*.tbd

[int3]

lld/MachO/Arch/ARM64.cpp

96–109

can we factor out the validation code into a separate function?

[gkm]

• Update according to refactored reloc handling

[int3]

lld/MachO/Arch/ARM64.cpp

120–123

I think there are some typos in this paragraph...

261–262

nit: can we have ldr in lowercase? since it's also in lowercase in e.g. stubHelperEntryCode above.

I also have a slight preference that the error messages have them in lowercase as well, but I guess it doesn't matter as much as long as things are consistent, and all-caps saves us from having to quote them for clarity

lld/MachO/Driver.cpp

129–136

ld64 seems to make unspecified arch an error when LTO is being used. I'm not sure why though. Feels like we should be able to infer the arch from our input files regardless

648

as the comment above states, we should always return true from this function when we have arm64. (ld64 will emit a warning if -no_pie is used on that arch.)

lld/MachO/InputSection.h

35–36

what's the motivation behind this change?

lld/MachO/SyntheticSections.cpp

383

so we can actually bind to __dso_handle?

[gkm]

lld/MachO/Arch/ARM64.cpp

261–262

The comment lines are copied directly and unaltered from the ARM manual.

lld/MachO/InputSection.h

35–36

That's a leftover from an aborted experiment.

lld/MachO/SyntheticSections.cpp

383

Yes, we do for arm64

[gkm]

• revise according to review feedback

[int3]

lld/MachO/Arch/ARM64.cpp

261–262

ah fair enough. Not sure if I missed it, but it'd be good to leave a comment somewhere that C6.2.131 refers to the section in the ARM manual.

lld/MachO/Driver.cpp

648

could you leave a TODO here so we remember to test this behavior?

lld/MachO/SyntheticSections.cpp

383

would be good to add a test, or at least leave a TODO here before landing it. I want to make sure I didn't miss a similar case for x86.

lld/test/MachO/relocations.s

1

unaddressed nit :p

[int3]

(looks like there are failing tests)

[gkm]

• rebase & remove incomplete+failing test (will add later)

[gkm]

• rebase

[gkm]

• Make RelocAttrBits::LLVM_BITMASK_LARGEST_ENUMERATOR adequate to escape assertions.

[uabelho]

lld/MachO/Arch/ARM64.cpp

75

gcc warns about "type < 0" always being false since type is unsigned.
Can it be removed?

Similarly with the assert above, I suppose type >= 0 is always true and it can be removed.

[uabelho]

lld/MachO/Arch/ARM64.cpp

75

I removed the always true/false conditions in
https://reviews.llvm.org/rGcaff023b7799
to silence compiler warnings.

lld/MachO/Arch/ARM64.cpp

+//===- ARM64.cpp ----------------------------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "InputFiles.h"
+#include "Symbols.h"
+#include "SyntheticSections.h"
+#include "Target.h"
+
+#include "lld/Common/ErrorHandler.h"
+#include "llvm/ADT/SmallVector.h"
+#include "llvm/ADT/StringRef.h"
+#include "llvm/BinaryFormat/MachO.h"
+#include "llvm/Support/Endian.h"
+#include "llvm/Support/MathExtras.h"
+
+using namespace llvm::MachO;
+using namespace llvm::support::endian;
+using namespace lld;
+using namespace lld::macho;
+
+namespace {
+
+struct ARM64 : TargetInfo {
+  ARM64();
+
+  uint64_t getEmbeddedAddend(MemoryBufferRef, const section_64 &,
+                             const relocation_info) const override;
+  void relocateOne(uint8_t *loc, const Reloc &, uint64_t va,
+                   uint64_t pc) const override;
+
+  void writeStub(uint8_t *buf, const macho::Symbol &) const override;
+  void writeStubHelperHeader(uint8_t *buf) const override;
+  void writeStubHelperEntry(uint8_t *buf, const DylibSymbol &,
+                            uint64_t entryAddr) const override;
+
+  void relaxGotLoad(uint8_t *loc, uint8_t type) const override;
+  const TargetInfo::RelocAttrs &getRelocAttrs(uint8_t type) const override;
+  uint64_t getPageSize() const override { return 16 * 1024; }
+};
+
+} // namespace
+
+// Random notes on reloc types:
+// ADDEND always pairs with BRANCH26, PAGE21, or PAGEOFF12
+// SUBTRACTOR always pairs with UNSIGNED (a delta between two sections)
+// POINTER_TO_GOT: 4-byte is pc-relative, 8-byte is absolute
+
+const TargetInfo::RelocAttrs &ARM64::getRelocAttrs(uint8_t type) const {
+  static const std::array<TargetInfo::RelocAttrs, 11> relocAttrsArray{{
+#define B(x) RelocAttrBits::x
+      {"UNSIGNED", B(ABSOLUTE) | B(EXTERN) | B(LOCAL) | B(TLV) | B(DYSYM8) |
+                       B(BYTE4) | B(BYTE8)},
+      {"SUBTRACTOR", B(SUBTRAHEND) | B(BYTE8)},
+      {"BRANCH26", B(PCREL) | B(EXTERN) | B(BRANCH) | B(BYTE4)},
+      {"PAGE21", B(PCREL) | B(EXTERN) | B(BYTE4)},
+      {"PAGEOFF12", B(ABSOLUTE) | B(EXTERN) | B(BYTE4)},
+      {"GOT_LOAD_PAGE21", B(PCREL) | B(EXTERN) | B(GOT) | B(BYTE4)},
+      {"GOT_LOAD_PAGEOFF12",
+       B(ABSOLUTE) | B(EXTERN) | B(GOT) | B(LOAD) | B(BYTE4)},
+      {"POINTER_TO_GOT", B(PCREL) | B(EXTERN) | B(GOT) | B(BYTE4) | B(BYTE8)},
+      {"TLVP_LOAD_PAGE21", B(PCREL) | B(EXTERN) | B(TLV) | B(BYTE4)},
+      {"TLVP_LOAD_PAGEOFF12",
+       B(ABSOLUTE) | B(EXTERN) | B(TLV) | B(LOAD) | B(BYTE4)},
+      {"ADDEND", B(ADDEND)},
+#undef B
+  }};
+  assert(type >= 0 && type < relocAttrsArray.size() &&
+         "invalid relocation type");
+  if (type < 0 || type >= relocAttrsArray.size())
+    return TargetInfo::invalidRelocAttrs;
+  return relocAttrsArray[type];
+}
+
+uint64_t ARM64::getEmbeddedAddend(MemoryBufferRef mb, const section_64 &sec,
+                                  const relocation_info rel) const {
+  // TODO(gkm): extract embedded addend just so we can assert that it is 0
+  return 0;
+}
+
+inline uint64_t bitField(uint64_t value, int right, int width, int left) {
+  return ((value >> right) & ((1 << width) - 1)) << left;
+}
+
+//              25                                                0
+// +-----------+---------------------------------------------------+
+// |           |                       imm26                       |
+// +-----------+---------------------------------------------------+
+
+inline uint64_t encodeBranch26(uint64_t base, uint64_t va) {
+  // Since branch destinations are 4-byte aligned, the 2 least-
+  // significant bits are 0. They are right shifted off the end.
+  return (base | bitField(va, 2, 26, 0));
+}
+
+//   30 29          23                                  5
+// +-+---+---------+-------------------------------------+---------+
+// | |ilo|         |                immhi                |         |
+// +-+---+---------+-------------------------------------+---------+
+
+inline uint64_t encodePage21(uint64_t base, uint64_t va) {
+  return (base | bitField(va, 12, 2, 29) | bitField(va, 14, 19, 5));
+}
+
+//                      21                   10
+// +-------------------+-----------------------+-------------------+
+// |                   |         imm12         |                   |
+// +-------------------+-----------------------+-------------------+
+
+inline uint64_t encodePageOff12(uint64_t base, uint64_t va) {
+  int scale = ((base & 0x3b000000) == 0x39000000) ? base >> 30 : 0;
+  // TODO(gkm): extract embedded addend and warn if != 0
+  // uint64_t addend = ((base & 0x003FFC00) >> 10);
+  return (base | bitField(va, scale, 12 - scale, 10));
+}
+
+inline uint64_t pageBits(uint64_t address) {
+  const uint64_t pageMask = ~0xfffull;
+  return address & pageMask;
+}
+
+// For instruction relocations (load, store, add), the base
+// instruction is pre-populated in the text section. A pre-populated
+// instruction has opcode & register-operand bits set, with immediate
+// operands zeroed. We read it from text, OR-in the immediate
+// operands, then write-back the completed instruction.
+
+void ARM64::relocateOne(uint8_t *loc, const Reloc &r, uint64_t value,
+                        uint64_t pc) const {
+  uint32_t base = ((r.length == 2) ? read32le(loc) : 0);
+  value += r.addend;
+  switch (r.type) {
+  case ARM64_RELOC_BRANCH26:
+    value = encodeBranch26(base, value - pc);
+    break;
+  case ARM64_RELOC_UNSIGNED:
+    break;
+  case ARM64_RELOC_POINTER_TO_GOT:
+    if (r.pcrel)
+      value -= pc;
+    break;
+  case ARM64_RELOC_PAGE21:
+  case ARM64_RELOC_GOT_LOAD_PAGE21:
+  case ARM64_RELOC_TLVP_LOAD_PAGE21:
+    assert(r.pcrel);
+    value = encodePage21(base, pageBits(value) - pageBits(pc));
+    break;
+  case ARM64_RELOC_PAGEOFF12:
+  case ARM64_RELOC_GOT_LOAD_PAGEOFF12:
+  case ARM64_RELOC_TLVP_LOAD_PAGEOFF12:
+    assert(!r.pcrel);
+    value = encodePageOff12(base, value);
+    break;
+  default:
+    llvm_unreachable("unexpected relocation type");
+  }
+
+  switch (r.length) {
+  case 2:
+    write32le(loc, value);
+    break;
+  case 3:
+    write64le(loc, value);
+    break;
+  default:
+    llvm_unreachable("invalid r_length");
+  }
+}
+
+static constexpr uint32_t stubCode[] = {
+    0x90000010, // 00: adrp  x16, __la_symbol_ptr@page
+    0xf9400210, // 04: ldr   x16, [x16, __la_symbol_ptr@pageoff]
+    0xd61f0200, // 08: br    x16
+};
+
+void ARM64::writeStub(uint8_t *buf8, const macho::Symbol &sym) const {
+  auto *buf32 = reinterpret_cast<uint32_t *>(buf8);
+  uint64_t pcPageBits =
+      pageBits(in.stubs->addr + sym.stubsIndex * sizeof(stubCode));
+  uint64_t lazyPointerVA = in.lazyPointers->addr + sym.stubsIndex * WordSize;
+  buf32[0] = encodePage21(stubCode[0], pageBits(lazyPointerVA) - pcPageBits);
+  buf32[1] = encodePageOff12(stubCode[1], lazyPointerVA);
+  buf32[2] = stubCode[2];
+}
+
+static constexpr uint32_t stubHelperHeaderCode[] = {
+    0x90000011, // 00: adrp  x17, _dyld_private@page
+    0x91000231, // 04: add   x17, x17, _dyld_private@pageoff
+    0xa9bf47f0, // 08: stp   x16/x17, [sp, #-16]!
+    0x90000010, // 0c: adrp  x16, dyld_stub_binder@page
+    0xf9400210, // 10: ldr   x16, [x16, dyld_stub_binder@pageoff]
+    0xd61f0200, // 14: br    x16
+};
+
+void ARM64::writeStubHelperHeader(uint8_t *buf8) const {
+  auto *buf32 = reinterpret_cast<uint32_t *>(buf8);
+  auto pcPageBits = [](int i) {
+    return pageBits(in.stubHelper->addr + i * sizeof(uint32_t));
+  };
+  uint64_t loaderVA = in.imageLoaderCache->getVA();
+  buf32[0] =
+      encodePage21(stubHelperHeaderCode[0], pageBits(loaderVA) - pcPageBits(0));
+  buf32[1] = encodePageOff12(stubHelperHeaderCode[1], loaderVA);
+  buf32[2] = stubHelperHeaderCode[2];
+  uint64_t binderVA =
+      in.got->addr + in.stubHelper->stubBinder->gotIndex * WordSize;
+  buf32[3] =
+      encodePage21(stubHelperHeaderCode[3], pageBits(binderVA) - pcPageBits(3));
+  buf32[4] = encodePageOff12(stubHelperHeaderCode[4], binderVA);
+  buf32[5] = stubHelperHeaderCode[5];
+}
+
+static constexpr uint32_t stubHelperEntryCode[] = {
+    0x18000050, // 00: ldr  w16, l0
+    0x14000000, // 04: b    stubHelperHeader
+    0x00000000, // 08: l0: .long 0
+};
+
+void ARM64::writeStubHelperEntry(uint8_t *buf8, const DylibSymbol &sym,
+                                 uint64_t entryVA) const {
+  auto *buf32 = reinterpret_cast<uint32_t *>(buf8);
+  auto pcVA = [entryVA](int i) { return entryVA + i * sizeof(uint32_t); };
+  uint64_t stubHelperHeaderVA = in.stubHelper->addr;
+  buf32[0] = stubHelperEntryCode[0];
+  buf32[1] =
+      encodeBranch26(stubHelperEntryCode[1], stubHelperHeaderVA - pcVA(1));
+  buf32[2] = sym.lazyBindOffset;
+}
+
+void ARM64::relaxGotLoad(uint8_t *loc, uint8_t type) const {
+  // The instruction format comments below are quoted from
+  // Arm® Architecture Reference Manual
+  // Armv8, for Armv8-A architecture profile
+  // ARM DDI 0487G.a (ID011921)
+  uint32_t instruction = read32le(loc);
+  // C6.2.132 LDR (immediate)
+  // LDR <Xt>, [<Xn|SP>{, #<pimm>}]
+  if ((instruction & 0xffc00000) != 0xf9400000)
+    error(getRelocAttrs(type).name + " reloc requires LDR instruction");
+  assert(((instruction >> 10) & 0xfff) == 0 &&
+         "non-zero embedded LDR immediate");
+  // C6.2.4 ADD (immediate)
+  // ADD <Xd|SP>, <Xn|SP>, #<imm>{, <shift>}
+  instruction = ((instruction & 0x001fffff) | 0x91000000);
+  write32le(loc, instruction);
+}
+
+ARM64::ARM64() {
+  cpuType = CPU_TYPE_ARM64;
+  cpuSubtype = CPU_SUBTYPE_ARM64_ALL;
+
+  stubSize = sizeof(stubCode);
+  stubHelperHeaderSize = sizeof(stubHelperHeaderCode);
+  stubHelperEntrySize = sizeof(stubHelperEntryCode);
+}
+
+TargetInfo *macho::createARM64TargetInfo() {
+  static ARM64 t;
+  return &t;
+}

lld/MachO/Arch/X86_64.cpp

struct X86_64 : TargetInfo {
 
   void writeStub(uint8_t *buf, const macho::Symbol &) const override;
   void writeStubHelperHeader(uint8_t *buf) const override;
   void writeStubHelperEntry(uint8_t *buf, const DylibSymbol &,
                             uint64_t entryAddr) const override;
 
   void relaxGotLoad(uint8_t *loc, uint8_t type) const override;
   const TargetInfo::RelocAttrs &getRelocAttrs(uint8_t type) const override;
+  uint64_t getPageSize() const override { return 4 * 1024; }
 };
 
 } // namespace
 
 const TargetInfo::RelocAttrs &X86_64::getRelocAttrs(uint8_t type) const {
   static const std::array<TargetInfo::RelocAttrs, 10> relocAttrsArray{{
 #define B(x) RelocAttrBits::x
       {"UNSIGNED", B(TLV) | B(ABSOLUTE) | B(EXTERN) | B(LOCAL) | B(DYSYM8) |
uint64_t X86_64::getEmbeddedAddend(MemoryBufferRef mb, const section_64 &sec,
   case 2:
     return read32le(loc);
   case 3:
     return read64le(loc);
   default:
     llvm_unreachable("invalid r_length");
   }
 }
 
 void X86_64::relocateOne(uint8_t *loc, const Reloc &r, uint64_t value,
                          uint64_t pc) const {
   value += r.addend;
   if (r.pcrel)
     value -= (pc + 4);
   switch (r.length) {
   case 2:
     write32le(loc, value);
     break;

lld/MachO/CMakeLists.txt

 set(LLVM_TARGET_DEFINITIONS Options.td)
 tablegen(LLVM Options.inc -gen-opt-parser-defs)
 add_public_tablegen_target(MachOOptionsTableGen)
 
 include_directories(${LLVM_MAIN_SRC_DIR}/../libunwind/include)
 
 add_lld_library(lldMachO2
   Arch/X86_64.cpp
+  Arch/ARM64.cpp
   UnwindInfoSection.cpp
   Driver.cpp
   DriverUtils.cpp
   Dwarf.cpp
   ExportTrie.cpp
   InputFiles.cpp
   InputSection.cpp
   LTO.cpp

lld/MachO/Driver.cpp

for (StringRef dir : config->frameworkSearchPaths) {
 
     if (Optional<std::string> path = resolveDylibPath(symlink))
       return path;
   }
   return {};
 }
 
 static TargetInfo *createTargetInfo(opt::InputArgList &args) {
-  StringRef arch = args.getLastArgValue(OPT_arch, "x86_64");
-  config->arch = MachO::getArchitectureFromName(
-      args.getLastArgValue(OPT_arch, arch));
-  switch (config->arch) {
-  case MachO::AK_x86_64:
-  case MachO::AK_x86_64h:
+  // TODO: should unspecified arch be an error rather than defaulting?
+  // Jez: ld64 seems to make unspecified arch an error when LTO is
+  // being used. I'm not sure why though. Feels like we should be able
+  // to infer the arch from our input files regardless
+  StringRef archName = args.getLastArgValue(OPT_arch, "x86_64");
+  config->arch = MachO::getArchitectureFromName(archName);
+  switch (MachO::getCPUTypeFromArchitecture(config->arch).first) {
+  case MachO::CPU_TYPE_X86_64:
     return createX86_64TargetInfo();
+  case MachO::CPU_TYPE_ARM64:
+    return createARM64TargetInfo();
   default:
-    fatal("missing or unsupported -arch " + arch);
+    fatal("missing or unsupported -arch " + archName);
   }
 }
 
 static bool warnIfNotDirectory(StringRef option, StringRef path) {
   if (!fs::exists(path)) {
     warn("directory not found for option -" + option + path);
     return false;
   } else if (!fs::is_directory(path)) {
CPUType cpuType = StringSwitch<CPUType>(line)
                           .StartsWith("arm64:", CPU_TYPE_ARM64)
                           .StartsWith("ppc:", CPU_TYPE_POWERPC)
                           .StartsWith("ppc64:", CPU_TYPE_POWERPC64)
                           .Default(CPU_TYPE_ANY);
     // Drop the CPU type as well as the colon
     if (cpuType != CPU_TYPE_ANY)
       line = line.drop_until([](char c) { return c == ':'; }).drop_front();
     // TODO: Update when we extend support for other CPUs
-    if (cpuType != CPU_TYPE_ANY && cpuType != CPU_TYPE_X86_64)
+    if (cpuType != CPU_TYPE_ANY && cpuType != CPU_TYPE_X86_64 &&
+        cpuType != CPU_TYPE_ARM64)
       continue;
 
     constexpr std::array<StringRef, 2> fileEnds = {".o:", ".o):"};
     for (StringRef fileEnd : fileEnds) {
       size_t pos = line.find(fileEnd);
       if (pos != StringRef::npos) {
         // Split the string around the colon
         objectFile = line.take_front(pos + fileEnd.size() - 1);
         line = line.drop_front(pos + fileEnd.size());
         break;
       }
     }
     symbol = line.trim();
 
     if (!symbol.empty()) {
       SymbolPriorityEntry &entry = config->priorities[symbol];
       if (!objectFile.empty())
         entry.objectFiles.insert(std::make_pair(objectFile, priority));
       else
         entry.anyObjectFile = std::max(entry.anyObjectFile, priority);
static const char *getReproduceOption(opt::InputArgList &args) {
   if (auto *arg = args.getLastArg(OPT_reproduce))
     return arg->getValue();
   return getenv("LLD_REPRODUCE");
 }
 
 static bool isPie(opt::InputArgList &args) {
   if (config->outputType != MH_EXECUTE || args.hasArg(OPT_no_pie))
     return false;
+  if (config->arch == AK_arm64 || config->arch == AK_arm64e)
+    return true;
 
   // TODO: add logic here as we support more archs. E.g. i386 should default
-  // to PIE from 10.7, arm64 should always be PIE, etc
+  // to PIE from 10.7
   assert(config->arch == AK_x86_64 || config->arch == AK_x86_64h);
 
   PlatformKind kind = config->platform.kind;
   if (kind == PlatformKind::macOS &&
       config->platform.minimum >= VersionTuple(10, 6))
     return true;
 
   if (kind == PlatformKind::iOSSimulator || kind == PlatformKind::driverKit)
     return true;
 

lld/MachO/InputFiles.cpp

static bool validateRelocationInfo(MemoryBufferRef mb, const section_64 &sec,
   };
 
   if (!relocAttrs.hasAttr(RelocAttrBits::LOCAL) && !rel.r_extern)
     error(message("must be extern"));
   if (relocAttrs.hasAttr(RelocAttrBits::PCREL) != rel.r_pcrel)
     error(message(Twine("must ") + (rel.r_pcrel ? "not " : "") +
                   "be PC-relative"));
   if (isThreadLocalVariables(sec.flags) &&
-      (!relocAttrs.hasAttr(RelocAttrBits::TLV) ||
-       relocAttrs.hasAttr(RelocAttrBits::LOAD)))
+      !relocAttrs.hasAttr(RelocAttrBits::TLV | RelocAttrBits::BYTE8))
     error(message("not allowed in thread-local section, must be UNSIGNED"));
   if (rel.r_length < 2 || rel.r_length > 3 ||
       !relocAttrs.hasAttr(static_cast<RelocAttrBits>(1 << rel.r_length))) {
-    static SmallVector<StringRef, 4> widths{"INVALID", "4", "8", "4 or 8"};
+    static SmallVector<StringRef, 4> widths{"0", "4", "8", "4 or 8"};
     error(message("has width " + std::to_string(1 << rel.r_length) +
                   " bytes, but must be " +
                   widths[(static_cast<int>(relocAttrs.bits) >> 2) & 3] +
                   " bytes"));
   }
   return valid;
 }
 

lld/MachO/InputSection.h

 
 namespace lld {
 namespace macho {
 
 class InputFile;
 class InputSection;
 class OutputSection;
 class Symbol;
+class Defined;
 
 struct Reloc {
   uint8_t type = llvm::MachO::GENERIC_RELOC_INVALID;
   bool pcrel = false;
   uint8_t length = 0;
   // The offset from the start of the subsection that this relocation belongs
   // to.
   uint32_t offset = 0;
   // Adding this offset to the address of the referent symbol or subsection
   // gives the destination that this relocation refers to.
   uint64_t addend = 0;
   llvm::PointerUnion<Symbol *, InputSection *> referent = nullptr;
 };
 
 class InputSection {
 public:
   virtual ~InputSection() = default;
   virtual uint64_t getSize() const { return data.size(); }
   virtual uint64_t getFileSize() const;
   uint64_t getFileOffset() const;

lld/MachO/InputSection.cpp

 
 void InputSection::writeTo(uint8_t *buf) {
   if (getFileSize() == 0)
     return;
 
   memcpy(buf, data.data(), data.size());
 
   for (size_t i = 0; i < relocs.size(); i++) {
-    const Reloc &r = relocs[i];
-    uint8_t *loc = buf + r.offset;
-    auto *fromSym = target->hasAttr(r.type, RelocAttrBits::SUBTRAHEND)
+    auto *fromSym = target->hasAttr(relocs[i].type, RelocAttrBits::SUBTRAHEND)
                         ? relocs[i++].referent.dyn_cast<Symbol *>()
                         : nullptr;
+    const Reloc &r = relocs[i];
+    uint8_t *loc = buf + r.offset;
     uint64_t referentVA = 0;
     if (fromSym) {
       auto *toSym = r.referent.dyn_cast<Symbol *>();
       referentVA = toSym->getVA() - fromSym->getVA();
     } else if (auto *referentSym = r.referent.dyn_cast<Symbol *>()) {
       if (target->hasAttr(r.type, RelocAttrBits::LOAD) &&
           !referentSym->isInGot())
         target->relaxGotLoad(loc, r.type);
       referentVA = resolveSymbolVA(loc, *referentSym, r.type);
 
       if (isThreadLocalVariables(flags)) {
         // References from thread-local variable sections are treated as offsets
         // relative to the start of the thread-local data memory area, which
         // is initialized via copying all the TLV data sections (which are all
         // contiguous).
         if (isa<Defined>(referentSym))
           referentVA -= firstTLVDataSection->addr;
       }
     } else if (auto *referentIsec = r.referent.dyn_cast<InputSection *>()) {
       referentVA = referentIsec->getVA();
     }
     target->relocateOne(loc, r, referentVA, getVA() + r.offset);
   }
 }
 
 bool macho::isCodeSection(InputSection *isec) {
   uint32_t type = isec->flags & MachO::SECTION_TYPE;
   if (type != S_REGULAR && type != S_COALESCED)
     return false;
 

lld/MachO/SyntheticSections.cpp

 
 uint64_t MachHeaderSection::getSize() const {
   return sizeof(MachO::mach_header_64) + sizeOfCmds + config->headerPad;
 }
 
 void MachHeaderSection::writeTo(uint8_t *buf) const {
   auto *hdr = reinterpret_cast<MachO::mach_header_64 *>(buf);
   hdr->magic = MachO::MH_MAGIC_64;
-  hdr->cputype = MachO::CPU_TYPE_X86_64;
-  hdr->cpusubtype = MachO::CPU_SUBTYPE_X86_64_ALL | MachO::CPU_SUBTYPE_LIB64;
+  hdr->cputype = target->cpuType;
+  hdr->cpusubtype = target->cpuSubtype | MachO::CPU_SUBTYPE_LIB64;
   hdr->filetype = config->outputType;
   hdr->ncmds = loadCommands.size();
   hdr->sizeofcmds = sizeOfCmds;
   hdr->flags = MachO::MH_NOUNDEFS | MachO::MH_DYLDLINK | MachO::MH_TWOLEVEL;
 
   if (config->outputType == MachO::MH_DYLIB && !config->hasReexports)
     hdr->flags |= MachO::MH_NO_REEXPORTED_DYLIBS;
 
void macho::addNonLazyBindingEntries(const Symbol *sym,
   if (auto *dysym = dyn_cast<DylibSymbol>(sym)) {
     in.binding->addEntry(dysym, section, offset, addend);
     if (dysym->isWeakDef())
       in.weakBinding->addEntry(sym, section, offset, addend);
   } else if (auto *defined = dyn_cast<Defined>(sym)) {
     in.rebase->addEntry(section, offset);
     if (defined->isExternalWeakDef())
       in.weakBinding->addEntry(sym, section, offset, addend);
   } else if (!isa<DSOHandle>(sym)) {
     // Undefined symbols are filtered out in scanRelocations(); we should never
     // get here
     llvm_unreachable("cannot bind to an undefined symbol");
   }
+  // TODO: understand the DSOHandle case better.
+  // Is it bindable?  Add a new test?
 }
 
 StubsSection::StubsSection()
     : SyntheticSection(segment_names::text, "__stubs") {
   flags = MachO::S_SYMBOL_STUBS | MachO::S_ATTR_SOME_INSTRUCTIONS |
           MachO::S_ATTR_PURE_INSTRUCTIONS;
   align = 4; // machine instructions / mimic ld64
   reserved2 = target->stubSize;
void SymtabSection::finalizeContents() {
   // Local symbols aren't in the SymbolTable, so we walk the list of object
   // files to gather them.
   for (InputFile *file : inputFiles) {
     if (auto *objFile = dyn_cast<ObjFile>(file)) {
       for (Symbol *sym : objFile->symbols) {
         // TODO: when we implement -dead_strip, we should filter out symbols
         // that belong to dead sections.
         if (auto *defined = dyn_cast<Defined>(sym)) {
-          if (!defined->isExternal())
+          if (!defined->isExternal()) {
+            StringRef name = defined->getName();
+            if (!name.startswith("l") && !name.startswith("L"))
               addSymbol(localSymbols, sym);
           }
         }
       }
     }
+  }
 
   // __dyld_private is a local symbol too. It's linker-created and doesn't
   // exist in any object file.
   if (Defined* dyldPrivate = in.stubHelper->dyldPrivate)
     addSymbol(localSymbols, dyldPrivate);
 
   for (Symbol *sym : symtab->getSymbols()) {
     if (auto *defined = dyn_cast<Defined>(sym)) {

lld/MachO/Target.h

 class DylibSymbol;
 class InputSection;
 struct Reloc;
 
 enum : uint64_t {
   // We are currently only supporting 64-bit targets since macOS and iOS are
   // deprecating 32-bit apps.
   WordSize = 8,
-  PageSize = 4096,
   PageZeroSize = 1ull << 32, // XXX should be 4096 for 32-bit targets
   MaxAlignmentPowerOf2 = 32,
 };
 
 enum class RelocAttrBits {
   _0 = 0,              // invalid
   PCREL = 1 << 0,      // Value is PC-relative offset
   ABSOLUTE = 1 << 1,   // Value is an absolute address or fixed offset
public:
   // depending on the relocation type. prepareSymbolRelocation() will set up the
   // GOT/stubs entries, and resolveSymbolVA() will return the addresses of those
   // entries. resolveSymbolVA() may also relax the target instructions to save
   // on a level of address indirection.
   virtual void relaxGotLoad(uint8_t *loc, uint8_t type) const = 0;
 
   virtual const RelocAttrs &getRelocAttrs(uint8_t type) const = 0;
 
+  virtual uint64_t getPageSize() const = 0;
+
   bool hasAttr(uint8_t type, RelocAttrBits bit) const {
     return getRelocAttrs(type).hasAttr(bit);
   }
 
   bool validateRelocationInfo(llvm::MemoryBufferRef,
                               const llvm::MachO::section_64 &sec,
                               llvm::MachO::relocation_info);
   bool validateSymbolRelocation(const Symbol *, const InputSection *isec,
                                 const Reloc &);
   void prepareSymbolRelocation(Symbol *, const InputSection *, const Reloc &);
 
   uint32_t cpuType;
   uint32_t cpuSubtype;
 
   size_t stubSize;
   size_t stubHelperHeaderSize;
   size_t stubHelperEntrySize;
 };
 
 TargetInfo *createX86_64TargetInfo();
+TargetInfo *createARM64TargetInfo();
 
 extern TargetInfo *target;
 
 } // namespace macho
 } // namespace lld
 
 #endif

lld/MachO/Target.cpp

bool TargetInfo::validateSymbolRelocation(const Symbol *sym,
   bool valid = true;
   auto message = [relocAttrs, sym, isec, &valid](const Twine &diagnostic) {
     valid = false;
     return (relocAttrs.name + " relocation " + diagnostic + " for `" +
             sym->getName() + "' in " + toString(isec))
         .str();
   };
 
-  if (relocAttrs.hasAttr(RelocAttrBits::TLV | RelocAttrBits::LOAD) !=
-      sym->isTlv())
+  if ((relocAttrs.hasAttr(RelocAttrBits::TLV) &&
+       !relocAttrs.hasAttr(RelocAttrBits::BYTE8)) != sym->isTlv())
     error(message(Twine("requires that variable ") +
                   (sym->isTlv() ? "not " : "") + "be thread-local"));
   if (relocAttrs.hasAttr(RelocAttrBits::DYSYM8) && isa<DylibSymbol>(sym) &&
       r.length != 3)
     error(message("has width " + std::to_string(1 << r.length) +
                   " bytes, but must be 8 bytes"));
 
   return valid;
 }
 
 TargetInfo *macho::target = nullptr;

lld/MachO/Writer.cpp

if (it == mergedOutputSections.end()) {
       error("section from " + toString(it->second->firstSection()->file) +
             " conflicts with synthetic section " + ssec->segname + "," +
             ssec->name);
     }
   }
 }
 
 void Writer::assignAddresses(OutputSegment *seg) {
-  addr = alignTo(addr, PageSize);
-  fileOff = alignTo(fileOff, PageSize);
+  uint64_t pageSize = target->getPageSize();
+  addr = alignTo(addr, pageSize);
+  fileOff = alignTo(fileOff, pageSize);
   seg->fileOff = fileOff;
 
   for (OutputSection *osec : seg->getSections()) {
     if (!osec->isNeeded())
       continue;
     addr = alignTo(addr, osec->align);
     fileOff = alignTo(fileOff, osec->align);
     osec->addr = addr;

lld/test/MachO/Inputs/MacOSX.sdk/usr/lib/libSystem.tbd

 --- !tapi-tbd-v3
-archs:            [ x86_64 ]
-uuids:            [ 'x86_64: 00000000-0000-0000-0000-000000000000' ]
+archs:            [ x86_64, arm64 ]
+uuids:            [ 'x86_64: 00000000-0000-0000-0000-000000000000', 'arm64: 00000000-0000-0000-0000-000000000010' ]
 platform:         macosx
 install-name:     '/usr/lib/libSystem.B.dylib'
 current-version:  0001.001.1
 exports:
-  - archs:        [ 'x86_64' ]
+  - archs:        [ 'x86_64', 'arm64' ]
     re-exports:   [ '/usr/lib/system/libdyld.dylib',
                     '/usr/lib/system/libsystem_c.dylib',
                     '/usr/lib/system/libsystem_m.dylib' ]
 --- !tapi-tbd-v3
-archs:            [ x86_64 ]
-uuids:            [ 'x86_64: 00000000-0000-0000-0000-000000000001' ]
+archs:            [ x86_64, arm64 ]
+uuids:            [ 'x86_64: 00000000-0000-0000-0000-000000000001', 'arm64: 00000000-0000-0000-0000-000000000011' ]
 platform:         macosx
 install-name:     '/usr/lib/system/libdyld.dylib'
 current-version:  0001.001.1
 parent-umbrella:  System
 exports:
-  - archs:        [ 'x86_64' ]
+  - archs:        [ 'x86_64', 'arm64' ]
     symbols:      [ dyld_stub_binder, __tlv_bootstrap ]
 --- !tapi-tbd-v3
-archs:            [ x86_64 ]
-uuids:            [ 'x86_64: 00000000-0000-0000-0000-000000000002' ]
+archs:            [ x86_64, arm64 ]
+uuids:            [ 'x86_64: 00000000-0000-0000-0000-000000000002', 'arm64: 00000000-0000-0000-0000-000000000012' ]
 platform:         macosx
 install-name:     '/usr/lib/system/libsystem_c.dylib'
 current-version:  0001.001.1
 parent-umbrella:  System
 exports:
-  - archs:        [ 'x86_64' ]
+  - archs:        [ 'x86_64', 'arm64' ]
     symbols:      [ ]
 --- !tapi-tbd-v3
-archs:            [ x86_64 ]
-uuids:            [ 'x86_64: 00000000-0000-0000-0000-000000000003' ]
+archs:            [ x86_64, arm64 ]
+uuids:            [ 'x86_64: 00000000-0000-0000-0000-000000000003', 'arm64: 00000000-0000-0000-0000-000000000013' ]
 platform:         macosx
 install-name:     '/usr/lib/system/libsystem_m.dylib'
 current-version:  0001.001.1
 parent-umbrella:  System
 exports:
-  - archs:        [ 'x86_64' ]
+  - archs:        [ 'x86_64', 'arm64' ]
     symbols:      [ ___nan ]
 ...

lld/test/MachO/Inputs/MacOSX.sdk/usr/lib/libc++.tbd

 --- !tapi-tbd-v3
 archs:            [ i386, x86_64 ]
-uuids:            [ 'i386: 00000000-0000-0000-0000-000000000000', 'x86_64: 00000000-0000-0000-0000-000000000001' ]
+uuids:            [ 'i386: 00000000-0000-0000-0000-000000000000', 'x86_64: 00000000-0000-0000-0000-000000000001', 'arm64: 00000000-0000-0000-0000-000000000002' ]
 platform:         macosx
 install-name:     '/usr/lib/libc++.dylib'
 current-version:  1281
 exports:
-  - archs:        [ i386, x86_64 ]
+  - archs:        [ i386, x86_64, arm64 ]
     re-exports:   [ '/usr/lib/libc++abi.dylib' ]
 ...

lld/test/MachO/Inputs/MacOSX.sdk/usr/lib/libc++abi.tbd

 --- !tapi-tbd-v3
-archs:            [ i386, x86_64 ]
-uuids:            [ 'i386: 00000000-0000-0000-0000-000000000000', 'x86_64: 00000000-0000-0000-0000-000000000001' ]
+archs:            [ i386, x86_64, arm64 ]
+uuids:            [ 'i386: 00000000-0000-0000-0000-000000000000', 'x86_64: 00000000-0000-0000-0000-000000000001', 'arm64: 00000000-0000-0000-0000-000000000002' ]
 platform:         macosx
 install-name:     '/usr/lib/libc++abi.dylib'
 current-version:  1281
 exports:
-  - archs:        [ i386, x86_64 ]
+  - archs:        [ i386, x86_64, arm64 ]
     symbols:      [ ___gxx_personality_v0 ]
 ...

lld/test/MachO/relocations.s

-# REQUIRES: x86
-# RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %s -o %t.o
-# RUN: %lld -lSystem -o %t %t.o
-# RUN: llvm-objdump --section-headers --syms -d %t | FileCheck %s
-
-# CHECK-LABEL: Sections:
-# CHECK:       __cstring {{[0-9a-z]+}} [[#%x, CSTRING_ADDR:]]
-
-# CHECK-LABEL: SYMBOL TABLE:
-# CHECK:       [[#%x, F_ADDR:]] {{.*}} _f
-
-# CHECK-LABEL: <_main>:
-## Test X86_64_RELOC_BRANCH
-# CHECK:       callq 0x[[#%x, F_ADDR]] <_f>
-## Test extern (symbol) X86_64_RELOC_SIGNED
-# CHECK:       leaq [[#%u, STR_OFF:]](%rip), %rsi
-# CHECK-NEXT:  [[#%x, CSTRING_ADDR - STR_OFF]]
-## Test non-extern (section) X86_64_RELOC_SIGNED
-# CHECK:       leaq [[#%u, LSTR_OFF:]](%rip), %rsi
-# CHECK-NEXT:  [[#%x, CSTRING_ADDR + 22 - LSTR_OFF]]
-
-# RUN: llvm-objdump --section=__const --full-contents %t | FileCheck %s --check-prefix=NONPCREL
-# NONPCREL:      Contents of section __DATA,__const:
-# NONPCREL-NEXT: 100001000 08040000 01000000 08040000 01000000
-
-.section __TEXT,__text
-.globl _main, _f
-_main:
-  callq _f # X86_64_RELOC_BRANCH
-  mov $0, %rax
-  ret
-
-_f:
-  movl $0x2000004, %eax # write() syscall
-  mov $1, %rdi # stdout
-  leaq _str(%rip), %rsi # Generates a X86_64_RELOC_SIGNED pcrel symbol relocation
-  mov $21, %rdx # length of str
-  syscall
-
-  movl $0x2000004, %eax # write() syscall
-  mov $1, %rdi # stdout
-  leaq L_.str(%rip), %rsi # Generates a X86_64_RELOC_SIGNED pcrel section relocation
-  mov $15, %rdx # length of str
-  syscall
-
-  movl $0x2000004, %eax # write() syscall
-  mov $1, %rdi # stdout
-  movq L_.ptr_1_to_str(%rip), %rsi
-  mov $15, %rdx # length of str
-  syscall
-  ret
-
-.section __TEXT,__cstring
-## References to this generate a symbol relocation
-_str:
-  .asciz "Local defined symbol\n"
-## References to this generate a section relocation
-L_.str:
-  .asciz "Private symbol\n"
-
-.section __DATA,__const
-## These generate X86_64_RELOC_UNSIGNED non-pcrel section relocations
-L_.ptr_1_to_str:
-  .quad L_.str
-L_.ptr_2_to_str:
-  .quad L_.str

lld/test/MachO/x86-64-relocs.s

 # REQUIRES: x86
 # RUN: llvm-mc -filetype=obj -triple=x86_64-apple-darwin %s -o %t.o
 # RUN: %lld -lSystem -o %t %t.o
 # RUN: llvm-objdump --section-headers --syms -d %t | FileCheck %s
 
 # CHECK-LABEL: Sections:
 # CHECK:       __cstring {{[0-9a-z]+}} [[#%x, CSTRING_ADDR:]]
 
 # CHECK-LABEL: SYMBOL TABLE: