[mlir][openacc] Add init operation

[clementval]

Summary

This patch introduces the init operation that represents the init executable directive
from the OpenACC 3.0 specifications.

[rriddle]

mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp

645

You can return the error directly. Also, you can use emitOpError to prefix the message with the op name.

[clementval]

Address review comments

[clementval]

Rebase

mlir/include/mlir/Dialect/OpenACC/OpenACCOps.td

def OpenACC_YieldOp : OpenACC_Op<"yield", [Terminator,
   ];
 
   let verifier = ?;
 
   let assemblyFormat = "attr-dict ($operands^ `:` type($operands))?";
 }
 
 //===----------------------------------------------------------------------===//
+// 2.14.1. Init Directive
+//===----------------------------------------------------------------------===//
+
+def OpenACC_InitOp : OpenACC_Op<"init", [AttrSizedOperandSegments]> {
+  let summary = "init operation";
+
+  let description = [{
+    The "acc.init" operation represents the OpenACC init executable
+    directive.
+
+    Example:
+
+    ```mlir
+    acc.init
+    acc.init device_num(%dev1 : i32)
+    ```
+  }];
+
+  let arguments = (ins Variadic<AnyInteger>:$deviceTypeOperands,
+                       Optional<IntOrIndex>:$deviceNumOperand,
+                       Optional<I1>:$ifCond);
+
+  let assemblyFormat = [{
+    ( `device_type` `(` $deviceTypeOperands^ `:` type($deviceTypeOperands) `)` )?
+    ( `device_num` `(` $deviceNumOperand^ `:` type($deviceNumOperand) `)` )?
+    ( `if` `(` $ifCond^ `)` )? attr-dict-with-keyword
+  }];
+}
+
+//===----------------------------------------------------------------------===//
 // 2.14.4. Update Directive
 //===----------------------------------------------------------------------===//
 
 def OpenACC_UpdateOp : OpenACC_Op<"update", [AttrSizedOperandSegments]> {
   let summary = "update operation";
 
   let description = [{
     The "acc.udpate" operation represents the OpenACC update executable

mlir/lib/Dialect/OpenACC/IR/OpenACC.cpp

 //===----------------------------------------------------------------------===//
 // DataOp
 //===----------------------------------------------------------------------===//
 
 static LogicalResult verify(acc::DataOp dataOp) {
   // 2.6.5. Data Construct restriction
   // At least one copy, copyin, copyout, create, no_create, present, deviceptr,
   // attach, or default clause must appear on a data construct.
   if (dataOp.getOperands().size() == 0 && !dataOp.defaultAttr())
     return dataOp.emitError("at least one operand or the default attribute "
                             "must appear on the data operation");
   return success();
 }
 
 //===----------------------------------------------------------------------===//
+// InitOp
+//===----------------------------------------------------------------------===//
+
+static LogicalResult verify(acc::InitOp initOp) {
+  Operation *currOp = initOp;
+  while ((currOp = currOp->getParentOp())) {
+    if (isa<acc::ParallelOp>(currOp) || isa<acc::LoopOp>(currOp))
+      return initOp.emitOpError("cannot be nested in a compute operation");
+  }
+  return success();
+}
+
+//===----------------------------------------------------------------------===//
 // UpdateOp
 //===----------------------------------------------------------------------===//
 
 static LogicalResult verify(acc::UpdateOp updateOp) {
   // At least one of host or device should have a value.
   if (updateOp.hostOperands().size() == 0 &&
       updateOp.deviceOperands().size() == 0)
     return updateOp.emitError("at least one value must be present in"

mlir/test/Dialect/OpenACC/invalid.mlir

 // expected-error@+1 {{wait_devnum cannot appear without waitOperands}}
 acc.wait wait_devnum(%cst: index)
 
 // -----
 
 %cst = constant 1 : index
 // expected-error@+1 {{async attribute cannot appear with asyncOperand}}
 acc.wait async(%cst: index) attributes {async}
+
+// -----
+
+acc.parallel {
+// expected-error@+1 {{'acc.init' op cannot be nested in a compute operation}}
+  acc.init
+  acc.yield
+}
+
+// -----
+
+acc.loop {
+// expected-error@+1 {{'acc.init' op cannot be nested in a compute operation}}
+  acc.init
+  acc.yield
+}

mlir/test/Dialect/OpenACC/ops.mlir

 // CHECK: acc.wait async([[I64VALUE]] : i64)
 // CHECK: acc.wait async([[I32VALUE]] : i32)
 // CHECK: acc.wait async([[IDXVALUE]] : index)
 // CHECK: acc.wait([[I32VALUE]] : i32) async([[IDXVALUE]] : index)
 // CHECK: acc.wait([[I64VALUE]] : i64) wait_devnum([[I32VALUE]] : i32)
 // CHECK: acc.wait attributes {async}
 // CHECK: acc.wait([[I64VALUE]] : i64) async([[IDXVALUE]] : index) wait_devnum([[I32VALUE]] : i32)
 // CHECK: acc.wait if([[IFCOND]])
+
+// -----
+
+%i64Value = constant 1 : i64
+%i32Value = constant 1 : i32
+%i32Value2 = constant 2 : i32
+%idxValue = constant 1 : index
+%ifCond = constant true
+acc.init
+acc.init device_type(%i32Value : i32)
+acc.init device_type(%i32Value, %i32Value2 : i32, i32)
+acc.init device_num(%i64Value : i64)
+acc.init device_num(%i32Value : i32)
+acc.init device_num(%idxValue : index)
+acc.init if(%ifCond)
+
+// CHECK: [[I64VALUE:%.*]] = constant 1 : i64
+// CHECK: [[I32VALUE:%.*]] = constant 1 : i32
+// CHECK: [[I32VALUE2:%.*]] = constant 2 : i32
+// CHECK: [[IDXVALUE:%.*]] = constant 1 : index
+// CHECK: [[IFCOND:%.*]] = constant true
+// CHECK: acc.init
+// CHECK: acc.init device_type([[I32VALUE]] : i32)
+// CHECK: acc.init device_type([[I32VALUE]], [[I32VALUE2]] : i32, i32)
+// CHECK: acc.init device_num([[I64VALUE]] : i64)
+// CHECK: acc.init device_num([[I32VALUE]] : i32)
+// CHECK: acc.init device_num([[IDXVALUE]] : index)
+// CHECK: acc.init if([[IFCOND]])