[PATCH 05/27] [noalias] LLVM-IR Bitcode support

[jeroen.dobbelaere]

Summary

Implement LLVM-IR Bitcode support for the ptr_provenance optional argument of load/store instructions.

The optional argument is encoded as follows:

• when present: '1', ptr_provenance value
• when absent: '0'

If the ptr_provenance is absent, and no (future) new parameters have been added, the '0' can be omitted.

[jeroen.dobbelaere]

Rebased to f8dbd61074176bae92ec360a093ac7bc498c9321.

llvm/lib/Bitcode/Reader/BitcodeReader.cpp

case bitc::FUNC_CODE_INST_ALLOCA: { // ALLOCA: [instty, opty, op, align]
       AllocaInst *AI = new AllocaInst(Ty, AS, Size, *Align);
       AI->setUsedWithInAlloca(InAlloca);
       AI->setSwiftError(SwiftError);
       I = AI;
       FullTy = PointerType::get(FullTy, AS);
       InstructionList.push_back(I);
       break;
     }
-    case bitc::FUNC_CODE_INST_LOAD: { // LOAD: [opty, op, align, vol]
+    case bitc::FUNC_CODE_INST_LOAD: {
+      // LOAD: [opty, op, align, vol, [hasPtrProv, [PtrProv]]]
       unsigned OpNum = 0;
       Value *Op;
       if (getValueTypePair(Record, OpNum, NextValueNo, Op, &FullTy) ||
-          (OpNum + 2 != Record.size() && OpNum + 3 != Record.size()))
+          (OpNum + 2 > Record.size()))
         return error("Invalid record");
 
       if (!isa<PointerType>(Op->getType()))
         return error("Load operand is not a pointer type");
 
       Type *Ty = nullptr;
-      if (OpNum + 3 == Record.size()) {
+      if (OpNum + 3 <= Record.size()) {
         FullTy = getFullyStructuredTypeByID(Record[OpNum++]);
         Ty = flattenPointerTypes(FullTy);
       } else
         std::tie(FullTy, Ty) = getPointerElementTypes(FullTy);
 
       if (Error Err = typeCheckLoadStoreInst(Ty, Op->getType()))
         return Err;
 
       MaybeAlign Align;
       if (Error Err = parseAlignmentValue(Record[OpNum], Align))
         return Err;
       SmallPtrSet<Type *, 4> Visited;
       if (!Align && !Ty->isSized(&Visited))
         return error("load of unsized type");
       if (!Align)
         Align = TheModule->getDataLayout().getABITypeAlign(Ty);
-      I = new LoadInst(Ty, Op, "", Record[OpNum + 1], *Align);
+      bool IsVolatile = Record[OpNum + 1];
+      OpNum += 2;
+      Value *PtrProvenance = nullptr;
+      if (OpNum < Record.size()) {
+        // Do we have a ptr_provenance ?
+        if (Record[OpNum++]) {
+          if (getValueTypePair(Record, OpNum, NextValueNo, PtrProvenance))
+            return error("Invalid ptr_provenance operand");
+        }
+      }
+      if (OpNum != Record.size())
+        return error("Invalid record");
+      I = new LoadInst(Ty, Op, "", IsVolatile, *Align);
+      if (PtrProvenance)
+        cast<LoadInst>(I)->setNoaliasProvenanceOperand(PtrProvenance);
       InstructionList.push_back(I);
       break;
     }
     case bitc::FUNC_CODE_INST_LOADATOMIC: {
-       // LOADATOMIC: [opty, op, align, vol, ordering, ssid]
+      // LOADATOMIC: [opty, op, align, vol, ordering, ssid,
+      //              [hasPtrProv,[PtrProv]]]
       unsigned OpNum = 0;
       Value *Op;
       if (getValueTypePair(Record, OpNum, NextValueNo, Op, &FullTy) ||
-          (OpNum + 4 != Record.size() && OpNum + 5 != Record.size()))
+          (OpNum + 4 > Record.size()))
         return error("Invalid record");
 
       if (!isa<PointerType>(Op->getType()))
         return error("Load operand is not a pointer type");
 
       Type *Ty = nullptr;
-      if (OpNum + 5 == Record.size()) {
+      if (OpNum + 5 <= Record.size()) {
         FullTy = getFullyStructuredTypeByID(Record[OpNum++]);
         Ty = flattenPointerTypes(FullTy);
       } else
         std::tie(FullTy, Ty) = getPointerElementTypes(FullTy);
 
       if (Error Err = typeCheckLoadStoreInst(Ty, Op->getType()))
         return Err;
 
       AtomicOrdering Ordering = getDecodedOrdering(Record[OpNum + 2]);
       if (Ordering == AtomicOrdering::NotAtomic ||
           Ordering == AtomicOrdering::Release ||
           Ordering == AtomicOrdering::AcquireRelease)
         return error("Invalid record");
       if (Ordering != AtomicOrdering::NotAtomic && Record[OpNum] == 0)
         return error("Invalid record");
       SyncScope::ID SSID = getDecodedSyncScopeID(Record[OpNum + 3]);
 
       MaybeAlign Align;
       if (Error Err = parseAlignmentValue(Record[OpNum], Align))
         return Err;
       if (!Align)
         return error("Alignment missing from atomic load");
-      I = new LoadInst(Ty, Op, "", Record[OpNum + 1], *Align, Ordering, SSID);
+      bool IsVolatile = Record[OpNum + 1];
+      OpNum += 4;
+      Value *PtrProvenance = nullptr;
+      if (OpNum < Record.size()) {
+        // Do we have a ptr_provenance ?
+        if (Record[OpNum++]) {
+          if (getValueTypePair(Record, OpNum, NextValueNo, PtrProvenance))
+            return error("Invalid ptr_provenance operand");
+        }
+      }
+      if (OpNum != Record.size())
+        return error("Invalid record");
+      I = new LoadInst(Ty, Op, "", IsVolatile, *Align, Ordering, SSID);
+      if (PtrProvenance)
+        cast<LoadInst>(I)->setNoaliasProvenanceOperand(PtrProvenance);
       InstructionList.push_back(I);
       break;
     }
     case bitc::FUNC_CODE_INST_STORE:
-    case bitc::FUNC_CODE_INST_STORE_OLD: { // STORE2:[ptrty, ptr, val, align, vol]
+    case bitc::FUNC_CODE_INST_STORE_OLD: {
+      // STORE2:[ptrty, ptr, val, align, vol, [hasPtrProv, [PtrProv]]]
       unsigned OpNum = 0;
       Value *Val, *Ptr;
       Type *FullTy;
       if (getValueTypePair(Record, OpNum, NextValueNo, Ptr, &FullTy) ||
           (BitCode == bitc::FUNC_CODE_INST_STORE
                ? getValueTypePair(Record, OpNum, NextValueNo, Val)
                : popValue(Record, OpNum, NextValueNo,
                           getPointerElementFlatType(FullTy), Val)) ||
-          OpNum + 2 != Record.size())
+          OpNum + 2 > Record.size())
         return error("Invalid record");
 
       if (Error Err = typeCheckLoadStoreInst(Val->getType(), Ptr->getType()))
         return Err;
       MaybeAlign Align;
       if (Error Err = parseAlignmentValue(Record[OpNum], Align))
         return Err;
       SmallPtrSet<Type *, 4> Visited;
       if (!Align && !Val->getType()->isSized(&Visited))
         return error("store of unsized type");
       if (!Align)
         Align = TheModule->getDataLayout().getABITypeAlign(Val->getType());
-      I = new StoreInst(Val, Ptr, Record[OpNum + 1], *Align);
+      bool IsVolatile = Record[OpNum + 1];
+      OpNum += 2;
+      Value *PtrProvenance = nullptr;
+      if (OpNum < Record.size()) {
+        // Do we have a ptr_provenance ?
+        if (Record[OpNum++]) {
+          if (getValueTypePair(Record, OpNum, NextValueNo, PtrProvenance))
+            return error("Invalid ptr_provenance operand");
+        }
+      }
+      if (OpNum != Record.size())
+        return error("Invalid record");
+      I = new StoreInst(Val, Ptr, IsVolatile, *Align);
+      if (PtrProvenance)
+        cast<StoreInst>(I)->setNoaliasProvenanceOperand(PtrProvenance);
       InstructionList.push_back(I);
       break;
     }
     case bitc::FUNC_CODE_INST_STOREATOMIC:
     case bitc::FUNC_CODE_INST_STOREATOMIC_OLD: {
-      // STOREATOMIC: [ptrty, ptr, val, align, vol, ordering, ssid]
+      // STOREATOMIC: [ptrty, ptr, val, align, vol, ordering, ssid,
+      //               [hasPtrProv, [PtrProv]]]
       unsigned OpNum = 0;
       Value *Val, *Ptr;
       Type *FullTy;
       if (getValueTypePair(Record, OpNum, NextValueNo, Ptr, &FullTy) ||
           !isa<PointerType>(Ptr->getType()) ||
           (BitCode == bitc::FUNC_CODE_INST_STOREATOMIC
                ? getValueTypePair(Record, OpNum, NextValueNo, Val)
                : popValue(Record, OpNum, NextValueNo,
                           getPointerElementFlatType(FullTy), Val)) ||
-          OpNum + 4 != Record.size())
+          OpNum + 4 > Record.size())
         return error("Invalid record");
 
       if (Error Err = typeCheckLoadStoreInst(Val->getType(), Ptr->getType()))
         return Err;
       AtomicOrdering Ordering = getDecodedOrdering(Record[OpNum + 2]);
       if (Ordering == AtomicOrdering::NotAtomic ||
           Ordering == AtomicOrdering::Acquire ||
           Ordering == AtomicOrdering::AcquireRelease)
         return error("Invalid record");
       SyncScope::ID SSID = getDecodedSyncScopeID(Record[OpNum + 3]);
       if (Ordering != AtomicOrdering::NotAtomic && Record[OpNum] == 0)
         return error("Invalid record");
 
       MaybeAlign Align;
       if (Error Err = parseAlignmentValue(Record[OpNum], Align))
         return Err;
       if (!Align)
         return error("Alignment missing from atomic store");
-      I = new StoreInst(Val, Ptr, Record[OpNum + 1], *Align, Ordering, SSID);
+      bool IsVolatile = Record[OpNum + 1];
+      OpNum += 4;
+      Value *PtrProvenance = nullptr;
+      if (OpNum < Record.size()) {
+        // Do we have a ptr_provenance ?
+        if (Record[OpNum++]) {
+          if (getValueTypePair(Record, OpNum, NextValueNo, PtrProvenance))
+            return error("Invalid ptr_provenance operand");
+        }
+      }
+      if (OpNum != Record.size())
+        return error("Invalid record");
+      I = new StoreInst(Val, Ptr, IsVolatile, *Align, Ordering, SSID);
+      if (PtrProvenance)
+        cast<StoreInst>(I)->setNoaliasProvenanceOperand(PtrProvenance);
       InstructionList.push_back(I);
       break;
     }
     case bitc::FUNC_CODE_INST_CMPXCHG_OLD:
     case bitc::FUNC_CODE_INST_CMPXCHG: {
       // CMPXCHG:[ptrty, ptr, cmp, new, vol, successordering, ssid,
       //          failureordering?, isweak?]
       unsigned OpNum = 0;

llvm/lib/Bitcode/Writer/BitcodeWriter.cpp

void ModuleBitcodeWriter::writeInstruction(const Instruction &I,
   }
 
   case Instruction::Load:
     if (cast<LoadInst>(I).isAtomic()) {
       Code = bitc::FUNC_CODE_INST_LOADATOMIC;
       pushValueAndType(I.getOperand(0), InstID, Vals);
     } else {
       Code = bitc::FUNC_CODE_INST_LOAD;
-      if (!pushValueAndType(I.getOperand(0), InstID, Vals)) // ptr
+      if (!pushValueAndType(I.getOperand(0), InstID, Vals) &&
+          !cast<LoadInst>(I).hasNoaliasProvenanceOperand()) // ptr
         AbbrevToUse = FUNCTION_INST_LOAD_ABBREV;
     }
     Vals.push_back(VE.getTypeID(I.getType()));
     Vals.push_back(getEncodedAlign(cast<LoadInst>(I).getAlign()));
     Vals.push_back(cast<LoadInst>(I).isVolatile());
     if (cast<LoadInst>(I).isAtomic()) {
       Vals.push_back(getEncodedOrdering(cast<LoadInst>(I).getOrdering()));
       Vals.push_back(getEncodedSyncScopeID(cast<LoadInst>(I).getSyncScopeID()));
     }
+    if (cast<LoadInst>(I).hasNoaliasProvenanceOperand()) {
+      Vals.push_back(true); // ptr_provenance present
+      pushValueAndType(cast<LoadInst>(I).getNoaliasProvenanceOperand(), InstID,
+                       Vals); // ptrty + ptr_provenance
+    } else {
+      // No ptr_provenance - do nothing for now, when in future more arguments
+      // are emitted, do not forget to emit a 'false':
+      // Vals.push_back(false);
+    }
     break;
   case Instruction::Store:
     if (cast<StoreInst>(I).isAtomic())
       Code = bitc::FUNC_CODE_INST_STOREATOMIC;
     else
       Code = bitc::FUNC_CODE_INST_STORE;
     pushValueAndType(I.getOperand(1), InstID, Vals); // ptrty + ptr
     pushValueAndType(I.getOperand(0), InstID, Vals); // valty + val
     Vals.push_back(getEncodedAlign(cast<StoreInst>(I).getAlign()));
     Vals.push_back(cast<StoreInst>(I).isVolatile());
     if (cast<StoreInst>(I).isAtomic()) {
       Vals.push_back(getEncodedOrdering(cast<StoreInst>(I).getOrdering()));
       Vals.push_back(
           getEncodedSyncScopeID(cast<StoreInst>(I).getSyncScopeID()));
     }
+    if (cast<StoreInst>(I).hasNoaliasProvenanceOperand()) {
+      Vals.push_back(true); // ptr_provenance present
+      pushValueAndType(cast<StoreInst>(I).getNoaliasProvenanceOperand(), InstID,
+                       Vals); // ptrty + ptr_provenance
+    } else {
+      // No ptr_provenance - do nothing for now, when in future more arguments
+      // are emitted, do not forget to emit a 'false':
+      // Vals.push_back(false);
+    }
     break;
   case Instruction::AtomicCmpXchg:
     Code = bitc::FUNC_CODE_INST_CMPXCHG;
     pushValueAndType(I.getOperand(0), InstID, Vals); // ptrty + ptr
     pushValueAndType(I.getOperand(1), InstID, Vals); // cmp.
     pushValue(I.getOperand(2), InstID, Vals);        // newval.
     Vals.push_back(cast<AtomicCmpXchgInst>(I).isVolatile());
     Vals.push_back(

llvm/test/Bitcode/compatibility.ll

define void @atomics(i32* %word) {
 
   %ld.1 = load atomic i32, i32* %word monotonic, align 4
   ; CHECK: %ld.1 = load atomic i32, i32* %word monotonic, align 4
   %ld.2 = load atomic volatile i32, i32* %word acquire, align 8
   ; CHECK: %ld.2 = load atomic volatile i32, i32* %word acquire, align 8
   %ld.3 = load atomic volatile i32, i32* %word syncscope("singlethread") seq_cst, align 16
   ; CHECK: %ld.3 = load atomic volatile i32, i32* %word syncscope("singlethread") seq_cst, align 16
 
+  %ld.1p = load atomic i32, i32* %word monotonic, ptr_provenance i32* %word, align 4
+  ; CHECK: %ld.1p = load atomic i32, i32* %word monotonic, ptr_provenance i32* %word, align 4
+  %ld.2p = load atomic volatile i32, i32* %word acquire, ptr_provenance i32* %word, align 8
+  ; CHECK: %ld.2p = load atomic volatile i32, i32* %word acquire, ptr_provenance i32* %word, align 8
+  %ld.3p = load atomic volatile i32, i32* %word syncscope("singlethread") seq_cst, ptr_provenance i32* %word, align 16
+  ; CHECK: %ld.3p = load atomic volatile i32, i32* %word syncscope("singlethread") seq_cst, ptr_provenance i32* %word, align 16
+
   store atomic i32 23, i32* %word monotonic, align 4
   ; CHECK: store atomic i32 23, i32* %word monotonic, align 4
   store atomic volatile i32 24, i32* %word monotonic, align 4
   ; CHECK: store atomic volatile i32 24, i32* %word monotonic, align 4
   store atomic volatile i32 25, i32* %word syncscope("singlethread") monotonic, align 4
   ; CHECK: store atomic volatile i32 25, i32* %word syncscope("singlethread") monotonic, align 4
+
+  store atomic i32 26, i32* %word monotonic, ptr_provenance i32* %word, align 4
+  ; CHECK: store atomic i32 26, i32* %word monotonic, ptr_provenance i32* %word, align 4
+  store atomic volatile i32 27, i32* %word monotonic, ptr_provenance i32* %word, align 4
+  ; CHECK: store atomic volatile i32 27, i32* %word monotonic, ptr_provenance i32* %word, align 4
+  store atomic volatile i32 28, i32* %word syncscope("singlethread") monotonic, ptr_provenance i32* %word, align 4
+  ; CHECK: store atomic volatile i32 28, i32* %word syncscope("singlethread") monotonic, ptr_provenance i32* %word, align 4
   ret void
 }
 
 define void @fp_atomics(float* %word) {
 ; CHECK: %atomicrmw.xchg = atomicrmw xchg float* %word, float 1.000000e+00 monotonic
   %atomicrmw.xchg = atomicrmw xchg float* %word, float 1.0 monotonic
 
 ; CHECK: %atomicrmw.fadd = atomicrmw fadd float* %word, float 1.000000e+00 monotonic
define void @instructions.memops(i32** %base) {
   alloca inalloca i32, i8 4, align 4
   ; CHECK: alloca inalloca i32, i8 4, align 4
 
   load i32*, i32** %base, align 8, !invariant.load !7, !nontemporal !8, !nonnull !7, !dereferenceable !9, !dereferenceable_or_null !9
   ; CHECK: load i32*, i32** %base, align 8, !invariant.load !7, !nontemporal !8, !nonnull !7, !dereferenceable !9, !dereferenceable_or_null !9
   load volatile i32*, i32** %base, align 8, !invariant.load !7, !nontemporal !8, !nonnull !7, !dereferenceable !9, !dereferenceable_or_null !9
   ; CHECK: load volatile i32*, i32** %base, align 8, !invariant.load !7, !nontemporal !8, !nonnull !7, !dereferenceable !9, !dereferenceable_or_null !9
 
+  load i32*, i32** %base, ptr_provenance i32** %base, align 8, !invariant.load !7, !nontemporal !8, !nonnull !7, !dereferenceable !9, !dereferenceable_or_null !9
+  ; CHECK: load i32*, i32** %base, ptr_provenance i32** %base, align 8, !invariant.load !7, !nontemporal !8, !nonnull !7, !dereferenceable !9, !dereferenceable_or_null !9
+  load volatile i32*, i32** %base, ptr_provenance i32** %base, align 8, !invariant.load !7, !nontemporal !8, !nonnull !7, !dereferenceable !9, !dereferenceable_or_null !9
+  ; CHECK: load volatile i32*, i32** %base, ptr_provenance i32** %base, align 8, !invariant.load !7, !nontemporal !8, !nonnull !7, !dereferenceable !9, !dereferenceable_or_null !9
+
   store i32* null, i32** %base, align 4, !nontemporal !8
   ; CHECK: store i32* null, i32** %base, align 4, !nontemporal !8
   store volatile i32* null, i32** %base, align 4, !nontemporal !8
   ; CHECK: store volatile i32* null, i32** %base, align 4, !nontemporal !8
 
+  store i32* null, i32** %base, ptr_provenance i32** %base, align 4, !nontemporal !8
+  ; CHECK: store i32* null, i32** %base, ptr_provenance i32** %base, align 4, !nontemporal !8
+  store volatile i32* null, i32** %base, ptr_provenance i32** %base, align 4, !nontemporal !8
+  ; CHECK: store volatile i32* null, i32** %base, ptr_provenance i32** %base, align 4, !nontemporal !8
+
   ret void
 }
 
 ; Instructions -- Conversion Operations
 define void @instructions.conversions() {
   trunc i32 -1 to i1
   ; CHECK: trunc i32 -1 to i1
   zext i32 -1 to i64

llvm/test/Bitcode/loadstore_ptr_provenance.ll

 ; RUN: opt --verify -S < %s | FileCheck %s
-; Activate when bitcode support is added:
-; R U N: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s
-; R U N: verify-uselistorder < %s
+; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s
+; RUN: verify-uselistorder < %s
 
 define i32 @f(i32* %p, i32* %q, i32* %word, i32** %base) {
   ; CHECK:      define i32 @f(i32* %p, i32* %q, i32* %word, i32** %base) {
   store i32 42, i32* %p, ptr_provenance i32* %p
   ; CHECK-NEXT:   store i32 42, i32* %p, ptr_provenance i32* %p
   store i32 43, i32* %q, ptr_provenance i32* %q
   ; CHECK-NEXT:   store i32 43, i32* %q, ptr_provenance i32* %q
   %r = load i32, i32* %p, ptr_provenance i32* %p