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Differential D86729

GlobalISel: Add and_trivial_mask to all_combines
ClosedPublic

Authored by arsenm on Aug 27 2020, 11:21 AM.

Details

Reviewers
paquette
aemerson
foad
aditya_nandakumar
volkan
dsanders
Summary

Also make up a new category of combines.

Diff Detail

Event Timeline

arsenm created this revision.Aug 27 2020, 11:21 AM
Herald added a project: Restricted Project. · View Herald TranscriptAug 27 2020, 11:21 AM
Herald added subscribers: kerbowa, rovka, nhaehnle, jvesely. · View Herald Transcript
arsenm requested review of this revision.Aug 27 2020, 11:21 AM
Herald added a subscriber: wdng. · View Herald TranscriptAug 27 2020, 11:21 AM
arsenm added a child revision: D86731: GlobalISel: Implement known bits for min/max.Aug 27 2020, 11:52 AM
paquette accepted this revision.Aug 27 2020, 1:13 PM

LGTM

This revision is now accepted and ready to land.Aug 27 2020, 1:13 PM
arsenm closed this revision.Aug 27 2020, 1:44 PM

201f770f16e8ea89e92a1edd79c41559f4031187

Revision Contents

PathSize
llvm/
include/
llvm/
Target/
GlobalISel/
5 lines
test/
CodeGen/
AMDGPU/
GlobalISel/
25 lines
4 lines
3 lines
18 lines
1006 lines
2237 lines
40 lines
22 lines
30 lines
36 lines
173 lines
173 lines
23 lines

Diff 288399

llvm/include/llvm/Target/GlobalISel/Combine.td

Show First 20 Lines • Show All 351 Lines • ▼ Show 20 Linesdef undef_combines : GICombineGroup<[undef_to_fp_zero, undef_to_int_zero,
propagate_undef_shuffle_mask, propagate_undef_shuffle_mask,
erase_undef_store]>; erase_undef_store]>;
def identity_combines : GICombineGroup<[select_same_val, right_identity_zero, def identity_combines : GICombineGroup<[select_same_val, right_identity_zero,
binop_same_val, binop_left_to_zero, binop_same_val, binop_left_to_zero,
binop_right_to_zero, p2i_to_i2p, binop_right_to_zero, p2i_to_i2p,
i2p_to_p2i]>; i2p_to_p2i]>;
def known_bits_simplifications : GICombineGroup<[and_trivial_mask]>;
def width_reduction_combines : GICombineGroup<[reduce_shl_of_extend]>; def width_reduction_combines : GICombineGroup<[reduce_shl_of_extend]>;
def select_combines : GICombineGroup<[select_undef_cmp, select_constant_cmp]>; def select_combines : GICombineGroup<[select_undef_cmp, select_constant_cmp]>;
def trivial_combines : GICombineGroup<[copy_prop, mul_to_shl, add_p2i_to_ptradd]>; def trivial_combines : GICombineGroup<[copy_prop, mul_to_shl, add_p2i_to_ptradd]>;
def all_combines : GICombineGroup<[trivial_combines, ptr_add_immed_chain, def all_combines : GICombineGroup<[trivial_combines, ptr_add_immed_chain,
combines_for_extload, combine_indexed_load_store, undef_combines, combines_for_extload, combine_indexed_load_store, undef_combines,
identity_combines, simplify_add_to_sub, identity_combines, simplify_add_to_sub,
hoist_logic_op_with_same_opcode_hands, hoist_logic_op_with_same_opcode_hands,
shl_ashr_to_sext_inreg, sext_inreg_of_load, shl_ashr_to_sext_inreg, sext_inreg_of_load,
width_reduction_combines, select_combines]>; width_reduction_combines, select_combines,
known_bits_simplifications]>;

llvm/test/CodeGen/AMDGPU/GlobalISel/add.v2i16.ll

Show First 20 Lines • Show All 153 Lines • ▼ Show 20 Lines
; GFX9-NEXT: s_lshr_b32 s1, s0, 16 ; GFX9-NEXT: s_lshr_b32 s1, s0, 16
; GFX9-NEXT: s_add_i32 s0, s0, 0xffc0ffc0 ; GFX9-NEXT: s_add_i32 s0, s0, 0xffc0ffc0
; GFX9-NEXT: s_add_i32 s1, s1, 0xffc0 ; GFX9-NEXT: s_add_i32 s1, s1, 0xffc0
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s1 ; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s1
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_add_v2i16_neg_inline_imm_splat: ; GFX8-LABEL: s_add_v2i16_neg_inline_imm_splat:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_mov_b32 s3, 0xffff ; GFX8-NEXT: s_mov_b32 s3, 0xffff
; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_mov_b32 s1, 0xffc0 ; GFX8-NEXT: s_mov_b32 s1, 0xffc0
; GFX8-NEXT: s_and_b32 s0, s0, s3 ; GFX8-NEXT: s_and_b32 s0, s0, s3
; GFX8-NEXT: s_and_b32 s2, s2, s3
; GFX8-NEXT: s_add_i32 s0, s0, s1 ; GFX8-NEXT: s_add_i32 s0, s0, s1
; GFX8-NEXT: s_add_i32 s2, s2, s1 ; GFX8-NEXT: s_add_i32 s2, s2, s1
; GFX8-NEXT: s_lshl_b32 s1, s2, 16 ; GFX8-NEXT: s_lshl_b32 s1, s2, 16
; GFX8-NEXT: s_and_b32 s0, s0, s3 ; GFX8-NEXT: s_and_b32 s0, s0, s3
; GFX8-NEXT: s_or_b32 s0, s1, s0 ; GFX8-NEXT: s_or_b32 s0, s1, s0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
%add = add <2 x i16> %a, <i16 -64, i16 -64> %add = add <2 x i16> %a, <i16 -64, i16 -64>
%cast = bitcast <2 x i16> %add to i32 %cast = bitcast <2 x i16> %add to i32
ret i32 %cast ret i32 %cast
} }
define amdgpu_ps i32 @s_add_v2i16_neg_inline_imm_lo(<2 x i16> inreg %a) { define amdgpu_ps i32 @s_add_v2i16_neg_inline_imm_lo(<2 x i16> inreg %a) {
; GFX9-LABEL: s_add_v2i16_neg_inline_imm_lo: ; GFX9-LABEL: s_add_v2i16_neg_inline_imm_lo:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_lshr_b32 s1, s0, 16 ; GFX9-NEXT: s_lshr_b32 s1, s0, 16
; GFX9-NEXT: s_add_i32 s0, s0, 0x4ffc0 ; GFX9-NEXT: s_add_i32 s0, s0, 0x4ffc0
; GFX9-NEXT: s_add_i32 s1, s1, 4 ; GFX9-NEXT: s_add_i32 s1, s1, 4
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s1 ; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s1
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_add_v2i16_neg_inline_imm_lo: ; GFX8-LABEL: s_add_v2i16_neg_inline_imm_lo:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s1, s0, 16
; GFX8-NEXT: s_mov_b32 s2, 0xffff ; GFX8-NEXT: s_mov_b32 s2, 0xffff
; GFX8-NEXT: s_lshr_b32 s1, s0, 16
; GFX8-NEXT: s_and_b32 s0, s0, s2 ; GFX8-NEXT: s_and_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s1, s1, s2
; GFX8-NEXT: s_add_i32 s0, s0, 0xffc0 ; GFX8-NEXT: s_add_i32 s0, s0, 0xffc0
; GFX8-NEXT: s_add_i32 s1, s1, 4 ; GFX8-NEXT: s_add_i32 s1, s1, 4
; GFX8-NEXT: s_lshl_b32 s1, s1, 16 ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_and_b32 s0, s0, s2 ; GFX8-NEXT: s_and_b32 s0, s0, s2
; GFX8-NEXT: s_or_b32 s0, s1, s0 ; GFX8-NEXT: s_or_b32 s0, s1, s0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
%add = add <2 x i16> %a, <i16 -64, i16 4> %add = add <2 x i16> %a, <i16 -64, i16 4>
%cast = bitcast <2 x i16> %add to i32 %cast = bitcast <2 x i16> %add to i32
ret i32 %cast ret i32 %cast
} }
define amdgpu_ps i32 @s_add_v2i16_neg_inline_imm_hi(<2 x i16> inreg %a) { define amdgpu_ps i32 @s_add_v2i16_neg_inline_imm_hi(<2 x i16> inreg %a) {
; GFX9-LABEL: s_add_v2i16_neg_inline_imm_hi: ; GFX9-LABEL: s_add_v2i16_neg_inline_imm_hi:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_lshr_b32 s1, s0, 16 ; GFX9-NEXT: s_lshr_b32 s1, s0, 16
; GFX9-NEXT: s_add_i32 s0, s0, 0xffc00004 ; GFX9-NEXT: s_add_i32 s0, s0, 0xffc00004
; GFX9-NEXT: s_add_i32 s1, s1, 0xffc0 ; GFX9-NEXT: s_add_i32 s1, s1, 0xffc0
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s1 ; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s1
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_add_v2i16_neg_inline_imm_hi: ; GFX8-LABEL: s_add_v2i16_neg_inline_imm_hi:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s1, s0, 16
; GFX8-NEXT: s_mov_b32 s2, 0xffff ; GFX8-NEXT: s_mov_b32 s2, 0xffff
; GFX8-NEXT: s_lshr_b32 s1, s0, 16
; GFX8-NEXT: s_and_b32 s0, s0, s2 ; GFX8-NEXT: s_and_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s1, s1, s2
; GFX8-NEXT: s_add_i32 s0, s0, 4 ; GFX8-NEXT: s_add_i32 s0, s0, 4
; GFX8-NEXT: s_add_i32 s1, s1, 0xffc0 ; GFX8-NEXT: s_add_i32 s1, s1, 0xffc0
; GFX8-NEXT: s_lshl_b32 s1, s1, 16 ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_and_b32 s0, s0, s2 ; GFX8-NEXT: s_and_b32 s0, s0, s2
; GFX8-NEXT: s_or_b32 s0, s1, s0 ; GFX8-NEXT: s_or_b32 s0, s1, s0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
%add = add <2 x i16> %a, <i16 4, i16 -64> %add = add <2 x i16> %a, <i16 4, i16 -64>
%cast = bitcast <2 x i16> %add to i32 %cast = bitcast <2 x i16> %add to i32
ret i32 %cast ret i32 %cast
} }
define amdgpu_ps i32 @s_add_v2i16(<2 x i16> inreg %a, <2 x i16> inreg %b) { define amdgpu_ps i32 @s_add_v2i16(<2 x i16> inreg %a, <2 x i16> inreg %b) {
; GFX9-LABEL: s_add_v2i16: ; GFX9-LABEL: s_add_v2i16:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_lshr_b32 s2, s0, 16 ; GFX9-NEXT: s_lshr_b32 s2, s0, 16
; GFX9-NEXT: s_lshr_b32 s3, s1, 16 ; GFX9-NEXT: s_lshr_b32 s3, s1, 16
; GFX9-NEXT: s_add_i32 s0, s0, s1 ; GFX9-NEXT: s_add_i32 s0, s0, s1
; GFX9-NEXT: s_add_i32 s2, s2, s3 ; GFX9-NEXT: s_add_i32 s2, s2, s3
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s2 ; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s2
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_add_v2i16: ; GFX8-LABEL: s_add_v2i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_mov_b32 s3, 0xffff ; GFX8-NEXT: s_mov_b32 s3, 0xffff
; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_lshr_b32 s4, s1, 16 ; GFX8-NEXT: s_lshr_b32 s4, s1, 16
; GFX8-NEXT: s_and_b32 s0, s0, s3 ; GFX8-NEXT: s_and_b32 s0, s0, s3
; GFX8-NEXT: s_and_b32 s1, s1, s3 ; GFX8-NEXT: s_and_b32 s1, s1, s3
; GFX8-NEXT: s_and_b32 s2, s2, s3
; GFX8-NEXT: s_and_b32 s4, s4, s3
; GFX8-NEXT: s_add_i32 s0, s0, s1 ; GFX8-NEXT: s_add_i32 s0, s0, s1
; GFX8-NEXT: s_add_i32 s2, s2, s4 ; GFX8-NEXT: s_add_i32 s2, s2, s4
; GFX8-NEXT: s_lshl_b32 s1, s2, 16 ; GFX8-NEXT: s_lshl_b32 s1, s2, 16
; GFX8-NEXT: s_and_b32 s0, s0, s3 ; GFX8-NEXT: s_and_b32 s0, s0, s3
; GFX8-NEXT: s_or_b32 s0, s1, s0 ; GFX8-NEXT: s_or_b32 s0, s1, s0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
%add = add <2 x i16> %a, %b %add = add <2 x i16> %a, %b
%cast = bitcast <2 x i16> %add to i32 %cast = bitcast <2 x i16> %add to i32
Show All 9 Lines
; GFX9-NEXT: s_add_i32 s0, s0, s1 ; GFX9-NEXT: s_add_i32 s0, s0, s1
; GFX9-NEXT: s_add_i32 s2, s2, s3 ; GFX9-NEXT: s_add_i32 s2, s2, s3
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s2 ; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s2
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_add_v2i16_fneg_lhs: ; GFX8-LABEL: s_add_v2i16_fneg_lhs:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_xor_b32 s0, s0, 0x80008000 ; GFX8-NEXT: s_xor_b32 s0, s0, 0x80008000
; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_mov_b32 s3, 0xffff ; GFX8-NEXT: s_mov_b32 s3, 0xffff
; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_lshr_b32 s4, s1, 16 ; GFX8-NEXT: s_lshr_b32 s4, s1, 16
; GFX8-NEXT: s_and_b32 s0, s0, s3 ; GFX8-NEXT: s_and_b32 s0, s0, s3
; GFX8-NEXT: s_and_b32 s1, s1, s3 ; GFX8-NEXT: s_and_b32 s1, s1, s3
; GFX8-NEXT: s_and_b32 s2, s2, s3
; GFX8-NEXT: s_and_b32 s4, s4, s3
; GFX8-NEXT: s_add_i32 s0, s0, s1 ; GFX8-NEXT: s_add_i32 s0, s0, s1
; GFX8-NEXT: s_add_i32 s2, s2, s4 ; GFX8-NEXT: s_add_i32 s2, s2, s4
; GFX8-NEXT: s_lshl_b32 s1, s2, 16 ; GFX8-NEXT: s_lshl_b32 s1, s2, 16
; GFX8-NEXT: s_and_b32 s0, s0, s3 ; GFX8-NEXT: s_and_b32 s0, s0, s3
; GFX8-NEXT: s_or_b32 s0, s1, s0 ; GFX8-NEXT: s_or_b32 s0, s1, s0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
%neg.a = fneg <2 x half> %a %neg.a = fneg <2 x half> %a
%cast.neg.a = bitcast <2 x half> %neg.a to <2 x i16> %cast.neg.a = bitcast <2 x half> %neg.a to <2 x i16>
Show All 11 Lines
; GFX9-NEXT: s_add_i32 s0, s0, s1 ; GFX9-NEXT: s_add_i32 s0, s0, s1
; GFX9-NEXT: s_add_i32 s2, s2, s3 ; GFX9-NEXT: s_add_i32 s2, s2, s3
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s2 ; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s2
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_add_v2i16_fneg_rhs: ; GFX8-LABEL: s_add_v2i16_fneg_rhs:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_xor_b32 s1, s1, 0x80008000 ; GFX8-NEXT: s_xor_b32 s1, s1, 0x80008000
; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_mov_b32 s3, 0xffff ; GFX8-NEXT: s_mov_b32 s3, 0xffff
; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_lshr_b32 s4, s1, 16 ; GFX8-NEXT: s_lshr_b32 s4, s1, 16
; GFX8-NEXT: s_and_b32 s0, s0, s3 ; GFX8-NEXT: s_and_b32 s0, s0, s3
; GFX8-NEXT: s_and_b32 s1, s1, s3 ; GFX8-NEXT: s_and_b32 s1, s1, s3
; GFX8-NEXT: s_and_b32 s2, s2, s3
; GFX8-NEXT: s_and_b32 s4, s4, s3
; GFX8-NEXT: s_add_i32 s0, s0, s1 ; GFX8-NEXT: s_add_i32 s0, s0, s1
; GFX8-NEXT: s_add_i32 s2, s2, s4 ; GFX8-NEXT: s_add_i32 s2, s2, s4
; GFX8-NEXT: s_lshl_b32 s1, s2, 16 ; GFX8-NEXT: s_lshl_b32 s1, s2, 16
; GFX8-NEXT: s_and_b32 s0, s0, s3 ; GFX8-NEXT: s_and_b32 s0, s0, s3
; GFX8-NEXT: s_or_b32 s0, s1, s0 ; GFX8-NEXT: s_or_b32 s0, s1, s0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
%neg.b = fneg <2 x half> %b %neg.b = fneg <2 x half> %b
%cast.neg.b = bitcast <2 x half> %neg.b to <2 x i16> %cast.neg.b = bitcast <2 x half> %neg.b to <2 x i16>
Show All 15 Lines
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s2 ; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s2
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_add_v2i16_fneg_lhs_fneg_rhs: ; GFX8-LABEL: s_add_v2i16_fneg_lhs_fneg_rhs:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_mov_b32 s2, 0x80008000 ; GFX8-NEXT: s_mov_b32 s2, 0x80008000
; GFX8-NEXT: s_xor_b32 s1, s1, s2 ; GFX8-NEXT: s_xor_b32 s1, s1, s2
; GFX8-NEXT: s_xor_b32 s0, s0, s2 ; GFX8-NEXT: s_xor_b32 s0, s0, s2
; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_mov_b32 s3, 0xffff ; GFX8-NEXT: s_mov_b32 s3, 0xffff
; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_lshr_b32 s4, s1, 16 ; GFX8-NEXT: s_lshr_b32 s4, s1, 16
; GFX8-NEXT: s_and_b32 s0, s0, s3 ; GFX8-NEXT: s_and_b32 s0, s0, s3
; GFX8-NEXT: s_and_b32 s1, s1, s3 ; GFX8-NEXT: s_and_b32 s1, s1, s3
; GFX8-NEXT: s_and_b32 s2, s2, s3
; GFX8-NEXT: s_and_b32 s4, s4, s3
; GFX8-NEXT: s_add_i32 s0, s0, s1 ; GFX8-NEXT: s_add_i32 s0, s0, s1
; GFX8-NEXT: s_add_i32 s2, s2, s4 ; GFX8-NEXT: s_add_i32 s2, s2, s4
; GFX8-NEXT: s_lshl_b32 s1, s2, 16 ; GFX8-NEXT: s_lshl_b32 s1, s2, 16
; GFX8-NEXT: s_and_b32 s0, s0, s3 ; GFX8-NEXT: s_and_b32 s0, s0, s3
; GFX8-NEXT: s_or_b32 s0, s1, s0 ; GFX8-NEXT: s_or_b32 s0, s1, s0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
%neg.a = fneg <2 x half> %a %neg.a = fneg <2 x half> %a
%neg.b = fneg <2 x half> %b %neg.b = fneg <2 x half> %b
%cast.neg.a = bitcast <2 x half> %neg.a to <2 x i16> %cast.neg.a = bitcast <2 x half> %neg.a to <2 x i16>
%cast.neg.b = bitcast <2 x half> %neg.b to <2 x i16> %cast.neg.b = bitcast <2 x half> %neg.b to <2 x i16>
%add = add <2 x i16> %cast.neg.a, %cast.neg.b %add = add <2 x i16> %cast.neg.a, %cast.neg.b
%cast = bitcast <2 x i16> %add to i32 %cast = bitcast <2 x i16> %add to i32
ret i32 %cast ret i32 %cast
} }

llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll

Show First 20 Lines • Show All 41 Lines • ▼ Show 20 Lines
; GFX8-NEXT: v_lshlrev_b16_e32 v0, 8, v0 ; GFX8-NEXT: v_lshlrev_b16_e32 v0, 8, v0
; GFX8-NEXT: v_mov_b32_e32 v1, 7 ; GFX8-NEXT: v_mov_b32_e32 v1, 7
; GFX8-NEXT: v_ashrrev_i16_sdwa v0, v1, sext(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1 ; GFX8-NEXT: v_ashrrev_i16_sdwa v0, v1, sext(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_1
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX9-LABEL: v_ashr_i8_7: ; GFX9-LABEL: v_ashr_i8_7:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_mov_b32 s4, 7 ; GFX9-NEXT: v_mov_b32_e32 v1, 7
; GFX9-NEXT: v_ashrrev_i16_sdwa v0, s4, sext(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_ashrrev_i16_sdwa v0, v1, sext(v0) dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%result = ashr i8 %value, 7 %result = ashr i8 %value, 7
ret i8 %result ret i8 %result
} }
define amdgpu_ps i8 @s_ashr_i8(i8 inreg %value, i8 inreg %amount) { define amdgpu_ps i8 @s_ashr_i8(i8 inreg %value, i8 inreg %amount) {
; GFX6-LABEL: s_ashr_i8: ; GFX6-LABEL: s_ashr_i8:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
▲ Show 20 Lines • Show All 1,164 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll

Show First 20 Lines • Show All 508 Lines • ▼ Show 20 Lines
; GFX7-NEXT: v_alignbit_b32 v2, v1, v1, 8 ; GFX7-NEXT: v_alignbit_b32 v2, v1, v1, 8
; GFX7-NEXT: v_alignbit_b32 v1, v1, v1, 24 ; GFX7-NEXT: v_alignbit_b32 v1, v1, v1, 24
; GFX7-NEXT: s_mov_b32 s4, 0xff00ff ; GFX7-NEXT: s_mov_b32 s4, 0xff00ff
; GFX7-NEXT: v_bfi_b32 v1, s4, v1, v2 ; GFX7-NEXT: v_bfi_b32 v1, s4, v1, v2
; GFX7-NEXT: v_alignbit_b32 v2, v0, v0, 8 ; GFX7-NEXT: v_alignbit_b32 v2, v0, v0, 8
; GFX7-NEXT: v_alignbit_b32 v0, v0, v0, 24 ; GFX7-NEXT: v_alignbit_b32 v0, v0, v0, 24
; GFX7-NEXT: v_bfi_b32 v2, s4, v0, v2 ; GFX7-NEXT: v_bfi_b32 v2, s4, v0, v2
; GFX7-NEXT: v_lshr_b64 v[0:1], v[1:2], 16 ; GFX7-NEXT: v_lshr_b64 v[0:1], v[1:2], 16
; GFX7-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: v_bswap_i48: ; GFX8-LABEL: v_bswap_i48:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: s_mov_b32 s4, 0x10203 ; GFX8-NEXT: s_mov_b32 s4, 0x10203
; GFX8-NEXT: v_perm_b32 v1, 0, v1, s4 ; GFX8-NEXT: v_perm_b32 v1, 0, v1, s4
; GFX8-NEXT: v_perm_b32 v2, 0, v0, s4 ; GFX8-NEXT: v_perm_b32 v2, 0, v0, s4
; GFX8-NEXT: v_lshrrev_b64 v[0:1], 16, v[1:2] ; GFX8-NEXT: v_lshrrev_b64 v[0:1], 16, v[1:2]
; GFX8-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX9-LABEL: v_bswap_i48: ; GFX9-LABEL: v_bswap_i48:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_mov_b32 s4, 0x10203 ; GFX9-NEXT: s_mov_b32 s4, 0x10203
; GFX9-NEXT: v_perm_b32 v1, 0, v1, s4 ; GFX9-NEXT: v_perm_b32 v1, 0, v1, s4
; GFX9-NEXT: v_perm_b32 v2, 0, v0, s4 ; GFX9-NEXT: v_perm_b32 v2, 0, v0, s4
; GFX9-NEXT: v_lshrrev_b64 v[0:1], 16, v[1:2] ; GFX9-NEXT: v_lshrrev_b64 v[0:1], 16, v[1:2]
; GFX9-NEXT: v_and_b32_e32 v1, 0xffff, v1
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%trunc = trunc i64 %src to i48 %trunc = trunc i64 %src to i48
%bswap = call i48 @llvm.bswap.i48(i48 %trunc) %bswap = call i48 @llvm.bswap.i48(i48 %trunc)
%zext = zext i48 %bswap to i64 %zext = zext i48 %bswap to i64
ret i64 %zext ret i64 %zext
} }
declare i16 @llvm.bswap.i16(i16) #1 declare i16 @llvm.bswap.i16(i16) #1
Show All 10 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll

Show First 20 Lines • Show All 218 Lines • ▼ Show 20 Lines; VI-NEXT: s_setpc_b64 s[30:31]
%cvt = uitofp <3 x i8> %val to <3 x float> %cvt = uitofp <3 x i8> %val to <3 x float>
ret <3 x float> %cvt ret <3 x float> %cvt
} }
define <4 x float> @v_uitofp_v4i8_to_v4f32(i32 %arg0) nounwind { define <4 x float> @v_uitofp_v4i8_to_v4f32(i32 %arg0) nounwind {
; SI-LABEL: v_uitofp_v4i8_to_v4f32: ; SI-LABEL: v_uitofp_v4i8_to_v4f32:
; SI: ; %bb.0: ; SI: ; %bb.0:
; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; SI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; SI-NEXT: s_movk_i32 s4, 0xff ; SI-NEXT: s_movk_i32 s4, 0xff
; SI-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; SI-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; SI-NEXT: v_lshrrev_b32_e32 v3, 24, v0 ; SI-NEXT: v_and_b32_e32 v3, s4, v0
; SI-NEXT: v_and_b32_e32 v0, s4, v0
; SI-NEXT: v_and_b32_e32 v1, s4, v1 ; SI-NEXT: v_and_b32_e32 v1, s4, v1
; SI-NEXT: v_and_b32_e32 v2, s4, v2 ; SI-NEXT: v_and_b32_e32 v2, s4, v2
; SI-NEXT: v_and_b32_e32 v3, s4, v3 ; SI-NEXT: v_cvt_f32_ubyte0_e32 v4, v3
; SI-NEXT: v_cvt_f32_ubyte0_e32 v0, v0 ; SI-NEXT: v_cvt_f32_ubyte3_e32 v3, v0
; SI-NEXT: v_cvt_f32_ubyte0_e32 v1, v1 ; SI-NEXT: v_cvt_f32_ubyte0_e32 v1, v1
; SI-NEXT: v_cvt_f32_ubyte0_e32 v2, v2 ; SI-NEXT: v_cvt_f32_ubyte0_e32 v2, v2
; SI-NEXT: v_cvt_f32_ubyte0_e32 v3, v3 ; SI-NEXT: v_mov_b32_e32 v0, v4
; SI-NEXT: s_setpc_b64 s[30:31] ; SI-NEXT: s_setpc_b64 s[30:31]
; ;
; VI-LABEL: v_uitofp_v4i8_to_v4f32: ; VI-LABEL: v_uitofp_v4i8_to_v4f32:
; VI: ; %bb.0: ; VI: ; %bb.0:
; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; VI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; VI-NEXT: s_movk_i32 s4, 0xff ; VI-NEXT: s_movk_i32 s4, 0xff
; VI-NEXT: v_mov_b32_e32 v3, s4 ; VI-NEXT: v_mov_b32_e32 v2, s4
; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; VI-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; VI-NEXT: v_and_b32_sdwa v2, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; VI-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; VI-NEXT: v_cvt_f32_ubyte0_sdwa v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 ; VI-NEXT: v_cvt_f32_ubyte0_sdwa v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
; VI-NEXT: v_and_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; VI-NEXT: v_cvt_f32_ubyte3_e32 v3, v0
; VI-NEXT: v_cvt_f32_ubyte0_e32 v3, v0
; VI-NEXT: v_cvt_f32_ubyte0_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 ; VI-NEXT: v_cvt_f32_ubyte0_sdwa v1, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0
; VI-NEXT: v_cvt_f32_ubyte0_e32 v2, v2 ; VI-NEXT: v_cvt_f32_ubyte0_e32 v2, v2
; VI-NEXT: v_mov_b32_e32 v0, v4 ; VI-NEXT: v_mov_b32_e32 v0, v4
; VI-NEXT: s_setpc_b64 s[30:31] ; VI-NEXT: s_setpc_b64 s[30:31]
%val = bitcast i32 %arg0 to <4 x i8> %val = bitcast i32 %arg0 to <4 x i8>
%cvt = uitofp <4 x i8> %val to <4 x float> %cvt = uitofp <4 x i8> %val to <4 x float>
ret <4 x float> %cvt ret <4 x float> %cvt
} }
▲ Show 20 Lines • Show All 1,061 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i8.ll

Show All 13 Lines
; GCN-NEXT: s_lshr_b32 s2, s0, 16 ; GCN-NEXT: s_lshr_b32 s2, s0, 16
; GCN-NEXT: s_lshr_b32 s3, s0, 24 ; GCN-NEXT: s_lshr_b32 s3, s0, 24
; GCN-NEXT: s_and_b32 s0, s0, s5 ; GCN-NEXT: s_and_b32 s0, s0, s5
; GCN-NEXT: s_lshl_b32 s1, s1, 8 ; GCN-NEXT: s_lshl_b32 s1, s1, 8
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_and_b32 s1, s2, s5 ; GCN-NEXT: s_and_b32 s1, s2, s5
; GCN-NEXT: s_lshl_b32 s1, s1, 16 ; GCN-NEXT: s_lshl_b32 s1, s1, 16
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_and_b32 s1, s3, s5 ; GCN-NEXT: s_lshl_b32 s1, s3, 24
; GCN-NEXT: s_lshl_b32 s1, s1, 24
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_and_b32 s1, s4, 3 ; GCN-NEXT: s_and_b32 s1, s4, 3
; GCN-NEXT: s_lshl_b32 s1, s1, 3 ; GCN-NEXT: s_lshl_b32 s1, s1, 3
; GCN-NEXT: s_lshr_b32 s0, s0, s1 ; GCN-NEXT: s_lshr_b32 s0, s0, s1
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
%vector = load <4 x i8>, <4 x i8> addrspace(4)* %ptr %vector = load <4 x i8>, <4 x i8> addrspace(4)* %ptr
%element = extractelement <4 x i8> %vector, i32 %idx %element = extractelement <4 x i8> %vector, i32 %idx
ret i8 %element ret i8 %element
} }
define amdgpu_ps i8 @extractelement_vgpr_v4i8_sgpr_idx(<4 x i8> addrspace(1)* %ptr, i32 inreg %idx) { define amdgpu_ps i8 @extractelement_vgpr_v4i8_sgpr_idx(<4 x i8> addrspace(1)* %ptr, i32 inreg %idx) {
; GFX9-LABEL: extractelement_vgpr_v4i8_sgpr_idx: ; GFX9-LABEL: extractelement_vgpr_v4i8_sgpr_idx:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dword v0, v[0:1], off ; GFX9-NEXT: global_load_dword v0, v[0:1], off
; GFX9-NEXT: s_mov_b32 s0, 8 ; GFX9-NEXT: s_mov_b32 s0, 8
; GFX9-NEXT: s_movk_i32 s1, 0xff ; GFX9-NEXT: s_movk_i32 s1, 0xff
; GFX9-NEXT: s_and_b32 s2, s2, 3 ; GFX9-NEXT: s_and_b32 s2, s2, 3
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v3, v0, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v1
; GFX9-NEXT: v_or3_b32 v0, v0, v2, v3 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v2
; GFX9-NEXT: s_lshl_b32 s0, s2, 3 ; GFX9-NEXT: s_lshl_b32 s0, s2, 3
; GFX9-NEXT: v_lshrrev_b32_e32 v0, s0, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, s0, v0
; GFX9-NEXT: v_readfirstlane_b32 s0, v0 ; GFX9-NEXT: v_readfirstlane_b32 s0, v0
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: extractelement_vgpr_v4i8_sgpr_idx: ; GFX8-LABEL: extractelement_vgpr_v4i8_sgpr_idx:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s0 ; GFX8-NEXT: v_mov_b32_e32 v2, s0
; GFX8-NEXT: s_and_b32 s0, s2, 3 ; GFX8-NEXT: s_and_b32 s0, s2, 3
; GFX8-NEXT: s_lshl_b32 s0, s0, 3 ; GFX8-NEXT: s_lshl_b32 s0, s0, 3
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_lshlrev_b32_e32 v3, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_or_b32_e32 v0, v0, v3
; GFX8-NEXT: v_lshrrev_b32_e32 v0, s0, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, s0, v0
; GFX8-NEXT: v_readfirstlane_b32 s0, v0 ; GFX8-NEXT: v_readfirstlane_b32 s0, v0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX7-LABEL: extractelement_vgpr_v4i8_sgpr_idx: ; GFX7-LABEL: extractelement_vgpr_v4i8_sgpr_idx:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s0, 0xff ; GFX7-NEXT: s_movk_i32 s0, 0xff
; GFX7-NEXT: s_and_b32 s1, s2, 3 ; GFX7-NEXT: s_and_b32 s1, s2, 3
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s0, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s0, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s0, v2
; GFX7-NEXT: v_and_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s0, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s0, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: s_lshl_b32 s0, s1, 3 ; GFX7-NEXT: s_lshl_b32 s0, s1, 3
; GFX7-NEXT: v_lshrrev_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, s0, v0
; GFX7-NEXT: v_readfirstlane_b32 s0, v0 ; GFX7-NEXT: v_readfirstlane_b32 s0, v0
Show All 9 Lines
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dword v0, v[0:1], off ; GFX9-NEXT: global_load_dword v0, v[0:1], off
; GFX9-NEXT: v_and_b32_e32 v1, 3, v2 ; GFX9-NEXT: v_and_b32_e32 v1, 3, v2
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 3, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v3, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v4, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v4, v0, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v2 ; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v2
; GFX9-NEXT: v_or3_b32 v0, v0, v3, v4 ; GFX9-NEXT: v_or3_b32 v0, v0, v4, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v0, v1, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, v1, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v4i8_vgpr_idx: ; GFX8-LABEL: extractelement_vgpr_v4i8_vgpr_idx:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v3, s4 ; GFX8-NEXT: v_mov_b32_e32 v3, s4
; GFX8-NEXT: v_and_b32_e32 v2, 3, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 3, v2
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v5, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v3, v0, v3 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v3, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v5 ; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v5
; GFX8-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v3
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
; GFX8-NEXT: v_lshlrev_b32_e32 v1, 3, v2 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 3, v2
; GFX8-NEXT: v_lshrrev_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, v1, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v4i8_vgpr_idx: ; GFX7-LABEL: extractelement_vgpr_v4i8_vgpr_idx:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: v_and_b32_e32 v1, 3, v2 ; GFX7-NEXT: v_and_b32_e32 v1, 3, v2
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 3, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 3, v1
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_and_b32_e32 v4, s4, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, v1, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <4 x i8>, <4 x i8> addrspace(1)* %ptr %vector = load <4 x i8>, <4 x i8> addrspace(1)* %ptr
Show All 14 Lines
; GFX9-NEXT: s_lshr_b32 s2, s0, 16 ; GFX9-NEXT: s_lshr_b32 s2, s0, 16
; GFX9-NEXT: s_lshr_b32 s3, s0, 24 ; GFX9-NEXT: s_lshr_b32 s3, s0, 24
; GFX9-NEXT: s_and_b32 s0, s0, s4 ; GFX9-NEXT: s_and_b32 s0, s0, s4
; GFX9-NEXT: s_lshl_b32 s1, s1, 8 ; GFX9-NEXT: s_lshl_b32 s1, s1, 8
; GFX9-NEXT: s_or_b32 s0, s0, s1 ; GFX9-NEXT: s_or_b32 s0, s0, s1
; GFX9-NEXT: s_and_b32 s1, s2, s4 ; GFX9-NEXT: s_and_b32 s1, s2, s4
; GFX9-NEXT: s_lshl_b32 s1, s1, 16 ; GFX9-NEXT: s_lshl_b32 s1, s1, 16
; GFX9-NEXT: s_or_b32 s0, s0, s1 ; GFX9-NEXT: s_or_b32 s0, s0, s1
; GFX9-NEXT: s_and_b32 s1, s3, s4 ; GFX9-NEXT: s_lshl_b32 s1, s3, 24
; GFX9-NEXT: s_lshl_b32 s1, s1, 24
; GFX9-NEXT: s_or_b32 s0, s0, s1 ; GFX9-NEXT: s_or_b32 s0, s0, s1
; GFX9-NEXT: v_lshrrev_b32_e64 v0, v0, s0 ; GFX9-NEXT: v_lshrrev_b32_e64 v0, v0, s0
; GFX9-NEXT: v_readfirstlane_b32 s0, v0 ; GFX9-NEXT: v_readfirstlane_b32 s0, v0
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: extractelement_sgpr_v4i8_vgpr_idx: ; GFX8-LABEL: extractelement_sgpr_v4i8_vgpr_idx:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dword s0, s[2:3], 0x0 ; GFX8-NEXT: s_load_dword s0, s[2:3], 0x0
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: v_and_b32_e32 v0, 3, v0 ; GFX8-NEXT: v_and_b32_e32 v0, 3, v0
; GFX8-NEXT: v_lshlrev_b32_e32 v0, 3, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s1, s0, 8 ; GFX8-NEXT: s_lshr_b32 s1, s0, 8
; GFX8-NEXT: s_and_b32 s1, s1, s4 ; GFX8-NEXT: s_and_b32 s1, s1, s4
; GFX8-NEXT: s_lshr_b32 s2, s0, 16 ; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_lshr_b32 s3, s0, 24 ; GFX8-NEXT: s_lshr_b32 s3, s0, 24
; GFX8-NEXT: s_and_b32 s0, s0, s4 ; GFX8-NEXT: s_and_b32 s0, s0, s4
; GFX8-NEXT: s_lshl_b32 s1, s1, 8 ; GFX8-NEXT: s_lshl_b32 s1, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s2, s4 ; GFX8-NEXT: s_and_b32 s1, s2, s4
; GFX8-NEXT: s_lshl_b32 s1, s1, 16 ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s3, s4 ; GFX8-NEXT: s_lshl_b32 s1, s3, 24
; GFX8-NEXT: s_lshl_b32 s1, s1, 24
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: v_lshrrev_b32_e64 v0, v0, s0 ; GFX8-NEXT: v_lshrrev_b32_e64 v0, v0, s0
; GFX8-NEXT: v_readfirstlane_b32 s0, v0 ; GFX8-NEXT: v_readfirstlane_b32 s0, v0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX7-LABEL: extractelement_sgpr_v4i8_vgpr_idx: ; GFX7-LABEL: extractelement_sgpr_v4i8_vgpr_idx:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dword s0, s[2:3], 0x0 ; GFX7-NEXT: s_load_dword s0, s[2:3], 0x0
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: v_and_b32_e32 v0, 3, v0 ; GFX7-NEXT: v_and_b32_e32 v0, 3, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 3, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s1, s0, 8 ; GFX7-NEXT: s_lshr_b32 s1, s0, 8
; GFX7-NEXT: s_and_b32 s1, s1, s4 ; GFX7-NEXT: s_and_b32 s1, s1, s4
; GFX7-NEXT: s_lshr_b32 s2, s0, 16 ; GFX7-NEXT: s_lshr_b32 s2, s0, 16
; GFX7-NEXT: s_lshr_b32 s3, s0, 24 ; GFX7-NEXT: s_lshr_b32 s3, s0, 24
; GFX7-NEXT: s_and_b32 s0, s0, s4 ; GFX7-NEXT: s_and_b32 s0, s0, s4
; GFX7-NEXT: s_lshl_b32 s1, s1, 8 ; GFX7-NEXT: s_lshl_b32 s1, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s2, s4 ; GFX7-NEXT: s_and_b32 s1, s2, s4
; GFX7-NEXT: s_lshl_b32 s1, s1, 16 ; GFX7-NEXT: s_lshl_b32 s1, s1, 16
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s3, s4 ; GFX7-NEXT: s_lshl_b32 s1, s3, 24
; GFX7-NEXT: s_lshl_b32 s1, s1, 24
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: v_lshr_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_lshr_b32_e32 v0, s0, v0
; GFX7-NEXT: v_readfirstlane_b32 s0, v0 ; GFX7-NEXT: v_readfirstlane_b32 s0, v0
; GFX7-NEXT: ; return to shader part epilog ; GFX7-NEXT: ; return to shader part epilog
%vector = load <4 x i8>, <4 x i8> addrspace(4)* %ptr %vector = load <4 x i8>, <4 x i8> addrspace(4)* %ptr
%element = extractelement <4 x i8> %vector, i32 %idx %element = extractelement <4 x i8> %vector, i32 %idx
ret i8 %element ret i8 %element
} }
define amdgpu_ps i8 @extractelement_sgpr_v4i8_idx0(<4 x i8> addrspace(4)* inreg %ptr) { define amdgpu_ps i8 @extractelement_sgpr_v4i8_idx0(<4 x i8> addrspace(4)* inreg %ptr) {
; GCN-LABEL: extractelement_sgpr_v4i8_idx0: ; GCN-LABEL: extractelement_sgpr_v4i8_idx0:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dword s1, s[2:3], 0x0 ; GCN-NEXT: s_load_dword s1, s[2:3], 0x0
; GCN-NEXT: s_movk_i32 s0, 0xff ; GCN-NEXT: s_movk_i32 s0, 0xff
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_lshr_b32 s2, s1, 8 ; GCN-NEXT: s_lshr_b32 s2, s1, 8
; GCN-NEXT: s_and_b32 s2, s2, s0 ; GCN-NEXT: s_and_b32 s2, s2, s0
; GCN-NEXT: s_lshr_b32 s3, s1, 16 ; GCN-NEXT: s_lshr_b32 s3, s1, 16
; GCN-NEXT: s_lshr_b32 s4, s1, 24 ; GCN-NEXT: s_lshr_b32 s4, s1, 24
; GCN-NEXT: s_and_b32 s1, s1, s0 ; GCN-NEXT: s_and_b32 s1, s1, s0
; GCN-NEXT: s_and_b32 s0, s3, s0
; GCN-NEXT: s_lshl_b32 s2, s2, 8 ; GCN-NEXT: s_lshl_b32 s2, s2, 8
; GCN-NEXT: s_or_b32 s1, s1, s2 ; GCN-NEXT: s_or_b32 s1, s1, s2
; GCN-NEXT: s_and_b32 s2, s3, s0 ; GCN-NEXT: s_lshl_b32 s0, s0, 16
; GCN-NEXT: s_and_b32 s0, s4, s0
; GCN-NEXT: s_lshl_b32 s2, s2, 16
; GCN-NEXT: s_or_b32 s1, s1, s2
; GCN-NEXT: s_lshl_b32 s0, s0, 24
; GCN-NEXT: s_or_b32 s0, s1, s0 ; GCN-NEXT: s_or_b32 s0, s1, s0
; GCN-NEXT: s_lshl_b32 s1, s4, 24
; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
%vector = load <4 x i8>, <4 x i8> addrspace(4)* %ptr %vector = load <4 x i8>, <4 x i8> addrspace(4)* %ptr
%element = extractelement <4 x i8> %vector, i32 0 %element = extractelement <4 x i8> %vector, i32 0
ret i8 %element ret i8 %element
} }
define amdgpu_ps i8 @extractelement_sgpr_v4i8_idx1(<4 x i8> addrspace(4)* inreg %ptr) { define amdgpu_ps i8 @extractelement_sgpr_v4i8_idx1(<4 x i8> addrspace(4)* inreg %ptr) {
; GCN-LABEL: extractelement_sgpr_v4i8_idx1: ; GCN-LABEL: extractelement_sgpr_v4i8_idx1:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dword s1, s[2:3], 0x0 ; GCN-NEXT: s_load_dword s1, s[2:3], 0x0
; GCN-NEXT: s_movk_i32 s0, 0xff ; GCN-NEXT: s_movk_i32 s0, 0xff
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_lshr_b32 s2, s1, 8 ; GCN-NEXT: s_lshr_b32 s2, s1, 8
; GCN-NEXT: s_and_b32 s2, s2, s0 ; GCN-NEXT: s_and_b32 s2, s2, s0
; GCN-NEXT: s_lshr_b32 s3, s1, 16 ; GCN-NEXT: s_lshr_b32 s3, s1, 16
; GCN-NEXT: s_lshr_b32 s4, s1, 24 ; GCN-NEXT: s_lshr_b32 s4, s1, 24
; GCN-NEXT: s_and_b32 s1, s1, s0 ; GCN-NEXT: s_and_b32 s1, s1, s0
; GCN-NEXT: s_and_b32 s0, s3, s0
; GCN-NEXT: s_lshl_b32 s2, s2, 8 ; GCN-NEXT: s_lshl_b32 s2, s2, 8
; GCN-NEXT: s_or_b32 s1, s1, s2 ; GCN-NEXT: s_or_b32 s1, s1, s2
; GCN-NEXT: s_and_b32 s2, s3, s0 ; GCN-NEXT: s_lshl_b32 s0, s0, 16
; GCN-NEXT: s_and_b32 s0, s4, s0
; GCN-NEXT: s_lshl_b32 s2, s2, 16
; GCN-NEXT: s_or_b32 s1, s1, s2
; GCN-NEXT: s_lshl_b32 s0, s0, 24
; GCN-NEXT: s_or_b32 s0, s1, s0 ; GCN-NEXT: s_or_b32 s0, s1, s0
; GCN-NEXT: s_lshl_b32 s1, s4, 24
; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_lshr_b32 s0, s0, 8 ; GCN-NEXT: s_lshr_b32 s0, s0, 8
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
%vector = load <4 x i8>, <4 x i8> addrspace(4)* %ptr %vector = load <4 x i8>, <4 x i8> addrspace(4)* %ptr
%element = extractelement <4 x i8> %vector, i32 1 %element = extractelement <4 x i8> %vector, i32 1
ret i8 %element ret i8 %element
} }
define amdgpu_ps i8 @extractelement_sgpr_v4i8_idx2(<4 x i8> addrspace(4)* inreg %ptr) { define amdgpu_ps i8 @extractelement_sgpr_v4i8_idx2(<4 x i8> addrspace(4)* inreg %ptr) {
; GCN-LABEL: extractelement_sgpr_v4i8_idx2: ; GCN-LABEL: extractelement_sgpr_v4i8_idx2:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dword s1, s[2:3], 0x0 ; GCN-NEXT: s_load_dword s1, s[2:3], 0x0
; GCN-NEXT: s_movk_i32 s0, 0xff ; GCN-NEXT: s_movk_i32 s0, 0xff
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_lshr_b32 s2, s1, 8 ; GCN-NEXT: s_lshr_b32 s2, s1, 8
; GCN-NEXT: s_and_b32 s2, s2, s0 ; GCN-NEXT: s_and_b32 s2, s2, s0
; GCN-NEXT: s_lshr_b32 s3, s1, 16 ; GCN-NEXT: s_lshr_b32 s3, s1, 16
; GCN-NEXT: s_lshr_b32 s4, s1, 24 ; GCN-NEXT: s_lshr_b32 s4, s1, 24
; GCN-NEXT: s_and_b32 s1, s1, s0 ; GCN-NEXT: s_and_b32 s1, s1, s0
; GCN-NEXT: s_and_b32 s0, s3, s0
; GCN-NEXT: s_lshl_b32 s2, s2, 8 ; GCN-NEXT: s_lshl_b32 s2, s2, 8
; GCN-NEXT: s_or_b32 s1, s1, s2 ; GCN-NEXT: s_or_b32 s1, s1, s2
; GCN-NEXT: s_and_b32 s2, s3, s0 ; GCN-NEXT: s_lshl_b32 s0, s0, 16
; GCN-NEXT: s_and_b32 s0, s4, s0
; GCN-NEXT: s_lshl_b32 s2, s2, 16
; GCN-NEXT: s_or_b32 s1, s1, s2
; GCN-NEXT: s_lshl_b32 s0, s0, 24
; GCN-NEXT: s_or_b32 s0, s1, s0 ; GCN-NEXT: s_or_b32 s0, s1, s0
; GCN-NEXT: s_lshl_b32 s1, s4, 24
; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_lshr_b32 s0, s0, 16 ; GCN-NEXT: s_lshr_b32 s0, s0, 16
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
%vector = load <4 x i8>, <4 x i8> addrspace(4)* %ptr %vector = load <4 x i8>, <4 x i8> addrspace(4)* %ptr
%element = extractelement <4 x i8> %vector, i32 2 %element = extractelement <4 x i8> %vector, i32 2
ret i8 %element ret i8 %element
} }
define amdgpu_ps i8 @extractelement_sgpr_v4i8_idx3(<4 x i8> addrspace(4)* inreg %ptr) { define amdgpu_ps i8 @extractelement_sgpr_v4i8_idx3(<4 x i8> addrspace(4)* inreg %ptr) {
; GCN-LABEL: extractelement_sgpr_v4i8_idx3: ; GCN-LABEL: extractelement_sgpr_v4i8_idx3:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dword s1, s[2:3], 0x0 ; GCN-NEXT: s_load_dword s1, s[2:3], 0x0
; GCN-NEXT: s_movk_i32 s0, 0xff ; GCN-NEXT: s_movk_i32 s0, 0xff
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_lshr_b32 s2, s1, 8 ; GCN-NEXT: s_lshr_b32 s2, s1, 8
; GCN-NEXT: s_and_b32 s2, s2, s0 ; GCN-NEXT: s_and_b32 s2, s2, s0
; GCN-NEXT: s_lshr_b32 s3, s1, 16 ; GCN-NEXT: s_lshr_b32 s3, s1, 16
; GCN-NEXT: s_lshr_b32 s4, s1, 24 ; GCN-NEXT: s_lshr_b32 s4, s1, 24
; GCN-NEXT: s_and_b32 s1, s1, s0 ; GCN-NEXT: s_and_b32 s1, s1, s0
; GCN-NEXT: s_and_b32 s0, s3, s0
; GCN-NEXT: s_lshl_b32 s2, s2, 8 ; GCN-NEXT: s_lshl_b32 s2, s2, 8
; GCN-NEXT: s_or_b32 s1, s1, s2 ; GCN-NEXT: s_or_b32 s1, s1, s2
; GCN-NEXT: s_and_b32 s2, s3, s0 ; GCN-NEXT: s_lshl_b32 s0, s0, 16
; GCN-NEXT: s_and_b32 s0, s4, s0
; GCN-NEXT: s_lshl_b32 s2, s2, 16
; GCN-NEXT: s_or_b32 s1, s1, s2
; GCN-NEXT: s_lshl_b32 s0, s0, 24
; GCN-NEXT: s_or_b32 s0, s1, s0 ; GCN-NEXT: s_or_b32 s0, s1, s0
; GCN-NEXT: s_lshl_b32 s1, s4, 24
; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_lshr_b32 s0, s0, 24 ; GCN-NEXT: s_lshr_b32 s0, s0, 24
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
%vector = load <4 x i8>, <4 x i8> addrspace(4)* %ptr %vector = load <4 x i8>, <4 x i8> addrspace(4)* %ptr
%element = extractelement <4 x i8> %vector, i32 3 %element = extractelement <4 x i8> %vector, i32 3
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v4i8_idx0(<4 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v4i8_idx0(<4 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v4i8_idx0: ; GFX9-LABEL: extractelement_vgpr_v4i8_idx0:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dword v0, v[0:1], off ; GFX9-NEXT: global_load_dword v0, v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v0, s5, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v1
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v1, v2, v0 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v4i8_idx0: ; GFX8-LABEL: extractelement_vgpr_v4i8_idx0:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v4i8_idx0: ; GFX7-LABEL: extractelement_vgpr_v4i8_idx0:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <4 x i8>, <4 x i8> addrspace(1)* %ptr %vector = load <4 x i8>, <4 x i8> addrspace(1)* %ptr
%element = extractelement <4 x i8> %vector, i32 0 %element = extractelement <4 x i8> %vector, i32 0
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v4i8_idx1(<4 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v4i8_idx1(<4 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v4i8_idx1: ; GFX9-LABEL: extractelement_vgpr_v4i8_idx1:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dword v0, v[0:1], off ; GFX9-NEXT: global_load_dword v0, v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v0, s5, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v1
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v1, v2, v0 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v4i8_idx1: ; GFX8-LABEL: extractelement_vgpr_v4i8_idx1:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v4i8_idx1: ; GFX7-LABEL: extractelement_vgpr_v4i8_idx1:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <4 x i8>, <4 x i8> addrspace(1)* %ptr %vector = load <4 x i8>, <4 x i8> addrspace(1)* %ptr
%element = extractelement <4 x i8> %vector, i32 1 %element = extractelement <4 x i8> %vector, i32 1
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v4i8_idx2(<4 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v4i8_idx2(<4 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v4i8_idx2: ; GFX9-LABEL: extractelement_vgpr_v4i8_idx2:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dword v0, v[0:1], off ; GFX9-NEXT: global_load_dword v0, v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v0, s5, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v1
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v1, v2, v0 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v4i8_idx2: ; GFX8-LABEL: extractelement_vgpr_v4i8_idx2:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v4i8_idx2: ; GFX7-LABEL: extractelement_vgpr_v4i8_idx2:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <4 x i8>, <4 x i8> addrspace(1)* %ptr %vector = load <4 x i8>, <4 x i8> addrspace(1)* %ptr
%element = extractelement <4 x i8> %vector, i32 2 %element = extractelement <4 x i8> %vector, i32 2
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v4i8_idx3(<4 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v4i8_idx3(<4 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v4i8_idx3: ; GFX9-LABEL: extractelement_vgpr_v4i8_idx3:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dword v0, v[0:1], off ; GFX9-NEXT: global_load_dword v0, v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v0, s5, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v1
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v1, v2, v0 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v4i8_idx3: ; GFX8-LABEL: extractelement_vgpr_v4i8_idx3:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v4i8_idx3: ; GFX7-LABEL: extractelement_vgpr_v4i8_idx3:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dword v0, v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <4 x i8>, <4 x i8> addrspace(1)* %ptr %vector = load <4 x i8>, <4 x i8> addrspace(1)* %ptr
Show All 12 Lines
; GCN-NEXT: s_lshr_b32 s3, s0, 16 ; GCN-NEXT: s_lshr_b32 s3, s0, 16
; GCN-NEXT: s_lshr_b32 s5, s0, 24 ; GCN-NEXT: s_lshr_b32 s5, s0, 24
; GCN-NEXT: s_and_b32 s0, s0, s9 ; GCN-NEXT: s_and_b32 s0, s0, s9
; GCN-NEXT: s_lshl_b32 s2, s2, 8 ; GCN-NEXT: s_lshl_b32 s2, s2, 8
; GCN-NEXT: s_or_b32 s0, s0, s2 ; GCN-NEXT: s_or_b32 s0, s0, s2
; GCN-NEXT: s_and_b32 s2, s3, s9 ; GCN-NEXT: s_and_b32 s2, s3, s9
; GCN-NEXT: s_lshl_b32 s2, s2, 16 ; GCN-NEXT: s_lshl_b32 s2, s2, 16
; GCN-NEXT: s_or_b32 s0, s0, s2 ; GCN-NEXT: s_or_b32 s0, s0, s2
; GCN-NEXT: s_and_b32 s2, s5, s9 ; GCN-NEXT: s_lshl_b32 s2, s5, 24
; GCN-NEXT: s_lshl_b32 s2, s2, 24
; GCN-NEXT: s_lshr_b32 s6, s1, 8 ; GCN-NEXT: s_lshr_b32 s6, s1, 8
; GCN-NEXT: s_or_b32 s0, s0, s2 ; GCN-NEXT: s_or_b32 s0, s0, s2
; GCN-NEXT: s_and_b32 s2, s6, s9 ; GCN-NEXT: s_and_b32 s2, s6, s9
; GCN-NEXT: s_lshr_b32 s7, s1, 16 ; GCN-NEXT: s_lshr_b32 s7, s1, 16
; GCN-NEXT: s_lshr_b32 s8, s1, 24 ; GCN-NEXT: s_lshr_b32 s8, s1, 24
; GCN-NEXT: s_and_b32 s1, s1, s9 ; GCN-NEXT: s_and_b32 s1, s1, s9
; GCN-NEXT: s_lshl_b32 s2, s2, 8 ; GCN-NEXT: s_lshl_b32 s2, s2, 8
; GCN-NEXT: s_or_b32 s1, s1, s2 ; GCN-NEXT: s_or_b32 s1, s1, s2
; GCN-NEXT: s_and_b32 s2, s7, s9 ; GCN-NEXT: s_and_b32 s2, s7, s9
; GCN-NEXT: s_lshl_b32 s2, s2, 16 ; GCN-NEXT: s_lshl_b32 s2, s2, 16
; GCN-NEXT: s_or_b32 s1, s1, s2 ; GCN-NEXT: s_or_b32 s1, s1, s2
; GCN-NEXT: s_and_b32 s2, s8, s9 ; GCN-NEXT: s_lshl_b32 s2, s8, 24
; GCN-NEXT: s_lshl_b32 s2, s2, 24
; GCN-NEXT: s_or_b32 s1, s1, s2 ; GCN-NEXT: s_or_b32 s1, s1, s2
; GCN-NEXT: s_lshr_b32 s2, s4, 2 ; GCN-NEXT: s_lshr_b32 s2, s4, 2
; GCN-NEXT: s_cmp_eq_u32 s2, 1 ; GCN-NEXT: s_cmp_eq_u32 s2, 1
; GCN-NEXT: s_cselect_b32 s0, s1, s0 ; GCN-NEXT: s_cselect_b32 s0, s1, s0
; GCN-NEXT: s_and_b32 s1, s4, 3 ; GCN-NEXT: s_and_b32 s1, s4, 3
; GCN-NEXT: s_lshl_b32 s1, s1, 3 ; GCN-NEXT: s_lshl_b32 s1, s1, 3
; GCN-NEXT: s_lshr_b32 s0, s0, s1 ; GCN-NEXT: s_lshr_b32 s0, s0, s1
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
%vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr
%element = extractelement <8 x i8> %vector, i32 %idx %element = extractelement <8 x i8> %vector, i32 %idx
ret i8 %element ret i8 %element
} }
define amdgpu_ps i8 @extractelement_vgpr_v8i8_sgpr_idx(<8 x i8> addrspace(1)* %ptr, i32 inreg %idx) { define amdgpu_ps i8 @extractelement_vgpr_v8i8_sgpr_idx(<8 x i8> addrspace(1)* %ptr, i32 inreg %idx) {
; GFX9-LABEL: extractelement_vgpr_v8i8_sgpr_idx: ; GFX9-LABEL: extractelement_vgpr_v8i8_sgpr_idx:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_mov_b32 s0, 8 ; GFX9-NEXT: s_mov_b32 s0, 8
; GFX9-NEXT: v_mov_b32_e32 v2, 8
; GFX9-NEXT: s_movk_i32 s1, 0xff ; GFX9-NEXT: s_movk_i32 s1, 0xff
; GFX9-NEXT: s_lshr_b32 s3, s2, 2 ; GFX9-NEXT: s_lshr_b32 s3, s2, 2
; GFX9-NEXT: s_and_b32 s2, s2, 3 ; GFX9-NEXT: s_and_b32 s2, s2, 3
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s3, 1 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s3, 1
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v3, s0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v1
; GFX9-NEXT: v_and_b32_sdwa v5, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v6, v0, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_sdwa v4, s0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v3 ; GFX9-NEXT: v_and_b32_sdwa v6, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v7, v1, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v7, v1, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v8, v1, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX9-NEXT: v_and_or_b32 v1, v1, s1, v2 ; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v2
; GFX9-NEXT: v_or3_b32 v0, v0, v5, v6 ; GFX9-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; GFX9-NEXT: v_or3_b32 v1, v1, v7, v8 ; GFX9-NEXT: v_and_or_b32 v1, v1, s1, v4
; GFX9-NEXT: v_or3_b32 v0, v0, v6, v3
; GFX9-NEXT: v_or3_b32 v1, v1, v7, v5
; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
; GFX9-NEXT: s_lshl_b32 s0, s2, 3 ; GFX9-NEXT: s_lshl_b32 s0, s2, 3
; GFX9-NEXT: v_lshrrev_b32_e32 v0, s0, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, s0, v0
; GFX9-NEXT: v_readfirstlane_b32 s0, v0 ; GFX9-NEXT: v_readfirstlane_b32 s0, v0
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: extractelement_vgpr_v8i8_sgpr_idx: ; GFX8-LABEL: extractelement_vgpr_v8i8_sgpr_idx:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_mov_b32_e32 v2, 8 ; GFX8-NEXT: v_mov_b32_e32 v2, 8
; GFX8-NEXT: v_mov_b32_e32 v3, 8 ; GFX8-NEXT: v_mov_b32_e32 v3, 8
; GFX8-NEXT: v_mov_b32_e32 v4, s0 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
; GFX8-NEXT: s_lshr_b32 s0, s2, 2 ; GFX8-NEXT: s_lshr_b32 s0, s2, 2
; GFX8-NEXT: s_and_b32 s1, s2, 3 ; GFX8-NEXT: s_and_b32 s1, s2, 3
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s0, 1 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s0, 1
; GFX8-NEXT: s_lshl_b32 s0, s1, 3 ; GFX8-NEXT: s_lshl_b32 s0, s1, 3
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v3, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v3, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v7, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v8, v0, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v9, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v9, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v4, v1, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v4, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v7 ; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v6
; GFX8-NEXT: v_or_b32_e32 v1, v1, v9 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v9
; GFX8-NEXT: v_or_b32_e32 v0, v0, v8 ; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v8
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
; GFX8-NEXT: v_or_b32_e32 v1, v1, v6
; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
; GFX8-NEXT: v_lshrrev_b32_e32 v0, s0, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, s0, v0
; GFX8-NEXT: v_readfirstlane_b32 s0, v0 ; GFX8-NEXT: v_readfirstlane_b32 s0, v0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX7-LABEL: extractelement_vgpr_v8i8_sgpr_idx: ; GFX7-LABEL: extractelement_vgpr_v8i8_sgpr_idx:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
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; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v1
; GFX7-NEXT: v_and_b32_e32 v2, s0, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s0, v2
; GFX7-NEXT: v_and_b32_e32 v5, s0, v5 ; GFX7-NEXT: v_and_b32_e32 v5, s0, v5
; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX7-NEXT: v_and_b32_e32 v3, s0, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s0, v3
; GFX7-NEXT: v_and_b32_e32 v6, s0, v6 ; GFX7-NEXT: v_and_b32_e32 v6, s0, v6
; GFX7-NEXT: v_and_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s0, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_and_b32_e32 v1, s0, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 8, v5 ; GFX7-NEXT: v_lshlrev_b32_e32 v5, 8, v5
; GFX7-NEXT: v_and_b32_e32 v4, s0, v4
; GFX7-NEXT: v_and_b32_e32 v7, s0, v7
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX7-NEXT: v_or_b32_e32 v1, v1, v5 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX7-NEXT: v_or_b32_e32 v1, v1, v6 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v6
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} }
define i8 @extractelement_vgpr_v8i8_vgpr_idx(<8 x i8> addrspace(1)* %ptr, i32 %idx) { define i8 @extractelement_vgpr_v8i8_vgpr_idx(<8 x i8> addrspace(1)* %ptr, i32 %idx) {
; GFX9-LABEL: extractelement_vgpr_v8i8_vgpr_idx: ; GFX9-LABEL: extractelement_vgpr_v8i8_vgpr_idx:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: v_mov_b32_e32 v3, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 2, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v3, 2, v2
; GFX9-NEXT: v_and_b32_e32 v2, 3, v2 ; GFX9-NEXT: v_and_b32_e32 v2, 3, v2
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v4 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v3
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, s4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v3, v3, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX9-NEXT: v_and_b32_sdwa v7, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_sdwa v4, s4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v8, v0, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_sdwa v6, s4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v5 ; GFX9-NEXT: v_and_b32_sdwa v8, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v9, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v9, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v10, v1, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; GFX9-NEXT: v_and_or_b32 v1, v1, s5, v3 ; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v4
; GFX9-NEXT: v_or3_b32 v0, v0, v7, v8 ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX9-NEXT: v_or3_b32 v1, v1, v9, v10 ; GFX9-NEXT: v_and_or_b32 v1, v1, s5, v6
; GFX9-NEXT: v_or3_b32 v0, v0, v8, v5
; GFX9-NEXT: v_or3_b32 v1, v1, v9, v7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 3, v2 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 3, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v0, v1, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, v1, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v8i8_vgpr_idx: ; GFX8-LABEL: extractelement_vgpr_v8i8_vgpr_idx:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: v_mov_b32_e32 v3, 8 ; GFX8-NEXT: v_mov_b32_e32 v3, 8
; GFX8-NEXT: v_mov_b32_e32 v4, 8 ; GFX8-NEXT: v_mov_b32_e32 v4, 8
; GFX8-NEXT: v_mov_b32_e32 v5, s4 ; GFX8-NEXT: v_mov_b32_e32 v5, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 2, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 2, v2
; GFX8-NEXT: v_and_b32_e32 v2, 3, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 3, v2
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v9, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v3, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v3, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v9, v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v10, v0, v5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v11, v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v11, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v10, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v5, v1, v5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v5, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v9 ; GFX8-NEXT: v_lshlrev_b32_e32 v7, 24, v8
; GFX8-NEXT: v_or_b32_e32 v1, v1, v11 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v11
; GFX8-NEXT: v_or_b32_e32 v0, v0, v10 ; GFX8-NEXT: v_lshlrev_b32_e32 v8, 24, v10
; GFX8-NEXT: v_or_b32_e32 v1, v1, v5 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v5
; GFX8-NEXT: v_or_b32_e32 v0, v0, v7
; GFX8-NEXT: v_or_b32_e32 v1, v1, v8
; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
; GFX8-NEXT: v_lshlrev_b32_e32 v1, 3, v2 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 3, v2
; GFX8-NEXT: v_lshrrev_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, v1, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v8i8_vgpr_idx: ; GFX7-LABEL: extractelement_vgpr_v8i8_vgpr_idx:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
Show All 15 Lines
; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v1
; GFX7-NEXT: v_and_b32_e32 v5, s4, v5 ; GFX7-NEXT: v_and_b32_e32 v5, s4, v5
; GFX7-NEXT: v_and_b32_e32 v8, s4, v8 ; GFX7-NEXT: v_and_b32_e32 v8, s4, v8
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v7, 8, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v7, 8, v7
; GFX7-NEXT: v_and_b32_e32 v6, s4, v6
; GFX7-NEXT: v_and_b32_e32 v9, s4, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; GFX7-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX7-NEXT: v_or_b32_e32 v1, v1, v7 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v7
; GFX7-NEXT: v_lshlrev_b32_e32 v6, 24, v6 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; GFX7-NEXT: v_or_b32_e32 v0, v0, v5 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v9, 24, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; GFX7-NEXT: v_or_b32_e32 v1, v1, v8 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v8
Show All 22 Lines
; GCN-NEXT: s_lshr_b32 s3, s0, 16 ; GCN-NEXT: s_lshr_b32 s3, s0, 16
; GCN-NEXT: s_lshr_b32 s4, s0, 24 ; GCN-NEXT: s_lshr_b32 s4, s0, 24
; GCN-NEXT: s_and_b32 s0, s0, s8 ; GCN-NEXT: s_and_b32 s0, s0, s8
; GCN-NEXT: s_lshl_b32 s2, s2, 8 ; GCN-NEXT: s_lshl_b32 s2, s2, 8
; GCN-NEXT: s_or_b32 s0, s0, s2 ; GCN-NEXT: s_or_b32 s0, s0, s2
; GCN-NEXT: s_and_b32 s2, s3, s8 ; GCN-NEXT: s_and_b32 s2, s3, s8
; GCN-NEXT: s_lshl_b32 s2, s2, 16 ; GCN-NEXT: s_lshl_b32 s2, s2, 16
; GCN-NEXT: s_or_b32 s0, s0, s2 ; GCN-NEXT: s_or_b32 s0, s0, s2
; GCN-NEXT: s_and_b32 s2, s4, s8 ; GCN-NEXT: s_lshl_b32 s2, s4, 24
; GCN-NEXT: s_lshl_b32 s2, s2, 24
; GCN-NEXT: s_lshr_b32 s5, s1, 8 ; GCN-NEXT: s_lshr_b32 s5, s1, 8
; GCN-NEXT: s_or_b32 s0, s0, s2 ; GCN-NEXT: s_or_b32 s0, s0, s2
; GCN-NEXT: s_and_b32 s2, s5, s8 ; GCN-NEXT: s_and_b32 s2, s5, s8
; GCN-NEXT: s_lshr_b32 s6, s1, 16 ; GCN-NEXT: s_lshr_b32 s6, s1, 16
; GCN-NEXT: s_lshr_b32 s7, s1, 24 ; GCN-NEXT: s_lshr_b32 s7, s1, 24
; GCN-NEXT: s_and_b32 s1, s1, s8 ; GCN-NEXT: s_and_b32 s1, s1, s8
; GCN-NEXT: s_lshl_b32 s2, s2, 8 ; GCN-NEXT: s_lshl_b32 s2, s2, 8
; GCN-NEXT: s_or_b32 s1, s1, s2 ; GCN-NEXT: s_or_b32 s1, s1, s2
; GCN-NEXT: s_and_b32 s2, s6, s8 ; GCN-NEXT: s_and_b32 s2, s6, s8
; GCN-NEXT: s_lshl_b32 s2, s2, 16 ; GCN-NEXT: s_lshl_b32 s2, s2, 16
; GCN-NEXT: s_or_b32 s1, s1, s2 ; GCN-NEXT: s_or_b32 s1, s1, s2
; GCN-NEXT: s_and_b32 s2, s7, s8 ; GCN-NEXT: s_lshl_b32 s2, s7, 24
; GCN-NEXT: s_lshl_b32 s2, s2, 24
; GCN-NEXT: s_or_b32 s1, s1, s2 ; GCN-NEXT: s_or_b32 s1, s1, s2
; GCN-NEXT: v_mov_b32_e32 v2, s0 ; GCN-NEXT: v_mov_b32_e32 v2, s0
; GCN-NEXT: v_mov_b32_e32 v3, s1 ; GCN-NEXT: v_mov_b32_e32 v3, s1
; GCN-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc ; GCN-NEXT: v_cndmask_b32_e32 v1, v2, v3, vcc
; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0 ; GCN-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GCN-NEXT: v_lshrrev_b32_e32 v0, v0, v1 ; GCN-NEXT: v_lshrrev_b32_e32 v0, v0, v1
; GCN-NEXT: v_readfirstlane_b32 s0, v0 ; GCN-NEXT: v_readfirstlane_b32 s0, v0
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
Show All 13 Lines
; GCN-NEXT: s_lshr_b32 s2, s0, 16 ; GCN-NEXT: s_lshr_b32 s2, s0, 16
; GCN-NEXT: s_lshr_b32 s3, s0, 24 ; GCN-NEXT: s_lshr_b32 s3, s0, 24
; GCN-NEXT: s_and_b32 s0, s0, s4 ; GCN-NEXT: s_and_b32 s0, s0, s4
; GCN-NEXT: s_lshl_b32 s1, s1, 8 ; GCN-NEXT: s_lshl_b32 s1, s1, 8
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_and_b32 s1, s2, s4 ; GCN-NEXT: s_and_b32 s1, s2, s4
; GCN-NEXT: s_lshl_b32 s1, s1, 16 ; GCN-NEXT: s_lshl_b32 s1, s1, 16
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_and_b32 s1, s3, s4 ; GCN-NEXT: s_lshl_b32 s1, s3, 24
; GCN-NEXT: s_lshl_b32 s1, s1, 24
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
%vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr
%element = extractelement <8 x i8> %vector, i32 0 %element = extractelement <8 x i8> %vector, i32 0
ret i8 %element ret i8 %element
} }
define amdgpu_ps i8 @extractelement_sgpr_v8i8_idx1(<8 x i8> addrspace(4)* inreg %ptr) { define amdgpu_ps i8 @extractelement_sgpr_v8i8_idx1(<8 x i8> addrspace(4)* inreg %ptr) {
; GCN-LABEL: extractelement_sgpr_v8i8_idx1: ; GCN-LABEL: extractelement_sgpr_v8i8_idx1:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GCN-NEXT: s_movk_i32 s4, 0xff ; GCN-NEXT: s_movk_i32 s4, 0xff
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_lshr_b32 s1, s0, 8 ; GCN-NEXT: s_lshr_b32 s1, s0, 8
; GCN-NEXT: s_and_b32 s1, s1, s4 ; GCN-NEXT: s_and_b32 s1, s1, s4
; GCN-NEXT: s_lshr_b32 s2, s0, 16 ; GCN-NEXT: s_lshr_b32 s2, s0, 16
; GCN-NEXT: s_lshr_b32 s3, s0, 24 ; GCN-NEXT: s_lshr_b32 s3, s0, 24
; GCN-NEXT: s_and_b32 s0, s0, s4 ; GCN-NEXT: s_and_b32 s0, s0, s4
; GCN-NEXT: s_lshl_b32 s1, s1, 8 ; GCN-NEXT: s_lshl_b32 s1, s1, 8
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_and_b32 s1, s2, s4 ; GCN-NEXT: s_and_b32 s1, s2, s4
; GCN-NEXT: s_lshl_b32 s1, s1, 16 ; GCN-NEXT: s_lshl_b32 s1, s1, 16
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_and_b32 s1, s3, s4 ; GCN-NEXT: s_lshl_b32 s1, s3, 24
; GCN-NEXT: s_lshl_b32 s1, s1, 24
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_lshr_b32 s0, s0, 8 ; GCN-NEXT: s_lshr_b32 s0, s0, 8
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
%vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr
%element = extractelement <8 x i8> %vector, i32 1 %element = extractelement <8 x i8> %vector, i32 1
ret i8 %element ret i8 %element
} }
define amdgpu_ps i8 @extractelement_sgpr_v8i8_idx2(<8 x i8> addrspace(4)* inreg %ptr) { define amdgpu_ps i8 @extractelement_sgpr_v8i8_idx2(<8 x i8> addrspace(4)* inreg %ptr) {
; GCN-LABEL: extractelement_sgpr_v8i8_idx2: ; GCN-LABEL: extractelement_sgpr_v8i8_idx2:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GCN-NEXT: s_movk_i32 s4, 0xff ; GCN-NEXT: s_movk_i32 s4, 0xff
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_lshr_b32 s1, s0, 8 ; GCN-NEXT: s_lshr_b32 s1, s0, 8
; GCN-NEXT: s_and_b32 s1, s1, s4 ; GCN-NEXT: s_and_b32 s1, s1, s4
; GCN-NEXT: s_lshr_b32 s2, s0, 16 ; GCN-NEXT: s_lshr_b32 s2, s0, 16
; GCN-NEXT: s_lshr_b32 s3, s0, 24 ; GCN-NEXT: s_lshr_b32 s3, s0, 24
; GCN-NEXT: s_and_b32 s0, s0, s4 ; GCN-NEXT: s_and_b32 s0, s0, s4
; GCN-NEXT: s_lshl_b32 s1, s1, 8 ; GCN-NEXT: s_lshl_b32 s1, s1, 8
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_and_b32 s1, s2, s4 ; GCN-NEXT: s_and_b32 s1, s2, s4
; GCN-NEXT: s_lshl_b32 s1, s1, 16 ; GCN-NEXT: s_lshl_b32 s1, s1, 16
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_and_b32 s1, s3, s4 ; GCN-NEXT: s_lshl_b32 s1, s3, 24
; GCN-NEXT: s_lshl_b32 s1, s1, 24
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_lshr_b32 s0, s0, 16 ; GCN-NEXT: s_lshr_b32 s0, s0, 16
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
%vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr
%element = extractelement <8 x i8> %vector, i32 2 %element = extractelement <8 x i8> %vector, i32 2
ret i8 %element ret i8 %element
} }
define amdgpu_ps i8 @extractelement_sgpr_v8i8_idx3(<8 x i8> addrspace(4)* inreg %ptr) { define amdgpu_ps i8 @extractelement_sgpr_v8i8_idx3(<8 x i8> addrspace(4)* inreg %ptr) {
; GCN-LABEL: extractelement_sgpr_v8i8_idx3: ; GCN-LABEL: extractelement_sgpr_v8i8_idx3:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GCN-NEXT: s_movk_i32 s4, 0xff ; GCN-NEXT: s_movk_i32 s4, 0xff
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_lshr_b32 s1, s0, 8 ; GCN-NEXT: s_lshr_b32 s1, s0, 8
; GCN-NEXT: s_and_b32 s1, s1, s4 ; GCN-NEXT: s_and_b32 s1, s1, s4
; GCN-NEXT: s_lshr_b32 s2, s0, 16 ; GCN-NEXT: s_lshr_b32 s2, s0, 16
; GCN-NEXT: s_lshr_b32 s3, s0, 24 ; GCN-NEXT: s_lshr_b32 s3, s0, 24
; GCN-NEXT: s_and_b32 s0, s0, s4 ; GCN-NEXT: s_and_b32 s0, s0, s4
; GCN-NEXT: s_lshl_b32 s1, s1, 8 ; GCN-NEXT: s_lshl_b32 s1, s1, 8
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_and_b32 s1, s2, s4 ; GCN-NEXT: s_and_b32 s1, s2, s4
; GCN-NEXT: s_lshl_b32 s1, s1, 16 ; GCN-NEXT: s_lshl_b32 s1, s1, 16
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_and_b32 s1, s3, s4 ; GCN-NEXT: s_lshl_b32 s1, s3, 24
; GCN-NEXT: s_lshl_b32 s1, s1, 24
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_lshr_b32 s0, s0, 24 ; GCN-NEXT: s_lshr_b32 s0, s0, 24
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
%vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr
%element = extractelement <8 x i8> %vector, i32 3 %element = extractelement <8 x i8> %vector, i32 3
ret i8 %element ret i8 %element
} }
define amdgpu_ps i8 @extractelement_sgpr_v8i8_idx4(<8 x i8> addrspace(4)* inreg %ptr) { define amdgpu_ps i8 @extractelement_sgpr_v8i8_idx4(<8 x i8> addrspace(4)* inreg %ptr) {
; GCN-LABEL: extractelement_sgpr_v8i8_idx4: ; GCN-LABEL: extractelement_sgpr_v8i8_idx4:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GCN-NEXT: s_movk_i32 s4, 0xff ; GCN-NEXT: s_movk_i32 s4, 0xff
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_lshr_b32 s0, s1, 8 ; GCN-NEXT: s_lshr_b32 s0, s1, 8
; GCN-NEXT: s_and_b32 s0, s0, s4 ; GCN-NEXT: s_and_b32 s0, s0, s4
; GCN-NEXT: s_lshr_b32 s2, s1, 16 ; GCN-NEXT: s_lshr_b32 s2, s1, 16
; GCN-NEXT: s_lshr_b32 s3, s1, 24 ; GCN-NEXT: s_lshr_b32 s3, s1, 24
; GCN-NEXT: s_and_b32 s1, s1, s4 ; GCN-NEXT: s_and_b32 s1, s1, s4
; GCN-NEXT: s_lshl_b32 s0, s0, 8 ; GCN-NEXT: s_lshl_b32 s0, s0, 8
; GCN-NEXT: s_or_b32 s0, s1, s0 ; GCN-NEXT: s_or_b32 s0, s1, s0
; GCN-NEXT: s_and_b32 s1, s2, s4 ; GCN-NEXT: s_and_b32 s1, s2, s4
; GCN-NEXT: s_lshl_b32 s1, s1, 16 ; GCN-NEXT: s_lshl_b32 s1, s1, 16
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_and_b32 s1, s3, s4 ; GCN-NEXT: s_lshl_b32 s1, s3, 24
; GCN-NEXT: s_lshl_b32 s1, s1, 24
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
%vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr
%element = extractelement <8 x i8> %vector, i32 4 %element = extractelement <8 x i8> %vector, i32 4
ret i8 %element ret i8 %element
} }
define amdgpu_ps i8 @extractelement_sgpr_v8i8_idx5(<8 x i8> addrspace(4)* inreg %ptr) { define amdgpu_ps i8 @extractelement_sgpr_v8i8_idx5(<8 x i8> addrspace(4)* inreg %ptr) {
; GCN-LABEL: extractelement_sgpr_v8i8_idx5: ; GCN-LABEL: extractelement_sgpr_v8i8_idx5:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GCN-NEXT: s_movk_i32 s4, 0xff ; GCN-NEXT: s_movk_i32 s4, 0xff
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_lshr_b32 s0, s1, 8 ; GCN-NEXT: s_lshr_b32 s0, s1, 8
; GCN-NEXT: s_and_b32 s0, s0, s4 ; GCN-NEXT: s_and_b32 s0, s0, s4
; GCN-NEXT: s_lshr_b32 s2, s1, 16 ; GCN-NEXT: s_lshr_b32 s2, s1, 16
; GCN-NEXT: s_lshr_b32 s3, s1, 24 ; GCN-NEXT: s_lshr_b32 s3, s1, 24
; GCN-NEXT: s_and_b32 s1, s1, s4 ; GCN-NEXT: s_and_b32 s1, s1, s4
; GCN-NEXT: s_lshl_b32 s0, s0, 8 ; GCN-NEXT: s_lshl_b32 s0, s0, 8
; GCN-NEXT: s_or_b32 s0, s1, s0 ; GCN-NEXT: s_or_b32 s0, s1, s0
; GCN-NEXT: s_and_b32 s1, s2, s4 ; GCN-NEXT: s_and_b32 s1, s2, s4
; GCN-NEXT: s_lshl_b32 s1, s1, 16 ; GCN-NEXT: s_lshl_b32 s1, s1, 16
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_and_b32 s1, s3, s4 ; GCN-NEXT: s_lshl_b32 s1, s3, 24
; GCN-NEXT: s_lshl_b32 s1, s1, 24
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_lshr_b32 s0, s0, 8 ; GCN-NEXT: s_lshr_b32 s0, s0, 8
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
%vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr
%element = extractelement <8 x i8> %vector, i32 5 %element = extractelement <8 x i8> %vector, i32 5
ret i8 %element ret i8 %element
} }
define amdgpu_ps i8 @extractelement_sgpr_v8i8_idx6(<8 x i8> addrspace(4)* inreg %ptr) { define amdgpu_ps i8 @extractelement_sgpr_v8i8_idx6(<8 x i8> addrspace(4)* inreg %ptr) {
; GCN-LABEL: extractelement_sgpr_v8i8_idx6: ; GCN-LABEL: extractelement_sgpr_v8i8_idx6:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GCN-NEXT: s_movk_i32 s4, 0xff ; GCN-NEXT: s_movk_i32 s4, 0xff
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_lshr_b32 s0, s1, 8 ; GCN-NEXT: s_lshr_b32 s0, s1, 8
; GCN-NEXT: s_and_b32 s0, s0, s4 ; GCN-NEXT: s_and_b32 s0, s0, s4
; GCN-NEXT: s_lshr_b32 s2, s1, 16 ; GCN-NEXT: s_lshr_b32 s2, s1, 16
; GCN-NEXT: s_lshr_b32 s3, s1, 24 ; GCN-NEXT: s_lshr_b32 s3, s1, 24
; GCN-NEXT: s_and_b32 s1, s1, s4 ; GCN-NEXT: s_and_b32 s1, s1, s4
; GCN-NEXT: s_lshl_b32 s0, s0, 8 ; GCN-NEXT: s_lshl_b32 s0, s0, 8
; GCN-NEXT: s_or_b32 s0, s1, s0 ; GCN-NEXT: s_or_b32 s0, s1, s0
; GCN-NEXT: s_and_b32 s1, s2, s4 ; GCN-NEXT: s_and_b32 s1, s2, s4
; GCN-NEXT: s_lshl_b32 s1, s1, 16 ; GCN-NEXT: s_lshl_b32 s1, s1, 16
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_and_b32 s1, s3, s4 ; GCN-NEXT: s_lshl_b32 s1, s3, 24
; GCN-NEXT: s_lshl_b32 s1, s1, 24
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_lshr_b32 s0, s0, 16 ; GCN-NEXT: s_lshr_b32 s0, s0, 16
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
%vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr
%element = extractelement <8 x i8> %vector, i32 6 %element = extractelement <8 x i8> %vector, i32 6
ret i8 %element ret i8 %element
} }
define amdgpu_ps i8 @extractelement_sgpr_v8i8_idx7(<8 x i8> addrspace(4)* inreg %ptr) { define amdgpu_ps i8 @extractelement_sgpr_v8i8_idx7(<8 x i8> addrspace(4)* inreg %ptr) {
; GCN-LABEL: extractelement_sgpr_v8i8_idx7: ; GCN-LABEL: extractelement_sgpr_v8i8_idx7:
; GCN: ; %bb.0: ; GCN: ; %bb.0:
; GCN-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GCN-NEXT: s_movk_i32 s4, 0xff ; GCN-NEXT: s_movk_i32 s4, 0xff
; GCN-NEXT: s_waitcnt lgkmcnt(0) ; GCN-NEXT: s_waitcnt lgkmcnt(0)
; GCN-NEXT: s_lshr_b32 s0, s1, 8 ; GCN-NEXT: s_lshr_b32 s0, s1, 8
; GCN-NEXT: s_and_b32 s0, s0, s4 ; GCN-NEXT: s_and_b32 s0, s0, s4
; GCN-NEXT: s_lshr_b32 s2, s1, 16 ; GCN-NEXT: s_lshr_b32 s2, s1, 16
; GCN-NEXT: s_lshr_b32 s3, s1, 24 ; GCN-NEXT: s_lshr_b32 s3, s1, 24
; GCN-NEXT: s_and_b32 s1, s1, s4 ; GCN-NEXT: s_and_b32 s1, s1, s4
; GCN-NEXT: s_lshl_b32 s0, s0, 8 ; GCN-NEXT: s_lshl_b32 s0, s0, 8
; GCN-NEXT: s_or_b32 s0, s1, s0 ; GCN-NEXT: s_or_b32 s0, s1, s0
; GCN-NEXT: s_and_b32 s1, s2, s4 ; GCN-NEXT: s_and_b32 s1, s2, s4
; GCN-NEXT: s_lshl_b32 s1, s1, 16 ; GCN-NEXT: s_lshl_b32 s1, s1, 16
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_and_b32 s1, s3, s4 ; GCN-NEXT: s_lshl_b32 s1, s3, 24
; GCN-NEXT: s_lshl_b32 s1, s1, 24
; GCN-NEXT: s_or_b32 s0, s0, s1 ; GCN-NEXT: s_or_b32 s0, s0, s1
; GCN-NEXT: s_lshr_b32 s0, s0, 24 ; GCN-NEXT: s_lshr_b32 s0, s0, 24
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
%vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(4)* %ptr
%element = extractelement <8 x i8> %vector, i32 7 %element = extractelement <8 x i8> %vector, i32 7
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v8i8_idx0(<8 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v8i8_idx0(<8 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v8i8_idx0: ; GFX9-LABEL: extractelement_vgpr_v8i8_idx0:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v0, s5, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v1
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v1, v2, v0 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v8i8_idx0: ; GFX8-LABEL: extractelement_vgpr_v8i8_idx0:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v8i8_idx0: ; GFX7-LABEL: extractelement_vgpr_v8i8_idx0:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr
%element = extractelement <8 x i8> %vector, i32 0 %element = extractelement <8 x i8> %vector, i32 0
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v8i8_idx1(<8 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v8i8_idx1(<8 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v8i8_idx1: ; GFX9-LABEL: extractelement_vgpr_v8i8_idx1:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v0, s5, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v1
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v1, v2, v0 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v8i8_idx1: ; GFX8-LABEL: extractelement_vgpr_v8i8_idx1:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v8i8_idx1: ; GFX7-LABEL: extractelement_vgpr_v8i8_idx1:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr
%element = extractelement <8 x i8> %vector, i32 1 %element = extractelement <8 x i8> %vector, i32 1
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v8i8_idx2(<8 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v8i8_idx2(<8 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v8i8_idx2: ; GFX9-LABEL: extractelement_vgpr_v8i8_idx2:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v0, s5, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v1
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v1, v2, v0 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v8i8_idx2: ; GFX8-LABEL: extractelement_vgpr_v8i8_idx2:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v8i8_idx2: ; GFX7-LABEL: extractelement_vgpr_v8i8_idx2:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr
%element = extractelement <8 x i8> %vector, i32 2 %element = extractelement <8 x i8> %vector, i32 2
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v8i8_idx3(<8 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v8i8_idx3(<8 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v8i8_idx3: ; GFX9-LABEL: extractelement_vgpr_v8i8_idx3:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v0, s5, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v1
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v1, v2, v0 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v8i8_idx3: ; GFX8-LABEL: extractelement_vgpr_v8i8_idx3:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v8i8_idx3: ; GFX7-LABEL: extractelement_vgpr_v8i8_idx3:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr
%element = extractelement <8 x i8> %vector, i32 3 %element = extractelement <8 x i8> %vector, i32 3
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v8i8_idx4(<8 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v8i8_idx4(<8 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v8i8_idx4: ; GFX9-LABEL: extractelement_vgpr_v8i8_idx4:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v1
; GFX9-NEXT: v_and_b32_sdwa v3, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v0, v2, v1 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v8i8_idx4: ; GFX8-LABEL: extractelement_vgpr_v8i8_idx4:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v2, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v8i8_idx4: ; GFX7-LABEL: extractelement_vgpr_v8i8_idx4:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v1, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr
%element = extractelement <8 x i8> %vector, i32 4 %element = extractelement <8 x i8> %vector, i32 4
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v8i8_idx5(<8 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v8i8_idx5(<8 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v8i8_idx5: ; GFX9-LABEL: extractelement_vgpr_v8i8_idx5:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v1
; GFX9-NEXT: v_and_b32_sdwa v3, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v0, v2, v1 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v8i8_idx5: ; GFX8-LABEL: extractelement_vgpr_v8i8_idx5:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v2, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v8i8_idx5: ; GFX7-LABEL: extractelement_vgpr_v8i8_idx5:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v1, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr
%element = extractelement <8 x i8> %vector, i32 5 %element = extractelement <8 x i8> %vector, i32 5
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v8i8_idx6(<8 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v8i8_idx6(<8 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v8i8_idx6: ; GFX9-LABEL: extractelement_vgpr_v8i8_idx6:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v1
; GFX9-NEXT: v_and_b32_sdwa v3, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v0, v2, v1 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v8i8_idx6: ; GFX8-LABEL: extractelement_vgpr_v8i8_idx6:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v2, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v8i8_idx6: ; GFX7-LABEL: extractelement_vgpr_v8i8_idx6:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v1, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr
%element = extractelement <8 x i8> %vector, i32 6 %element = extractelement <8 x i8> %vector, i32 6
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v8i8_idx7(<8 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v8i8_idx7(<8 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v8i8_idx7: ; GFX9-LABEL: extractelement_vgpr_v8i8_idx7:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v1
; GFX9-NEXT: v_and_b32_sdwa v3, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v0, v2, v1 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v8i8_idx7: ; GFX8-LABEL: extractelement_vgpr_v8i8_idx7:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v2, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v8i8_idx7: ; GFX7-LABEL: extractelement_vgpr_v8i8_idx7:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx2 v[0:1], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v1, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr %vector = load <8 x i8>, <8 x i8> addrspace(1)* %ptr
Show All 12 Lines
; GCN-NEXT: s_lshr_b32 s6, s0, 16 ; GCN-NEXT: s_lshr_b32 s6, s0, 16
; GCN-NEXT: s_lshr_b32 s7, s0, 24 ; GCN-NEXT: s_lshr_b32 s7, s0, 24
; GCN-NEXT: s_and_b32 s0, s0, s17 ; GCN-NEXT: s_and_b32 s0, s0, s17
; GCN-NEXT: s_lshl_b32 s5, s5, 8 ; GCN-NEXT: s_lshl_b32 s5, s5, 8
; GCN-NEXT: s_or_b32 s0, s0, s5 ; GCN-NEXT: s_or_b32 s0, s0, s5
; GCN-NEXT: s_and_b32 s5, s6, s17 ; GCN-NEXT: s_and_b32 s5, s6, s17
; GCN-NEXT: s_lshl_b32 s5, s5, 16 ; GCN-NEXT: s_lshl_b32 s5, s5, 16
; GCN-NEXT: s_or_b32 s0, s0, s5 ; GCN-NEXT: s_or_b32 s0, s0, s5
; GCN-NEXT: s_and_b32 s5, s7, s17 ; GCN-NEXT: s_lshl_b32 s5, s7, 24
; GCN-NEXT: s_lshl_b32 s5, s5, 24
; GCN-NEXT: s_lshr_b32 s8, s1, 8 ; GCN-NEXT: s_lshr_b32 s8, s1, 8
; GCN-NEXT: s_or_b32 s0, s0, s5 ; GCN-NEXT: s_or_b32 s0, s0, s5
; GCN-NEXT: s_and_b32 s5, s8, s17 ; GCN-NEXT: s_and_b32 s5, s8, s17
; GCN-NEXT: s_lshr_b32 s9, s1, 16 ; GCN-NEXT: s_lshr_b32 s9, s1, 16
; GCN-NEXT: s_lshr_b32 s10, s1, 24 ; GCN-NEXT: s_lshr_b32 s10, s1, 24
; GCN-NEXT: s_and_b32 s1, s1, s17 ; GCN-NEXT: s_and_b32 s1, s1, s17
; GCN-NEXT: s_lshl_b32 s5, s5, 8 ; GCN-NEXT: s_lshl_b32 s5, s5, 8
; GCN-NEXT: s_or_b32 s1, s1, s5 ; GCN-NEXT: s_or_b32 s1, s1, s5
; GCN-NEXT: s_and_b32 s5, s9, s17 ; GCN-NEXT: s_and_b32 s5, s9, s17
; GCN-NEXT: s_lshl_b32 s5, s5, 16 ; GCN-NEXT: s_lshl_b32 s5, s5, 16
; GCN-NEXT: s_or_b32 s1, s1, s5 ; GCN-NEXT: s_or_b32 s1, s1, s5
; GCN-NEXT: s_and_b32 s5, s10, s17 ; GCN-NEXT: s_lshl_b32 s5, s10, 24
; GCN-NEXT: s_lshl_b32 s5, s5, 24
; GCN-NEXT: s_lshr_b32 s11, s2, 8 ; GCN-NEXT: s_lshr_b32 s11, s2, 8
; GCN-NEXT: s_or_b32 s1, s1, s5 ; GCN-NEXT: s_or_b32 s1, s1, s5
; GCN-NEXT: s_and_b32 s5, s11, s17 ; GCN-NEXT: s_and_b32 s5, s11, s17
; GCN-NEXT: s_lshr_b32 s12, s2, 16 ; GCN-NEXT: s_lshr_b32 s12, s2, 16
; GCN-NEXT: s_lshr_b32 s13, s2, 24 ; GCN-NEXT: s_lshr_b32 s13, s2, 24
; GCN-NEXT: s_and_b32 s2, s2, s17 ; GCN-NEXT: s_and_b32 s2, s2, s17
; GCN-NEXT: s_lshl_b32 s5, s5, 8 ; GCN-NEXT: s_lshl_b32 s5, s5, 8
; GCN-NEXT: s_or_b32 s2, s2, s5 ; GCN-NEXT: s_or_b32 s2, s2, s5
; GCN-NEXT: s_and_b32 s5, s12, s17 ; GCN-NEXT: s_and_b32 s5, s12, s17
; GCN-NEXT: s_lshl_b32 s5, s5, 16 ; GCN-NEXT: s_lshl_b32 s5, s5, 16
; GCN-NEXT: s_or_b32 s2, s2, s5 ; GCN-NEXT: s_or_b32 s2, s2, s5
; GCN-NEXT: s_and_b32 s5, s13, s17 ; GCN-NEXT: s_lshl_b32 s5, s13, 24
; GCN-NEXT: s_lshl_b32 s5, s5, 24
; GCN-NEXT: s_lshr_b32 s14, s3, 8 ; GCN-NEXT: s_lshr_b32 s14, s3, 8
; GCN-NEXT: s_or_b32 s2, s2, s5 ; GCN-NEXT: s_or_b32 s2, s2, s5
; GCN-NEXT: s_and_b32 s5, s14, s17 ; GCN-NEXT: s_and_b32 s5, s14, s17
; GCN-NEXT: s_lshr_b32 s15, s3, 16 ; GCN-NEXT: s_lshr_b32 s15, s3, 16
; GCN-NEXT: s_lshr_b32 s16, s3, 24 ; GCN-NEXT: s_lshr_b32 s16, s3, 24
; GCN-NEXT: s_and_b32 s3, s3, s17 ; GCN-NEXT: s_and_b32 s3, s3, s17
; GCN-NEXT: s_lshl_b32 s5, s5, 8 ; GCN-NEXT: s_lshl_b32 s5, s5, 8
; GCN-NEXT: s_or_b32 s3, s3, s5 ; GCN-NEXT: s_or_b32 s3, s3, s5
; GCN-NEXT: s_and_b32 s5, s15, s17 ; GCN-NEXT: s_and_b32 s5, s15, s17
; GCN-NEXT: s_lshl_b32 s5, s5, 16 ; GCN-NEXT: s_lshl_b32 s5, s5, 16
; GCN-NEXT: s_or_b32 s3, s3, s5 ; GCN-NEXT: s_or_b32 s3, s3, s5
; GCN-NEXT: s_and_b32 s5, s16, s17 ; GCN-NEXT: s_lshl_b32 s5, s16, 24
; GCN-NEXT: s_lshl_b32 s5, s5, 24
; GCN-NEXT: s_or_b32 s3, s3, s5 ; GCN-NEXT: s_or_b32 s3, s3, s5
; GCN-NEXT: s_lshr_b32 s5, s4, 2 ; GCN-NEXT: s_lshr_b32 s5, s4, 2
; GCN-NEXT: s_cmp_eq_u32 s5, 1 ; GCN-NEXT: s_cmp_eq_u32 s5, 1
; GCN-NEXT: s_cselect_b32 s0, s1, s0 ; GCN-NEXT: s_cselect_b32 s0, s1, s0
; GCN-NEXT: s_cmp_eq_u32 s5, 2 ; GCN-NEXT: s_cmp_eq_u32 s5, 2
; GCN-NEXT: s_cselect_b32 s0, s2, s0 ; GCN-NEXT: s_cselect_b32 s0, s2, s0
; GCN-NEXT: s_cmp_eq_u32 s5, 3 ; GCN-NEXT: s_cmp_eq_u32 s5, 3
; GCN-NEXT: s_cselect_b32 s0, s3, s0 ; GCN-NEXT: s_cselect_b32 s0, s3, s0
; GCN-NEXT: s_and_b32 s1, s4, 3 ; GCN-NEXT: s_and_b32 s1, s4, 3
; GCN-NEXT: s_lshl_b32 s1, s1, 3 ; GCN-NEXT: s_lshl_b32 s1, s1, 3
; GCN-NEXT: s_lshr_b32 s0, s0, s1 ; GCN-NEXT: s_lshr_b32 s0, s0, s1
; GCN-NEXT: ; return to shader part epilog ; GCN-NEXT: ; return to shader part epilog
%vector = load <16 x i8>, <16 x i8> addrspace(4)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(4)* %ptr
%element = extractelement <16 x i8> %vector, i32 %idx %element = extractelement <16 x i8> %vector, i32 %idx
ret i8 %element ret i8 %element
} }
define amdgpu_ps i8 @extractelement_vgpr_v16i8_sgpr_idx(<16 x i8> addrspace(1)* %ptr, i32 inreg %idx) { define amdgpu_ps i8 @extractelement_vgpr_v16i8_sgpr_idx(<16 x i8> addrspace(1)* %ptr, i32 inreg %idx) {
; GFX9-LABEL: extractelement_vgpr_v16i8_sgpr_idx: ; GFX9-LABEL: extractelement_vgpr_v16i8_sgpr_idx:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s0, 8 ; GFX9-NEXT: s_mov_b32 s0, 8
; GFX9-NEXT: v_mov_b32_e32 v5, 8 ; GFX9-NEXT: v_mov_b32_e32 v5, 8
; GFX9-NEXT: s_movk_i32 s1, 0xff ; GFX9-NEXT: s_movk_i32 s1, 0xff
; GFX9-NEXT: v_mov_b32_e32 v4, 0xff
; GFX9-NEXT: s_lshr_b32 s3, s2, 2 ; GFX9-NEXT: s_lshr_b32 s3, s2, 2
; GFX9-NEXT: v_mov_b32_e32 v4, 0xff
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s3, 1 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s3, 1
; GFX9-NEXT: s_and_b32 s2, s2, 3 ; GFX9-NEXT: s_and_b32 s2, s2, 3
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v2
; GFX9-NEXT: v_lshlrev_b32_sdwa v6, s0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v6, s0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v7, v5, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v8, v5, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v8, v5, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v10, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v11, 24, v2
; GFX9-NEXT: v_and_b32_sdwa v11, v0, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v14, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v15, v1, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 8, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v10, v5, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v6 ; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v6
; GFX9-NEXT: v_and_b32_sdwa v12, v1, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; GFX9-NEXT: v_and_b32_sdwa v13, v1, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_or_b32 v1, v1, s1, v8
; GFX9-NEXT: v_and_or_b32 v1, v1, s1, v7 ; GFX9-NEXT: v_and_b32_sdwa v16, v2, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v14, v2, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v13, 24, v3
; GFX9-NEXT: v_and_b32_sdwa v15, v2, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v5, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_or_b32 v2, v2, s1, v8 ; GFX9-NEXT: v_lshlrev_b32_e32 v11, 24, v11
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v5, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_and_or_b32 v2, v2, s1, v10
; GFX9-NEXT: v_or3_b32 v0, v0, v10, v11 ; GFX9-NEXT: v_or3_b32 v0, v0, v14, v7
; GFX9-NEXT: v_or3_b32 v1, v1, v12, v13 ; GFX9-NEXT: v_or3_b32 v1, v1, v15, v9
; GFX9-NEXT: v_and_b32_sdwa v17, v3, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
; GFX9-NEXT: v_and_b32_sdwa v16, v3, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v12, 24, v13
; GFX9-NEXT: v_and_b32_sdwa v17, v3, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v3, v3, v4, v5 ; GFX9-NEXT: v_and_or_b32 v3, v3, v4, v5
; GFX9-NEXT: v_or3_b32 v2, v2, v14, v15 ; GFX9-NEXT: v_or3_b32 v2, v2, v16, v11
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s3, 2 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s3, 2
; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
; GFX9-NEXT: v_or3_b32 v3, v3, v16, v17 ; GFX9-NEXT: v_or3_b32 v3, v3, v17, v12
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s3, 3 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s3, 3
; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
; GFX9-NEXT: s_lshl_b32 s0, s2, 3 ; GFX9-NEXT: s_lshl_b32 s0, s2, 3
; GFX9-NEXT: v_lshrrev_b32_e32 v0, s0, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, s0, v0
; GFX9-NEXT: v_readfirstlane_b32 s0, v0 ; GFX9-NEXT: v_readfirstlane_b32 s0, v0
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_sgpr_idx: ; GFX8-LABEL: extractelement_vgpr_v16i8_sgpr_idx:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_mov_b32_e32 v5, 8 ; GFX8-NEXT: v_mov_b32_e32 v5, 8
; GFX8-NEXT: v_mov_b32_e32 v6, 8 ; GFX8-NEXT: v_mov_b32_e32 v6, 8
; GFX8-NEXT: v_mov_b32_e32 v7, s0 ; GFX8-NEXT: v_mov_b32_e32 v7, s0
; GFX8-NEXT: v_mov_b32_e32 v4, 0xff ; GFX8-NEXT: v_mov_b32_e32 v4, 0xff
; GFX8-NEXT: s_lshr_b32 s0, s2, 2 ; GFX8-NEXT: s_lshr_b32 s0, s2, 2
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s0, 1 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s0, 1
; GFX8-NEXT: s_and_b32 s1, s2, 3 ; GFX8-NEXT: s_and_b32 s1, s2, 3
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v5, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v5, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v2 ; GFX8-NEXT: v_lshlrev_b32_e32 v8, 24, v9
; GFX8-NEXT: v_lshlrev_b32_sdwa v8, v6, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshrrev_b32_e32 v11, 24, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v11, 8, v3
; GFX8-NEXT: v_lshlrev_b32_sdwa v9, v6, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v9, v6, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v12, v0, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v12, 8, v2
; GFX8-NEXT: v_and_b32_sdwa v13, v0, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v16, v0, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v14, v1, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v7, v1, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v7, v1, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v1, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v1, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v10, 24, v11
; GFX8-NEXT: v_or_b32_e32 v0, v0, v12 ; GFX8-NEXT: v_lshrrev_b32_e32 v14, 8, v3
; GFX8-NEXT: v_or_b32_e32 v1, v1, v14 ; GFX8-NEXT: v_lshlrev_b32_sdwa v11, v6, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v15, v2, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v16
; GFX8-NEXT: v_and_b32_sdwa v16, v2, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v2, v2, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v6, v6, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_or_b32_e32 v2, v2, v15
; GFX8-NEXT: v_and_b32_sdwa v17, v3, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v4, v3, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v3, v3, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v13
; GFX8-NEXT: v_or_b32_e32 v1, v1, v7 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v7
; GFX8-NEXT: v_or_b32_e32 v3, v3, v17 ; GFX8-NEXT: v_lshrrev_b32_e32 v13, 24, v2
; GFX8-NEXT: v_and_b32_sdwa v17, v2, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v2, v2, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v6, v6, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v15, 24, v3
; GFX8-NEXT: v_and_b32_sdwa v4, v3, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v3, v3, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_e32 v12, 24, v13
; GFX8-NEXT: v_or_b32_e32 v2, v2, v17
; GFX8-NEXT: v_or_b32_e32 v0, v0, v8
; GFX8-NEXT: v_or_b32_e32 v1, v1, v10
; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
; GFX8-NEXT: v_or_b32_e32 v2, v2, v16 ; GFX8-NEXT: v_lshlrev_b32_e32 v13, 24, v15
; GFX8-NEXT: v_or_b32_e32 v3, v3, v4
; GFX8-NEXT: v_or_b32_e32 v2, v2, v12
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s0, 2 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s0, 2
; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s0, 3 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s0, 3
; GFX8-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX8-NEXT: v_or_b32_e32 v3, v3, v13
; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
; GFX8-NEXT: s_lshl_b32 s0, s1, 3 ; GFX8-NEXT: s_lshl_b32 s0, s1, 3
; GFX8-NEXT: v_lshrrev_b32_e32 v0, s0, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, s0, v0
; GFX8-NEXT: v_readfirstlane_b32 s0, v0 ; GFX8-NEXT: v_readfirstlane_b32 s0, v0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_sgpr_idx: ; GFX7-LABEL: extractelement_vgpr_v16i8_sgpr_idx:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
Show All 15 Lines
; GFX7-NEXT: v_and_b32_e32 v5, s0, v5 ; GFX7-NEXT: v_and_b32_e32 v5, s0, v5
; GFX7-NEXT: v_and_b32_e32 v8, s0, v8 ; GFX7-NEXT: v_and_b32_e32 v8, s0, v8
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v10, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v10, 24, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v12, 16, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v12, 16, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v14, 8, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v14, 8, v3
; GFX7-NEXT: v_and_b32_e32 v6, s0, v6 ; GFX7-NEXT: v_and_b32_e32 v6, s0, v6
; GFX7-NEXT: v_and_b32_e32 v9, s0, v9 ; GFX7-NEXT: v_and_b32_e32 v9, s0, v9
; GFX7-NEXT: v_and_b32_e32 v11, v11, v4 ; GFX7-NEXT: v_and_b32_e32 v11, s0, v11
; GFX7-NEXT: v_and_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s0, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 8, v5 ; GFX7-NEXT: v_lshlrev_b32_e32 v5, 8, v5
; GFX7-NEXT: v_and_b32_e32 v1, s0, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v8, 8, v8 ; GFX7-NEXT: v_lshlrev_b32_e32 v8, 8, v8
; GFX7-NEXT: v_lshrrev_b32_e32 v13, 24, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v13, 24, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v15, 16, v3
; GFX7-NEXT: v_and_b32_e32 v7, s0, v7
; GFX7-NEXT: v_and_b32_e32 v10, s0, v10
; GFX7-NEXT: v_and_b32_e32 v12, v12, v4 ; GFX7-NEXT: v_and_b32_e32 v12, v12, v4
; GFX7-NEXT: v_and_b32_e32 v14, v14, v4 ; GFX7-NEXT: v_and_b32_e32 v14, v14, v4
; GFX7-NEXT: v_and_b32_e32 v2, s0, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v11, 8, v11 ; GFX7-NEXT: v_lshlrev_b32_e32 v11, 8, v11
; GFX7-NEXT: v_lshrrev_b32_e32 v15, 16, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX7-NEXT: v_or_b32_e32 v0, v0, v5 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX7-NEXT: v_or_b32_e32 v1, v1, v8 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v8
; GFX7-NEXT: v_and_b32_e32 v13, v13, v4
; GFX7-NEXT: v_and_b32_e32 v15, v15, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v16, 24, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v16, 24, v3
; GFX7-NEXT: v_and_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_and_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v4, v15, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v14, 8, v14 ; GFX7-NEXT: v_lshlrev_b32_e32 v14, 8, v14
; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX7-NEXT: v_or_b32_e32 v0, v0, v6 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; GFX7-NEXT: v_lshlrev_b32_e32 v10, 24, v10
; GFX7-NEXT: v_or_b32_e32 v1, v1, v9 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX7-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; GFX7-NEXT: v_or_b32_e32 v2, v2, v11 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v11
; GFX7-NEXT: v_and_b32_e32 v4, v16, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v13, 24, v13 ; GFX7-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; GFX7-NEXT: v_or_b32_e32 v2, v2, v12 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v12
; GFX7-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v3, v3, v14 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v14
; GFX7-NEXT: v_or_b32_e32 v0, v0, v7 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v7
; GFX7-NEXT: v_or_b32_e32 v1, v1, v10 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v10
; GFX7-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v15, 24, v16
; GFX7-NEXT: v_or_b32_e32 v3, v3, v15 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: v_or_b32_e32 v2, v2, v13 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v13
; GFX7-NEXT: v_cmp_eq_u32_e64 vcc, s1, 2 ; GFX7-NEXT: v_cmp_eq_u32_e64 vcc, s1, 2
; GFX7-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v15
; GFX7-NEXT: v_cmp_eq_u32_e64 vcc, s1, 3 ; GFX7-NEXT: v_cmp_eq_u32_e64 vcc, s1, 3
; GFX7-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
; GFX7-NEXT: s_lshl_b32 s0, s2, 3 ; GFX7-NEXT: s_lshl_b32 s0, s2, 3
; GFX7-NEXT: v_lshrrev_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, s0, v0
; GFX7-NEXT: v_readfirstlane_b32 s0, v0 ; GFX7-NEXT: v_readfirstlane_b32 s0, v0
; GFX7-NEXT: ; return to shader part epilog ; GFX7-NEXT: ; return to shader part epilog
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 %idx %element = extractelement <16 x i8> %vector, i32 %idx
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_vgpr_idx(<16 x i8> addrspace(1)* %ptr, i32 %idx) { define i8 @extractelement_vgpr_v16i8_vgpr_idx(<16 x i8> addrspace(1)* %ptr, i32 %idx) {
; GFX9-LABEL: extractelement_vgpr_v16i8_vgpr_idx: ; GFX9-LABEL: extractelement_vgpr_v16i8_vgpr_idx:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[3:6], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[3:6], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: v_mov_b32_e32 v1, 8 ; GFX9-NEXT: v_mov_b32_e32 v1, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: v_mov_b32_e32 v0, 0xff
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 2, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 2, v2
; GFX9-NEXT: v_mov_b32_e32 v0, 0xff
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v7 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v7
; GFX9-NEXT: v_and_b32_e32 v2, 3, v2 ; GFX9-NEXT: v_and_b32_e32 v2, 3, v2
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v4 ; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v5 ; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v6 ; GFX9-NEXT: v_lshrrev_b32_e32 v11, 24, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 8, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v14, 8, v6
; GFX9-NEXT: v_lshlrev_b32_sdwa v8, s4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v8, s4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v9, v1, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v10, v1, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v10, v1, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v12, v3, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v13, 24, v5
; GFX9-NEXT: v_and_b32_sdwa v13, v3, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v16, v3, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v14, v4, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v17, v4, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v15, v4, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_sdwa v12, v1, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, v1, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; GFX9-NEXT: v_lshlrev_b32_e32 v11, 24, v11
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, v1, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_or_b32 v3, v3, s5, v8 ; GFX9-NEXT: v_and_or_b32 v3, v3, s5, v8
; GFX9-NEXT: v_and_or_b32 v4, v4, s5, v9 ; GFX9-NEXT: v_and_or_b32 v4, v4, s5, v10
; GFX9-NEXT: v_and_b32_sdwa v16, v5, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v6
; GFX9-NEXT: v_and_b32_sdwa v17, v5, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v18, v5, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v18, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v19, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v19, v6, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v6, v0, v1 ; GFX9-NEXT: v_and_or_b32 v0, v6, v0, v1
; GFX9-NEXT: v_or3_b32 v1, v3, v12, v13 ; GFX9-NEXT: v_or3_b32 v1, v3, v16, v9
; GFX9-NEXT: v_or3_b32 v3, v4, v14, v15 ; GFX9-NEXT: v_or3_b32 v3, v4, v17, v11
; GFX9-NEXT: v_and_or_b32 v5, v5, s5, v10 ; GFX9-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; GFX9-NEXT: v_and_or_b32 v5, v5, s5, v12
; GFX9-NEXT: v_lshlrev_b32_e32 v14, 24, v15
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; GFX9-NEXT: v_or3_b32 v4, v5, v16, v17 ; GFX9-NEXT: v_or3_b32 v4, v5, v18, v13
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 2, v7 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 2, v7
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX9-NEXT: v_or3_b32 v0, v0, v18, v19 ; GFX9-NEXT: v_or3_b32 v0, v0, v19, v14
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 3, v7 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 3, v7
; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 3, v2 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 3, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v0, v1, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, v1, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_vgpr_idx: ; GFX8-LABEL: extractelement_vgpr_v16i8_vgpr_idx:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[3:6], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[3:6], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v7, 8 ; GFX8-NEXT: v_mov_b32_e32 v7, 8
; GFX8-NEXT: v_mov_b32_e32 v8, s4 ; GFX8-NEXT: v_mov_b32_e32 v8, s4
; GFX8-NEXT: v_mov_b32_e32 v0, 0xff ; GFX8-NEXT: v_mov_b32_e32 v0, 0xff
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 2, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v9, 2, v2
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v9 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v9
; GFX8-NEXT: v_and_b32_e32 v2, 3, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 3, v2
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v3
; GFX8-NEXT: v_lshrrev_b32_e32 v11, 8, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v11, 24, v3
; GFX8-NEXT: v_lshrrev_b32_e32 v12, 8, v4
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v12, 8, v5 ; GFX8-NEXT: v_lshlrev_b32_e32 v10, 24, v11
; GFX8-NEXT: v_lshlrev_b32_sdwa v10, v7, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshrrev_b32_e32 v13, 24, v4
; GFX8-NEXT: v_lshrrev_b32_e32 v13, 8, v6
; GFX8-NEXT: v_lshlrev_b32_sdwa v11, v7, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v11, v7, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v14, v3, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v14, 8, v5
; GFX8-NEXT: v_and_b32_sdwa v18, v3, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v15, v3, v8 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v12, 24, v13
; GFX8-NEXT: v_and_b32_sdwa v16, v4, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v16, 8, v6
; GFX8-NEXT: v_or_b32_sdwa v3, v4, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v13, v7, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_or_b32_e32 v1, v1, v14 ; GFX8-NEXT: v_and_b32_sdwa v8, v4, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v8, v4, v8 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v3, v4, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v3, v3, v16 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v18
; GFX8-NEXT: v_and_b32_sdwa v17, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v4, v5, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v7, v7, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v18, v5, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v4, v4, v17
; GFX8-NEXT: v_and_b32_sdwa v19, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v5, v6, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v15
; GFX8-NEXT: v_or_b32_e32 v3, v3, v8 ; GFX8-NEXT: v_or_b32_e32 v3, v3, v8
; GFX8-NEXT: v_lshrrev_b32_e32 v15, 24, v5
; GFX8-NEXT: v_and_b32_sdwa v19, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v4, v5, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v7, v7, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v17, 24, v6
; GFX8-NEXT: v_lshlrev_b32_e32 v14, 24, v15
; GFX8-NEXT: v_or_b32_e32 v4, v4, v19
; GFX8-NEXT: v_and_b32_sdwa v0, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v5, v6, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v10
; GFX8-NEXT: v_or_b32_e32 v3, v3, v12
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; GFX8-NEXT: v_and_b32_sdwa v0, v6, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v15, 24, v17
; GFX8-NEXT: v_or_b32_e32 v5, v5, v19 ; GFX8-NEXT: v_or_b32_e32 v0, v5, v0
; GFX8-NEXT: v_or_b32_e32 v4, v4, v18 ; GFX8-NEXT: v_or_b32_e32 v4, v4, v14
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 2, v9 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 2, v9
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX8-NEXT: v_or_b32_e32 v0, v5, v0 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v15
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 3, v9 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 3, v9
; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
; GFX8-NEXT: v_lshlrev_b32_e32 v1, 3, v2 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 3, v2
; GFX8-NEXT: v_lshrrev_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, v1, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_vgpr_idx: ; GFX7-LABEL: extractelement_vgpr_v16i8_vgpr_idx:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
Show All 16 Lines
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_and_b32_e32 v9, s4, v9 ; GFX7-NEXT: v_and_b32_e32 v9, s4, v9
; GFX7-NEXT: v_lshrrev_b32_e32 v8, 24, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v8, 24, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v11, 24, v4 ; GFX7-NEXT: v_lshrrev_b32_e32 v11, 24, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v13, 16, v5 ; GFX7-NEXT: v_lshrrev_b32_e32 v13, 16, v5
; GFX7-NEXT: v_lshrrev_b32_e32 v15, 8, v6 ; GFX7-NEXT: v_lshrrev_b32_e32 v15, 8, v6
; GFX7-NEXT: v_and_b32_e32 v7, s4, v7 ; GFX7-NEXT: v_and_b32_e32 v7, s4, v7
; GFX7-NEXT: v_and_b32_e32 v10, s4, v10 ; GFX7-NEXT: v_and_b32_e32 v10, s4, v10
; GFX7-NEXT: v_and_b32_e32 v12, v12, v0 ; GFX7-NEXT: v_and_b32_e32 v12, s4, v12
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v4, s4, v4 ; GFX7-NEXT: v_and_b32_e32 v4, s4, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v9, 8, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v9, 8, v9
; GFX7-NEXT: v_lshrrev_b32_e32 v14, 24, v5 ; GFX7-NEXT: v_lshrrev_b32_e32 v14, 24, v5
; GFX7-NEXT: v_lshrrev_b32_e32 v16, 16, v6
; GFX7-NEXT: v_and_b32_e32 v8, s4, v8
; GFX7-NEXT: v_and_b32_e32 v11, s4, v11
; GFX7-NEXT: v_and_b32_e32 v13, v13, v0 ; GFX7-NEXT: v_and_b32_e32 v13, v13, v0
; GFX7-NEXT: v_and_b32_e32 v15, v15, v0 ; GFX7-NEXT: v_and_b32_e32 v15, v15, v0
; GFX7-NEXT: v_or_b32_e32 v1, v3, v1 ; GFX7-NEXT: v_or_b32_e32 v1, v3, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX7-NEXT: v_lshrrev_b32_e32 v16, 16, v6
; GFX7-NEXT: v_and_b32_e32 v5, s4, v5 ; GFX7-NEXT: v_and_b32_e32 v5, s4, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX7-NEXT: v_or_b32_e32 v3, v4, v9 ; GFX7-NEXT: v_or_b32_e32 v3, v4, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v12, 8, v12 ; GFX7-NEXT: v_lshlrev_b32_e32 v12, 8, v12
; GFX7-NEXT: v_and_b32_e32 v14, v14, v0
; GFX7-NEXT: v_and_b32_e32 v16, v16, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v17, 24, v6 ; GFX7-NEXT: v_lshrrev_b32_e32 v17, 24, v6
; GFX7-NEXT: v_and_b32_e32 v6, v6, v0 ; GFX7-NEXT: v_and_b32_e32 v6, v6, v0
; GFX7-NEXT: v_and_b32_e32 v0, v16, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v8, 24, v8 ; GFX7-NEXT: v_lshlrev_b32_e32 v8, 24, v8
; GFX7-NEXT: v_or_b32_e32 v1, v1, v7 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v7
; GFX7-NEXT: v_lshlrev_b32_e32 v11, 24, v11 ; GFX7-NEXT: v_lshlrev_b32_e32 v11, 24, v11
; GFX7-NEXT: v_or_b32_e32 v3, v3, v10 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v10
; GFX7-NEXT: v_lshlrev_b32_e32 v13, 16, v13 ; GFX7-NEXT: v_lshlrev_b32_e32 v13, 16, v13
; GFX7-NEXT: v_or_b32_e32 v4, v5, v12 ; GFX7-NEXT: v_or_b32_e32 v4, v5, v12
; GFX7-NEXT: v_lshlrev_b32_e32 v15, 8, v15 ; GFX7-NEXT: v_lshlrev_b32_e32 v15, 8, v15
; GFX7-NEXT: v_and_b32_e32 v0, v17, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v14, 24, v14 ; GFX7-NEXT: v_lshlrev_b32_e32 v14, 24, v14
; GFX7-NEXT: v_or_b32_e32 v4, v4, v13 ; GFX7-NEXT: v_or_b32_e32 v4, v4, v13
; GFX7-NEXT: v_lshlrev_b32_e32 v16, 16, v16 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX7-NEXT: v_or_b32_e32 v5, v6, v15 ; GFX7-NEXT: v_or_b32_e32 v5, v6, v15
; GFX7-NEXT: v_or_b32_e32 v1, v1, v8 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v8
; GFX7-NEXT: v_or_b32_e32 v3, v3, v11 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v11
; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 24, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v16, 24, v17
; GFX7-NEXT: v_or_b32_e32 v5, v5, v16 ; GFX7-NEXT: v_or_b32_e32 v0, v5, v0
; GFX7-NEXT: v_or_b32_e32 v4, v4, v14 ; GFX7-NEXT: v_or_b32_e32 v4, v4, v14
; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 2, v18 ; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 2, v18
; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX7-NEXT: v_or_b32_e32 v0, v5, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v16
; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 3, v18 ; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 3, v18
; GFX7-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v0, v1, v0, vcc
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 3, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 3, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, v1, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 %idx %element = extractelement <16 x i8> %vector, i32 %idx
ret i8 %element ret i8 %element
Show All 13 Lines
; GCN-NEXT: s_lshr_b32 s5, s0, 16 ; GCN-NEXT: s_lshr_b32 s5, s0, 16
; GCN-NEXT: s_lshr_b32 s6, s0, 24 ; GCN-NEXT: s_lshr_b32 s6, s0, 24
; GCN-NEXT: s_and_b32 s0, s0, s16 ; GCN-NEXT: s_and_b32 s0, s0, s16
; GCN-NEXT: s_lshl_b32 s4, s4, 8 ; GCN-NEXT: s_lshl_b32 s4, s4, 8
; GCN-NEXT: s_or_b32 s0, s0, s4 ; GCN-NEXT: s_or_b32 s0, s0, s4
; GCN-NEXT: s_and_b32 s4, s5, s16 ; GCN-NEXT: s_and_b32 s4, s5, s16
; GCN-NEXT: s_lshl_b32 s4, s4, 16 ; GCN-NEXT: s_lshl_b32 s4, s4, 16
; GCN-NEXT: s_or_b32 s0, s0, s4 ; GCN-NEXT: s_or_b32 s0, s0, s4
; GCN-NEXT: s_and_b32 s4, s6, s16 ; GCN-NEXT: s_lshl_b32 s4, s6, 24
; GCN-NEXT: s_lshl_b32 s4, s4, 24
; GCN-NEXT: s_lshr_b32 s7, s1, 8 ; GCN-NEXT: s_lshr_b32 s7, s1, 8
; GCN-NEXT: s_or_b32 s0, s0, s4 ; GCN-NEXT: s_or_b32 s0, s0, s4
; GCN-NEXT: s_and_b32 s4, s7, s16 ; GCN-NEXT: s_and_b32 s4, s7, s16
; GCN-NEXT: s_lshr_b32 s8, s1, 16 ; GCN-NEXT: s_lshr_b32 s8, s1, 16
; GCN-NEXT: s_lshr_b32 s9, s1, 24 ; GCN-NEXT: s_lshr_b32 s9, s1, 24
; GCN-NEXT: s_and_b32 s1, s1, s16 ; GCN-NEXT: s_and_b32 s1, s1, s16
; GCN-NEXT: s_lshl_b32 s4, s4, 8 ; GCN-NEXT: s_lshl_b32 s4, s4, 8
; GCN-NEXT: s_or_b32 s1, s1, s4 ; GCN-NEXT: s_or_b32 s1, s1, s4
; GCN-NEXT: s_and_b32 s4, s8, s16 ; GCN-NEXT: s_and_b32 s4, s8, s16
; GCN-NEXT: s_lshl_b32 s4, s4, 16 ; GCN-NEXT: s_lshl_b32 s4, s4, 16
; GCN-NEXT: s_or_b32 s1, s1, s4 ; GCN-NEXT: s_or_b32 s1, s1, s4
; GCN-NEXT: s_and_b32 s4, s9, s16 ; GCN-NEXT: s_lshl_b32 s4, s9, 24
; GCN-NEXT: s_lshl_b32 s4, s4, 24
; GCN-NEXT: s_lshr_b32 s10, s2, 8 ; GCN-NEXT: s_lshr_b32 s10, s2, 8
; GCN-NEXT: s_or_b32 s1, s1, s4 ; GCN-NEXT: s_or_b32 s1, s1, s4
; GCN-NEXT: s_and_b32 s4, s10, s16 ; GCN-NEXT: s_and_b32 s4, s10, s16
; GCN-NEXT: s_lshr_b32 s11, s2, 16 ; GCN-NEXT: s_lshr_b32 s11, s2, 16
; GCN-NEXT: s_lshr_b32 s12, s2, 24 ; GCN-NEXT: s_lshr_b32 s12, s2, 24
; GCN-NEXT: s_and_b32 s2, s2, s16 ; GCN-NEXT: s_and_b32 s2, s2, s16
; GCN-NEXT: s_lshl_b32 s4, s4, 8 ; GCN-NEXT: s_lshl_b32 s4, s4, 8
; GCN-NEXT: s_or_b32 s2, s2, s4 ; GCN-NEXT: s_or_b32 s2, s2, s4
; GCN-NEXT: s_and_b32 s4, s11, s16 ; GCN-NEXT: s_and_b32 s4, s11, s16
; GCN-NEXT: s_lshl_b32 s4, s4, 16 ; GCN-NEXT: s_lshl_b32 s4, s4, 16
; GCN-NEXT: s_or_b32 s2, s2, s4 ; GCN-NEXT: s_or_b32 s2, s2, s4
; GCN-NEXT: s_and_b32 s4, s12, s16 ; GCN-NEXT: s_lshl_b32 s4, s12, 24
; GCN-NEXT: s_lshl_b32 s4, s4, 24
; GCN-NEXT: s_lshr_b32 s13, s3, 8 ; GCN-NEXT: s_lshr_b32 s13, s3, 8
; GCN-NEXT: s_or_b32 s2, s2, s4 ; GCN-NEXT: s_or_b32 s2, s2, s4
; GCN-NEXT: s_and_b32 s4, s13, s16 ; GCN-NEXT: s_and_b32 s4, s13, s16
; GCN-NEXT: s_lshr_b32 s14, s3, 16 ; GCN-NEXT: s_lshr_b32 s14, s3, 16
; GCN-NEXT: s_lshr_b32 s15, s3, 24 ; GCN-NEXT: s_lshr_b32 s15, s3, 24
; GCN-NEXT: s_and_b32 s3, s3, s16 ; GCN-NEXT: s_and_b32 s3, s3, s16
; GCN-NEXT: s_lshl_b32 s4, s4, 8 ; GCN-NEXT: s_lshl_b32 s4, s4, 8
; GCN-NEXT: s_or_b32 s3, s3, s4 ; GCN-NEXT: s_or_b32 s3, s3, s4
; GCN-NEXT: s_and_b32 s4, s14, s16 ; GCN-NEXT: s_and_b32 s4, s14, s16
; GCN-NEXT: s_lshl_b32 s4, s4, 16 ; GCN-NEXT: s_lshl_b32 s4, s4, 16
; GCN-NEXT: s_or_b32 s3, s3, s4 ; GCN-NEXT: s_or_b32 s3, s3, s4
; GCN-NEXT: s_and_b32 s4, s15, s16 ; GCN-NEXT: s_lshl_b32 s4, s15, 24
; GCN-NEXT: s_lshl_b32 s4, s4, 24
; GCN-NEXT: v_mov_b32_e32 v2, s0 ; GCN-NEXT: v_mov_b32_e32 v2, s0
; GCN-NEXT: v_mov_b32_e32 v3, s1 ; GCN-NEXT: v_mov_b32_e32 v3, s1
; GCN-NEXT: s_or_b32 s3, s3, s4 ; GCN-NEXT: s_or_b32 s3, s3, s4
; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc ; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc
; GCN-NEXT: v_mov_b32_e32 v4, s2 ; GCN-NEXT: v_mov_b32_e32 v4, s2
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v1 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v1
; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GCN-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GCN-NEXT: v_mov_b32_e32 v5, s3 ; GCN-NEXT: v_mov_b32_e32 v5, s3
Show All 12 Lines
; GFX9-LABEL: extractelement_vgpr_v16i8_idx0: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx0:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v0, s5, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v1
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v1, v2, v0 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx0: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx0:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx0: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx0:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 0 %element = extractelement <16 x i8> %vector, i32 0
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_idx1(<16 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v16i8_idx1(<16 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v16i8_idx1: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx1:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v0, s5, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v1
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v1, v2, v0 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx1: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx1:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx1: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx1:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 1 %element = extractelement <16 x i8> %vector, i32 1
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_idx2(<16 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v16i8_idx2(<16 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v16i8_idx2: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx2:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v0, s5, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v1
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v1, v2, v0 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx2: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx2:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx2: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx2:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 2 %element = extractelement <16 x i8> %vector, i32 2
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_idx3(<16 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v16i8_idx3(<16 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v16i8_idx3: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx3:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v0, s5, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s5, v1
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v1, v2, v0 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx3: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx3:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx3: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx3:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 3 %element = extractelement <16 x i8> %vector, i32 3
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_idx4(<16 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v16i8_idx4(<16 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v16i8_idx4: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx4:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v1
; GFX9-NEXT: v_and_b32_sdwa v3, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v0, v2, v1 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx4: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx4:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v2, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx4: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx4:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v1, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 4 %element = extractelement <16 x i8> %vector, i32 4
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_idx5(<16 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v16i8_idx5(<16 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v16i8_idx5: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx5:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v1
; GFX9-NEXT: v_and_b32_sdwa v3, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v0, v2, v1 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx5: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx5:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v2, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx5: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx5:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v1, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 5 %element = extractelement <16 x i8> %vector, i32 5
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_idx6(<16 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v16i8_idx6(<16 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v16i8_idx6: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx6:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v1
; GFX9-NEXT: v_and_b32_sdwa v3, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v0, v2, v1 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx6: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx6:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v2, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx6: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx6:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v1, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 6 %element = extractelement <16 x i8> %vector, i32 6
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_idx7(<16 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v16i8_idx7(<16 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v16i8_idx7: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx7:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v2, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v1
; GFX9-NEXT: v_and_b32_sdwa v3, v1, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v1, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_or3_b32 v0, v0, v2, v1 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx7: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx7:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v2, v1, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx7: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx7:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v1
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v1, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 7 %element = extractelement <16 x i8> %vector, i32 7
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_idx8(<16 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v16i8_idx8(<16 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v16i8_idx8: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx8:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v1, v2, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v2, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v2, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v2, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v2, v2, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; GFX9-NEXT: v_or3_b32 v0, v0, v1, v2 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx8: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx8:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v1, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v2
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v2
; GFX8-NEXT: v_and_b32_sdwa v1, v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_and_b32_sdwa v1, v2, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx8: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx8:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v2
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v2
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v2
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_or_b32_e32 v0, v2, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v2, v0
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 8 %element = extractelement <16 x i8> %vector, i32 8
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_idx9(<16 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v16i8_idx9(<16 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v16i8_idx9: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx9:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v1, v2, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v2, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v2, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v2, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v2, v2, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; GFX9-NEXT: v_or3_b32 v0, v0, v1, v2 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx9: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx9:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v1, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v2
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v2
; GFX8-NEXT: v_and_b32_sdwa v1, v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_and_b32_sdwa v1, v2, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx9: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx9:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v2
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v2
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v2
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_or_b32_e32 v0, v2, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v2, v0
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 9 %element = extractelement <16 x i8> %vector, i32 9
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_idx10(<16 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v16i8_idx10(<16 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v16i8_idx10: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx10:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v1, v2, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v2, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v2, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v2, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v2, v2, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; GFX9-NEXT: v_or3_b32 v0, v0, v1, v2 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx10: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx10:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v1, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v2
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v2
; GFX8-NEXT: v_and_b32_sdwa v1, v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_and_b32_sdwa v1, v2, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx10: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx10:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v2
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v2
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v2
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_or_b32_e32 v0, v2, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v2, v0
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 10 %element = extractelement <16 x i8> %vector, i32 10
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_idx11(<16 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v16i8_idx11(<16 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v16i8_idx11: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx11:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 24, v2
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v1, v2, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v2, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v2, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v2, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v2, v2, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; GFX9-NEXT: v_or3_b32 v0, v0, v1, v2 ; GFX9-NEXT: v_or3_b32 v0, v0, v3, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx11: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx11:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v1, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v2
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v2
; GFX8-NEXT: v_and_b32_sdwa v1, v2, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_and_b32_sdwa v1, v2, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx11: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx11:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v2
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v2
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v2
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_or_b32_e32 v0, v2, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v2, v0
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 11 %element = extractelement <16 x i8> %vector, i32 11
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_idx12(<16 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v16i8_idx12(<16 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v16i8_idx12: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx12:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 24, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v1, v3, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v2, v3, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v3, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v3, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v2, v3, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; GFX9-NEXT: v_or3_b32 v0, v0, v1, v2 ; GFX9-NEXT: v_or3_b32 v0, v0, v2, v1
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx12: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx12:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v1, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v3
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v3
; GFX8-NEXT: v_and_b32_sdwa v1, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_and_b32_sdwa v1, v3, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx12: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx12:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v3
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 24, v3
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 24, v3
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_or_b32_e32 v0, v3, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v3, v0
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 12 %element = extractelement <16 x i8> %vector, i32 12
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_idx13(<16 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v16i8_idx13(<16 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v16i8_idx13: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx13:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 24, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v1, v3, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v2, v3, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v3, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v3, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v2, v3, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; GFX9-NEXT: v_or3_b32 v0, v0, v1, v2 ; GFX9-NEXT: v_or3_b32 v0, v0, v2, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx13: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx13:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v1, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v3
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v3
; GFX8-NEXT: v_and_b32_sdwa v1, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_and_b32_sdwa v1, v3, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx13: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx13:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v3
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 24, v3
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 24, v3
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_or_b32_e32 v0, v3, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v3, v0
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 13 %element = extractelement <16 x i8> %vector, i32 13
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_idx14(<16 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v16i8_idx14(<16 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v16i8_idx14: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx14:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 24, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v1, v3, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v2, v3, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v3, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v3, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v2, v3, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; GFX9-NEXT: v_or3_b32 v0, v0, v1, v2 ; GFX9-NEXT: v_or3_b32 v0, v0, v2, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx14: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx14:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v1, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v3
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v3
; GFX8-NEXT: v_and_b32_sdwa v1, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_and_b32_sdwa v1, v3, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx14: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx14:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v3
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 24, v3
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 24, v3
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_or_b32_e32 v0, v3, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v3, v0
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 14 %element = extractelement <16 x i8> %vector, i32 14
ret i8 %element ret i8 %element
} }
define i8 @extractelement_vgpr_v16i8_idx15(<16 x i8> addrspace(1)* %ptr) { define i8 @extractelement_vgpr_v16i8_idx15(<16 x i8> addrspace(1)* %ptr) {
; GFX9-LABEL: extractelement_vgpr_v16i8_idx15: ; GFX9-LABEL: extractelement_vgpr_v16i8_idx15:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off ; GFX9-NEXT: global_load_dwordx4 v[0:3], v[0:1], off
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: s_movk_i32 s5, 0xff ; GFX9-NEXT: s_movk_i32 s5, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 8, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 24, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v1, v3, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v2, v3, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v3, s5, v0 ; GFX9-NEXT: v_and_or_b32 v0, v3, s5, v0
; GFX9-NEXT: v_and_b32_sdwa v2, v3, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; GFX9-NEXT: v_or3_b32 v0, v0, v1, v2 ; GFX9-NEXT: v_or3_b32 v0, v0, v2, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: extractelement_vgpr_v16i8_idx15: ; GFX8-LABEL: extractelement_vgpr_v16i8_idx15:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v1, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v3
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v3
; GFX8-NEXT: v_and_b32_sdwa v1, v3, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_and_b32_sdwa v1, v3, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX7-LABEL: extractelement_vgpr_v16i8_idx15: ; GFX7-LABEL: extractelement_vgpr_v16i8_idx15:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
; GFX7-NEXT: s_mov_b64 s[4:5], 0 ; GFX7-NEXT: s_mov_b64 s[4:5], 0
; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64 ; GFX7-NEXT: buffer_load_dwordx4 v[0:3], v[0:1], s[4:7], 0 addr64
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v3
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 24, v3
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 24, v3
; GFX7-NEXT: v_and_b32_e32 v3, s4, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s4, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v2, s4, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_or_b32_e32 v0, v3, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v3, v0
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
%vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vector = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%element = extractelement <16 x i8> %vector, i32 15 %element = extractelement <16 x i8> %vector, i32 15
ret i8 %element ret i8 %element
} }

llvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.i8.ll

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; GFX9-NEXT: s_lshl_b32 s3, s3, 3 ; GFX9-NEXT: s_lshl_b32 s3, s3, 3
; GFX9-NEXT: s_lshl_b32 s2, s2, s3 ; GFX9-NEXT: s_lshl_b32 s2, s2, s3
; GFX9-NEXT: s_lshl_b32 s3, s1, s3 ; GFX9-NEXT: s_lshl_b32 s3, s1, s3
; GFX9-NEXT: s_not_b32 s3, s3 ; GFX9-NEXT: s_not_b32 s3, s3
; GFX9-NEXT: v_mov_b32_e32 v2, s2 ; GFX9-NEXT: v_mov_b32_e32 v2, s2
; GFX9-NEXT: v_mov_b32_e32 v1, 8 ; GFX9-NEXT: v_mov_b32_e32 v1, 8
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v3, s0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v3, s0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v4, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v5, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v5, v0, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v3 ; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v3
; GFX9-NEXT: v_or3_b32 v0, v0, v4, v5 ; GFX9-NEXT: v_or3_b32 v0, v0, v5, v4
; GFX9-NEXT: v_and_or_b32 v0, v0, s3, v2 ; GFX9-NEXT: v_and_or_b32 v0, v0, s3, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v3, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v4, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v4, v0, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 24, v3
; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v1
; GFX9-NEXT: v_or3_b32 v2, v0, v3, v4 ; GFX9-NEXT: v_or3_b32 v2, v0, v4, v2
; GFX9-NEXT: v_mov_b32_e32 v0, 0 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_v_v4i8_s_s: ; GFX8-LABEL: insertelement_v_v4i8_s_s:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v3, s0
; GFX8-NEXT: s_and_b32 s1, s3, 3 ; GFX8-NEXT: s_and_b32 s1, s3, 3
; GFX8-NEXT: v_mov_b32_e32 v3, s0
; GFX8-NEXT: s_lshl_b32 s1, s1, 3 ; GFX8-NEXT: s_lshl_b32 s1, s1, 3
; GFX8-NEXT: s_and_b32 s2, s2, s0 ; GFX8-NEXT: s_and_b32 s2, s2, s0
; GFX8-NEXT: s_lshl_b32 s0, s0, s1 ; GFX8-NEXT: s_lshl_b32 s0, s0, s1
; GFX8-NEXT: s_not_b32 s0, s0 ; GFX8-NEXT: s_not_b32 s0, s0
; GFX8-NEXT: s_lshl_b32 s2, s2, s1 ; GFX8-NEXT: s_lshl_b32 s2, s2, s1
; GFX8-NEXT: v_mov_b32_e32 v2, 8 ; GFX8-NEXT: v_mov_b32_e32 v2, 8
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v5, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v6, v0, v3 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v6, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v5 ; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v5
; GFX8-NEXT: v_or_b32_e32 v0, v0, v6 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v6
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
; GFX8-NEXT: v_and_b32_e32 v0, s0, v0 ; GFX8-NEXT: v_and_b32_e32 v0, s0, v0
; GFX8-NEXT: v_or_b32_e32 v0, s2, v0 ; GFX8-NEXT: v_or_b32_e32 v0, s2, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v3, v0, v3 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v3, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 24, v4
; GFX8-NEXT: v_or_b32_e32 v2, v0, v3 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v3
; GFX8-NEXT: v_or_b32_e32 v2, v0, v2
; GFX8-NEXT: v_mov_b32_e32 v0, 0 ; GFX8-NEXT: v_mov_b32_e32 v0, 0
; GFX8-NEXT: v_mov_b32_e32 v1, 0 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v4i8_s_s: ; GFX7-LABEL: insertelement_v_v4i8_s_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
Show All 11 Lines
; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s0, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s0, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s0, v2
; GFX7-NEXT: v_and_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s0, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s0, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: v_and_b32_e32 v0, s1, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s1, v0
; GFX7-NEXT: v_or_b32_e32 v0, s2, v0 ; GFX7-NEXT: v_or_b32_e32 v0, s2, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s0, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s0, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s0, v2
; GFX7-NEXT: v_and_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s0, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s0, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <4 x i8>, <4 x i8> addrspace(1 )* %ptr %vec = load <4 x i8>, <4 x i8> addrspace(1 )* %ptr
Show All 15 Lines
; GFX9-NEXT: s_lshr_b32 s3, s1, 16 ; GFX9-NEXT: s_lshr_b32 s3, s1, 16
; GFX9-NEXT: s_lshr_b32 s5, s1, 24 ; GFX9-NEXT: s_lshr_b32 s5, s1, 24
; GFX9-NEXT: s_and_b32 s1, s1, s6 ; GFX9-NEXT: s_and_b32 s1, s1, s6
; GFX9-NEXT: s_lshl_b32 s2, s2, 8 ; GFX9-NEXT: s_lshl_b32 s2, s2, 8
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s3, s6 ; GFX9-NEXT: s_and_b32 s2, s3, s6
; GFX9-NEXT: s_lshl_b32 s2, s2, 16 ; GFX9-NEXT: s_lshl_b32 s2, s2, 16
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s5, s6 ; GFX9-NEXT: s_lshl_b32 s2, s5, 24
; GFX9-NEXT: s_lshl_b32 s2, s2, 24
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s4, 3 ; GFX9-NEXT: s_and_b32 s2, s4, 3
; GFX9-NEXT: s_lshl_b32 s2, s2, 3 ; GFX9-NEXT: s_lshl_b32 s2, s2, 3
; GFX9-NEXT: s_lshl_b32 s3, s6, s2 ; GFX9-NEXT: s_lshl_b32 s3, s6, s2
; GFX9-NEXT: s_andn2_b32 s1, s1, s3 ; GFX9-NEXT: s_andn2_b32 s1, s1, s3
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_lshl_or_b32 v0, v0, s2, v1 ; GFX9-NEXT: v_lshl_or_b32 v0, v0, s2, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_or_b32 v1, v0, s6, v1 ; GFX9-NEXT: v_and_or_b32 v1, v0, s6, v1
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v0, v0, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX9-NEXT: v_or3_b32 v2, v1, v2, v0 ; GFX9-NEXT: v_or3_b32 v2, v1, v0, v2
; GFX9-NEXT: v_mov_b32_e32 v0, 0 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v4i8_v_s: ; GFX8-LABEL: insertelement_s_v4i8_v_s:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dword s0, s[2:3], 0x0 ; GFX8-NEXT: s_load_dword s0, s[2:3], 0x0
; GFX8-NEXT: s_movk_i32 s5, 0xff ; GFX8-NEXT: s_movk_i32 s5, 0xff
; GFX8-NEXT: v_mov_b32_e32 v2, 8 ; GFX8-NEXT: v_mov_b32_e32 v3, 8
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s1, s0, 8 ; GFX8-NEXT: s_lshr_b32 s1, s0, 8
; GFX8-NEXT: s_and_b32 s1, s1, s5 ; GFX8-NEXT: s_and_b32 s1, s1, s5
; GFX8-NEXT: s_lshr_b32 s2, s0, 16 ; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_lshr_b32 s3, s0, 24 ; GFX8-NEXT: s_lshr_b32 s3, s0, 24
; GFX8-NEXT: s_and_b32 s0, s0, s5 ; GFX8-NEXT: s_and_b32 s0, s0, s5
; GFX8-NEXT: s_lshl_b32 s1, s1, 8 ; GFX8-NEXT: s_lshl_b32 s1, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s2, s5 ; GFX8-NEXT: s_and_b32 s1, s2, s5
; GFX8-NEXT: s_lshl_b32 s1, s1, 16 ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s3, s5 ; GFX8-NEXT: s_lshl_b32 s1, s3, 24
; GFX8-NEXT: s_lshl_b32 s1, s1, 24
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s4, 3 ; GFX8-NEXT: s_and_b32 s1, s4, 3
; GFX8-NEXT: s_lshl_b32 s1, s1, 3 ; GFX8-NEXT: s_lshl_b32 s1, s1, 3
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: s_lshl_b32 s1, s5, s1 ; GFX8-NEXT: s_lshl_b32 s1, s5, s1
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: s_andn2_b32 s0, s0, s1 ; GFX8-NEXT: s_andn2_b32 s0, s0, s1
; GFX8-NEXT: v_or_b32_e32 v0, s0, v0 ; GFX8-NEXT: v_or_b32_e32 v0, s0, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_mov_b32_e32 v2, s5 ; GFX8-NEXT: v_mov_b32_e32 v3, s5
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v3, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v3 ; GFX8-NEXT: v_or_b32_e32 v0, v1, v0
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX8-NEXT: v_or_b32_e32 v2, v1, v0 ; GFX8-NEXT: v_or_b32_e32 v2, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v0, 0 ; GFX8-NEXT: v_mov_b32_e32 v0, 0
; GFX8-NEXT: v_mov_b32_e32 v1, 0 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v4i8_v_s: ; GFX7-LABEL: insertelement_s_v4i8_v_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dword s0, s[2:3], 0x0 ; GFX7-NEXT: s_load_dword s0, s[2:3], 0x0
; GFX7-NEXT: s_movk_i32 s5, 0xff ; GFX7-NEXT: s_movk_i32 s5, 0xff
; GFX7-NEXT: v_and_b32_e32 v0, s5, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s5, v0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s1, s0, 8 ; GFX7-NEXT: s_lshr_b32 s1, s0, 8
; GFX7-NEXT: s_and_b32 s1, s1, s5 ; GFX7-NEXT: s_and_b32 s1, s1, s5
; GFX7-NEXT: s_lshr_b32 s2, s0, 16 ; GFX7-NEXT: s_lshr_b32 s2, s0, 16
; GFX7-NEXT: s_lshr_b32 s3, s0, 24 ; GFX7-NEXT: s_lshr_b32 s3, s0, 24
; GFX7-NEXT: s_and_b32 s0, s0, s5 ; GFX7-NEXT: s_and_b32 s0, s0, s5
; GFX7-NEXT: s_lshl_b32 s1, s1, 8 ; GFX7-NEXT: s_lshl_b32 s1, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s2, s5 ; GFX7-NEXT: s_and_b32 s1, s2, s5
; GFX7-NEXT: s_lshl_b32 s1, s1, 16 ; GFX7-NEXT: s_lshl_b32 s1, s1, 16
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s3, s5 ; GFX7-NEXT: s_lshl_b32 s1, s3, 24
; GFX7-NEXT: s_lshl_b32 s1, s1, 24
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s4, 3 ; GFX7-NEXT: s_and_b32 s1, s4, 3
; GFX7-NEXT: s_lshl_b32 s1, s1, 3 ; GFX7-NEXT: s_lshl_b32 s1, s1, 3
; GFX7-NEXT: v_lshlrev_b32_e32 v0, s1, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, s1, v0
; GFX7-NEXT: s_lshl_b32 s1, s5, s1 ; GFX7-NEXT: s_lshl_b32 s1, s5, s1
; GFX7-NEXT: s_andn2_b32 s0, s0, s1 ; GFX7-NEXT: s_andn2_b32 s0, s0, s1
; GFX7-NEXT: v_or_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_or_b32_e32 v0, s0, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_and_b32_e32 v1, s5, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s5, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s5, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s5, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_and_b32_e32 v1, s5, v2 ; GFX7-NEXT: v_and_b32_e32 v1, s5, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_and_b32_e32 v1, s5, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; GFX7-NEXT: s_mov_b64 s[0:1], 0 ; GFX7-NEXT: s_mov_b64 s[0:1], 0
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <4 x i8>, <4 x i8> addrspace(4)* %ptr %vec = load <4 x i8>, <4 x i8> addrspace(4)* %ptr
%insert = insertelement <4 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <4 x i8> %vec, i8 %val, i32 %idx
Show All 15 Lines
; GFX9-NEXT: s_lshr_b32 s3, s1, 16 ; GFX9-NEXT: s_lshr_b32 s3, s1, 16
; GFX9-NEXT: s_lshr_b32 s5, s1, 24 ; GFX9-NEXT: s_lshr_b32 s5, s1, 24
; GFX9-NEXT: s_and_b32 s1, s1, s6 ; GFX9-NEXT: s_and_b32 s1, s1, s6
; GFX9-NEXT: s_lshl_b32 s2, s2, 8 ; GFX9-NEXT: s_lshl_b32 s2, s2, 8
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s3, s6 ; GFX9-NEXT: s_and_b32 s2, s3, s6
; GFX9-NEXT: s_lshl_b32 s2, s2, 16 ; GFX9-NEXT: s_lshl_b32 s2, s2, 16
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s5, s6 ; GFX9-NEXT: s_lshl_b32 s2, s5, 24
; GFX9-NEXT: s_lshl_b32 s2, s2, 24
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s4, s6 ; GFX9-NEXT: s_and_b32 s2, s4, s6
; GFX9-NEXT: v_lshlrev_b32_e64 v1, v0, s2 ; GFX9-NEXT: v_lshlrev_b32_e64 v1, v0, s2
; GFX9-NEXT: v_lshlrev_b32_e64 v0, v0, s6 ; GFX9-NEXT: v_lshlrev_b32_e64 v0, v0, s6
; GFX9-NEXT: v_xor_b32_e32 v0, -1, v0 ; GFX9-NEXT: v_xor_b32_e32 v0, -1, v0
; GFX9-NEXT: v_and_or_b32 v0, s1, v0, v1 ; GFX9-NEXT: v_and_or_b32 v0, s1, v0, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_or_b32 v1, v0, s6, v1 ; GFX9-NEXT: v_and_or_b32 v1, v0, s6, v1
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v0, v0, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX9-NEXT: v_or3_b32 v2, v1, v2, v0 ; GFX9-NEXT: v_or3_b32 v2, v1, v0, v2
; GFX9-NEXT: v_mov_b32_e32 v0, 0 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v4i8_s_v: ; GFX8-LABEL: insertelement_s_v4i8_s_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dword s0, s[2:3], 0x0 ; GFX8-NEXT: s_load_dword s0, s[2:3], 0x0
; GFX8-NEXT: s_movk_i32 s5, 0xff ; GFX8-NEXT: s_movk_i32 s5, 0xff
; GFX8-NEXT: v_and_b32_e32 v0, 3, v0 ; GFX8-NEXT: v_and_b32_e32 v0, 3, v0
; GFX8-NEXT: v_lshlrev_b32_e32 v0, 3, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX8-NEXT: v_mov_b32_e32 v2, 8 ; GFX8-NEXT: v_mov_b32_e32 v3, 8
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s1, s0, 8 ; GFX8-NEXT: s_lshr_b32 s1, s0, 8
; GFX8-NEXT: s_and_b32 s1, s1, s5 ; GFX8-NEXT: s_and_b32 s1, s1, s5
; GFX8-NEXT: s_lshr_b32 s2, s0, 16 ; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_lshr_b32 s3, s0, 24 ; GFX8-NEXT: s_lshr_b32 s3, s0, 24
; GFX8-NEXT: s_and_b32 s0, s0, s5 ; GFX8-NEXT: s_and_b32 s0, s0, s5
; GFX8-NEXT: s_lshl_b32 s1, s1, 8 ; GFX8-NEXT: s_lshl_b32 s1, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s2, s5 ; GFX8-NEXT: s_and_b32 s1, s2, s5
; GFX8-NEXT: s_lshl_b32 s1, s1, 16 ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s3, s5 ; GFX8-NEXT: s_lshl_b32 s1, s3, 24
; GFX8-NEXT: s_lshl_b32 s1, s1, 24
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s4, s5 ; GFX8-NEXT: s_and_b32 s1, s4, s5
; GFX8-NEXT: v_lshlrev_b32_e64 v1, v0, s1 ; GFX8-NEXT: v_lshlrev_b32_e64 v1, v0, s1
; GFX8-NEXT: v_lshlrev_b32_e64 v0, v0, s5 ; GFX8-NEXT: v_lshlrev_b32_e64 v0, v0, s5
; GFX8-NEXT: v_xor_b32_e32 v0, -1, v0 ; GFX8-NEXT: v_xor_b32_e32 v0, -1, v0
; GFX8-NEXT: v_and_b32_e32 v0, s0, v0 ; GFX8-NEXT: v_and_b32_e32 v0, s0, v0
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_mov_b32_e32 v2, s5 ; GFX8-NEXT: v_mov_b32_e32 v3, s5
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v3, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v3 ; GFX8-NEXT: v_or_b32_e32 v0, v1, v0
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX8-NEXT: v_or_b32_e32 v2, v1, v0 ; GFX8-NEXT: v_or_b32_e32 v2, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v0, 0 ; GFX8-NEXT: v_mov_b32_e32 v0, 0
; GFX8-NEXT: v_mov_b32_e32 v1, 0 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v4i8_s_v: ; GFX7-LABEL: insertelement_s_v4i8_s_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dword s0, s[2:3], 0x0 ; GFX7-NEXT: s_load_dword s0, s[2:3], 0x0
; GFX7-NEXT: s_movk_i32 s5, 0xff ; GFX7-NEXT: s_movk_i32 s5, 0xff
; GFX7-NEXT: v_and_b32_e32 v0, 3, v0 ; GFX7-NEXT: v_and_b32_e32 v0, 3, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 3, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s1, s0, 8 ; GFX7-NEXT: s_lshr_b32 s1, s0, 8
; GFX7-NEXT: s_and_b32 s1, s1, s5 ; GFX7-NEXT: s_and_b32 s1, s1, s5
; GFX7-NEXT: s_lshr_b32 s2, s0, 16 ; GFX7-NEXT: s_lshr_b32 s2, s0, 16
; GFX7-NEXT: s_lshr_b32 s3, s0, 24 ; GFX7-NEXT: s_lshr_b32 s3, s0, 24
; GFX7-NEXT: s_and_b32 s0, s0, s5 ; GFX7-NEXT: s_and_b32 s0, s0, s5
; GFX7-NEXT: s_lshl_b32 s1, s1, 8 ; GFX7-NEXT: s_lshl_b32 s1, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s2, s5 ; GFX7-NEXT: s_and_b32 s1, s2, s5
; GFX7-NEXT: s_lshl_b32 s1, s1, 16 ; GFX7-NEXT: s_lshl_b32 s1, s1, 16
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s3, s5 ; GFX7-NEXT: s_lshl_b32 s1, s3, 24
; GFX7-NEXT: s_lshl_b32 s1, s1, 24
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s4, s5 ; GFX7-NEXT: s_and_b32 s1, s4, s5
; GFX7-NEXT: v_lshl_b32_e32 v1, s1, v0 ; GFX7-NEXT: v_lshl_b32_e32 v1, s1, v0
; GFX7-NEXT: v_lshl_b32_e32 v0, s5, v0 ; GFX7-NEXT: v_lshl_b32_e32 v0, s5, v0
; GFX7-NEXT: v_xor_b32_e32 v0, -1, v0 ; GFX7-NEXT: v_xor_b32_e32 v0, -1, v0
; GFX7-NEXT: v_and_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s0, v0
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_and_b32_e32 v1, s5, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s5, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s5, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s5, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_and_b32_e32 v1, s5, v2 ; GFX7-NEXT: v_and_b32_e32 v1, s5, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_and_b32_e32 v1, s5, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; GFX7-NEXT: s_mov_b64 s[0:1], 0 ; GFX7-NEXT: s_mov_b64 s[0:1], 0
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <4 x i8>, <4 x i8> addrspace(4)* %ptr %vec = load <4 x i8>, <4 x i8> addrspace(4)* %ptr
%insert = insertelement <4 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <4 x i8> %vec, i8 %val, i32 %idx
Show All 14 Lines
; GFX9-NEXT: s_and_b32 s2, s2, s5 ; GFX9-NEXT: s_and_b32 s2, s2, s5
; GFX9-NEXT: s_lshr_b32 s3, s1, 16 ; GFX9-NEXT: s_lshr_b32 s3, s1, 16
; GFX9-NEXT: s_lshr_b32 s4, s1, 24 ; GFX9-NEXT: s_lshr_b32 s4, s1, 24
; GFX9-NEXT: s_and_b32 s1, s1, s5 ; GFX9-NEXT: s_and_b32 s1, s1, s5
; GFX9-NEXT: s_lshl_b32 s2, s2, 8 ; GFX9-NEXT: s_lshl_b32 s2, s2, 8
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s3, s5 ; GFX9-NEXT: s_and_b32 s2, s3, s5
; GFX9-NEXT: s_lshl_b32 s2, s2, 16 ; GFX9-NEXT: s_lshl_b32 s2, s2, 16
; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s4, s5
; GFX9-NEXT: v_lshlrev_b32_e64 v1, v1, s5 ; GFX9-NEXT: v_lshlrev_b32_e64 v1, v1, s5
; GFX9-NEXT: s_lshl_b32 s2, s2, 24 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_lshl_b32 s2, s4, 24
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX9-NEXT: v_and_or_b32 v0, s1, v1, v0 ; GFX9-NEXT: v_and_or_b32 v0, s1, v1, v0
; GFX9-NEXT: s_mov_b32 s0, 8 ; GFX9-NEXT: s_mov_b32 s0, 8
; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_or_b32 v1, v0, s5, v1 ; GFX9-NEXT: v_and_or_b32 v1, v0, s5, v1
; GFX9-NEXT: v_and_b32_sdwa v2, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v0, v0, s5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX9-NEXT: v_or3_b32 v2, v1, v2, v0 ; GFX9-NEXT: v_or3_b32 v2, v1, v0, v2
; GFX9-NEXT: v_mov_b32_e32 v0, 0 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v4i8_v_v: ; GFX8-LABEL: insertelement_s_v4i8_v_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dword s0, s[2:3], 0x0 ; GFX8-NEXT: s_load_dword s0, s[2:3], 0x0
; GFX8-NEXT: s_movk_i32 s4, 0xff ; GFX8-NEXT: s_movk_i32 s4, 0xff
; GFX8-NEXT: v_and_b32_e32 v1, 3, v1 ; GFX8-NEXT: v_and_b32_e32 v1, 3, v1
; GFX8-NEXT: v_lshlrev_b32_e32 v1, 3, v1 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 3, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s1, s0, 8 ; GFX8-NEXT: s_lshr_b32 s1, s0, 8
; GFX8-NEXT: s_and_b32 s1, s1, s4 ; GFX8-NEXT: s_and_b32 s1, s1, s4
; GFX8-NEXT: s_lshr_b32 s2, s0, 16 ; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_lshr_b32 s3, s0, 24 ; GFX8-NEXT: s_lshr_b32 s3, s0, 24
; GFX8-NEXT: s_and_b32 s0, s0, s4 ; GFX8-NEXT: s_and_b32 s0, s0, s4
; GFX8-NEXT: s_lshl_b32 s1, s1, 8 ; GFX8-NEXT: s_lshl_b32 s1, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s2, s4 ; GFX8-NEXT: s_and_b32 s1, s2, s4
; GFX8-NEXT: s_lshl_b32 s1, s1, 16 ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s3, s4
; GFX8-NEXT: v_lshlrev_b32_e64 v1, v1, s4 ; GFX8-NEXT: v_lshlrev_b32_e64 v1, v1, s4
; GFX8-NEXT: s_lshl_b32 s1, s1, 24 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_lshl_b32 s1, s3, 24
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX8-NEXT: v_and_b32_e32 v1, s0, v1 ; GFX8-NEXT: v_and_b32_e32 v1, s0, v1
; GFX8-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_or_b32_e32 v0, v1, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX8-NEXT: v_mov_b32_e32 v2, 8 ; GFX8-NEXT: v_mov_b32_e32 v3, 8
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v3, s4
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v3, v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v0, v0, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v3 ; GFX8-NEXT: v_or_b32_e32 v0, v1, v0
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX8-NEXT: v_or_b32_e32 v2, v1, v0 ; GFX8-NEXT: v_or_b32_e32 v2, v0, v1
; GFX8-NEXT: v_mov_b32_e32 v0, 0 ; GFX8-NEXT: v_mov_b32_e32 v0, 0
; GFX8-NEXT: v_mov_b32_e32 v1, 0 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v4i8_v_v: ; GFX7-LABEL: insertelement_s_v4i8_v_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dword s0, s[2:3], 0x0 ; GFX7-NEXT: s_load_dword s0, s[2:3], 0x0
; GFX7-NEXT: s_movk_i32 s4, 0xff ; GFX7-NEXT: s_movk_i32 s4, 0xff
; GFX7-NEXT: v_and_b32_e32 v1, 3, v1 ; GFX7-NEXT: v_and_b32_e32 v1, 3, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 3, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 3, v1
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s1, s0, 8 ; GFX7-NEXT: s_lshr_b32 s1, s0, 8
; GFX7-NEXT: s_and_b32 s1, s1, s4 ; GFX7-NEXT: s_and_b32 s1, s1, s4
; GFX7-NEXT: s_lshr_b32 s2, s0, 16 ; GFX7-NEXT: s_lshr_b32 s2, s0, 16
; GFX7-NEXT: s_lshr_b32 s3, s0, 24 ; GFX7-NEXT: s_lshr_b32 s3, s0, 24
; GFX7-NEXT: s_and_b32 s0, s0, s4 ; GFX7-NEXT: s_and_b32 s0, s0, s4
; GFX7-NEXT: s_lshl_b32 s1, s1, 8 ; GFX7-NEXT: s_lshl_b32 s1, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s2, s4 ; GFX7-NEXT: s_and_b32 s1, s2, s4
; GFX7-NEXT: s_lshl_b32 s1, s1, 16 ; GFX7-NEXT: s_lshl_b32 s1, s1, 16
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s3, s4 ; GFX7-NEXT: s_lshl_b32 s1, s3, 24
; GFX7-NEXT: s_lshl_b32 s1, s1, 24
; GFX7-NEXT: v_lshlrev_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, v1, v0
; GFX7-NEXT: v_lshl_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_lshl_b32_e32 v1, s4, v1
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX7-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX7-NEXT: v_and_b32_e32 v1, s0, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s0, v1
; GFX7-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v1, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_and_b32_e32 v1, s4, v2 ; GFX7-NEXT: v_and_b32_e32 v1, s4, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_and_b32_e32 v1, s4, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; GFX7-NEXT: s_mov_b64 s[0:1], 0 ; GFX7-NEXT: s_mov_b64 s[0:1], 0
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <4 x i8>, <4 x i8> addrspace(4)* %ptr %vec = load <4 x i8>, <4 x i8> addrspace(4)* %ptr
%insert = insertelement <4 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <4 x i8> %vec, i8 %val, i32 %idx
Show All 11 Lines
; GFX9-NEXT: s_and_b32 s2, s2, s1 ; GFX9-NEXT: s_and_b32 s2, s2, s1
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 3, v2 ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 3, v2
; GFX9-NEXT: v_lshlrev_b32_e64 v3, v2, s2 ; GFX9-NEXT: v_lshlrev_b32_e64 v3, v2, s2
; GFX9-NEXT: v_lshlrev_b32_e64 v2, v2, s1 ; GFX9-NEXT: v_lshlrev_b32_e64 v2, v2, s1
; GFX9-NEXT: v_xor_b32_e32 v2, -1, v2 ; GFX9-NEXT: v_xor_b32_e32 v2, -1, v2
; GFX9-NEXT: v_mov_b32_e32 v1, 8 ; GFX9-NEXT: v_mov_b32_e32 v1, 8
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v4, s0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v4, s0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v5, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v6, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v6, v0, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v4 ; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v4
; GFX9-NEXT: v_or3_b32 v0, v0, v5, v6 ; GFX9-NEXT: v_or3_b32 v0, v0, v6, v5
; GFX9-NEXT: v_and_or_b32 v0, v0, v2, v3 ; GFX9-NEXT: v_and_or_b32 v0, v0, v2, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v3, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v4, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v4, v0, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 24, v3
; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v1
; GFX9-NEXT: v_or3_b32 v2, v0, v3, v4 ; GFX9-NEXT: v_or3_b32 v2, v0, v4, v2
; GFX9-NEXT: v_mov_b32_e32 v0, 0 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_v_v4i8_s_v: ; GFX8-LABEL: insertelement_v_v4i8_s_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v4, s0
; GFX8-NEXT: v_and_b32_e32 v2, 3, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 3, v2
; GFX8-NEXT: v_mov_b32_e32 v4, s0
; GFX8-NEXT: s_and_b32 s1, s2, s0 ; GFX8-NEXT: s_and_b32 s1, s2, s0
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 3, v2 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 3, v2
; GFX8-NEXT: v_lshlrev_b32_e64 v5, v2, s1 ; GFX8-NEXT: v_lshlrev_b32_e64 v5, v2, s1
; GFX8-NEXT: v_lshlrev_b32_e64 v2, v2, s0 ; GFX8-NEXT: v_lshlrev_b32_e64 v2, v2, s0
; GFX8-NEXT: v_xor_b32_e32 v2, -1, v2 ; GFX8-NEXT: v_xor_b32_e32 v2, -1, v2
; GFX8-NEXT: v_mov_b32_e32 v3, 8 ; GFX8-NEXT: v_mov_b32_e32 v3, 8
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v7, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v8, v0, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v8, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v7 ; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v7
; GFX8-NEXT: v_or_b32_e32 v0, v0, v8 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v8
; GFX8-NEXT: v_or_b32_e32 v0, v0, v6
; GFX8-NEXT: v_and_b32_e32 v0, v0, v2 ; GFX8-NEXT: v_and_b32_e32 v0, v0, v2
; GFX8-NEXT: v_or_b32_e32 v0, v0, v5 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
; GFX8-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v2, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v4, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX8-NEXT: v_or_b32_e32 v2, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
; GFX8-NEXT: v_or_b32_e32 v2, v0, v2
; GFX8-NEXT: v_mov_b32_e32 v0, 0 ; GFX8-NEXT: v_mov_b32_e32 v0, 0
; GFX8-NEXT: v_mov_b32_e32 v1, 0 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v4i8_s_v: ; GFX7-LABEL: insertelement_v_v4i8_s_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
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; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 16, v0
; GFX7-NEXT: v_and_b32_e32 v3, s0, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s0, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v5, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX7-NEXT: v_and_b32_e32 v4, s0, v4 ; GFX7-NEXT: v_and_b32_e32 v4, s0, v4
; GFX7-NEXT: v_and_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s0, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 8, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 8, v3
; GFX7-NEXT: v_and_b32_e32 v5, s0, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 24, v5 ; GFX7-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v5 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v5
; GFX7-NEXT: v_and_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_and_b32_e32 v0, v0, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s0, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s0, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s0, v2
; GFX7-NEXT: v_and_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s0, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s0, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <4 x i8>, <4 x i8> addrspace(1)* %ptr %vec = load <4 x i8>, <4 x i8> addrspace(1)* %ptr
Show All 11 Lines
; GFX9-NEXT: s_movk_i32 s1, 0xff ; GFX9-NEXT: s_movk_i32 s1, 0xff
; GFX9-NEXT: s_lshl_b32 s2, s2, 3 ; GFX9-NEXT: s_lshl_b32 s2, s2, 3
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: s_lshl_b32 s2, s1, s2 ; GFX9-NEXT: s_lshl_b32 s2, s1, s2
; GFX9-NEXT: s_not_b32 s2, s2 ; GFX9-NEXT: s_not_b32 s2, s2
; GFX9-NEXT: v_mov_b32_e32 v1, 8 ; GFX9-NEXT: v_mov_b32_e32 v1, 8
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v3, s0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v3, s0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v4, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v5, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v5, v0, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v3 ; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v3
; GFX9-NEXT: v_or3_b32 v0, v0, v4, v5 ; GFX9-NEXT: v_or3_b32 v0, v0, v5, v4
; GFX9-NEXT: v_and_or_b32 v0, v0, s2, v2 ; GFX9-NEXT: v_and_or_b32 v0, v0, s2, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v3, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v4, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v4, v0, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 24, v3
; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v1 ; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v1
; GFX9-NEXT: v_or3_b32 v2, v0, v3, v4 ; GFX9-NEXT: v_or3_b32 v2, v0, v4, v2
; GFX9-NEXT: v_mov_b32_e32 v0, 0 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_v_v4i8_v_s: ; GFX8-LABEL: insertelement_v_v4i8_v_s:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_and_b32 s1, s2, 3 ; GFX8-NEXT: s_and_b32 s1, s2, 3
; GFX8-NEXT: s_lshl_b32 s1, s1, 3 ; GFX8-NEXT: s_lshl_b32 s1, s1, 3
; GFX8-NEXT: v_mov_b32_e32 v5, s1 ; GFX8-NEXT: v_mov_b32_e32 v5, s1
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v4, s0 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
; GFX8-NEXT: s_lshl_b32 s0, s0, s1 ; GFX8-NEXT: s_lshl_b32 s0, s0, s1
; GFX8-NEXT: s_not_b32 s0, s0 ; GFX8-NEXT: s_not_b32 s0, s0
; GFX8-NEXT: v_mov_b32_e32 v3, 8 ; GFX8-NEXT: v_mov_b32_e32 v3, 8
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v6, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v7, v0, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v7, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v6 ; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v6
; GFX8-NEXT: v_or_b32_e32 v0, v0, v7 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v7
; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
; GFX8-NEXT: v_and_b32_e32 v0, s0, v0 ; GFX8-NEXT: v_and_b32_e32 v0, s0, v0
; GFX8-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v3, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v2, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v4, v0, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v4, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX8-NEXT: v_or_b32_e32 v2, v0, v4 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
; GFX8-NEXT: v_or_b32_e32 v2, v0, v2
; GFX8-NEXT: v_mov_b32_e32 v0, 0 ; GFX8-NEXT: v_mov_b32_e32 v0, 0
; GFX8-NEXT: v_mov_b32_e32 v1, 0 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v4i8_v_s: ; GFX7-LABEL: insertelement_v_v4i8_v_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
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; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v0
; GFX7-NEXT: v_and_b32_e32 v2, s0, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s0, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX7-NEXT: v_and_b32_e32 v3, s0, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s0, v3
; GFX7-NEXT: v_and_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s0, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_and_b32_e32 v4, s0, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_and_b32_e32 v0, s1, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s1, v0
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 16, v0
; GFX7-NEXT: v_and_b32_e32 v1, s0, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX7-NEXT: v_and_b32_e32 v2, s0, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s0, v2
; GFX7-NEXT: v_and_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s0, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v3, s0, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <4 x i8>, <4 x i8> addrspace(1)* %ptr %vec = load <4 x i8>, <4 x i8> addrspace(1)* %ptr
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; GFX9-NEXT: v_lshlrev_b32_e32 v3, 3, v3 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 3, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_e64 v3, v3, s1 ; GFX9-NEXT: v_lshlrev_b32_e64 v3, v3, s1
; GFX9-NEXT: v_xor_b32_e32 v3, -1, v3 ; GFX9-NEXT: v_xor_b32_e32 v3, -1, v3
; GFX9-NEXT: v_mov_b32_e32 v4, 8 ; GFX9-NEXT: v_mov_b32_e32 v4, 8
; GFX9-NEXT: v_mov_b32_e32 v1, 0xff ; GFX9-NEXT: v_mov_b32_e32 v1, 0xff
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, s0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v5, s0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v6, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v7, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v7, v0, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v5 ; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v5
; GFX9-NEXT: v_or3_b32 v0, v0, v6, v7 ; GFX9-NEXT: v_or3_b32 v0, v0, v7, v6
; GFX9-NEXT: v_and_or_b32 v0, v0, v3, v2 ; GFX9-NEXT: v_and_or_b32 v0, v0, v3, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v3, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v5, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v5, v0, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX9-NEXT: v_and_or_b32 v0, v0, v1, v2 ; GFX9-NEXT: v_and_or_b32 v0, v0, v1, v2
; GFX9-NEXT: v_or3_b32 v2, v0, v3, v5 ; GFX9-NEXT: v_or3_b32 v2, v0, v5, v3
; GFX9-NEXT: v_mov_b32_e32 v0, 0 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
; GFX9-NEXT: v_mov_b32_e32 v1, 0 ; GFX9-NEXT: v_mov_b32_e32 v1, 0
; GFX9-NEXT: global_store_dword v[0:1], v2, off ; GFX9-NEXT: global_store_dword v[0:1], v2, off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_v_v4i8_v_v: ; GFX8-LABEL: insertelement_v_v4i8_v_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dword v0, v[0:1] ; GFX8-NEXT: flat_load_dword v0, v[0:1]
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_mov_b32_e32 v4, 8 ; GFX8-NEXT: v_mov_b32_e32 v4, 8
; GFX8-NEXT: v_and_b32_e32 v3, 3, v3
; GFX8-NEXT: v_mov_b32_e32 v6, s0 ; GFX8-NEXT: v_mov_b32_e32 v6, s0
; GFX8-NEXT: v_and_b32_e32 v3, 3, v3
; GFX8-NEXT: v_lshlrev_b32_e32 v3, 3, v3 ; GFX8-NEXT: v_lshlrev_b32_e32 v3, 3, v3
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_e64 v3, v3, s0 ; GFX8-NEXT: v_lshlrev_b32_e64 v3, v3, s0
; GFX8-NEXT: v_xor_b32_e32 v3, -1, v3 ; GFX8-NEXT: v_xor_b32_e32 v3, -1, v3
; GFX8-NEXT: v_mov_b32_e32 v5, 8 ; GFX8-NEXT: v_mov_b32_e32 v5, 8
; GFX8-NEXT: v_mov_b32_e32 v1, 0xff ; GFX8-NEXT: v_mov_b32_e32 v1, 0xff
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v8, v0, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v6, v0, v6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v6, v0, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v8 ; GFX8-NEXT: v_lshlrev_b32_e32 v7, 24, v8
; GFX8-NEXT: v_or_b32_e32 v0, v0, v6 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v6
; GFX8-NEXT: v_or_b32_e32 v0, v0, v7
; GFX8-NEXT: v_and_b32_e32 v0, v0, v3 ; GFX8-NEXT: v_and_b32_e32 v0, v0, v3
; GFX8-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v3, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v1, v0, v1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v1, v0, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX8-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX8-NEXT: v_or_b32_e32 v2, v0, v1 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: v_or_b32_e32 v2, v0, v3
; GFX8-NEXT: v_mov_b32_e32 v0, 0 ; GFX8-NEXT: v_mov_b32_e32 v0, 0
; GFX8-NEXT: v_mov_b32_e32 v1, 0 ; GFX8-NEXT: v_mov_b32_e32 v1, 0
; GFX8-NEXT: flat_store_dword v[0:1], v2 ; GFX8-NEXT: flat_store_dword v[0:1], v2
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v4i8_v_v: ; GFX7-LABEL: insertelement_v_v4i8_v_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s2, 0 ; GFX7-NEXT: s_mov_b32 s2, 0
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; GFX7-NEXT: s_waitcnt vmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0)
; GFX7-NEXT: v_lshrrev_b32_e32 v4, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v0
; GFX7-NEXT: v_and_b32_e32 v4, s2, v4 ; GFX7-NEXT: v_and_b32_e32 v4, s2, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0
; GFX7-NEXT: v_and_b32_e32 v5, s2, v5 ; GFX7-NEXT: v_and_b32_e32 v5, s2, v5
; GFX7-NEXT: v_and_b32_e32 v0, s2, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s2, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_and_b32_e32 v6, s2, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; GFX7-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v6, 24, v6 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; GFX7-NEXT: v_or_b32_e32 v0, v0, v5 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v5
; GFX7-NEXT: v_or_b32_e32 v0, v0, v6 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v6
; GFX7-NEXT: v_and_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_and_b32_e32 v0, v0, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v0
; GFX7-NEXT: v_and_b32_e32 v2, v2, v1 ; GFX7-NEXT: v_and_b32_e32 v2, v2, v1
; GFX7-NEXT: v_and_b32_e32 v3, v3, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_and_b32_e32 v0, v0, v1
; GFX7-NEXT: v_and_b32_e32 v1, v3, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_and_b32_e32 v1, v4, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <4 x i8>, <4 x i8> addrspace(1)* %ptr %vec = load <4 x i8>, <4 x i8> addrspace(1)* %ptr
%insert = insertelement <4 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <4 x i8> %vec, i8 %val, i32 %idx
store <4 x i8> %insert, <4 x i8> addrspace(1)* null store <4 x i8> %insert, <4 x i8> addrspace(1)* null
ret void ret void
} }
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; GFX9-NEXT: s_lshr_b32 s3, s0, 16 ; GFX9-NEXT: s_lshr_b32 s3, s0, 16
; GFX9-NEXT: s_lshr_b32 s6, s0, 24 ; GFX9-NEXT: s_lshr_b32 s6, s0, 24
; GFX9-NEXT: s_and_b32 s0, s0, s10 ; GFX9-NEXT: s_and_b32 s0, s0, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 8 ; GFX9-NEXT: s_lshl_b32 s2, s2, 8
; GFX9-NEXT: s_or_b32 s0, s0, s2 ; GFX9-NEXT: s_or_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s2, s3, s10 ; GFX9-NEXT: s_and_b32 s2, s3, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 16 ; GFX9-NEXT: s_lshl_b32 s2, s2, 16
; GFX9-NEXT: s_or_b32 s0, s0, s2 ; GFX9-NEXT: s_or_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s2, s6, s10 ; GFX9-NEXT: s_lshl_b32 s2, s6, 24
; GFX9-NEXT: s_lshl_b32 s2, s2, 24
; GFX9-NEXT: s_lshr_b32 s7, s1, 8 ; GFX9-NEXT: s_lshr_b32 s7, s1, 8
; GFX9-NEXT: s_or_b32 s0, s0, s2 ; GFX9-NEXT: s_or_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s2, s7, s10 ; GFX9-NEXT: s_and_b32 s2, s7, s10
; GFX9-NEXT: s_lshr_b32 s8, s1, 16 ; GFX9-NEXT: s_lshr_b32 s8, s1, 16
; GFX9-NEXT: s_lshr_b32 s9, s1, 24 ; GFX9-NEXT: s_lshr_b32 s9, s1, 24
; GFX9-NEXT: s_and_b32 s1, s1, s10 ; GFX9-NEXT: s_and_b32 s1, s1, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 8 ; GFX9-NEXT: s_lshl_b32 s2, s2, 8
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s8, s10 ; GFX9-NEXT: s_and_b32 s2, s8, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 16 ; GFX9-NEXT: s_lshl_b32 s2, s2, 16
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s9, s10 ; GFX9-NEXT: s_lshl_b32 s2, s9, 24
; GFX9-NEXT: s_lshl_b32 s2, s2, 24
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_lshr_b32 s2, s5, 2 ; GFX9-NEXT: s_lshr_b32 s2, s5, 2
; GFX9-NEXT: s_cmp_eq_u32 s2, 1 ; GFX9-NEXT: s_cmp_eq_u32 s2, 1
; GFX9-NEXT: s_cselect_b32 s3, s1, s0 ; GFX9-NEXT: s_cselect_b32 s3, s1, s0
; GFX9-NEXT: s_and_b32 s5, s5, 3 ; GFX9-NEXT: s_and_b32 s5, s5, 3
; GFX9-NEXT: s_lshl_b32 s5, s5, 3 ; GFX9-NEXT: s_lshl_b32 s5, s5, 3
; GFX9-NEXT: s_and_b32 s4, s4, s10 ; GFX9-NEXT: s_and_b32 s4, s4, s10
; GFX9-NEXT: s_lshl_b32 s4, s4, s5 ; GFX9-NEXT: s_lshl_b32 s4, s4, s5
Show All 9 Lines
; GFX9-NEXT: s_lshr_b32 s3, s0, 16 ; GFX9-NEXT: s_lshr_b32 s3, s0, 16
; GFX9-NEXT: s_lshr_b32 s4, s0, 24 ; GFX9-NEXT: s_lshr_b32 s4, s0, 24
; GFX9-NEXT: s_and_b32 s0, s0, s10 ; GFX9-NEXT: s_and_b32 s0, s0, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 8 ; GFX9-NEXT: s_lshl_b32 s2, s2, 8
; GFX9-NEXT: s_or_b32 s0, s0, s2 ; GFX9-NEXT: s_or_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s2, s3, s10 ; GFX9-NEXT: s_and_b32 s2, s3, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 16 ; GFX9-NEXT: s_lshl_b32 s2, s2, 16
; GFX9-NEXT: s_or_b32 s0, s0, s2 ; GFX9-NEXT: s_or_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s2, s4, s10 ; GFX9-NEXT: s_lshl_b32 s2, s4, 24
; GFX9-NEXT: s_lshl_b32 s2, s2, 24
; GFX9-NEXT: s_lshr_b32 s5, s1, 8 ; GFX9-NEXT: s_lshr_b32 s5, s1, 8
; GFX9-NEXT: s_or_b32 s0, s0, s2 ; GFX9-NEXT: s_or_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s2, s5, s10 ; GFX9-NEXT: s_and_b32 s2, s5, s10
; GFX9-NEXT: s_lshr_b32 s6, s1, 16 ; GFX9-NEXT: s_lshr_b32 s6, s1, 16
; GFX9-NEXT: s_lshr_b32 s7, s1, 24 ; GFX9-NEXT: s_lshr_b32 s7, s1, 24
; GFX9-NEXT: s_and_b32 s1, s1, s10 ; GFX9-NEXT: s_and_b32 s1, s1, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 8 ; GFX9-NEXT: s_lshl_b32 s2, s2, 8
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s6, s10 ; GFX9-NEXT: s_and_b32 s2, s6, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 16 ; GFX9-NEXT: s_lshl_b32 s2, s2, 16
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s7, s10 ; GFX9-NEXT: s_lshl_b32 s2, s7, 24
; GFX9-NEXT: s_lshl_b32 s2, s2, 24
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v8i8_s_s: ; GFX8-LABEL: insertelement_s_v8i8_s_s:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GFX8-NEXT: s_movk_i32 s10, 0xff ; GFX8-NEXT: s_movk_i32 s10, 0xff
; GFX8-NEXT: v_mov_b32_e32 v2, 0 ; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_mov_b32_e32 v3, 0 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s2, s0, 8 ; GFX8-NEXT: s_lshr_b32 s2, s0, 8
; GFX8-NEXT: s_and_b32 s2, s2, s10 ; GFX8-NEXT: s_and_b32 s2, s2, s10
; GFX8-NEXT: s_lshr_b32 s3, s0, 16 ; GFX8-NEXT: s_lshr_b32 s3, s0, 16
; GFX8-NEXT: s_lshr_b32 s6, s0, 24 ; GFX8-NEXT: s_lshr_b32 s6, s0, 24
; GFX8-NEXT: s_and_b32 s0, s0, s10 ; GFX8-NEXT: s_and_b32 s0, s0, s10
; GFX8-NEXT: s_lshl_b32 s2, s2, 8 ; GFX8-NEXT: s_lshl_b32 s2, s2, 8
; GFX8-NEXT: s_or_b32 s0, s0, s2 ; GFX8-NEXT: s_or_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s2, s3, s10 ; GFX8-NEXT: s_and_b32 s2, s3, s10
; GFX8-NEXT: s_lshl_b32 s2, s2, 16 ; GFX8-NEXT: s_lshl_b32 s2, s2, 16
; GFX8-NEXT: s_or_b32 s0, s0, s2 ; GFX8-NEXT: s_or_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s2, s6, s10 ; GFX8-NEXT: s_lshl_b32 s2, s6, 24
; GFX8-NEXT: s_lshl_b32 s2, s2, 24
; GFX8-NEXT: s_lshr_b32 s7, s1, 8 ; GFX8-NEXT: s_lshr_b32 s7, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s2 ; GFX8-NEXT: s_or_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s2, s7, s10 ; GFX8-NEXT: s_and_b32 s2, s7, s10
; GFX8-NEXT: s_lshr_b32 s8, s1, 16 ; GFX8-NEXT: s_lshr_b32 s8, s1, 16
; GFX8-NEXT: s_lshr_b32 s9, s1, 24 ; GFX8-NEXT: s_lshr_b32 s9, s1, 24
; GFX8-NEXT: s_and_b32 s1, s1, s10 ; GFX8-NEXT: s_and_b32 s1, s1, s10
; GFX8-NEXT: s_lshl_b32 s2, s2, 8 ; GFX8-NEXT: s_lshl_b32 s2, s2, 8
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: s_and_b32 s2, s8, s10 ; GFX8-NEXT: s_and_b32 s2, s8, s10
; GFX8-NEXT: s_lshl_b32 s2, s2, 16 ; GFX8-NEXT: s_lshl_b32 s2, s2, 16
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: s_and_b32 s2, s9, s10 ; GFX8-NEXT: s_lshl_b32 s2, s9, 24
; GFX8-NEXT: s_lshl_b32 s2, s2, 24
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: s_lshr_b32 s2, s5, 2 ; GFX8-NEXT: s_lshr_b32 s2, s5, 2
; GFX8-NEXT: s_cmp_eq_u32 s2, 1 ; GFX8-NEXT: s_cmp_eq_u32 s2, 1
; GFX8-NEXT: s_cselect_b32 s3, s1, s0 ; GFX8-NEXT: s_cselect_b32 s3, s1, s0
; GFX8-NEXT: s_and_b32 s5, s5, 3 ; GFX8-NEXT: s_and_b32 s5, s5, 3
; GFX8-NEXT: s_lshl_b32 s5, s5, 3 ; GFX8-NEXT: s_lshl_b32 s5, s5, 3
; GFX8-NEXT: s_and_b32 s4, s4, s10 ; GFX8-NEXT: s_and_b32 s4, s4, s10
; GFX8-NEXT: s_lshl_b32 s4, s4, s5 ; GFX8-NEXT: s_lshl_b32 s4, s4, s5
Show All 9 Lines
; GFX8-NEXT: s_lshr_b32 s3, s0, 16 ; GFX8-NEXT: s_lshr_b32 s3, s0, 16
; GFX8-NEXT: s_lshr_b32 s4, s0, 24 ; GFX8-NEXT: s_lshr_b32 s4, s0, 24
; GFX8-NEXT: s_and_b32 s0, s0, s10 ; GFX8-NEXT: s_and_b32 s0, s0, s10
; GFX8-NEXT: s_lshl_b32 s2, s2, 8 ; GFX8-NEXT: s_lshl_b32 s2, s2, 8
; GFX8-NEXT: s_or_b32 s0, s0, s2 ; GFX8-NEXT: s_or_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s2, s3, s10 ; GFX8-NEXT: s_and_b32 s2, s3, s10
; GFX8-NEXT: s_lshl_b32 s2, s2, 16 ; GFX8-NEXT: s_lshl_b32 s2, s2, 16
; GFX8-NEXT: s_or_b32 s0, s0, s2 ; GFX8-NEXT: s_or_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s2, s4, s10 ; GFX8-NEXT: s_lshl_b32 s2, s4, 24
; GFX8-NEXT: s_lshl_b32 s2, s2, 24
; GFX8-NEXT: s_lshr_b32 s5, s1, 8 ; GFX8-NEXT: s_lshr_b32 s5, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s2 ; GFX8-NEXT: s_or_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s2, s5, s10 ; GFX8-NEXT: s_and_b32 s2, s5, s10
; GFX8-NEXT: s_lshr_b32 s6, s1, 16 ; GFX8-NEXT: s_lshr_b32 s6, s1, 16
; GFX8-NEXT: s_lshr_b32 s7, s1, 24 ; GFX8-NEXT: s_lshr_b32 s7, s1, 24
; GFX8-NEXT: s_and_b32 s1, s1, s10 ; GFX8-NEXT: s_and_b32 s1, s1, s10
; GFX8-NEXT: s_lshl_b32 s2, s2, 8 ; GFX8-NEXT: s_lshl_b32 s2, s2, 8
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: s_and_b32 s2, s6, s10 ; GFX8-NEXT: s_and_b32 s2, s6, s10
; GFX8-NEXT: s_lshl_b32 s2, s2, 16 ; GFX8-NEXT: s_lshl_b32 s2, s2, 16
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: s_and_b32 s2, s7, s10 ; GFX8-NEXT: s_lshl_b32 s2, s7, 24
; GFX8-NEXT: s_lshl_b32 s2, s2, 24
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v8i8_s_s: ; GFX7-LABEL: insertelement_s_v8i8_s_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GFX7-NEXT: s_movk_i32 s10, 0xff ; GFX7-NEXT: s_movk_i32 s10, 0xff
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s2, s0, 8 ; GFX7-NEXT: s_lshr_b32 s2, s0, 8
; GFX7-NEXT: s_and_b32 s2, s2, s10 ; GFX7-NEXT: s_and_b32 s2, s2, s10
; GFX7-NEXT: s_lshr_b32 s3, s0, 16 ; GFX7-NEXT: s_lshr_b32 s3, s0, 16
; GFX7-NEXT: s_lshr_b32 s6, s0, 24 ; GFX7-NEXT: s_lshr_b32 s6, s0, 24
; GFX7-NEXT: s_and_b32 s0, s0, s10 ; GFX7-NEXT: s_and_b32 s0, s0, s10
; GFX7-NEXT: s_lshl_b32 s2, s2, 8 ; GFX7-NEXT: s_lshl_b32 s2, s2, 8
; GFX7-NEXT: s_or_b32 s0, s0, s2 ; GFX7-NEXT: s_or_b32 s0, s0, s2
; GFX7-NEXT: s_and_b32 s2, s3, s10 ; GFX7-NEXT: s_and_b32 s2, s3, s10
; GFX7-NEXT: s_lshl_b32 s2, s2, 16 ; GFX7-NEXT: s_lshl_b32 s2, s2, 16
; GFX7-NEXT: s_or_b32 s0, s0, s2 ; GFX7-NEXT: s_or_b32 s0, s0, s2
; GFX7-NEXT: s_and_b32 s2, s6, s10 ; GFX7-NEXT: s_lshl_b32 s2, s6, 24
; GFX7-NEXT: s_lshl_b32 s2, s2, 24
; GFX7-NEXT: s_lshr_b32 s7, s1, 8 ; GFX7-NEXT: s_lshr_b32 s7, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s2 ; GFX7-NEXT: s_or_b32 s0, s0, s2
; GFX7-NEXT: s_and_b32 s2, s7, s10 ; GFX7-NEXT: s_and_b32 s2, s7, s10
; GFX7-NEXT: s_lshr_b32 s8, s1, 16 ; GFX7-NEXT: s_lshr_b32 s8, s1, 16
; GFX7-NEXT: s_lshr_b32 s9, s1, 24 ; GFX7-NEXT: s_lshr_b32 s9, s1, 24
; GFX7-NEXT: s_and_b32 s1, s1, s10 ; GFX7-NEXT: s_and_b32 s1, s1, s10
; GFX7-NEXT: s_lshl_b32 s2, s2, 8 ; GFX7-NEXT: s_lshl_b32 s2, s2, 8
; GFX7-NEXT: s_or_b32 s1, s1, s2 ; GFX7-NEXT: s_or_b32 s1, s1, s2
; GFX7-NEXT: s_and_b32 s2, s8, s10 ; GFX7-NEXT: s_and_b32 s2, s8, s10
; GFX7-NEXT: s_lshl_b32 s2, s2, 16 ; GFX7-NEXT: s_lshl_b32 s2, s2, 16
; GFX7-NEXT: s_or_b32 s1, s1, s2 ; GFX7-NEXT: s_or_b32 s1, s1, s2
; GFX7-NEXT: s_and_b32 s2, s9, s10 ; GFX7-NEXT: s_lshl_b32 s2, s9, 24
; GFX7-NEXT: s_lshl_b32 s2, s2, 24
; GFX7-NEXT: s_or_b32 s1, s1, s2 ; GFX7-NEXT: s_or_b32 s1, s1, s2
; GFX7-NEXT: s_lshr_b32 s2, s5, 2 ; GFX7-NEXT: s_lshr_b32 s2, s5, 2
; GFX7-NEXT: s_cmp_eq_u32 s2, 1 ; GFX7-NEXT: s_cmp_eq_u32 s2, 1
; GFX7-NEXT: s_cselect_b32 s3, s1, s0 ; GFX7-NEXT: s_cselect_b32 s3, s1, s0
; GFX7-NEXT: s_and_b32 s5, s5, 3 ; GFX7-NEXT: s_and_b32 s5, s5, 3
; GFX7-NEXT: s_lshl_b32 s5, s5, 3 ; GFX7-NEXT: s_lshl_b32 s5, s5, 3
; GFX7-NEXT: s_and_b32 s4, s4, s10 ; GFX7-NEXT: s_and_b32 s4, s4, s10
; GFX7-NEXT: s_lshl_b32 s4, s4, s5 ; GFX7-NEXT: s_lshl_b32 s4, s4, s5
Show All 9 Lines
; GFX7-NEXT: s_lshr_b32 s5, s4, 16 ; GFX7-NEXT: s_lshr_b32 s5, s4, 16
; GFX7-NEXT: s_lshr_b32 s6, s4, 24 ; GFX7-NEXT: s_lshr_b32 s6, s4, 24
; GFX7-NEXT: s_and_b32 s4, s4, s10 ; GFX7-NEXT: s_and_b32 s4, s4, s10
; GFX7-NEXT: s_lshl_b32 s2, s2, 8 ; GFX7-NEXT: s_lshl_b32 s2, s2, 8
; GFX7-NEXT: s_or_b32 s2, s4, s2 ; GFX7-NEXT: s_or_b32 s2, s4, s2
; GFX7-NEXT: s_and_b32 s4, s5, s10 ; GFX7-NEXT: s_and_b32 s4, s5, s10
; GFX7-NEXT: s_lshl_b32 s4, s4, 16 ; GFX7-NEXT: s_lshl_b32 s4, s4, 16
; GFX7-NEXT: s_or_b32 s2, s2, s4 ; GFX7-NEXT: s_or_b32 s2, s2, s4
; GFX7-NEXT: s_and_b32 s4, s6, s10 ; GFX7-NEXT: s_lshl_b32 s4, s6, 24
; GFX7-NEXT: s_lshl_b32 s4, s4, 24
; GFX7-NEXT: s_lshr_b32 s7, s3, 8 ; GFX7-NEXT: s_lshr_b32 s7, s3, 8
; GFX7-NEXT: s_or_b32 s2, s2, s4 ; GFX7-NEXT: s_or_b32 s2, s2, s4
; GFX7-NEXT: s_and_b32 s4, s7, s10 ; GFX7-NEXT: s_and_b32 s4, s7, s10
; GFX7-NEXT: s_lshr_b32 s8, s3, 16 ; GFX7-NEXT: s_lshr_b32 s8, s3, 16
; GFX7-NEXT: s_lshr_b32 s9, s3, 24 ; GFX7-NEXT: s_lshr_b32 s9, s3, 24
; GFX7-NEXT: s_and_b32 s3, s3, s10 ; GFX7-NEXT: s_and_b32 s3, s3, s10
; GFX7-NEXT: s_lshl_b32 s4, s4, 8 ; GFX7-NEXT: s_lshl_b32 s4, s4, 8
; GFX7-NEXT: s_or_b32 s3, s3, s4 ; GFX7-NEXT: s_or_b32 s3, s3, s4
; GFX7-NEXT: s_and_b32 s4, s8, s10 ; GFX7-NEXT: s_and_b32 s4, s8, s10
; GFX7-NEXT: s_lshl_b32 s4, s4, 16 ; GFX7-NEXT: s_lshl_b32 s4, s4, 16
; GFX7-NEXT: s_or_b32 s3, s3, s4 ; GFX7-NEXT: s_or_b32 s3, s3, s4
; GFX7-NEXT: s_and_b32 s4, s9, s10 ; GFX7-NEXT: s_lshl_b32 s4, s9, 24
; GFX7-NEXT: s_lshl_b32 s4, s4, 24
; GFX7-NEXT: s_or_b32 s3, s3, s4 ; GFX7-NEXT: s_or_b32 s3, s3, s4
; GFX7-NEXT: v_mov_b32_e32 v0, s2 ; GFX7-NEXT: v_mov_b32_e32 v0, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s3 ; GFX7-NEXT: v_mov_b32_e32 v1, s3
; GFX7-NEXT: s_mov_b64 s[0:1], 0 ; GFX7-NEXT: s_mov_b64 s[0:1], 0
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <8 x i8>, <8 x i8> addrspace(4)* %ptr %vec = load <8 x i8>, <8 x i8> addrspace(4)* %ptr
%insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx
store <8 x i8> %insert, <8 x i8> addrspace(1)* null store <8 x i8> %insert, <8 x i8> addrspace(1)* null
ret void ret void
} }
define amdgpu_ps void @insertelement_v_v8i8_s_s(<8 x i8> addrspace(1)* %ptr, i8 inreg %val, i32 inreg %idx) { define amdgpu_ps void @insertelement_v_v8i8_s_s(<8 x i8> addrspace(1)* %ptr, i8 inreg %val, i32 inreg %idx) {
; GFX9-LABEL: insertelement_v_v8i8_s_s: ; GFX9-LABEL: insertelement_v_v8i8_s_s:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_mov_b32 s0, 8 ; GFX9-NEXT: s_mov_b32 s0, 8
; GFX9-NEXT: v_mov_b32_e32 v2, 8
; GFX9-NEXT: s_movk_i32 s4, 0xff ; GFX9-NEXT: s_movk_i32 s4, 0xff
; GFX9-NEXT: s_lshr_b32 s1, s3, 2 ; GFX9-NEXT: s_lshr_b32 s1, s3, 2
; GFX9-NEXT: s_and_b32 s3, s3, 3 ; GFX9-NEXT: s_and_b32 s3, s3, 3
; GFX9-NEXT: s_and_b32 s2, s2, s4 ; GFX9-NEXT: s_and_b32 s2, s2, s4
; GFX9-NEXT: s_lshl_b32 s3, s3, 3 ; GFX9-NEXT: s_lshl_b32 s3, s3, 3
; GFX9-NEXT: s_lshl_b32 s2, s2, s3 ; GFX9-NEXT: s_lshl_b32 s2, s2, s3
; GFX9-NEXT: s_lshl_b32 s3, s4, s3 ; GFX9-NEXT: s_lshl_b32 s3, s4, s3
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s1, 1 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s1, 1
; GFX9-NEXT: s_not_b32 s3, s3 ; GFX9-NEXT: s_not_b32 s3, s3
; GFX9-NEXT: v_mov_b32_e32 v3, s2 ; GFX9-NEXT: v_mov_b32_e32 v3, s2
; GFX9-NEXT: v_mov_b32_e32 v2, 8
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v4, s0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v4, s0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v6, s0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v6, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v8, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v7, v0, s4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v9, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; GFX9-NEXT: v_and_or_b32 v0, v0, s4, v4 ; GFX9-NEXT: v_and_or_b32 v0, v0, s4, v4
; GFX9-NEXT: v_and_b32_sdwa v8, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX9-NEXT: v_and_b32_sdwa v9, v1, s4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_or_b32 v1, v1, s4, v6
; GFX9-NEXT: v_and_or_b32 v1, v1, s4, v5 ; GFX9-NEXT: v_or3_b32 v0, v0, v8, v5
; GFX9-NEXT: v_or3_b32 v0, v0, v6, v7 ; GFX9-NEXT: v_or3_b32 v1, v1, v9, v7
; GFX9-NEXT: v_or3_b32 v1, v1, v8, v9
; GFX9-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc
; GFX9-NEXT: v_and_or_b32 v3, v4, s3, v3 ; GFX9-NEXT: v_and_or_b32 v3, v4, s3, v3
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], s1, 0 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], s1, 0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v3, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v3, s[0:1]
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v3, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v3, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v2, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 24, v1
; GFX9-NEXT: v_and_b32_sdwa v5, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v6, v0, s4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v7, v0, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v8, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX9-NEXT: v_and_or_b32 v0, v0, s4, v3 ; GFX9-NEXT: v_and_or_b32 v0, v0, s4, v3
; GFX9-NEXT: v_and_b32_sdwa v7, v1, s4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v8, v1, s4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v1, s4, v2 ; GFX9-NEXT: v_and_or_b32 v1, v1, s4, v2
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 24, v6
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_or3_b32 v0, v0, v5, v6 ; GFX9-NEXT: v_or3_b32 v0, v0, v7, v4
; GFX9-NEXT: v_or3_b32 v1, v1, v7, v8 ; GFX9-NEXT: v_or3_b32 v1, v1, v8, v5
; GFX9-NEXT: v_mov_b32_e32 v3, 0 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_v_v8i8_s_s: ; GFX8-LABEL: insertelement_v_v8i8_s_s:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_mov_b32_e32 v2, 8 ; GFX8-NEXT: v_mov_b32_e32 v2, 8
; GFX8-NEXT: v_mov_b32_e32 v3, 8 ; GFX8-NEXT: v_mov_b32_e32 v3, 8
; GFX8-NEXT: v_mov_b32_e32 v4, s0 ; GFX8-NEXT: v_mov_b32_e32 v4, s0
; GFX8-NEXT: s_lshr_b32 s1, s3, 2 ; GFX8-NEXT: s_lshr_b32 s1, s3, 2
; GFX8-NEXT: s_and_b32 s3, s3, 3 ; GFX8-NEXT: s_and_b32 s3, s3, 3
; GFX8-NEXT: s_lshl_b32 s3, s3, 3 ; GFX8-NEXT: s_lshl_b32 s3, s3, 3
; GFX8-NEXT: s_and_b32 s2, s2, s0 ; GFX8-NEXT: s_and_b32 s2, s2, s0
; GFX8-NEXT: s_lshl_b32 s0, s0, s3 ; GFX8-NEXT: s_lshl_b32 s0, s0, s3
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s1, 1 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s1, 1
; GFX8-NEXT: s_not_b32 s0, s0 ; GFX8-NEXT: s_not_b32 s0, s0
; GFX8-NEXT: s_lshl_b32 s2, s2, s3 ; GFX8-NEXT: s_lshl_b32 s2, s2, s3
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 24, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v3, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v6
; GFX8-NEXT: v_and_b32_sdwa v7, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v6, v3, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v8, v0, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v9, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v9, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v10, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v10, v1, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v1, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v9
; GFX8-NEXT: v_or_b32_e32 v0, v0, v7 ; GFX8-NEXT: v_lshlrev_b32_e32 v7, 24, v8
; GFX8-NEXT: v_or_b32_e32 v1, v1, v9
; GFX8-NEXT: v_or_b32_e32 v0, v0, v8
; GFX8-NEXT: v_or_b32_e32 v1, v1, v10 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v10
; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
; GFX8-NEXT: v_or_b32_e32 v1, v1, v7
; GFX8-NEXT: v_cndmask_b32_e32 v2, v0, v1, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v0, v1, vcc
; GFX8-NEXT: v_and_b32_e32 v2, s0, v2 ; GFX8-NEXT: v_and_b32_e32 v2, s0, v2
; GFX8-NEXT: v_or_b32_e32 v2, s2, v2 ; GFX8-NEXT: v_or_b32_e32 v2, s2, v2
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], s1, 0 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], s1, 0
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v3, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v3, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v6, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v7, v0, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v8, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v8, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v4, v1, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v4, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v6
; GFX8-NEXT: v_or_b32_e32 v1, v1, v8
; GFX8-NEXT: v_mov_b32_e32 v2, 0 ; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_or_b32_e32 v0, v0, v7 ; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; GFX8-NEXT: v_or_b32_e32 v0, v0, v8
; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v7
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
; GFX8-NEXT: v_or_b32_e32 v0, v0, v5
; GFX8-NEXT: v_or_b32_e32 v1, v1, v6
; GFX8-NEXT: v_mov_b32_e32 v3, 0 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v8i8_s_s: ; GFX7-LABEL: insertelement_v_v8i8_s_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
Show All 18 Lines
; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX7-NEXT: v_and_b32_e32 v3, s6, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s6, v3
; GFX7-NEXT: v_and_b32_e32 v6, s6, v6 ; GFX7-NEXT: v_and_b32_e32 v6, s6, v6
; GFX7-NEXT: v_and_b32_e32 v0, s6, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s6, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_and_b32_e32 v1, s6, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s6, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 8, v5 ; GFX7-NEXT: v_lshlrev_b32_e32 v5, 8, v5
; GFX7-NEXT: v_and_b32_e32 v4, s6, v4
; GFX7-NEXT: v_and_b32_e32 v7, s6, v7
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX7-NEXT: v_or_b32_e32 v1, v1, v5 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX7-NEXT: v_or_b32_e32 v1, v1, v6 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v6
Show All 11 Lines
; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v1
; GFX7-NEXT: v_and_b32_e32 v2, s6, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s6, v2
; GFX7-NEXT: v_and_b32_e32 v5, s6, v5 ; GFX7-NEXT: v_and_b32_e32 v5, s6, v5
; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX7-NEXT: v_and_b32_e32 v3, s6, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s6, v3
; GFX7-NEXT: v_and_b32_e32 v6, s6, v6 ; GFX7-NEXT: v_and_b32_e32 v6, s6, v6
; GFX7-NEXT: v_and_b32_e32 v0, s6, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s6, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_and_b32_e32 v1, s6, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s6, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 8, v5 ; GFX7-NEXT: v_lshlrev_b32_e32 v5, 8, v5
; GFX7-NEXT: v_and_b32_e32 v4, s6, v4
; GFX7-NEXT: v_and_b32_e32 v7, s6, v7
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX7-NEXT: v_or_b32_e32 v1, v1, v5 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX7-NEXT: v_or_b32_e32 v1, v1, v6 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v6
Show All 21 Lines
; GFX9-NEXT: s_lshr_b32 s3, s0, 16 ; GFX9-NEXT: s_lshr_b32 s3, s0, 16
; GFX9-NEXT: s_lshr_b32 s6, s0, 24 ; GFX9-NEXT: s_lshr_b32 s6, s0, 24
; GFX9-NEXT: s_and_b32 s0, s0, s10 ; GFX9-NEXT: s_and_b32 s0, s0, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 8 ; GFX9-NEXT: s_lshl_b32 s2, s2, 8
; GFX9-NEXT: s_or_b32 s0, s0, s2 ; GFX9-NEXT: s_or_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s2, s3, s10 ; GFX9-NEXT: s_and_b32 s2, s3, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 16 ; GFX9-NEXT: s_lshl_b32 s2, s2, 16
; GFX9-NEXT: s_or_b32 s0, s0, s2 ; GFX9-NEXT: s_or_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s2, s6, s10 ; GFX9-NEXT: s_lshl_b32 s2, s6, 24
; GFX9-NEXT: s_lshl_b32 s2, s2, 24
; GFX9-NEXT: s_lshr_b32 s7, s1, 8 ; GFX9-NEXT: s_lshr_b32 s7, s1, 8
; GFX9-NEXT: s_or_b32 s0, s0, s2 ; GFX9-NEXT: s_or_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s2, s7, s10 ; GFX9-NEXT: s_and_b32 s2, s7, s10
; GFX9-NEXT: s_lshr_b32 s8, s1, 16 ; GFX9-NEXT: s_lshr_b32 s8, s1, 16
; GFX9-NEXT: s_lshr_b32 s9, s1, 24 ; GFX9-NEXT: s_lshr_b32 s9, s1, 24
; GFX9-NEXT: s_and_b32 s1, s1, s10 ; GFX9-NEXT: s_and_b32 s1, s1, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 8 ; GFX9-NEXT: s_lshl_b32 s2, s2, 8
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s8, s10 ; GFX9-NEXT: s_and_b32 s2, s8, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 16 ; GFX9-NEXT: s_lshl_b32 s2, s2, 16
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s9, s10 ; GFX9-NEXT: s_lshl_b32 s2, s9, 24
; GFX9-NEXT: s_lshl_b32 s2, s2, 24
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_lshr_b32 s2, s4, 2 ; GFX9-NEXT: s_lshr_b32 s2, s4, 2
; GFX9-NEXT: s_cmp_eq_u32 s2, 1 ; GFX9-NEXT: s_cmp_eq_u32 s2, 1
; GFX9-NEXT: s_cselect_b32 s3, s1, s0 ; GFX9-NEXT: s_cselect_b32 s3, s1, s0
; GFX9-NEXT: s_and_b32 s4, s4, 3 ; GFX9-NEXT: s_and_b32 s4, s4, 3
; GFX9-NEXT: s_lshl_b32 s4, s4, 3 ; GFX9-NEXT: s_lshl_b32 s4, s4, 3
; GFX9-NEXT: s_lshl_b32 s6, s10, s4 ; GFX9-NEXT: s_lshl_b32 s6, s10, s4
; GFX9-NEXT: s_andn2_b32 s3, s3, s6 ; GFX9-NEXT: s_andn2_b32 s3, s3, s6
; GFX9-NEXT: v_mov_b32_e32 v1, s3 ; GFX9-NEXT: v_mov_b32_e32 v1, s3
; GFX9-NEXT: v_lshl_or_b32 v2, v0, s4, v1 ; GFX9-NEXT: v_lshl_or_b32 v2, v0, s4, v1
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s2, 0 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s2, 0
; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s2, 1 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s2, 1
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; GFX9-NEXT: v_and_or_b32 v2, v0, s10, v2 ; GFX9-NEXT: v_and_or_b32 v2, v0, s10, v2
; GFX9-NEXT: v_and_b32_sdwa v4, v0, s10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v1
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s10 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v0, v0, s10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_or3_b32 v0, v2, v4, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s5, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_or3_b32 v0, v2, v0, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v1
; GFX9-NEXT: v_and_or_b32 v2, v1, s10, v2 ; GFX9-NEXT: v_and_or_b32 v2, v1, s10, v2
; GFX9-NEXT: v_and_b32_sdwa v3, v1, s10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v1, v1, s10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s10 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 24, v5
; GFX9-NEXT: v_or3_b32 v1, v2, v3, v1 ; GFX9-NEXT: v_or3_b32 v1, v2, v1, v3
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_mov_b32_e32 v3, 0 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v8i8_v_s: ; GFX8-LABEL: insertelement_s_v8i8_v_s:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GFX8-NEXT: s_movk_i32 s9, 0xff ; GFX8-NEXT: s_movk_i32 s9, 0xff
; GFX8-NEXT: v_mov_b32_e32 v4, 8 ; GFX8-NEXT: v_mov_b32_e32 v6, 8
; GFX8-NEXT: v_mov_b32_e32 v7, s9
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s2, s0, 8 ; GFX8-NEXT: s_lshr_b32 s2, s0, 8
; GFX8-NEXT: s_and_b32 s2, s2, s9 ; GFX8-NEXT: s_and_b32 s2, s2, s9
; GFX8-NEXT: s_lshr_b32 s3, s0, 16 ; GFX8-NEXT: s_lshr_b32 s3, s0, 16
; GFX8-NEXT: s_lshr_b32 s5, s0, 24 ; GFX8-NEXT: s_lshr_b32 s5, s0, 24
; GFX8-NEXT: s_and_b32 s0, s0, s9 ; GFX8-NEXT: s_and_b32 s0, s0, s9
; GFX8-NEXT: s_lshl_b32 s2, s2, 8 ; GFX8-NEXT: s_lshl_b32 s2, s2, 8
; GFX8-NEXT: s_or_b32 s0, s0, s2 ; GFX8-NEXT: s_or_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s2, s3, s9 ; GFX8-NEXT: s_and_b32 s2, s3, s9
; GFX8-NEXT: s_lshl_b32 s2, s2, 16 ; GFX8-NEXT: s_lshl_b32 s2, s2, 16
; GFX8-NEXT: s_or_b32 s0, s0, s2 ; GFX8-NEXT: s_or_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s2, s5, s9 ; GFX8-NEXT: s_lshl_b32 s2, s5, 24
; GFX8-NEXT: s_lshl_b32 s2, s2, 24
; GFX8-NEXT: s_lshr_b32 s6, s1, 8 ; GFX8-NEXT: s_lshr_b32 s6, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s2 ; GFX8-NEXT: s_or_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s2, s6, s9 ; GFX8-NEXT: s_and_b32 s2, s6, s9
; GFX8-NEXT: s_lshr_b32 s7, s1, 16 ; GFX8-NEXT: s_lshr_b32 s7, s1, 16
; GFX8-NEXT: s_lshr_b32 s8, s1, 24 ; GFX8-NEXT: s_lshr_b32 s8, s1, 24
; GFX8-NEXT: s_and_b32 s1, s1, s9 ; GFX8-NEXT: s_and_b32 s1, s1, s9
; GFX8-NEXT: s_lshl_b32 s2, s2, 8 ; GFX8-NEXT: s_lshl_b32 s2, s2, 8
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: s_and_b32 s2, s7, s9 ; GFX8-NEXT: s_and_b32 s2, s7, s9
; GFX8-NEXT: s_lshl_b32 s2, s2, 16 ; GFX8-NEXT: s_lshl_b32 s2, s2, 16
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: s_and_b32 s2, s8, s9 ; GFX8-NEXT: s_lshl_b32 s2, s8, 24
; GFX8-NEXT: s_lshl_b32 s2, s2, 24
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: s_lshr_b32 s2, s4, 2 ; GFX8-NEXT: s_lshr_b32 s2, s4, 2
; GFX8-NEXT: s_cmp_eq_u32 s2, 1 ; GFX8-NEXT: s_cmp_eq_u32 s2, 1
; GFX8-NEXT: s_cselect_b32 s3, s1, s0 ; GFX8-NEXT: s_cselect_b32 s3, s1, s0
; GFX8-NEXT: s_and_b32 s4, s4, 3 ; GFX8-NEXT: s_and_b32 s4, s4, 3
; GFX8-NEXT: s_lshl_b32 s4, s4, 3 ; GFX8-NEXT: s_lshl_b32 s4, s4, 3
; GFX8-NEXT: v_mov_b32_e32 v1, s4 ; GFX8-NEXT: v_mov_b32_e32 v1, s4
; GFX8-NEXT: s_lshl_b32 s4, s9, s4 ; GFX8-NEXT: s_lshl_b32 s4, s9, s4
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: s_andn2_b32 s3, s3, s4 ; GFX8-NEXT: s_andn2_b32 s3, s3, s4
; GFX8-NEXT: v_or_b32_e32 v2, s3, v0 ; GFX8-NEXT: v_or_b32_e32 v2, s3, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s2, 0 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s2, 0
; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s2, 1 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s2, 1
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v6, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_mov_b32_e32 v4, s9 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v2, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v2, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v5, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v0, v0, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v2, v2, v5
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v2, v0 ; GFX8-NEXT: v_or_b32_e32 v0, v2, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 24, v3
; GFX8-NEXT: v_mov_b32_e32 v2, 8 ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v6, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 24, v1
; GFX8-NEXT: v_or_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v3, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v1, v1, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v2, v2, v3
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v2, v1 ; GFX8-NEXT: v_or_b32_e32 v1, v2, v1
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 24, v5
; GFX8-NEXT: v_or_b32_e32 v1, v1, v2
; GFX8-NEXT: v_mov_b32_e32 v2, 0 ; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_mov_b32_e32 v3, 0 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v8i8_v_s: ; GFX7-LABEL: insertelement_s_v8i8_v_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GFX7-NEXT: s_movk_i32 s9, 0xff ; GFX7-NEXT: s_movk_i32 s9, 0xff
; GFX7-NEXT: v_and_b32_e32 v0, s9, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s9, v0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s2, s0, 8 ; GFX7-NEXT: s_lshr_b32 s2, s0, 8
; GFX7-NEXT: s_and_b32 s2, s2, s9 ; GFX7-NEXT: s_and_b32 s2, s2, s9
; GFX7-NEXT: s_lshr_b32 s3, s0, 16 ; GFX7-NEXT: s_lshr_b32 s3, s0, 16
; GFX7-NEXT: s_lshr_b32 s5, s0, 24 ; GFX7-NEXT: s_lshr_b32 s5, s0, 24
; GFX7-NEXT: s_and_b32 s0, s0, s9 ; GFX7-NEXT: s_and_b32 s0, s0, s9
; GFX7-NEXT: s_lshl_b32 s2, s2, 8 ; GFX7-NEXT: s_lshl_b32 s2, s2, 8
; GFX7-NEXT: s_or_b32 s0, s0, s2 ; GFX7-NEXT: s_or_b32 s0, s0, s2
; GFX7-NEXT: s_and_b32 s2, s3, s9 ; GFX7-NEXT: s_and_b32 s2, s3, s9
; GFX7-NEXT: s_lshl_b32 s2, s2, 16 ; GFX7-NEXT: s_lshl_b32 s2, s2, 16
; GFX7-NEXT: s_or_b32 s0, s0, s2 ; GFX7-NEXT: s_or_b32 s0, s0, s2
; GFX7-NEXT: s_and_b32 s2, s5, s9 ; GFX7-NEXT: s_lshl_b32 s2, s5, 24
; GFX7-NEXT: s_lshl_b32 s2, s2, 24
; GFX7-NEXT: s_lshr_b32 s6, s1, 8 ; GFX7-NEXT: s_lshr_b32 s6, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s2 ; GFX7-NEXT: s_or_b32 s0, s0, s2
; GFX7-NEXT: s_and_b32 s2, s6, s9 ; GFX7-NEXT: s_and_b32 s2, s6, s9
; GFX7-NEXT: s_lshr_b32 s7, s1, 16 ; GFX7-NEXT: s_lshr_b32 s7, s1, 16
; GFX7-NEXT: s_lshr_b32 s8, s1, 24 ; GFX7-NEXT: s_lshr_b32 s8, s1, 24
; GFX7-NEXT: s_and_b32 s1, s1, s9 ; GFX7-NEXT: s_and_b32 s1, s1, s9
; GFX7-NEXT: s_lshl_b32 s2, s2, 8 ; GFX7-NEXT: s_lshl_b32 s2, s2, 8
; GFX7-NEXT: s_or_b32 s1, s1, s2 ; GFX7-NEXT: s_or_b32 s1, s1, s2
; GFX7-NEXT: s_and_b32 s2, s7, s9 ; GFX7-NEXT: s_and_b32 s2, s7, s9
; GFX7-NEXT: s_lshl_b32 s2, s2, 16 ; GFX7-NEXT: s_lshl_b32 s2, s2, 16
; GFX7-NEXT: s_or_b32 s1, s1, s2 ; GFX7-NEXT: s_or_b32 s1, s1, s2
; GFX7-NEXT: s_and_b32 s2, s8, s9 ; GFX7-NEXT: s_lshl_b32 s2, s8, 24
; GFX7-NEXT: s_lshl_b32 s2, s2, 24
; GFX7-NEXT: s_or_b32 s1, s1, s2 ; GFX7-NEXT: s_or_b32 s1, s1, s2
; GFX7-NEXT: s_lshr_b32 s2, s4, 2 ; GFX7-NEXT: s_lshr_b32 s2, s4, 2
; GFX7-NEXT: s_cmp_eq_u32 s2, 1 ; GFX7-NEXT: s_cmp_eq_u32 s2, 1
; GFX7-NEXT: s_cselect_b32 s3, s1, s0 ; GFX7-NEXT: s_cselect_b32 s3, s1, s0
; GFX7-NEXT: s_and_b32 s4, s4, 3 ; GFX7-NEXT: s_and_b32 s4, s4, 3
; GFX7-NEXT: s_lshl_b32 s4, s4, 3 ; GFX7-NEXT: s_lshl_b32 s4, s4, 3
; GFX7-NEXT: v_lshlrev_b32_e32 v0, s4, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, s4, v0
; GFX7-NEXT: s_lshl_b32 s4, s9, s4 ; GFX7-NEXT: s_lshl_b32 s4, s9, s4
Show All 10 Lines
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s9, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s9, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v2, s9, v3 ; GFX7-NEXT: v_and_b32_e32 v2, s9, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v2, s9, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 8, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v2, s9, v5 ; GFX7-NEXT: v_and_b32_e32 v2, s9, v5
; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s9, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s9, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_and_b32_e32 v2, s9, v6 ; GFX7-NEXT: v_and_b32_e32 v2, s9, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_and_b32_e32 v2, s9, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v7
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX7-NEXT: s_mov_b64 s[0:1], 0 ; GFX7-NEXT: s_mov_b64 s[0:1], 0
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <8 x i8>, <8 x i8> addrspace(4)* %ptr %vec = load <8 x i8>, <8 x i8> addrspace(4)* %ptr
%insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx
Show All 15 Lines
; GFX9-NEXT: s_lshr_b32 s3, s0, 16 ; GFX9-NEXT: s_lshr_b32 s3, s0, 16
; GFX9-NEXT: s_lshr_b32 s6, s0, 24 ; GFX9-NEXT: s_lshr_b32 s6, s0, 24
; GFX9-NEXT: s_and_b32 s0, s0, s10 ; GFX9-NEXT: s_and_b32 s0, s0, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 8 ; GFX9-NEXT: s_lshl_b32 s2, s2, 8
; GFX9-NEXT: s_or_b32 s0, s0, s2 ; GFX9-NEXT: s_or_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s2, s3, s10 ; GFX9-NEXT: s_and_b32 s2, s3, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 16 ; GFX9-NEXT: s_lshl_b32 s2, s2, 16
; GFX9-NEXT: s_or_b32 s0, s0, s2 ; GFX9-NEXT: s_or_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s2, s6, s10 ; GFX9-NEXT: s_lshl_b32 s2, s6, 24
; GFX9-NEXT: s_lshl_b32 s2, s2, 24
; GFX9-NEXT: s_lshr_b32 s7, s1, 8 ; GFX9-NEXT: s_lshr_b32 s7, s1, 8
; GFX9-NEXT: s_or_b32 s0, s0, s2 ; GFX9-NEXT: s_or_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s2, s7, s10 ; GFX9-NEXT: s_and_b32 s2, s7, s10
; GFX9-NEXT: s_lshr_b32 s8, s1, 16 ; GFX9-NEXT: s_lshr_b32 s8, s1, 16
; GFX9-NEXT: s_lshr_b32 s9, s1, 24 ; GFX9-NEXT: s_lshr_b32 s9, s1, 24
; GFX9-NEXT: s_and_b32 s1, s1, s10 ; GFX9-NEXT: s_and_b32 s1, s1, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 8 ; GFX9-NEXT: s_lshl_b32 s2, s2, 8
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s8, s10 ; GFX9-NEXT: s_and_b32 s2, s8, s10
; GFX9-NEXT: s_lshl_b32 s2, s2, 16 ; GFX9-NEXT: s_lshl_b32 s2, s2, 16
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s9, s10 ; GFX9-NEXT: s_lshl_b32 s2, s9, 24
; GFX9-NEXT: s_lshl_b32 s2, s2, 24
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: v_mov_b32_e32 v1, s0 ; GFX9-NEXT: v_mov_b32_e32 v1, s0
; GFX9-NEXT: v_mov_b32_e32 v3, s1 ; GFX9-NEXT: v_mov_b32_e32 v3, s1
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 3, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX9-NEXT: s_and_b32 s2, s4, s10 ; GFX9-NEXT: s_and_b32 s2, s4, s10
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; GFX9-NEXT: v_lshlrev_b32_e64 v3, v0, s2 ; GFX9-NEXT: v_lshlrev_b32_e64 v3, v0, s2
; GFX9-NEXT: v_lshlrev_b32_e64 v0, v0, s10 ; GFX9-NEXT: v_lshlrev_b32_e64 v0, v0, s10
; GFX9-NEXT: v_xor_b32_e32 v0, -1, v0 ; GFX9-NEXT: v_xor_b32_e32 v0, -1, v0
; GFX9-NEXT: v_and_or_b32 v3, v1, v0, v3 ; GFX9-NEXT: v_and_or_b32 v3, v1, v0, v3
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v3, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v3, s[0:1]
; GFX9-NEXT: s_mov_b32 s5, 8 ; GFX9-NEXT: s_mov_b32 s5, 8
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; GFX9-NEXT: v_and_or_b32 v2, v0, s10, v2 ; GFX9-NEXT: v_and_or_b32 v2, v0, s10, v2
; GFX9-NEXT: v_and_b32_sdwa v4, v0, s10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v1
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s10 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v0, v0, s10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_or3_b32 v0, v2, v4, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s5, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_or3_b32 v0, v2, v0, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v1
; GFX9-NEXT: v_and_or_b32 v2, v1, s10, v2 ; GFX9-NEXT: v_and_or_b32 v2, v1, s10, v2
; GFX9-NEXT: v_and_b32_sdwa v3, v1, s10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v1, v1, s10 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s10 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 24, v5
; GFX9-NEXT: v_or3_b32 v1, v2, v3, v1 ; GFX9-NEXT: v_or3_b32 v1, v2, v1, v3
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_mov_b32_e32 v3, 0 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v8i8_s_v: ; GFX8-LABEL: insertelement_s_v8i8_s_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GFX8-NEXT: s_movk_i32 s9, 0xff ; GFX8-NEXT: s_movk_i32 s9, 0xff
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 2, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 2, v0
; GFX8-NEXT: v_and_b32_e32 v0, 3, v0 ; GFX8-NEXT: v_and_b32_e32 v0, 3, v0
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s2, s0, 8 ; GFX8-NEXT: s_lshr_b32 s2, s0, 8
; GFX8-NEXT: s_and_b32 s2, s2, s9 ; GFX8-NEXT: s_and_b32 s2, s2, s9
; GFX8-NEXT: s_lshr_b32 s3, s0, 16 ; GFX8-NEXT: s_lshr_b32 s3, s0, 16
; GFX8-NEXT: s_lshr_b32 s5, s0, 24 ; GFX8-NEXT: s_lshr_b32 s5, s0, 24
; GFX8-NEXT: s_and_b32 s0, s0, s9 ; GFX8-NEXT: s_and_b32 s0, s0, s9
; GFX8-NEXT: s_lshl_b32 s2, s2, 8 ; GFX8-NEXT: s_lshl_b32 s2, s2, 8
; GFX8-NEXT: s_or_b32 s0, s0, s2 ; GFX8-NEXT: s_or_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s2, s3, s9 ; GFX8-NEXT: s_and_b32 s2, s3, s9
; GFX8-NEXT: s_lshl_b32 s2, s2, 16 ; GFX8-NEXT: s_lshl_b32 s2, s2, 16
; GFX8-NEXT: s_or_b32 s0, s0, s2 ; GFX8-NEXT: s_or_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s2, s5, s9 ; GFX8-NEXT: s_lshl_b32 s2, s5, 24
; GFX8-NEXT: s_lshl_b32 s2, s2, 24
; GFX8-NEXT: s_lshr_b32 s6, s1, 8 ; GFX8-NEXT: s_lshr_b32 s6, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s2 ; GFX8-NEXT: s_or_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s2, s6, s9 ; GFX8-NEXT: s_and_b32 s2, s6, s9
; GFX8-NEXT: s_lshr_b32 s7, s1, 16 ; GFX8-NEXT: s_lshr_b32 s7, s1, 16
; GFX8-NEXT: s_lshr_b32 s8, s1, 24 ; GFX8-NEXT: s_lshr_b32 s8, s1, 24
; GFX8-NEXT: s_and_b32 s1, s1, s9 ; GFX8-NEXT: s_and_b32 s1, s1, s9
; GFX8-NEXT: s_lshl_b32 s2, s2, 8 ; GFX8-NEXT: s_lshl_b32 s2, s2, 8
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: s_and_b32 s2, s7, s9 ; GFX8-NEXT: s_and_b32 s2, s7, s9
; GFX8-NEXT: s_lshl_b32 s2, s2, 16 ; GFX8-NEXT: s_lshl_b32 s2, s2, 16
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: s_and_b32 s2, s8, s9 ; GFX8-NEXT: s_lshl_b32 s2, s8, 24
; GFX8-NEXT: s_lshl_b32 s2, s2, 24
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: v_mov_b32_e32 v1, s0 ; GFX8-NEXT: v_mov_b32_e32 v1, s0
; GFX8-NEXT: v_mov_b32_e32 v3, s1 ; GFX8-NEXT: v_mov_b32_e32 v3, s1
; GFX8-NEXT: v_lshlrev_b32_e32 v0, 3, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX8-NEXT: s_and_b32 s2, s4, s9 ; GFX8-NEXT: s_and_b32 s2, s4, s9
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; GFX8-NEXT: v_lshlrev_b32_e64 v3, v0, s2 ; GFX8-NEXT: v_lshlrev_b32_e64 v3, v0, s2
; GFX8-NEXT: v_lshlrev_b32_e64 v0, v0, s9 ; GFX8-NEXT: v_lshlrev_b32_e64 v0, v0, s9
; GFX8-NEXT: v_xor_b32_e32 v0, -1, v0 ; GFX8-NEXT: v_xor_b32_e32 v0, -1, v0
; GFX8-NEXT: v_and_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_and_b32_e32 v0, v1, v0
; GFX8-NEXT: v_or_b32_e32 v3, v0, v3 ; GFX8-NEXT: v_or_b32_e32 v3, v0, v3
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v3, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v3, s[0:1]
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX8-NEXT: v_mov_b32_e32 v4, 8 ; GFX8-NEXT: v_mov_b32_e32 v6, 8
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v6, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_mov_b32_e32 v4, s9 ; GFX8-NEXT: v_mov_b32_e32 v7, s9
; GFX8-NEXT: v_or_b32_sdwa v2, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v5, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; GFX8-NEXT: v_or_b32_e32 v2, v2, v5 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v2, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v2, v0 ; GFX8-NEXT: v_or_b32_e32 v0, v2, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 24, v3
; GFX8-NEXT: v_mov_b32_e32 v2, 8 ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v6, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 24, v1
; GFX8-NEXT: v_or_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v3, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v1, v1, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v2, v2, v3
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v2, v1 ; GFX8-NEXT: v_or_b32_e32 v1, v2, v1
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 24, v5
; GFX8-NEXT: v_or_b32_e32 v1, v1, v2
; GFX8-NEXT: v_mov_b32_e32 v2, 0 ; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_mov_b32_e32 v3, 0 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v8i8_s_v: ; GFX7-LABEL: insertelement_s_v8i8_s_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GFX7-NEXT: s_movk_i32 s9, 0xff ; GFX7-NEXT: s_movk_i32 s9, 0xff
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 2, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 2, v0
; GFX7-NEXT: v_and_b32_e32 v0, 3, v0 ; GFX7-NEXT: v_and_b32_e32 v0, 3, v0
; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 ; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s2, s0, 8 ; GFX7-NEXT: s_lshr_b32 s2, s0, 8
; GFX7-NEXT: s_and_b32 s2, s2, s9 ; GFX7-NEXT: s_and_b32 s2, s2, s9
; GFX7-NEXT: s_lshr_b32 s3, s0, 16 ; GFX7-NEXT: s_lshr_b32 s3, s0, 16
; GFX7-NEXT: s_lshr_b32 s5, s0, 24 ; GFX7-NEXT: s_lshr_b32 s5, s0, 24
; GFX7-NEXT: s_and_b32 s0, s0, s9 ; GFX7-NEXT: s_and_b32 s0, s0, s9
; GFX7-NEXT: s_lshl_b32 s2, s2, 8 ; GFX7-NEXT: s_lshl_b32 s2, s2, 8
; GFX7-NEXT: s_or_b32 s0, s0, s2 ; GFX7-NEXT: s_or_b32 s0, s0, s2
; GFX7-NEXT: s_and_b32 s2, s3, s9 ; GFX7-NEXT: s_and_b32 s2, s3, s9
; GFX7-NEXT: s_lshl_b32 s2, s2, 16 ; GFX7-NEXT: s_lshl_b32 s2, s2, 16
; GFX7-NEXT: s_or_b32 s0, s0, s2 ; GFX7-NEXT: s_or_b32 s0, s0, s2
; GFX7-NEXT: s_and_b32 s2, s5, s9 ; GFX7-NEXT: s_lshl_b32 s2, s5, 24
; GFX7-NEXT: s_lshl_b32 s2, s2, 24
; GFX7-NEXT: s_lshr_b32 s6, s1, 8 ; GFX7-NEXT: s_lshr_b32 s6, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s2 ; GFX7-NEXT: s_or_b32 s0, s0, s2
; GFX7-NEXT: s_and_b32 s2, s6, s9 ; GFX7-NEXT: s_and_b32 s2, s6, s9
; GFX7-NEXT: s_lshr_b32 s7, s1, 16 ; GFX7-NEXT: s_lshr_b32 s7, s1, 16
; GFX7-NEXT: s_lshr_b32 s8, s1, 24 ; GFX7-NEXT: s_lshr_b32 s8, s1, 24
; GFX7-NEXT: s_and_b32 s1, s1, s9 ; GFX7-NEXT: s_and_b32 s1, s1, s9
; GFX7-NEXT: s_lshl_b32 s2, s2, 8 ; GFX7-NEXT: s_lshl_b32 s2, s2, 8
; GFX7-NEXT: s_or_b32 s1, s1, s2 ; GFX7-NEXT: s_or_b32 s1, s1, s2
; GFX7-NEXT: s_and_b32 s2, s7, s9 ; GFX7-NEXT: s_and_b32 s2, s7, s9
; GFX7-NEXT: s_lshl_b32 s2, s2, 16 ; GFX7-NEXT: s_lshl_b32 s2, s2, 16
; GFX7-NEXT: s_or_b32 s1, s1, s2 ; GFX7-NEXT: s_or_b32 s1, s1, s2
; GFX7-NEXT: s_and_b32 s2, s8, s9 ; GFX7-NEXT: s_lshl_b32 s2, s8, 24
; GFX7-NEXT: s_lshl_b32 s2, s2, 24
; GFX7-NEXT: s_or_b32 s1, s1, s2 ; GFX7-NEXT: s_or_b32 s1, s1, s2
; GFX7-NEXT: v_mov_b32_e32 v1, s0 ; GFX7-NEXT: v_mov_b32_e32 v1, s0
; GFX7-NEXT: v_mov_b32_e32 v3, s1 ; GFX7-NEXT: v_mov_b32_e32 v3, s1
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 3, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX7-NEXT: s_and_b32 s2, s4, s9 ; GFX7-NEXT: s_and_b32 s2, s4, s9
; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; GFX7-NEXT: v_lshl_b32_e32 v3, s2, v0 ; GFX7-NEXT: v_lshl_b32_e32 v3, s2, v0
; GFX7-NEXT: v_lshl_b32_e32 v0, s9, v0 ; GFX7-NEXT: v_lshl_b32_e32 v0, s9, v0
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; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s9, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s9, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v2, s9, v3 ; GFX7-NEXT: v_and_b32_e32 v2, s9, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v2, s9, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 8, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v2, s9, v5 ; GFX7-NEXT: v_and_b32_e32 v2, s9, v5
; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s9, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s9, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_and_b32_e32 v2, s9, v6 ; GFX7-NEXT: v_and_b32_e32 v2, s9, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_and_b32_e32 v2, s9, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v7
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX7-NEXT: s_mov_b64 s[0:1], 0 ; GFX7-NEXT: s_mov_b64 s[0:1], 0
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <8 x i8>, <8 x i8> addrspace(4)* %ptr %vec = load <8 x i8>, <8 x i8> addrspace(4)* %ptr
%insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx
Show All 15 Lines
; GFX9-NEXT: s_lshr_b32 s3, s0, 16 ; GFX9-NEXT: s_lshr_b32 s3, s0, 16
; GFX9-NEXT: s_lshr_b32 s5, s0, 24 ; GFX9-NEXT: s_lshr_b32 s5, s0, 24
; GFX9-NEXT: s_and_b32 s0, s0, s9 ; GFX9-NEXT: s_and_b32 s0, s0, s9
; GFX9-NEXT: s_lshl_b32 s2, s2, 8 ; GFX9-NEXT: s_lshl_b32 s2, s2, 8
; GFX9-NEXT: s_or_b32 s0, s0, s2 ; GFX9-NEXT: s_or_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s2, s3, s9 ; GFX9-NEXT: s_and_b32 s2, s3, s9
; GFX9-NEXT: s_lshl_b32 s2, s2, 16 ; GFX9-NEXT: s_lshl_b32 s2, s2, 16
; GFX9-NEXT: s_or_b32 s0, s0, s2 ; GFX9-NEXT: s_or_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s2, s5, s9 ; GFX9-NEXT: s_lshl_b32 s2, s5, 24
; GFX9-NEXT: s_lshl_b32 s2, s2, 24
; GFX9-NEXT: s_lshr_b32 s6, s1, 8 ; GFX9-NEXT: s_lshr_b32 s6, s1, 8
; GFX9-NEXT: s_or_b32 s0, s0, s2 ; GFX9-NEXT: s_or_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s2, s6, s9 ; GFX9-NEXT: s_and_b32 s2, s6, s9
; GFX9-NEXT: s_lshr_b32 s7, s1, 16 ; GFX9-NEXT: s_lshr_b32 s7, s1, 16
; GFX9-NEXT: s_lshr_b32 s8, s1, 24 ; GFX9-NEXT: s_lshr_b32 s8, s1, 24
; GFX9-NEXT: s_and_b32 s1, s1, s9 ; GFX9-NEXT: s_and_b32 s1, s1, s9
; GFX9-NEXT: s_lshl_b32 s2, s2, 8 ; GFX9-NEXT: s_lshl_b32 s2, s2, 8
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s7, s9 ; GFX9-NEXT: s_and_b32 s2, s7, s9
; GFX9-NEXT: s_lshl_b32 s2, s2, 16 ; GFX9-NEXT: s_lshl_b32 s2, s2, 16
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: s_and_b32 s2, s8, s9 ; GFX9-NEXT: s_lshl_b32 s2, s8, 24
; GFX9-NEXT: s_lshl_b32 s2, s2, 24
; GFX9-NEXT: s_or_b32 s1, s1, s2 ; GFX9-NEXT: s_or_b32 s1, s1, s2
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_e64 v1, v1, s9 ; GFX9-NEXT: v_lshlrev_b32_e64 v1, v1, s9
; GFX9-NEXT: v_mov_b32_e32 v3, s0 ; GFX9-NEXT: v_mov_b32_e32 v3, s0
; GFX9-NEXT: v_mov_b32_e32 v4, s1 ; GFX9-NEXT: v_mov_b32_e32 v4, s1
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2
; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX9-NEXT: v_and_or_b32 v3, v3, v1, v0 ; GFX9-NEXT: v_and_or_b32 v3, v3, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v3, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v3, s[0:1]
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v1
; GFX9-NEXT: v_and_or_b32 v2, v0, s9, v2 ; GFX9-NEXT: v_and_or_b32 v2, v0, s9, v2
; GFX9-NEXT: v_and_b32_sdwa v4, v0, s9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v1
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s9 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v0, v0, s9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_or3_b32 v0, v2, v4, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_or3_b32 v0, v2, v0, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s4, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v1
; GFX9-NEXT: v_and_or_b32 v2, v1, s9, v2 ; GFX9-NEXT: v_and_or_b32 v2, v1, s9, v2
; GFX9-NEXT: v_and_b32_sdwa v3, v1, s9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v1, v1, s9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s9 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 24, v5
; GFX9-NEXT: v_or3_b32 v1, v2, v3, v1 ; GFX9-NEXT: v_or3_b32 v1, v2, v1, v3
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_mov_b32_e32 v3, 0 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v8i8_v_v: ; GFX8-LABEL: insertelement_s_v8i8_v_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX8-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GFX8-NEXT: s_movk_i32 s8, 0xff ; GFX8-NEXT: s_movk_i32 s8, 0xff
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 2, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 2, v1
; GFX8-NEXT: v_and_b32_e32 v1, 3, v1 ; GFX8-NEXT: v_and_b32_e32 v1, 3, v1
; GFX8-NEXT: v_lshlrev_b32_e32 v1, 3, v1 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 3, v1
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s2, s0, 8 ; GFX8-NEXT: s_lshr_b32 s2, s0, 8
; GFX8-NEXT: s_and_b32 s2, s2, s8 ; GFX8-NEXT: s_and_b32 s2, s2, s8
; GFX8-NEXT: s_lshr_b32 s3, s0, 16 ; GFX8-NEXT: s_lshr_b32 s3, s0, 16
; GFX8-NEXT: s_lshr_b32 s4, s0, 24 ; GFX8-NEXT: s_lshr_b32 s4, s0, 24
; GFX8-NEXT: s_and_b32 s0, s0, s8 ; GFX8-NEXT: s_and_b32 s0, s0, s8
; GFX8-NEXT: s_lshl_b32 s2, s2, 8 ; GFX8-NEXT: s_lshl_b32 s2, s2, 8
; GFX8-NEXT: s_or_b32 s0, s0, s2 ; GFX8-NEXT: s_or_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s2, s3, s8 ; GFX8-NEXT: s_and_b32 s2, s3, s8
; GFX8-NEXT: s_lshl_b32 s2, s2, 16 ; GFX8-NEXT: s_lshl_b32 s2, s2, 16
; GFX8-NEXT: s_or_b32 s0, s0, s2 ; GFX8-NEXT: s_or_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s2, s4, s8 ; GFX8-NEXT: s_lshl_b32 s2, s4, 24
; GFX8-NEXT: s_lshl_b32 s2, s2, 24
; GFX8-NEXT: s_lshr_b32 s5, s1, 8 ; GFX8-NEXT: s_lshr_b32 s5, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s2 ; GFX8-NEXT: s_or_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s2, s5, s8 ; GFX8-NEXT: s_and_b32 s2, s5, s8
; GFX8-NEXT: s_lshr_b32 s6, s1, 16 ; GFX8-NEXT: s_lshr_b32 s6, s1, 16
; GFX8-NEXT: s_lshr_b32 s7, s1, 24 ; GFX8-NEXT: s_lshr_b32 s7, s1, 24
; GFX8-NEXT: s_and_b32 s1, s1, s8 ; GFX8-NEXT: s_and_b32 s1, s1, s8
; GFX8-NEXT: s_lshl_b32 s2, s2, 8 ; GFX8-NEXT: s_lshl_b32 s2, s2, 8
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: s_and_b32 s2, s6, s8 ; GFX8-NEXT: s_and_b32 s2, s6, s8
; GFX8-NEXT: s_lshl_b32 s2, s2, 16 ; GFX8-NEXT: s_lshl_b32 s2, s2, 16
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: s_and_b32 s2, s7, s8 ; GFX8-NEXT: s_lshl_b32 s2, s7, 24
; GFX8-NEXT: s_lshl_b32 s2, s2, 24
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_e64 v1, v1, s8 ; GFX8-NEXT: v_lshlrev_b32_e64 v1, v1, s8
; GFX8-NEXT: v_mov_b32_e32 v3, s0 ; GFX8-NEXT: v_mov_b32_e32 v3, s0
; GFX8-NEXT: v_mov_b32_e32 v4, s1 ; GFX8-NEXT: v_mov_b32_e32 v4, s1
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX8-NEXT: v_and_b32_e32 v1, v3, v1 ; GFX8-NEXT: v_and_b32_e32 v1, v3, v1
; GFX8-NEXT: v_or_b32_e32 v3, v1, v0 ; GFX8-NEXT: v_or_b32_e32 v3, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v2
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v3, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v3, s[0:1]
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX8-NEXT: v_mov_b32_e32 v4, 8 ; GFX8-NEXT: v_mov_b32_e32 v6, 8
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v6, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_mov_b32_e32 v4, s8 ; GFX8-NEXT: v_mov_b32_e32 v7, s8
; GFX8-NEXT: v_or_b32_sdwa v2, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v5, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
; GFX8-NEXT: v_or_b32_e32 v2, v2, v5 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v2, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v2, v0 ; GFX8-NEXT: v_or_b32_e32 v0, v2, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 24, v3
; GFX8-NEXT: v_mov_b32_e32 v2, 8 ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v2
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v6, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 24, v1
; GFX8-NEXT: v_or_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v2, v1, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v3, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v1, v1, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v2, v2, v3
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v2, v1 ; GFX8-NEXT: v_or_b32_e32 v1, v2, v1
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 24, v5
; GFX8-NEXT: v_or_b32_e32 v1, v1, v2
; GFX8-NEXT: v_mov_b32_e32 v2, 0 ; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_mov_b32_e32 v3, 0 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v8i8_v_v: ; GFX7-LABEL: insertelement_s_v8i8_v_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0 ; GFX7-NEXT: s_load_dwordx2 s[0:1], s[2:3], 0x0
; GFX7-NEXT: s_movk_i32 s8, 0xff ; GFX7-NEXT: s_movk_i32 s8, 0xff
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 2, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 2, v1
; GFX7-NEXT: v_and_b32_e32 v1, 3, v1 ; GFX7-NEXT: v_and_b32_e32 v1, 3, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 3, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 3, v1
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s2, s0, 8 ; GFX7-NEXT: s_lshr_b32 s2, s0, 8
; GFX7-NEXT: s_and_b32 s2, s2, s8 ; GFX7-NEXT: s_and_b32 s2, s2, s8
; GFX7-NEXT: s_lshr_b32 s3, s0, 16 ; GFX7-NEXT: s_lshr_b32 s3, s0, 16
; GFX7-NEXT: s_lshr_b32 s4, s0, 24 ; GFX7-NEXT: s_lshr_b32 s4, s0, 24
; GFX7-NEXT: s_and_b32 s0, s0, s8 ; GFX7-NEXT: s_and_b32 s0, s0, s8
; GFX7-NEXT: s_lshl_b32 s2, s2, 8 ; GFX7-NEXT: s_lshl_b32 s2, s2, 8
; GFX7-NEXT: s_or_b32 s0, s0, s2 ; GFX7-NEXT: s_or_b32 s0, s0, s2
; GFX7-NEXT: s_and_b32 s2, s3, s8 ; GFX7-NEXT: s_and_b32 s2, s3, s8
; GFX7-NEXT: s_lshl_b32 s2, s2, 16 ; GFX7-NEXT: s_lshl_b32 s2, s2, 16
; GFX7-NEXT: s_or_b32 s0, s0, s2 ; GFX7-NEXT: s_or_b32 s0, s0, s2
; GFX7-NEXT: s_and_b32 s2, s4, s8 ; GFX7-NEXT: s_lshl_b32 s2, s4, 24
; GFX7-NEXT: s_lshl_b32 s2, s2, 24
; GFX7-NEXT: s_lshr_b32 s5, s1, 8 ; GFX7-NEXT: s_lshr_b32 s5, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s2 ; GFX7-NEXT: s_or_b32 s0, s0, s2
; GFX7-NEXT: s_and_b32 s2, s5, s8 ; GFX7-NEXT: s_and_b32 s2, s5, s8
; GFX7-NEXT: s_lshr_b32 s6, s1, 16 ; GFX7-NEXT: s_lshr_b32 s6, s1, 16
; GFX7-NEXT: s_lshr_b32 s7, s1, 24 ; GFX7-NEXT: s_lshr_b32 s7, s1, 24
; GFX7-NEXT: s_and_b32 s1, s1, s8 ; GFX7-NEXT: s_and_b32 s1, s1, s8
; GFX7-NEXT: s_lshl_b32 s2, s2, 8 ; GFX7-NEXT: s_lshl_b32 s2, s2, 8
; GFX7-NEXT: s_or_b32 s1, s1, s2 ; GFX7-NEXT: s_or_b32 s1, s1, s2
; GFX7-NEXT: s_and_b32 s2, s6, s8 ; GFX7-NEXT: s_and_b32 s2, s6, s8
; GFX7-NEXT: s_lshl_b32 s2, s2, 16 ; GFX7-NEXT: s_lshl_b32 s2, s2, 16
; GFX7-NEXT: s_or_b32 s1, s1, s2 ; GFX7-NEXT: s_or_b32 s1, s1, s2
; GFX7-NEXT: s_and_b32 s2, s7, s8 ; GFX7-NEXT: s_lshl_b32 s2, s7, 24
; GFX7-NEXT: s_lshl_b32 s2, s2, 24
; GFX7-NEXT: s_or_b32 s1, s1, s2 ; GFX7-NEXT: s_or_b32 s1, s1, s2
; GFX7-NEXT: v_and_b32_e32 v0, s8, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s8, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, v1, v0
; GFX7-NEXT: v_lshl_b32_e32 v1, s8, v1 ; GFX7-NEXT: v_lshl_b32_e32 v1, s8, v1
; GFX7-NEXT: v_mov_b32_e32 v3, s0 ; GFX7-NEXT: v_mov_b32_e32 v3, s0
; GFX7-NEXT: v_mov_b32_e32 v4, s1 ; GFX7-NEXT: v_mov_b32_e32 v4, s1
; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2 ; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v2
; GFX7-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
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; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s8, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s8, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v2, s8, v3 ; GFX7-NEXT: v_and_b32_e32 v2, s8, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v2, s8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 8, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v2, s8, v5 ; GFX7-NEXT: v_and_b32_e32 v2, s8, v5
; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 16, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s8, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s8, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_and_b32_e32 v2, s8, v6 ; GFX7-NEXT: v_and_b32_e32 v2, s8, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_and_b32_e32 v2, s8, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v7
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX7-NEXT: s_mov_b64 s[0:1], 0 ; GFX7-NEXT: s_mov_b64 s[0:1], 0
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <8 x i8>, <8 x i8> addrspace(4)* %ptr %vec = load <8 x i8>, <8 x i8> addrspace(4)* %ptr
%insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx
store <8 x i8> %insert, <8 x i8> addrspace(1)* null store <8 x i8> %insert, <8 x i8> addrspace(1)* null
ret void ret void
} }
define amdgpu_ps void @insertelement_v_v8i8_s_v(<8 x i8> addrspace(1)* %ptr, i8 inreg %val, i32 %idx) { define amdgpu_ps void @insertelement_v_v8i8_s_v(<8 x i8> addrspace(1)* %ptr, i8 inreg %val, i32 %idx) {
; GFX9-LABEL: insertelement_v_v8i8_s_v: ; GFX9-LABEL: insertelement_v_v8i8_s_v:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_mov_b32 s0, 8 ; GFX9-NEXT: s_mov_b32 s0, 8
; GFX9-NEXT: v_mov_b32_e32 v3, 8
; GFX9-NEXT: s_movk_i32 s3, 0xff ; GFX9-NEXT: s_movk_i32 s3, 0xff
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 2, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v4, 2, v2
; GFX9-NEXT: v_and_b32_e32 v2, 3, v2 ; GFX9-NEXT: v_and_b32_e32 v2, 3, v2
; GFX9-NEXT: s_and_b32 s1, s2, s3 ; GFX9-NEXT: s_and_b32 s1, s2, s3
; GFX9-NEXT: v_lshlrev_b32_e32 v2, 3, v2 ; GFX9-NEXT: v_lshlrev_b32_e32 v2, 3, v2
; GFX9-NEXT: v_lshlrev_b32_e64 v5, v2, s1 ; GFX9-NEXT: v_lshlrev_b32_e64 v5, v2, s1
; GFX9-NEXT: v_lshlrev_b32_e64 v2, v2, s3 ; GFX9-NEXT: v_lshlrev_b32_e64 v2, v2, s3
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v4 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v4
; GFX9-NEXT: v_xor_b32_e32 v2, -1, v2 ; GFX9-NEXT: v_xor_b32_e32 v2, -1, v2
; GFX9-NEXT: v_mov_b32_e32 v3, 8
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v6, s0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v6, s0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v7, v3, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v8, s0, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v8, v0, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v10, v0, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v9, v0, s3 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v11, v1, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX9-NEXT: v_and_or_b32 v0, v0, s3, v6 ; GFX9-NEXT: v_and_or_b32 v0, v0, s3, v6
; GFX9-NEXT: v_and_b32_sdwa v10, v1, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; GFX9-NEXT: v_and_b32_sdwa v11, v1, s3 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_or_b32 v1, v1, s3, v8
; GFX9-NEXT: v_and_or_b32 v1, v1, s3, v7 ; GFX9-NEXT: v_or3_b32 v0, v0, v10, v7
; GFX9-NEXT: v_or3_b32 v0, v0, v8, v9 ; GFX9-NEXT: v_or3_b32 v1, v1, v11, v9
; GFX9-NEXT: v_or3_b32 v1, v1, v10, v11
; GFX9-NEXT: v_cndmask_b32_e32 v6, v0, v1, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v6, v0, v1, vcc
; GFX9-NEXT: v_and_or_b32 v2, v6, v2, v5 ; GFX9-NEXT: v_and_or_b32 v2, v6, v2, v5
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v4 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v4
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 24, v1
; GFX9-NEXT: v_and_b32_sdwa v5, v0, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_sdwa v3, v3, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v6, v0, s3 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v7, v0, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v8, v1, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX9-NEXT: v_and_or_b32 v0, v0, s3, v2 ; GFX9-NEXT: v_and_or_b32 v0, v0, s3, v2
; GFX9-NEXT: v_and_b32_sdwa v7, v1, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v8, v1, s3 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v1, s3, v3 ; GFX9-NEXT: v_and_or_b32 v1, v1, s3, v3
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 24, v6
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_or3_b32 v0, v0, v5, v6 ; GFX9-NEXT: v_or3_b32 v0, v0, v7, v4
; GFX9-NEXT: v_or3_b32 v1, v1, v7, v8 ; GFX9-NEXT: v_or3_b32 v1, v1, v8, v5
; GFX9-NEXT: v_mov_b32_e32 v3, 0 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_v_v8i8_s_v: ; GFX8-LABEL: insertelement_v_v8i8_s_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_mov_b32_e32 v3, 8 ; GFX8-NEXT: v_mov_b32_e32 v3, 8
; GFX8-NEXT: v_mov_b32_e32 v4, 8 ; GFX8-NEXT: v_mov_b32_e32 v4, 8
; GFX8-NEXT: v_mov_b32_e32 v5, s0 ; GFX8-NEXT: v_mov_b32_e32 v5, s0
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 2, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 2, v2
; GFX8-NEXT: v_and_b32_e32 v2, 3, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 3, v2
; GFX8-NEXT: s_and_b32 s1, s2, s0 ; GFX8-NEXT: s_and_b32 s1, s2, s0
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 3, v2 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 3, v2
; GFX8-NEXT: v_lshlrev_b32_e64 v7, v2, s1 ; GFX8-NEXT: v_lshlrev_b32_e64 v7, v2, s1
; GFX8-NEXT: v_lshlrev_b32_e64 v2, v2, s0 ; GFX8-NEXT: v_lshlrev_b32_e64 v2, v2, s0
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6
; GFX8-NEXT: v_xor_b32_e32 v2, -1, v2 ; GFX8-NEXT: v_xor_b32_e32 v2, -1, v2
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v6 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v6
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v3, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v3, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v8, v4, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_e32 v8, 24, v9
; GFX8-NEXT: v_and_b32_sdwa v10, v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v9, v4, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v11, v0, v5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v11, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v12, v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v12, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v13, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v13, v1, v5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v1, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v1, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v12
; GFX8-NEXT: v_or_b32_e32 v0, v0, v10 ; GFX8-NEXT: v_lshlrev_b32_e32 v10, 24, v11
; GFX8-NEXT: v_or_b32_e32 v1, v1, v12
; GFX8-NEXT: v_or_b32_e32 v0, v0, v11
; GFX8-NEXT: v_or_b32_e32 v1, v1, v13 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v13
; GFX8-NEXT: v_or_b32_e32 v0, v0, v8
; GFX8-NEXT: v_or_b32_e32 v1, v1, v10
; GFX8-NEXT: v_cndmask_b32_e32 v3, v0, v1, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v0, v1, vcc
; GFX8-NEXT: v_and_b32_e32 v2, v3, v2 ; GFX8-NEXT: v_and_b32_e32 v2, v3, v2
; GFX8-NEXT: v_or_b32_e32 v2, v2, v7 ; GFX8-NEXT: v_or_b32_e32 v2, v2, v7
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v6, v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v8, v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v7, v0, v5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v8, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v5, v1, v5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX8-NEXT: v_or_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v5, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v6 ; GFX8-NEXT: v_or_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v8 ; GFX8-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX8-NEXT: v_or_b32_e32 v0, v0, v8
; GFX8-NEXT: v_or_b32_e32 v0, v0, v3
; GFX8-NEXT: v_mov_b32_e32 v2, 0 ; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_or_b32_e32 v0, v0, v7 ; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v7
; GFX8-NEXT: v_or_b32_e32 v1, v1, v5 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v5
; GFX8-NEXT: v_or_b32_e32 v1, v1, v6
; GFX8-NEXT: v_mov_b32_e32 v3, 0 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v8i8_s_v: ; GFX7-LABEL: insertelement_v_v8i8_s_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
Show All 20 Lines
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v10, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v10, 24, v1
; GFX7-NEXT: v_and_b32_e32 v6, s3, v6 ; GFX7-NEXT: v_and_b32_e32 v6, s3, v6
; GFX7-NEXT: v_and_b32_e32 v9, s3, v9 ; GFX7-NEXT: v_and_b32_e32 v9, s3, v9
; GFX7-NEXT: v_and_b32_e32 v0, s3, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s3, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 8, v5 ; GFX7-NEXT: v_lshlrev_b32_e32 v5, 8, v5
; GFX7-NEXT: v_and_b32_e32 v1, s3, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s3, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v8, 8, v8 ; GFX7-NEXT: v_lshlrev_b32_e32 v8, 8, v8
; GFX7-NEXT: v_and_b32_e32 v7, s3, v7
; GFX7-NEXT: v_and_b32_e32 v10, s3, v10
; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX7-NEXT: v_or_b32_e32 v0, v0, v5 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX7-NEXT: v_or_b32_e32 v1, v1, v8 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX7-NEXT: v_or_b32_e32 v0, v0, v6 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; GFX7-NEXT: v_lshlrev_b32_e32 v10, 24, v10
; GFX7-NEXT: v_or_b32_e32 v1, v1, v9 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v9
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; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX7-NEXT: v_and_b32_e32 v3, s3, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s3, v3
; GFX7-NEXT: v_and_b32_e32 v6, s3, v6 ; GFX7-NEXT: v_and_b32_e32 v6, s3, v6
; GFX7-NEXT: v_and_b32_e32 v0, s3, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s3, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_and_b32_e32 v1, s3, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s3, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 8, v5 ; GFX7-NEXT: v_lshlrev_b32_e32 v5, 8, v5
; GFX7-NEXT: v_and_b32_e32 v4, s3, v4
; GFX7-NEXT: v_and_b32_e32 v7, s3, v7
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX7-NEXT: v_or_b32_e32 v1, v1, v5 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX7-NEXT: v_or_b32_e32 v1, v1, v6 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v6
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_or_b32_e32 v1, v1, v7 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v7
; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 ; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <8 x i8>, <8 x i8> addrspace(1)* %ptr %vec = load <8 x i8>, <8 x i8> addrspace(1)* %ptr
%insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx
store <8 x i8> %insert, <8 x i8> addrspace(1)* null store <8 x i8> %insert, <8 x i8> addrspace(1)* null
ret void ret void
} }
define amdgpu_ps void @insertelement_v_v8i8_v_s(<8 x i8> addrspace(1)* %ptr, i8 %val, i32 inreg %idx) { define amdgpu_ps void @insertelement_v_v8i8_v_s(<8 x i8> addrspace(1)* %ptr, i8 %val, i32 inreg %idx) {
; GFX9-LABEL: insertelement_v_v8i8_v_s: ; GFX9-LABEL: insertelement_v_v8i8_v_s:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_mov_b32 s0, 8 ; GFX9-NEXT: s_mov_b32 s0, 8
; GFX9-NEXT: v_mov_b32_e32 v3, 8
; GFX9-NEXT: s_movk_i32 s3, 0xff ; GFX9-NEXT: s_movk_i32 s3, 0xff
; GFX9-NEXT: s_lshr_b32 s1, s2, 2 ; GFX9-NEXT: s_lshr_b32 s1, s2, 2
; GFX9-NEXT: s_and_b32 s2, s2, 3 ; GFX9-NEXT: s_and_b32 s2, s2, 3
; GFX9-NEXT: s_lshl_b32 s2, s2, 3 ; GFX9-NEXT: s_lshl_b32 s2, s2, 3
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s2, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: s_lshl_b32 s2, s3, s2 ; GFX9-NEXT: s_lshl_b32 s2, s3, s2
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s1, 1 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s1, 1
; GFX9-NEXT: s_not_b32 s2, s2 ; GFX9-NEXT: s_not_b32 s2, s2
; GFX9-NEXT: v_mov_b32_e32 v3, 8
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v4, s0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v4, s0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v3, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v6, s0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v6, v0, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v8, v0, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v7, v0, s3 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v9, v1, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; GFX9-NEXT: v_and_or_b32 v0, v0, s3, v4 ; GFX9-NEXT: v_and_or_b32 v0, v0, s3, v4
; GFX9-NEXT: v_and_b32_sdwa v8, v1, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX9-NEXT: v_and_b32_sdwa v9, v1, s3 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_or_b32 v1, v1, s3, v6
; GFX9-NEXT: v_and_or_b32 v1, v1, s3, v5 ; GFX9-NEXT: v_or3_b32 v0, v0, v8, v5
; GFX9-NEXT: v_or3_b32 v0, v0, v6, v7 ; GFX9-NEXT: v_or3_b32 v1, v1, v9, v7
; GFX9-NEXT: v_or3_b32 v1, v1, v8, v9
; GFX9-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc
; GFX9-NEXT: v_and_or_b32 v2, v4, s2, v2 ; GFX9-NEXT: v_and_or_b32 v2, v4, s2, v2
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], s1, 0 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], s1, 0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v3, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 24, v1
; GFX9-NEXT: v_and_b32_sdwa v5, v0, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_sdwa v3, v3, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v6, v0, s3 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v7, v0, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v8, v1, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX9-NEXT: v_and_or_b32 v0, v0, s3, v2 ; GFX9-NEXT: v_and_or_b32 v0, v0, s3, v2
; GFX9-NEXT: v_and_b32_sdwa v7, v1, s3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v8, v1, s3 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v1, s3, v3 ; GFX9-NEXT: v_and_or_b32 v1, v1, s3, v3
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 24, v6
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_or3_b32 v0, v0, v5, v6 ; GFX9-NEXT: v_or3_b32 v0, v0, v7, v4
; GFX9-NEXT: v_or3_b32 v1, v1, v7, v8 ; GFX9-NEXT: v_or3_b32 v1, v1, v8, v5
; GFX9-NEXT: v_mov_b32_e32 v3, 0 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_v_v8i8_v_s: ; GFX8-LABEL: insertelement_v_v8i8_v_s:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: s_lshr_b32 s1, s2, 2 ; GFX8-NEXT: s_lshr_b32 s1, s2, 2
; GFX8-NEXT: s_and_b32 s2, s2, 3 ; GFX8-NEXT: s_and_b32 s2, s2, 3
; GFX8-NEXT: s_lshl_b32 s2, s2, 3 ; GFX8-NEXT: s_lshl_b32 s2, s2, 3
; GFX8-NEXT: v_mov_b32_e32 v6, s2 ; GFX8-NEXT: v_mov_b32_e32 v6, s2
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v6, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v6, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_mov_b32_e32 v3, 8 ; GFX8-NEXT: v_mov_b32_e32 v3, 8
; GFX8-NEXT: v_mov_b32_e32 v4, 8 ; GFX8-NEXT: v_mov_b32_e32 v4, 8
; GFX8-NEXT: v_mov_b32_e32 v5, s0 ; GFX8-NEXT: v_mov_b32_e32 v5, s0
; GFX8-NEXT: s_lshl_b32 s0, s0, s2 ; GFX8-NEXT: s_lshl_b32 s0, s0, s2
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s1, 1 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s1, 1
; GFX8-NEXT: s_not_b32 s0, s0 ; GFX8-NEXT: s_not_b32 s0, s0
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v3, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v3, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v6, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v7
; GFX8-NEXT: v_and_b32_sdwa v8, v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v7, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v9, v0, v5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v10, v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v10, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v11, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v11, v1, v5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v1, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v1, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v10
; GFX8-NEXT: v_or_b32_e32 v0, v0, v8 ; GFX8-NEXT: v_lshlrev_b32_e32 v8, 24, v9
; GFX8-NEXT: v_or_b32_e32 v1, v1, v10
; GFX8-NEXT: v_or_b32_e32 v0, v0, v9
; GFX8-NEXT: v_or_b32_e32 v1, v1, v11 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v11
; GFX8-NEXT: v_or_b32_e32 v0, v0, v6
; GFX8-NEXT: v_or_b32_e32 v1, v1, v8
; GFX8-NEXT: v_cndmask_b32_e32 v3, v0, v1, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v0, v1, vcc
; GFX8-NEXT: v_and_b32_e32 v3, s0, v3 ; GFX8-NEXT: v_and_b32_e32 v3, s0, v3
; GFX8-NEXT: v_or_b32_e32 v2, v3, v2 ; GFX8-NEXT: v_or_b32_e32 v2, v3, v2
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], s1, 0 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], s1, 0
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v4, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v4, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v6, v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v8, v0, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v7, v0, v5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v8, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v5, v1, v5 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX8-NEXT: v_or_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v5, v1, v5 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v6 ; GFX8-NEXT: v_or_b32_sdwa v1, v1, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v8 ; GFX8-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX8-NEXT: v_or_b32_e32 v0, v0, v8
; GFX8-NEXT: v_or_b32_e32 v0, v0, v3
; GFX8-NEXT: v_mov_b32_e32 v2, 0 ; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_or_b32_e32 v0, v0, v7 ; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v7
; GFX8-NEXT: v_or_b32_e32 v1, v1, v5 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v5
; GFX8-NEXT: v_or_b32_e32 v1, v1, v6
; GFX8-NEXT: v_mov_b32_e32 v3, 0 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v8i8_v_s: ; GFX7-LABEL: insertelement_v_v8i8_v_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
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; GFX7-NEXT: v_lshrrev_b32_e32 v5, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v8, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v8, 24, v1
; GFX7-NEXT: v_and_b32_e32 v4, s3, v4 ; GFX7-NEXT: v_and_b32_e32 v4, s3, v4
; GFX7-NEXT: v_and_b32_e32 v7, s3, v7 ; GFX7-NEXT: v_and_b32_e32 v7, s3, v7
; GFX7-NEXT: v_and_b32_e32 v0, s3, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s3, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 8, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 8, v3
; GFX7-NEXT: v_and_b32_e32 v1, s3, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s3, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v6, 8, v6 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; GFX7-NEXT: v_and_b32_e32 v5, s3, v5
; GFX7-NEXT: v_and_b32_e32 v8, s3, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX7-NEXT: v_or_b32_e32 v1, v1, v6 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 24, v5 ; GFX7-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v8, 24, v8 ; GFX7-NEXT: v_lshlrev_b32_e32 v8, 24, v8
; GFX7-NEXT: v_or_b32_e32 v1, v1, v7 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v7
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; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 24, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX7-NEXT: v_and_b32_e32 v3, s3, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s3, v3
; GFX7-NEXT: v_and_b32_e32 v6, s3, v6 ; GFX7-NEXT: v_and_b32_e32 v6, s3, v6
; GFX7-NEXT: v_and_b32_e32 v0, s3, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s3, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_and_b32_e32 v1, s3, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s3, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 8, v5 ; GFX7-NEXT: v_lshlrev_b32_e32 v5, 8, v5
; GFX7-NEXT: v_and_b32_e32 v4, s3, v4
; GFX7-NEXT: v_and_b32_e32 v7, s3, v7
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX7-NEXT: v_or_b32_e32 v1, v1, v5 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX7-NEXT: v_or_b32_e32 v1, v1, v6 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v6
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_or_b32_e32 v1, v1, v7 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v7
; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 ; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <8 x i8>, <8 x i8> addrspace(1)* %ptr %vec = load <8 x i8>, <8 x i8> addrspace(1)* %ptr
%insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx
store <8 x i8> %insert, <8 x i8> addrspace(1)* null store <8 x i8> %insert, <8 x i8> addrspace(1)* null
ret void ret void
} }
define amdgpu_ps void @insertelement_v_v8i8_v_v(<8 x i8> addrspace(1)* %ptr, i8 %val, i32 %idx) { define amdgpu_ps void @insertelement_v_v8i8_v_v(<8 x i8> addrspace(1)* %ptr, i8 %val, i32 %idx) {
; GFX9-LABEL: insertelement_v_v8i8_v_v: ; GFX9-LABEL: insertelement_v_v8i8_v_v:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off ; GFX9-NEXT: global_load_dwordx2 v[0:1], v[0:1], off
; GFX9-NEXT: s_mov_b32 s0, 8 ; GFX9-NEXT: s_mov_b32 s0, 8
; GFX9-NEXT: v_mov_b32_e32 v5, 8
; GFX9-NEXT: s_movk_i32 s1, 0xff ; GFX9-NEXT: s_movk_i32 s1, 0xff
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 2, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 2, v3
; GFX9-NEXT: v_and_b32_e32 v3, 3, v3 ; GFX9-NEXT: v_and_b32_e32 v3, 3, v3
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 3, v3 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 3, v3
; GFX9-NEXT: v_mov_b32_e32 v4, 0xff ; GFX9-NEXT: v_mov_b32_e32 v4, 0xff
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_e32 v3, v3, v4 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, v3, v4
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v6
; GFX9-NEXT: v_xor_b32_e32 v3, -1, v3 ; GFX9-NEXT: v_xor_b32_e32 v3, -1, v3
; GFX9-NEXT: v_mov_b32_e32 v5, 8
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 24, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 24, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v7, s0, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v7, s0, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v8, v5, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v9, s0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v9, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v11, v0, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v10, v0, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v12, v1, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v8, 24, v8
; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v7 ; GFX9-NEXT: v_and_or_b32 v0, v0, s1, v7
; GFX9-NEXT: v_and_b32_sdwa v11, v1, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_or_b32 v1, v1, s1, v9
; GFX9-NEXT: v_and_b32_sdwa v12, v1, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 24, v10
; GFX9-NEXT: v_and_or_b32 v1, v1, s1, v8 ; GFX9-NEXT: v_or3_b32 v0, v0, v11, v8
; GFX9-NEXT: v_or3_b32 v0, v0, v9, v10 ; GFX9-NEXT: v_or3_b32 v1, v1, v12, v10
; GFX9-NEXT: v_or3_b32 v1, v1, v11, v12
; GFX9-NEXT: v_cndmask_b32_e32 v7, v0, v1, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v7, v0, v1, vcc
; GFX9-NEXT: v_and_or_b32 v2, v7, v3, v2 ; GFX9-NEXT: v_and_or_b32 v2, v7, v3, v2
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v6 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v6
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v3, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v5, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v3, v5, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_and_b32_sdwa v8, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v6, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX9-NEXT: v_and_b32_sdwa v7, v0, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v5, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX9-NEXT: v_and_or_b32 v0, v0, v4, v2 ; GFX9-NEXT: v_and_or_b32 v0, v0, v4, v2
; GFX9-NEXT: v_and_b32_sdwa v8, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v9, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v9, v1, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_or3_b32 v0, v0, v8, v3
; GFX9-NEXT: v_and_or_b32 v1, v1, v4, v3
; GFX9-NEXT: v_mov_b32_e32 v2, 0 ; GFX9-NEXT: v_mov_b32_e32 v2, 0
; GFX9-NEXT: v_or3_b32 v0, v0, v6, v7 ; GFX9-NEXT: v_lshlrev_b32_e32 v6, 24, v7
; GFX9-NEXT: v_or3_b32 v1, v1, v8, v9 ; GFX9-NEXT: v_and_or_b32 v1, v1, v4, v5
; GFX9-NEXT: v_or3_b32 v1, v1, v9, v6
; GFX9-NEXT: v_mov_b32_e32 v3, 0 ; GFX9-NEXT: v_mov_b32_e32 v3, 0
; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off ; GFX9-NEXT: global_store_dwordx2 v[2:3], v[0:1], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_v_v8i8_v_v: ; GFX8-LABEL: insertelement_v_v8i8_v_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1] ; GFX8-NEXT: flat_load_dwordx2 v[0:1], v[0:1]
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_mov_b32_e32 v5, 8 ; GFX8-NEXT: v_mov_b32_e32 v5, 8
; GFX8-NEXT: v_mov_b32_e32 v6, 8 ; GFX8-NEXT: v_mov_b32_e32 v6, 8
; GFX8-NEXT: v_mov_b32_e32 v7, s0 ; GFX8-NEXT: v_mov_b32_e32 v7, s0
; GFX8-NEXT: v_lshrrev_b32_e32 v8, 2, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 2, v3
; GFX8-NEXT: v_and_b32_e32 v3, 3, v3 ; GFX8-NEXT: v_and_b32_e32 v3, 3, v3
; GFX8-NEXT: v_lshlrev_b32_e32 v3, 3, v3 ; GFX8-NEXT: v_lshlrev_b32_e32 v3, 3, v3
; GFX8-NEXT: v_mov_b32_e32 v4, 0xff ; GFX8-NEXT: v_mov_b32_e32 v4, 0xff
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_e32 v3, v3, v4 ; GFX8-NEXT: v_lshlrev_b32_e32 v3, v3, v4
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v8 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v8
; GFX8-NEXT: v_xor_b32_e32 v3, -1, v3 ; GFX8-NEXT: v_xor_b32_e32 v3, -1, v3
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v8 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v8
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v9, 8, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v10, 24, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v11, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v5, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v5, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v9, v6, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_e32 v9, 24, v10
; GFX8-NEXT: v_and_b32_sdwa v11, v0, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v10, v6, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v12, v0, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v13, v0, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v13, v1, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v12, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v7, v1, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v7, v1, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v1, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v1, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v11 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v13
; GFX8-NEXT: v_or_b32_e32 v1, v1, v13 ; GFX8-NEXT: v_lshlrev_b32_e32 v11, 24, v12
; GFX8-NEXT: v_or_b32_e32 v0, v0, v12
; GFX8-NEXT: v_or_b32_e32 v1, v1, v7 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v7
; GFX8-NEXT: v_or_b32_e32 v0, v0, v9
; GFX8-NEXT: v_or_b32_e32 v1, v1, v11
; GFX8-NEXT: v_cndmask_b32_e32 v5, v0, v1, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v5, v0, v1, vcc
; GFX8-NEXT: v_and_b32_e32 v3, v5, v3 ; GFX8-NEXT: v_and_b32_e32 v3, v5, v3
; GFX8-NEXT: v_or_b32_e32 v2, v3, v2 ; GFX8-NEXT: v_or_b32_e32 v2, v3, v2
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v3, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v6, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v6, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v3, v6, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshrrev_b32_e32 v3, 24, v0
; GFX8-NEXT: v_and_b32_sdwa v5, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v8, v0, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v7, v0, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v8, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v6, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v4, v1, v4 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX8-NEXT: v_or_b32_sdwa v1, v1, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v4, v1, v4 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v5 ; GFX8-NEXT: v_or_b32_sdwa v1, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v1, v8 ; GFX8-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX8-NEXT: v_or_b32_e32 v0, v0, v8
; GFX8-NEXT: v_or_b32_e32 v0, v0, v3
; GFX8-NEXT: v_mov_b32_e32 v2, 0 ; GFX8-NEXT: v_mov_b32_e32 v2, 0
; GFX8-NEXT: v_or_b32_e32 v0, v0, v7 ; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v7
; GFX8-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v4
; GFX8-NEXT: v_or_b32_e32 v1, v1, v6
; GFX8-NEXT: v_mov_b32_e32 v3, 0 ; GFX8-NEXT: v_mov_b32_e32 v3, 0
; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1] ; GFX8-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v8i8_v_v: ; GFX7-LABEL: insertelement_v_v8i8_v_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s6, 0 ; GFX7-NEXT: s_mov_b32 s6, 0
; GFX7-NEXT: s_mov_b32 s7, 0xf000 ; GFX7-NEXT: s_mov_b32 s7, 0xf000
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; GFX7-NEXT: v_lshrrev_b32_e32 v10, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v10, 16, v1
; GFX7-NEXT: v_and_b32_e32 v6, s0, v6 ; GFX7-NEXT: v_and_b32_e32 v6, s0, v6
; GFX7-NEXT: v_and_b32_e32 v9, s0, v9 ; GFX7-NEXT: v_and_b32_e32 v9, s0, v9
; GFX7-NEXT: v_lshrrev_b32_e32 v8, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v8, 24, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v11, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v11, 24, v1
; GFX7-NEXT: v_and_b32_e32 v7, s0, v7 ; GFX7-NEXT: v_and_b32_e32 v7, s0, v7
; GFX7-NEXT: v_and_b32_e32 v10, s0, v10 ; GFX7-NEXT: v_and_b32_e32 v10, s0, v10
; GFX7-NEXT: v_and_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s0, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; GFX7-NEXT: v_and_b32_e32 v1, s0, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v9, 8, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v9, 8, v9
; GFX7-NEXT: v_and_b32_e32 v8, s0, v8
; GFX7-NEXT: v_and_b32_e32 v11, s0, v11
; GFX7-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX7-NEXT: v_or_b32_e32 v0, v0, v6 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v10 ; GFX7-NEXT: v_lshlrev_b32_e32 v10, 16, v10
; GFX7-NEXT: v_or_b32_e32 v1, v1, v9 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v8, 24, v8 ; GFX7-NEXT: v_lshlrev_b32_e32 v8, 24, v8
; GFX7-NEXT: v_or_b32_e32 v0, v0, v7 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v7
; GFX7-NEXT: v_lshlrev_b32_e32 v11, 24, v11 ; GFX7-NEXT: v_lshlrev_b32_e32 v11, 24, v11
; GFX7-NEXT: v_or_b32_e32 v1, v1, v10 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v10
; GFX7-NEXT: v_or_b32_e32 v0, v0, v8 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v8
; GFX7-NEXT: v_or_b32_e32 v1, v1, v11 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v11
; GFX7-NEXT: v_cndmask_b32_e32 v6, v0, v1, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v6, v0, v1, vcc
; GFX7-NEXT: v_and_b32_e32 v3, v6, v3 ; GFX7-NEXT: v_and_b32_e32 v3, v6, v3
; GFX7-NEXT: v_or_b32_e32 v2, v3, v2 ; GFX7-NEXT: v_or_b32_e32 v2, v3, v2
; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v5 ; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 0, v5
; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1] ; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[0:1]
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v6, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 8, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v3, 16, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v1
; GFX7-NEXT: v_and_b32_e32 v2, v2, v4 ; GFX7-NEXT: v_and_b32_e32 v2, v2, v4
; GFX7-NEXT: v_and_b32_e32 v6, v6, v4 ; GFX7-NEXT: v_and_b32_e32 v6, v6, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 16, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v5, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX7-NEXT: v_and_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_and_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v7, v7, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v8, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v8, 24, v1
; GFX7-NEXT: v_and_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_and_b32_e32 v0, v0, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_and_b32_e32 v1, v1, v4 ; GFX7-NEXT: v_and_b32_e32 v1, v1, v4
; GFX7-NEXT: v_and_b32_e32 v4, v7, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v6, 8, v6 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 8, v6
; GFX7-NEXT: v_and_b32_e32 v5, v5, v4
; GFX7-NEXT: v_and_b32_e32 v4, v8, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v1, v1, v6 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 24, v5 ; GFX7-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; GFX7-NEXT: v_or_b32_e32 v0, v0, v3 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v8
; GFX7-NEXT: v_or_b32_e32 v1, v1, v7
; GFX7-NEXT: v_or_b32_e32 v0, v0, v5
; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v5
; GFX7-NEXT: v_or_b32_e32 v1, v1, v7
; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0 ; GFX7-NEXT: buffer_store_dwordx2 v[0:1], off, s[4:7], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <8 x i8>, <8 x i8> addrspace(1)* %ptr %vec = load <8 x i8>, <8 x i8> addrspace(1)* %ptr
%insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <8 x i8> %vec, i8 %val, i32 %idx
store <8 x i8> %insert, <8 x i8> addrspace(1)* null store <8 x i8> %insert, <8 x i8> addrspace(1)* null
ret void ret void
} }
Show All 10 Lines
; GFX9-NEXT: s_lshr_b32 s7, s0, 16 ; GFX9-NEXT: s_lshr_b32 s7, s0, 16
; GFX9-NEXT: s_lshr_b32 s8, s0, 24 ; GFX9-NEXT: s_lshr_b32 s8, s0, 24
; GFX9-NEXT: s_and_b32 s0, s0, s18 ; GFX9-NEXT: s_and_b32 s0, s0, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 8 ; GFX9-NEXT: s_lshl_b32 s6, s6, 8
; GFX9-NEXT: s_or_b32 s0, s0, s6 ; GFX9-NEXT: s_or_b32 s0, s0, s6
; GFX9-NEXT: s_and_b32 s6, s7, s18 ; GFX9-NEXT: s_and_b32 s6, s7, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 16 ; GFX9-NEXT: s_lshl_b32 s6, s6, 16
; GFX9-NEXT: s_or_b32 s0, s0, s6 ; GFX9-NEXT: s_or_b32 s0, s0, s6
; GFX9-NEXT: s_and_b32 s6, s8, s18 ; GFX9-NEXT: s_lshl_b32 s6, s8, 24
; GFX9-NEXT: s_lshl_b32 s6, s6, 24
; GFX9-NEXT: s_lshr_b32 s9, s1, 8 ; GFX9-NEXT: s_lshr_b32 s9, s1, 8
; GFX9-NEXT: s_or_b32 s0, s0, s6 ; GFX9-NEXT: s_or_b32 s0, s0, s6
; GFX9-NEXT: s_and_b32 s6, s9, s18 ; GFX9-NEXT: s_and_b32 s6, s9, s18
; GFX9-NEXT: s_lshr_b32 s10, s1, 16 ; GFX9-NEXT: s_lshr_b32 s10, s1, 16
; GFX9-NEXT: s_lshr_b32 s11, s1, 24 ; GFX9-NEXT: s_lshr_b32 s11, s1, 24
; GFX9-NEXT: s_and_b32 s1, s1, s18 ; GFX9-NEXT: s_and_b32 s1, s1, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 8 ; GFX9-NEXT: s_lshl_b32 s6, s6, 8
; GFX9-NEXT: s_or_b32 s1, s1, s6 ; GFX9-NEXT: s_or_b32 s1, s1, s6
; GFX9-NEXT: s_and_b32 s6, s10, s18 ; GFX9-NEXT: s_and_b32 s6, s10, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 16 ; GFX9-NEXT: s_lshl_b32 s6, s6, 16
; GFX9-NEXT: s_or_b32 s1, s1, s6 ; GFX9-NEXT: s_or_b32 s1, s1, s6
; GFX9-NEXT: s_and_b32 s6, s11, s18 ; GFX9-NEXT: s_lshl_b32 s6, s11, 24
; GFX9-NEXT: s_lshl_b32 s6, s6, 24
; GFX9-NEXT: s_lshr_b32 s12, s2, 8 ; GFX9-NEXT: s_lshr_b32 s12, s2, 8
; GFX9-NEXT: s_or_b32 s1, s1, s6 ; GFX9-NEXT: s_or_b32 s1, s1, s6
; GFX9-NEXT: s_and_b32 s6, s12, s18 ; GFX9-NEXT: s_and_b32 s6, s12, s18
; GFX9-NEXT: s_lshr_b32 s13, s2, 16 ; GFX9-NEXT: s_lshr_b32 s13, s2, 16
; GFX9-NEXT: s_lshr_b32 s14, s2, 24 ; GFX9-NEXT: s_lshr_b32 s14, s2, 24
; GFX9-NEXT: s_and_b32 s2, s2, s18 ; GFX9-NEXT: s_and_b32 s2, s2, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 8 ; GFX9-NEXT: s_lshl_b32 s6, s6, 8
; GFX9-NEXT: s_or_b32 s2, s2, s6 ; GFX9-NEXT: s_or_b32 s2, s2, s6
; GFX9-NEXT: s_and_b32 s6, s13, s18 ; GFX9-NEXT: s_and_b32 s6, s13, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 16 ; GFX9-NEXT: s_lshl_b32 s6, s6, 16
; GFX9-NEXT: s_or_b32 s2, s2, s6 ; GFX9-NEXT: s_or_b32 s2, s2, s6
; GFX9-NEXT: s_and_b32 s6, s14, s18 ; GFX9-NEXT: s_lshl_b32 s6, s14, 24
; GFX9-NEXT: s_lshl_b32 s6, s6, 24
; GFX9-NEXT: s_lshr_b32 s15, s3, 8 ; GFX9-NEXT: s_lshr_b32 s15, s3, 8
; GFX9-NEXT: s_or_b32 s2, s2, s6 ; GFX9-NEXT: s_or_b32 s2, s2, s6
; GFX9-NEXT: s_and_b32 s6, s15, s18 ; GFX9-NEXT: s_and_b32 s6, s15, s18
; GFX9-NEXT: s_lshr_b32 s16, s3, 16 ; GFX9-NEXT: s_lshr_b32 s16, s3, 16
; GFX9-NEXT: s_lshr_b32 s17, s3, 24 ; GFX9-NEXT: s_lshr_b32 s17, s3, 24
; GFX9-NEXT: s_and_b32 s3, s3, s18 ; GFX9-NEXT: s_and_b32 s3, s3, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 8 ; GFX9-NEXT: s_lshl_b32 s6, s6, 8
; GFX9-NEXT: s_or_b32 s3, s3, s6 ; GFX9-NEXT: s_or_b32 s3, s3, s6
; GFX9-NEXT: s_and_b32 s6, s16, s18 ; GFX9-NEXT: s_and_b32 s6, s16, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 16 ; GFX9-NEXT: s_lshl_b32 s6, s6, 16
; GFX9-NEXT: s_or_b32 s3, s3, s6 ; GFX9-NEXT: s_or_b32 s3, s3, s6
; GFX9-NEXT: s_and_b32 s6, s17, s18 ; GFX9-NEXT: s_lshl_b32 s6, s17, 24
; GFX9-NEXT: s_lshl_b32 s6, s6, 24
; GFX9-NEXT: s_or_b32 s3, s3, s6 ; GFX9-NEXT: s_or_b32 s3, s3, s6
; GFX9-NEXT: s_lshr_b32 s6, s5, 2 ; GFX9-NEXT: s_lshr_b32 s6, s5, 2
; GFX9-NEXT: s_cmp_eq_u32 s6, 1 ; GFX9-NEXT: s_cmp_eq_u32 s6, 1
; GFX9-NEXT: s_cselect_b32 s7, s1, s0 ; GFX9-NEXT: s_cselect_b32 s7, s1, s0
; GFX9-NEXT: s_cmp_eq_u32 s6, 2 ; GFX9-NEXT: s_cmp_eq_u32 s6, 2
; GFX9-NEXT: s_cselect_b32 s7, s2, s7 ; GFX9-NEXT: s_cselect_b32 s7, s2, s7
; GFX9-NEXT: s_cmp_eq_u32 s6, 3 ; GFX9-NEXT: s_cmp_eq_u32 s6, 3
; GFX9-NEXT: s_cselect_b32 s7, s3, s7 ; GFX9-NEXT: s_cselect_b32 s7, s3, s7
Show All 17 Lines
; GFX9-NEXT: s_lshr_b32 s5, s0, 16 ; GFX9-NEXT: s_lshr_b32 s5, s0, 16
; GFX9-NEXT: s_lshr_b32 s6, s0, 24 ; GFX9-NEXT: s_lshr_b32 s6, s0, 24
; GFX9-NEXT: s_and_b32 s0, s0, s18 ; GFX9-NEXT: s_and_b32 s0, s0, s18
; GFX9-NEXT: s_lshl_b32 s4, s4, 8 ; GFX9-NEXT: s_lshl_b32 s4, s4, 8
; GFX9-NEXT: s_or_b32 s0, s0, s4 ; GFX9-NEXT: s_or_b32 s0, s0, s4
; GFX9-NEXT: s_and_b32 s4, s5, s18 ; GFX9-NEXT: s_and_b32 s4, s5, s18
; GFX9-NEXT: s_lshl_b32 s4, s4, 16 ; GFX9-NEXT: s_lshl_b32 s4, s4, 16
; GFX9-NEXT: s_or_b32 s0, s0, s4 ; GFX9-NEXT: s_or_b32 s0, s0, s4
; GFX9-NEXT: s_and_b32 s4, s6, s18 ; GFX9-NEXT: s_lshl_b32 s4, s6, 24
; GFX9-NEXT: s_lshl_b32 s4, s4, 24
; GFX9-NEXT: s_lshr_b32 s7, s1, 8 ; GFX9-NEXT: s_lshr_b32 s7, s1, 8
; GFX9-NEXT: s_or_b32 s0, s0, s4 ; GFX9-NEXT: s_or_b32 s0, s0, s4
; GFX9-NEXT: s_and_b32 s4, s7, s18 ; GFX9-NEXT: s_and_b32 s4, s7, s18
; GFX9-NEXT: s_lshr_b32 s8, s1, 16 ; GFX9-NEXT: s_lshr_b32 s8, s1, 16
; GFX9-NEXT: s_lshr_b32 s9, s1, 24 ; GFX9-NEXT: s_lshr_b32 s9, s1, 24
; GFX9-NEXT: s_and_b32 s1, s1, s18 ; GFX9-NEXT: s_and_b32 s1, s1, s18
; GFX9-NEXT: s_lshl_b32 s4, s4, 8 ; GFX9-NEXT: s_lshl_b32 s4, s4, 8
; GFX9-NEXT: s_or_b32 s1, s1, s4 ; GFX9-NEXT: s_or_b32 s1, s1, s4
; GFX9-NEXT: s_and_b32 s4, s8, s18 ; GFX9-NEXT: s_and_b32 s4, s8, s18
; GFX9-NEXT: s_lshl_b32 s4, s4, 16 ; GFX9-NEXT: s_lshl_b32 s4, s4, 16
; GFX9-NEXT: s_or_b32 s1, s1, s4 ; GFX9-NEXT: s_or_b32 s1, s1, s4
; GFX9-NEXT: s_and_b32 s4, s9, s18 ; GFX9-NEXT: s_lshl_b32 s4, s9, 24
; GFX9-NEXT: s_lshl_b32 s4, s4, 24
; GFX9-NEXT: s_lshr_b32 s10, s2, 8 ; GFX9-NEXT: s_lshr_b32 s10, s2, 8
; GFX9-NEXT: s_or_b32 s1, s1, s4 ; GFX9-NEXT: s_or_b32 s1, s1, s4
; GFX9-NEXT: s_and_b32 s4, s10, s18 ; GFX9-NEXT: s_and_b32 s4, s10, s18
; GFX9-NEXT: s_lshr_b32 s11, s2, 16 ; GFX9-NEXT: s_lshr_b32 s11, s2, 16
; GFX9-NEXT: s_lshr_b32 s12, s2, 24 ; GFX9-NEXT: s_lshr_b32 s12, s2, 24
; GFX9-NEXT: s_and_b32 s2, s2, s18 ; GFX9-NEXT: s_and_b32 s2, s2, s18
; GFX9-NEXT: s_lshl_b32 s4, s4, 8 ; GFX9-NEXT: s_lshl_b32 s4, s4, 8
; GFX9-NEXT: s_or_b32 s2, s2, s4 ; GFX9-NEXT: s_or_b32 s2, s2, s4
; GFX9-NEXT: s_and_b32 s4, s11, s18 ; GFX9-NEXT: s_and_b32 s4, s11, s18
; GFX9-NEXT: s_lshl_b32 s4, s4, 16 ; GFX9-NEXT: s_lshl_b32 s4, s4, 16
; GFX9-NEXT: s_or_b32 s2, s2, s4 ; GFX9-NEXT: s_or_b32 s2, s2, s4
; GFX9-NEXT: s_and_b32 s4, s12, s18 ; GFX9-NEXT: s_lshl_b32 s4, s12, 24
; GFX9-NEXT: s_lshl_b32 s4, s4, 24
; GFX9-NEXT: s_lshr_b32 s13, s3, 8 ; GFX9-NEXT: s_lshr_b32 s13, s3, 8
; GFX9-NEXT: s_or_b32 s2, s2, s4 ; GFX9-NEXT: s_or_b32 s2, s2, s4
; GFX9-NEXT: s_and_b32 s4, s13, s18 ; GFX9-NEXT: s_and_b32 s4, s13, s18
; GFX9-NEXT: s_lshr_b32 s14, s3, 16 ; GFX9-NEXT: s_lshr_b32 s14, s3, 16
; GFX9-NEXT: s_lshr_b32 s15, s3, 24 ; GFX9-NEXT: s_lshr_b32 s15, s3, 24
; GFX9-NEXT: s_and_b32 s3, s3, s18 ; GFX9-NEXT: s_and_b32 s3, s3, s18
; GFX9-NEXT: s_lshl_b32 s4, s4, 8 ; GFX9-NEXT: s_lshl_b32 s4, s4, 8
; GFX9-NEXT: s_or_b32 s3, s3, s4 ; GFX9-NEXT: s_or_b32 s3, s3, s4
; GFX9-NEXT: s_and_b32 s4, s14, s18 ; GFX9-NEXT: s_and_b32 s4, s14, s18
; GFX9-NEXT: s_lshl_b32 s4, s4, 16 ; GFX9-NEXT: s_lshl_b32 s4, s4, 16
; GFX9-NEXT: s_or_b32 s3, s3, s4 ; GFX9-NEXT: s_or_b32 s3, s3, s4
; GFX9-NEXT: s_and_b32 s4, s15, s18 ; GFX9-NEXT: s_lshl_b32 s4, s15, 24
; GFX9-NEXT: s_lshl_b32 s4, s4, 24
; GFX9-NEXT: s_or_b32 s3, s3, s4 ; GFX9-NEXT: s_or_b32 s3, s3, s4
; GFX9-NEXT: v_mov_b32_e32 v0, s0 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
; GFX9-NEXT: v_mov_b32_e32 v1, s1 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
; GFX9-NEXT: v_mov_b32_e32 v2, s2 ; GFX9-NEXT: v_mov_b32_e32 v2, s2
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
Show All 9 Lines
; GFX8-NEXT: s_lshr_b32 s7, s0, 16 ; GFX8-NEXT: s_lshr_b32 s7, s0, 16
; GFX8-NEXT: s_lshr_b32 s8, s0, 24 ; GFX8-NEXT: s_lshr_b32 s8, s0, 24
; GFX8-NEXT: s_and_b32 s0, s0, s18 ; GFX8-NEXT: s_and_b32 s0, s0, s18
; GFX8-NEXT: s_lshl_b32 s6, s6, 8 ; GFX8-NEXT: s_lshl_b32 s6, s6, 8
; GFX8-NEXT: s_or_b32 s0, s0, s6 ; GFX8-NEXT: s_or_b32 s0, s0, s6
; GFX8-NEXT: s_and_b32 s6, s7, s18 ; GFX8-NEXT: s_and_b32 s6, s7, s18
; GFX8-NEXT: s_lshl_b32 s6, s6, 16 ; GFX8-NEXT: s_lshl_b32 s6, s6, 16
; GFX8-NEXT: s_or_b32 s0, s0, s6 ; GFX8-NEXT: s_or_b32 s0, s0, s6
; GFX8-NEXT: s_and_b32 s6, s8, s18 ; GFX8-NEXT: s_lshl_b32 s6, s8, 24
; GFX8-NEXT: s_lshl_b32 s6, s6, 24
; GFX8-NEXT: s_lshr_b32 s9, s1, 8 ; GFX8-NEXT: s_lshr_b32 s9, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s6 ; GFX8-NEXT: s_or_b32 s0, s0, s6
; GFX8-NEXT: s_and_b32 s6, s9, s18 ; GFX8-NEXT: s_and_b32 s6, s9, s18
; GFX8-NEXT: s_lshr_b32 s10, s1, 16 ; GFX8-NEXT: s_lshr_b32 s10, s1, 16
; GFX8-NEXT: s_lshr_b32 s11, s1, 24 ; GFX8-NEXT: s_lshr_b32 s11, s1, 24
; GFX8-NEXT: s_and_b32 s1, s1, s18 ; GFX8-NEXT: s_and_b32 s1, s1, s18
; GFX8-NEXT: s_lshl_b32 s6, s6, 8 ; GFX8-NEXT: s_lshl_b32 s6, s6, 8
; GFX8-NEXT: s_or_b32 s1, s1, s6 ; GFX8-NEXT: s_or_b32 s1, s1, s6
; GFX8-NEXT: s_and_b32 s6, s10, s18 ; GFX8-NEXT: s_and_b32 s6, s10, s18
; GFX8-NEXT: s_lshl_b32 s6, s6, 16 ; GFX8-NEXT: s_lshl_b32 s6, s6, 16
; GFX8-NEXT: s_or_b32 s1, s1, s6 ; GFX8-NEXT: s_or_b32 s1, s1, s6
; GFX8-NEXT: s_and_b32 s6, s11, s18 ; GFX8-NEXT: s_lshl_b32 s6, s11, 24
; GFX8-NEXT: s_lshl_b32 s6, s6, 24
; GFX8-NEXT: s_lshr_b32 s12, s2, 8 ; GFX8-NEXT: s_lshr_b32 s12, s2, 8
; GFX8-NEXT: s_or_b32 s1, s1, s6 ; GFX8-NEXT: s_or_b32 s1, s1, s6
; GFX8-NEXT: s_and_b32 s6, s12, s18 ; GFX8-NEXT: s_and_b32 s6, s12, s18
; GFX8-NEXT: s_lshr_b32 s13, s2, 16 ; GFX8-NEXT: s_lshr_b32 s13, s2, 16
; GFX8-NEXT: s_lshr_b32 s14, s2, 24 ; GFX8-NEXT: s_lshr_b32 s14, s2, 24
; GFX8-NEXT: s_and_b32 s2, s2, s18 ; GFX8-NEXT: s_and_b32 s2, s2, s18
; GFX8-NEXT: s_lshl_b32 s6, s6, 8 ; GFX8-NEXT: s_lshl_b32 s6, s6, 8
; GFX8-NEXT: s_or_b32 s2, s2, s6 ; GFX8-NEXT: s_or_b32 s2, s2, s6
; GFX8-NEXT: s_and_b32 s6, s13, s18 ; GFX8-NEXT: s_and_b32 s6, s13, s18
; GFX8-NEXT: s_lshl_b32 s6, s6, 16 ; GFX8-NEXT: s_lshl_b32 s6, s6, 16
; GFX8-NEXT: s_or_b32 s2, s2, s6 ; GFX8-NEXT: s_or_b32 s2, s2, s6
; GFX8-NEXT: s_and_b32 s6, s14, s18 ; GFX8-NEXT: s_lshl_b32 s6, s14, 24
; GFX8-NEXT: s_lshl_b32 s6, s6, 24
; GFX8-NEXT: s_lshr_b32 s15, s3, 8 ; GFX8-NEXT: s_lshr_b32 s15, s3, 8
; GFX8-NEXT: s_or_b32 s2, s2, s6 ; GFX8-NEXT: s_or_b32 s2, s2, s6
; GFX8-NEXT: s_and_b32 s6, s15, s18 ; GFX8-NEXT: s_and_b32 s6, s15, s18
; GFX8-NEXT: s_lshr_b32 s16, s3, 16 ; GFX8-NEXT: s_lshr_b32 s16, s3, 16
; GFX8-NEXT: s_lshr_b32 s17, s3, 24 ; GFX8-NEXT: s_lshr_b32 s17, s3, 24
; GFX8-NEXT: s_and_b32 s3, s3, s18 ; GFX8-NEXT: s_and_b32 s3, s3, s18
; GFX8-NEXT: s_lshl_b32 s6, s6, 8 ; GFX8-NEXT: s_lshl_b32 s6, s6, 8
; GFX8-NEXT: s_or_b32 s3, s3, s6 ; GFX8-NEXT: s_or_b32 s3, s3, s6
; GFX8-NEXT: s_and_b32 s6, s16, s18 ; GFX8-NEXT: s_and_b32 s6, s16, s18
; GFX8-NEXT: s_lshl_b32 s6, s6, 16 ; GFX8-NEXT: s_lshl_b32 s6, s6, 16
; GFX8-NEXT: s_or_b32 s3, s3, s6 ; GFX8-NEXT: s_or_b32 s3, s3, s6
; GFX8-NEXT: s_and_b32 s6, s17, s18 ; GFX8-NEXT: s_lshl_b32 s6, s17, 24
; GFX8-NEXT: s_lshl_b32 s6, s6, 24
; GFX8-NEXT: s_or_b32 s3, s3, s6 ; GFX8-NEXT: s_or_b32 s3, s3, s6
; GFX8-NEXT: s_lshr_b32 s6, s5, 2 ; GFX8-NEXT: s_lshr_b32 s6, s5, 2
; GFX8-NEXT: s_cmp_eq_u32 s6, 1 ; GFX8-NEXT: s_cmp_eq_u32 s6, 1
; GFX8-NEXT: s_cselect_b32 s7, s1, s0 ; GFX8-NEXT: s_cselect_b32 s7, s1, s0
; GFX8-NEXT: s_cmp_eq_u32 s6, 2 ; GFX8-NEXT: s_cmp_eq_u32 s6, 2
; GFX8-NEXT: s_cselect_b32 s7, s2, s7 ; GFX8-NEXT: s_cselect_b32 s7, s2, s7
; GFX8-NEXT: s_cmp_eq_u32 s6, 3 ; GFX8-NEXT: s_cmp_eq_u32 s6, 3
; GFX8-NEXT: s_cselect_b32 s7, s3, s7 ; GFX8-NEXT: s_cselect_b32 s7, s3, s7
Show All 17 Lines
; GFX8-NEXT: s_lshr_b32 s5, s0, 16 ; GFX8-NEXT: s_lshr_b32 s5, s0, 16
; GFX8-NEXT: s_lshr_b32 s6, s0, 24 ; GFX8-NEXT: s_lshr_b32 s6, s0, 24
; GFX8-NEXT: s_and_b32 s0, s0, s18 ; GFX8-NEXT: s_and_b32 s0, s0, s18
; GFX8-NEXT: s_lshl_b32 s4, s4, 8 ; GFX8-NEXT: s_lshl_b32 s4, s4, 8
; GFX8-NEXT: s_or_b32 s0, s0, s4 ; GFX8-NEXT: s_or_b32 s0, s0, s4
; GFX8-NEXT: s_and_b32 s4, s5, s18 ; GFX8-NEXT: s_and_b32 s4, s5, s18
; GFX8-NEXT: s_lshl_b32 s4, s4, 16 ; GFX8-NEXT: s_lshl_b32 s4, s4, 16
; GFX8-NEXT: s_or_b32 s0, s0, s4 ; GFX8-NEXT: s_or_b32 s0, s0, s4
; GFX8-NEXT: s_and_b32 s4, s6, s18 ; GFX8-NEXT: s_lshl_b32 s4, s6, 24
; GFX8-NEXT: s_lshl_b32 s4, s4, 24
; GFX8-NEXT: s_lshr_b32 s7, s1, 8 ; GFX8-NEXT: s_lshr_b32 s7, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s4 ; GFX8-NEXT: s_or_b32 s0, s0, s4
; GFX8-NEXT: s_and_b32 s4, s7, s18 ; GFX8-NEXT: s_and_b32 s4, s7, s18
; GFX8-NEXT: s_lshr_b32 s8, s1, 16 ; GFX8-NEXT: s_lshr_b32 s8, s1, 16
; GFX8-NEXT: s_lshr_b32 s9, s1, 24 ; GFX8-NEXT: s_lshr_b32 s9, s1, 24
; GFX8-NEXT: s_and_b32 s1, s1, s18 ; GFX8-NEXT: s_and_b32 s1, s1, s18
; GFX8-NEXT: s_lshl_b32 s4, s4, 8 ; GFX8-NEXT: s_lshl_b32 s4, s4, 8
; GFX8-NEXT: s_or_b32 s1, s1, s4 ; GFX8-NEXT: s_or_b32 s1, s1, s4
; GFX8-NEXT: s_and_b32 s4, s8, s18 ; GFX8-NEXT: s_and_b32 s4, s8, s18
; GFX8-NEXT: s_lshl_b32 s4, s4, 16 ; GFX8-NEXT: s_lshl_b32 s4, s4, 16
; GFX8-NEXT: s_or_b32 s1, s1, s4 ; GFX8-NEXT: s_or_b32 s1, s1, s4
; GFX8-NEXT: s_and_b32 s4, s9, s18 ; GFX8-NEXT: s_lshl_b32 s4, s9, 24
; GFX8-NEXT: s_lshl_b32 s4, s4, 24
; GFX8-NEXT: s_lshr_b32 s10, s2, 8 ; GFX8-NEXT: s_lshr_b32 s10, s2, 8
; GFX8-NEXT: s_or_b32 s1, s1, s4 ; GFX8-NEXT: s_or_b32 s1, s1, s4
; GFX8-NEXT: s_and_b32 s4, s10, s18 ; GFX8-NEXT: s_and_b32 s4, s10, s18
; GFX8-NEXT: s_lshr_b32 s11, s2, 16 ; GFX8-NEXT: s_lshr_b32 s11, s2, 16
; GFX8-NEXT: s_lshr_b32 s12, s2, 24 ; GFX8-NEXT: s_lshr_b32 s12, s2, 24
; GFX8-NEXT: s_and_b32 s2, s2, s18 ; GFX8-NEXT: s_and_b32 s2, s2, s18
; GFX8-NEXT: s_lshl_b32 s4, s4, 8 ; GFX8-NEXT: s_lshl_b32 s4, s4, 8
; GFX8-NEXT: s_or_b32 s2, s2, s4 ; GFX8-NEXT: s_or_b32 s2, s2, s4
; GFX8-NEXT: s_and_b32 s4, s11, s18 ; GFX8-NEXT: s_and_b32 s4, s11, s18
; GFX8-NEXT: s_lshl_b32 s4, s4, 16 ; GFX8-NEXT: s_lshl_b32 s4, s4, 16
; GFX8-NEXT: s_or_b32 s2, s2, s4 ; GFX8-NEXT: s_or_b32 s2, s2, s4
; GFX8-NEXT: s_and_b32 s4, s12, s18 ; GFX8-NEXT: s_lshl_b32 s4, s12, 24
; GFX8-NEXT: s_lshl_b32 s4, s4, 24
; GFX8-NEXT: s_lshr_b32 s13, s3, 8 ; GFX8-NEXT: s_lshr_b32 s13, s3, 8
; GFX8-NEXT: s_or_b32 s2, s2, s4 ; GFX8-NEXT: s_or_b32 s2, s2, s4
; GFX8-NEXT: s_and_b32 s4, s13, s18 ; GFX8-NEXT: s_and_b32 s4, s13, s18
; GFX8-NEXT: s_lshr_b32 s14, s3, 16 ; GFX8-NEXT: s_lshr_b32 s14, s3, 16
; GFX8-NEXT: s_lshr_b32 s15, s3, 24 ; GFX8-NEXT: s_lshr_b32 s15, s3, 24
; GFX8-NEXT: s_and_b32 s3, s3, s18 ; GFX8-NEXT: s_and_b32 s3, s3, s18
; GFX8-NEXT: s_lshl_b32 s4, s4, 8 ; GFX8-NEXT: s_lshl_b32 s4, s4, 8
; GFX8-NEXT: s_or_b32 s3, s3, s4 ; GFX8-NEXT: s_or_b32 s3, s3, s4
; GFX8-NEXT: s_and_b32 s4, s14, s18 ; GFX8-NEXT: s_and_b32 s4, s14, s18
; GFX8-NEXT: s_lshl_b32 s4, s4, 16 ; GFX8-NEXT: s_lshl_b32 s4, s4, 16
; GFX8-NEXT: s_or_b32 s3, s3, s4 ; GFX8-NEXT: s_or_b32 s3, s3, s4
; GFX8-NEXT: s_and_b32 s4, s15, s18 ; GFX8-NEXT: s_lshl_b32 s4, s15, 24
; GFX8-NEXT: s_lshl_b32 s4, s4, 24
; GFX8-NEXT: s_or_b32 s3, s3, s4 ; GFX8-NEXT: s_or_b32 s3, s3, s4
; GFX8-NEXT: v_mov_b32_e32 v0, s0 ; GFX8-NEXT: v_mov_b32_e32 v0, s0
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_mov_b32_e32 v2, s2 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
; GFX8-NEXT: v_mov_b32_e32 v3, s3 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v16i8_s_s: ; GFX7-LABEL: insertelement_s_v16i8_s_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0 ; GFX7-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0
; GFX7-NEXT: s_movk_i32 s18, 0xff ; GFX7-NEXT: s_movk_i32 s18, 0xff
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s6, s0, 8 ; GFX7-NEXT: s_lshr_b32 s6, s0, 8
; GFX7-NEXT: s_and_b32 s6, s6, s18 ; GFX7-NEXT: s_and_b32 s6, s6, s18
; GFX7-NEXT: s_lshr_b32 s7, s0, 16 ; GFX7-NEXT: s_lshr_b32 s7, s0, 16
; GFX7-NEXT: s_lshr_b32 s8, s0, 24 ; GFX7-NEXT: s_lshr_b32 s8, s0, 24
; GFX7-NEXT: s_and_b32 s0, s0, s18 ; GFX7-NEXT: s_and_b32 s0, s0, s18
; GFX7-NEXT: s_lshl_b32 s6, s6, 8 ; GFX7-NEXT: s_lshl_b32 s6, s6, 8
; GFX7-NEXT: s_or_b32 s0, s0, s6 ; GFX7-NEXT: s_or_b32 s0, s0, s6
; GFX7-NEXT: s_and_b32 s6, s7, s18 ; GFX7-NEXT: s_and_b32 s6, s7, s18
; GFX7-NEXT: s_lshl_b32 s6, s6, 16 ; GFX7-NEXT: s_lshl_b32 s6, s6, 16
; GFX7-NEXT: s_or_b32 s0, s0, s6 ; GFX7-NEXT: s_or_b32 s0, s0, s6
; GFX7-NEXT: s_and_b32 s6, s8, s18 ; GFX7-NEXT: s_lshl_b32 s6, s8, 24
; GFX7-NEXT: s_lshl_b32 s6, s6, 24
; GFX7-NEXT: s_lshr_b32 s9, s1, 8 ; GFX7-NEXT: s_lshr_b32 s9, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s6 ; GFX7-NEXT: s_or_b32 s0, s0, s6
; GFX7-NEXT: s_and_b32 s6, s9, s18 ; GFX7-NEXT: s_and_b32 s6, s9, s18
; GFX7-NEXT: s_lshr_b32 s10, s1, 16 ; GFX7-NEXT: s_lshr_b32 s10, s1, 16
; GFX7-NEXT: s_lshr_b32 s11, s1, 24 ; GFX7-NEXT: s_lshr_b32 s11, s1, 24
; GFX7-NEXT: s_and_b32 s1, s1, s18 ; GFX7-NEXT: s_and_b32 s1, s1, s18
; GFX7-NEXT: s_lshl_b32 s6, s6, 8 ; GFX7-NEXT: s_lshl_b32 s6, s6, 8
; GFX7-NEXT: s_or_b32 s1, s1, s6 ; GFX7-NEXT: s_or_b32 s1, s1, s6
; GFX7-NEXT: s_and_b32 s6, s10, s18 ; GFX7-NEXT: s_and_b32 s6, s10, s18
; GFX7-NEXT: s_lshl_b32 s6, s6, 16 ; GFX7-NEXT: s_lshl_b32 s6, s6, 16
; GFX7-NEXT: s_or_b32 s1, s1, s6 ; GFX7-NEXT: s_or_b32 s1, s1, s6
; GFX7-NEXT: s_and_b32 s6, s11, s18 ; GFX7-NEXT: s_lshl_b32 s6, s11, 24
; GFX7-NEXT: s_lshl_b32 s6, s6, 24
; GFX7-NEXT: s_lshr_b32 s12, s2, 8 ; GFX7-NEXT: s_lshr_b32 s12, s2, 8
; GFX7-NEXT: s_or_b32 s1, s1, s6 ; GFX7-NEXT: s_or_b32 s1, s1, s6
; GFX7-NEXT: s_and_b32 s6, s12, s18 ; GFX7-NEXT: s_and_b32 s6, s12, s18
; GFX7-NEXT: s_lshr_b32 s13, s2, 16 ; GFX7-NEXT: s_lshr_b32 s13, s2, 16
; GFX7-NEXT: s_lshr_b32 s14, s2, 24 ; GFX7-NEXT: s_lshr_b32 s14, s2, 24
; GFX7-NEXT: s_and_b32 s2, s2, s18 ; GFX7-NEXT: s_and_b32 s2, s2, s18
; GFX7-NEXT: s_lshl_b32 s6, s6, 8 ; GFX7-NEXT: s_lshl_b32 s6, s6, 8
; GFX7-NEXT: s_or_b32 s2, s2, s6 ; GFX7-NEXT: s_or_b32 s2, s2, s6
; GFX7-NEXT: s_and_b32 s6, s13, s18 ; GFX7-NEXT: s_and_b32 s6, s13, s18
; GFX7-NEXT: s_lshl_b32 s6, s6, 16 ; GFX7-NEXT: s_lshl_b32 s6, s6, 16
; GFX7-NEXT: s_or_b32 s2, s2, s6 ; GFX7-NEXT: s_or_b32 s2, s2, s6
; GFX7-NEXT: s_and_b32 s6, s14, s18 ; GFX7-NEXT: s_lshl_b32 s6, s14, 24
; GFX7-NEXT: s_lshl_b32 s6, s6, 24
; GFX7-NEXT: s_lshr_b32 s15, s3, 8 ; GFX7-NEXT: s_lshr_b32 s15, s3, 8
; GFX7-NEXT: s_or_b32 s2, s2, s6 ; GFX7-NEXT: s_or_b32 s2, s2, s6
; GFX7-NEXT: s_and_b32 s6, s15, s18 ; GFX7-NEXT: s_and_b32 s6, s15, s18
; GFX7-NEXT: s_lshr_b32 s16, s3, 16 ; GFX7-NEXT: s_lshr_b32 s16, s3, 16
; GFX7-NEXT: s_lshr_b32 s17, s3, 24 ; GFX7-NEXT: s_lshr_b32 s17, s3, 24
; GFX7-NEXT: s_and_b32 s3, s3, s18 ; GFX7-NEXT: s_and_b32 s3, s3, s18
; GFX7-NEXT: s_lshl_b32 s6, s6, 8 ; GFX7-NEXT: s_lshl_b32 s6, s6, 8
; GFX7-NEXT: s_or_b32 s3, s3, s6 ; GFX7-NEXT: s_or_b32 s3, s3, s6
; GFX7-NEXT: s_and_b32 s6, s16, s18 ; GFX7-NEXT: s_and_b32 s6, s16, s18
; GFX7-NEXT: s_lshl_b32 s6, s6, 16 ; GFX7-NEXT: s_lshl_b32 s6, s6, 16
; GFX7-NEXT: s_or_b32 s3, s3, s6 ; GFX7-NEXT: s_or_b32 s3, s3, s6
; GFX7-NEXT: s_and_b32 s6, s17, s18 ; GFX7-NEXT: s_lshl_b32 s6, s17, 24
; GFX7-NEXT: s_lshl_b32 s6, s6, 24
; GFX7-NEXT: s_or_b32 s3, s3, s6 ; GFX7-NEXT: s_or_b32 s3, s3, s6
; GFX7-NEXT: s_lshr_b32 s6, s5, 2 ; GFX7-NEXT: s_lshr_b32 s6, s5, 2
; GFX7-NEXT: s_cmp_eq_u32 s6, 1 ; GFX7-NEXT: s_cmp_eq_u32 s6, 1
; GFX7-NEXT: s_cselect_b32 s7, s1, s0 ; GFX7-NEXT: s_cselect_b32 s7, s1, s0
; GFX7-NEXT: s_cmp_eq_u32 s6, 2 ; GFX7-NEXT: s_cmp_eq_u32 s6, 2
; GFX7-NEXT: s_cselect_b32 s7, s2, s7 ; GFX7-NEXT: s_cselect_b32 s7, s2, s7
; GFX7-NEXT: s_cmp_eq_u32 s6, 3 ; GFX7-NEXT: s_cmp_eq_u32 s6, 3
; GFX7-NEXT: s_cselect_b32 s7, s3, s7 ; GFX7-NEXT: s_cselect_b32 s7, s3, s7
Show All 15 Lines
; GFX7-NEXT: s_lshr_b32 s4, s5, 8 ; GFX7-NEXT: s_lshr_b32 s4, s5, 8
; GFX7-NEXT: s_and_b32 s4, s4, s18 ; GFX7-NEXT: s_and_b32 s4, s4, s18
; GFX7-NEXT: s_lshr_b32 s6, s5, 16 ; GFX7-NEXT: s_lshr_b32 s6, s5, 16
; GFX7-NEXT: s_lshr_b32 s8, s5, 24 ; GFX7-NEXT: s_lshr_b32 s8, s5, 24
; GFX7-NEXT: s_and_b32 s5, s5, s18 ; GFX7-NEXT: s_and_b32 s5, s5, s18
; GFX7-NEXT: s_lshl_b32 s4, s4, 8 ; GFX7-NEXT: s_lshl_b32 s4, s4, 8
; GFX7-NEXT: s_or_b32 s4, s5, s4 ; GFX7-NEXT: s_or_b32 s4, s5, s4
; GFX7-NEXT: s_and_b32 s5, s6, s18 ; GFX7-NEXT: s_and_b32 s5, s6, s18
; GFX7-NEXT: s_lshl_b32 s5, s5, 16
; GFX7-NEXT: s_lshr_b32 s9, s7, 8 ; GFX7-NEXT: s_lshr_b32 s9, s7, 8
; GFX7-NEXT: s_or_b32 s4, s4, s5 ; GFX7-NEXT: s_lshl_b32 s5, s5, 16
; GFX7-NEXT: s_and_b32 s5, s8, s18
; GFX7-NEXT: s_and_b32 s6, s9, s18 ; GFX7-NEXT: s_and_b32 s6, s9, s18
; GFX7-NEXT: s_lshl_b32 s5, s5, 24 ; GFX7-NEXT: s_or_b32 s4, s4, s5
; GFX7-NEXT: s_lshl_b32 s5, s8, 24
; GFX7-NEXT: s_or_b32 s4, s4, s5 ; GFX7-NEXT: s_or_b32 s4, s4, s5
; GFX7-NEXT: s_lshr_b32 s10, s7, 16 ; GFX7-NEXT: s_lshr_b32 s10, s7, 16
; GFX7-NEXT: s_and_b32 s5, s7, s18 ; GFX7-NEXT: s_and_b32 s5, s7, s18
; GFX7-NEXT: s_lshl_b32 s6, s6, 8 ; GFX7-NEXT: s_lshl_b32 s6, s6, 8
; GFX7-NEXT: s_or_b32 s5, s5, s6 ; GFX7-NEXT: s_or_b32 s5, s5, s6
; GFX7-NEXT: s_and_b32 s6, s10, s18 ; GFX7-NEXT: s_and_b32 s6, s10, s18
; GFX7-NEXT: s_lshl_b32 s6, s6, 16 ; GFX7-NEXT: s_lshl_b32 s6, s6, 16
; GFX7-NEXT: s_lshr_b32 s11, s7, 24 ; GFX7-NEXT: s_lshr_b32 s11, s7, 24
; GFX7-NEXT: s_or_b32 s5, s5, s6 ; GFX7-NEXT: s_or_b32 s5, s5, s6
; GFX7-NEXT: s_and_b32 s6, s11, s18 ; GFX7-NEXT: s_lshl_b32 s6, s11, 24
; GFX7-NEXT: s_lshl_b32 s6, s6, 24
; GFX7-NEXT: s_lshr_b32 s12, s2, 8 ; GFX7-NEXT: s_lshr_b32 s12, s2, 8
; GFX7-NEXT: s_or_b32 s5, s5, s6 ; GFX7-NEXT: s_or_b32 s5, s5, s6
; GFX7-NEXT: s_and_b32 s6, s12, s18 ; GFX7-NEXT: s_and_b32 s6, s12, s18
; GFX7-NEXT: s_lshr_b32 s13, s2, 16 ; GFX7-NEXT: s_lshr_b32 s13, s2, 16
; GFX7-NEXT: s_lshr_b32 s14, s2, 24 ; GFX7-NEXT: s_lshr_b32 s14, s2, 24
; GFX7-NEXT: s_and_b32 s2, s2, s18 ; GFX7-NEXT: s_and_b32 s2, s2, s18
; GFX7-NEXT: s_lshl_b32 s6, s6, 8 ; GFX7-NEXT: s_lshl_b32 s6, s6, 8
; GFX7-NEXT: s_or_b32 s2, s2, s6 ; GFX7-NEXT: s_or_b32 s2, s2, s6
; GFX7-NEXT: s_and_b32 s6, s13, s18 ; GFX7-NEXT: s_and_b32 s6, s13, s18
; GFX7-NEXT: s_lshl_b32 s6, s6, 16 ; GFX7-NEXT: s_lshl_b32 s6, s6, 16
; GFX7-NEXT: s_or_b32 s2, s2, s6 ; GFX7-NEXT: s_or_b32 s2, s2, s6
; GFX7-NEXT: s_and_b32 s6, s14, s18 ; GFX7-NEXT: s_lshl_b32 s6, s14, 24
; GFX7-NEXT: s_lshl_b32 s6, s6, 24
; GFX7-NEXT: s_lshr_b32 s15, s3, 8 ; GFX7-NEXT: s_lshr_b32 s15, s3, 8
; GFX7-NEXT: s_or_b32 s6, s2, s6 ; GFX7-NEXT: s_or_b32 s6, s2, s6
; GFX7-NEXT: s_lshr_b32 s16, s3, 16 ; GFX7-NEXT: s_lshr_b32 s16, s3, 16
; GFX7-NEXT: s_lshr_b32 s17, s3, 24 ; GFX7-NEXT: s_lshr_b32 s17, s3, 24
; GFX7-NEXT: s_and_b32 s2, s3, s18 ; GFX7-NEXT: s_and_b32 s2, s3, s18
; GFX7-NEXT: s_and_b32 s3, s15, s18 ; GFX7-NEXT: s_and_b32 s3, s15, s18
; GFX7-NEXT: s_lshl_b32 s3, s3, 8 ; GFX7-NEXT: s_lshl_b32 s3, s3, 8
; GFX7-NEXT: s_or_b32 s2, s2, s3 ; GFX7-NEXT: s_or_b32 s2, s2, s3
; GFX7-NEXT: s_and_b32 s3, s16, s18 ; GFX7-NEXT: s_and_b32 s3, s16, s18
; GFX7-NEXT: s_lshl_b32 s3, s3, 16 ; GFX7-NEXT: s_lshl_b32 s3, s3, 16
; GFX7-NEXT: s_or_b32 s2, s2, s3 ; GFX7-NEXT: s_or_b32 s2, s2, s3
; GFX7-NEXT: s_and_b32 s3, s17, s18 ; GFX7-NEXT: s_lshl_b32 s3, s17, 24
; GFX7-NEXT: s_lshl_b32 s3, s3, 24
; GFX7-NEXT: s_or_b32 s7, s2, s3 ; GFX7-NEXT: s_or_b32 s7, s2, s3
; GFX7-NEXT: v_mov_b32_e32 v0, s4 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
; GFX7-NEXT: s_mov_b64 s[0:1], 0 ; GFX7-NEXT: s_mov_b64 s[0:1], 0
; GFX7-NEXT: v_mov_b32_e32 v1, s5 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
; GFX7-NEXT: v_mov_b32_e32 v2, s6 ; GFX7-NEXT: v_mov_b32_e32 v2, s6
; GFX7-NEXT: v_mov_b32_e32 v3, s7 ; GFX7-NEXT: v_mov_b32_e32 v3, s7
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
Show All 19 Lines
; GFX9-NEXT: s_lshl_b32 s2, s2, s1 ; GFX9-NEXT: s_lshl_b32 s2, s2, s1
; GFX9-NEXT: s_lshl_b32 s1, s6, s1 ; GFX9-NEXT: s_lshl_b32 s1, s6, s1
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s4, 1 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s4, 1
; GFX9-NEXT: s_not_b32 s5, s1 ; GFX9-NEXT: s_not_b32 s5, s1
; GFX9-NEXT: v_mov_b32_e32 v5, s2 ; GFX9-NEXT: v_mov_b32_e32 v5, s2
; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], s4, 3 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], s4, 3
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v2
; GFX9-NEXT: v_lshlrev_b32_sdwa v6, s0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v6, s0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v7, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v3
; GFX9-NEXT: v_and_b32_sdwa v10, v0, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v11, v0, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v0, v0, s6, v6
; GFX9-NEXT: v_and_b32_sdwa v12, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v13, v1, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v1, s6, v7
; GFX9-NEXT: v_lshlrev_b32_sdwa v8, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v8, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v14, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v11, 24, v2
; GFX9-NEXT: v_and_b32_sdwa v15, v2, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v12, 8, v3
; GFX9-NEXT: v_and_or_b32 v2, v2, s6, v8 ; GFX9-NEXT: v_and_b32_sdwa v14, v0, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_sdwa v9, v4, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_and_b32_sdwa v15, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_or3_b32 v0, v0, v10, v11 ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX9-NEXT: v_or3_b32 v1, v1, v12, v13 ; GFX9-NEXT: v_and_or_b32 v0, v0, s6, v6
; GFX9-NEXT: v_and_b32_sdwa v16, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; GFX9-NEXT: v_and_b32_sdwa v17, v3, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_or_b32 v1, v1, s6, v8
; GFX9-NEXT: v_and_or_b32 v3, v3, s6, v9 ; GFX9-NEXT: v_lshlrev_b32_sdwa v10, v4, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_or3_b32 v2, v2, v14, v15 ; GFX9-NEXT: v_lshrrev_b32_e32 v13, 24, v3
; GFX9-NEXT: v_and_b32_sdwa v16, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v11, 24, v11
; GFX9-NEXT: v_and_or_b32 v2, v2, s6, v10
; GFX9-NEXT: v_lshlrev_b32_sdwa v12, v4, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_or3_b32 v0, v0, v14, v7
; GFX9-NEXT: v_or3_b32 v1, v1, v15, v9
; GFX9-NEXT: v_and_b32_sdwa v17, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; GFX9-NEXT: v_and_or_b32 v3, v3, s6, v12
; GFX9-NEXT: v_or3_b32 v2, v2, v16, v11
; GFX9-NEXT: v_cndmask_b32_e32 v6, v0, v1, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v6, v0, v1, vcc
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], s4, 2 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], s4, 2
; GFX9-NEXT: v_or3_b32 v3, v3, v16, v17 ; GFX9-NEXT: v_or3_b32 v3, v3, v17, v13
; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, v2, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, v2, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, v3, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, v3, s[2:3]
; GFX9-NEXT: v_and_or_b32 v5, v6, s5, v5 ; GFX9-NEXT: v_and_or_b32 v5, v6, s5, v5
; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], s4, 0 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], s4, 0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3]
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5]
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 24, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 24, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 24, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 24, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v6, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v7, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v7, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v4, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v9, v4, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v9, v0, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_sdwa v4, v4, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v10, v0, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v13, v0, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v14, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v15, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v16, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; GFX9-NEXT: v_and_or_b32 v0, v0, s6, v5 ; GFX9-NEXT: v_and_or_b32 v0, v0, s6, v5
; GFX9-NEXT: v_and_b32_sdwa v11, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v12, v1, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v1, s6, v6
; GFX9-NEXT: v_and_b32_sdwa v13, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v14, v2, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v2, v2, s6, v7
; GFX9-NEXT: v_and_b32_sdwa v15, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v16, v3, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v3, v3, s6, v4 ; GFX9-NEXT: v_and_or_b32 v3, v3, s6, v4
; GFX9-NEXT: v_lshlrev_b32_e32 v11, 24, v12
; GFX9-NEXT: v_mov_b32_e32 v4, 0 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_or3_b32 v0, v0, v9, v10 ; GFX9-NEXT: v_lshlrev_b32_e32 v8, 24, v8
; GFX9-NEXT: v_or3_b32 v1, v1, v11, v12 ; GFX9-NEXT: v_and_or_b32 v1, v1, s6, v7
; GFX9-NEXT: v_or3_b32 v2, v2, v13, v14 ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 24, v10
; GFX9-NEXT: v_or3_b32 v3, v3, v15, v16 ; GFX9-NEXT: v_and_or_b32 v2, v2, s6, v9
; GFX9-NEXT: v_or3_b32 v0, v0, v13, v6
; GFX9-NEXT: v_or3_b32 v1, v1, v14, v8
; GFX9-NEXT: v_or3_b32 v2, v2, v15, v10
; GFX9-NEXT: v_or3_b32 v3, v3, v16, v11
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_v_v16i8_s_s: ; GFX8-LABEL: insertelement_v_v16i8_s_s:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_mov_b32_e32 v4, 8 ; GFX8-NEXT: v_mov_b32_e32 v4, 8
; GFX8-NEXT: v_mov_b32_e32 v5, 8 ; GFX8-NEXT: v_mov_b32_e32 v5, 8
; GFX8-NEXT: v_mov_b32_e32 v6, s0 ; GFX8-NEXT: v_mov_b32_e32 v6, s0
; GFX8-NEXT: s_and_b32 s1, s3, 3 ; GFX8-NEXT: s_and_b32 s1, s3, 3
; GFX8-NEXT: s_lshr_b32 s4, s3, 2 ; GFX8-NEXT: s_lshr_b32 s4, s3, 2
; GFX8-NEXT: s_lshl_b32 s1, s1, 3 ; GFX8-NEXT: s_lshl_b32 s1, s1, 3
; GFX8-NEXT: s_and_b32 s2, s2, s0 ; GFX8-NEXT: s_and_b32 s2, s2, s0
; GFX8-NEXT: s_lshl_b32 s0, s0, s1 ; GFX8-NEXT: s_lshl_b32 s0, s0, s1
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s4, 1 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s4, 1
; GFX8-NEXT: s_lshl_b32 s5, s2, s1 ; GFX8-NEXT: s_lshl_b32 s5, s2, s1
; GFX8-NEXT: s_not_b32 s6, s0 ; GFX8-NEXT: s_not_b32 s6, s0
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], s4, 2 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], s4, 2
; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], s4, 3 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], s4, 3
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 24, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 8, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 8, v2 ; GFX8-NEXT: v_lshlrev_b32_e32 v7, 24, v8
; GFX8-NEXT: v_lshlrev_b32_sdwa v7, v5, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshrrev_b32_e32 v10, 24, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v3
; GFX8-NEXT: v_lshlrev_b32_sdwa v8, v5, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v8, v5, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v11, v0, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v11, 8, v2
; GFX8-NEXT: v_and_b32_sdwa v12, v0, v6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v15, v0, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v13, v1, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v16, v1, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v14, v1, v6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v1, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v1, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v9, 24, v10
; GFX8-NEXT: v_or_b32_e32 v0, v0, v11 ; GFX8-NEXT: v_lshrrev_b32_e32 v12, 24, v2
; GFX8-NEXT: v_or_b32_e32 v1, v1, v13 ; GFX8-NEXT: v_lshlrev_b32_sdwa v10, v5, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v15, v2, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v13, 8, v3
; GFX8-NEXT: v_and_b32_sdwa v16, v2, v6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v15
; GFX8-NEXT: v_or_b32_sdwa v2, v2, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v1, v1, v16
; GFX8-NEXT: v_lshlrev_b32_sdwa v9, v5, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_and_b32_sdwa v17, v2, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v2, v2, v15 ; GFX8-NEXT: v_or_b32_sdwa v2, v2, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v17, v3, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v11, 24, v12
; GFX8-NEXT: v_and_b32_sdwa v18, v3, v6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v12, v5, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_or_b32_sdwa v3, v3, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v2, v2, v17
; GFX8-NEXT: v_or_b32_e32 v0, v0, v12 ; GFX8-NEXT: v_lshrrev_b32_e32 v14, 24, v3
; GFX8-NEXT: v_or_b32_e32 v1, v1, v14 ; GFX8-NEXT: v_and_b32_sdwa v18, v3, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v3, v3, v17 ; GFX8-NEXT: v_or_b32_sdwa v3, v3, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v2, v2, v16 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v7
; GFX8-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc ; GFX8-NEXT: v_or_b32_e32 v1, v1, v9
; GFX8-NEXT: v_lshlrev_b32_e32 v13, 24, v14
; GFX8-NEXT: v_or_b32_e32 v3, v3, v18 ; GFX8-NEXT: v_or_b32_e32 v3, v3, v18
; GFX8-NEXT: v_or_b32_e32 v2, v2, v11
; GFX8-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc
; GFX8-NEXT: v_or_b32_e32 v3, v3, v13
; GFX8-NEXT: v_cndmask_b32_e64 v4, v4, v2, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v4, v4, v2, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v4, v4, v3, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v4, v4, v3, s[2:3]
; GFX8-NEXT: v_and_b32_e32 v4, s6, v4 ; GFX8-NEXT: v_and_b32_e32 v4, s6, v4
; GFX8-NEXT: v_or_b32_e32 v4, s5, v4 ; GFX8-NEXT: v_or_b32_e32 v4, s5, v4
; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], s4, 0 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], s4, 0
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v4, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v4, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[4:5]
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[2:3]
; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v2
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 8, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v12, 8, v3
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v7, v5, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v8, v5, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v8, v5, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v5, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v10, v5, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v10, v0, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v5, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v11, v0, v6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v11, 24, v2
; GFX8-NEXT: v_lshrrev_b32_e32 v13, 24, v3
; GFX8-NEXT: v_and_b32_sdwa v14, v0, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v12, v1, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v15, v1, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v13, v1, v6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v16, v2, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v1, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v1, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v14, v2, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v2, v2, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v15, v2, v6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v6, v3, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v2, v2, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v16, v3, v6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v6, v3, v6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v3, v3, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v3, v3, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v10
; GFX8-NEXT: v_or_b32_e32 v1, v1, v12
; GFX8-NEXT: v_or_b32_e32 v2, v2, v14
; GFX8-NEXT: v_or_b32_e32 v3, v3, v16
; GFX8-NEXT: v_mov_b32_e32 v4, 0 ; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_or_b32_e32 v0, v0, v11 ; GFX8-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX8-NEXT: v_or_b32_e32 v1, v1, v13 ; GFX8-NEXT: v_or_b32_e32 v0, v0, v14
; GFX8-NEXT: v_or_b32_e32 v2, v2, v15 ; GFX8-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; GFX8-NEXT: v_or_b32_e32 v1, v1, v15
; GFX8-NEXT: v_lshlrev_b32_e32 v11, 24, v11
; GFX8-NEXT: v_or_b32_e32 v2, v2, v16
; GFX8-NEXT: v_lshlrev_b32_e32 v12, 24, v13
; GFX8-NEXT: v_or_b32_e32 v3, v3, v6 ; GFX8-NEXT: v_or_b32_e32 v3, v3, v6
; GFX8-NEXT: v_or_b32_e32 v0, v0, v7
; GFX8-NEXT: v_or_b32_e32 v1, v1, v9
; GFX8-NEXT: v_or_b32_e32 v2, v2, v11
; GFX8-NEXT: v_or_b32_e32 v3, v3, v12
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v16i8_s_s: ; GFX7-LABEL: insertelement_v_v16i8_s_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s10, 0 ; GFX7-NEXT: s_mov_b32 s10, 0
; GFX7-NEXT: s_mov_b32 s11, 0xf000 ; GFX7-NEXT: s_mov_b32 s11, 0xf000
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; GFX7-NEXT: v_and_b32_e32 v8, s6, v8 ; GFX7-NEXT: v_and_b32_e32 v8, s6, v8
; GFX7-NEXT: v_and_b32_e32 v10, s6, v10 ; GFX7-NEXT: v_and_b32_e32 v10, s6, v10
; GFX7-NEXT: v_and_b32_e32 v0, s6, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s6, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_and_b32_e32 v1, s6, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s6, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v7, 8, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v7, 8, v7
; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v3
; GFX7-NEXT: v_and_b32_e32 v6, s6, v6
; GFX7-NEXT: v_and_b32_e32 v9, s6, v9
; GFX7-NEXT: v_and_b32_e32 v11, s6, v11 ; GFX7-NEXT: v_and_b32_e32 v11, s6, v11
; GFX7-NEXT: v_and_b32_e32 v13, s6, v13 ; GFX7-NEXT: v_and_b32_e32 v13, s6, v13
; GFX7-NEXT: v_and_b32_e32 v2, s6, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s6, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v10, 8, v10 ; GFX7-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; GFX7-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8 ; GFX7-NEXT: v_lshlrev_b32_e32 v8, 16, v8
; GFX7-NEXT: v_or_b32_e32 v1, v1, v7 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v7
; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v3
; GFX7-NEXT: v_and_b32_e32 v12, s6, v12
; GFX7-NEXT: v_and_b32_e32 v14, s6, v14 ; GFX7-NEXT: v_and_b32_e32 v14, s6, v14
; GFX7-NEXT: v_and_b32_e32 v3, s6, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s6, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v13, 8, v13 ; GFX7-NEXT: v_lshlrev_b32_e32 v13, 8, v13
; GFX7-NEXT: v_lshlrev_b32_e32 v6, 24, v6 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; GFX7-NEXT: v_or_b32_e32 v0, v0, v5 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v9, 24, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; GFX7-NEXT: v_or_b32_e32 v1, v1, v8 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; GFX7-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; GFX7-NEXT: v_or_b32_e32 v2, v2, v10 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v10
; GFX7-NEXT: v_and_b32_e32 v15, s6, v15
; GFX7-NEXT: v_lshlrev_b32_e32 v12, 24, v12 ; GFX7-NEXT: v_lshlrev_b32_e32 v12, 24, v12
; GFX7-NEXT: v_or_b32_e32 v2, v2, v11 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v11
; GFX7-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; GFX7-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; GFX7-NEXT: v_or_b32_e32 v3, v3, v13 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v13
; GFX7-NEXT: v_or_b32_e32 v0, v0, v6 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v6
; GFX7-NEXT: v_or_b32_e32 v1, v1, v9 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v15, 24, v15 ; GFX7-NEXT: v_lshlrev_b32_e32 v15, 24, v15
; GFX7-NEXT: v_or_b32_e32 v3, v3, v14 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v14
; GFX7-NEXT: v_or_b32_e32 v2, v2, v12 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v12
; GFX7-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v4, v0, v1, vcc
; GFX7-NEXT: v_or_b32_e32 v3, v3, v15 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v15
; GFX7-NEXT: v_cndmask_b32_e64 v4, v4, v2, s[0:1] ; GFX7-NEXT: v_cndmask_b32_e64 v4, v4, v2, s[0:1]
; GFX7-NEXT: v_cndmask_b32_e64 v4, v4, v3, s[2:3] ; GFX7-NEXT: v_cndmask_b32_e64 v4, v4, v3, s[2:3]
; GFX7-NEXT: v_and_b32_e32 v4, s7, v4 ; GFX7-NEXT: v_and_b32_e32 v4, s7, v4
; GFX7-NEXT: v_or_b32_e32 v4, s5, v4 ; GFX7-NEXT: v_or_b32_e32 v4, s5, v4
; GFX7-NEXT: v_cmp_eq_u32_e64 s[4:5], s4, 0 ; GFX7-NEXT: v_cmp_eq_u32_e64 s[4:5], s4, 0
; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[4:5] ; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v4, s[4:5]
; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX7-NEXT: v_cndmask_b32_e64 v2, v2, v4, s[0:1] ; GFX7-NEXT: v_cndmask_b32_e64 v2, v2, v4, s[0:1]
; GFX7-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[2:3] ; GFX7-NEXT: v_cndmask_b32_e64 v3, v3, v4, s[2:3]
; GFX7-NEXT: v_lshrrev_b32_e32 v4, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX7-NEXT: v_and_b32_e32 v4, s6, v4 ; GFX7-NEXT: v_and_b32_e32 v4, s6, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 8, v1
; GFX7-NEXT: v_and_b32_e32 v0, s6, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s6, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 8, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v7 ; GFX7-NEXT: v_and_b32_e32 v4, s6, v7
; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s6, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s6, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v8 ; GFX7-NEXT: v_and_b32_e32 v4, s6, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v10, 8, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v10, 8, v2
; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v10 ; GFX7-NEXT: v_and_b32_e32 v4, s6, v10
; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v2
; GFX7-NEXT: v_and_b32_e32 v2, s6, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s6, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v11 ; GFX7-NEXT: v_and_b32_e32 v4, s6, v11
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v12 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v12
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v13, 8, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v13, 8, v3
; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v13 ; GFX7-NEXT: v_and_b32_e32 v4, s6, v13
; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v3
; GFX7-NEXT: v_and_b32_e32 v3, s6, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s6, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_and_b32_e32 v5, s6, v5
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v14 ; GFX7-NEXT: v_and_b32_e32 v4, s6, v14
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v15 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v15
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; GFX7-NEXT: v_or_b32_e32 v0, v0, v5
; GFX7-NEXT: v_or_b32_e32 v0, v0, v6
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 ; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <16 x i8>, <16 x i8> addrspace(1 )* %ptr %vec = load <16 x i8>, <16 x i8> addrspace(1 )* %ptr
%insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx
store <16 x i8> %insert, <16 x i8> addrspace(1)* null store <16 x i8> %insert, <16 x i8> addrspace(1)* null
ret void ret void
} }
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; GFX9-NEXT: s_lshr_b32 s7, s0, 16 ; GFX9-NEXT: s_lshr_b32 s7, s0, 16
; GFX9-NEXT: s_lshr_b32 s8, s0, 24 ; GFX9-NEXT: s_lshr_b32 s8, s0, 24
; GFX9-NEXT: s_and_b32 s0, s0, s18 ; GFX9-NEXT: s_and_b32 s0, s0, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 8 ; GFX9-NEXT: s_lshl_b32 s6, s6, 8
; GFX9-NEXT: s_or_b32 s0, s0, s6 ; GFX9-NEXT: s_or_b32 s0, s0, s6
; GFX9-NEXT: s_and_b32 s6, s7, s18 ; GFX9-NEXT: s_and_b32 s6, s7, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 16 ; GFX9-NEXT: s_lshl_b32 s6, s6, 16
; GFX9-NEXT: s_or_b32 s0, s0, s6 ; GFX9-NEXT: s_or_b32 s0, s0, s6
; GFX9-NEXT: s_and_b32 s6, s8, s18 ; GFX9-NEXT: s_lshl_b32 s6, s8, 24
; GFX9-NEXT: s_lshl_b32 s6, s6, 24
; GFX9-NEXT: s_lshr_b32 s9, s1, 8 ; GFX9-NEXT: s_lshr_b32 s9, s1, 8
; GFX9-NEXT: s_or_b32 s0, s0, s6 ; GFX9-NEXT: s_or_b32 s0, s0, s6
; GFX9-NEXT: s_and_b32 s6, s9, s18 ; GFX9-NEXT: s_and_b32 s6, s9, s18
; GFX9-NEXT: s_lshr_b32 s10, s1, 16 ; GFX9-NEXT: s_lshr_b32 s10, s1, 16
; GFX9-NEXT: s_lshr_b32 s11, s1, 24 ; GFX9-NEXT: s_lshr_b32 s11, s1, 24
; GFX9-NEXT: s_and_b32 s1, s1, s18 ; GFX9-NEXT: s_and_b32 s1, s1, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 8 ; GFX9-NEXT: s_lshl_b32 s6, s6, 8
; GFX9-NEXT: s_or_b32 s1, s1, s6 ; GFX9-NEXT: s_or_b32 s1, s1, s6
; GFX9-NEXT: s_and_b32 s6, s10, s18 ; GFX9-NEXT: s_and_b32 s6, s10, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 16 ; GFX9-NEXT: s_lshl_b32 s6, s6, 16
; GFX9-NEXT: s_or_b32 s1, s1, s6 ; GFX9-NEXT: s_or_b32 s1, s1, s6
; GFX9-NEXT: s_and_b32 s6, s11, s18 ; GFX9-NEXT: s_lshl_b32 s6, s11, 24
; GFX9-NEXT: s_lshl_b32 s6, s6, 24
; GFX9-NEXT: s_lshr_b32 s12, s2, 8 ; GFX9-NEXT: s_lshr_b32 s12, s2, 8
; GFX9-NEXT: s_or_b32 s1, s1, s6 ; GFX9-NEXT: s_or_b32 s1, s1, s6
; GFX9-NEXT: s_and_b32 s6, s12, s18 ; GFX9-NEXT: s_and_b32 s6, s12, s18
; GFX9-NEXT: s_lshr_b32 s13, s2, 16 ; GFX9-NEXT: s_lshr_b32 s13, s2, 16
; GFX9-NEXT: s_lshr_b32 s14, s2, 24 ; GFX9-NEXT: s_lshr_b32 s14, s2, 24
; GFX9-NEXT: s_and_b32 s2, s2, s18 ; GFX9-NEXT: s_and_b32 s2, s2, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 8 ; GFX9-NEXT: s_lshl_b32 s6, s6, 8
; GFX9-NEXT: s_or_b32 s2, s2, s6 ; GFX9-NEXT: s_or_b32 s2, s2, s6
; GFX9-NEXT: s_and_b32 s6, s13, s18 ; GFX9-NEXT: s_and_b32 s6, s13, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 16 ; GFX9-NEXT: s_lshl_b32 s6, s6, 16
; GFX9-NEXT: s_or_b32 s2, s2, s6 ; GFX9-NEXT: s_or_b32 s2, s2, s6
; GFX9-NEXT: s_and_b32 s6, s14, s18 ; GFX9-NEXT: s_lshl_b32 s6, s14, 24
; GFX9-NEXT: s_lshl_b32 s6, s6, 24
; GFX9-NEXT: s_lshr_b32 s15, s3, 8 ; GFX9-NEXT: s_lshr_b32 s15, s3, 8
; GFX9-NEXT: s_or_b32 s2, s2, s6 ; GFX9-NEXT: s_or_b32 s2, s2, s6
; GFX9-NEXT: s_and_b32 s6, s15, s18 ; GFX9-NEXT: s_and_b32 s6, s15, s18
; GFX9-NEXT: s_lshr_b32 s16, s3, 16 ; GFX9-NEXT: s_lshr_b32 s16, s3, 16
; GFX9-NEXT: s_lshr_b32 s17, s3, 24 ; GFX9-NEXT: s_lshr_b32 s17, s3, 24
; GFX9-NEXT: s_and_b32 s3, s3, s18 ; GFX9-NEXT: s_and_b32 s3, s3, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 8 ; GFX9-NEXT: s_lshl_b32 s6, s6, 8
; GFX9-NEXT: s_or_b32 s3, s3, s6 ; GFX9-NEXT: s_or_b32 s3, s3, s6
; GFX9-NEXT: s_and_b32 s6, s16, s18 ; GFX9-NEXT: s_and_b32 s6, s16, s18
; GFX9-NEXT: s_lshl_b32 s6, s6, 16 ; GFX9-NEXT: s_lshl_b32 s6, s6, 16
; GFX9-NEXT: s_or_b32 s3, s3, s6 ; GFX9-NEXT: s_or_b32 s3, s3, s6
; GFX9-NEXT: s_and_b32 s6, s17, s18 ; GFX9-NEXT: s_lshl_b32 s6, s17, 24
; GFX9-NEXT: s_lshl_b32 s6, s6, 24
; GFX9-NEXT: s_or_b32 s3, s3, s6 ; GFX9-NEXT: s_or_b32 s3, s3, s6
; GFX9-NEXT: s_lshr_b32 s6, s4, 2 ; GFX9-NEXT: s_lshr_b32 s6, s4, 2
; GFX9-NEXT: s_cmp_eq_u32 s6, 1 ; GFX9-NEXT: s_cmp_eq_u32 s6, 1
; GFX9-NEXT: s_cselect_b32 s7, s1, s0 ; GFX9-NEXT: s_cselect_b32 s7, s1, s0
; GFX9-NEXT: s_cmp_eq_u32 s6, 2 ; GFX9-NEXT: s_cmp_eq_u32 s6, 2
; GFX9-NEXT: s_cselect_b32 s7, s2, s7 ; GFX9-NEXT: s_cselect_b32 s7, s2, s7
; GFX9-NEXT: s_cmp_eq_u32 s6, 3 ; GFX9-NEXT: s_cmp_eq_u32 s6, 3
; GFX9-NEXT: s_cselect_b32 s7, s3, s7 ; GFX9-NEXT: s_cselect_b32 s7, s3, s7
Show All 11 Lines
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX9-NEXT: v_mov_b32_e32 v2, s2 ; GFX9-NEXT: v_mov_b32_e32 v2, s2
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s6, 2 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s6, 2
; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX9-NEXT: v_mov_b32_e32 v3, s3 ; GFX9-NEXT: v_mov_b32_e32 v3, s3
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s6, 3 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s6, 3
; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v4, s5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v4, s5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_or_b32 v4, v0, s18, v4 ; GFX9-NEXT: v_and_or_b32 v4, v0, s18, v4
; GFX9-NEXT: v_and_b32_sdwa v8, v0, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v0, v0, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s18 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; GFX9-NEXT: v_or3_b32 v0, v4, v8, v0 ; GFX9-NEXT: v_or3_b32 v0, v4, v0, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v1
; GFX9-NEXT: v_mov_b32_e32 v4, 8 ; GFX9-NEXT: v_mov_b32_e32 v4, 8
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v2
; GFX9-NEXT: v_and_or_b32 v5, v1, s18, v5
; GFX9-NEXT: v_and_b32_sdwa v8, v1, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s18 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_or3_b32 v1, v5, v8, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v4, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_and_or_b32 v5, v1, s18, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v2
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 24, v7
; GFX9-NEXT: v_or3_b32 v1, v5, v1, v6
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v4, v4, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_or_b32 v5, v2, s18, v5 ; GFX9-NEXT: v_and_or_b32 v5, v2, s18, v5
; GFX9-NEXT: v_and_b32_sdwa v6, v2, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v11, 24, v3
; GFX9-NEXT: v_and_b32_sdwa v2, v2, s18 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v2, v2, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_or3_b32 v2, v5, v6, v2 ; GFX9-NEXT: v_lshlrev_b32_e32 v6, 24, v9
; GFX9-NEXT: v_or3_b32 v2, v5, v2, v6
; GFX9-NEXT: v_and_or_b32 v4, v3, s18, v4 ; GFX9-NEXT: v_and_or_b32 v4, v3, s18, v4
; GFX9-NEXT: v_and_b32_sdwa v5, v3, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v3, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v3, v3, s18 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v5, 24, v11
; GFX9-NEXT: v_or3_b32 v3, v4, v5, v3 ; GFX9-NEXT: v_or3_b32 v3, v4, v3, v5
; GFX9-NEXT: v_mov_b32_e32 v4, 0 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v16i8_v_s: ; GFX8-LABEL: insertelement_s_v16i8_v_s:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0
; GFX8-NEXT: s_movk_i32 s17, 0xff ; GFX8-NEXT: s_movk_i32 s17, 0xff
; GFX8-NEXT: v_mov_b32_e32 v8, 8 ; GFX8-NEXT: v_mov_b32_e32 v12, 8
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s5, s0, 8 ; GFX8-NEXT: s_lshr_b32 s5, s0, 8
; GFX8-NEXT: s_and_b32 s5, s5, s17 ; GFX8-NEXT: s_and_b32 s5, s5, s17
; GFX8-NEXT: s_lshr_b32 s6, s0, 16 ; GFX8-NEXT: s_lshr_b32 s6, s0, 16
; GFX8-NEXT: s_lshr_b32 s7, s0, 24 ; GFX8-NEXT: s_lshr_b32 s7, s0, 24
; GFX8-NEXT: s_and_b32 s0, s0, s17 ; GFX8-NEXT: s_and_b32 s0, s0, s17
; GFX8-NEXT: s_lshl_b32 s5, s5, 8 ; GFX8-NEXT: s_lshl_b32 s5, s5, 8
; GFX8-NEXT: s_or_b32 s0, s0, s5 ; GFX8-NEXT: s_or_b32 s0, s0, s5
; GFX8-NEXT: s_and_b32 s5, s6, s17 ; GFX8-NEXT: s_and_b32 s5, s6, s17
; GFX8-NEXT: s_lshl_b32 s5, s5, 16 ; GFX8-NEXT: s_lshl_b32 s5, s5, 16
; GFX8-NEXT: s_or_b32 s0, s0, s5 ; GFX8-NEXT: s_or_b32 s0, s0, s5
; GFX8-NEXT: s_and_b32 s5, s7, s17 ; GFX8-NEXT: s_lshl_b32 s5, s7, 24
; GFX8-NEXT: s_lshl_b32 s5, s5, 24
; GFX8-NEXT: s_lshr_b32 s8, s1, 8 ; GFX8-NEXT: s_lshr_b32 s8, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s5 ; GFX8-NEXT: s_or_b32 s0, s0, s5
; GFX8-NEXT: s_and_b32 s5, s8, s17 ; GFX8-NEXT: s_and_b32 s5, s8, s17
; GFX8-NEXT: s_lshr_b32 s9, s1, 16 ; GFX8-NEXT: s_lshr_b32 s9, s1, 16
; GFX8-NEXT: s_lshr_b32 s10, s1, 24 ; GFX8-NEXT: s_lshr_b32 s10, s1, 24
; GFX8-NEXT: s_and_b32 s1, s1, s17 ; GFX8-NEXT: s_and_b32 s1, s1, s17
; GFX8-NEXT: s_lshl_b32 s5, s5, 8 ; GFX8-NEXT: s_lshl_b32 s5, s5, 8
; GFX8-NEXT: s_or_b32 s1, s1, s5 ; GFX8-NEXT: s_or_b32 s1, s1, s5
; GFX8-NEXT: s_and_b32 s5, s9, s17 ; GFX8-NEXT: s_and_b32 s5, s9, s17
; GFX8-NEXT: s_lshl_b32 s5, s5, 16 ; GFX8-NEXT: s_lshl_b32 s5, s5, 16
; GFX8-NEXT: s_or_b32 s1, s1, s5 ; GFX8-NEXT: s_or_b32 s1, s1, s5
; GFX8-NEXT: s_and_b32 s5, s10, s17 ; GFX8-NEXT: s_lshl_b32 s5, s10, 24
; GFX8-NEXT: s_lshl_b32 s5, s5, 24
; GFX8-NEXT: s_lshr_b32 s11, s2, 8 ; GFX8-NEXT: s_lshr_b32 s11, s2, 8
; GFX8-NEXT: s_or_b32 s1, s1, s5 ; GFX8-NEXT: s_or_b32 s1, s1, s5
; GFX8-NEXT: s_and_b32 s5, s11, s17 ; GFX8-NEXT: s_and_b32 s5, s11, s17
; GFX8-NEXT: s_lshr_b32 s12, s2, 16 ; GFX8-NEXT: s_lshr_b32 s12, s2, 16
; GFX8-NEXT: s_lshr_b32 s13, s2, 24 ; GFX8-NEXT: s_lshr_b32 s13, s2, 24
; GFX8-NEXT: s_and_b32 s2, s2, s17 ; GFX8-NEXT: s_and_b32 s2, s2, s17
; GFX8-NEXT: s_lshl_b32 s5, s5, 8 ; GFX8-NEXT: s_lshl_b32 s5, s5, 8
; GFX8-NEXT: s_or_b32 s2, s2, s5 ; GFX8-NEXT: s_or_b32 s2, s2, s5
; GFX8-NEXT: s_and_b32 s5, s12, s17 ; GFX8-NEXT: s_and_b32 s5, s12, s17
; GFX8-NEXT: s_lshl_b32 s5, s5, 16 ; GFX8-NEXT: s_lshl_b32 s5, s5, 16
; GFX8-NEXT: s_or_b32 s2, s2, s5 ; GFX8-NEXT: s_or_b32 s2, s2, s5
; GFX8-NEXT: s_and_b32 s5, s13, s17 ; GFX8-NEXT: s_lshl_b32 s5, s13, 24
; GFX8-NEXT: s_lshl_b32 s5, s5, 24
; GFX8-NEXT: s_lshr_b32 s14, s3, 8 ; GFX8-NEXT: s_lshr_b32 s14, s3, 8
; GFX8-NEXT: s_or_b32 s2, s2, s5 ; GFX8-NEXT: s_or_b32 s2, s2, s5
; GFX8-NEXT: s_and_b32 s5, s14, s17 ; GFX8-NEXT: s_and_b32 s5, s14, s17
; GFX8-NEXT: s_lshr_b32 s15, s3, 16 ; GFX8-NEXT: s_lshr_b32 s15, s3, 16
; GFX8-NEXT: s_lshr_b32 s16, s3, 24 ; GFX8-NEXT: s_lshr_b32 s16, s3, 24
; GFX8-NEXT: s_and_b32 s3, s3, s17 ; GFX8-NEXT: s_and_b32 s3, s3, s17
; GFX8-NEXT: s_lshl_b32 s5, s5, 8 ; GFX8-NEXT: s_lshl_b32 s5, s5, 8
; GFX8-NEXT: s_or_b32 s3, s3, s5 ; GFX8-NEXT: s_or_b32 s3, s3, s5
; GFX8-NEXT: s_and_b32 s5, s15, s17 ; GFX8-NEXT: s_and_b32 s5, s15, s17
; GFX8-NEXT: s_lshl_b32 s5, s5, 16 ; GFX8-NEXT: s_lshl_b32 s5, s5, 16
; GFX8-NEXT: s_or_b32 s3, s3, s5 ; GFX8-NEXT: s_or_b32 s3, s3, s5
; GFX8-NEXT: s_and_b32 s5, s16, s17 ; GFX8-NEXT: s_lshl_b32 s5, s16, 24
; GFX8-NEXT: s_lshl_b32 s5, s5, 24
; GFX8-NEXT: s_or_b32 s3, s3, s5 ; GFX8-NEXT: s_or_b32 s3, s3, s5
; GFX8-NEXT: s_lshr_b32 s5, s4, 2 ; GFX8-NEXT: s_lshr_b32 s5, s4, 2
; GFX8-NEXT: s_cmp_eq_u32 s5, 1 ; GFX8-NEXT: s_cmp_eq_u32 s5, 1
; GFX8-NEXT: s_cselect_b32 s6, s1, s0 ; GFX8-NEXT: s_cselect_b32 s6, s1, s0
; GFX8-NEXT: s_cmp_eq_u32 s5, 2 ; GFX8-NEXT: s_cmp_eq_u32 s5, 2
; GFX8-NEXT: s_cselect_b32 s6, s2, s6 ; GFX8-NEXT: s_cselect_b32 s6, s2, s6
; GFX8-NEXT: s_cmp_eq_u32 s5, 3 ; GFX8-NEXT: s_cmp_eq_u32 s5, 3
; GFX8-NEXT: s_cselect_b32 s6, s3, s6 ; GFX8-NEXT: s_cselect_b32 s6, s3, s6
Show All 12 Lines
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
; GFX8-NEXT: v_mov_b32_e32 v2, s2 ; GFX8-NEXT: v_mov_b32_e32 v2, s2
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s5, 2 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s5, 2
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
; GFX8-NEXT: v_mov_b32_e32 v3, s3 ; GFX8-NEXT: v_mov_b32_e32 v3, s3
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s5, 3 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s5, 3
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v4, vcc
; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v8, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v12, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_mov_b32_e32 v8, s17 ; GFX8-NEXT: v_mov_b32_e32 v12, s17
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v4, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v9, v0, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v0, v0, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v4, v4, v9
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v8 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v4, v0 ; GFX8-NEXT: v_or_b32_e32 v0, v4, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v5
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v1
; GFX8-NEXT: v_mov_b32_e32 v4, 8 ; GFX8-NEXT: v_mov_b32_e32 v4, 8
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX8-NEXT: v_or_b32_sdwa v5, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v5, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v9, v1, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v1, v1, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v2
; GFX8-NEXT: v_or_b32_e32 v5, v5, v9
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v8 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v5, v1 ; GFX8-NEXT: v_or_b32_e32 v1, v5, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v7
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v2
; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v3
; GFX8-NEXT: v_or_b32_e32 v1, v1, v5
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v2
; GFX8-NEXT: v_or_b32_sdwa v5, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v5, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v6, v2, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v2, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshrrev_b32_e32 v11, 24, v3
; GFX8-NEXT: v_or_b32_e32 v5, v5, v6
; GFX8-NEXT: v_and_b32_sdwa v2, v2, v8 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v2, v5, v2
; GFX8-NEXT: v_or_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v5, v3, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v3, v3, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v4, v4, v5 ; GFX8-NEXT: v_or_b32_e32 v2, v5, v2
; GFX8-NEXT: v_and_b32_sdwa v3, v3, v8 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v9
; GFX8-NEXT: v_or_b32_e32 v3, v4, v3 ; GFX8-NEXT: v_or_b32_e32 v3, v4, v3
; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v11
; GFX8-NEXT: v_or_b32_e32 v2, v2, v5
; GFX8-NEXT: v_or_b32_e32 v3, v3, v4
; GFX8-NEXT: v_mov_b32_e32 v4, 0 ; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v16i8_v_s: ; GFX7-LABEL: insertelement_s_v16i8_v_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0 ; GFX7-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0
; GFX7-NEXT: s_movk_i32 s17, 0xff ; GFX7-NEXT: s_movk_i32 s17, 0xff
; GFX7-NEXT: v_and_b32_e32 v0, s17, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s17, v0
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s5, s0, 8 ; GFX7-NEXT: s_lshr_b32 s5, s0, 8
; GFX7-NEXT: s_and_b32 s5, s5, s17 ; GFX7-NEXT: s_and_b32 s5, s5, s17
; GFX7-NEXT: s_lshr_b32 s6, s0, 16 ; GFX7-NEXT: s_lshr_b32 s6, s0, 16
; GFX7-NEXT: s_lshr_b32 s7, s0, 24 ; GFX7-NEXT: s_lshr_b32 s7, s0, 24
; GFX7-NEXT: s_and_b32 s0, s0, s17 ; GFX7-NEXT: s_and_b32 s0, s0, s17
; GFX7-NEXT: s_lshl_b32 s5, s5, 8 ; GFX7-NEXT: s_lshl_b32 s5, s5, 8
; GFX7-NEXT: s_or_b32 s0, s0, s5 ; GFX7-NEXT: s_or_b32 s0, s0, s5
; GFX7-NEXT: s_and_b32 s5, s6, s17 ; GFX7-NEXT: s_and_b32 s5, s6, s17
; GFX7-NEXT: s_lshl_b32 s5, s5, 16 ; GFX7-NEXT: s_lshl_b32 s5, s5, 16
; GFX7-NEXT: s_or_b32 s0, s0, s5 ; GFX7-NEXT: s_or_b32 s0, s0, s5
; GFX7-NEXT: s_and_b32 s5, s7, s17 ; GFX7-NEXT: s_lshl_b32 s5, s7, 24
; GFX7-NEXT: s_lshl_b32 s5, s5, 24
; GFX7-NEXT: s_lshr_b32 s8, s1, 8 ; GFX7-NEXT: s_lshr_b32 s8, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s5 ; GFX7-NEXT: s_or_b32 s0, s0, s5
; GFX7-NEXT: s_and_b32 s5, s8, s17 ; GFX7-NEXT: s_and_b32 s5, s8, s17
; GFX7-NEXT: s_lshr_b32 s9, s1, 16 ; GFX7-NEXT: s_lshr_b32 s9, s1, 16
; GFX7-NEXT: s_lshr_b32 s10, s1, 24 ; GFX7-NEXT: s_lshr_b32 s10, s1, 24
; GFX7-NEXT: s_and_b32 s1, s1, s17 ; GFX7-NEXT: s_and_b32 s1, s1, s17
; GFX7-NEXT: s_lshl_b32 s5, s5, 8 ; GFX7-NEXT: s_lshl_b32 s5, s5, 8
; GFX7-NEXT: s_or_b32 s1, s1, s5 ; GFX7-NEXT: s_or_b32 s1, s1, s5
; GFX7-NEXT: s_and_b32 s5, s9, s17 ; GFX7-NEXT: s_and_b32 s5, s9, s17
; GFX7-NEXT: s_lshl_b32 s5, s5, 16 ; GFX7-NEXT: s_lshl_b32 s5, s5, 16
; GFX7-NEXT: s_or_b32 s1, s1, s5 ; GFX7-NEXT: s_or_b32 s1, s1, s5
; GFX7-NEXT: s_and_b32 s5, s10, s17 ; GFX7-NEXT: s_lshl_b32 s5, s10, 24
; GFX7-NEXT: s_lshl_b32 s5, s5, 24
; GFX7-NEXT: s_lshr_b32 s11, s2, 8 ; GFX7-NEXT: s_lshr_b32 s11, s2, 8
; GFX7-NEXT: s_or_b32 s1, s1, s5 ; GFX7-NEXT: s_or_b32 s1, s1, s5
; GFX7-NEXT: s_and_b32 s5, s11, s17 ; GFX7-NEXT: s_and_b32 s5, s11, s17
; GFX7-NEXT: s_lshr_b32 s12, s2, 16 ; GFX7-NEXT: s_lshr_b32 s12, s2, 16
; GFX7-NEXT: s_lshr_b32 s13, s2, 24 ; GFX7-NEXT: s_lshr_b32 s13, s2, 24
; GFX7-NEXT: s_and_b32 s2, s2, s17 ; GFX7-NEXT: s_and_b32 s2, s2, s17
; GFX7-NEXT: s_lshl_b32 s5, s5, 8 ; GFX7-NEXT: s_lshl_b32 s5, s5, 8
; GFX7-NEXT: s_or_b32 s2, s2, s5 ; GFX7-NEXT: s_or_b32 s2, s2, s5
; GFX7-NEXT: s_and_b32 s5, s12, s17 ; GFX7-NEXT: s_and_b32 s5, s12, s17
; GFX7-NEXT: s_lshl_b32 s5, s5, 16 ; GFX7-NEXT: s_lshl_b32 s5, s5, 16
; GFX7-NEXT: s_or_b32 s2, s2, s5 ; GFX7-NEXT: s_or_b32 s2, s2, s5
; GFX7-NEXT: s_and_b32 s5, s13, s17 ; GFX7-NEXT: s_lshl_b32 s5, s13, 24
; GFX7-NEXT: s_lshl_b32 s5, s5, 24
; GFX7-NEXT: s_lshr_b32 s14, s3, 8 ; GFX7-NEXT: s_lshr_b32 s14, s3, 8
; GFX7-NEXT: s_or_b32 s2, s2, s5 ; GFX7-NEXT: s_or_b32 s2, s2, s5
; GFX7-NEXT: s_and_b32 s5, s14, s17 ; GFX7-NEXT: s_and_b32 s5, s14, s17
; GFX7-NEXT: s_lshr_b32 s15, s3, 16 ; GFX7-NEXT: s_lshr_b32 s15, s3, 16
; GFX7-NEXT: s_lshr_b32 s16, s3, 24 ; GFX7-NEXT: s_lshr_b32 s16, s3, 24
; GFX7-NEXT: s_and_b32 s3, s3, s17 ; GFX7-NEXT: s_and_b32 s3, s3, s17
; GFX7-NEXT: s_lshl_b32 s5, s5, 8 ; GFX7-NEXT: s_lshl_b32 s5, s5, 8
; GFX7-NEXT: s_or_b32 s3, s3, s5 ; GFX7-NEXT: s_or_b32 s3, s3, s5
; GFX7-NEXT: s_and_b32 s5, s15, s17 ; GFX7-NEXT: s_and_b32 s5, s15, s17
; GFX7-NEXT: s_lshl_b32 s5, s5, 16 ; GFX7-NEXT: s_lshl_b32 s5, s5, 16
; GFX7-NEXT: s_or_b32 s3, s3, s5 ; GFX7-NEXT: s_or_b32 s3, s3, s5
; GFX7-NEXT: s_and_b32 s5, s16, s17 ; GFX7-NEXT: s_lshl_b32 s5, s16, 24
; GFX7-NEXT: s_lshl_b32 s5, s5, 24
; GFX7-NEXT: s_or_b32 s3, s3, s5 ; GFX7-NEXT: s_or_b32 s3, s3, s5
; GFX7-NEXT: s_lshr_b32 s5, s4, 2 ; GFX7-NEXT: s_lshr_b32 s5, s4, 2
; GFX7-NEXT: s_cmp_eq_u32 s5, 1 ; GFX7-NEXT: s_cmp_eq_u32 s5, 1
; GFX7-NEXT: s_cselect_b32 s6, s1, s0 ; GFX7-NEXT: s_cselect_b32 s6, s1, s0
; GFX7-NEXT: s_cmp_eq_u32 s5, 2 ; GFX7-NEXT: s_cmp_eq_u32 s5, 2
; GFX7-NEXT: s_cselect_b32 s6, s2, s6 ; GFX7-NEXT: s_cselect_b32 s6, s2, s6
; GFX7-NEXT: s_cmp_eq_u32 s5, 3 ; GFX7-NEXT: s_cmp_eq_u32 s5, 3
; GFX7-NEXT: s_cselect_b32 s6, s3, s6 ; GFX7-NEXT: s_cselect_b32 s6, s3, s6
Show All 20 Lines
; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s17, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s17, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_and_b32_e32 v4, s17, v5 ; GFX7-NEXT: v_and_b32_e32 v4, s17, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_and_b32_e32 v4, s17, v6 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v7, 8, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_and_b32_e32 v4, s17, v7 ; GFX7-NEXT: v_and_b32_e32 v4, s17, v7
; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s17, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s17, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4
; GFX7-NEXT: v_and_b32_e32 v4, s17, v8 ; GFX7-NEXT: v_and_b32_e32 v4, s17, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4
; GFX7-NEXT: v_and_b32_e32 v4, s17, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v10, 8, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v10, 8, v2
; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4
; GFX7-NEXT: v_and_b32_e32 v4, s17, v10 ; GFX7-NEXT: v_and_b32_e32 v4, s17, v10
; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v2
; GFX7-NEXT: v_and_b32_e32 v2, s17, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s17, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
; GFX7-NEXT: v_and_b32_e32 v4, s17, v11 ; GFX7-NEXT: v_and_b32_e32 v4, s17, v11
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
; GFX7-NEXT: v_and_b32_e32 v4, s17, v12 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v12
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v13, 8, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v13, 8, v3
; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
; GFX7-NEXT: v_and_b32_e32 v4, s17, v13 ; GFX7-NEXT: v_and_b32_e32 v4, s17, v13
; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v3
; GFX7-NEXT: v_and_b32_e32 v3, s17, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s17, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v4, s17, v14 ; GFX7-NEXT: v_and_b32_e32 v4, s17, v14
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v4, s17, v15 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v15
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: s_mov_b64 s[0:1], 0 ; GFX7-NEXT: s_mov_b64 s[0:1], 0
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <16 x i8>, <16 x i8> addrspace(4)* %ptr %vec = load <16 x i8>, <16 x i8> addrspace(4)* %ptr
%insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx
Show All 15 Lines
; GFX9-NEXT: s_lshr_b32 s7, s0, 16 ; GFX9-NEXT: s_lshr_b32 s7, s0, 16
; GFX9-NEXT: s_lshr_b32 s8, s0, 24 ; GFX9-NEXT: s_lshr_b32 s8, s0, 24
; GFX9-NEXT: s_and_b32 s0, s0, s18 ; GFX9-NEXT: s_and_b32 s0, s0, s18
; GFX9-NEXT: s_lshl_b32 s5, s5, 8 ; GFX9-NEXT: s_lshl_b32 s5, s5, 8
; GFX9-NEXT: s_or_b32 s0, s0, s5 ; GFX9-NEXT: s_or_b32 s0, s0, s5
; GFX9-NEXT: s_and_b32 s5, s7, s18 ; GFX9-NEXT: s_and_b32 s5, s7, s18
; GFX9-NEXT: s_lshl_b32 s5, s5, 16 ; GFX9-NEXT: s_lshl_b32 s5, s5, 16
; GFX9-NEXT: s_or_b32 s0, s0, s5 ; GFX9-NEXT: s_or_b32 s0, s0, s5
; GFX9-NEXT: s_and_b32 s5, s8, s18 ; GFX9-NEXT: s_lshl_b32 s5, s8, 24
; GFX9-NEXT: s_lshl_b32 s5, s5, 24
; GFX9-NEXT: s_lshr_b32 s9, s1, 8 ; GFX9-NEXT: s_lshr_b32 s9, s1, 8
; GFX9-NEXT: s_or_b32 s8, s0, s5 ; GFX9-NEXT: s_or_b32 s8, s0, s5
; GFX9-NEXT: s_lshr_b32 s10, s1, 16 ; GFX9-NEXT: s_lshr_b32 s10, s1, 16
; GFX9-NEXT: s_lshr_b32 s11, s1, 24 ; GFX9-NEXT: s_lshr_b32 s11, s1, 24
; GFX9-NEXT: s_and_b32 s0, s1, s18 ; GFX9-NEXT: s_and_b32 s0, s1, s18
; GFX9-NEXT: s_and_b32 s1, s9, s18 ; GFX9-NEXT: s_and_b32 s1, s9, s18
; GFX9-NEXT: s_lshl_b32 s1, s1, 8 ; GFX9-NEXT: s_lshl_b32 s1, s1, 8
; GFX9-NEXT: s_or_b32 s0, s0, s1 ; GFX9-NEXT: s_or_b32 s0, s0, s1
; GFX9-NEXT: s_and_b32 s1, s10, s18 ; GFX9-NEXT: s_and_b32 s1, s10, s18
; GFX9-NEXT: s_lshl_b32 s1, s1, 16 ; GFX9-NEXT: s_lshl_b32 s1, s1, 16
; GFX9-NEXT: s_or_b32 s0, s0, s1 ; GFX9-NEXT: s_or_b32 s0, s0, s1
; GFX9-NEXT: s_and_b32 s1, s11, s18 ; GFX9-NEXT: s_lshl_b32 s1, s11, 24
; GFX9-NEXT: s_lshl_b32 s1, s1, 24
; GFX9-NEXT: s_lshr_b32 s12, s2, 8 ; GFX9-NEXT: s_lshr_b32 s12, s2, 8
; GFX9-NEXT: s_or_b32 s9, s0, s1 ; GFX9-NEXT: s_or_b32 s9, s0, s1
; GFX9-NEXT: s_and_b32 s1, s12, s18 ; GFX9-NEXT: s_and_b32 s1, s12, s18
; GFX9-NEXT: s_lshr_b32 s13, s2, 16 ; GFX9-NEXT: s_lshr_b32 s13, s2, 16
; GFX9-NEXT: s_and_b32 s0, s2, s18 ; GFX9-NEXT: s_and_b32 s0, s2, s18
; GFX9-NEXT: s_lshl_b32 s1, s1, 8 ; GFX9-NEXT: s_lshl_b32 s1, s1, 8
; GFX9-NEXT: s_or_b32 s0, s0, s1 ; GFX9-NEXT: s_or_b32 s0, s0, s1
; GFX9-NEXT: s_and_b32 s1, s13, s18 ; GFX9-NEXT: s_and_b32 s1, s13, s18
; GFX9-NEXT: s_lshl_b32 s1, s1, 16 ; GFX9-NEXT: s_lshl_b32 s1, s1, 16
; GFX9-NEXT: s_lshr_b32 s14, s2, 24 ; GFX9-NEXT: s_lshr_b32 s14, s2, 24
; GFX9-NEXT: s_or_b32 s0, s0, s1 ; GFX9-NEXT: s_or_b32 s0, s0, s1
; GFX9-NEXT: s_and_b32 s1, s14, s18 ; GFX9-NEXT: s_lshl_b32 s1, s14, 24
; GFX9-NEXT: s_lshl_b32 s1, s1, 24
; GFX9-NEXT: s_lshr_b32 s15, s3, 8 ; GFX9-NEXT: s_lshr_b32 s15, s3, 8
; GFX9-NEXT: s_or_b32 s10, s0, s1 ; GFX9-NEXT: s_or_b32 s10, s0, s1
; GFX9-NEXT: s_and_b32 s1, s15, s18 ; GFX9-NEXT: s_and_b32 s1, s15, s18
; GFX9-NEXT: s_lshr_b32 s16, s3, 16 ; GFX9-NEXT: s_lshr_b32 s16, s3, 16
; GFX9-NEXT: s_and_b32 s0, s3, s18 ; GFX9-NEXT: s_and_b32 s0, s3, s18
; GFX9-NEXT: s_lshl_b32 s1, s1, 8 ; GFX9-NEXT: s_lshl_b32 s1, s1, 8
; GFX9-NEXT: s_or_b32 s0, s0, s1 ; GFX9-NEXT: s_or_b32 s0, s0, s1
; GFX9-NEXT: s_and_b32 s1, s16, s18 ; GFX9-NEXT: s_and_b32 s1, s16, s18
; GFX9-NEXT: s_lshr_b32 s17, s3, 24 ; GFX9-NEXT: s_lshr_b32 s17, s3, 24
; GFX9-NEXT: s_lshl_b32 s1, s1, 16 ; GFX9-NEXT: s_lshl_b32 s1, s1, 16
; GFX9-NEXT: s_or_b32 s0, s0, s1 ; GFX9-NEXT: s_or_b32 s0, s0, s1
; GFX9-NEXT: s_and_b32 s1, s17, s18 ; GFX9-NEXT: s_lshl_b32 s1, s17, 24
; GFX9-NEXT: s_lshl_b32 s1, s1, 24
; GFX9-NEXT: v_mov_b32_e32 v1, s8 ; GFX9-NEXT: v_mov_b32_e32 v1, s8
; GFX9-NEXT: v_mov_b32_e32 v2, s9 ; GFX9-NEXT: v_mov_b32_e32 v2, s9
; GFX9-NEXT: s_or_b32 s11, s0, s1 ; GFX9-NEXT: s_or_b32 s11, s0, s1
; GFX9-NEXT: v_mov_b32_e32 v3, s10 ; GFX9-NEXT: v_mov_b32_e32 v3, s10
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v4 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v4
; GFX9-NEXT: v_lshlrev_b32_e32 v0, 3, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX9-NEXT: s_and_b32 s4, s4, s18 ; GFX9-NEXT: s_and_b32 s4, s4, s18
; GFX9-NEXT: v_lshlrev_b32_e64 v2, v0, s4 ; GFX9-NEXT: v_lshlrev_b32_e64 v2, v0, s4
; GFX9-NEXT: v_lshlrev_b32_e64 v0, v0, s18 ; GFX9-NEXT: v_lshlrev_b32_e64 v0, v0, s18
; GFX9-NEXT: v_mov_b32_e32 v5, s11 ; GFX9-NEXT: v_mov_b32_e32 v5, s11
; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v4 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v4
; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v5, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v1, v1, v5, s[2:3]
; GFX9-NEXT: v_xor_b32_e32 v0, -1, v0 ; GFX9-NEXT: v_xor_b32_e32 v0, -1, v0
; GFX9-NEXT: v_and_or_b32 v5, v1, v0, v2 ; GFX9-NEXT: v_and_or_b32 v5, v1, v0, v2
; GFX9-NEXT: v_mov_b32_e32 v0, s8 ; GFX9-NEXT: v_mov_b32_e32 v0, s8
; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5]
; GFX9-NEXT: s_mov_b32 s6, 8
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX9-NEXT: v_mov_b32_e32 v1, s9 ; GFX9-NEXT: v_mov_b32_e32 v1, s9
; GFX9-NEXT: v_lshlrev_b32_sdwa v4, s6, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_mov_b32_e32 v2, s10 ; GFX9-NEXT: v_mov_b32_e32 v2, s10
; GFX9-NEXT: v_mov_b32_e32 v3, s11 ; GFX9-NEXT: v_mov_b32_e32 v3, s11
; GFX9-NEXT: s_mov_b32 s6, 8
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc
; GFX9-NEXT: v_and_or_b32 v4, v0, s18, v4
; GFX9-NEXT: v_and_b32_sdwa v8, v0, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s18 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_or3_b32 v0, v4, v8, v0
; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3]
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v4, s6, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_or_b32 v4, v0, s18, v4
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; GFX9-NEXT: v_or3_b32 v0, v4, v0, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v1
; GFX9-NEXT: v_mov_b32_e32 v4, 8 ; GFX9-NEXT: v_mov_b32_e32 v4, 8
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v2
; GFX9-NEXT: v_and_or_b32 v5, v1, s18, v5
; GFX9-NEXT: v_and_b32_sdwa v8, v1, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s18 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_or3_b32 v1, v5, v8, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v4, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_and_or_b32 v5, v1, s18, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v2
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 24, v7
; GFX9-NEXT: v_or3_b32 v1, v5, v1, v6
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v4, v4, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_or_b32 v5, v2, s18, v5 ; GFX9-NEXT: v_and_or_b32 v5, v2, s18, v5
; GFX9-NEXT: v_and_b32_sdwa v6, v2, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v11, 24, v3
; GFX9-NEXT: v_and_b32_sdwa v2, v2, s18 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v2, v2, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_or3_b32 v2, v5, v6, v2 ; GFX9-NEXT: v_lshlrev_b32_e32 v6, 24, v9
; GFX9-NEXT: v_or3_b32 v2, v5, v2, v6
; GFX9-NEXT: v_and_or_b32 v4, v3, s18, v4 ; GFX9-NEXT: v_and_or_b32 v4, v3, s18, v4
; GFX9-NEXT: v_and_b32_sdwa v5, v3, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v3, s18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v3, v3, s18 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v5, 24, v11
; GFX9-NEXT: v_or3_b32 v3, v4, v5, v3 ; GFX9-NEXT: v_or3_b32 v3, v4, v3, v5
; GFX9-NEXT: v_mov_b32_e32 v4, 0 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v16i8_s_v: ; GFX8-LABEL: insertelement_s_v16i8_s_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0
; GFX8-NEXT: s_movk_i32 s18, 0xff ; GFX8-NEXT: s_movk_i32 s18, 0xff
; GFX8-NEXT: v_lshrrev_b32_e32 v4, 2, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 2, v0
; GFX8-NEXT: v_and_b32_e32 v0, 3, v0 ; GFX8-NEXT: v_and_b32_e32 v0, 3, v0
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v4 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v4
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s5, s0, 8 ; GFX8-NEXT: s_lshr_b32 s5, s0, 8
; GFX8-NEXT: s_and_b32 s5, s5, s18 ; GFX8-NEXT: s_and_b32 s5, s5, s18
; GFX8-NEXT: s_lshr_b32 s6, s0, 16 ; GFX8-NEXT: s_lshr_b32 s6, s0, 16
; GFX8-NEXT: s_lshr_b32 s7, s0, 24 ; GFX8-NEXT: s_lshr_b32 s7, s0, 24
; GFX8-NEXT: s_and_b32 s0, s0, s18 ; GFX8-NEXT: s_and_b32 s0, s0, s18
; GFX8-NEXT: s_lshl_b32 s5, s5, 8 ; GFX8-NEXT: s_lshl_b32 s5, s5, 8
; GFX8-NEXT: s_or_b32 s0, s0, s5 ; GFX8-NEXT: s_or_b32 s0, s0, s5
; GFX8-NEXT: s_and_b32 s5, s6, s18 ; GFX8-NEXT: s_and_b32 s5, s6, s18
; GFX8-NEXT: s_lshl_b32 s5, s5, 16 ; GFX8-NEXT: s_lshl_b32 s5, s5, 16
; GFX8-NEXT: s_or_b32 s0, s0, s5 ; GFX8-NEXT: s_or_b32 s0, s0, s5
; GFX8-NEXT: s_and_b32 s5, s7, s18 ; GFX8-NEXT: s_lshl_b32 s5, s7, 24
; GFX8-NEXT: s_lshl_b32 s5, s5, 24
; GFX8-NEXT: s_lshr_b32 s9, s1, 8 ; GFX8-NEXT: s_lshr_b32 s9, s1, 8
; GFX8-NEXT: s_or_b32 s8, s0, s5 ; GFX8-NEXT: s_or_b32 s8, s0, s5
; GFX8-NEXT: s_lshr_b32 s10, s1, 16 ; GFX8-NEXT: s_lshr_b32 s10, s1, 16
; GFX8-NEXT: s_lshr_b32 s11, s1, 24 ; GFX8-NEXT: s_lshr_b32 s11, s1, 24
; GFX8-NEXT: s_and_b32 s0, s1, s18 ; GFX8-NEXT: s_and_b32 s0, s1, s18
; GFX8-NEXT: s_and_b32 s1, s9, s18 ; GFX8-NEXT: s_and_b32 s1, s9, s18
; GFX8-NEXT: s_lshl_b32 s1, s1, 8 ; GFX8-NEXT: s_lshl_b32 s1, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s10, s18 ; GFX8-NEXT: s_and_b32 s1, s10, s18
; GFX8-NEXT: s_lshl_b32 s1, s1, 16 ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s11, s18 ; GFX8-NEXT: s_lshl_b32 s1, s11, 24
; GFX8-NEXT: s_lshl_b32 s1, s1, 24
; GFX8-NEXT: s_lshr_b32 s12, s2, 8 ; GFX8-NEXT: s_lshr_b32 s12, s2, 8
; GFX8-NEXT: s_or_b32 s9, s0, s1 ; GFX8-NEXT: s_or_b32 s9, s0, s1
; GFX8-NEXT: s_and_b32 s1, s12, s18 ; GFX8-NEXT: s_and_b32 s1, s12, s18
; GFX8-NEXT: s_lshr_b32 s13, s2, 16 ; GFX8-NEXT: s_lshr_b32 s13, s2, 16
; GFX8-NEXT: s_and_b32 s0, s2, s18 ; GFX8-NEXT: s_and_b32 s0, s2, s18
; GFX8-NEXT: s_lshl_b32 s1, s1, 8 ; GFX8-NEXT: s_lshl_b32 s1, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s13, s18 ; GFX8-NEXT: s_and_b32 s1, s13, s18
; GFX8-NEXT: s_lshl_b32 s1, s1, 16 ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_lshr_b32 s14, s2, 24 ; GFX8-NEXT: s_lshr_b32 s14, s2, 24
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s14, s18 ; GFX8-NEXT: s_lshl_b32 s1, s14, 24
; GFX8-NEXT: s_lshl_b32 s1, s1, 24
; GFX8-NEXT: s_lshr_b32 s15, s3, 8 ; GFX8-NEXT: s_lshr_b32 s15, s3, 8
; GFX8-NEXT: s_or_b32 s10, s0, s1 ; GFX8-NEXT: s_or_b32 s10, s0, s1
; GFX8-NEXT: s_and_b32 s1, s15, s18 ; GFX8-NEXT: s_and_b32 s1, s15, s18
; GFX8-NEXT: s_lshr_b32 s16, s3, 16 ; GFX8-NEXT: s_lshr_b32 s16, s3, 16
; GFX8-NEXT: s_and_b32 s0, s3, s18 ; GFX8-NEXT: s_and_b32 s0, s3, s18
; GFX8-NEXT: s_lshl_b32 s1, s1, 8 ; GFX8-NEXT: s_lshl_b32 s1, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s16, s18 ; GFX8-NEXT: s_and_b32 s1, s16, s18
; GFX8-NEXT: s_lshr_b32 s17, s3, 24 ; GFX8-NEXT: s_lshr_b32 s17, s3, 24
; GFX8-NEXT: s_lshl_b32 s1, s1, 16 ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s17, s18 ; GFX8-NEXT: s_lshl_b32 s1, s17, 24
; GFX8-NEXT: s_lshl_b32 s1, s1, 24
; GFX8-NEXT: v_mov_b32_e32 v1, s8 ; GFX8-NEXT: v_mov_b32_e32 v1, s8
; GFX8-NEXT: v_mov_b32_e32 v2, s9 ; GFX8-NEXT: v_mov_b32_e32 v2, s9
; GFX8-NEXT: s_or_b32 s11, s0, s1 ; GFX8-NEXT: s_or_b32 s11, s0, s1
; GFX8-NEXT: v_mov_b32_e32 v3, s10 ; GFX8-NEXT: v_mov_b32_e32 v3, s10
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v4 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v4
; GFX8-NEXT: v_lshlrev_b32_e32 v0, 3, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX8-NEXT: s_and_b32 s4, s4, s18 ; GFX8-NEXT: s_and_b32 s4, s4, s18
; GFX8-NEXT: v_lshlrev_b32_e64 v2, v0, s4 ; GFX8-NEXT: v_lshlrev_b32_e64 v2, v0, s4
; GFX8-NEXT: v_lshlrev_b32_e64 v0, v0, s18 ; GFX8-NEXT: v_lshlrev_b32_e64 v0, v0, s18
; GFX8-NEXT: v_mov_b32_e32 v5, s11 ; GFX8-NEXT: v_mov_b32_e32 v5, s11
; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v3, s[0:1]
; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v4 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v4
; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v5, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v5, s[2:3]
; GFX8-NEXT: v_xor_b32_e32 v0, -1, v0 ; GFX8-NEXT: v_xor_b32_e32 v0, -1, v0
; GFX8-NEXT: v_and_b32_e32 v0, v1, v0 ; GFX8-NEXT: v_and_b32_e32 v0, v1, v0
; GFX8-NEXT: v_or_b32_e32 v5, v0, v2 ; GFX8-NEXT: v_or_b32_e32 v5, v0, v2
; GFX8-NEXT: v_mov_b32_e32 v0, s8 ; GFX8-NEXT: v_mov_b32_e32 v0, s8
; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5]
; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX8-NEXT: v_mov_b32_e32 v8, 8 ; GFX8-NEXT: v_mov_b32_e32 v12, 8
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v8, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v12, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_mov_b32_e32 v8, s18
; GFX8-NEXT: v_mov_b32_e32 v1, s9 ; GFX8-NEXT: v_mov_b32_e32 v1, s9
; GFX8-NEXT: v_or_b32_sdwa v4, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v9, v0, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_mov_b32_e32 v2, s10 ; GFX8-NEXT: v_mov_b32_e32 v2, s10
; GFX8-NEXT: v_mov_b32_e32 v3, s11 ; GFX8-NEXT: v_mov_b32_e32 v3, s11
; GFX8-NEXT: v_mov_b32_e32 v12, s18
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc
; GFX8-NEXT: v_or_b32_e32 v4, v4, v9
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v8 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3]
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v4, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v4, v0 ; GFX8-NEXT: v_or_b32_e32 v0, v4, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v5
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v1
; GFX8-NEXT: v_mov_b32_e32 v4, 8 ; GFX8-NEXT: v_mov_b32_e32 v4, 8
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX8-NEXT: v_or_b32_sdwa v5, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v5, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v9, v1, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v1, v1, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v2
; GFX8-NEXT: v_or_b32_e32 v5, v5, v9
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v8 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v5, v1 ; GFX8-NEXT: v_or_b32_e32 v1, v5, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v7
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v2
; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v3
; GFX8-NEXT: v_or_b32_e32 v1, v1, v5
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v2
; GFX8-NEXT: v_or_b32_sdwa v5, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v5, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v6, v2, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v2, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshrrev_b32_e32 v11, 24, v3
; GFX8-NEXT: v_or_b32_e32 v5, v5, v6
; GFX8-NEXT: v_and_b32_sdwa v2, v2, v8 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v2, v5, v2
; GFX8-NEXT: v_or_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v5, v3, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v3, v3, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v4, v4, v5 ; GFX8-NEXT: v_or_b32_e32 v2, v5, v2
; GFX8-NEXT: v_and_b32_sdwa v3, v3, v8 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v9
; GFX8-NEXT: v_or_b32_e32 v3, v4, v3 ; GFX8-NEXT: v_or_b32_e32 v3, v4, v3
; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v11
; GFX8-NEXT: v_or_b32_e32 v2, v2, v5
; GFX8-NEXT: v_or_b32_e32 v3, v3, v4
; GFX8-NEXT: v_mov_b32_e32 v4, 0 ; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v16i8_s_v: ; GFX7-LABEL: insertelement_s_v16i8_s_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0 ; GFX7-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0
; GFX7-NEXT: s_movk_i32 s18, 0xff ; GFX7-NEXT: s_movk_i32 s18, 0xff
; GFX7-NEXT: v_lshrrev_b32_e32 v4, 2, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 2, v0
; GFX7-NEXT: v_and_b32_e32 v0, 3, v0 ; GFX7-NEXT: v_and_b32_e32 v0, 3, v0
; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v4 ; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v4
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s5, s0, 8 ; GFX7-NEXT: s_lshr_b32 s5, s0, 8
; GFX7-NEXT: s_and_b32 s5, s5, s18 ; GFX7-NEXT: s_and_b32 s5, s5, s18
; GFX7-NEXT: s_lshr_b32 s6, s0, 16 ; GFX7-NEXT: s_lshr_b32 s6, s0, 16
; GFX7-NEXT: s_lshr_b32 s7, s0, 24 ; GFX7-NEXT: s_lshr_b32 s7, s0, 24
; GFX7-NEXT: s_and_b32 s0, s0, s18 ; GFX7-NEXT: s_and_b32 s0, s0, s18
; GFX7-NEXT: s_lshl_b32 s5, s5, 8 ; GFX7-NEXT: s_lshl_b32 s5, s5, 8
; GFX7-NEXT: s_or_b32 s0, s0, s5 ; GFX7-NEXT: s_or_b32 s0, s0, s5
; GFX7-NEXT: s_and_b32 s5, s6, s18 ; GFX7-NEXT: s_and_b32 s5, s6, s18
; GFX7-NEXT: s_lshl_b32 s5, s5, 16 ; GFX7-NEXT: s_lshl_b32 s5, s5, 16
; GFX7-NEXT: s_or_b32 s0, s0, s5 ; GFX7-NEXT: s_or_b32 s0, s0, s5
; GFX7-NEXT: s_and_b32 s5, s7, s18 ; GFX7-NEXT: s_lshl_b32 s5, s7, 24
; GFX7-NEXT: s_lshl_b32 s5, s5, 24
; GFX7-NEXT: s_lshr_b32 s9, s1, 8 ; GFX7-NEXT: s_lshr_b32 s9, s1, 8
; GFX7-NEXT: s_or_b32 s8, s0, s5 ; GFX7-NEXT: s_or_b32 s8, s0, s5
; GFX7-NEXT: s_lshr_b32 s10, s1, 16 ; GFX7-NEXT: s_lshr_b32 s10, s1, 16
; GFX7-NEXT: s_lshr_b32 s11, s1, 24 ; GFX7-NEXT: s_lshr_b32 s11, s1, 24
; GFX7-NEXT: s_and_b32 s0, s1, s18 ; GFX7-NEXT: s_and_b32 s0, s1, s18
; GFX7-NEXT: s_and_b32 s1, s9, s18 ; GFX7-NEXT: s_and_b32 s1, s9, s18
; GFX7-NEXT: s_lshl_b32 s1, s1, 8 ; GFX7-NEXT: s_lshl_b32 s1, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s10, s18 ; GFX7-NEXT: s_and_b32 s1, s10, s18
; GFX7-NEXT: s_lshl_b32 s1, s1, 16 ; GFX7-NEXT: s_lshl_b32 s1, s1, 16
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s11, s18 ; GFX7-NEXT: s_lshl_b32 s1, s11, 24
; GFX7-NEXT: s_lshl_b32 s1, s1, 24
; GFX7-NEXT: s_lshr_b32 s12, s2, 8 ; GFX7-NEXT: s_lshr_b32 s12, s2, 8
; GFX7-NEXT: s_or_b32 s9, s0, s1 ; GFX7-NEXT: s_or_b32 s9, s0, s1
; GFX7-NEXT: s_and_b32 s1, s12, s18 ; GFX7-NEXT: s_and_b32 s1, s12, s18
; GFX7-NEXT: s_lshr_b32 s13, s2, 16 ; GFX7-NEXT: s_lshr_b32 s13, s2, 16
; GFX7-NEXT: s_and_b32 s0, s2, s18 ; GFX7-NEXT: s_and_b32 s0, s2, s18
; GFX7-NEXT: s_lshl_b32 s1, s1, 8 ; GFX7-NEXT: s_lshl_b32 s1, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s13, s18 ; GFX7-NEXT: s_and_b32 s1, s13, s18
; GFX7-NEXT: s_lshl_b32 s1, s1, 16 ; GFX7-NEXT: s_lshl_b32 s1, s1, 16
; GFX7-NEXT: s_lshr_b32 s14, s2, 24 ; GFX7-NEXT: s_lshr_b32 s14, s2, 24
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s14, s18 ; GFX7-NEXT: s_lshl_b32 s1, s14, 24
; GFX7-NEXT: s_lshl_b32 s1, s1, 24
; GFX7-NEXT: s_lshr_b32 s15, s3, 8 ; GFX7-NEXT: s_lshr_b32 s15, s3, 8
; GFX7-NEXT: s_or_b32 s10, s0, s1 ; GFX7-NEXT: s_or_b32 s10, s0, s1
; GFX7-NEXT: s_and_b32 s1, s15, s18 ; GFX7-NEXT: s_and_b32 s1, s15, s18
; GFX7-NEXT: s_lshr_b32 s16, s3, 16 ; GFX7-NEXT: s_lshr_b32 s16, s3, 16
; GFX7-NEXT: s_and_b32 s0, s3, s18 ; GFX7-NEXT: s_and_b32 s0, s3, s18
; GFX7-NEXT: s_lshl_b32 s1, s1, 8 ; GFX7-NEXT: s_lshl_b32 s1, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s16, s18 ; GFX7-NEXT: s_and_b32 s1, s16, s18
; GFX7-NEXT: s_lshr_b32 s17, s3, 24 ; GFX7-NEXT: s_lshr_b32 s17, s3, 24
; GFX7-NEXT: s_lshl_b32 s1, s1, 16 ; GFX7-NEXT: s_lshl_b32 s1, s1, 16
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s17, s18 ; GFX7-NEXT: s_lshl_b32 s1, s17, 24
; GFX7-NEXT: s_lshl_b32 s1, s1, 24
; GFX7-NEXT: v_mov_b32_e32 v1, s8 ; GFX7-NEXT: v_mov_b32_e32 v1, s8
; GFX7-NEXT: v_mov_b32_e32 v2, s9 ; GFX7-NEXT: v_mov_b32_e32 v2, s9
; GFX7-NEXT: s_or_b32 s11, s0, s1 ; GFX7-NEXT: s_or_b32 s11, s0, s1
; GFX7-NEXT: v_mov_b32_e32 v3, s10 ; GFX7-NEXT: v_mov_b32_e32 v3, s10
; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v4 ; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 3, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 3, v0
; GFX7-NEXT: s_and_b32 s4, s4, s18 ; GFX7-NEXT: s_and_b32 s4, s4, s18
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; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s18, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s18, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_and_b32_e32 v4, s18, v5 ; GFX7-NEXT: v_and_b32_e32 v4, s18, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_and_b32_e32 v4, s18, v6 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v7, 8, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_and_b32_e32 v4, s18, v7 ; GFX7-NEXT: v_and_b32_e32 v4, s18, v7
; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s18, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s18, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4
; GFX7-NEXT: v_and_b32_e32 v4, s18, v8 ; GFX7-NEXT: v_and_b32_e32 v4, s18, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4
; GFX7-NEXT: v_and_b32_e32 v4, s18, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v10, 8, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v10, 8, v2
; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4
; GFX7-NEXT: v_and_b32_e32 v4, s18, v10 ; GFX7-NEXT: v_and_b32_e32 v4, s18, v10
; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v2
; GFX7-NEXT: v_and_b32_e32 v2, s18, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s18, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
; GFX7-NEXT: v_and_b32_e32 v4, s18, v11 ; GFX7-NEXT: v_and_b32_e32 v4, s18, v11
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
; GFX7-NEXT: v_and_b32_e32 v4, s18, v12 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v12
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v13, 8, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v13, 8, v3
; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
; GFX7-NEXT: v_and_b32_e32 v4, s18, v13 ; GFX7-NEXT: v_and_b32_e32 v4, s18, v13
; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v3
; GFX7-NEXT: v_and_b32_e32 v3, s18, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s18, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v4, s18, v14 ; GFX7-NEXT: v_and_b32_e32 v4, s18, v14
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v4, s18, v15 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v15
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: s_mov_b64 s[0:1], 0 ; GFX7-NEXT: s_mov_b64 s[0:1], 0
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <16 x i8>, <16 x i8> addrspace(4)* %ptr %vec = load <16 x i8>, <16 x i8> addrspace(4)* %ptr
%insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx
Show All 15 Lines
; GFX9-NEXT: s_lshr_b32 s5, s0, 16 ; GFX9-NEXT: s_lshr_b32 s5, s0, 16
; GFX9-NEXT: s_lshr_b32 s6, s0, 24 ; GFX9-NEXT: s_lshr_b32 s6, s0, 24
; GFX9-NEXT: s_and_b32 s0, s0, s17 ; GFX9-NEXT: s_and_b32 s0, s0, s17
; GFX9-NEXT: s_lshl_b32 s4, s4, 8 ; GFX9-NEXT: s_lshl_b32 s4, s4, 8
; GFX9-NEXT: s_or_b32 s0, s0, s4 ; GFX9-NEXT: s_or_b32 s0, s0, s4
; GFX9-NEXT: s_and_b32 s4, s5, s17 ; GFX9-NEXT: s_and_b32 s4, s5, s17
; GFX9-NEXT: s_lshl_b32 s4, s4, 16 ; GFX9-NEXT: s_lshl_b32 s4, s4, 16
; GFX9-NEXT: s_or_b32 s0, s0, s4 ; GFX9-NEXT: s_or_b32 s0, s0, s4
; GFX9-NEXT: s_and_b32 s4, s6, s17 ; GFX9-NEXT: s_lshl_b32 s4, s6, 24
; GFX9-NEXT: s_lshl_b32 s4, s4, 24
; GFX9-NEXT: s_lshr_b32 s7, s1, 8 ; GFX9-NEXT: s_lshr_b32 s7, s1, 8
; GFX9-NEXT: s_or_b32 s4, s0, s4 ; GFX9-NEXT: s_or_b32 s4, s0, s4
; GFX9-NEXT: s_lshr_b32 s9, s1, 16 ; GFX9-NEXT: s_lshr_b32 s9, s1, 16
; GFX9-NEXT: s_lshr_b32 s10, s1, 24 ; GFX9-NEXT: s_lshr_b32 s10, s1, 24
; GFX9-NEXT: s_and_b32 s0, s1, s17 ; GFX9-NEXT: s_and_b32 s0, s1, s17
; GFX9-NEXT: s_and_b32 s1, s7, s17 ; GFX9-NEXT: s_and_b32 s1, s7, s17
; GFX9-NEXT: s_lshl_b32 s1, s1, 8 ; GFX9-NEXT: s_lshl_b32 s1, s1, 8
; GFX9-NEXT: s_or_b32 s0, s0, s1 ; GFX9-NEXT: s_or_b32 s0, s0, s1
; GFX9-NEXT: s_and_b32 s1, s9, s17 ; GFX9-NEXT: s_and_b32 s1, s9, s17
; GFX9-NEXT: s_lshl_b32 s1, s1, 16 ; GFX9-NEXT: s_lshl_b32 s1, s1, 16
; GFX9-NEXT: s_or_b32 s0, s0, s1 ; GFX9-NEXT: s_or_b32 s0, s0, s1
; GFX9-NEXT: s_and_b32 s1, s10, s17 ; GFX9-NEXT: s_lshl_b32 s1, s10, 24
; GFX9-NEXT: s_lshl_b32 s1, s1, 24
; GFX9-NEXT: s_lshr_b32 s11, s2, 8 ; GFX9-NEXT: s_lshr_b32 s11, s2, 8
; GFX9-NEXT: s_or_b32 s5, s0, s1 ; GFX9-NEXT: s_or_b32 s5, s0, s1
; GFX9-NEXT: s_and_b32 s1, s11, s17 ; GFX9-NEXT: s_and_b32 s1, s11, s17
; GFX9-NEXT: s_lshr_b32 s12, s2, 16 ; GFX9-NEXT: s_lshr_b32 s12, s2, 16
; GFX9-NEXT: s_and_b32 s0, s2, s17 ; GFX9-NEXT: s_and_b32 s0, s2, s17
; GFX9-NEXT: s_lshl_b32 s1, s1, 8 ; GFX9-NEXT: s_lshl_b32 s1, s1, 8
; GFX9-NEXT: s_or_b32 s0, s0, s1 ; GFX9-NEXT: s_or_b32 s0, s0, s1
; GFX9-NEXT: s_and_b32 s1, s12, s17 ; GFX9-NEXT: s_and_b32 s1, s12, s17
; GFX9-NEXT: s_lshl_b32 s1, s1, 16 ; GFX9-NEXT: s_lshl_b32 s1, s1, 16
; GFX9-NEXT: s_lshr_b32 s13, s2, 24 ; GFX9-NEXT: s_lshr_b32 s13, s2, 24
; GFX9-NEXT: s_or_b32 s0, s0, s1 ; GFX9-NEXT: s_or_b32 s0, s0, s1
; GFX9-NEXT: s_and_b32 s1, s13, s17 ; GFX9-NEXT: s_lshl_b32 s1, s13, 24
; GFX9-NEXT: s_lshl_b32 s1, s1, 24
; GFX9-NEXT: s_lshr_b32 s14, s3, 8 ; GFX9-NEXT: s_lshr_b32 s14, s3, 8
; GFX9-NEXT: s_or_b32 s6, s0, s1 ; GFX9-NEXT: s_or_b32 s6, s0, s1
; GFX9-NEXT: s_and_b32 s1, s14, s17 ; GFX9-NEXT: s_and_b32 s1, s14, s17
; GFX9-NEXT: s_lshr_b32 s15, s3, 16 ; GFX9-NEXT: s_lshr_b32 s15, s3, 16
; GFX9-NEXT: s_and_b32 s0, s3, s17 ; GFX9-NEXT: s_and_b32 s0, s3, s17
; GFX9-NEXT: s_lshl_b32 s1, s1, 8 ; GFX9-NEXT: s_lshl_b32 s1, s1, 8
; GFX9-NEXT: s_or_b32 s0, s0, s1 ; GFX9-NEXT: s_or_b32 s0, s0, s1
; GFX9-NEXT: s_and_b32 s1, s15, s17 ; GFX9-NEXT: s_and_b32 s1, s15, s17
; GFX9-NEXT: s_lshr_b32 s16, s3, 24 ; GFX9-NEXT: s_lshr_b32 s16, s3, 24
; GFX9-NEXT: s_lshl_b32 s1, s1, 16 ; GFX9-NEXT: s_lshl_b32 s1, s1, 16
; GFX9-NEXT: s_or_b32 s0, s0, s1 ; GFX9-NEXT: s_or_b32 s0, s0, s1
; GFX9-NEXT: s_and_b32 s1, s16, s17 ; GFX9-NEXT: s_lshl_b32 s1, s16, 24
; GFX9-NEXT: s_lshl_b32 s1, s1, 24
; GFX9-NEXT: v_mov_b32_e32 v2, s4 ; GFX9-NEXT: v_mov_b32_e32 v2, s4
; GFX9-NEXT: v_mov_b32_e32 v3, s5 ; GFX9-NEXT: v_mov_b32_e32 v3, s5
; GFX9-NEXT: s_or_b32 s7, s0, s1 ; GFX9-NEXT: s_or_b32 s7, s0, s1
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 3, v1 ; GFX9-NEXT: v_lshlrev_b32_e32 v1, 3, v1
; GFX9-NEXT: v_mov_b32_e32 v5, s6 ; GFX9-NEXT: v_mov_b32_e32 v5, s6
; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v4 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v4
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_e64 v1, v1, s17 ; GFX9-NEXT: v_lshlrev_b32_e64 v1, v1, s17
; GFX9-NEXT: v_mov_b32_e32 v6, s7 ; GFX9-NEXT: v_mov_b32_e32 v6, s7
; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1]
; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v4 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v4
; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[2:3]
; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX9-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX9-NEXT: v_and_or_b32 v5, v2, v1, v0 ; GFX9-NEXT: v_and_or_b32 v5, v2, v1, v0
; GFX9-NEXT: v_mov_b32_e32 v0, s4 ; GFX9-NEXT: v_mov_b32_e32 v0, s4
; GFX9-NEXT: v_mov_b32_e32 v1, s5 ; GFX9-NEXT: v_mov_b32_e32 v1, s5
; GFX9-NEXT: v_mov_b32_e32 v2, s6 ; GFX9-NEXT: v_mov_b32_e32 v2, s6
; GFX9-NEXT: v_mov_b32_e32 v3, s7 ; GFX9-NEXT: v_mov_b32_e32 v3, s7
; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4
; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5]
; GFX9-NEXT: s_mov_b32 s8, 8 ; GFX9-NEXT: s_mov_b32 s8, 8
; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v0 ; GFX9-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v4, s8, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc
; GFX9-NEXT: v_and_or_b32 v4, v0, s17, v4
; GFX9-NEXT: v_and_b32_sdwa v8, v0, s17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s17 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_or3_b32 v0, v4, v8, v0
; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3]
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX9-NEXT: v_lshlrev_b32_sdwa v4, s8, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_or_b32 v4, v0, s17, v4
; GFX9-NEXT: v_and_b32_sdwa v0, v0, s17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v5, 24, v5
; GFX9-NEXT: v_or3_b32 v0, v4, v0, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v1
; GFX9-NEXT: v_mov_b32_e32 v4, 8 ; GFX9-NEXT: v_mov_b32_e32 v4, 8
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v2
; GFX9-NEXT: v_and_or_b32 v5, v1, s17, v5
; GFX9-NEXT: v_and_b32_sdwa v8, v1, s17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s17 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_or3_b32 v1, v5, v8, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v4, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_and_or_b32 v5, v1, s17, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v2
; GFX9-NEXT: v_and_b32_sdwa v1, v1, s17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 24, v7
; GFX9-NEXT: v_or3_b32 v1, v5, v1, v6
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v4, v4, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_or_b32 v5, v2, s17, v5 ; GFX9-NEXT: v_and_or_b32 v5, v2, s17, v5
; GFX9-NEXT: v_and_b32_sdwa v6, v2, s17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v11, 24, v3
; GFX9-NEXT: v_and_b32_sdwa v2, v2, s17 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v2, v2, s17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_or3_b32 v2, v5, v6, v2 ; GFX9-NEXT: v_lshlrev_b32_e32 v6, 24, v9
; GFX9-NEXT: v_or3_b32 v2, v5, v2, v6
; GFX9-NEXT: v_and_or_b32 v4, v3, s17, v4 ; GFX9-NEXT: v_and_or_b32 v4, v3, s17, v4
; GFX9-NEXT: v_and_b32_sdwa v5, v3, s17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v3, v3, s17 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v3, v3, s17 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v5, 24, v11
; GFX9-NEXT: v_or3_b32 v3, v4, v5, v3 ; GFX9-NEXT: v_or3_b32 v3, v4, v3, v5
; GFX9-NEXT: v_mov_b32_e32 v4, 0 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_s_v16i8_v_v: ; GFX8-LABEL: insertelement_s_v16i8_v_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0 ; GFX8-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0
; GFX8-NEXT: s_movk_i32 s16, 0xff ; GFX8-NEXT: s_movk_i32 s16, 0xff
; GFX8-NEXT: v_lshrrev_b32_e32 v4, 2, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 2, v1
; GFX8-NEXT: v_and_b32_e32 v1, 3, v1 ; GFX8-NEXT: v_and_b32_e32 v1, 3, v1
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v4 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v4
; GFX8-NEXT: s_waitcnt lgkmcnt(0) ; GFX8-NEXT: s_waitcnt lgkmcnt(0)
; GFX8-NEXT: s_lshr_b32 s4, s0, 8 ; GFX8-NEXT: s_lshr_b32 s4, s0, 8
; GFX8-NEXT: s_and_b32 s4, s4, s16 ; GFX8-NEXT: s_and_b32 s4, s4, s16
; GFX8-NEXT: s_lshr_b32 s5, s0, 16 ; GFX8-NEXT: s_lshr_b32 s5, s0, 16
; GFX8-NEXT: s_lshr_b32 s6, s0, 24 ; GFX8-NEXT: s_lshr_b32 s6, s0, 24
; GFX8-NEXT: s_and_b32 s0, s0, s16 ; GFX8-NEXT: s_and_b32 s0, s0, s16
; GFX8-NEXT: s_lshl_b32 s4, s4, 8 ; GFX8-NEXT: s_lshl_b32 s4, s4, 8
; GFX8-NEXT: s_or_b32 s0, s0, s4 ; GFX8-NEXT: s_or_b32 s0, s0, s4
; GFX8-NEXT: s_and_b32 s4, s5, s16 ; GFX8-NEXT: s_and_b32 s4, s5, s16
; GFX8-NEXT: s_lshl_b32 s4, s4, 16 ; GFX8-NEXT: s_lshl_b32 s4, s4, 16
; GFX8-NEXT: s_or_b32 s0, s0, s4 ; GFX8-NEXT: s_or_b32 s0, s0, s4
; GFX8-NEXT: s_and_b32 s4, s6, s16 ; GFX8-NEXT: s_lshl_b32 s4, s6, 24
; GFX8-NEXT: s_lshl_b32 s4, s4, 24
; GFX8-NEXT: s_lshr_b32 s7, s1, 8 ; GFX8-NEXT: s_lshr_b32 s7, s1, 8
; GFX8-NEXT: s_or_b32 s4, s0, s4 ; GFX8-NEXT: s_or_b32 s4, s0, s4
; GFX8-NEXT: s_lshr_b32 s8, s1, 16 ; GFX8-NEXT: s_lshr_b32 s8, s1, 16
; GFX8-NEXT: s_lshr_b32 s9, s1, 24 ; GFX8-NEXT: s_lshr_b32 s9, s1, 24
; GFX8-NEXT: s_and_b32 s0, s1, s16 ; GFX8-NEXT: s_and_b32 s0, s1, s16
; GFX8-NEXT: s_and_b32 s1, s7, s16 ; GFX8-NEXT: s_and_b32 s1, s7, s16
; GFX8-NEXT: s_lshl_b32 s1, s1, 8 ; GFX8-NEXT: s_lshl_b32 s1, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s8, s16 ; GFX8-NEXT: s_and_b32 s1, s8, s16
; GFX8-NEXT: s_lshl_b32 s1, s1, 16 ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s9, s16 ; GFX8-NEXT: s_lshl_b32 s1, s9, 24
; GFX8-NEXT: s_lshl_b32 s1, s1, 24
; GFX8-NEXT: s_lshr_b32 s10, s2, 8 ; GFX8-NEXT: s_lshr_b32 s10, s2, 8
; GFX8-NEXT: s_or_b32 s5, s0, s1 ; GFX8-NEXT: s_or_b32 s5, s0, s1
; GFX8-NEXT: s_and_b32 s1, s10, s16 ; GFX8-NEXT: s_and_b32 s1, s10, s16
; GFX8-NEXT: s_lshr_b32 s11, s2, 16 ; GFX8-NEXT: s_lshr_b32 s11, s2, 16
; GFX8-NEXT: s_and_b32 s0, s2, s16 ; GFX8-NEXT: s_and_b32 s0, s2, s16
; GFX8-NEXT: s_lshl_b32 s1, s1, 8 ; GFX8-NEXT: s_lshl_b32 s1, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s11, s16 ; GFX8-NEXT: s_and_b32 s1, s11, s16
; GFX8-NEXT: s_lshl_b32 s1, s1, 16 ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_lshr_b32 s12, s2, 24 ; GFX8-NEXT: s_lshr_b32 s12, s2, 24
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s12, s16 ; GFX8-NEXT: s_lshl_b32 s1, s12, 24
; GFX8-NEXT: s_lshl_b32 s1, s1, 24
; GFX8-NEXT: s_lshr_b32 s13, s3, 8 ; GFX8-NEXT: s_lshr_b32 s13, s3, 8
; GFX8-NEXT: s_or_b32 s6, s0, s1 ; GFX8-NEXT: s_or_b32 s6, s0, s1
; GFX8-NEXT: s_and_b32 s1, s13, s16 ; GFX8-NEXT: s_and_b32 s1, s13, s16
; GFX8-NEXT: s_lshr_b32 s14, s3, 16 ; GFX8-NEXT: s_lshr_b32 s14, s3, 16
; GFX8-NEXT: s_and_b32 s0, s3, s16 ; GFX8-NEXT: s_and_b32 s0, s3, s16
; GFX8-NEXT: s_lshl_b32 s1, s1, 8 ; GFX8-NEXT: s_lshl_b32 s1, s1, 8
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s14, s16 ; GFX8-NEXT: s_and_b32 s1, s14, s16
; GFX8-NEXT: s_lshr_b32 s15, s3, 24 ; GFX8-NEXT: s_lshr_b32 s15, s3, 24
; GFX8-NEXT: s_lshl_b32 s1, s1, 16 ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_or_b32 s0, s0, s1
; GFX8-NEXT: s_and_b32 s1, s15, s16 ; GFX8-NEXT: s_lshl_b32 s1, s15, 24
; GFX8-NEXT: s_lshl_b32 s1, s1, 24
; GFX8-NEXT: v_mov_b32_e32 v2, s4 ; GFX8-NEXT: v_mov_b32_e32 v2, s4
; GFX8-NEXT: v_mov_b32_e32 v3, s5 ; GFX8-NEXT: v_mov_b32_e32 v3, s5
; GFX8-NEXT: s_or_b32 s7, s0, s1 ; GFX8-NEXT: s_or_b32 s7, s0, s1
; GFX8-NEXT: v_lshlrev_b32_e32 v1, 3, v1 ; GFX8-NEXT: v_lshlrev_b32_e32 v1, 3, v1
; GFX8-NEXT: v_mov_b32_e32 v5, s6 ; GFX8-NEXT: v_mov_b32_e32 v5, s6
; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v4 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v4
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_e64 v1, v1, s16 ; GFX8-NEXT: v_lshlrev_b32_e64 v1, v1, s16
; GFX8-NEXT: v_mov_b32_e32 v6, s7 ; GFX8-NEXT: v_mov_b32_e32 v6, s7
; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1]
; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v4 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v4
; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v6, s[2:3]
; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1 ; GFX8-NEXT: v_xor_b32_e32 v1, -1, v1
; GFX8-NEXT: v_and_b32_e32 v1, v2, v1 ; GFX8-NEXT: v_and_b32_e32 v1, v2, v1
; GFX8-NEXT: v_or_b32_e32 v5, v1, v0 ; GFX8-NEXT: v_or_b32_e32 v5, v1, v0
; GFX8-NEXT: v_mov_b32_e32 v0, s4 ; GFX8-NEXT: v_mov_b32_e32 v0, s4
; GFX8-NEXT: v_mov_b32_e32 v1, s5 ; GFX8-NEXT: v_mov_b32_e32 v1, s5
; GFX8-NEXT: v_mov_b32_e32 v2, s6 ; GFX8-NEXT: v_mov_b32_e32 v2, s6
; GFX8-NEXT: v_mov_b32_e32 v3, s7 ; GFX8-NEXT: v_mov_b32_e32 v3, s7
; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v4
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v5, s[4:5]
; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v4, 8, v0
; GFX8-NEXT: v_mov_b32_e32 v8, 8 ; GFX8-NEXT: v_mov_b32_e32 v12, 8
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v8, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v12, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_mov_b32_e32 v8, s16 ; GFX8-NEXT: v_mov_b32_e32 v12, s16
; GFX8-NEXT: v_or_b32_sdwa v4, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v9, v0, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc
; GFX8-NEXT: v_or_b32_e32 v4, v4, v9
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v8 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v2, v5, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v3, v3, v5, s[2:3]
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v4, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v4, v0 ; GFX8-NEXT: v_or_b32_e32 v0, v4, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v5
; GFX8-NEXT: v_or_b32_e32 v0, v0, v4
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v1
; GFX8-NEXT: v_mov_b32_e32 v4, 8 ; GFX8-NEXT: v_mov_b32_e32 v4, 8
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 24, v1
; GFX8-NEXT: v_or_b32_sdwa v5, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v5, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v9, v1, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v1, v1, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v2
; GFX8-NEXT: v_or_b32_e32 v5, v5, v9
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v8 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v1, v5, v1 ; GFX8-NEXT: v_or_b32_e32 v1, v5, v1
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v7
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v2
; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v3
; GFX8-NEXT: v_or_b32_e32 v1, v1, v5
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v2
; GFX8-NEXT: v_or_b32_sdwa v5, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v5, v2, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v6, v2, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v2, v2, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v4, v4, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshrrev_b32_e32 v11, 24, v3
; GFX8-NEXT: v_or_b32_e32 v5, v5, v6
; GFX8-NEXT: v_and_b32_sdwa v2, v2, v8 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v2, v5, v2
; GFX8-NEXT: v_or_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v3, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v5, v3, v8 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v3, v3, v12 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v4, v4, v5 ; GFX8-NEXT: v_or_b32_e32 v2, v5, v2
; GFX8-NEXT: v_and_b32_sdwa v3, v3, v8 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v5, 24, v9
; GFX8-NEXT: v_or_b32_e32 v3, v4, v3 ; GFX8-NEXT: v_or_b32_e32 v3, v4, v3
; GFX8-NEXT: v_lshlrev_b32_e32 v4, 24, v11
; GFX8-NEXT: v_or_b32_e32 v2, v2, v5
; GFX8-NEXT: v_or_b32_e32 v3, v3, v4
; GFX8-NEXT: v_mov_b32_e32 v4, 0 ; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_s_v16i8_v_v: ; GFX7-LABEL: insertelement_s_v16i8_v_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0 ; GFX7-NEXT: s_load_dwordx4 s[0:3], s[2:3], 0x0
; GFX7-NEXT: s_movk_i32 s16, 0xff ; GFX7-NEXT: s_movk_i32 s16, 0xff
; GFX7-NEXT: v_lshrrev_b32_e32 v4, 2, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v4, 2, v1
; GFX7-NEXT: v_and_b32_e32 v1, 3, v1 ; GFX7-NEXT: v_and_b32_e32 v1, 3, v1
; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v4 ; GFX7-NEXT: v_cmp_eq_u32_e32 vcc, 1, v4
; GFX7-NEXT: s_waitcnt lgkmcnt(0) ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
; GFX7-NEXT: s_lshr_b32 s4, s0, 8 ; GFX7-NEXT: s_lshr_b32 s4, s0, 8
; GFX7-NEXT: s_and_b32 s4, s4, s16 ; GFX7-NEXT: s_and_b32 s4, s4, s16
; GFX7-NEXT: s_lshr_b32 s5, s0, 16 ; GFX7-NEXT: s_lshr_b32 s5, s0, 16
; GFX7-NEXT: s_lshr_b32 s6, s0, 24 ; GFX7-NEXT: s_lshr_b32 s6, s0, 24
; GFX7-NEXT: s_and_b32 s0, s0, s16 ; GFX7-NEXT: s_and_b32 s0, s0, s16
; GFX7-NEXT: s_lshl_b32 s4, s4, 8 ; GFX7-NEXT: s_lshl_b32 s4, s4, 8
; GFX7-NEXT: s_or_b32 s0, s0, s4 ; GFX7-NEXT: s_or_b32 s0, s0, s4
; GFX7-NEXT: s_and_b32 s4, s5, s16 ; GFX7-NEXT: s_and_b32 s4, s5, s16
; GFX7-NEXT: s_lshl_b32 s4, s4, 16 ; GFX7-NEXT: s_lshl_b32 s4, s4, 16
; GFX7-NEXT: s_or_b32 s0, s0, s4 ; GFX7-NEXT: s_or_b32 s0, s0, s4
; GFX7-NEXT: s_and_b32 s4, s6, s16 ; GFX7-NEXT: s_lshl_b32 s4, s6, 24
; GFX7-NEXT: s_lshl_b32 s4, s4, 24
; GFX7-NEXT: s_lshr_b32 s7, s1, 8 ; GFX7-NEXT: s_lshr_b32 s7, s1, 8
; GFX7-NEXT: s_or_b32 s4, s0, s4 ; GFX7-NEXT: s_or_b32 s4, s0, s4
; GFX7-NEXT: s_lshr_b32 s8, s1, 16 ; GFX7-NEXT: s_lshr_b32 s8, s1, 16
; GFX7-NEXT: s_lshr_b32 s9, s1, 24 ; GFX7-NEXT: s_lshr_b32 s9, s1, 24
; GFX7-NEXT: s_and_b32 s0, s1, s16 ; GFX7-NEXT: s_and_b32 s0, s1, s16
; GFX7-NEXT: s_and_b32 s1, s7, s16 ; GFX7-NEXT: s_and_b32 s1, s7, s16
; GFX7-NEXT: s_lshl_b32 s1, s1, 8 ; GFX7-NEXT: s_lshl_b32 s1, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s8, s16 ; GFX7-NEXT: s_and_b32 s1, s8, s16
; GFX7-NEXT: s_lshl_b32 s1, s1, 16 ; GFX7-NEXT: s_lshl_b32 s1, s1, 16
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s9, s16 ; GFX7-NEXT: s_lshl_b32 s1, s9, 24
; GFX7-NEXT: s_lshl_b32 s1, s1, 24
; GFX7-NEXT: s_lshr_b32 s10, s2, 8 ; GFX7-NEXT: s_lshr_b32 s10, s2, 8
; GFX7-NEXT: s_or_b32 s5, s0, s1 ; GFX7-NEXT: s_or_b32 s5, s0, s1
; GFX7-NEXT: s_and_b32 s1, s10, s16 ; GFX7-NEXT: s_and_b32 s1, s10, s16
; GFX7-NEXT: s_lshr_b32 s11, s2, 16 ; GFX7-NEXT: s_lshr_b32 s11, s2, 16
; GFX7-NEXT: s_and_b32 s0, s2, s16 ; GFX7-NEXT: s_and_b32 s0, s2, s16
; GFX7-NEXT: s_lshl_b32 s1, s1, 8 ; GFX7-NEXT: s_lshl_b32 s1, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s11, s16 ; GFX7-NEXT: s_and_b32 s1, s11, s16
; GFX7-NEXT: s_lshl_b32 s1, s1, 16 ; GFX7-NEXT: s_lshl_b32 s1, s1, 16
; GFX7-NEXT: s_lshr_b32 s12, s2, 24 ; GFX7-NEXT: s_lshr_b32 s12, s2, 24
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s12, s16 ; GFX7-NEXT: s_lshl_b32 s1, s12, 24
; GFX7-NEXT: s_lshl_b32 s1, s1, 24
; GFX7-NEXT: s_lshr_b32 s13, s3, 8 ; GFX7-NEXT: s_lshr_b32 s13, s3, 8
; GFX7-NEXT: s_or_b32 s6, s0, s1 ; GFX7-NEXT: s_or_b32 s6, s0, s1
; GFX7-NEXT: s_and_b32 s1, s13, s16 ; GFX7-NEXT: s_and_b32 s1, s13, s16
; GFX7-NEXT: s_lshr_b32 s14, s3, 16 ; GFX7-NEXT: s_lshr_b32 s14, s3, 16
; GFX7-NEXT: s_and_b32 s0, s3, s16 ; GFX7-NEXT: s_and_b32 s0, s3, s16
; GFX7-NEXT: s_lshl_b32 s1, s1, 8 ; GFX7-NEXT: s_lshl_b32 s1, s1, 8
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s14, s16 ; GFX7-NEXT: s_and_b32 s1, s14, s16
; GFX7-NEXT: s_lshr_b32 s15, s3, 24 ; GFX7-NEXT: s_lshr_b32 s15, s3, 24
; GFX7-NEXT: s_lshl_b32 s1, s1, 16 ; GFX7-NEXT: s_lshl_b32 s1, s1, 16
; GFX7-NEXT: s_or_b32 s0, s0, s1 ; GFX7-NEXT: s_or_b32 s0, s0, s1
; GFX7-NEXT: s_and_b32 s1, s15, s16 ; GFX7-NEXT: s_lshl_b32 s1, s15, 24
; GFX7-NEXT: s_lshl_b32 s1, s1, 24
; GFX7-NEXT: v_mov_b32_e32 v2, s4 ; GFX7-NEXT: v_mov_b32_e32 v2, s4
; GFX7-NEXT: v_mov_b32_e32 v3, s5 ; GFX7-NEXT: v_mov_b32_e32 v3, s5
; GFX7-NEXT: s_or_b32 s7, s0, s1 ; GFX7-NEXT: s_or_b32 s7, s0, s1
; GFX7-NEXT: v_mov_b32_e32 v5, s6 ; GFX7-NEXT: v_mov_b32_e32 v5, s6
; GFX7-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v2, v2, v3, vcc
; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v4 ; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 3, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 3, v1
; GFX7-NEXT: v_and_b32_e32 v0, s16, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s16, v0
Show All 20 Lines
; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0
; GFX7-NEXT: v_and_b32_e32 v0, s16, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s16, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_and_b32_e32 v4, s16, v5 ; GFX7-NEXT: v_and_b32_e32 v4, s16, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_and_b32_e32 v4, s16, v6 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v7, 8, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v4 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v4
; GFX7-NEXT: v_and_b32_e32 v4, s16, v7 ; GFX7-NEXT: v_and_b32_e32 v4, s16, v7
; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s16, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s16, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4
; GFX7-NEXT: v_and_b32_e32 v4, s16, v8 ; GFX7-NEXT: v_and_b32_e32 v4, s16, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4
; GFX7-NEXT: v_and_b32_e32 v4, s16, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v10, 8, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v10, 8, v2
; GFX7-NEXT: v_or_b32_e32 v1, v1, v4 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v4
; GFX7-NEXT: v_and_b32_e32 v4, s16, v10 ; GFX7-NEXT: v_and_b32_e32 v4, s16, v10
; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v2
; GFX7-NEXT: v_and_b32_e32 v2, s16, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s16, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
; GFX7-NEXT: v_and_b32_e32 v4, s16, v11 ; GFX7-NEXT: v_and_b32_e32 v4, s16, v11
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
; GFX7-NEXT: v_and_b32_e32 v4, s16, v12 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v12
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v13, 8, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v13, 8, v3
; GFX7-NEXT: v_or_b32_e32 v2, v2, v4 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v4
; GFX7-NEXT: v_and_b32_e32 v4, s16, v13 ; GFX7-NEXT: v_and_b32_e32 v4, s16, v13
; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v3
; GFX7-NEXT: v_and_b32_e32 v3, s16, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s16, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v4, s16, v14 ; GFX7-NEXT: v_and_b32_e32 v4, s16, v14
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v4, s16, v15 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v15
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4
; GFX7-NEXT: s_mov_b64 s[0:1], 0 ; GFX7-NEXT: s_mov_b64 s[0:1], 0
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: s_mov_b32 s2, -1 ; GFX7-NEXT: s_mov_b32 s2, -1
; GFX7-NEXT: s_mov_b32 s3, 0xf000 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 ; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <16 x i8>, <16 x i8> addrspace(4)* %ptr %vec = load <16 x i8>, <16 x i8> addrspace(4)* %ptr
%insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx
Show All 15 Lines
; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v1 ; GFX9-NEXT: v_cmp_eq_u32_e32 vcc, 1, v1
; GFX9-NEXT: v_lshlrev_b32_e64 v7, v2, s1 ; GFX9-NEXT: v_lshlrev_b32_e64 v7, v2, s1
; GFX9-NEXT: v_lshlrev_b32_e64 v2, v2, s6 ; GFX9-NEXT: v_lshlrev_b32_e64 v2, v2, s6
; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v1 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v1
; GFX9-NEXT: v_xor_b32_e32 v2, -1, v2 ; GFX9-NEXT: v_xor_b32_e32 v2, -1, v2
; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v1 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v1
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v4 ; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v5 ; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 24, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 8, v5
; GFX9-NEXT: v_lshlrev_b32_sdwa v8, s0, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v8, s0, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v9, v0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v6
; GFX9-NEXT: v_and_b32_sdwa v12, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v13, v3, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v3, v3, s6, v8
; GFX9-NEXT: v_and_b32_sdwa v14, v4, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v15, v4, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v4, v4, s6, v9
; GFX9-NEXT: v_lshlrev_b32_sdwa v10, v0, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v10, v0, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v16, v5, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v13, 24, v5
; GFX9-NEXT: v_and_b32_sdwa v17, v5, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v14, 8, v6
; GFX9-NEXT: v_and_or_b32 v5, v5, s6, v10 ; GFX9-NEXT: v_and_b32_sdwa v16, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_sdwa v11, v0, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_and_b32_sdwa v17, v4, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_or3_b32 v3, v3, v12, v13 ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; GFX9-NEXT: v_or3_b32 v4, v4, v14, v15 ; GFX9-NEXT: v_and_or_b32 v3, v3, s6, v8
; GFX9-NEXT: v_and_b32_sdwa v18, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v11, 24, v11
; GFX9-NEXT: v_and_b32_sdwa v19, v6, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_or_b32 v4, v4, s6, v10
; GFX9-NEXT: v_and_or_b32 v6, v6, s6, v11 ; GFX9-NEXT: v_lshlrev_b32_sdwa v12, v0, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_or3_b32 v5, v5, v16, v17 ; GFX9-NEXT: v_lshrrev_b32_e32 v15, 24, v6
; GFX9-NEXT: v_and_b32_sdwa v18, v5, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; GFX9-NEXT: v_and_or_b32 v5, v5, s6, v12
; GFX9-NEXT: v_lshlrev_b32_sdwa v14, v0, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_or3_b32 v3, v3, v16, v9
; GFX9-NEXT: v_or3_b32 v4, v4, v17, v11
; GFX9-NEXT: v_and_b32_sdwa v19, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v15, 24, v15
; GFX9-NEXT: v_and_or_b32 v6, v6, s6, v14
; GFX9-NEXT: v_or3_b32 v5, v5, v18, v13
; GFX9-NEXT: v_cndmask_b32_e32 v8, v3, v4, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v8, v3, v4, vcc
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v1 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v1
; GFX9-NEXT: v_or3_b32 v6, v6, v18, v19 ; GFX9-NEXT: v_or3_b32 v6, v6, v19, v15
; GFX9-NEXT: v_cndmask_b32_e64 v8, v8, v5, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v8, v8, v5, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v8, v8, v6, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v8, v8, v6, s[2:3]
; GFX9-NEXT: v_and_or_b32 v2, v8, v2, v7 ; GFX9-NEXT: v_and_or_b32 v2, v8, v2, v7
; GFX9-NEXT: v_cndmask_b32_e64 v1, v3, v2, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v1, v3, v2, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v2, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v4, v2, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v4, v5, v2, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v4, v5, v2, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v2, v6, v2, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v2, v6, v2, s[2:3]
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v4 ; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 24, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 24, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 24, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 24, v2
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v6, v0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v7, v0, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v7, v0, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, v0, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v9, v0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v9, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, v0, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v10, v1, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v13, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v14, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v15, v4, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v1, v1, s6, v5 ; GFX9-NEXT: v_and_or_b32 v1, v1, s6, v5
; GFX9-NEXT: v_and_b32_sdwa v16, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; GFX9-NEXT: v_and_or_b32 v5, v2, s6, v0 ; GFX9-NEXT: v_and_or_b32 v5, v2, s6, v0
; GFX9-NEXT: v_and_b32_sdwa v11, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v8, 24, v8
; GFX9-NEXT: v_and_b32_sdwa v12, v3, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 24, v10
; GFX9-NEXT: v_and_b32_sdwa v13, v4, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_or_b32 v4, v4, s6, v9
; GFX9-NEXT: v_and_b32_sdwa v14, v4, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v11, 24, v12
; GFX9-NEXT: v_and_b32_sdwa v15, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_or_b32 v3, v3, s6, v7
; GFX9-NEXT: v_and_b32_sdwa v16, v2, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_or3_b32 v0, v1, v13, v6
; GFX9-NEXT: v_and_or_b32 v4, v4, s6, v7 ; GFX9-NEXT: v_or3_b32 v1, v3, v14, v8
; GFX9-NEXT: v_and_or_b32 v3, v3, s6, v6 ; GFX9-NEXT: v_or3_b32 v2, v4, v15, v10
; GFX9-NEXT: v_or3_b32 v0, v1, v9, v10 ; GFX9-NEXT: v_or3_b32 v3, v5, v16, v11
; GFX9-NEXT: v_or3_b32 v1, v3, v11, v12
; GFX9-NEXT: v_or3_b32 v2, v4, v13, v14
; GFX9-NEXT: v_or3_b32 v3, v5, v15, v16
; GFX9-NEXT: v_mov_b32_e32 v4, 0 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_v_v16i8_s_v: ; GFX8-LABEL: insertelement_v_v16i8_s_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dwordx4 v[3:6], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[3:6], v[0:1]
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v7, s0 ; GFX8-NEXT: v_mov_b32_e32 v7, s0
; GFX8-NEXT: v_lshrrev_b32_e32 v8, 2, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 2, v2
; GFX8-NEXT: v_and_b32_e32 v2, 3, v2 ; GFX8-NEXT: v_and_b32_e32 v2, 3, v2
; GFX8-NEXT: s_and_b32 s1, s2, s0 ; GFX8-NEXT: s_and_b32 s1, s2, s0
; GFX8-NEXT: v_lshlrev_b32_e32 v2, 3, v2 ; GFX8-NEXT: v_lshlrev_b32_e32 v2, 3, v2
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v8 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v8
; GFX8-NEXT: v_lshlrev_b32_e64 v9, v2, s1 ; GFX8-NEXT: v_lshlrev_b32_e64 v9, v2, s1
; GFX8-NEXT: v_lshlrev_b32_e64 v2, v2, s0 ; GFX8-NEXT: v_lshlrev_b32_e64 v2, v2, s0
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v8 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v8
; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v8 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v8
; GFX8-NEXT: v_xor_b32_e32 v2, -1, v2 ; GFX8-NEXT: v_xor_b32_e32 v2, -1, v2
; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v8 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v8
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v11, 8, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v12, 8, v4
; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v3
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v12, 8, v5 ; GFX8-NEXT: v_lshrrev_b32_e32 v14, 8, v5
; GFX8-NEXT: v_lshrrev_b32_e32 v13, 8, v6
; GFX8-NEXT: v_lshlrev_b32_sdwa v11, v1, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v14, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v15, v3, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v16, v4, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v3, v4, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v12, v1, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v12, v1, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v13, v1, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshrrev_b32_e32 v11, 24, v3
; GFX8-NEXT: v_or_b32_e32 v0, v0, v14 ; GFX8-NEXT: v_lshrrev_b32_e32 v16, 8, v6
; GFX8-NEXT: v_and_b32_sdwa v17, v4, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v13, 24, v4
; GFX8-NEXT: v_or_b32_e32 v3, v3, v16 ; GFX8-NEXT: v_and_b32_sdwa v18, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v18, v5, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v4, v5, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v3, v4, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v19, v5, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v19, v4, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v10, v6, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v14, v1, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_or_b32_sdwa v5, v6, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v15, 24, v5
; GFX8-NEXT: v_or_b32_e32 v4, v4, v18 ; GFX8-NEXT: v_lshlrev_b32_e32 v12, 24, v13
; GFX8-NEXT: v_and_b32_sdwa v6, v6, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v3, v3, v19
; GFX8-NEXT: v_or_b32_e32 v5, v5, v10 ; GFX8-NEXT: v_and_b32_sdwa v10, v5, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v15 ; GFX8-NEXT: v_or_b32_sdwa v4, v5, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v3, v3, v17 ; GFX8-NEXT: v_lshlrev_b32_sdwa v16, v1, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_e32 v11, 24, v11
; GFX8-NEXT: v_or_b32_e32 v0, v0, v18
; GFX8-NEXT: v_lshrrev_b32_e32 v17, 24, v6
; GFX8-NEXT: v_or_b32_sdwa v5, v6, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v6, v6, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_e32 v13, 24, v15
; GFX8-NEXT: v_or_b32_e32 v4, v4, v10
; GFX8-NEXT: v_or_b32_e32 v0, v0, v11
; GFX8-NEXT: v_or_b32_e32 v3, v3, v12
; GFX8-NEXT: v_or_b32_e32 v5, v5, v6 ; GFX8-NEXT: v_or_b32_e32 v5, v5, v6
; GFX8-NEXT: v_or_b32_e32 v4, v4, v19 ; GFX8-NEXT: v_lshlrev_b32_e32 v14, 24, v17
; GFX8-NEXT: v_or_b32_e32 v4, v4, v13
; GFX8-NEXT: v_cndmask_b32_e32 v6, v0, v3, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v6, v0, v3, vcc
; GFX8-NEXT: v_or_b32_e32 v5, v5, v14
; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v4, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v4, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v5, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v5, s[2:3]
; GFX8-NEXT: v_and_b32_e32 v2, v6, v2 ; GFX8-NEXT: v_and_b32_e32 v2, v6, v2
; GFX8-NEXT: v_or_b32_e32 v2, v2, v9 ; GFX8-NEXT: v_or_b32_e32 v2, v2, v9
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v2, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v4, v4, v2, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v4, v4, v2, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[4:5]
; GFX8-NEXT: v_cndmask_b32_e64 v2, v5, v2, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v5, v2, s[2:3]
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v3
; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v4
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 8, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v12, 8, v2
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v6, v1, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v8, v1, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v8, v1, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v10, v1, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v12, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v13, v3, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v3
; GFX8-NEXT: v_and_b32_sdwa v14, v4, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v11, 24, v4
; GFX8-NEXT: v_and_b32_sdwa v15, v4, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v13, 24, v2
; GFX8-NEXT: v_and_b32_sdwa v16, v2, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v15, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v3, v3, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v16, v4, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v4, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v14, v0, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v7, v2, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v3, v3, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v10, v0, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v4, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v11, v0, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v7, v2, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v2, v3, v12
; GFX8-NEXT: v_or_b32_e32 v3, v4, v14
; GFX8-NEXT: v_or_b32_e32 v4, v1, v16
; GFX8-NEXT: v_or_b32_e32 v0, v0, v10
; GFX8-NEXT: v_or_b32_e32 v1, v2, v13
; GFX8-NEXT: v_or_b32_e32 v2, v3, v15 ; GFX8-NEXT: v_or_b32_e32 v2, v3, v15
; GFX8-NEXT: v_or_b32_e32 v3, v4, v7 ; GFX8-NEXT: v_or_b32_e32 v3, v4, v16
; GFX8-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; GFX8-NEXT: v_or_b32_e32 v4, v1, v7
; GFX8-NEXT: v_lshlrev_b32_e32 v11, 24, v11
; GFX8-NEXT: v_lshlrev_b32_e32 v12, 24, v13
; GFX8-NEXT: v_or_b32_e32 v1, v2, v9
; GFX8-NEXT: v_or_b32_e32 v2, v3, v11
; GFX8-NEXT: v_or_b32_e32 v3, v4, v12
; GFX8-NEXT: v_mov_b32_e32 v4, 0 ; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_or_b32_e32 v0, v0, v11 ; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; GFX8-NEXT: v_or_b32_e32 v0, v0, v14
; GFX8-NEXT: v_or_b32_e32 v0, v0, v6
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v16i8_s_v: ; GFX7-LABEL: insertelement_v_v16i8_s_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s10, 0 ; GFX7-NEXT: s_mov_b32 s10, 0
; GFX7-NEXT: s_mov_b32 s11, 0xf000 ; GFX7-NEXT: s_mov_b32 s11, 0xf000
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; GFX7-NEXT: v_and_b32_e32 v9, s6, v9 ; GFX7-NEXT: v_and_b32_e32 v9, s6, v9
; GFX7-NEXT: v_and_b32_e32 v11, s6, v11 ; GFX7-NEXT: v_and_b32_e32 v11, s6, v11
; GFX7-NEXT: v_and_b32_e32 v3, s6, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s6, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v4, s6, v4 ; GFX7-NEXT: v_and_b32_e32 v4, s6, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v8, 8, v8 ; GFX7-NEXT: v_lshlrev_b32_e32 v8, 8, v8
; GFX7-NEXT: v_lshrrev_b32_e32 v13, 24, v5 ; GFX7-NEXT: v_lshrrev_b32_e32 v13, 24, v5
; GFX7-NEXT: v_lshrrev_b32_e32 v15, 16, v6 ; GFX7-NEXT: v_lshrrev_b32_e32 v15, 16, v6
; GFX7-NEXT: v_and_b32_e32 v7, s6, v7
; GFX7-NEXT: v_and_b32_e32 v10, s6, v10
; GFX7-NEXT: v_and_b32_e32 v12, s6, v12 ; GFX7-NEXT: v_and_b32_e32 v12, s6, v12
; GFX7-NEXT: v_and_b32_e32 v14, s6, v14 ; GFX7-NEXT: v_and_b32_e32 v14, s6, v14
; GFX7-NEXT: v_or_b32_e32 v0, v3, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v3, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_and_b32_e32 v5, s6, v5 ; GFX7-NEXT: v_and_b32_e32 v5, s6, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v11, 8, v11 ; GFX7-NEXT: v_lshlrev_b32_e32 v11, 8, v11
; GFX7-NEXT: v_or_b32_e32 v3, v4, v8 ; GFX7-NEXT: v_or_b32_e32 v3, v4, v8
; GFX7-NEXT: v_lshrrev_b32_e32 v16, 24, v6 ; GFX7-NEXT: v_lshrrev_b32_e32 v16, 24, v6
; GFX7-NEXT: v_and_b32_e32 v13, s6, v13
; GFX7-NEXT: v_and_b32_e32 v15, s6, v15 ; GFX7-NEXT: v_and_b32_e32 v15, s6, v15
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX7-NEXT: v_and_b32_e32 v6, s6, v6 ; GFX7-NEXT: v_and_b32_e32 v6, s6, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; GFX7-NEXT: v_lshlrev_b32_e32 v10, 24, v10
; GFX7-NEXT: v_or_b32_e32 v1, v3, v9 ; GFX7-NEXT: v_or_b32_e32 v1, v3, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX7-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; GFX7-NEXT: v_or_b32_e32 v4, v5, v11 ; GFX7-NEXT: v_or_b32_e32 v4, v5, v11
; GFX7-NEXT: v_lshlrev_b32_e32 v14, 8, v14 ; GFX7-NEXT: v_lshlrev_b32_e32 v14, 8, v14
; GFX7-NEXT: v_and_b32_e32 v16, s6, v16
; GFX7-NEXT: v_lshlrev_b32_e32 v13, 24, v13 ; GFX7-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; GFX7-NEXT: v_or_b32_e32 v3, v4, v12 ; GFX7-NEXT: v_or_b32_e32 v3, v4, v12
; GFX7-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; GFX7-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; GFX7-NEXT: v_or_b32_e32 v5, v6, v14 ; GFX7-NEXT: v_or_b32_e32 v5, v6, v14
; GFX7-NEXT: v_or_b32_e32 v0, v0, v7 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v7
; GFX7-NEXT: v_or_b32_e32 v1, v1, v10 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v10
; GFX7-NEXT: v_or_b32_e32 v4, v5, v15 ; GFX7-NEXT: v_or_b32_e32 v4, v5, v15
; GFX7-NEXT: v_lshlrev_b32_e32 v16, 24, v16 ; GFX7-NEXT: v_lshlrev_b32_e32 v16, 24, v16
; GFX7-NEXT: v_or_b32_e32 v3, v3, v13 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v13
; GFX7-NEXT: v_cndmask_b32_e32 v5, v0, v1, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v5, v0, v1, vcc
; GFX7-NEXT: v_or_b32_e32 v4, v4, v16 ; GFX7-NEXT: v_or_b32_e32 v4, v4, v16
; GFX7-NEXT: v_cndmask_b32_e64 v5, v5, v3, s[0:1] ; GFX7-NEXT: v_cndmask_b32_e64 v5, v5, v3, s[0:1]
; GFX7-NEXT: v_cndmask_b32_e64 v5, v5, v4, s[2:3] ; GFX7-NEXT: v_cndmask_b32_e64 v5, v5, v4, s[2:3]
; GFX7-NEXT: v_and_b32_e32 v2, v5, v2 ; GFX7-NEXT: v_and_b32_e32 v2, v5, v2
; GFX7-NEXT: v_or_b32_e32 v2, v2, v18 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v18
; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[4:5] ; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[4:5]
; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX7-NEXT: v_cndmask_b32_e64 v3, v3, v2, s[0:1] ; GFX7-NEXT: v_cndmask_b32_e64 v3, v3, v2, s[0:1]
; GFX7-NEXT: v_cndmask_b32_e64 v4, v4, v2, s[2:3] ; GFX7-NEXT: v_cndmask_b32_e64 v4, v4, v2, s[2:3]
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX7-NEXT: v_and_b32_e32 v2, s6, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s6, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 8, v1
; GFX7-NEXT: v_and_b32_e32 v0, s6, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s6, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v2, s6, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v2, s6, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 8, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v2, s6, v7 ; GFX7-NEXT: v_and_b32_e32 v2, s6, v7
; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, s6, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s6, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_and_b32_e32 v2, s6, v8 ; GFX7-NEXT: v_and_b32_e32 v2, s6, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_and_b32_e32 v2, s6, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v10, 8, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v10, 8, v3
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v3
; GFX7-NEXT: v_and_b32_e32 v2, s6, v3 ; GFX7-NEXT: v_and_b32_e32 v2, s6, v3
; GFX7-NEXT: v_and_b32_e32 v3, s6, v10 ; GFX7-NEXT: v_and_b32_e32 v3, s6, v10
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 8, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 8, v3
; GFX7-NEXT: v_or_b32_e32 v2, v2, v3 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v3
; GFX7-NEXT: v_and_b32_e32 v3, s6, v11 ; GFX7-NEXT: v_and_b32_e32 v3, s6, v11
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX7-NEXT: v_or_b32_e32 v2, v2, v3 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v3
; GFX7-NEXT: v_and_b32_e32 v3, s6, v12 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v12
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v13, 8, v4 ; GFX7-NEXT: v_lshrrev_b32_e32 v13, 8, v4
; GFX7-NEXT: v_or_b32_e32 v2, v2, v3 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v4 ; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v4 ; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v4
; GFX7-NEXT: v_and_b32_e32 v3, s6, v4 ; GFX7-NEXT: v_and_b32_e32 v3, s6, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v13 ; GFX7-NEXT: v_and_b32_e32 v4, s6, v13
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_and_b32_e32 v5, s6, v5
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v14 ; GFX7-NEXT: v_and_b32_e32 v4, s6, v14
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v15 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v15
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; GFX7-NEXT: v_or_b32_e32 v0, v0, v5
; GFX7-NEXT: v_or_b32_e32 v0, v0, v6
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 ; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vec = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx
store <16 x i8> %insert, <16 x i8> addrspace(1)* null store <16 x i8> %insert, <16 x i8> addrspace(1)* null
ret void ret void
} }
Show All 10 Lines
; GFX9-NEXT: s_movk_i32 s6, 0xff ; GFX9-NEXT: s_movk_i32 s6, 0xff
; GFX9-NEXT: s_lshr_b32 s4, s2, 2 ; GFX9-NEXT: s_lshr_b32 s4, s2, 2
; GFX9-NEXT: s_lshl_b32 s1, s6, s1 ; GFX9-NEXT: s_lshl_b32 s1, s6, s1
; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s4, 1 ; GFX9-NEXT: v_cmp_eq_u32_e64 vcc, s4, 1
; GFX9-NEXT: s_not_b32 s5, s1 ; GFX9-NEXT: s_not_b32 s5, s1
; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], s4, 3 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], s4, 3
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v2, 8, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v4 ; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v4
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, s0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v5 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v7, v0, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v6 ; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v5
; GFX9-NEXT: v_and_b32_sdwa v10, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v11, v3, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v2, v3, s6, v2
; GFX9-NEXT: v_and_b32_sdwa v12, v4, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v13, v4, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v3, v4, s6, v7
; GFX9-NEXT: v_lshlrev_b32_sdwa v8, v0, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v8, v0, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v14, v5, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v11, 24, v5
; GFX9-NEXT: v_and_b32_sdwa v15, v5, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v12, 8, v6
; GFX9-NEXT: v_and_or_b32 v4, v5, s6, v8 ; GFX9-NEXT: v_and_b32_sdwa v14, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_sdwa v9, v0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_and_or_b32 v2, v3, s6, v2
; GFX9-NEXT: v_or3_b32 v2, v2, v10, v11 ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX9-NEXT: v_or3_b32 v3, v3, v12, v13 ; GFX9-NEXT: v_and_b32_sdwa v15, v4, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v16, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; GFX9-NEXT: v_and_b32_sdwa v17, v6, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_or_b32 v3, v4, s6, v8
; GFX9-NEXT: v_and_or_b32 v5, v6, s6, v9 ; GFX9-NEXT: v_lshlrev_b32_sdwa v10, v0, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_or3_b32 v4, v4, v14, v15 ; GFX9-NEXT: v_lshrrev_b32_e32 v13, 24, v6
; GFX9-NEXT: v_and_b32_sdwa v16, v5, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v11, 24, v11
; GFX9-NEXT: v_and_or_b32 v4, v5, s6, v10
; GFX9-NEXT: v_lshlrev_b32_sdwa v12, v0, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_or3_b32 v2, v2, v14, v7
; GFX9-NEXT: v_or3_b32 v3, v3, v15, v9
; GFX9-NEXT: v_and_b32_sdwa v17, v6, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v5, v6, s6, v12
; GFX9-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; GFX9-NEXT: v_or3_b32 v4, v4, v16, v11
; GFX9-NEXT: v_cndmask_b32_e32 v6, v2, v3, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v6, v2, v3, vcc
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], s4, 2 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], s4, 2
; GFX9-NEXT: v_or3_b32 v5, v5, v16, v17 ; GFX9-NEXT: v_or3_b32 v5, v5, v17, v13
; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, v4, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, v4, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, v5, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v6, v6, v5, s[2:3]
; GFX9-NEXT: v_and_or_b32 v1, v6, s5, v1 ; GFX9-NEXT: v_and_or_b32 v1, v6, s5, v1
; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], s4, 0 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], s4, 0
; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v1, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v3, v3, v1, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v4, v4, v1, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v4, v4, v1, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v1, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v2, v2, v1, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e64 v1, v5, v1, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v1, v5, v1, s[2:3]
; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v5, 8, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v4 ; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v1 ; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v1
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 24, v2
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 24, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 24, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 24, v1
; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v5, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v6, v0, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v7, v0, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v7, v0, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, v0, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v9, v0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v9, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, v0, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v10, v2, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v13, v2, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v14, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v15, v4, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v2, v2, s6, v5 ; GFX9-NEXT: v_and_or_b32 v2, v2, s6, v5
; GFX9-NEXT: v_and_b32_sdwa v16, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; GFX9-NEXT: v_and_or_b32 v5, v1, s6, v0 ; GFX9-NEXT: v_and_or_b32 v5, v1, s6, v0
; GFX9-NEXT: v_and_b32_sdwa v11, v3, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v8, 24, v8
; GFX9-NEXT: v_and_b32_sdwa v12, v3, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_or_b32 v3, v3, s6, v7
; GFX9-NEXT: v_and_b32_sdwa v13, v4, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 24, v10
; GFX9-NEXT: v_and_b32_sdwa v14, v4, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v11, 24, v12
; GFX9-NEXT: v_and_b32_sdwa v15, v1, s6 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_or_b32 v4, v4, s6, v9
; GFX9-NEXT: v_and_b32_sdwa v16, v1, s6 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_or3_b32 v0, v2, v13, v6
; GFX9-NEXT: v_and_or_b32 v3, v3, s6, v6 ; GFX9-NEXT: v_or3_b32 v1, v3, v14, v8
; GFX9-NEXT: v_and_or_b32 v4, v4, s6, v7 ; GFX9-NEXT: v_or3_b32 v2, v4, v15, v10
; GFX9-NEXT: v_or3_b32 v0, v2, v9, v10 ; GFX9-NEXT: v_or3_b32 v3, v5, v16, v11
; GFX9-NEXT: v_or3_b32 v1, v3, v11, v12
; GFX9-NEXT: v_or3_b32 v2, v4, v13, v14
; GFX9-NEXT: v_or3_b32 v3, v5, v15, v16
; GFX9-NEXT: v_mov_b32_e32 v4, 0 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_v_v16i8_v_s: ; GFX8-LABEL: insertelement_v_v16i8_v_s:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dwordx4 v[3:6], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[3:6], v[0:1]
; GFX8-NEXT: s_and_b32 s1, s2, 3 ; GFX8-NEXT: s_and_b32 s1, s2, 3
; GFX8-NEXT: s_lshl_b32 s1, s1, 3 ; GFX8-NEXT: s_lshl_b32 s1, s1, 3
; GFX8-NEXT: v_mov_b32_e32 v8, s1 ; GFX8-NEXT: v_mov_b32_e32 v8, s1
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v8, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v8, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_mov_b32_e32 v0, 8 ; GFX8-NEXT: v_mov_b32_e32 v0, 8
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v7, s0 ; GFX8-NEXT: v_mov_b32_e32 v7, s0
; GFX8-NEXT: s_lshr_b32 s4, s2, 2 ; GFX8-NEXT: s_lshr_b32 s4, s2, 2
; GFX8-NEXT: s_lshl_b32 s0, s0, s1 ; GFX8-NEXT: s_lshl_b32 s0, s0, s1
; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s4, 1 ; GFX8-NEXT: v_cmp_eq_u32_e64 vcc, s4, 1
; GFX8-NEXT: s_not_b32 s5, s0 ; GFX8-NEXT: s_not_b32 s5, s0
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], s4, 2 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], s4, 2
; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], s4, 3 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], s4, 3
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v3
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 8, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v3
; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v4
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v0, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v5 ; GFX8-NEXT: v_lshlrev_b32_e32 v8, 24, v9
; GFX8-NEXT: v_lshlrev_b32_sdwa v8, v1, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshrrev_b32_e32 v11, 24, v4
; GFX8-NEXT: v_lshrrev_b32_e32 v11, 8, v6
; GFX8-NEXT: v_lshlrev_b32_sdwa v9, v1, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v9, v1, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v12, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v12, 8, v5
; GFX8-NEXT: v_lshlrev_b32_e32 v10, 24, v11
; GFX8-NEXT: v_lshrrev_b32_e32 v13, 24, v5
; GFX8-NEXT: v_lshlrev_b32_sdwa v11, v1, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v14, 8, v6
; GFX8-NEXT: v_and_b32_sdwa v16, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v3, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v13, v3, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v17, v4, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v14, v4, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v3, v4, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v3, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v16
; GFX8-NEXT: v_or_b32_e32 v0, v0, v12 ; GFX8-NEXT: v_or_b32_e32 v3, v3, v17
; GFX8-NEXT: v_and_b32_sdwa v15, v4, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_e32 v12, 24, v13
; GFX8-NEXT: v_or_b32_e32 v3, v3, v14 ; GFX8-NEXT: v_and_b32_sdwa v18, v5, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v16, v5, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v5, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v4, v5, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v13, v1, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v10, v1, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_or_b32_e32 v4, v4, v18
; GFX8-NEXT: v_and_b32_sdwa v17, v5, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v15, 24, v6
; GFX8-NEXT: v_or_b32_e32 v4, v4, v16 ; GFX8-NEXT: v_and_b32_sdwa v19, v6, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v18, v6, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v5, v6, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v5, v6, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_e32 v0, v0, v8
; GFX8-NEXT: v_or_b32_e32 v0, v0, v13 ; GFX8-NEXT: v_or_b32_e32 v3, v3, v10
; GFX8-NEXT: v_or_b32_e32 v3, v3, v15 ; GFX8-NEXT: v_lshlrev_b32_e32 v14, 24, v15
; GFX8-NEXT: v_and_b32_sdwa v19, v6, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v5, v5, v18
; GFX8-NEXT: v_or_b32_e32 v4, v4, v17
; GFX8-NEXT: v_cndmask_b32_e32 v6, v0, v3, vcc
; GFX8-NEXT: v_or_b32_e32 v5, v5, v19 ; GFX8-NEXT: v_or_b32_e32 v5, v5, v19
; GFX8-NEXT: v_or_b32_e32 v4, v4, v12
; GFX8-NEXT: v_cndmask_b32_e32 v6, v0, v3, vcc
; GFX8-NEXT: v_or_b32_e32 v5, v5, v14
; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v4, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v4, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v5, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v6, v6, v5, s[2:3]
; GFX8-NEXT: v_and_b32_e32 v6, s5, v6 ; GFX8-NEXT: v_and_b32_e32 v6, s5, v6
; GFX8-NEXT: v_or_b32_e32 v2, v6, v2 ; GFX8-NEXT: v_or_b32_e32 v2, v6, v2
; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], s4, 0 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], s4, 0
; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v3, v2, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v4, v4, v2, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v4, v4, v2, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[4:5]
; GFX8-NEXT: v_cndmask_b32_e64 v2, v5, v2, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v5, v2, s[2:3]
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v0 ; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v0
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v3
; GFX8-NEXT: v_lshrrev_b32_e32 v8, 8, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v4
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 8, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v12, 8, v2
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v6, v1, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v8, v1, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v8, v1, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v10, v1, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v12, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v13, v3, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v3
; GFX8-NEXT: v_and_b32_sdwa v14, v4, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v11, 24, v4
; GFX8-NEXT: v_and_b32_sdwa v15, v4, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v13, 24, v2
; GFX8-NEXT: v_and_b32_sdwa v16, v2, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v15, v3, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v3, v3, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v16, v4, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v4, v4, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v14, v0, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v7, v2, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v3, v3, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v10, v0, v7 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v4, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v11, v0, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 24, v0
; GFX8-NEXT: v_or_b32_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v7, v2, v7 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v2, v3, v12
; GFX8-NEXT: v_or_b32_e32 v3, v4, v14
; GFX8-NEXT: v_or_b32_e32 v4, v1, v16
; GFX8-NEXT: v_or_b32_e32 v0, v0, v10
; GFX8-NEXT: v_or_b32_e32 v1, v2, v13
; GFX8-NEXT: v_or_b32_e32 v2, v3, v15 ; GFX8-NEXT: v_or_b32_e32 v2, v3, v15
; GFX8-NEXT: v_or_b32_e32 v3, v4, v7 ; GFX8-NEXT: v_or_b32_e32 v3, v4, v16
; GFX8-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; GFX8-NEXT: v_or_b32_e32 v4, v1, v7
; GFX8-NEXT: v_lshlrev_b32_e32 v11, 24, v11
; GFX8-NEXT: v_lshlrev_b32_e32 v12, 24, v13
; GFX8-NEXT: v_or_b32_e32 v1, v2, v9
; GFX8-NEXT: v_or_b32_e32 v2, v3, v11
; GFX8-NEXT: v_or_b32_e32 v3, v4, v12
; GFX8-NEXT: v_mov_b32_e32 v4, 0 ; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_or_b32_e32 v0, v0, v11 ; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; GFX8-NEXT: v_or_b32_e32 v0, v0, v14
; GFX8-NEXT: v_or_b32_e32 v0, v0, v6
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v16i8_v_s: ; GFX7-LABEL: insertelement_v_v16i8_v_s:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s10, 0 ; GFX7-NEXT: s_mov_b32 s10, 0
; GFX7-NEXT: s_mov_b32 s11, 0xf000 ; GFX7-NEXT: s_mov_b32 s11, 0xf000
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; GFX7-NEXT: v_and_b32_e32 v9, s6, v9 ; GFX7-NEXT: v_and_b32_e32 v9, s6, v9
; GFX7-NEXT: v_and_b32_e32 v11, s6, v11 ; GFX7-NEXT: v_and_b32_e32 v11, s6, v11
; GFX7-NEXT: v_and_b32_e32 v3, s6, v3 ; GFX7-NEXT: v_and_b32_e32 v3, s6, v3
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_and_b32_e32 v4, s6, v4 ; GFX7-NEXT: v_and_b32_e32 v4, s6, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v8, 8, v8 ; GFX7-NEXT: v_lshlrev_b32_e32 v8, 8, v8
; GFX7-NEXT: v_lshrrev_b32_e32 v13, 24, v5 ; GFX7-NEXT: v_lshrrev_b32_e32 v13, 24, v5
; GFX7-NEXT: v_lshrrev_b32_e32 v15, 16, v6 ; GFX7-NEXT: v_lshrrev_b32_e32 v15, 16, v6
; GFX7-NEXT: v_and_b32_e32 v7, s6, v7
; GFX7-NEXT: v_and_b32_e32 v10, s6, v10
; GFX7-NEXT: v_and_b32_e32 v12, s6, v12 ; GFX7-NEXT: v_and_b32_e32 v12, s6, v12
; GFX7-NEXT: v_and_b32_e32 v14, s6, v14 ; GFX7-NEXT: v_and_b32_e32 v14, s6, v14
; GFX7-NEXT: v_or_b32_e32 v1, v3, v1 ; GFX7-NEXT: v_or_b32_e32 v1, v3, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_and_b32_e32 v5, s6, v5 ; GFX7-NEXT: v_and_b32_e32 v5, s6, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v9, 16, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v11, 8, v11 ; GFX7-NEXT: v_lshlrev_b32_e32 v11, 8, v11
; GFX7-NEXT: v_or_b32_e32 v3, v4, v8 ; GFX7-NEXT: v_or_b32_e32 v3, v4, v8
; GFX7-NEXT: v_lshrrev_b32_e32 v16, 24, v6 ; GFX7-NEXT: v_lshrrev_b32_e32 v16, 24, v6
; GFX7-NEXT: v_and_b32_e32 v13, s6, v13
; GFX7-NEXT: v_and_b32_e32 v15, s6, v15 ; GFX7-NEXT: v_and_b32_e32 v15, s6, v15
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX7-NEXT: v_and_b32_e32 v6, s6, v6 ; GFX7-NEXT: v_and_b32_e32 v6, s6, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v10, 24, v10 ; GFX7-NEXT: v_lshlrev_b32_e32 v10, 24, v10
; GFX7-NEXT: v_or_b32_e32 v2, v3, v9 ; GFX7-NEXT: v_or_b32_e32 v2, v3, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v12, 16, v12 ; GFX7-NEXT: v_lshlrev_b32_e32 v12, 16, v12
; GFX7-NEXT: v_or_b32_e32 v4, v5, v11 ; GFX7-NEXT: v_or_b32_e32 v4, v5, v11
; GFX7-NEXT: v_lshlrev_b32_e32 v14, 8, v14 ; GFX7-NEXT: v_lshlrev_b32_e32 v14, 8, v14
; GFX7-NEXT: v_and_b32_e32 v16, s6, v16
; GFX7-NEXT: v_lshlrev_b32_e32 v13, 24, v13 ; GFX7-NEXT: v_lshlrev_b32_e32 v13, 24, v13
; GFX7-NEXT: v_or_b32_e32 v3, v4, v12 ; GFX7-NEXT: v_or_b32_e32 v3, v4, v12
; GFX7-NEXT: v_lshlrev_b32_e32 v15, 16, v15 ; GFX7-NEXT: v_lshlrev_b32_e32 v15, 16, v15
; GFX7-NEXT: v_or_b32_e32 v5, v6, v14 ; GFX7-NEXT: v_or_b32_e32 v5, v6, v14
; GFX7-NEXT: v_or_b32_e32 v1, v1, v7 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v7
; GFX7-NEXT: v_or_b32_e32 v2, v2, v10 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v10
; GFX7-NEXT: v_or_b32_e32 v4, v5, v15 ; GFX7-NEXT: v_or_b32_e32 v4, v5, v15
; GFX7-NEXT: v_lshlrev_b32_e32 v16, 24, v16 ; GFX7-NEXT: v_lshlrev_b32_e32 v16, 24, v16
; GFX7-NEXT: v_or_b32_e32 v3, v3, v13 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v13
; GFX7-NEXT: v_cndmask_b32_e32 v5, v1, v2, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v5, v1, v2, vcc
; GFX7-NEXT: v_or_b32_e32 v4, v4, v16 ; GFX7-NEXT: v_or_b32_e32 v4, v4, v16
; GFX7-NEXT: v_cndmask_b32_e64 v5, v5, v3, s[0:1] ; GFX7-NEXT: v_cndmask_b32_e64 v5, v5, v3, s[0:1]
; GFX7-NEXT: v_cndmask_b32_e64 v5, v5, v4, s[2:3] ; GFX7-NEXT: v_cndmask_b32_e64 v5, v5, v4, s[2:3]
; GFX7-NEXT: v_and_b32_e32 v5, s5, v5 ; GFX7-NEXT: v_and_b32_e32 v5, s5, v5
; GFX7-NEXT: v_or_b32_e32 v0, v5, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v5, v0
; GFX7-NEXT: v_cmp_eq_u32_e64 s[4:5], s4, 0 ; GFX7-NEXT: v_cmp_eq_u32_e64 s[4:5], s4, 0
; GFX7-NEXT: v_cndmask_b32_e64 v1, v1, v0, s[4:5] ; GFX7-NEXT: v_cndmask_b32_e64 v1, v1, v0, s[4:5]
; GFX7-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v2, v2, v0, vcc
; GFX7-NEXT: v_cndmask_b32_e64 v3, v3, v0, s[0:1] ; GFX7-NEXT: v_cndmask_b32_e64 v3, v3, v0, s[0:1]
; GFX7-NEXT: v_cndmask_b32_e64 v4, v4, v0, s[2:3] ; GFX7-NEXT: v_cndmask_b32_e64 v4, v4, v0, s[2:3]
; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v0, 8, v1
; GFX7-NEXT: v_and_b32_e32 v0, s6, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s6, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 8, v2
; GFX7-NEXT: v_and_b32_e32 v1, s6, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s6, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v1, v0
; GFX7-NEXT: v_and_b32_e32 v1, s6, v5 ; GFX7-NEXT: v_and_b32_e32 v1, s6, v7
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_and_b32_e32 v1, s6, v6
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 8, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v8, 16, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v2 ; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v2
; GFX7-NEXT: v_and_b32_e32 v1, s6, v2 ; GFX7-NEXT: v_and_b32_e32 v2, s6, v2
; GFX7-NEXT: v_and_b32_e32 v2, s6, v7 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v2, v1
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_and_b32_e32 v2, s6, v8 ; GFX7-NEXT: v_and_b32_e32 v2, s6, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_and_b32_e32 v2, s6, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v9
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v10, 8, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v10, 8, v3
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v11, 16, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v3
; GFX7-NEXT: v_and_b32_e32 v2, s6, v3 ; GFX7-NEXT: v_and_b32_e32 v2, s6, v3
; GFX7-NEXT: v_and_b32_e32 v3, s6, v10 ; GFX7-NEXT: v_and_b32_e32 v3, s6, v10
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 8, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 8, v3
; GFX7-NEXT: v_or_b32_e32 v2, v2, v3 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v3
; GFX7-NEXT: v_and_b32_e32 v3, s6, v11 ; GFX7-NEXT: v_and_b32_e32 v3, s6, v11
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX7-NEXT: v_or_b32_e32 v2, v2, v3 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v3
; GFX7-NEXT: v_and_b32_e32 v3, s6, v12 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v12
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v13, 8, v4 ; GFX7-NEXT: v_lshrrev_b32_e32 v13, 8, v4
; GFX7-NEXT: v_or_b32_e32 v2, v2, v3 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v4 ; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v4 ; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v4
; GFX7-NEXT: v_and_b32_e32 v3, s6, v4 ; GFX7-NEXT: v_and_b32_e32 v3, s6, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v13 ; GFX7-NEXT: v_and_b32_e32 v4, s6, v13
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_and_b32_e32 v5, s6, v5
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v14 ; GFX7-NEXT: v_and_b32_e32 v4, s6, v14
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v4, s6, v15 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v15
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; GFX7-NEXT: v_or_b32_e32 v0, v0, v5
; GFX7-NEXT: v_or_b32_e32 v0, v0, v6
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 ; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vec = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx
store <16 x i8> %insert, <16 x i8> addrspace(1)* null store <16 x i8> %insert, <16 x i8> addrspace(1)* null
ret void ret void
} }
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; GFX9-NEXT: v_lshlrev_b32_e32 v3, 3, v3 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, 3, v3
; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_e32 v3, v3, v0 ; GFX9-NEXT: v_lshlrev_b32_e32 v3, v3, v0
; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v8 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v8
; GFX9-NEXT: v_xor_b32_e32 v3, -1, v3 ; GFX9-NEXT: v_xor_b32_e32 v3, -1, v3
; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v8 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v8
; GFX9-NEXT: s_waitcnt vmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0)
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v4 ; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v5 ; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v11, 8, v6 ; GFX9-NEXT: v_lshrrev_b32_e32 v10, 24, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 8, v7 ; GFX9-NEXT: v_lshrrev_b32_e32 v13, 8, v6
; GFX9-NEXT: v_lshrrev_b32_e32 v15, 8, v7
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 24, v5
; GFX9-NEXT: v_lshlrev_b32_sdwa v9, s0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v9, s0, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v10, v1, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v13, v4, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v14, v4, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v4, v4, s1, v9
; GFX9-NEXT: v_lshlrev_b32_sdwa v12, v1, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v15, v5, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v16, v5, s1 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v5, v5, s1, v10
; GFX9-NEXT: v_lshlrev_b32_sdwa v11, v1, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v11, v1, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v17, v6, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v17, v4, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v18, v6, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v18, v5, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v6, v6, s1, v11 ; GFX9-NEXT: v_and_or_b32 v5, v5, s1, v11
; GFX9-NEXT: v_and_b32_sdwa v19, v7, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v11, 24, v12
; GFX9-NEXT: v_and_or_b32 v9, v7, v0, v12 ; GFX9-NEXT: v_lshrrev_b32_e32 v14, 24, v6
; GFX9-NEXT: v_and_b32_sdwa v7, v7, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v16, 24, v7
; GFX9-NEXT: v_or3_b32 v4, v4, v13, v14 ; GFX9-NEXT: v_lshlrev_b32_sdwa v13, v1, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_or3_b32 v5, v5, v15, v16 ; GFX9-NEXT: v_lshlrev_b32_sdwa v15, v1, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_or3_b32 v7, v9, v19, v7 ; GFX9-NEXT: v_and_or_b32 v4, v4, s1, v9
; GFX9-NEXT: v_or3_b32 v6, v6, v17, v18 ; GFX9-NEXT: v_lshlrev_b32_e32 v10, 24, v10
; GFX9-NEXT: v_and_b32_sdwa v19, v6, s1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v6, v6, s1, v13
; GFX9-NEXT: v_and_or_b32 v9, v7, v0, v15
; GFX9-NEXT: v_lshlrev_b32_e32 v12, 24, v14
; GFX9-NEXT: v_and_b32_sdwa v7, v7, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_e32 v13, 24, v16
; GFX9-NEXT: v_or3_b32 v4, v4, v17, v10
; GFX9-NEXT: v_or3_b32 v5, v5, v18, v11
; GFX9-NEXT: v_or3_b32 v7, v9, v7, v13
; GFX9-NEXT: v_or3_b32 v6, v6, v19, v12
; GFX9-NEXT: v_cndmask_b32_e32 v9, v4, v5, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v9, v4, v5, vcc
; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v8 ; GFX9-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v8
; GFX9-NEXT: v_cndmask_b32_e64 v9, v9, v6, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v9, v9, v6, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v9, v9, v7, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v9, v9, v7, s[2:3]
; GFX9-NEXT: v_and_or_b32 v2, v9, v3, v2 ; GFX9-NEXT: v_and_or_b32 v2, v9, v3, v2
; GFX9-NEXT: v_cndmask_b32_e64 v3, v4, v2, s[4:5] ; GFX9-NEXT: v_cndmask_b32_e64 v3, v4, v2, s[4:5]
; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v2, vcc ; GFX9-NEXT: v_cndmask_b32_e32 v4, v5, v2, vcc
; GFX9-NEXT: v_cndmask_b32_e64 v5, v6, v2, s[0:1] ; GFX9-NEXT: v_cndmask_b32_e64 v5, v6, v2, s[0:1]
; GFX9-NEXT: v_cndmask_b32_e64 v2, v7, v2, s[2:3] ; GFX9-NEXT: v_cndmask_b32_e64 v2, v7, v2, s[2:3]
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 8, v4 ; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v4
; GFX9-NEXT: v_lshrrev_b32_e32 v8, 8, v5 ; GFX9-NEXT: v_lshrrev_b32_e32 v10, 8, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v3 ; GFX9-NEXT: v_lshrrev_b32_e32 v6, 8, v3
; GFX9-NEXT: v_lshrrev_b32_e32 v9, 8, v2 ; GFX9-NEXT: v_lshrrev_b32_e32 v9, 24, v4
; GFX9-NEXT: v_lshlrev_b32_sdwa v7, v1, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshrrev_b32_e32 v11, 24, v5
; GFX9-NEXT: v_lshrrev_b32_e32 v12, 8, v2
; GFX9-NEXT: v_lshlrev_b32_sdwa v8, v1, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v8, v1, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v10, v1, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_lshrrev_b32_e32 v7, 24, v3
; GFX9-NEXT: v_and_b32_sdwa v15, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v16, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_lshlrev_b32_sdwa v6, v1, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshlrev_b32_sdwa v6, v1, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v12, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_e32 v13, 24, v2
; GFX9-NEXT: v_and_b32_sdwa v13, v4, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_sdwa v1, v1, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: v_and_b32_sdwa v14, v5, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; GFX9-NEXT: v_and_b32_sdwa v15, v5, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v11, 24, v11
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, v1, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_and_or_b32 v4, v4, v0, v8
; GFX9-NEXT: v_and_or_b32 v4, v4, v0, v7 ; GFX9-NEXT: v_and_or_b32 v5, v5, v0, v10
; GFX9-NEXT: v_and_or_b32 v5, v5, v0, v8 ; GFX9-NEXT: v_and_b32_sdwa v14, v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v10, v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v11, v3, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX9-NEXT: v_and_or_b32 v3, v3, v0, v6 ; GFX9-NEXT: v_and_or_b32 v3, v3, v0, v6
; GFX9-NEXT: v_and_or_b32 v6, v2, v0, v1 ; GFX9-NEXT: v_and_or_b32 v6, v2, v0, v1
; GFX9-NEXT: v_and_b32_sdwa v16, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX9-NEXT: v_and_b32_sdwa v17, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: v_and_b32_sdwa v17, v2, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX9-NEXT: v_lshlrev_b32_e32 v7, 24, v7
; GFX9-NEXT: v_or3_b32 v1, v4, v12, v13 ; GFX9-NEXT: v_lshlrev_b32_e32 v12, 24, v13
; GFX9-NEXT: v_or3_b32 v2, v5, v14, v15 ; GFX9-NEXT: v_or3_b32 v1, v4, v15, v9
; GFX9-NEXT: v_or3_b32 v2, v5, v16, v11
; GFX9-NEXT: v_mov_b32_e32 v4, 0 ; GFX9-NEXT: v_mov_b32_e32 v4, 0
; GFX9-NEXT: v_or3_b32 v0, v3, v10, v11 ; GFX9-NEXT: v_or3_b32 v0, v3, v14, v7
; GFX9-NEXT: v_or3_b32 v3, v6, v16, v17 ; GFX9-NEXT: v_or3_b32 v3, v6, v17, v12
; GFX9-NEXT: v_mov_b32_e32 v5, 0 ; GFX9-NEXT: v_mov_b32_e32 v5, 0
; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off ; GFX9-NEXT: global_store_dwordx4 v[4:5], v[0:3], off
; GFX9-NEXT: s_endpgm ; GFX9-NEXT: s_endpgm
; ;
; GFX8-LABEL: insertelement_v_v16i8_v_v: ; GFX8-LABEL: insertelement_v_v16i8_v_v:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: flat_load_dwordx4 v[4:7], v[0:1] ; GFX8-NEXT: flat_load_dwordx4 v[4:7], v[0:1]
; GFX8-NEXT: s_movk_i32 s0, 0xff ; GFX8-NEXT: s_movk_i32 s0, 0xff
; GFX8-NEXT: v_mov_b32_e32 v1, 8 ; GFX8-NEXT: v_mov_b32_e32 v1, 8
; GFX8-NEXT: v_mov_b32_e32 v8, 8 ; GFX8-NEXT: v_mov_b32_e32 v8, 8
; GFX8-NEXT: v_mov_b32_e32 v9, s0 ; GFX8-NEXT: v_mov_b32_e32 v9, s0
; GFX8-NEXT: v_mov_b32_e32 v0, 0xff ; GFX8-NEXT: v_mov_b32_e32 v0, 0xff
; GFX8-NEXT: v_lshrrev_b32_e32 v10, 2, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v10, 2, v3
; GFX8-NEXT: v_and_b32_e32 v3, 3, v3 ; GFX8-NEXT: v_and_b32_e32 v3, 3, v3
; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v10 ; GFX8-NEXT: v_cmp_eq_u32_e32 vcc, 1, v10
; GFX8-NEXT: v_lshlrev_b32_e32 v3, 3, v3 ; GFX8-NEXT: v_lshlrev_b32_e32 v3, 3, v3
; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v10 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v10
; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v2, v3, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_e32 v3, v3, v0 ; GFX8-NEXT: v_lshlrev_b32_e32 v3, v3, v0
; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v10 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[2:3], 3, v10
; GFX8-NEXT: v_xor_b32_e32 v3, -1, v3 ; GFX8-NEXT: v_xor_b32_e32 v3, -1, v3
; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v10 ; GFX8-NEXT: v_cmp_eq_u32_e64 s[4:5], 0, v10
; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_lshrrev_b32_e32 v12, 8, v5 ; GFX8-NEXT: v_lshrrev_b32_e32 v13, 8, v5
; GFX8-NEXT: v_lshrrev_b32_e32 v11, 8, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v11, 8, v4
; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v1, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshrrev_b32_e32 v13, 8, v6 ; GFX8-NEXT: v_lshrrev_b32_e32 v15, 8, v6
; GFX8-NEXT: v_lshrrev_b32_e32 v14, 8, v7
; GFX8-NEXT: v_lshlrev_b32_sdwa v12, v8, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v15, v4, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v16, v4, v9 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v17, v5, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v4, v5, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v13, v8, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v13, v8, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_sdwa v14, v8, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshrrev_b32_e32 v12, 24, v4
; GFX8-NEXT: v_or_b32_e32 v1, v1, v15 ; GFX8-NEXT: v_lshrrev_b32_e32 v17, 8, v7
; GFX8-NEXT: v_and_b32_sdwa v9, v5, v9 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v19, v4, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v4, v4, v17 ; GFX8-NEXT: v_or_b32_sdwa v1, v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v18, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v14, 24, v5
; GFX8-NEXT: v_or_b32_sdwa v5, v6, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v5, v13 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v19, v6, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v9, v5, v9 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v11, v7, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v15, v8, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_or_b32_sdwa v6, v7, v14 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v16, 24, v6
; GFX8-NEXT: v_or_b32_e32 v5, v5, v18 ; GFX8-NEXT: v_lshlrev_b32_e32 v13, 24, v14
; GFX8-NEXT: v_and_b32_sdwa v7, v7, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v6, v6, v11
; GFX8-NEXT: v_or_b32_e32 v1, v1, v16
; GFX8-NEXT: v_or_b32_e32 v4, v4, v9 ; GFX8-NEXT: v_or_b32_e32 v4, v4, v9
; GFX8-NEXT: v_and_b32_sdwa v11, v6, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v5, v6, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v17, v8, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_lshlrev_b32_e32 v12, 24, v12
; GFX8-NEXT: v_or_b32_e32 v1, v1, v19
; GFX8-NEXT: v_lshrrev_b32_e32 v18, 24, v7
; GFX8-NEXT: v_or_b32_sdwa v6, v7, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_and_b32_sdwa v7, v7, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_e32 v14, 24, v16
; GFX8-NEXT: v_or_b32_e32 v5, v5, v11
; GFX8-NEXT: v_or_b32_e32 v1, v1, v12
; GFX8-NEXT: v_or_b32_e32 v4, v4, v13
; GFX8-NEXT: v_or_b32_e32 v6, v6, v7 ; GFX8-NEXT: v_or_b32_e32 v6, v6, v7
; GFX8-NEXT: v_or_b32_e32 v5, v5, v19 ; GFX8-NEXT: v_lshlrev_b32_e32 v15, 24, v18
; GFX8-NEXT: v_or_b32_e32 v5, v5, v14
; GFX8-NEXT: v_cndmask_b32_e32 v7, v1, v4, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v7, v1, v4, vcc
; GFX8-NEXT: v_or_b32_e32 v6, v6, v15
; GFX8-NEXT: v_cndmask_b32_e64 v7, v7, v5, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v7, v7, v5, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v7, v7, v6, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v7, v7, v6, s[2:3]
; GFX8-NEXT: v_and_b32_e32 v3, v7, v3 ; GFX8-NEXT: v_and_b32_e32 v3, v7, v3
; GFX8-NEXT: v_or_b32_e32 v2, v3, v2 ; GFX8-NEXT: v_or_b32_e32 v2, v3, v2
; GFX8-NEXT: v_cndmask_b32_e32 v3, v4, v2, vcc ; GFX8-NEXT: v_cndmask_b32_e32 v3, v4, v2, vcc
; GFX8-NEXT: v_cndmask_b32_e64 v4, v5, v2, s[0:1] ; GFX8-NEXT: v_cndmask_b32_e64 v4, v5, v2, s[0:1]
; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5] ; GFX8-NEXT: v_cndmask_b32_e64 v1, v1, v2, s[4:5]
; GFX8-NEXT: v_cndmask_b32_e64 v2, v6, v2, s[2:3] ; GFX8-NEXT: v_cndmask_b32_e64 v2, v6, v2, s[2:3]
; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v1 ; GFX8-NEXT: v_lshrrev_b32_e32 v5, 8, v1
; GFX8-NEXT: v_lshrrev_b32_e32 v6, 8, v3 ; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v3
; GFX8-NEXT: v_lshrrev_b32_e32 v7, 8, v4 ; GFX8-NEXT: v_lshrrev_b32_e32 v10, 8, v4
; GFX8-NEXT: v_lshrrev_b32_e32 v9, 8, v2 ; GFX8-NEXT: v_lshrrev_b32_e32 v12, 8, v2
; GFX8-NEXT: v_and_b32_sdwa v10, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v8, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v11, v1, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v7, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v12, v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v10, v8, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v13, v3, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b32_sdwa v8, v8, v12 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: v_and_b32_sdwa v14, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v6, 24, v1
; GFX8-NEXT: v_and_b32_sdwa v15, v4, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v9, 24, v3
; GFX8-NEXT: v_and_b32_sdwa v16, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v11, 24, v4
; GFX8-NEXT: v_and_b32_sdwa v17, v2, v0 dst_sel:BYTE_3 dst_unused:UNUSED_PAD src0_sel:BYTE_3 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_e32 v13, 24, v2
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v8, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_and_b32_sdwa v14, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v5, v8, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_or_b32_sdwa v1, v1, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v6, v8, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_and_b32_sdwa v15, v3, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b32_sdwa v7, v8, v9 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_and_b32_sdwa v16, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v3, v3, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v1, v3, v5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v4, v4, v10 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v3, v4, v6 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_and_b32_sdwa v0, v2, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_sdwa v2, v2, v7 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v2, v2, v8 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v3, v3, v14 ; GFX8-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; GFX8-NEXT: v_or_b32_e32 v4, v2, v16 ; GFX8-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; GFX8-NEXT: v_or_b32_e32 v0, v0, v10 ; GFX8-NEXT: v_lshlrev_b32_e32 v11, 24, v11
; GFX8-NEXT: v_or_b32_e32 v1, v1, v12 ; GFX8-NEXT: v_lshlrev_b32_e32 v12, 24, v13
; GFX8-NEXT: v_or_b32_e32 v2, v3, v15 ; GFX8-NEXT: v_or_b32_e32 v1, v1, v14
; GFX8-NEXT: v_or_b32_e32 v3, v4, v17 ; GFX8-NEXT: v_or_b32_e32 v5, v2, v0
; GFX8-NEXT: v_or_b32_e32 v4, v4, v16
; GFX8-NEXT: v_or_b32_e32 v3, v3, v15
; GFX8-NEXT: v_or_b32_e32 v0, v1, v6
; GFX8-NEXT: v_or_b32_e32 v1, v3, v9
; GFX8-NEXT: v_or_b32_e32 v2, v4, v11
; GFX8-NEXT: v_or_b32_e32 v3, v5, v12
; GFX8-NEXT: v_mov_b32_e32 v4, 0 ; GFX8-NEXT: v_mov_b32_e32 v4, 0
; GFX8-NEXT: v_or_b32_e32 v0, v0, v11
; GFX8-NEXT: v_or_b32_e32 v1, v1, v13
; GFX8-NEXT: v_mov_b32_e32 v5, 0 ; GFX8-NEXT: v_mov_b32_e32 v5, 0
; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3] ; GFX8-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
; GFX8-NEXT: s_endpgm ; GFX8-NEXT: s_endpgm
; ;
; GFX7-LABEL: insertelement_v_v16i8_v_v: ; GFX7-LABEL: insertelement_v_v16i8_v_v:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s10, 0 ; GFX7-NEXT: s_mov_b32 s10, 0
; GFX7-NEXT: s_mov_b32 s11, 0xf000 ; GFX7-NEXT: s_mov_b32 s11, 0xf000
Show All 21 Lines
; GFX7-NEXT: v_and_b32_e32 v0, s0, v0 ; GFX7-NEXT: v_and_b32_e32 v0, s0, v0
; GFX7-NEXT: v_and_b32_e32 v10, s0, v10 ; GFX7-NEXT: v_and_b32_e32 v10, s0, v10
; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v4 ; GFX7-NEXT: v_lshrrev_b32_e32 v9, 24, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v5 ; GFX7-NEXT: v_lshrrev_b32_e32 v12, 24, v5
; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v6 ; GFX7-NEXT: v_lshrrev_b32_e32 v14, 16, v6
; GFX7-NEXT: v_lshrrev_b32_e32 v16, 8, v7 ; GFX7-NEXT: v_lshrrev_b32_e32 v16, 8, v7
; GFX7-NEXT: v_and_b32_e32 v1, s0, v1 ; GFX7-NEXT: v_and_b32_e32 v1, s0, v1
; GFX7-NEXT: v_and_b32_e32 v11, s0, v11 ; GFX7-NEXT: v_and_b32_e32 v11, s0, v11
; GFX7-NEXT: v_and_b32_e32 v13, v13, v8 ; GFX7-NEXT: v_and_b32_e32 v13, s0, v13
; GFX7-NEXT: v_and_b32_e32 v4, s0, v4 ; GFX7-NEXT: v_and_b32_e32 v4, s0, v4
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 8, v0
; GFX7-NEXT: v_and_b32_e32 v5, s0, v5 ; GFX7-NEXT: v_and_b32_e32 v5, s0, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v10, 8, v10 ; GFX7-NEXT: v_lshlrev_b32_e32 v10, 8, v10
; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v6 ; GFX7-NEXT: v_lshrrev_b32_e32 v15, 24, v6
; GFX7-NEXT: v_lshrrev_b32_e32 v17, 16, v7 ; GFX7-NEXT: v_lshrrev_b32_e32 v17, 16, v7
; GFX7-NEXT: v_and_b32_e32 v9, s0, v9
; GFX7-NEXT: v_and_b32_e32 v12, s0, v12
; GFX7-NEXT: v_and_b32_e32 v14, v14, v8 ; GFX7-NEXT: v_and_b32_e32 v14, v14, v8
; GFX7-NEXT: v_and_b32_e32 v16, v16, v8 ; GFX7-NEXT: v_and_b32_e32 v16, v16, v8
; GFX7-NEXT: v_and_b32_e32 v6, s0, v6 ; GFX7-NEXT: v_and_b32_e32 v6, s0, v6
; GFX7-NEXT: v_or_b32_e32 v0, v4, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v4, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v11, 16, v11 ; GFX7-NEXT: v_lshlrev_b32_e32 v11, 16, v11
; GFX7-NEXT: v_lshlrev_b32_e32 v13, 8, v13 ; GFX7-NEXT: v_lshlrev_b32_e32 v13, 8, v13
; GFX7-NEXT: v_or_b32_e32 v4, v5, v10 ; GFX7-NEXT: v_or_b32_e32 v4, v5, v10
; GFX7-NEXT: v_lshrrev_b32_e32 v18, 24, v7 ; GFX7-NEXT: v_lshrrev_b32_e32 v18, 24, v7
; GFX7-NEXT: v_and_b32_e32 v15, v15, v8
; GFX7-NEXT: v_and_b32_e32 v17, v17, v8 ; GFX7-NEXT: v_and_b32_e32 v17, v17, v8
; GFX7-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v9, 24, v9 ; GFX7-NEXT: v_lshlrev_b32_e32 v9, 24, v9
; GFX7-NEXT: v_and_b32_e32 v7, v7, v8 ; GFX7-NEXT: v_and_b32_e32 v7, v7, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v12, 24, v12 ; GFX7-NEXT: v_lshlrev_b32_e32 v12, 24, v12
; GFX7-NEXT: v_or_b32_e32 v1, v4, v11 ; GFX7-NEXT: v_or_b32_e32 v1, v4, v11
; GFX7-NEXT: v_lshlrev_b32_e32 v14, 16, v14 ; GFX7-NEXT: v_lshlrev_b32_e32 v14, 16, v14
; GFX7-NEXT: v_or_b32_e32 v5, v6, v13 ; GFX7-NEXT: v_or_b32_e32 v5, v6, v13
; GFX7-NEXT: v_lshlrev_b32_e32 v16, 8, v16 ; GFX7-NEXT: v_lshlrev_b32_e32 v16, 8, v16
; GFX7-NEXT: v_and_b32_e32 v18, v18, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v15, 24, v15 ; GFX7-NEXT: v_lshlrev_b32_e32 v15, 24, v15
; GFX7-NEXT: v_or_b32_e32 v4, v5, v14 ; GFX7-NEXT: v_or_b32_e32 v4, v5, v14
; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17 ; GFX7-NEXT: v_lshlrev_b32_e32 v17, 16, v17
; GFX7-NEXT: v_or_b32_e32 v6, v7, v16 ; GFX7-NEXT: v_or_b32_e32 v6, v7, v16
; GFX7-NEXT: v_or_b32_e32 v0, v0, v9 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v9
; GFX7-NEXT: v_or_b32_e32 v1, v1, v12 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v12
; GFX7-NEXT: v_or_b32_e32 v5, v6, v17 ; GFX7-NEXT: v_or_b32_e32 v5, v6, v17
; GFX7-NEXT: v_lshlrev_b32_e32 v18, 24, v18 ; GFX7-NEXT: v_lshlrev_b32_e32 v18, 24, v18
; GFX7-NEXT: v_or_b32_e32 v4, v4, v15 ; GFX7-NEXT: v_or_b32_e32 v4, v4, v15
; GFX7-NEXT: v_cndmask_b32_e32 v6, v0, v1, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v6, v0, v1, vcc
; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v19 ; GFX7-NEXT: v_cmp_eq_u32_e64 s[0:1], 2, v19
; GFX7-NEXT: v_or_b32_e32 v5, v5, v18 ; GFX7-NEXT: v_or_b32_e32 v5, v5, v18
; GFX7-NEXT: v_cndmask_b32_e64 v6, v6, v4, s[0:1] ; GFX7-NEXT: v_cndmask_b32_e64 v6, v6, v4, s[0:1]
; GFX7-NEXT: v_cndmask_b32_e64 v6, v6, v5, s[2:3] ; GFX7-NEXT: v_cndmask_b32_e64 v6, v6, v5, s[2:3]
; GFX7-NEXT: v_and_b32_e32 v3, v6, v3 ; GFX7-NEXT: v_and_b32_e32 v3, v6, v3
; GFX7-NEXT: v_or_b32_e32 v2, v3, v2 ; GFX7-NEXT: v_or_b32_e32 v2, v3, v2
; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[4:5] ; GFX7-NEXT: v_cndmask_b32_e64 v0, v0, v2, s[4:5]
; GFX7-NEXT: v_cndmask_b32_e64 v3, v4, v2, s[0:1] ; GFX7-NEXT: v_cndmask_b32_e64 v3, v4, v2, s[0:1]
; GFX7-NEXT: v_cndmask_b32_e64 v4, v5, v2, s[2:3] ; GFX7-NEXT: v_cndmask_b32_e64 v4, v5, v2, s[2:3]
; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc ; GFX7-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
; GFX7-NEXT: v_lshrrev_b32_e32 v2, 8, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v2, 8, v0
; GFX7-NEXT: v_and_b32_e32 v2, v2, v8 ; GFX7-NEXT: v_and_b32_e32 v2, v2, v8
; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v5, 16, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v6, 24, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 8, v1
; GFX7-NEXT: v_and_b32_e32 v0, v0, v8 ; GFX7-NEXT: v_and_b32_e32 v0, v0, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2 ; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v2, v5, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v2, v6, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v7, 8, v1
; GFX7-NEXT: v_or_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v2, v7, v8 ; GFX7-NEXT: v_and_b32_e32 v2, v7, v8
; GFX7-NEXT: v_lshrrev_b32_e32 v9, 16, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v9, 16, v1
; GFX7-NEXT: v_lshrrev_b32_e32 v10, 24, v1 ; GFX7-NEXT: v_lshrrev_b32_e32 v10, 24, v1
; GFX7-NEXT: v_and_b32_e32 v1, v1, v8 ; GFX7-NEXT: v_and_b32_e32 v1, v1, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 8, v2
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_and_b32_e32 v2, v9, v8 ; GFX7-NEXT: v_and_b32_e32 v2, v9, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_and_b32_e32 v2, v10, v8 ; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v10
; GFX7-NEXT: v_lshlrev_b32_e32 v2, 24, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v11, 8, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v11, 8, v3
; GFX7-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX7-NEXT: v_or_b32_e32 v1, v1, v2
; GFX7-NEXT: v_lshrrev_b32_e32 v12, 16, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v12, 16, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v13, 24, v3 ; GFX7-NEXT: v_lshrrev_b32_e32 v13, 24, v3
; GFX7-NEXT: v_and_b32_e32 v2, v3, v8 ; GFX7-NEXT: v_and_b32_e32 v2, v3, v8
; GFX7-NEXT: v_and_b32_e32 v3, v11, v8 ; GFX7-NEXT: v_and_b32_e32 v3, v11, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 8, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 8, v3
; GFX7-NEXT: v_or_b32_e32 v2, v2, v3 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v3
; GFX7-NEXT: v_and_b32_e32 v3, v12, v8 ; GFX7-NEXT: v_and_b32_e32 v3, v12, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX7-NEXT: v_or_b32_e32 v2, v2, v3 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v3
; GFX7-NEXT: v_and_b32_e32 v3, v13, v8 ; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v13
; GFX7-NEXT: v_lshlrev_b32_e32 v3, 24, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v14, 8, v4 ; GFX7-NEXT: v_lshrrev_b32_e32 v14, 8, v4
; GFX7-NEXT: v_or_b32_e32 v2, v2, v3 ; GFX7-NEXT: v_or_b32_e32 v2, v2, v3
; GFX7-NEXT: v_lshrrev_b32_e32 v15, 16, v4 ; GFX7-NEXT: v_lshrrev_b32_e32 v15, 16, v4
; GFX7-NEXT: v_lshrrev_b32_e32 v16, 24, v4 ; GFX7-NEXT: v_lshrrev_b32_e32 v16, 24, v4
; GFX7-NEXT: v_and_b32_e32 v3, v4, v8 ; GFX7-NEXT: v_and_b32_e32 v3, v4, v8
; GFX7-NEXT: v_and_b32_e32 v4, v14, v8 ; GFX7-NEXT: v_and_b32_e32 v4, v14, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 8, v4
; GFX7-NEXT: v_and_b32_e32 v5, v5, v8
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v4, v15, v8 ; GFX7-NEXT: v_and_b32_e32 v4, v15, v8
; GFX7-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: v_and_b32_e32 v4, v16, v8 ; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v16
; GFX7-NEXT: v_lshlrev_b32_e32 v4, 24, v4 ; GFX7-NEXT: v_lshlrev_b32_e32 v6, 24, v6
; GFX7-NEXT: v_or_b32_e32 v0, v0, v5
; GFX7-NEXT: v_or_b32_e32 v0, v0, v6
; GFX7-NEXT: v_or_b32_e32 v3, v3, v4 ; GFX7-NEXT: v_or_b32_e32 v3, v3, v4
; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 ; GFX7-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
; GFX7-NEXT: s_endpgm ; GFX7-NEXT: s_endpgm
%vec = load <16 x i8>, <16 x i8> addrspace(1)* %ptr %vec = load <16 x i8>, <16 x i8> addrspace(1)* %ptr
%insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx %insert = insertelement <16 x i8> %vec, i8 %val, i32 %idx
store <16 x i8> %insert, <16 x i8> addrspace(1)* null store <16 x i8> %insert, <16 x i8> addrspace(1)* null
ret void ret void
} }

llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll

Show All 40 Lines
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v1, 7 ; GFX8-NEXT: v_mov_b32_e32 v1, 7
; GFX8-NEXT: v_lshrrev_b16_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX8-NEXT: v_lshrrev_b16_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX9-LABEL: v_lshr_i8_7: ; GFX9-LABEL: v_lshr_i8_7:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_mov_b32 s4, 7 ; GFX9-NEXT: v_mov_b32_e32 v1, 7
; GFX9-NEXT: v_lshrrev_b16_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0 ; GFX9-NEXT: v_lshrrev_b16_sdwa v0, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:BYTE_0
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%result = lshr i8 %value, 7 %result = lshr i8 %value, 7
ret i8 %result ret i8 %result
} }
define amdgpu_ps i8 @s_lshr_i8(i8 inreg %value, i8 inreg %amount) { define amdgpu_ps i8 @s_lshr_i8(i8 inreg %value, i8 inreg %amount) {
; GFX6-LABEL: s_lshr_i8: ; GFX6-LABEL: s_lshr_i8:
; GFX6: ; %bb.0: ; GFX6: ; %bb.0:
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; GFX6-NEXT: s_and_b32 s1, s1, s4 ; GFX6-NEXT: s_and_b32 s1, s1, s4
; GFX6-NEXT: s_and_b32 s0, s0, s4 ; GFX6-NEXT: s_and_b32 s0, s0, s4
; GFX6-NEXT: s_lshl_b32 s1, s1, 16 ; GFX6-NEXT: s_lshl_b32 s1, s1, 16
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_lshr_v2i16: ; GFX8-LABEL: s_lshr_v2i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_mov_b32 s3, 0xffff ; GFX8-NEXT: s_mov_b32 s3, 0xffff
; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_lshr_b32 s4, s1, 16 ; GFX8-NEXT: s_lshr_b32 s4, s1, 16
; GFX8-NEXT: s_and_b32 s0, s0, s3 ; GFX8-NEXT: s_and_b32 s0, s0, s3
; GFX8-NEXT: s_and_b32 s1, s1, s3 ; GFX8-NEXT: s_and_b32 s1, s1, s3
; GFX8-NEXT: s_and_b32 s2, s2, s3
; GFX8-NEXT: s_and_b32 s4, s4, s3
; GFX8-NEXT: s_lshr_b32 s0, s0, s1 ; GFX8-NEXT: s_lshr_b32 s0, s0, s1
; GFX8-NEXT: s_lshr_b32 s1, s2, s4 ; GFX8-NEXT: s_lshr_b32 s1, s2, s4
; GFX8-NEXT: s_lshl_b32 s1, s1, 16 ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_and_b32 s0, s0, s3 ; GFX8-NEXT: s_and_b32 s0, s0, s3
; GFX8-NEXT: s_or_b32 s0, s1, s0 ; GFX8-NEXT: s_or_b32 s0, s1, s0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX9-LABEL: s_lshr_v2i16: ; GFX9-LABEL: s_lshr_v2i16:
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; GFX6-NEXT: s_and_b32 s1, s2, s8 ; GFX6-NEXT: s_and_b32 s1, s2, s8
; GFX6-NEXT: s_and_b32 s2, s3, s8 ; GFX6-NEXT: s_and_b32 s2, s3, s8
; GFX6-NEXT: s_lshl_b32 s2, s2, 16 ; GFX6-NEXT: s_lshl_b32 s2, s2, 16
; GFX6-NEXT: s_or_b32 s1, s1, s2 ; GFX6-NEXT: s_or_b32 s1, s1, s2
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_lshr_v4i16: ; GFX8-LABEL: s_lshr_v4i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s4, s0, 16
; GFX8-NEXT: s_mov_b32 s6, 0xffff ; GFX8-NEXT: s_mov_b32 s6, 0xffff
; GFX8-NEXT: s_lshr_b32 s4, s0, 16
; GFX8-NEXT: s_lshr_b32 s7, s2, 16 ; GFX8-NEXT: s_lshr_b32 s7, s2, 16
; GFX8-NEXT: s_lshr_b32 s5, s1, 16
; GFX8-NEXT: s_lshr_b32 s8, s3, 16
; GFX8-NEXT: s_and_b32 s0, s0, s6 ; GFX8-NEXT: s_and_b32 s0, s0, s6
; GFX8-NEXT: s_and_b32 s2, s2, s6 ; GFX8-NEXT: s_and_b32 s2, s2, s6
; GFX8-NEXT: s_and_b32 s4, s4, s6
; GFX8-NEXT: s_and_b32 s7, s7, s6
; GFX8-NEXT: s_lshr_b32 s0, s0, s2 ; GFX8-NEXT: s_lshr_b32 s0, s0, s2
; GFX8-NEXT: s_lshr_b32 s2, s4, s7 ; GFX8-NEXT: s_lshr_b32 s2, s4, s7
; GFX8-NEXT: s_lshr_b32 s5, s1, 16
; GFX8-NEXT: s_lshr_b32 s8, s3, 16
; GFX8-NEXT: s_and_b32 s1, s1, s6 ; GFX8-NEXT: s_and_b32 s1, s1, s6
; GFX8-NEXT: s_and_b32 s3, s3, s6 ; GFX8-NEXT: s_and_b32 s3, s3, s6
; GFX8-NEXT: s_and_b32 s5, s5, s6
; GFX8-NEXT: s_and_b32 s8, s8, s6
; GFX8-NEXT: s_lshr_b32 s1, s1, s3 ; GFX8-NEXT: s_lshr_b32 s1, s1, s3
; GFX8-NEXT: s_lshr_b32 s3, s5, s8 ; GFX8-NEXT: s_lshr_b32 s3, s5, s8
; GFX8-NEXT: s_lshl_b32 s2, s2, 16 ; GFX8-NEXT: s_lshl_b32 s2, s2, 16
; GFX8-NEXT: s_and_b32 s0, s0, s6 ; GFX8-NEXT: s_and_b32 s0, s0, s6
; GFX8-NEXT: s_or_b32 s0, s2, s0 ; GFX8-NEXT: s_or_b32 s0, s2, s0
; GFX8-NEXT: s_lshl_b32 s2, s3, 16 ; GFX8-NEXT: s_lshl_b32 s2, s3, 16
; GFX8-NEXT: s_and_b32 s1, s1, s6 ; GFX8-NEXT: s_and_b32 s1, s1, s6
; GFX8-NEXT: s_or_b32 s1, s2, s1 ; GFX8-NEXT: s_or_b32 s1, s2, s1
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; GFX6-NEXT: s_or_b32 s2, s2, s3 ; GFX6-NEXT: s_or_b32 s2, s2, s3
; GFX6-NEXT: s_and_b32 s3, s6, s16 ; GFX6-NEXT: s_and_b32 s3, s6, s16
; GFX6-NEXT: s_lshl_b32 s4, s4, 16 ; GFX6-NEXT: s_lshl_b32 s4, s4, 16
; GFX6-NEXT: s_or_b32 s3, s3, s4 ; GFX6-NEXT: s_or_b32 s3, s3, s4
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_lshr_v8i16: ; GFX8-LABEL: s_lshr_v8i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s8, s0, 16
; GFX8-NEXT: s_mov_b32 s12, 0xffff ; GFX8-NEXT: s_mov_b32 s12, 0xffff
; GFX8-NEXT: s_lshr_b32 s8, s0, 16
; GFX8-NEXT: s_lshr_b32 s13, s4, 16 ; GFX8-NEXT: s_lshr_b32 s13, s4, 16
; GFX8-NEXT: s_lshr_b32 s9, s1, 16
; GFX8-NEXT: s_lshr_b32 s14, s5, 16
; GFX8-NEXT: s_and_b32 s0, s0, s12 ; GFX8-NEXT: s_and_b32 s0, s0, s12
; GFX8-NEXT: s_and_b32 s4, s4, s12 ; GFX8-NEXT: s_and_b32 s4, s4, s12
; GFX8-NEXT: s_and_b32 s8, s8, s12
; GFX8-NEXT: s_and_b32 s13, s13, s12
; GFX8-NEXT: s_lshr_b32 s10, s2, 16
; GFX8-NEXT: s_lshr_b32 s15, s6, 16
; GFX8-NEXT: s_lshr_b32 s0, s0, s4 ; GFX8-NEXT: s_lshr_b32 s0, s0, s4
; GFX8-NEXT: s_lshr_b32 s4, s8, s13 ; GFX8-NEXT: s_lshr_b32 s4, s8, s13
; GFX8-NEXT: s_lshr_b32 s9, s1, 16
; GFX8-NEXT: s_lshr_b32 s14, s5, 16
; GFX8-NEXT: s_and_b32 s1, s1, s12 ; GFX8-NEXT: s_and_b32 s1, s1, s12
; GFX8-NEXT: s_and_b32 s5, s5, s12 ; GFX8-NEXT: s_and_b32 s5, s5, s12
; GFX8-NEXT: s_and_b32 s9, s9, s12
; GFX8-NEXT: s_and_b32 s14, s14, s12
; GFX8-NEXT: s_lshr_b32 s11, s3, 16
; GFX8-NEXT: s_lshr_b32 s16, s7, 16
; GFX8-NEXT: s_lshr_b32 s1, s1, s5 ; GFX8-NEXT: s_lshr_b32 s1, s1, s5
; GFX8-NEXT: s_lshr_b32 s10, s2, 16
; GFX8-NEXT: s_lshr_b32 s15, s6, 16
; GFX8-NEXT: s_and_b32 s2, s2, s12 ; GFX8-NEXT: s_and_b32 s2, s2, s12
; GFX8-NEXT: s_and_b32 s6, s6, s12 ; GFX8-NEXT: s_and_b32 s6, s6, s12
; GFX8-NEXT: s_and_b32 s10, s10, s12
; GFX8-NEXT: s_and_b32 s15, s15, s12
; GFX8-NEXT: s_lshr_b32 s5, s9, s14 ; GFX8-NEXT: s_lshr_b32 s5, s9, s14
; GFX8-NEXT: s_lshl_b32 s4, s4, 16 ; GFX8-NEXT: s_lshl_b32 s4, s4, 16
; GFX8-NEXT: s_and_b32 s0, s0, s12 ; GFX8-NEXT: s_and_b32 s0, s0, s12
; GFX8-NEXT: s_lshr_b32 s2, s2, s6 ; GFX8-NEXT: s_lshr_b32 s2, s2, s6
; GFX8-NEXT: s_lshr_b32 s11, s3, 16
; GFX8-NEXT: s_lshr_b32 s16, s7, 16
; GFX8-NEXT: s_or_b32 s0, s4, s0 ; GFX8-NEXT: s_or_b32 s0, s4, s0
; GFX8-NEXT: s_and_b32 s3, s3, s12 ; GFX8-NEXT: s_and_b32 s3, s3, s12
; GFX8-NEXT: s_and_b32 s7, s7, s12 ; GFX8-NEXT: s_and_b32 s7, s7, s12
; GFX8-NEXT: s_and_b32 s11, s11, s12
; GFX8-NEXT: s_and_b32 s16, s16, s12
; GFX8-NEXT: s_lshr_b32 s6, s10, s15 ; GFX8-NEXT: s_lshr_b32 s6, s10, s15
; GFX8-NEXT: s_lshl_b32 s4, s5, 16 ; GFX8-NEXT: s_lshl_b32 s4, s5, 16
; GFX8-NEXT: s_and_b32 s1, s1, s12 ; GFX8-NEXT: s_and_b32 s1, s1, s12
; GFX8-NEXT: s_lshr_b32 s3, s3, s7 ; GFX8-NEXT: s_lshr_b32 s3, s3, s7
; GFX8-NEXT: s_or_b32 s1, s4, s1 ; GFX8-NEXT: s_or_b32 s1, s4, s1
; GFX8-NEXT: s_lshr_b32 s7, s11, s16 ; GFX8-NEXT: s_lshr_b32 s7, s11, s16
; GFX8-NEXT: s_lshl_b32 s4, s6, 16 ; GFX8-NEXT: s_lshl_b32 s4, s6, 16
; GFX8-NEXT: s_and_b32 s2, s2, s12 ; GFX8-NEXT: s_and_b32 s2, s2, s12
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llvm/test/CodeGen/AMDGPU/GlobalISel/postlegalizercombiner-and.mir

  • This file was added.
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn-amd-amdhsa -run-pass=amdgpu-postlegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
---
name: remove_and_255_zextload
legalized: true
tracksRegLiveness: true
body: |
bb.0:
liveins: $vgpr0_vgpr1
; CHECK-LABEL: name: remove_and_255_zextload
; CHECK: liveins: $vgpr0_vgpr1
; CHECK: %ptr:_(p1) = COPY $vgpr0_vgpr1
; CHECK: %load:_(s32) = G_ZEXTLOAD %ptr(p1) :: (load 1, addrspace 1)
; CHECK: $vgpr0 = COPY %load(s32)
%ptr:_(p1) = COPY $vgpr0_vgpr1
%load:_(s32) = G_ZEXTLOAD %ptr :: (load 1, addrspace 1, align 1)
%mask:_(s32) = G_CONSTANT i32 255
%and:_(s32) = G_AND %load, %mask
$vgpr0 = COPY %and
...

llvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll

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; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_mov_b32 s2, 0xffff ; GFX7-NEXT: s_mov_b32 s2, 0xffff
; GFX7-NEXT: s_lshl_b32 s1, s1, 16 ; GFX7-NEXT: s_lshl_b32 s1, s1, 16
; GFX7-NEXT: s_and_b32 s0, s0, s2 ; GFX7-NEXT: s_and_b32 s0, s0, s2
; GFX7-NEXT: s_or_b32 s0, s1, s0 ; GFX7-NEXT: s_or_b32 s0, s1, s0
; GFX7-NEXT: s_and_b32 s0, s0, 0x3fff3fff ; GFX7-NEXT: s_and_b32 s0, s0, 0x3fff3fff
; GFX7-NEXT: s_lshr_b32 s1, s0, 16 ; GFX7-NEXT: s_lshr_b32 s1, s0, 16
; GFX7-NEXT: s_and_b32 s0, s0, s2 ; GFX7-NEXT: s_and_b32 s0, s0, s2
; GFX7-NEXT: s_and_b32 s1, s1, s2
; GFX7-NEXT: s_lshl_b32 s0, s0, 2 ; GFX7-NEXT: s_lshl_b32 s0, s0, 2
; GFX7-NEXT: s_lshl_b32 s1, s1, 2 ; GFX7-NEXT: s_lshl_b32 s1, s1, 2
; GFX7-NEXT: ; return to shader part epilog ; GFX7-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_shl_v2i32_zext_v2i16: ; GFX8-LABEL: s_shl_v2i32_zext_v2i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_movk_i32 s2, 0x3fff ; GFX8-NEXT: s_movk_i32 s2, 0x3fff
; GFX8-NEXT: s_mov_b32 s4, 0xffff ; GFX8-NEXT: s_mov_b32 s4, 0xffff
; GFX8-NEXT: s_lshr_b32 s1, s0, 16 ; GFX8-NEXT: s_lshr_b32 s1, s0, 16
; GFX8-NEXT: s_mov_b32 s3, s2 ; GFX8-NEXT: s_mov_b32 s3, s2
; GFX8-NEXT: s_and_b32 s0, s0, s4 ; GFX8-NEXT: s_and_b32 s0, s0, s4
; GFX8-NEXT: s_and_b32 s1, s1, s4
; GFX8-NEXT: s_and_b64 s[0:1], s[0:1], s[2:3] ; GFX8-NEXT: s_and_b64 s[0:1], s[0:1], s[2:3]
; GFX8-NEXT: s_mov_b32 s5, s4 ; GFX8-NEXT: s_mov_b32 s5, s4
; GFX8-NEXT: s_and_b64 s[0:1], s[0:1], s[4:5] ; GFX8-NEXT: s_and_b64 s[0:1], s[0:1], s[4:5]
; GFX8-NEXT: s_lshl_b32 s0, s0, 2 ; GFX8-NEXT: s_lshl_b32 s0, s0, 2
; GFX8-NEXT: s_lshl_b32 s1, s1, 2 ; GFX8-NEXT: s_lshl_b32 s1, s1, 2
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX9-LABEL: s_shl_v2i32_zext_v2i16: ; GFX9-LABEL: s_shl_v2i32_zext_v2i16:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_and_b32 s0, s0, 0x3fff3fff ; GFX9-NEXT: s_and_b32 s0, s0, 0x3fff3fff
; GFX9-NEXT: s_lshr_b32 s1, s0, 16 ; GFX9-NEXT: s_lshr_b32 s1, s0, 16
; GFX9-NEXT: s_mov_b32 s2, 0xffff ; GFX9-NEXT: s_and_b32 s0, s0, 0xffff
; GFX9-NEXT: s_and_b32 s0, s0, s2
; GFX9-NEXT: s_and_b32 s1, s1, s2
; GFX9-NEXT: s_lshl_b32 s0, s0, 2 ; GFX9-NEXT: s_lshl_b32 s0, s0, 2
; GFX9-NEXT: s_lshl_b32 s1, s1, 2 ; GFX9-NEXT: s_lshl_b32 s1, s1, 2
; GFX9-NEXT: ; return to shader part epilog ; GFX9-NEXT: ; return to shader part epilog
%and = and <2 x i16> %x, <i16 16383, i16 16383> %and = and <2 x i16> %x, <i16 16383, i16 16383>
%ext = zext <2 x i16> %and to <2 x i32> %ext = zext <2 x i16> %and to <2 x i32>
%shl = shl <2 x i32> %ext, <i32 2, i32 2> %shl = shl <2 x i32> %ext, <i32 2, i32 2>
ret <2 x i32> %shl ret <2 x i32> %shl
} }
; FIXME: This doesn't do what we want. The pre-legalizer combiner ; FIXME: This doesn't do what we want. The pre-legalizer combiner
; fails to handle the vector splat. The post-legalizer sees the zext ; fails to handle the vector splat. The post-legalizer sees the zext
; legalized into the and. This is probably not that important, since ; legalized into the and. This is probably not that important, since
; we really do this combine in the machine level for lowered ; we really do this combine in the machine level for lowered
; getelementptrs. ; getelementptrs.
define <2 x i32> @v_shl_v2i32_zext_v2i16(<2 x i16> %x) { define <2 x i32> @v_shl_v2i32_zext_v2i16(<2 x i16> %x) {
; GFX7-LABEL: v_shl_v2i32_zext_v2i16: ; GFX7-LABEL: v_shl_v2i32_zext_v2i16:
; GFX7: ; %bb.0: ; GFX7: ; %bb.0:
; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX7-NEXT: v_mov_b32_e32 v2, 0xffff
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX7-NEXT: v_and_b32_e32 v0, 0xffff, v0 ; GFX7-NEXT: v_and_b32_e32 v0, v0, v2
; GFX7-NEXT: v_or_b32_e32 v0, v1, v0 ; GFX7-NEXT: v_or_b32_e32 v0, v1, v0
; GFX7-NEXT: v_and_b32_e32 v0, 0x3fff3fff, v0 ; GFX7-NEXT: v_and_b32_e32 v0, 0x3fff3fff, v0
; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v0 ; GFX7-NEXT: v_lshrrev_b32_e32 v1, 16, v0
; GFX7-NEXT: s_mov_b32 s4, 0xffff ; GFX7-NEXT: v_and_b32_e32 v0, v0, v2
; GFX7-NEXT: v_and_b32_e32 v0, s4, v0
; GFX7-NEXT: v_and_b32_e32 v1, s4, v1
; GFX7-NEXT: v_lshlrev_b32_e32 v0, 2, v0 ; GFX7-NEXT: v_lshlrev_b32_e32 v0, 2, v0
; GFX7-NEXT: v_lshlrev_b32_e32 v1, 2, v1 ; GFX7-NEXT: v_lshlrev_b32_e32 v1, 2, v1
; GFX7-NEXT: s_setpc_b64 s[30:31] ; GFX7-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: v_shl_v2i32_zext_v2i16: ; GFX8-LABEL: v_shl_v2i32_zext_v2i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: s_mov_b32 s4, 0xffff ; GFX8-NEXT: v_and_b32_e32 v1, 0x3fff3fff, v0
; GFX8-NEXT: v_and_b32_e32 v0, 0x3fff3fff, v0
; GFX8-NEXT: v_mov_b32_e32 v1, s4
; GFX8-NEXT: v_and_b32_sdwa v1, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX8-NEXT: v_mov_b32_e32 v2, 2 ; GFX8-NEXT: v_mov_b32_e32 v2, 2
; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v2, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; GFX8-NEXT: v_lshlrev_b32_sdwa v0, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX8-NEXT: v_lshlrev_b32_e32 v1, 2, v1 ; GFX8-NEXT: v_lshlrev_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX9-LABEL: v_shl_v2i32_zext_v2i16: ; GFX9-LABEL: v_shl_v2i32_zext_v2i16:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_and_b32_e32 v0, 0x3fff3fff, v0
; GFX9-NEXT: s_mov_b32 s5, 0xffff
; GFX9-NEXT: v_and_b32_sdwa v1, v0, s5 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:DWORD
; GFX9-NEXT: s_mov_b32 s4, 2 ; GFX9-NEXT: s_mov_b32 s4, 2
; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0 ; GFX9-NEXT: v_and_b32_e32 v1, 0x3fff3fff, v0
; GFX9-NEXT: v_lshlrev_b32_e32 v1, 2, v1 ; GFX9-NEXT: v_lshlrev_b32_sdwa v0, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_0
; GFX9-NEXT: v_lshlrev_b32_sdwa v1, s4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:WORD_1
; GFX9-NEXT: s_setpc_b64 s[30:31] ; GFX9-NEXT: s_setpc_b64 s[30:31]
%and = and <2 x i16> %x, <i16 16383, i16 16383> %and = and <2 x i16> %x, <i16 16383, i16 16383>
%ext = zext <2 x i16> %and to <2 x i32> %ext = zext <2 x i16> %and to <2 x i32>
%shl = shl <2 x i32> %ext, <i32 2, i32 2> %shl = shl <2 x i32> %ext, <i32 2, i32 2>
ret <2 x i32> %shl ret <2 x i32> %shl
} }
declare i32 @llvm.amdgcn.workitem.id.x() #0 declare i32 @llvm.amdgcn.workitem.id.x() #0
attributes #0 = { nounwind readnone speculatable willreturn } attributes #0 = { nounwind readnone speculatable willreturn }

llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll

Show First 20 Lines • Show All 545 Lines • ▼ Show 20 Lines
; GFX6-NEXT: s_and_b32 s1, s1, s4 ; GFX6-NEXT: s_and_b32 s1, s1, s4
; GFX6-NEXT: s_and_b32 s0, s0, s4 ; GFX6-NEXT: s_and_b32 s0, s0, s4
; GFX6-NEXT: s_lshl_b32 s1, s1, 16 ; GFX6-NEXT: s_lshl_b32 s1, s1, 16
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_shl_v2i16: ; GFX8-LABEL: s_shl_v2i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_mov_b32 s3, 0xffff ; GFX8-NEXT: s_mov_b32 s3, 0xffff
; GFX8-NEXT: s_lshr_b32 s2, s0, 16
; GFX8-NEXT: s_lshr_b32 s4, s1, 16 ; GFX8-NEXT: s_lshr_b32 s4, s1, 16
; GFX8-NEXT: s_and_b32 s0, s0, s3 ; GFX8-NEXT: s_and_b32 s0, s0, s3
; GFX8-NEXT: s_and_b32 s1, s1, s3 ; GFX8-NEXT: s_and_b32 s1, s1, s3
; GFX8-NEXT: s_and_b32 s2, s2, s3
; GFX8-NEXT: s_and_b32 s4, s4, s3
; GFX8-NEXT: s_lshl_b32 s0, s0, s1 ; GFX8-NEXT: s_lshl_b32 s0, s0, s1
; GFX8-NEXT: s_lshl_b32 s1, s2, s4 ; GFX8-NEXT: s_lshl_b32 s1, s2, s4
; GFX8-NEXT: s_lshl_b32 s1, s1, 16 ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_and_b32 s0, s0, s3 ; GFX8-NEXT: s_and_b32 s0, s0, s3
; GFX8-NEXT: s_or_b32 s0, s1, s0 ; GFX8-NEXT: s_or_b32 s0, s1, s0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX9-LABEL: s_shl_v2i16: ; GFX9-LABEL: s_shl_v2i16:
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; GFX6-NEXT: s_and_b32 s1, s2, s8 ; GFX6-NEXT: s_and_b32 s1, s2, s8
; GFX6-NEXT: s_and_b32 s2, s3, s8 ; GFX6-NEXT: s_and_b32 s2, s3, s8
; GFX6-NEXT: s_lshl_b32 s2, s2, 16 ; GFX6-NEXT: s_lshl_b32 s2, s2, 16
; GFX6-NEXT: s_or_b32 s1, s1, s2 ; GFX6-NEXT: s_or_b32 s1, s1, s2
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_shl_v4i16: ; GFX8-LABEL: s_shl_v4i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s4, s0, 16
; GFX8-NEXT: s_mov_b32 s6, 0xffff ; GFX8-NEXT: s_mov_b32 s6, 0xffff
; GFX8-NEXT: s_lshr_b32 s4, s0, 16
; GFX8-NEXT: s_lshr_b32 s7, s2, 16 ; GFX8-NEXT: s_lshr_b32 s7, s2, 16
; GFX8-NEXT: s_lshr_b32 s5, s1, 16
; GFX8-NEXT: s_lshr_b32 s8, s3, 16
; GFX8-NEXT: s_and_b32 s0, s0, s6 ; GFX8-NEXT: s_and_b32 s0, s0, s6
; GFX8-NEXT: s_and_b32 s2, s2, s6 ; GFX8-NEXT: s_and_b32 s2, s2, s6
; GFX8-NEXT: s_and_b32 s4, s4, s6
; GFX8-NEXT: s_and_b32 s7, s7, s6
; GFX8-NEXT: s_lshl_b32 s0, s0, s2 ; GFX8-NEXT: s_lshl_b32 s0, s0, s2
; GFX8-NEXT: s_lshl_b32 s2, s4, s7 ; GFX8-NEXT: s_lshl_b32 s2, s4, s7
; GFX8-NEXT: s_lshr_b32 s5, s1, 16
; GFX8-NEXT: s_lshr_b32 s8, s3, 16
; GFX8-NEXT: s_and_b32 s1, s1, s6 ; GFX8-NEXT: s_and_b32 s1, s1, s6
; GFX8-NEXT: s_and_b32 s3, s3, s6 ; GFX8-NEXT: s_and_b32 s3, s3, s6
; GFX8-NEXT: s_and_b32 s5, s5, s6
; GFX8-NEXT: s_and_b32 s8, s8, s6
; GFX8-NEXT: s_lshl_b32 s1, s1, s3 ; GFX8-NEXT: s_lshl_b32 s1, s1, s3
; GFX8-NEXT: s_lshl_b32 s3, s5, s8 ; GFX8-NEXT: s_lshl_b32 s3, s5, s8
; GFX8-NEXT: s_lshl_b32 s2, s2, 16 ; GFX8-NEXT: s_lshl_b32 s2, s2, 16
; GFX8-NEXT: s_and_b32 s0, s0, s6 ; GFX8-NEXT: s_and_b32 s0, s0, s6
; GFX8-NEXT: s_or_b32 s0, s2, s0 ; GFX8-NEXT: s_or_b32 s0, s2, s0
; GFX8-NEXT: s_lshl_b32 s2, s3, 16 ; GFX8-NEXT: s_lshl_b32 s2, s3, 16
; GFX8-NEXT: s_and_b32 s1, s1, s6 ; GFX8-NEXT: s_and_b32 s1, s1, s6
; GFX8-NEXT: s_or_b32 s1, s2, s1 ; GFX8-NEXT: s_or_b32 s1, s2, s1
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; GFX6-NEXT: s_or_b32 s2, s2, s3 ; GFX6-NEXT: s_or_b32 s2, s2, s3
; GFX6-NEXT: s_and_b32 s3, s6, s16 ; GFX6-NEXT: s_and_b32 s3, s6, s16
; GFX6-NEXT: s_lshl_b32 s4, s4, 16 ; GFX6-NEXT: s_lshl_b32 s4, s4, 16
; GFX6-NEXT: s_or_b32 s3, s3, s4 ; GFX6-NEXT: s_or_b32 s3, s3, s4
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_shl_v8i16: ; GFX8-LABEL: s_shl_v8i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s8, s0, 16
; GFX8-NEXT: s_mov_b32 s12, 0xffff ; GFX8-NEXT: s_mov_b32 s12, 0xffff
; GFX8-NEXT: s_lshr_b32 s8, s0, 16
; GFX8-NEXT: s_lshr_b32 s13, s4, 16 ; GFX8-NEXT: s_lshr_b32 s13, s4, 16
; GFX8-NEXT: s_lshr_b32 s9, s1, 16
; GFX8-NEXT: s_lshr_b32 s14, s5, 16
; GFX8-NEXT: s_and_b32 s0, s0, s12 ; GFX8-NEXT: s_and_b32 s0, s0, s12
; GFX8-NEXT: s_and_b32 s4, s4, s12 ; GFX8-NEXT: s_and_b32 s4, s4, s12
; GFX8-NEXT: s_and_b32 s8, s8, s12
; GFX8-NEXT: s_and_b32 s13, s13, s12
; GFX8-NEXT: s_lshr_b32 s10, s2, 16
; GFX8-NEXT: s_lshr_b32 s15, s6, 16
; GFX8-NEXT: s_lshl_b32 s0, s0, s4 ; GFX8-NEXT: s_lshl_b32 s0, s0, s4
; GFX8-NEXT: s_lshl_b32 s4, s8, s13 ; GFX8-NEXT: s_lshl_b32 s4, s8, s13
; GFX8-NEXT: s_lshr_b32 s9, s1, 16
; GFX8-NEXT: s_lshr_b32 s14, s5, 16
; GFX8-NEXT: s_and_b32 s1, s1, s12 ; GFX8-NEXT: s_and_b32 s1, s1, s12
; GFX8-NEXT: s_and_b32 s5, s5, s12 ; GFX8-NEXT: s_and_b32 s5, s5, s12
; GFX8-NEXT: s_and_b32 s9, s9, s12
; GFX8-NEXT: s_and_b32 s14, s14, s12
; GFX8-NEXT: s_lshr_b32 s11, s3, 16
; GFX8-NEXT: s_lshr_b32 s16, s7, 16
; GFX8-NEXT: s_lshl_b32 s1, s1, s5 ; GFX8-NEXT: s_lshl_b32 s1, s1, s5
; GFX8-NEXT: s_lshr_b32 s10, s2, 16
; GFX8-NEXT: s_lshr_b32 s15, s6, 16
; GFX8-NEXT: s_and_b32 s2, s2, s12 ; GFX8-NEXT: s_and_b32 s2, s2, s12
; GFX8-NEXT: s_and_b32 s6, s6, s12 ; GFX8-NEXT: s_and_b32 s6, s6, s12
; GFX8-NEXT: s_and_b32 s10, s10, s12
; GFX8-NEXT: s_and_b32 s15, s15, s12
; GFX8-NEXT: s_lshl_b32 s5, s9, s14 ; GFX8-NEXT: s_lshl_b32 s5, s9, s14
; GFX8-NEXT: s_lshl_b32 s4, s4, 16 ; GFX8-NEXT: s_lshl_b32 s4, s4, 16
; GFX8-NEXT: s_and_b32 s0, s0, s12 ; GFX8-NEXT: s_and_b32 s0, s0, s12
; GFX8-NEXT: s_lshl_b32 s2, s2, s6 ; GFX8-NEXT: s_lshl_b32 s2, s2, s6
; GFX8-NEXT: s_lshr_b32 s11, s3, 16
; GFX8-NEXT: s_lshr_b32 s16, s7, 16
; GFX8-NEXT: s_or_b32 s0, s4, s0 ; GFX8-NEXT: s_or_b32 s0, s4, s0
; GFX8-NEXT: s_and_b32 s3, s3, s12 ; GFX8-NEXT: s_and_b32 s3, s3, s12
; GFX8-NEXT: s_and_b32 s7, s7, s12 ; GFX8-NEXT: s_and_b32 s7, s7, s12
; GFX8-NEXT: s_and_b32 s11, s11, s12
; GFX8-NEXT: s_and_b32 s16, s16, s12
; GFX8-NEXT: s_lshl_b32 s6, s10, s15 ; GFX8-NEXT: s_lshl_b32 s6, s10, s15
; GFX8-NEXT: s_lshl_b32 s4, s5, 16 ; GFX8-NEXT: s_lshl_b32 s4, s5, 16
; GFX8-NEXT: s_and_b32 s1, s1, s12 ; GFX8-NEXT: s_and_b32 s1, s1, s12
; GFX8-NEXT: s_lshl_b32 s3, s3, s7 ; GFX8-NEXT: s_lshl_b32 s3, s3, s7
; GFX8-NEXT: s_or_b32 s1, s4, s1 ; GFX8-NEXT: s_or_b32 s1, s4, s1
; GFX8-NEXT: s_lshl_b32 s7, s11, s16 ; GFX8-NEXT: s_lshl_b32 s7, s11, s16
; GFX8-NEXT: s_lshl_b32 s4, s6, 16 ; GFX8-NEXT: s_lshl_b32 s4, s6, 16
; GFX8-NEXT: s_and_b32 s2, s2, s12 ; GFX8-NEXT: s_and_b32 s2, s2, s12
▲ Show 20 Lines • Show All 258 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll

Show First 20 Lines • Show All 199 Lines • ▼ Show 20 Lines
; GFX6-NEXT: v_min_u32_e32 v1, v4, v1 ; GFX6-NEXT: v_min_u32_e32 v1, v4, v1
; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v1 ; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v1
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 24, v2 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX6-NEXT: v_lshlrev_b32_e32 v2, 24, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v2, 24, v3
; GFX6-NEXT: v_xor_b32_e32 v3, -1, v1 ; GFX6-NEXT: v_xor_b32_e32 v3, -1, v1
; GFX6-NEXT: v_min_u32_e32 v2, v3, v2 ; GFX6-NEXT: v_min_u32_e32 v2, v3, v2
; GFX6-NEXT: v_add_i32_e32 v1, vcc, v1, v2 ; GFX6-NEXT: v_add_i32_e32 v1, vcc, v1, v2
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 24, v1 ; GFX6-NEXT: v_lshrrev_b32_e32 v1, 24, v1
; GFX6-NEXT: v_mov_b32_e32 v2, 0xff
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX6-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX6-NEXT: v_and_b32_e32 v1, v1, v2
; GFX6-NEXT: v_and_b32_e32 v0, v0, v2
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: s_setpc_b64 s[30:31] ; GFX6-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: v_uaddsat_v2i8: ; GFX8-LABEL: v_uaddsat_v2i8:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v2, 8 ; GFX8-NEXT: v_mov_b32_e32 v2, 8
; GFX8-NEXT: v_lshrrev_b32_sdwa v3, v2, v0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_sdwa v3, v2, v0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX8-NEXT: v_lshrrev_b32_sdwa v2, v2, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_sdwa v2, v2, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b16_e32 v0, 8, v0 ; GFX8-NEXT: v_lshlrev_b16_e32 v0, 8, v0
; GFX8-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; GFX8-NEXT: v_lshlrev_b16_e32 v1, 8, v1
; GFX8-NEXT: v_add_u16_e64 v0, v0, v1 clamp ; GFX8-NEXT: v_add_u16_e64 v0, v0, v1 clamp
; GFX8-NEXT: v_add_u16_e64 v1, v3, v2 clamp ; GFX8-NEXT: v_add_u16_e64 v1, v3, v2 clamp
; GFX8-NEXT: v_mov_b32_e32 v2, 0xff ; GFX8-NEXT: v_lshrrev_b16_e32 v1, 8, v1
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b16_e32 v1, 8, v1
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX9-LABEL: v_uaddsat_v2i8: ; GFX9-LABEL: v_uaddsat_v2i8:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: v_lshrrev_b32_sdwa v2, s4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_sdwa v2, s4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_lshrrev_b32_sdwa v3, s4, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_sdwa v3, s4, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
▲ Show 20 Lines • Show All 48 Lines • ▼ Show 20 Lines
; GFX6-NEXT: s_add_i32 s0, s0, s1 ; GFX6-NEXT: s_add_i32 s0, s0, s1
; GFX6-NEXT: s_lshl_b32 s1, s2, 24 ; GFX6-NEXT: s_lshl_b32 s1, s2, 24
; GFX6-NEXT: s_lshl_b32 s2, s3, 24 ; GFX6-NEXT: s_lshl_b32 s2, s3, 24
; GFX6-NEXT: s_lshr_b32 s0, s0, 24 ; GFX6-NEXT: s_lshr_b32 s0, s0, 24
; GFX6-NEXT: s_not_b32 s3, s1 ; GFX6-NEXT: s_not_b32 s3, s1
; GFX6-NEXT: s_cmp_lt_u32 s3, s2 ; GFX6-NEXT: s_cmp_lt_u32 s3, s2
; GFX6-NEXT: s_cselect_b32 s2, s3, s2 ; GFX6-NEXT: s_cselect_b32 s2, s3, s2
; GFX6-NEXT: s_add_i32 s1, s1, s2 ; GFX6-NEXT: s_add_i32 s1, s1, s2
; GFX6-NEXT: s_movk_i32 s2, 0xff
; GFX6-NEXT: s_lshr_b32 s1, s1, 24 ; GFX6-NEXT: s_lshr_b32 s1, s1, 24
; GFX6-NEXT: s_and_b32 s1, s1, s2
; GFX6-NEXT: s_and_b32 s0, s0, s2
; GFX6-NEXT: s_lshl_b32 s1, s1, 8 ; GFX6-NEXT: s_lshl_b32 s1, s1, 8
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_uaddsat_v2i8: ; GFX8-LABEL: s_uaddsat_v2i8:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_bfe_u32 s4, 8, 0x100000 ; GFX8-NEXT: s_bfe_u32 s4, 8, 0x100000
; GFX8-NEXT: s_lshr_b32 s3, s1, 8 ; GFX8-NEXT: s_lshr_b32 s3, s1, 8
; GFX8-NEXT: s_lshl_b32 s1, s1, s4 ; GFX8-NEXT: s_lshl_b32 s1, s1, s4
; GFX8-NEXT: s_lshr_b32 s2, s0, 8 ; GFX8-NEXT: s_lshr_b32 s2, s0, 8
; GFX8-NEXT: v_mov_b32_e32 v0, s1 ; GFX8-NEXT: v_mov_b32_e32 v0, s1
; GFX8-NEXT: s_lshl_b32 s0, s0, s4 ; GFX8-NEXT: s_lshl_b32 s0, s0, s4
; GFX8-NEXT: s_lshl_b32 s1, s3, s4 ; GFX8-NEXT: s_lshl_b32 s1, s3, s4
; GFX8-NEXT: v_add_u16_e64 v0, s0, v0 clamp ; GFX8-NEXT: v_add_u16_e64 v0, s0, v0 clamp
; GFX8-NEXT: s_lshl_b32 s0, s2, s4 ; GFX8-NEXT: s_lshl_b32 s0, s2, s4
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_mov_b32_e32 v2, 0xff
; GFX8-NEXT: v_add_u16_e64 v1, s0, v1 clamp ; GFX8-NEXT: v_add_u16_e64 v1, s0, v1 clamp
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b16_e32 v1, 8, v1
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b16_e32 v1, 8, v1
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX8-NEXT: v_readfirstlane_b32 s0, v0 ; GFX8-NEXT: v_readfirstlane_b32 s0, v0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX9-LABEL: s_uaddsat_v2i8: ; GFX9-LABEL: s_uaddsat_v2i8:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_lshr_b32 s2, s0, 8 ; GFX9-NEXT: s_lshr_b32 s2, s0, 8
; GFX9-NEXT: s_lshr_b32 s3, s1, 8 ; GFX9-NEXT: s_lshr_b32 s3, s1, 8
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s2 ; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s2
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; GFX6-NEXT: v_min_u32_e32 v2, v5, v2 ; GFX6-NEXT: v_min_u32_e32 v2, v5, v2
; GFX6-NEXT: v_add_i32_e32 v1, vcc, v1, v2 ; GFX6-NEXT: v_add_i32_e32 v1, vcc, v1, v2
; GFX6-NEXT: v_lshlrev_b32_e32 v2, 24, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v2, 24, v3
; GFX6-NEXT: v_lshlrev_b32_e32 v3, 24, v6 ; GFX6-NEXT: v_lshlrev_b32_e32 v3, 24, v6
; GFX6-NEXT: v_xor_b32_e32 v5, -1, v2 ; GFX6-NEXT: v_xor_b32_e32 v5, -1, v2
; GFX6-NEXT: v_min_u32_e32 v3, v5, v3 ; GFX6-NEXT: v_min_u32_e32 v3, v5, v3
; GFX6-NEXT: v_add_i32_e32 v2, vcc, v2, v3 ; GFX6-NEXT: v_add_i32_e32 v2, vcc, v2, v3
; GFX6-NEXT: v_lshlrev_b32_e32 v3, 24, v4 ; GFX6-NEXT: v_lshlrev_b32_e32 v3, 24, v4
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 24, v1
; GFX6-NEXT: s_movk_i32 s4, 0xff
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX6-NEXT: v_and_b32_e32 v1, s4, v1
; GFX6-NEXT: v_lshlrev_b32_e32 v4, 24, v7 ; GFX6-NEXT: v_lshlrev_b32_e32 v4, 24, v7
; GFX6-NEXT: v_xor_b32_e32 v5, -1, v3 ; GFX6-NEXT: v_xor_b32_e32 v5, -1, v3
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 24, v1
; GFX6-NEXT: v_min_u32_e32 v4, v5, v4 ; GFX6-NEXT: v_min_u32_e32 v4, v5, v4
; GFX6-NEXT: v_lshrrev_b32_e32 v2, 24, v2
; GFX6-NEXT: v_and_b32_e32 v0, s4, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX6-NEXT: v_add_i32_e32 v3, vcc, v3, v4 ; GFX6-NEXT: v_add_i32_e32 v3, vcc, v3, v4
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX6-NEXT: v_lshrrev_b32_e32 v2, 24, v2
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: v_and_b32_e32 v1, s4, v2 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v2
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_lshrrev_b32_e32 v3, 24, v3 ; GFX6-NEXT: v_lshrrev_b32_e32 v3, 24, v3
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: v_and_b32_e32 v1, s4, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: s_setpc_b64 s[30:31] ; GFX6-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: v_uaddsat_v4i8: ; GFX8-LABEL: v_uaddsat_v4i8:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v2, 8 ; GFX8-NEXT: v_mov_b32_e32 v2, 8
; GFX8-NEXT: v_lshrrev_b32_sdwa v3, v2, v0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_sdwa v3, v2, v0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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; GFX6-NEXT: s_add_i32 s2, s2, s3 ; GFX6-NEXT: s_add_i32 s2, s2, s3
; GFX6-NEXT: s_lshl_b32 s3, s4, 24 ; GFX6-NEXT: s_lshl_b32 s3, s4, 24
; GFX6-NEXT: s_lshr_b32 s2, s2, 24 ; GFX6-NEXT: s_lshr_b32 s2, s2, 24
; GFX6-NEXT: s_lshl_b32 s4, s7, 24 ; GFX6-NEXT: s_lshl_b32 s4, s7, 24
; GFX6-NEXT: s_not_b32 s5, s3 ; GFX6-NEXT: s_not_b32 s5, s3
; GFX6-NEXT: s_cmp_lt_u32 s5, s4 ; GFX6-NEXT: s_cmp_lt_u32 s5, s4
; GFX6-NEXT: s_cselect_b32 s4, s5, s4 ; GFX6-NEXT: s_cselect_b32 s4, s5, s4
; GFX6-NEXT: s_add_i32 s3, s3, s4 ; GFX6-NEXT: s_add_i32 s3, s3, s4
; GFX6-NEXT: s_movk_i32 s4, 0xff
; GFX6-NEXT: s_and_b32 s1, s1, s4
; GFX6-NEXT: s_and_b32 s0, s0, s4
; GFX6-NEXT: s_lshl_b32 s1, s1, 8 ; GFX6-NEXT: s_lshl_b32 s1, s1, 8
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: s_and_b32 s1, s2, s4 ; GFX6-NEXT: s_lshl_b32 s1, s2, 16
; GFX6-NEXT: s_lshl_b32 s1, s1, 16
; GFX6-NEXT: s_lshr_b32 s3, s3, 24 ; GFX6-NEXT: s_lshr_b32 s3, s3, 24
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: s_and_b32 s1, s3, s4 ; GFX6-NEXT: s_lshl_b32 s1, s3, 24
; GFX6-NEXT: s_lshl_b32 s1, s1, 24
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_uaddsat_v4i8: ; GFX8-LABEL: s_uaddsat_v4i8:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_bfe_u32 s8, 8, 0x100000 ; GFX8-NEXT: s_bfe_u32 s8, 8, 0x100000
; GFX8-NEXT: s_lshr_b32 s5, s1, 8 ; GFX8-NEXT: s_lshr_b32 s5, s1, 8
; GFX8-NEXT: s_lshr_b32 s6, s1, 16 ; GFX8-NEXT: s_lshr_b32 s6, s1, 16
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; GFX6-NEXT: s_add_i32 s0, s0, s2 ; GFX6-NEXT: s_add_i32 s0, s0, s2
; GFX6-NEXT: s_lshl_b32 s1, s1, 16 ; GFX6-NEXT: s_lshl_b32 s1, s1, 16
; GFX6-NEXT: s_lshl_b32 s2, s3, 16 ; GFX6-NEXT: s_lshl_b32 s2, s3, 16
; GFX6-NEXT: s_lshr_b32 s0, s0, 16 ; GFX6-NEXT: s_lshr_b32 s0, s0, 16
; GFX6-NEXT: s_not_b32 s3, s1 ; GFX6-NEXT: s_not_b32 s3, s1
; GFX6-NEXT: s_cmp_lt_u32 s3, s2 ; GFX6-NEXT: s_cmp_lt_u32 s3, s2
; GFX6-NEXT: s_cselect_b32 s2, s3, s2 ; GFX6-NEXT: s_cselect_b32 s2, s3, s2
; GFX6-NEXT: s_add_i32 s1, s1, s2 ; GFX6-NEXT: s_add_i32 s1, s1, s2
; GFX6-NEXT: s_mov_b32 s2, 0xffff
; GFX6-NEXT: s_lshr_b32 s1, s1, 16 ; GFX6-NEXT: s_lshr_b32 s1, s1, 16
; GFX6-NEXT: s_and_b32 s1, s1, s2
; GFX6-NEXT: s_and_b32 s0, s0, s2
; GFX6-NEXT: s_lshl_b32 s1, s1, 16 ; GFX6-NEXT: s_lshl_b32 s1, s1, 16
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_uaddsat_v2i16: ; GFX8-LABEL: s_uaddsat_v2i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s3, s1, 16 ; GFX8-NEXT: s_lshr_b32 s3, s1, 16
; GFX8-NEXT: s_lshr_b32 s2, s0, 16 ; GFX8-NEXT: s_lshr_b32 s2, s0, 16
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; GFX6-NEXT: v_min_u32_e32 v0, s2, v0 ; GFX6-NEXT: v_min_u32_e32 v0, s2, v0
; GFX6-NEXT: v_add_i32_e32 v0, vcc, s0, v0 ; GFX6-NEXT: v_add_i32_e32 v0, vcc, s0, v0
; GFX6-NEXT: s_lshl_b32 s0, s1, 16 ; GFX6-NEXT: s_lshl_b32 s0, s1, 16
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: s_not_b32 s1, s0 ; GFX6-NEXT: s_not_b32 s1, s0
; GFX6-NEXT: v_min_u32_e32 v1, s1, v1 ; GFX6-NEXT: v_min_u32_e32 v1, s1, v1
; GFX6-NEXT: v_add_i32_e32 v1, vcc, s0, v1 ; GFX6-NEXT: v_add_i32_e32 v1, vcc, s0, v1
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX6-NEXT: s_mov_b32 s0, 0xffff
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX6-NEXT: v_and_b32_e32 v1, s0, v1
; GFX6-NEXT: v_and_b32_e32 v0, s0, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: uaddsat_v2i16_sv: ; GFX8-LABEL: uaddsat_v2i16_sv:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s1, s0, 16 ; GFX8-NEXT: s_lshr_b32 s1, s0, 16
; GFX8-NEXT: v_mov_b32_e32 v2, s1 ; GFX8-NEXT: v_mov_b32_e32 v2, s1
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; GFX6-NEXT: v_min_u32_e32 v2, s0, v2 ; GFX6-NEXT: v_min_u32_e32 v2, s0, v2
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v2 ; GFX6-NEXT: v_add_i32_e32 v0, vcc, v0, v2
; GFX6-NEXT: s_lshl_b32 s0, s1, 16 ; GFX6-NEXT: s_lshl_b32 s0, s1, 16
; GFX6-NEXT: v_xor_b32_e32 v2, -1, v1 ; GFX6-NEXT: v_xor_b32_e32 v2, -1, v1
; GFX6-NEXT: v_min_u32_e32 v2, s0, v2 ; GFX6-NEXT: v_min_u32_e32 v2, s0, v2
; GFX6-NEXT: v_add_i32_e32 v1, vcc, v1, v2 ; GFX6-NEXT: v_add_i32_e32 v1, vcc, v1, v2
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX6-NEXT: s_mov_b32 s0, 0xffff
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX6-NEXT: v_and_b32_e32 v1, s0, v1
; GFX6-NEXT: v_and_b32_e32 v0, s0, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: uaddsat_v2i16_vs: ; GFX8-LABEL: uaddsat_v2i16_vs:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s1, s0, 16 ; GFX8-NEXT: s_lshr_b32 s1, s0, 16
; GFX8-NEXT: v_mov_b32_e32 v2, s1 ; GFX8-NEXT: v_mov_b32_e32 v2, s1
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; GFX6-NEXT: v_xor_b32_e32 v5, -1, v2 ; GFX6-NEXT: v_xor_b32_e32 v5, -1, v2
; GFX6-NEXT: v_min_u32_e32 v4, v5, v4 ; GFX6-NEXT: v_min_u32_e32 v4, v5, v4
; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_add_i32_e32 v2, vcc, v2, v4 ; GFX6-NEXT: v_add_i32_e32 v2, vcc, v2, v4
; GFX6-NEXT: v_lshlrev_b32_e32 v4, 16, v7 ; GFX6-NEXT: v_lshlrev_b32_e32 v4, 16, v7
; GFX6-NEXT: v_xor_b32_e32 v5, -1, v3 ; GFX6-NEXT: v_xor_b32_e32 v5, -1, v3
; GFX6-NEXT: v_min_u32_e32 v4, v5, v4 ; GFX6-NEXT: v_min_u32_e32 v4, v5, v4
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX6-NEXT: s_mov_b32 s4, 0xffff
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX6-NEXT: v_add_i32_e32 v3, vcc, v3, v4 ; GFX6-NEXT: v_add_i32_e32 v3, vcc, v3, v4
; GFX6-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX6-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX6-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_and_b32_e32 v0, s4, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: v_and_b32_e32 v1, s4, v2 ; GFX6-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX6-NEXT: v_and_b32_e32 v2, s4, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v3
; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX6-NEXT: v_or_b32_e32 v1, v2, v1
; GFX6-NEXT: v_or_b32_e32 v1, v1, v2
; GFX6-NEXT: s_setpc_b64 s[30:31] ; GFX6-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: v_uaddsat_v4i16: ; GFX8-LABEL: v_uaddsat_v4i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_add_u16_e64 v4, v0, v2 clamp ; GFX8-NEXT: v_add_u16_e64 v4, v0, v2 clamp
; GFX8-NEXT: v_add_u16_sdwa v0, v0, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; GFX8-NEXT: v_add_u16_sdwa v0, v0, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-NEXT: v_add_u16_e64 v2, v1, v3 clamp ; GFX8-NEXT: v_add_u16_e64 v2, v1, v3 clamp
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; GFX6-NEXT: s_add_i32 s2, s2, s4 ; GFX6-NEXT: s_add_i32 s2, s2, s4
; GFX6-NEXT: s_lshl_b32 s3, s3, 16 ; GFX6-NEXT: s_lshl_b32 s3, s3, 16
; GFX6-NEXT: s_lshr_b32 s2, s2, 16 ; GFX6-NEXT: s_lshr_b32 s2, s2, 16
; GFX6-NEXT: s_lshl_b32 s4, s7, 16 ; GFX6-NEXT: s_lshl_b32 s4, s7, 16
; GFX6-NEXT: s_not_b32 s5, s3 ; GFX6-NEXT: s_not_b32 s5, s3
; GFX6-NEXT: s_cmp_lt_u32 s5, s4 ; GFX6-NEXT: s_cmp_lt_u32 s5, s4
; GFX6-NEXT: s_cselect_b32 s4, s5, s4 ; GFX6-NEXT: s_cselect_b32 s4, s5, s4
; GFX6-NEXT: s_add_i32 s3, s3, s4 ; GFX6-NEXT: s_add_i32 s3, s3, s4
; GFX6-NEXT: s_mov_b32 s4, 0xffff
; GFX6-NEXT: s_and_b32 s1, s1, s4
; GFX6-NEXT: s_lshr_b32 s3, s3, 16
; GFX6-NEXT: s_and_b32 s0, s0, s4
; GFX6-NEXT: s_lshl_b32 s1, s1, 16 ; GFX6-NEXT: s_lshl_b32 s1, s1, 16
; GFX6-NEXT: s_lshr_b32 s3, s3, 16
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: s_and_b32 s1, s2, s4 ; GFX6-NEXT: s_lshl_b32 s1, s3, 16
; GFX6-NEXT: s_and_b32 s2, s3, s4 ; GFX6-NEXT: s_or_b32 s1, s2, s1
; GFX6-NEXT: s_lshl_b32 s2, s2, 16
; GFX6-NEXT: s_or_b32 s1, s1, s2
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_uaddsat_v4i16: ; GFX8-LABEL: s_uaddsat_v4i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s6, s2, 16 ; GFX8-NEXT: s_lshr_b32 s6, s2, 16
; GFX8-NEXT: s_lshr_b32 s7, s3, 16 ; GFX8-NEXT: s_lshr_b32 s7, s3, 16
; GFX8-NEXT: s_lshr_b32 s4, s0, 16 ; GFX8-NEXT: s_lshr_b32 s4, s0, 16
; GFX8-NEXT: v_mov_b32_e32 v1, s6 ; GFX8-NEXT: v_mov_b32_e32 v1, s6
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; GFX6-NEXT: v_min_u32_e32 v6, v7, v6 ; GFX6-NEXT: v_min_u32_e32 v6, v7, v6
; GFX6-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX6-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX6-NEXT: v_add_i32_e32 v3, vcc, v3, v6 ; GFX6-NEXT: v_add_i32_e32 v3, vcc, v3, v6
; GFX6-NEXT: v_lshlrev_b32_e32 v6, 16, v10 ; GFX6-NEXT: v_lshlrev_b32_e32 v6, 16, v10
; GFX6-NEXT: v_xor_b32_e32 v7, -1, v4 ; GFX6-NEXT: v_xor_b32_e32 v7, -1, v4
; GFX6-NEXT: v_min_u32_e32 v6, v7, v6 ; GFX6-NEXT: v_min_u32_e32 v6, v7, v6
; GFX6-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; GFX6-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX6-NEXT: v_add_i32_e32 v4, vcc, v4, v6 ; GFX6-NEXT: v_add_i32_e32 v4, vcc, v4, v6
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX6-NEXT: s_mov_b32 s4, 0xffff
; GFX6-NEXT: v_lshlrev_b32_e32 v6, 16, v11 ; GFX6-NEXT: v_lshlrev_b32_e32 v6, 16, v11
; GFX6-NEXT: v_xor_b32_e32 v7, -1, v5 ; GFX6-NEXT: v_xor_b32_e32 v7, -1, v5
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_and_b32_e32 v1, s4, v1
; GFX6-NEXT: v_min_u32_e32 v6, v7, v6 ; GFX6-NEXT: v_min_u32_e32 v6, v7, v6
; GFX6-NEXT: v_add_i32_e32 v5, vcc, v5, v6 ; GFX6-NEXT: v_add_i32_e32 v5, vcc, v5, v6
; GFX6-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX6-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_and_b32_e32 v0, s4, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: v_and_b32_e32 v1, s4, v2 ; GFX6-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX6-NEXT: v_and_b32_e32 v2, s4, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v3
; GFX6-NEXT: v_lshrrev_b32_e32 v5, 16, v5 ; GFX6-NEXT: v_lshrrev_b32_e32 v5, 16, v5
; GFX6-NEXT: v_and_b32_e32 v3, s4, v5 ; GFX6-NEXT: v_or_b32_e32 v1, v2, v1
; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX6-NEXT: v_lshrrev_b32_e32 v4, 16, v4 ; GFX6-NEXT: v_lshrrev_b32_e32 v4, 16, v4
; GFX6-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v5
; GFX6-NEXT: v_and_b32_e32 v2, s4, v4 ; GFX6-NEXT: v_or_b32_e32 v2, v4, v2
; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_or_b32_e32 v2, v2, v3
; GFX6-NEXT: s_setpc_b64 s[30:31] ; GFX6-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: v_uaddsat_v6i16: ; GFX8-LABEL: v_uaddsat_v6i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_add_u16_e64 v6, v0, v3 clamp ; GFX8-NEXT: v_add_u16_e64 v6, v0, v3 clamp
; GFX8-NEXT: v_add_u16_sdwa v0, v0, v3 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; GFX8-NEXT: v_add_u16_sdwa v0, v0, v3 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-NEXT: v_add_u16_e64 v3, v1, v4 clamp ; GFX8-NEXT: v_add_u16_e64 v3, v1, v4 clamp
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; GFX6-NEXT: s_add_i32 s4, s4, s6 ; GFX6-NEXT: s_add_i32 s4, s4, s6
; GFX6-NEXT: s_lshl_b32 s5, s5, 16 ; GFX6-NEXT: s_lshl_b32 s5, s5, 16
; GFX6-NEXT: s_lshr_b32 s4, s4, 16 ; GFX6-NEXT: s_lshr_b32 s4, s4, 16
; GFX6-NEXT: s_lshl_b32 s6, s11, 16 ; GFX6-NEXT: s_lshl_b32 s6, s11, 16
; GFX6-NEXT: s_not_b32 s7, s5 ; GFX6-NEXT: s_not_b32 s7, s5
; GFX6-NEXT: s_cmp_lt_u32 s7, s6 ; GFX6-NEXT: s_cmp_lt_u32 s7, s6
; GFX6-NEXT: s_cselect_b32 s6, s7, s6 ; GFX6-NEXT: s_cselect_b32 s6, s7, s6
; GFX6-NEXT: s_add_i32 s5, s5, s6 ; GFX6-NEXT: s_add_i32 s5, s5, s6
; GFX6-NEXT: s_mov_b32 s6, 0xffff
; GFX6-NEXT: s_and_b32 s1, s1, s6
; GFX6-NEXT: s_and_b32 s0, s0, s6
; GFX6-NEXT: s_lshl_b32 s1, s1, 16 ; GFX6-NEXT: s_lshl_b32 s1, s1, 16
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: s_and_b32 s1, s2, s6 ; GFX6-NEXT: s_lshl_b32 s1, s3, 16
; GFX6-NEXT: s_and_b32 s2, s3, s6
; GFX6-NEXT: s_lshr_b32 s5, s5, 16 ; GFX6-NEXT: s_lshr_b32 s5, s5, 16
; GFX6-NEXT: s_and_b32 s3, s5, s6 ; GFX6-NEXT: s_or_b32 s1, s2, s1
; GFX6-NEXT: s_lshl_b32 s2, s2, 16 ; GFX6-NEXT: s_lshl_b32 s2, s5, 16
; GFX6-NEXT: s_or_b32 s1, s1, s2 ; GFX6-NEXT: s_or_b32 s2, s4, s2
; GFX6-NEXT: s_and_b32 s2, s4, s6
; GFX6-NEXT: s_lshl_b32 s3, s3, 16
; GFX6-NEXT: s_or_b32 s2, s2, s3
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_uaddsat_v6i16: ; GFX8-LABEL: s_uaddsat_v6i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s9, s3, 16 ; GFX8-NEXT: s_lshr_b32 s9, s3, 16
; GFX8-NEXT: s_lshr_b32 s10, s4, 16 ; GFX8-NEXT: s_lshr_b32 s10, s4, 16
; GFX8-NEXT: s_lshr_b32 s6, s0, 16 ; GFX8-NEXT: s_lshr_b32 s6, s0, 16
; GFX8-NEXT: v_mov_b32_e32 v1, s9 ; GFX8-NEXT: v_mov_b32_e32 v1, s9
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; GFX6-NEXT: v_xor_b32_e32 v9, -1, v5 ; GFX6-NEXT: v_xor_b32_e32 v9, -1, v5
; GFX6-NEXT: v_min_u32_e32 v8, v9, v8 ; GFX6-NEXT: v_min_u32_e32 v8, v9, v8
; GFX6-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX6-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX6-NEXT: v_add_i32_e32 v5, vcc, v5, v8 ; GFX6-NEXT: v_add_i32_e32 v5, vcc, v5, v8
; GFX6-NEXT: v_lshlrev_b32_e32 v8, 16, v14 ; GFX6-NEXT: v_lshlrev_b32_e32 v8, 16, v14
; GFX6-NEXT: v_xor_b32_e32 v9, -1, v6 ; GFX6-NEXT: v_xor_b32_e32 v9, -1, v6
; GFX6-NEXT: v_min_u32_e32 v8, v9, v8 ; GFX6-NEXT: v_min_u32_e32 v8, v9, v8
; GFX6-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX6-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX6-NEXT: s_mov_b32 s4, 0xffff
; GFX6-NEXT: v_add_i32_e32 v6, vcc, v6, v8 ; GFX6-NEXT: v_add_i32_e32 v6, vcc, v6, v8
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX6-NEXT: v_and_b32_e32 v1, s4, v1
; GFX6-NEXT: v_lshlrev_b32_e32 v8, 16, v15 ; GFX6-NEXT: v_lshlrev_b32_e32 v8, 16, v15
; GFX6-NEXT: v_xor_b32_e32 v9, -1, v7 ; GFX6-NEXT: v_xor_b32_e32 v9, -1, v7
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_min_u32_e32 v8, v9, v8 ; GFX6-NEXT: v_min_u32_e32 v8, v9, v8
; GFX6-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX6-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_and_b32_e32 v0, s4, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_add_i32_e32 v7, vcc, v7, v8 ; GFX6-NEXT: v_add_i32_e32 v7, vcc, v7, v8
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: v_and_b32_e32 v1, s4, v2 ; GFX6-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX6-NEXT: v_and_b32_e32 v2, s4, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v3
; GFX6-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; GFX6-NEXT: v_lshrrev_b32_e32 v5, 16, v5 ; GFX6-NEXT: v_lshrrev_b32_e32 v5, 16, v5
; GFX6-NEXT: v_and_b32_e32 v3, s4, v5 ; GFX6-NEXT: v_or_b32_e32 v1, v2, v1
; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX6-NEXT: v_lshrrev_b32_e32 v4, 16, v4 ; GFX6-NEXT: v_lshrrev_b32_e32 v4, 16, v4
; GFX6-NEXT: v_lshrrev_b32_e32 v7, 16, v7 ; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v5
; GFX6-NEXT: v_or_b32_e32 v1, v1, v2
; GFX6-NEXT: v_and_b32_e32 v2, s4, v4
; GFX6-NEXT: v_and_b32_e32 v4, s4, v7
; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_lshrrev_b32_e32 v6, 16, v6 ; GFX6-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; GFX6-NEXT: v_or_b32_e32 v2, v2, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v7
; GFX6-NEXT: v_and_b32_e32 v3, s4, v6 ; GFX6-NEXT: v_or_b32_e32 v2, v4, v2
; GFX6-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX6-NEXT: v_or_b32_e32 v3, v6, v3
; GFX6-NEXT: v_or_b32_e32 v3, v3, v4
; GFX6-NEXT: s_setpc_b64 s[30:31] ; GFX6-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: v_uaddsat_v8i16: ; GFX8-LABEL: v_uaddsat_v8i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_add_u16_e64 v8, v0, v4 clamp ; GFX8-NEXT: v_add_u16_e64 v8, v0, v4 clamp
; GFX8-NEXT: v_add_u16_sdwa v0, v0, v4 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; GFX8-NEXT: v_add_u16_sdwa v0, v0, v4 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-NEXT: v_add_u16_e64 v4, v1, v5 clamp ; GFX8-NEXT: v_add_u16_e64 v4, v1, v5 clamp
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; GFX6-NEXT: s_add_i32 s6, s6, s8 ; GFX6-NEXT: s_add_i32 s6, s6, s8
; GFX6-NEXT: s_lshl_b32 s7, s7, 16 ; GFX6-NEXT: s_lshl_b32 s7, s7, 16
; GFX6-NEXT: s_lshr_b32 s6, s6, 16 ; GFX6-NEXT: s_lshr_b32 s6, s6, 16
; GFX6-NEXT: s_lshl_b32 s8, s15, 16 ; GFX6-NEXT: s_lshl_b32 s8, s15, 16
; GFX6-NEXT: s_not_b32 s9, s7 ; GFX6-NEXT: s_not_b32 s9, s7
; GFX6-NEXT: s_cmp_lt_u32 s9, s8 ; GFX6-NEXT: s_cmp_lt_u32 s9, s8
; GFX6-NEXT: s_cselect_b32 s8, s9, s8 ; GFX6-NEXT: s_cselect_b32 s8, s9, s8
; GFX6-NEXT: s_add_i32 s7, s7, s8 ; GFX6-NEXT: s_add_i32 s7, s7, s8
; GFX6-NEXT: s_mov_b32 s8, 0xffff
; GFX6-NEXT: s_and_b32 s1, s1, s8
; GFX6-NEXT: s_and_b32 s0, s0, s8
; GFX6-NEXT: s_lshl_b32 s1, s1, 16 ; GFX6-NEXT: s_lshl_b32 s1, s1, 16
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: s_and_b32 s1, s2, s8 ; GFX6-NEXT: s_lshl_b32 s1, s3, 16
; GFX6-NEXT: s_and_b32 s2, s3, s8
; GFX6-NEXT: s_and_b32 s3, s5, s8
; GFX6-NEXT: s_lshl_b32 s2, s2, 16
; GFX6-NEXT: s_lshr_b32 s7, s7, 16 ; GFX6-NEXT: s_lshr_b32 s7, s7, 16
; GFX6-NEXT: s_or_b32 s1, s1, s2 ; GFX6-NEXT: s_lshl_b32 s3, s7, 16
; GFX6-NEXT: s_and_b32 s2, s4, s8 ; GFX6-NEXT: s_or_b32 s1, s2, s1
; GFX6-NEXT: s_and_b32 s4, s7, s8 ; GFX6-NEXT: s_lshl_b32 s2, s5, 16
; GFX6-NEXT: s_lshl_b32 s3, s3, 16 ; GFX6-NEXT: s_or_b32 s2, s4, s2
; GFX6-NEXT: s_or_b32 s2, s2, s3 ; GFX6-NEXT: s_or_b32 s3, s6, s3
; GFX6-NEXT: s_and_b32 s3, s6, s8
; GFX6-NEXT: s_lshl_b32 s4, s4, 16
; GFX6-NEXT: s_or_b32 s3, s3, s4
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_uaddsat_v8i16: ; GFX8-LABEL: s_uaddsat_v8i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s12, s4, 16 ; GFX8-NEXT: s_lshr_b32 s12, s4, 16
; GFX8-NEXT: s_lshr_b32 s13, s5, 16 ; GFX8-NEXT: s_lshr_b32 s13, s5, 16
; GFX8-NEXT: s_lshr_b32 s8, s0, 16 ; GFX8-NEXT: s_lshr_b32 s8, s0, 16
; GFX8-NEXT: v_mov_b32_e32 v1, s12 ; GFX8-NEXT: v_mov_b32_e32 v1, s12
▲ Show 20 Lines • Show All 1,369 Lines • Show Last 20 Lines

llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll

Show First 20 Lines • Show All 193 Lines • ▼ Show 20 Lines
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 24, v1 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; GFX6-NEXT: v_min_u32_e32 v1, v0, v1 ; GFX6-NEXT: v_min_u32_e32 v1, v0, v1
; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v1 ; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v1
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 24, v2 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX6-NEXT: v_lshlrev_b32_e32 v2, 24, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v2, 24, v3
; GFX6-NEXT: v_min_u32_e32 v2, v1, v2 ; GFX6-NEXT: v_min_u32_e32 v2, v1, v2
; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v2 ; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v2
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 24, v1 ; GFX6-NEXT: v_lshrrev_b32_e32 v1, 24, v1
; GFX6-NEXT: v_mov_b32_e32 v2, 0xff
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 24, v0 ; GFX6-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX6-NEXT: v_and_b32_e32 v1, v1, v2
; GFX6-NEXT: v_and_b32_e32 v0, v0, v2
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 8, v1 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: s_setpc_b64 s[30:31] ; GFX6-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: v_usubsat_v2i8: ; GFX8-LABEL: v_usubsat_v2i8:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v2, 8 ; GFX8-NEXT: v_mov_b32_e32 v2, 8
; GFX8-NEXT: v_lshrrev_b32_sdwa v3, v2, v0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_sdwa v3, v2, v0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX8-NEXT: v_lshrrev_b32_sdwa v2, v2, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_sdwa v2, v2, v1 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX8-NEXT: v_lshlrev_b16_e32 v0, 8, v0 ; GFX8-NEXT: v_lshlrev_b16_e32 v0, 8, v0
; GFX8-NEXT: v_lshlrev_b16_e32 v1, 8, v1 ; GFX8-NEXT: v_lshlrev_b16_e32 v1, 8, v1
; GFX8-NEXT: v_sub_u16_e64 v0, v0, v1 clamp ; GFX8-NEXT: v_sub_u16_e64 v0, v0, v1 clamp
; GFX8-NEXT: v_sub_u16_e64 v1, v3, v2 clamp ; GFX8-NEXT: v_sub_u16_e64 v1, v3, v2 clamp
; GFX8-NEXT: v_mov_b32_e32 v2, 0xff ; GFX8-NEXT: v_lshrrev_b16_e32 v1, 8, v1
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b16_e32 v1, 8, v1
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1
; GFX8-NEXT: s_setpc_b64 s[30:31] ; GFX8-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX9-LABEL: v_usubsat_v2i8: ; GFX9-LABEL: v_usubsat_v2i8:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: s_mov_b32 s4, 8 ; GFX9-NEXT: s_mov_b32 s4, 8
; GFX9-NEXT: v_lshrrev_b32_sdwa v2, s4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_sdwa v2, s4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
; GFX9-NEXT: v_lshrrev_b32_sdwa v3, s4, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX9-NEXT: v_lshrrev_b32_sdwa v3, s4, v1 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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; GFX6-NEXT: s_cselect_b32 s1, s0, s1 ; GFX6-NEXT: s_cselect_b32 s1, s0, s1
; GFX6-NEXT: s_sub_i32 s0, s0, s1 ; GFX6-NEXT: s_sub_i32 s0, s0, s1
; GFX6-NEXT: s_lshl_b32 s1, s2, 24 ; GFX6-NEXT: s_lshl_b32 s1, s2, 24
; GFX6-NEXT: s_lshr_b32 s0, s0, 24 ; GFX6-NEXT: s_lshr_b32 s0, s0, 24
; GFX6-NEXT: s_lshl_b32 s2, s3, 24 ; GFX6-NEXT: s_lshl_b32 s2, s3, 24
; GFX6-NEXT: s_cmp_lt_u32 s1, s2 ; GFX6-NEXT: s_cmp_lt_u32 s1, s2
; GFX6-NEXT: s_cselect_b32 s2, s1, s2 ; GFX6-NEXT: s_cselect_b32 s2, s1, s2
; GFX6-NEXT: s_sub_i32 s1, s1, s2 ; GFX6-NEXT: s_sub_i32 s1, s1, s2
; GFX6-NEXT: s_movk_i32 s2, 0xff
; GFX6-NEXT: s_lshr_b32 s1, s1, 24 ; GFX6-NEXT: s_lshr_b32 s1, s1, 24
; GFX6-NEXT: s_and_b32 s1, s1, s2
; GFX6-NEXT: s_and_b32 s0, s0, s2
; GFX6-NEXT: s_lshl_b32 s1, s1, 8 ; GFX6-NEXT: s_lshl_b32 s1, s1, 8
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_usubsat_v2i8: ; GFX8-LABEL: s_usubsat_v2i8:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_bfe_u32 s4, 8, 0x100000 ; GFX8-NEXT: s_bfe_u32 s4, 8, 0x100000
; GFX8-NEXT: s_lshr_b32 s3, s1, 8 ; GFX8-NEXT: s_lshr_b32 s3, s1, 8
; GFX8-NEXT: s_lshl_b32 s1, s1, s4 ; GFX8-NEXT: s_lshl_b32 s1, s1, s4
; GFX8-NEXT: s_lshr_b32 s2, s0, 8 ; GFX8-NEXT: s_lshr_b32 s2, s0, 8
; GFX8-NEXT: v_mov_b32_e32 v0, s1 ; GFX8-NEXT: v_mov_b32_e32 v0, s1
; GFX8-NEXT: s_lshl_b32 s0, s0, s4 ; GFX8-NEXT: s_lshl_b32 s0, s0, s4
; GFX8-NEXT: s_lshl_b32 s1, s3, s4 ; GFX8-NEXT: s_lshl_b32 s1, s3, s4
; GFX8-NEXT: v_sub_u16_e64 v0, s0, v0 clamp ; GFX8-NEXT: v_sub_u16_e64 v0, s0, v0 clamp
; GFX8-NEXT: s_lshl_b32 s0, s2, s4 ; GFX8-NEXT: s_lshl_b32 s0, s2, s4
; GFX8-NEXT: v_mov_b32_e32 v1, s1 ; GFX8-NEXT: v_mov_b32_e32 v1, s1
; GFX8-NEXT: v_mov_b32_e32 v2, 0xff
; GFX8-NEXT: v_sub_u16_e64 v1, s0, v1 clamp ; GFX8-NEXT: v_sub_u16_e64 v1, s0, v1 clamp
; GFX8-NEXT: v_and_b32_sdwa v0, v0, v2 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b16_e32 v1, 8, v1
; GFX8-NEXT: v_and_b32_sdwa v1, v1, v2 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD ; GFX8-NEXT: v_lshlrev_b16_e32 v1, 8, v1
; GFX8-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX8-NEXT: v_or_b32_sdwa v0, v0, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_1 src1_sel:DWORD
; GFX8-NEXT: v_readfirstlane_b32 s0, v0 ; GFX8-NEXT: v_readfirstlane_b32 s0, v0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX9-LABEL: s_usubsat_v2i8: ; GFX9-LABEL: s_usubsat_v2i8:
; GFX9: ; %bb.0: ; GFX9: ; %bb.0:
; GFX9-NEXT: s_lshr_b32 s2, s0, 8 ; GFX9-NEXT: s_lshr_b32 s2, s0, 8
; GFX9-NEXT: s_lshr_b32 s3, s1, 8 ; GFX9-NEXT: s_lshr_b32 s3, s1, 8
; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s2 ; GFX9-NEXT: s_pack_ll_b32_b16 s0, s0, s2
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; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v1 ; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v1
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 24, v2 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 24, v2
; GFX6-NEXT: v_lshlrev_b32_e32 v2, 24, v5 ; GFX6-NEXT: v_lshlrev_b32_e32 v2, 24, v5
; GFX6-NEXT: v_min_u32_e32 v2, v1, v2 ; GFX6-NEXT: v_min_u32_e32 v2, v1, v2
; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v2 ; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v2
; GFX6-NEXT: v_lshlrev_b32_e32 v2, 24, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v2, 24, v3
; GFX6-NEXT: v_lshlrev_b32_e32 v3, 24, v6 ; GFX6-NEXT: v_lshlrev_b32_e32 v3, 24, v6
; GFX6-NEXT: v_min_u32_e32 v3, v2, v3 ; GFX6-NEXT: v_min_u32_e32 v3, v2, v3
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 24, v1
; GFX6-NEXT: s_movk_i32 s4, 0xff
; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v2, v3 ; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v2, v3
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX6-NEXT: v_and_b32_e32 v1, s4, v1
; GFX6-NEXT: v_lshlrev_b32_e32 v3, 24, v4 ; GFX6-NEXT: v_lshlrev_b32_e32 v3, 24, v4
; GFX6-NEXT: v_lshlrev_b32_e32 v4, 24, v7 ; GFX6-NEXT: v_lshlrev_b32_e32 v4, 24, v7
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 24, v1
; GFX6-NEXT: v_min_u32_e32 v4, v3, v4 ; GFX6-NEXT: v_min_u32_e32 v4, v3, v4
; GFX6-NEXT: v_lshrrev_b32_e32 v2, 24, v2
; GFX6-NEXT: v_and_b32_e32 v0, s4, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX6-NEXT: v_sub_i32_e32 v3, vcc, v3, v4 ; GFX6-NEXT: v_sub_i32_e32 v3, vcc, v3, v4
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 24, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 8, v1
; GFX6-NEXT: v_lshrrev_b32_e32 v2, 24, v2
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: v_and_b32_e32 v1, s4, v2 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v2
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_lshrrev_b32_e32 v3, 24, v3 ; GFX6-NEXT: v_lshrrev_b32_e32 v3, 24, v3
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: v_and_b32_e32 v1, s4, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 24, v3
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 24, v1
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: s_setpc_b64 s[30:31] ; GFX6-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: v_usubsat_v4i8: ; GFX8-LABEL: v_usubsat_v4i8:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_mov_b32_e32 v2, 8 ; GFX8-NEXT: v_mov_b32_e32 v2, 8
; GFX8-NEXT: v_lshrrev_b32_sdwa v3, v2, v0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD ; GFX8-NEXT: v_lshrrev_b32_sdwa v3, v2, v0 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
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; GFX6-NEXT: s_cselect_b32 s3, s2, s3 ; GFX6-NEXT: s_cselect_b32 s3, s2, s3
; GFX6-NEXT: s_sub_i32 s2, s2, s3 ; GFX6-NEXT: s_sub_i32 s2, s2, s3
; GFX6-NEXT: s_lshl_b32 s3, s4, 24 ; GFX6-NEXT: s_lshl_b32 s3, s4, 24
; GFX6-NEXT: s_lshr_b32 s2, s2, 24 ; GFX6-NEXT: s_lshr_b32 s2, s2, 24
; GFX6-NEXT: s_lshl_b32 s4, s7, 24 ; GFX6-NEXT: s_lshl_b32 s4, s7, 24
; GFX6-NEXT: s_cmp_lt_u32 s3, s4 ; GFX6-NEXT: s_cmp_lt_u32 s3, s4
; GFX6-NEXT: s_cselect_b32 s4, s3, s4 ; GFX6-NEXT: s_cselect_b32 s4, s3, s4
; GFX6-NEXT: s_sub_i32 s3, s3, s4 ; GFX6-NEXT: s_sub_i32 s3, s3, s4
; GFX6-NEXT: s_movk_i32 s4, 0xff
; GFX6-NEXT: s_and_b32 s1, s1, s4
; GFX6-NEXT: s_and_b32 s0, s0, s4
; GFX6-NEXT: s_lshl_b32 s1, s1, 8 ; GFX6-NEXT: s_lshl_b32 s1, s1, 8
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: s_and_b32 s1, s2, s4 ; GFX6-NEXT: s_lshl_b32 s1, s2, 16
; GFX6-NEXT: s_lshl_b32 s1, s1, 16
; GFX6-NEXT: s_lshr_b32 s3, s3, 24 ; GFX6-NEXT: s_lshr_b32 s3, s3, 24
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: s_and_b32 s1, s3, s4 ; GFX6-NEXT: s_lshl_b32 s1, s3, 24
; GFX6-NEXT: s_lshl_b32 s1, s1, 24
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_usubsat_v4i8: ; GFX8-LABEL: s_usubsat_v4i8:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_bfe_u32 s8, 8, 0x100000 ; GFX8-NEXT: s_bfe_u32 s8, 8, 0x100000
; GFX8-NEXT: s_lshr_b32 s5, s1, 8 ; GFX8-NEXT: s_lshr_b32 s5, s1, 8
; GFX8-NEXT: s_lshr_b32 s6, s1, 16 ; GFX8-NEXT: s_lshr_b32 s6, s1, 16
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; GFX6-NEXT: s_cselect_b32 s2, s0, s2 ; GFX6-NEXT: s_cselect_b32 s2, s0, s2
; GFX6-NEXT: s_sub_i32 s0, s0, s2 ; GFX6-NEXT: s_sub_i32 s0, s0, s2
; GFX6-NEXT: s_lshr_b32 s0, s0, 16 ; GFX6-NEXT: s_lshr_b32 s0, s0, 16
; GFX6-NEXT: s_lshl_b32 s1, s1, 16 ; GFX6-NEXT: s_lshl_b32 s1, s1, 16
; GFX6-NEXT: s_lshl_b32 s2, s3, 16 ; GFX6-NEXT: s_lshl_b32 s2, s3, 16
; GFX6-NEXT: s_cmp_lt_u32 s1, s2 ; GFX6-NEXT: s_cmp_lt_u32 s1, s2
; GFX6-NEXT: s_cselect_b32 s2, s1, s2 ; GFX6-NEXT: s_cselect_b32 s2, s1, s2
; GFX6-NEXT: s_sub_i32 s1, s1, s2 ; GFX6-NEXT: s_sub_i32 s1, s1, s2
; GFX6-NEXT: s_mov_b32 s2, 0xffff
; GFX6-NEXT: s_lshr_b32 s1, s1, 16 ; GFX6-NEXT: s_lshr_b32 s1, s1, 16
; GFX6-NEXT: s_and_b32 s1, s1, s2
; GFX6-NEXT: s_and_b32 s0, s0, s2
; GFX6-NEXT: s_lshl_b32 s1, s1, 16 ; GFX6-NEXT: s_lshl_b32 s1, s1, 16
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_usubsat_v2i16: ; GFX8-LABEL: s_usubsat_v2i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s3, s1, 16 ; GFX8-NEXT: s_lshr_b32 s3, s1, 16
; GFX8-NEXT: s_lshr_b32 s2, s0, 16 ; GFX8-NEXT: s_lshr_b32 s2, s0, 16
Show All 32 Lines
; GFX6-NEXT: v_lshlrev_b32_e32 v0, 16, v0 ; GFX6-NEXT: v_lshlrev_b32_e32 v0, 16, v0
; GFX6-NEXT: v_min_u32_e32 v0, s0, v0 ; GFX6-NEXT: v_min_u32_e32 v0, s0, v0
; GFX6-NEXT: v_sub_i32_e32 v0, vcc, s0, v0 ; GFX6-NEXT: v_sub_i32_e32 v0, vcc, s0, v0
; GFX6-NEXT: s_lshl_b32 s0, s1, 16 ; GFX6-NEXT: s_lshl_b32 s0, s1, 16
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_min_u32_e32 v1, s0, v1 ; GFX6-NEXT: v_min_u32_e32 v1, s0, v1
; GFX6-NEXT: v_sub_i32_e32 v1, vcc, s0, v1 ; GFX6-NEXT: v_sub_i32_e32 v1, vcc, s0, v1
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX6-NEXT: s_mov_b32 s0, 0xffff
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX6-NEXT: v_and_b32_e32 v1, s0, v1
; GFX6-NEXT: v_and_b32_e32 v0, s0, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: usubsat_v2i16_sv: ; GFX8-LABEL: usubsat_v2i16_sv:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s1, s0, 16 ; GFX8-NEXT: s_lshr_b32 s1, s0, 16
; GFX8-NEXT: v_mov_b32_e32 v2, s1 ; GFX8-NEXT: v_mov_b32_e32 v2, s1
Show All 26 Lines
; GFX6-NEXT: s_lshl_b32 s0, s0, 16 ; GFX6-NEXT: s_lshl_b32 s0, s0, 16
; GFX6-NEXT: v_min_u32_e32 v2, s0, v0 ; GFX6-NEXT: v_min_u32_e32 v2, s0, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: s_lshl_b32 s0, s1, 16 ; GFX6-NEXT: s_lshl_b32 s0, s1, 16
; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v2 ; GFX6-NEXT: v_sub_i32_e32 v0, vcc, v0, v2
; GFX6-NEXT: v_min_u32_e32 v2, s0, v1 ; GFX6-NEXT: v_min_u32_e32 v2, s0, v1
; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v2 ; GFX6-NEXT: v_sub_i32_e32 v1, vcc, v1, v2
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX6-NEXT: s_mov_b32 s0, 0xffff
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX6-NEXT: v_and_b32_e32 v1, s0, v1
; GFX6-NEXT: v_and_b32_e32 v0, s0, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: usubsat_v2i16_vs: ; GFX8-LABEL: usubsat_v2i16_vs:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s1, s0, 16 ; GFX8-NEXT: s_lshr_b32 s1, s0, 16
; GFX8-NEXT: v_mov_b32_e32 v2, s1 ; GFX8-NEXT: v_mov_b32_e32 v2, s1
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; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX6-NEXT: v_lshlrev_b32_e32 v4, 16, v6 ; GFX6-NEXT: v_lshlrev_b32_e32 v4, 16, v6
; GFX6-NEXT: v_min_u32_e32 v4, v2, v4 ; GFX6-NEXT: v_min_u32_e32 v4, v2, v4
; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v2, v4 ; GFX6-NEXT: v_sub_i32_e32 v2, vcc, v2, v4
; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_lshlrev_b32_e32 v4, 16, v7 ; GFX6-NEXT: v_lshlrev_b32_e32 v4, 16, v7
; GFX6-NEXT: v_min_u32_e32 v4, v3, v4 ; GFX6-NEXT: v_min_u32_e32 v4, v3, v4
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX6-NEXT: s_mov_b32 s4, 0xffff
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX6-NEXT: v_sub_i32_e32 v3, vcc, v3, v4 ; GFX6-NEXT: v_sub_i32_e32 v3, vcc, v3, v4
; GFX6-NEXT: v_and_b32_e32 v1, s4, v1 ; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX6-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX6-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_and_b32_e32 v0, s4, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: v_and_b32_e32 v1, s4, v2 ; GFX6-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX6-NEXT: v_and_b32_e32 v2, s4, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v3
; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v2 ; GFX6-NEXT: v_or_b32_e32 v1, v2, v1
; GFX6-NEXT: v_or_b32_e32 v1, v1, v2
; GFX6-NEXT: s_setpc_b64 s[30:31] ; GFX6-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: v_usubsat_v4i16: ; GFX8-LABEL: v_usubsat_v4i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_sub_u16_e64 v4, v0, v2 clamp ; GFX8-NEXT: v_sub_u16_e64 v4, v0, v2 clamp
; GFX8-NEXT: v_sub_u16_sdwa v0, v0, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; GFX8-NEXT: v_sub_u16_sdwa v0, v0, v2 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-NEXT: v_sub_u16_e64 v2, v1, v3 clamp ; GFX8-NEXT: v_sub_u16_e64 v2, v1, v3 clamp
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; GFX6-NEXT: s_cselect_b32 s4, s2, s4 ; GFX6-NEXT: s_cselect_b32 s4, s2, s4
; GFX6-NEXT: s_sub_i32 s2, s2, s4 ; GFX6-NEXT: s_sub_i32 s2, s2, s4
; GFX6-NEXT: s_lshr_b32 s2, s2, 16 ; GFX6-NEXT: s_lshr_b32 s2, s2, 16
; GFX6-NEXT: s_lshl_b32 s3, s3, 16 ; GFX6-NEXT: s_lshl_b32 s3, s3, 16
; GFX6-NEXT: s_lshl_b32 s4, s7, 16 ; GFX6-NEXT: s_lshl_b32 s4, s7, 16
; GFX6-NEXT: s_cmp_lt_u32 s3, s4 ; GFX6-NEXT: s_cmp_lt_u32 s3, s4
; GFX6-NEXT: s_cselect_b32 s4, s3, s4 ; GFX6-NEXT: s_cselect_b32 s4, s3, s4
; GFX6-NEXT: s_sub_i32 s3, s3, s4 ; GFX6-NEXT: s_sub_i32 s3, s3, s4
; GFX6-NEXT: s_mov_b32 s4, 0xffff
; GFX6-NEXT: s_and_b32 s1, s1, s4
; GFX6-NEXT: s_lshr_b32 s3, s3, 16
; GFX6-NEXT: s_and_b32 s0, s0, s4
; GFX6-NEXT: s_lshl_b32 s1, s1, 16 ; GFX6-NEXT: s_lshl_b32 s1, s1, 16
; GFX6-NEXT: s_lshr_b32 s3, s3, 16
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: s_and_b32 s1, s2, s4 ; GFX6-NEXT: s_lshl_b32 s1, s3, 16
; GFX6-NEXT: s_and_b32 s2, s3, s4 ; GFX6-NEXT: s_or_b32 s1, s2, s1
; GFX6-NEXT: s_lshl_b32 s2, s2, 16
; GFX6-NEXT: s_or_b32 s1, s1, s2
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_usubsat_v4i16: ; GFX8-LABEL: s_usubsat_v4i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s6, s2, 16 ; GFX8-NEXT: s_lshr_b32 s6, s2, 16
; GFX8-NEXT: s_lshr_b32 s7, s3, 16 ; GFX8-NEXT: s_lshr_b32 s7, s3, 16
; GFX8-NEXT: s_lshr_b32 s4, s0, 16 ; GFX8-NEXT: s_lshr_b32 s4, s0, 16
; GFX8-NEXT: v_mov_b32_e32 v1, s6 ; GFX8-NEXT: v_mov_b32_e32 v1, s6
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; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_lshlrev_b32_e32 v6, 16, v9 ; GFX6-NEXT: v_lshlrev_b32_e32 v6, 16, v9
; GFX6-NEXT: v_min_u32_e32 v6, v3, v6 ; GFX6-NEXT: v_min_u32_e32 v6, v3, v6
; GFX6-NEXT: v_sub_i32_e32 v3, vcc, v3, v6 ; GFX6-NEXT: v_sub_i32_e32 v3, vcc, v3, v6
; GFX6-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX6-NEXT: v_lshlrev_b32_e32 v4, 16, v4
; GFX6-NEXT: v_lshlrev_b32_e32 v6, 16, v10 ; GFX6-NEXT: v_lshlrev_b32_e32 v6, 16, v10
; GFX6-NEXT: v_min_u32_e32 v6, v4, v6 ; GFX6-NEXT: v_min_u32_e32 v6, v4, v6
; GFX6-NEXT: v_sub_i32_e32 v4, vcc, v4, v6 ; GFX6-NEXT: v_sub_i32_e32 v4, vcc, v4, v6
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX6-NEXT: s_mov_b32 s4, 0xffff
; GFX6-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; GFX6-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX6-NEXT: v_lshlrev_b32_e32 v6, 16, v11 ; GFX6-NEXT: v_lshlrev_b32_e32 v6, 16, v11
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0 ; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_min_u32_e32 v6, v5, v6 ; GFX6-NEXT: v_min_u32_e32 v6, v5, v6
; GFX6-NEXT: v_and_b32_e32 v1, s4, v1
; GFX6-NEXT: v_sub_i32_e32 v5, vcc, v5, v6 ; GFX6-NEXT: v_sub_i32_e32 v5, vcc, v5, v6
; GFX6-NEXT: v_lshrrev_b32_e32 v2, 16, v2 ; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX6-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_and_b32_e32 v0, s4, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: v_and_b32_e32 v1, s4, v2 ; GFX6-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX6-NEXT: v_and_b32_e32 v2, s4, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v3
; GFX6-NEXT: v_lshrrev_b32_e32 v5, 16, v5 ; GFX6-NEXT: v_lshrrev_b32_e32 v5, 16, v5
; GFX6-NEXT: v_and_b32_e32 v3, s4, v5 ; GFX6-NEXT: v_or_b32_e32 v1, v2, v1
; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX6-NEXT: v_lshrrev_b32_e32 v4, 16, v4 ; GFX6-NEXT: v_lshrrev_b32_e32 v4, 16, v4
; GFX6-NEXT: v_or_b32_e32 v1, v1, v2 ; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v5
; GFX6-NEXT: v_and_b32_e32 v2, s4, v4 ; GFX6-NEXT: v_or_b32_e32 v2, v4, v2
; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_or_b32_e32 v2, v2, v3
; GFX6-NEXT: s_setpc_b64 s[30:31] ; GFX6-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: v_usubsat_v6i16: ; GFX8-LABEL: v_usubsat_v6i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_sub_u16_e64 v6, v0, v3 clamp ; GFX8-NEXT: v_sub_u16_e64 v6, v0, v3 clamp
; GFX8-NEXT: v_sub_u16_sdwa v0, v0, v3 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; GFX8-NEXT: v_sub_u16_sdwa v0, v0, v3 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-NEXT: v_sub_u16_e64 v3, v1, v4 clamp ; GFX8-NEXT: v_sub_u16_e64 v3, v1, v4 clamp
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; GFX6-NEXT: s_cselect_b32 s6, s4, s6 ; GFX6-NEXT: s_cselect_b32 s6, s4, s6
; GFX6-NEXT: s_sub_i32 s4, s4, s6 ; GFX6-NEXT: s_sub_i32 s4, s4, s6
; GFX6-NEXT: s_lshr_b32 s4, s4, 16 ; GFX6-NEXT: s_lshr_b32 s4, s4, 16
; GFX6-NEXT: s_lshl_b32 s5, s5, 16 ; GFX6-NEXT: s_lshl_b32 s5, s5, 16
; GFX6-NEXT: s_lshl_b32 s6, s11, 16 ; GFX6-NEXT: s_lshl_b32 s6, s11, 16
; GFX6-NEXT: s_cmp_lt_u32 s5, s6 ; GFX6-NEXT: s_cmp_lt_u32 s5, s6
; GFX6-NEXT: s_cselect_b32 s6, s5, s6 ; GFX6-NEXT: s_cselect_b32 s6, s5, s6
; GFX6-NEXT: s_sub_i32 s5, s5, s6 ; GFX6-NEXT: s_sub_i32 s5, s5, s6
; GFX6-NEXT: s_mov_b32 s6, 0xffff
; GFX6-NEXT: s_and_b32 s1, s1, s6
; GFX6-NEXT: s_and_b32 s0, s0, s6
; GFX6-NEXT: s_lshl_b32 s1, s1, 16 ; GFX6-NEXT: s_lshl_b32 s1, s1, 16
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: s_and_b32 s1, s2, s6 ; GFX6-NEXT: s_lshl_b32 s1, s3, 16
; GFX6-NEXT: s_and_b32 s2, s3, s6
; GFX6-NEXT: s_lshr_b32 s5, s5, 16 ; GFX6-NEXT: s_lshr_b32 s5, s5, 16
; GFX6-NEXT: s_and_b32 s3, s5, s6 ; GFX6-NEXT: s_or_b32 s1, s2, s1
; GFX6-NEXT: s_lshl_b32 s2, s2, 16 ; GFX6-NEXT: s_lshl_b32 s2, s5, 16
; GFX6-NEXT: s_or_b32 s1, s1, s2 ; GFX6-NEXT: s_or_b32 s2, s4, s2
; GFX6-NEXT: s_and_b32 s2, s4, s6
; GFX6-NEXT: s_lshl_b32 s3, s3, 16
; GFX6-NEXT: s_or_b32 s2, s2, s3
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_usubsat_v6i16: ; GFX8-LABEL: s_usubsat_v6i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s9, s3, 16 ; GFX8-NEXT: s_lshr_b32 s9, s3, 16
; GFX8-NEXT: s_lshr_b32 s10, s4, 16 ; GFX8-NEXT: s_lshr_b32 s10, s4, 16
; GFX8-NEXT: s_lshr_b32 s6, s0, 16 ; GFX8-NEXT: s_lshr_b32 s6, s0, 16
; GFX8-NEXT: v_mov_b32_e32 v1, s9 ; GFX8-NEXT: v_mov_b32_e32 v1, s9
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; GFX6-NEXT: v_sub_i32_e32 v4, vcc, v4, v8 ; GFX6-NEXT: v_sub_i32_e32 v4, vcc, v4, v8
; GFX6-NEXT: v_lshlrev_b32_e32 v5, 16, v5 ; GFX6-NEXT: v_lshlrev_b32_e32 v5, 16, v5
; GFX6-NEXT: v_lshlrev_b32_e32 v8, 16, v13 ; GFX6-NEXT: v_lshlrev_b32_e32 v8, 16, v13
; GFX6-NEXT: v_min_u32_e32 v8, v5, v8 ; GFX6-NEXT: v_min_u32_e32 v8, v5, v8
; GFX6-NEXT: v_sub_i32_e32 v5, vcc, v5, v8 ; GFX6-NEXT: v_sub_i32_e32 v5, vcc, v5, v8
; GFX6-NEXT: v_lshlrev_b32_e32 v6, 16, v6 ; GFX6-NEXT: v_lshlrev_b32_e32 v6, 16, v6
; GFX6-NEXT: v_lshlrev_b32_e32 v8, 16, v14 ; GFX6-NEXT: v_lshlrev_b32_e32 v8, 16, v14
; GFX6-NEXT: v_min_u32_e32 v8, v6, v8 ; GFX6-NEXT: v_min_u32_e32 v8, v6, v8
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX6-NEXT: s_mov_b32 s4, 0xffff
; GFX6-NEXT: v_sub_i32_e32 v6, vcc, v6, v8 ; GFX6-NEXT: v_sub_i32_e32 v6, vcc, v6, v8
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX6-NEXT: v_and_b32_e32 v1, s4, v1
; GFX6-NEXT: v_lshlrev_b32_e32 v7, 16, v7 ; GFX6-NEXT: v_lshlrev_b32_e32 v7, 16, v7
; GFX6-NEXT: v_lshlrev_b32_e32 v8, 16, v15 ; GFX6-NEXT: v_lshlrev_b32_e32 v8, 16, v15
; GFX6-NEXT: v_lshrrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_min_u32_e32 v8, v7, v8 ; GFX6-NEXT: v_min_u32_e32 v8, v7, v8
; GFX6-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX6-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_and_b32_e32 v0, s4, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_sub_i32_e32 v7, vcc, v7, v8 ; GFX6-NEXT: v_sub_i32_e32 v7, vcc, v7, v8
; GFX6-NEXT: v_lshrrev_b32_e32 v0, 16, v0
; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v1
; GFX6-NEXT: v_lshrrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_or_b32_e32 v0, v0, v1 ; GFX6-NEXT: v_or_b32_e32 v0, v0, v1
; GFX6-NEXT: v_and_b32_e32 v1, s4, v2 ; GFX6-NEXT: v_lshrrev_b32_e32 v2, 16, v2
; GFX6-NEXT: v_and_b32_e32 v2, s4, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v1, 16, v3
; GFX6-NEXT: v_lshrrev_b32_e32 v7, 16, v7
; GFX6-NEXT: v_lshrrev_b32_e32 v5, 16, v5 ; GFX6-NEXT: v_lshrrev_b32_e32 v5, 16, v5
; GFX6-NEXT: v_and_b32_e32 v3, s4, v5 ; GFX6-NEXT: v_or_b32_e32 v1, v2, v1
; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v2
; GFX6-NEXT: v_lshrrev_b32_e32 v4, 16, v4 ; GFX6-NEXT: v_lshrrev_b32_e32 v4, 16, v4
; GFX6-NEXT: v_lshrrev_b32_e32 v7, 16, v7 ; GFX6-NEXT: v_lshlrev_b32_e32 v2, 16, v5
; GFX6-NEXT: v_or_b32_e32 v1, v1, v2
; GFX6-NEXT: v_and_b32_e32 v2, s4, v4
; GFX6-NEXT: v_and_b32_e32 v4, s4, v7
; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v3
; GFX6-NEXT: v_lshrrev_b32_e32 v6, 16, v6 ; GFX6-NEXT: v_lshrrev_b32_e32 v6, 16, v6
; GFX6-NEXT: v_or_b32_e32 v2, v2, v3 ; GFX6-NEXT: v_lshlrev_b32_e32 v3, 16, v7
; GFX6-NEXT: v_and_b32_e32 v3, s4, v6 ; GFX6-NEXT: v_or_b32_e32 v2, v4, v2
; GFX6-NEXT: v_lshlrev_b32_e32 v4, 16, v4 ; GFX6-NEXT: v_or_b32_e32 v3, v6, v3
; GFX6-NEXT: v_or_b32_e32 v3, v3, v4
; GFX6-NEXT: s_setpc_b64 s[30:31] ; GFX6-NEXT: s_setpc_b64 s[30:31]
; ;
; GFX8-LABEL: v_usubsat_v8i16: ; GFX8-LABEL: v_usubsat_v8i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0) ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX8-NEXT: v_sub_u16_e64 v8, v0, v4 clamp ; GFX8-NEXT: v_sub_u16_e64 v8, v0, v4 clamp
; GFX8-NEXT: v_sub_u16_sdwa v0, v0, v4 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1 ; GFX8-NEXT: v_sub_u16_sdwa v0, v0, v4 clamp dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:WORD_1
; GFX8-NEXT: v_sub_u16_e64 v4, v1, v5 clamp ; GFX8-NEXT: v_sub_u16_e64 v4, v1, v5 clamp
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; GFX6-NEXT: s_cselect_b32 s8, s6, s8 ; GFX6-NEXT: s_cselect_b32 s8, s6, s8
; GFX6-NEXT: s_sub_i32 s6, s6, s8 ; GFX6-NEXT: s_sub_i32 s6, s6, s8
; GFX6-NEXT: s_lshr_b32 s6, s6, 16 ; GFX6-NEXT: s_lshr_b32 s6, s6, 16
; GFX6-NEXT: s_lshl_b32 s7, s7, 16 ; GFX6-NEXT: s_lshl_b32 s7, s7, 16
; GFX6-NEXT: s_lshl_b32 s8, s15, 16 ; GFX6-NEXT: s_lshl_b32 s8, s15, 16
; GFX6-NEXT: s_cmp_lt_u32 s7, s8 ; GFX6-NEXT: s_cmp_lt_u32 s7, s8
; GFX6-NEXT: s_cselect_b32 s8, s7, s8 ; GFX6-NEXT: s_cselect_b32 s8, s7, s8
; GFX6-NEXT: s_sub_i32 s7, s7, s8 ; GFX6-NEXT: s_sub_i32 s7, s7, s8
; GFX6-NEXT: s_mov_b32 s8, 0xffff
; GFX6-NEXT: s_and_b32 s1, s1, s8
; GFX6-NEXT: s_and_b32 s0, s0, s8
; GFX6-NEXT: s_lshl_b32 s1, s1, 16 ; GFX6-NEXT: s_lshl_b32 s1, s1, 16
; GFX6-NEXT: s_or_b32 s0, s0, s1 ; GFX6-NEXT: s_or_b32 s0, s0, s1
; GFX6-NEXT: s_and_b32 s1, s2, s8 ; GFX6-NEXT: s_lshl_b32 s1, s3, 16
; GFX6-NEXT: s_and_b32 s2, s3, s8
; GFX6-NEXT: s_and_b32 s3, s5, s8
; GFX6-NEXT: s_lshl_b32 s2, s2, 16
; GFX6-NEXT: s_lshr_b32 s7, s7, 16 ; GFX6-NEXT: s_lshr_b32 s7, s7, 16
; GFX6-NEXT: s_or_b32 s1, s1, s2 ; GFX6-NEXT: s_lshl_b32 s3, s7, 16
; GFX6-NEXT: s_and_b32 s2, s4, s8 ; GFX6-NEXT: s_or_b32 s1, s2, s1
; GFX6-NEXT: s_and_b32 s4, s7, s8 ; GFX6-NEXT: s_lshl_b32 s2, s5, 16
; GFX6-NEXT: s_lshl_b32 s3, s3, 16 ; GFX6-NEXT: s_or_b32 s2, s4, s2
; GFX6-NEXT: s_or_b32 s2, s2, s3 ; GFX6-NEXT: s_or_b32 s3, s6, s3
; GFX6-NEXT: s_and_b32 s3, s6, s8
; GFX6-NEXT: s_lshl_b32 s4, s4, 16
; GFX6-NEXT: s_or_b32 s3, s3, s4
; GFX6-NEXT: ; return to shader part epilog ; GFX6-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: s_usubsat_v8i16: ; GFX8-LABEL: s_usubsat_v8i16:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_lshr_b32 s12, s4, 16 ; GFX8-NEXT: s_lshr_b32 s12, s4, 16
; GFX8-NEXT: s_lshr_b32 s13, s5, 16 ; GFX8-NEXT: s_lshr_b32 s13, s5, 16
; GFX8-NEXT: s_lshr_b32 s8, s0, 16 ; GFX8-NEXT: s_lshr_b32 s8, s0, 16
; GFX8-NEXT: v_mov_b32_e32 v1, s12 ; GFX8-NEXT: v_mov_b32_e32 v1, s12
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llvm/test/CodeGen/AMDGPU/GlobalISel/xnor.ll

Show All 31 Lines
; ;
; GFX8-LABEL: scalar_xnor_v2i16_one_use: ; GFX8-LABEL: scalar_xnor_v2i16_one_use:
; GFX8: ; %bb.0: ; %entry ; GFX8: ; %bb.0: ; %entry
; GFX8-NEXT: s_xor_b32 s0, s0, s1 ; GFX8-NEXT: s_xor_b32 s0, s0, s1
; GFX8-NEXT: s_mov_b32 s2, 0xffff ; GFX8-NEXT: s_mov_b32 s2, 0xffff
; GFX8-NEXT: s_lshr_b32 s1, s0, 16 ; GFX8-NEXT: s_lshr_b32 s1, s0, 16
; GFX8-NEXT: s_mov_b32 s3, s2 ; GFX8-NEXT: s_mov_b32 s3, s2
; GFX8-NEXT: s_and_b32 s0, s0, s2 ; GFX8-NEXT: s_and_b32 s0, s0, s2
; GFX8-NEXT: s_and_b32 s1, s1, s2
; GFX8-NEXT: s_and_b64 s[0:1], s[0:1], s[2:3] ; GFX8-NEXT: s_and_b64 s[0:1], s[0:1], s[2:3]
; GFX8-NEXT: s_xor_b64 s[0:1], s[0:1], s[2:3] ; GFX8-NEXT: s_xor_b64 s[0:1], s[0:1], s[2:3]
; GFX8-NEXT: s_lshl_b32 s1, s1, 16 ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_and_b32 s0, s0, s2 ; GFX8-NEXT: s_and_b32 s0, s0, s2
; GFX8-NEXT: s_or_b32 s0, s1, s0 ; GFX8-NEXT: s_or_b32 s0, s1, s0
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX900-LABEL: scalar_xnor_v2i16_one_use: ; GFX900-LABEL: scalar_xnor_v2i16_one_use:
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; GFX7-NEXT: s_xor_b64 s[0:1], s[0:1], s[4:5] ; GFX7-NEXT: s_xor_b64 s[0:1], s[0:1], s[4:5]
; GFX7-NEXT: ; return to shader part epilog ; GFX7-NEXT: ; return to shader part epilog
; ;
; GFX8-LABEL: scalar_xnor_v4i16_one_use: ; GFX8-LABEL: scalar_xnor_v4i16_one_use:
; GFX8: ; %bb.0: ; GFX8: ; %bb.0:
; GFX8-NEXT: s_xor_b64 s[0:1], s[0:1], s[2:3] ; GFX8-NEXT: s_xor_b64 s[0:1], s[0:1], s[2:3]
; GFX8-NEXT: s_mov_b32 s4, 0xffff ; GFX8-NEXT: s_mov_b32 s4, 0xffff
; GFX8-NEXT: s_lshr_b32 s3, s0, 16 ; GFX8-NEXT: s_lshr_b32 s3, s0, 16
; GFX8-NEXT: s_lshr_b32 s5, s1, 16
; GFX8-NEXT: s_and_b32 s2, s0, s4 ; GFX8-NEXT: s_and_b32 s2, s0, s4
; GFX8-NEXT: s_and_b32 s0, s1, s4
; GFX8-NEXT: s_and_b32 s1, s5, s4
; GFX8-NEXT: s_mov_b32 s5, s4 ; GFX8-NEXT: s_mov_b32 s5, s4
; GFX8-NEXT: s_and_b32 s3, s3, s4 ; GFX8-NEXT: s_lshr_b32 s7, s1, 16
; GFX8-NEXT: s_and_b64 s[2:3], s[2:3], s[4:5] ; GFX8-NEXT: s_and_b32 s6, s1, s4
; GFX8-NEXT: s_and_b64 s[0:1], s[0:1], s[4:5] ; GFX8-NEXT: s_and_b64 s[0:1], s[2:3], s[4:5]
; GFX8-NEXT: s_xor_b64 s[0:1], s[0:1], s[4:5]
; GFX8-NEXT: s_and_b64 s[2:3], s[6:7], s[4:5]
; GFX8-NEXT: s_xor_b64 s[2:3], s[2:3], s[4:5] ; GFX8-NEXT: s_xor_b64 s[2:3], s[2:3], s[4:5]
; GFX8-NEXT: s_xor_b64 s[6:7], s[0:1], s[4:5] ; GFX8-NEXT: s_lshl_b32 s1, s1, 16
; GFX8-NEXT: s_and_b32 s1, s2, s4 ; GFX8-NEXT: s_and_b32 s0, s0, s4
; GFX8-NEXT: s_lshl_b32 s0, s3, 16 ; GFX8-NEXT: s_or_b32 s0, s1, s0
; GFX8-NEXT: s_or_b32 s0, s0, s1 ; GFX8-NEXT: s_lshl_b32 s1, s3, 16
; GFX8-NEXT: s_lshl_b32 s1, s7, 16 ; GFX8-NEXT: s_and_b32 s2, s2, s4
; GFX8-NEXT: s_and_b32 s2, s6, s4
; GFX8-NEXT: s_or_b32 s1, s1, s2 ; GFX8-NEXT: s_or_b32 s1, s1, s2
; GFX8-NEXT: ; return to shader part epilog ; GFX8-NEXT: ; return to shader part epilog
; ;
; GFX900-LABEL: scalar_xnor_v4i16_one_use: ; GFX900-LABEL: scalar_xnor_v4i16_one_use:
; GFX900: ; %bb.0: ; GFX900: ; %bb.0:
; GFX900-NEXT: s_mov_b32 s4, -1 ; GFX900-NEXT: s_mov_b32 s4, -1
; GFX900-NEXT: s_mov_b32 s5, s4 ; GFX900-NEXT: s_mov_b32 s5, s4
; GFX900-NEXT: s_xor_b64 s[0:1], s[0:1], s[2:3] ; GFX900-NEXT: s_xor_b64 s[0:1], s[0:1], s[2:3]
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