[mlir] Conv ops vectorization pass

[limo1996]

Summary

In this commit a new way of convolution ops lowering is introduced.
The conv op vectorization pass lowers linalg convolution ops
into vector contractions. This lowering is possible when conv op
is first tiled by 1 along specific dimensions which transforms
it into dot product between input and kernel subview memory buffers.
This pass converts such conv op into vector contraction and does
all necessary vector transfers that make it work.

PHAB_REVIEW=D86619

[rriddle]

Please run clang-format.

Please also add non-integration FileCheck tests in test/Conversion that test the expected output of the patterns you have added.

Thanks.

mlir/include/mlir/Conversion/LinalgToVector/LinalgToVector.h

16 ↗

(On Diff #287956)

Is this include necessary?

mlir/include/mlir/Conversion/LinalgToVector/LinalgToVectorPass.h

16 ↗

(On Diff #287956)

Is this include necessary? Can you forward declare instead?

mlir/include/mlir/Conversion/Passes.td

197 ↗

(On Diff #287956)

Please declare the dependent dialects of this pass, i.e. what you will generate.

mlir/lib/Conversion/LinalgToVector/LinalgToVector.cpp

17 ↗

(On Diff #287956)

nit: Use a constexpr constant instead of a define.

24 ↗

(On Diff #287956)

Functions should be placed in the top-level namespace and be marked static, only classes should go in anonymous namespaces.

89 ↗

(On Diff #287956)

nit: Please spell out all of these types instead of using auto.

102 ↗

(On Diff #287956)

nit:

• Use unsigned or an equivalent instead.
• Drop trivial braces
• Cache the end iterator of for loops.

107 ↗

(On Diff #287956)

nit: Use normal variable declarations:

SmallVector<Value, 4> zeros(rank, ...);

120 ↗

(On Diff #287956)

nit: Use an std::array/C array when the size is constant.

120 ↗

(On Diff #287956)

nit: The names here and below should use camelCase.

[limo1996]

mlir/include/mlir/Conversion/LinalgToVector/LinalgToVector.h

16 ↗

(On Diff #287956)

Yes. Otherwise it complains about member access into incomplete type 'mlir::PatternRewriter'. Moved it to .cpp file.

mlir/include/mlir/Conversion/LinalgToVector/LinalgToVectorPass.h

16 ↗

(On Diff #287956)

Done. But had to include "mlir/Transforms/DialectConversion.h" as done in other passes bcos it was complaining about std::.

[limo1996]

comments of rriddle addressed

[rriddle]

mlir/include/mlir/Conversion/LinalgToVector/LinalgToVectorPass.h

16 ↗

(On Diff #287956)

You can #include <memory> for unique_ptr, there is nothing from DialectConversion used here.

[limo1996]

mlir/include/mlir/Conversion/LinalgToVector/LinalgToVectorPass.h

16 ↗

(On Diff #287956)

ConversionTarget and OwningRewritePatternList are used in .cpp file

[rriddle]

mlir/include/mlir/Conversion/LinalgToVector/LinalgToVectorPass.h

16 ↗

(On Diff #287956)

Yes, you should move the include to the .cpp. Header files should really only include what is actually necessary for the header, and not what is required by the implementation.

[limo1996]

more comments of rriddle addressed

[limo1996]

mlir/include/mlir/Conversion/LinalgToVector/LinalgToVectorPass.h

16 ↗

(On Diff #287956)

Ok. Done.

[limo1996]

added missing add_subdirectory in CMakeLists

[limo1996]

fixed add_subdirectory

[limo1996]

Conversion tests added

[limo1996]

@rriddle I think I've resolved all of your comments.. Do you have some more? Thanks.

[aartbik]

Jakub, for my own understanding, did you coordinate with Nicolas before he left on vacation? The reason I am asking is that he had planned something very similar, and I want to make sure if this is the result of those ideas, or something else? Somewhat more background would help here.

[limo1996]

I haven't sync with him regarding implementation details but I think he has an overview of what my goal is and how do I want to achieve it as he is my co-host.

[nicolasvasilache]

This is not how I was imagining convolution to be lowered in a first stab.
I was expecting 1. taking subviews, 2. either using reshape or extending subviews to allow it to be rank-reducing, 3. rewrite as a linalg.matmul and reuse the existing vectorization patterns.

This revision wants to introduce a vectorization pass with assumptions that look fishy to me.
I have left some comments assuming we're taking the route of direct vectorization of convolutions.

In any case we should have a VC to discuss these assumptions that I have not followed and how they differ from the existing work based on promotion + static shapes + vectorization + forwarding patterns.

Also + @asaadaldien who has started looking at similar things for depthwise convolutions on mobile.

mlir/include/mlir/Conversion/LinalgToVector/LinalgToVectorPass.h

1 ↗

(On Diff #288869)

It is way too premature to call this a new Linalg pass.
The type of assumptions that are hardcoded in the pass suggest that this should be a test pass in test/lib that applies the patterns.
Too many things can break to accept this as a core pass atm.

mlir/integration_test/Dialect/Linalg/Conv/test-conv-2d-call.mlir

52

All these tests only work as expected because all the filters are 3x...x3.

mlir/lib/Conversion/LinalgToVector/LinalgToVector.cpp

30 ↗

(On Diff #288869)

It should not just expect it: the pattern must fail to apply when the dimensions you expect to be 1 are not 1.
If you look at how the vectorization patterns for contraction ops are implemented, the precondition is that all shapes are static.
Then the proper vector.transfer and vector.contract are introduced with those sizes.

I find that the expectations of these conversions are adhoc and can lead to miscompiles since they are not checked.

82 ↗

(On Diff #288869)

Please us UpperCamelCase for template parameters

82 ↗

(On Diff #288869)

[StartOffset, N - EndOffset) only allow encoding a contiguous set of dimensions.
In practice this seems enough but I am wondering if it would be more idiomatic to just pass an array of booleans at construction time to make things more idiomatic and future-proof.

Then we can use that array as a filter to determine which dimensions are vectorized.
In particular, I don't see why the choice is made here to only vectorize reduction dimensions

89 ↗

(On Diff #288869)

Why is the vector size hardcoded to always being 3 ?
This is generally incorrect (e.g. convolutions with size 5 kernels).

Note that this is a quite fundamental issue because this hardcoded 3 also serves as a magic typecast that turns a dynamic problem into a static one in:

%22 = vector.transfer_read %19[%c0, %c0, %c0, %c0], %c0_f32  : memref<?x?x?x?xf32>, vector<3x3x3xf32>

125 ↗

(On Diff #288869)

This just assumes the only dimensions that will be used are [startOffset, startOffset + numDims) and that they are reductions.
This is prone to errors.

It would be better to have something more robust and more adaptive that extracts the information from the op and that performs necessary checks / assertions.

Additionally, it is unclear to me why the decision has been taken and hardcoded to always vectorize exactly the reduction dimensions.
Vectorizing only the reduction dimensions is not expected to perform well: one can only use flat reductions and misses out on FMAs (so the perf is capped to 50% peak from the get go). Instead I would expect that you'd want to also vectorize along batch and channel dimensions when available. This gives additional parallel dimensions which have a chance of getting near peak.

Still even with mixing parallel and reduction dimensions, I expect that reducing to linalg.matmul first is a simpler path to perf.

[limo1996]

Moved pass to test/lib.
Replaced start and end offset with Mask.
Introduced preconditions for input and kernel sizes.
Reflected changes in tests.

[nicolasvasilache]

Looks good, thanks @limo1996 !

mlir/test/lib/Transforms/TestConvVectorization.cpp

33

doc is now stale, please revisit.

90

lowerCamelCase plz; e.g. mask = msk;

111

Plz add a few words to document preconditions.

117

Remove spurious braces.

193

Everything above deserves to be in core, more precisely in Linalg/Vectorization.cpp.
Only the test pass (i.e. l192 - EOF) should be here.

[asaadaldien]

In D86619#2249212, @nicolasvasilache wrote:

This is not how I was imagining convolution to be lowered in a first stab.
I was expecting 1. taking subviews, 2. either using reshape or extending subviews to allow it to be rank-reducing, 3. rewrite as a linalg.matmul and reuse the existing vectorization patterns.

This revision wants to introduce a vectorization pass with assumptions that look fishy to me.
I have left some comments assuming we're taking the route of direct vectorization of convolutions.

In any case we should have a VC to discuss these assumptions that I have not followed and how they differ from the existing work based on promotion + static shapes + vectorization + forwarding patterns.

Also + @asaadaldien who has started looking at similar things for depthwise convolutions on mobile.

I agree with @nicolasvasilache mapping conv into matmul is going to first step to get faster conv.
What I found vectorizing the reduction over inner dim is something can be done automatically with llvm loop auto vectorization.

[limo1996]

All comments except for the migration to Linalg/Vectorization.cpp resolved.

[limo1996]

Moved conversion to core (kept only pass).
Removed getZero helper function.
Simplified code with vector and std intrinsics op creation.

[limo1996]

integration tests split into different commit

[nicolasvasilache]

Thanks !

[ftynse]

mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp

374 ↗

(On Diff #290431)

uint is not a C++ type.

[rriddle]

mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h

573 ↗

(On Diff #290431)

nit: Can you put this in the private section and make this a class? Classes exposed in headers should have a clean interface.

mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp

374 ↗

(On Diff #290431)

nit: Don't mark value-typed things like this as const when used in a function.

[limo1996]

mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h

573 ↗

(On Diff #290431)

Yes sure. Shall I create new revision for that?

mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp

374 ↗

(On Diff #290431)

It cause build failure so I fixed it without review here: https://github.com/llvm/llvm-project/commit/83d82d1fb1cfac06257ebbd7c063a3d2d1af20fb

[limo1996]

mlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h

573 ↗

(On Diff #290431)

Fixed here: https://reviews.llvm.org/D87354

mlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp

374 ↗

(On Diff #290431)

Fixed here: https://reviews.llvm.org/D87354

mlir/integration_test/Dialect/Linalg/Conv/test-conv-1d-call.mlir

+// RUN: mlir-opt %s -convert-linalg-to-loops -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=4" -convert-linalg-to-loops \
+// RUN:   -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=1" -test-conv-vectorization \
+// RUN:   -convert-linalg-to-loops -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=4" -linalg-tile="linalg-tile-sizes=1" \
+// RUN:   -test-conv-vectorization -convert-linalg-to-loops \
+// RUN:   -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+func @print_memref_f32(memref<*xf32>)
+
+// Creates and returns a 1-D buffer of size %s1 filled with the value %f
+func @alloc_1d_filled_f32(%s1 : index, %f : f32) -> memref<?xf32> {
+  %buf = alloc(%s1) : memref<?xf32>
+  linalg.fill(%buf, %f) : memref<?xf32>, f32
+  return %buf : memref<?xf32>
+}
+
+func @conv_1d(%arg0: memref<?xf32>, %arg1: memref<?xf32>, %arg2: memref<?xf32>) {
+  linalg.conv_1d %arg0, %arg1, %arg2 : (memref<?xf32>, memref<?xf32>, memref<?xf32>)
+  return
+}
+
+func @main() {
+  %c3 = constant 3 : index
+  %c6 = constant 6 : index
+  %c8 = constant 8 : index
+  %f10 = constant 10.00000e+00 : f32
+  %val = constant 2.00000e+00 : f32
+  %zero = constant 0.00000e+00 : f32
+
+  %filter1D = call @alloc_1d_filled_f32(%c3, %val) : (index, f32) -> (memref<?xf32>)
+  %in1D = call @alloc_1d_filled_f32(%c8, %val) : (index, f32) -> (memref<?xf32>)
+  %out1D = call @alloc_1d_filled_f32(%c6, %zero) : (index, f32) -> (memref<?xf32>)
+
+  store %f10, %in1D[%c3] : memref<?xf32>
+  call @conv_1d(%in1D, %filter1D, %out1D) : (memref<?xf32>, memref<?xf32>, memref<?xf32>) -> ()
+  %out1D_ = memref_cast %out1D : memref<?xf32> to memref<*xf32>
+  call @print_memref_f32(%out1D_): (memref<*xf32>) -> ()
+
+  dealloc %filter1D : memref<?xf32>
+  dealloc %in1D : memref<?xf32>
+  dealloc %out1D : memref<?xf32>
+  return
+}
+
+// CHECK:       Unranked Memref {{.*}}
+// CHECK-NEXT:  [12, 28, 28, 28, 12, 12]

mlir/integration_test/Dialect/Linalg/Conv/test-conv-1d-ncw-call.mlir

+// RUN: mlir-opt %s -convert-linalg-to-loops -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=0,0,4" -convert-linalg-to-loops \
+// RUN:   -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=1,1,1" -test-conv-vectorization \
+// RUN:   -convert-linalg-to-loops -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=0,0,4" -linalg-tile="linalg-tile-sizes=1,1,1" \
+// RUN:   -test-conv-vectorization -convert-linalg-to-loops \
+// RUN:   -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+func @print_memref_f32(memref<*xf32>)
+
+// Creates and returns 3-D buffer of size (%s1, %s2, %s3) filled with the value %f
+func @alloc_3d_filled_f32(%s1 : index, %s2 : index, %s3 : index, %f : f32) -> memref<?x?x?xf32> {
+  %buf = alloc(%s1, %s2, %s3) : memref<?x?x?xf32>
+  linalg.fill(%buf, %f) : memref<?x?x?xf32>, f32
+  return %buf : memref<?x?x?xf32>
+}
+
+func @conv_1d_ncw(%arg0: memref<?x?x?xf32>, %arg1: memref<?x?x?xf32>, %arg2: memref<?x?x?xf32>) {
+  linalg.conv_1d_ncw %arg0, %arg1, %arg2 : (memref<?x?x?xf32>, memref<?x?x?xf32>, memref<?x?x?xf32>)
+  return
+}
+
+func @main() {
+  %c0 = constant 0 : index
+  %c1 = constant 1 : index
+  %c3 = constant 3 : index
+  %c6 = constant 6 : index
+  %c8 = constant 8 : index
+  %f10 = constant 10.00000e+00 : f32
+  %val = constant 2.00000e+00 : f32
+  %zero = constant 0.00000e+00 : f32
+
+  %filter1D_ncw = call @alloc_3d_filled_f32(%c1, %c1, %c3, %val) : (index, index, index, f32) -> (memref<?x?x?xf32>)
+  %in1D_ncw = call @alloc_3d_filled_f32(%c1, %c1, %c8, %val) : (index, index, index, f32) -> (memref<?x?x?xf32>)
+  %out1D_ncw = call @alloc_3d_filled_f32(%c1, %c1, %c6, %zero) : (index, index, index, f32) -> (memref<?x?x?xf32>)
+
+  store %f10, %in1D_ncw[%c0, %c0, %c3] : memref<?x?x?xf32>
+  call @conv_1d_ncw(%in1D_ncw, %filter1D_ncw, %out1D_ncw) : (memref<?x?x?xf32>, memref<?x?x?xf32>, memref<?x?x?xf32>) -> ()
+  %out1D_ncw_ = memref_cast %out1D_ncw : memref<?x?x?xf32> to memref<*xf32>
+  call @print_memref_f32(%out1D_ncw_): (memref<*xf32>) -> ()
+
+  dealloc %filter1D_ncw : memref<?x?x?xf32>
+  dealloc %in1D_ncw : memref<?x?x?xf32>
+  dealloc %out1D_ncw : memref<?x?x?xf32>
+  return
+}
+
+// CHECK:       Unranked Memref {{.*}}
+// CHECK-NEXT:  [
+// CHECK-SAME:   [
+// CHECK-SAME:    [12, 28, 28, 28, 12, 12]
+// CHECK-SAME:   ]
+// CHECK-SAME:  ]

mlir/integration_test/Dialect/Linalg/Conv/test-conv-1d-nwc-call.mlir

+// RUN: mlir-opt %s -convert-linalg-to-loops -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=2,4" -convert-linalg-to-loops \
+// RUN:   -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=1,1,1" -test-conv-vectorization \
+// RUN:   -convert-linalg-to-loops -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=2,4" -linalg-tile="linalg-tile-sizes=1,1,1" \
+// RUN:   -test-conv-vectorization -convert-linalg-to-loops \
+// RUN:   -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+func @print_memref_f32(memref<*xf32>)
+
+// Creates and returns 3-D buffer of size (%s1, %s2, %s3) filled with the value %f
+func @alloc_3d_filled_f32(%s1 : index, %s2 : index, %s3 : index, %f : f32) -> memref<?x?x?xf32> {
+  %buf = alloc(%s1, %s2, %s3) : memref<?x?x?xf32>
+  linalg.fill(%buf, %f) : memref<?x?x?xf32>, f32
+  return %buf : memref<?x?x?xf32>
+}
+
+func @conv_1d_nwc(%arg0: memref<?x?x?xf32>, %arg1: memref<?x?x?xf32>, %arg2: memref<?x?x?xf32>) {
+  linalg.conv_1d_nwc %arg0, %arg1, %arg2 : (memref<?x?x?xf32>, memref<?x?x?xf32>, memref<?x?x?xf32>)
+  return
+}
+
+func @main() {
+  %c0 = constant 0 : index
+  %c1 = constant 1 : index
+  %c3 = constant 3 : index
+  %c6 = constant 6 : index
+  %c8 = constant 8 : index
+  %f10 = constant 10.00000e+00 : f32
+  %val = constant 2.00000e+00 : f32
+  %zero = constant 0.00000e+00 : f32
+
+  %filter1D_nwc = call @alloc_3d_filled_f32(%c1, %c3, %c1, %val) : (index, index, index, f32) -> (memref<?x?x?xf32>)
+  %in1D_nwc = call @alloc_3d_filled_f32(%c3, %c8, %c1, %val) : (index, index, index, f32) -> (memref<?x?x?xf32>)
+  %out1D_nwc = call @alloc_3d_filled_f32(%c3, %c6, %c1, %zero) : (index, index, index, f32) -> (memref<?x?x?xf32>)
+
+  store %f10, %in1D_nwc[%c0, %c3, %c0] : memref<?x?x?xf32>
+  call @conv_1d_nwc(%in1D_nwc, %filter1D_nwc, %out1D_nwc) : (memref<?x?x?xf32>, memref<?x?x?xf32>, memref<?x?x?xf32>) -> ()
+  %out1D_nwc_ = memref_cast %out1D_nwc : memref<?x?x?xf32> to memref<*xf32>
+  call @print_memref_f32(%out1D_nwc_): (memref<*xf32>) -> ()
+
+  dealloc %filter1D_nwc : memref<?x?x?xf32>
+  dealloc %in1D_nwc : memref<?x?x?xf32>
+  dealloc %out1D_nwc : memref<?x?x?xf32>
+  return
+}
+
+// CHECK:       Unranked Memref {{.*}}
+// CHECK-NEXT:  [
+// CHECK-SAME:   [
+// CHECK-SAME:    [12],
+// CHECK-COUNT-3: [28],
+// CHECK-NEXT:    [12],
+// CHECK-NEXT:    [12]
+// CHECK-SAME:   ],
+// CHECK-NEXT:   [
+// CHECK-COUNT-5: [12],
+// CHECK-NEXT:    [12]
+// CHECK-SAME:   ],
+// CHECK-NEXT:   [
+// CHECK-COUNT-5: [12],
+// CHECK-NEXT:    [12]
+// CHECK-SAME:   ]
+// CHECK-SAME:  ]

mlir/integration_test/Dialect/Linalg/Conv/test-conv-2d-call.mlir

+// RUN: mlir-opt %s -convert-linalg-to-loops -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=2,2" -convert-linalg-to-loops \
+// RUN:   -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=1,1" -test-conv-vectorization \
+// RUN:   -convert-linalg-to-loops -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=2,2" -linalg-tile="linalg-tile-sizes=1,1" \
+// RUN:   -test-conv-vectorization -convert-linalg-to-loops \
+// RUN:   -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+func @print_memref_f32(memref<*xf32>)
+
+// Creates and returns a 2-D buffer of size (%s1, %s2) filled with the value %f
+func @alloc_2d_filled_f32(%s1 : index, %s2 : index, %f : f32) -> memref<?x?xf32> {
+  %buf = alloc(%s1, %s2) : memref<?x?xf32>
+  linalg.fill(%buf, %f) : memref<?x?xf32>, f32
+  return %buf : memref<?x?xf32>
+}
+
+func @conv_2d(%arg0: memref<?x?xf32>, %arg1: memref<?x?xf32>, %arg2: memref<?x?xf32>) {
+  linalg.conv_2d %arg0, %arg1, %arg2 : (memref<?x?xf32>, memref<?x?xf32>, memref<?x?xf32>)
+  return
+}
+
+func @main() {
+  %c0 = constant 0 : index
+  %c1 = constant 1 : index
+  %c3 = constant 3 : index
+  %c6 = constant 6 : index
+  %c8 = constant 8 : index
+  %f10 = constant 10.00000e+00 : f32
+  %val = constant 2.00000e+00 : f32
+  %zero = constant 0.00000e+00 : f32
+
+  %filter2D = call @alloc_2d_filled_f32(%c3, %c3, %val) : (index, index, f32) -> (memref<?x?xf32>)
+  %in2D = call @alloc_2d_filled_f32(%c8, %c8, %val) : (index, index, f32) -> (memref<?x?xf32>)
+  %out2D = call @alloc_2d_filled_f32(%c6, %c6, %zero) : (index, index, f32) -> (memref<?x?xf32>)
+
+  store %f10, %in2D[%c0, %c3] : memref<?x?xf32>
+  call @conv_2d(%in2D, %filter2D, %out2D) : (memref<?x?xf32>, memref<?x?xf32>, memref<?x?xf32>) -> ()
+  %out2D_ = memref_cast %out2D : memref<?x?xf32> to memref<*xf32>
+  call @print_memref_f32(%out2D_): (memref<*xf32>) -> ()
+
+  dealloc %filter2D : memref<?x?xf32>
+  dealloc %in2D : memref<?x?xf32>
+  dealloc %out2D : memref<?x?xf32>
+  return
+}
+
+// CHECK:        Unranked Memref {{.*}}
+// CHECK-NEXT:   [
+// CHECK-SAME:    [36,   52,   52,   52,   36,   36],
+// CHECK-COUNT-5: [36,   36,   36,   36,   36,   36]
+// CHECK-SAME:   ]

mlir/integration_test/Dialect/Linalg/Conv/test-conv-2d-nchw-call.mlir

+// RUN: mlir-opt %s -convert-linalg-to-loops -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=2,0,4,4" -convert-linalg-to-loops \
+// RUN:   -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=1,1,1,1" -test-conv-vectorization \
+// RUN:   -convert-linalg-to-loops -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=2,0,4,4" -linalg-tile="linalg-tile-sizes=1,1,1,1" \
+// RUN:   -test-conv-vectorization -convert-linalg-to-loops \
+// RUN:   -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+func @print_memref_f32(memref<*xf32>)
+
+// Creates and returns 4-D buffer of size (%s1, %s2, %s3, %s4) filled with the value %f
+func @alloc_4d_filled_f32(%s1 : index, %s2 : index, %s3 : index, %s4 : index, %f : f32) -> memref<?x?x?x?xf32> {
+  %buf = alloc(%s1, %s2, %s3, %s4) : memref<?x?x?x?xf32>
+  linalg.fill(%buf, %f) : memref<?x?x?x?xf32>, f32
+  return %buf : memref<?x?x?x?xf32>
+}
+
+func @conv_2d_nchw(%arg0: memref<?x?x?x?xf32>, %arg1: memref<?x?x?x?xf32>, %arg2: memref<?x?x?x?xf32>) {
+  linalg.conv_2d_nchw %arg0, %arg1, %arg2 : (memref<?x?x?x?xf32>, memref<?x?x?x?xf32>, memref<?x?x?x?xf32>)
+  return
+}
+
+func @main() {
+  %c0 = constant 0 : index
+  %c1 = constant 1 : index
+  %c3 = constant 3 : index
+  %c6 = constant 6 : index
+  %c8 = constant 8 : index
+  %f10 = constant 10.00000e+00 : f32
+  %val = constant 2.00000e+00 : f32
+  %zero = constant 0.00000e+00 : f32
+
+  %filter2D_nchw = call @alloc_4d_filled_f32(%c1, %c1, %c3, %c3, %val) : (index, index, index, index, f32) -> (memref<?x?x?x?xf32>)
+  %in2D_nchw = call @alloc_4d_filled_f32(%c3, %c1, %c8, %c8, %val) : (index, index, index, index, f32) -> (memref<?x?x?x?xf32>)
+  %out2D_nchw = call @alloc_4d_filled_f32(%c3, %c1, %c6, %c6, %zero) : (index, index, index, index, f32) -> (memref<?x?x?x?xf32>)
+
+  store %f10, %in2D_nchw[%c0, %c0, %c0, %c3] : memref<?x?x?x?xf32>
+  call @conv_2d_nchw(%in2D_nchw, %filter2D_nchw, %out2D_nchw) : (memref<?x?x?x?xf32>, memref<?x?x?x?xf32>, memref<?x?x?x?xf32>) -> ()
+  %out2D_nchw_ = memref_cast %out2D_nchw : memref<?x?x?x?xf32> to memref<*xf32>
+  call @print_memref_f32(%out2D_nchw_): (memref<*xf32>) -> ()
+
+  dealloc %filter2D_nchw : memref<?x?x?x?xf32>
+  dealloc %in2D_nchw : memref<?x?x?x?xf32>
+  dealloc %out2D_nchw : memref<?x?x?x?xf32>
+  return
+}
+
+// CHECK:       Unranked Memref {{.*}}
+// CHECK-NEXT:  [
+// CHECK-SAME:   [
+// CHECK-SAME:    [
+// CHECK-SAME:     [36,     52,     52,     52,     36,     36],
+// CHECK-COUNT-5:  [36,     36,     36,     36,     36,     36]
+// CHECK-SAME:    ]
+// CHECK-SAME:   ],
+// CHECK-NEXT:   [
+// CHECK-SAME:    [
+// CHECK-COUNT-6:  [36,     36,     36,     36,     36,     36]
+// CHECK-SAME:    ]
+// CHECK-SAME:   ],
+// CHECK-NEXT:   [
+// CHECK-SAME:    [
+// CHECK-COUNT-6:  [36,     36,     36,     36,     36,     36]
+// CHECK-SAME:    ]
+// CHECK-SAME:   ]
+// CHECK-SAME:  ]

mlir/integration_test/Dialect/Linalg/Conv/test-conv-2d-nhwc-call.mlir

+// RUN: mlir-opt %s -convert-linalg-to-loops -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=2,3,3,2" -convert-linalg-to-loops \
+// RUN:   -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=1,1,1,1" -test-conv-vectorization \
+// RUN:   -convert-linalg-to-loops -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=2,3,3,2" -linalg-tile="linalg-tile-sizes=1,1,1,1" \
+// RUN:   -test-conv-vectorization -convert-linalg-to-loops \
+// RUN:   -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+func @print_memref_f32(memref<*xf32>)
+
+// Creates and returns 4-D buffer of size (%s1, %s2, %s3, %s4) filled with the value %f
+func @alloc_4d_filled_f32(%s1 : index, %s2 : index, %s3 : index, %s4 : index, %f : f32) -> memref<?x?x?x?xf32> {
+  %buf = alloc(%s1, %s2, %s3, %s4) : memref<?x?x?x?xf32>
+  linalg.fill(%buf, %f) : memref<?x?x?x?xf32>, f32
+  return %buf : memref<?x?x?x?xf32>
+}
+
+func @conv_2d_nhwc(%arg0: memref<?x?x?x?xf32>, %arg1: memref<?x?x?x?xf32>, %arg2: memref<?x?x?x?xf32>) {
+  linalg.conv_2d_nhwc %arg0, %arg1, %arg2 : (memref<?x?x?x?xf32>, memref<?x?x?x?xf32>, memref<?x?x?x?xf32>)
+  return
+}
+
+func @main() {
+  %c0 = constant 0 : index
+  %c1 = constant 1 : index
+  %c3 = constant 3 : index
+  %c6 = constant 6 : index
+  %c8 = constant 8 : index
+  %f10 = constant 10.00000e+00 : f32
+  %val = constant 2.00000e+00 : f32
+  %zero = constant 0.00000e+00 : f32
+
+  %filter2D_nhwc = call @alloc_4d_filled_f32(%c1, %c3, %c3, %c3, %val) :(index, index, index, index, f32) -> (memref<?x?x?x?xf32>)
+  %in2D_nhwc = call @alloc_4d_filled_f32(%c3, %c8, %c8, %c3, %val) : (index, index, index, index, f32) -> (memref<?x?x?x?xf32>)
+  %out2D_nhwc = call @alloc_4d_filled_f32(%c3, %c6, %c6, %c1, %zero) : (index, index, index, index, f32) -> (memref<?x?x?x?xf32>)
+
+  store %f10, %in2D_nhwc[%c0, %c0, %c3, %c0] : memref<?x?x?x?xf32>
+  call @conv_2d_nhwc(%in2D_nhwc, %filter2D_nhwc, %out2D_nhwc) : (memref<?x?x?x?xf32>, memref<?x?x?x?xf32>, memref<?x?x?x?xf32>) -> ()
+  %out2D_nhwc_ = memref_cast %out2D_nhwc : memref<?x?x?x?xf32> to memref<*xf32>
+  call @print_memref_f32(%out2D_nhwc_): (memref<*xf32>) -> ()
+
+  dealloc %filter2D_nhwc : memref<?x?x?x?xf32>
+  dealloc %in2D_nhwc : memref<?x?x?x?xf32>
+  dealloc %out2D_nhwc : memref<?x?x?x?xf32>
+  return
+}
+
+// CHECK:       Unranked Memref {{.*}}
+// CHECK-NEXT:  [
+// CHECK-SAME:   [
+// CHECK-SAME:    [
+// CHECK-SAME:     [108],
+// CHECK-COUNT-3:  [124],
+// CHECK-COUNT-2:  [108]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ]
+// CHECK-SAME:   ],
+// CHECK-NEXT:   [
+// CHECK-SAME:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ]
+// CHECK-SAME:   ],
+// CHECK-NEXT:   [
+// CHECK-SAME:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-COUNT-6:  [108]
+// CHECK-SAME:    ]
+// CHECK-SAME:   ]
+// CHECK-SAME:  ]

mlir/integration_test/Dialect/Linalg/Conv/test-conv-3d-call.mlir

+// RUN: mlir-opt %s -convert-linalg-to-loops -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=2,2,2" -convert-linalg-to-loops \
+// RUN:   -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=1,1,1" -test-conv-vectorization \
+// RUN:   -convert-linalg-to-loops -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=2,2,2" -linalg-tile="linalg-tile-sizes=1,1,1" \
+// RUN:   -test-conv-vectorization -convert-linalg-to-loops \
+// RUN:   -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+func @print_memref_f32(memref<*xf32>)
+
+// Creates and returns 3-D buffer of size (%s1, %s2, %s3) filled with the value %f
+func @alloc_3d_filled_f32(%s1 : index, %s2 : index, %s3 : index, %f : f32) -> memref<?x?x?xf32> {
+  %buf = alloc(%s1, %s2, %s3) : memref<?x?x?xf32>
+  linalg.fill(%buf, %f) : memref<?x?x?xf32>, f32
+  return %buf : memref<?x?x?xf32>
+}
+
+func @conv_3d(%arg0: memref<?x?x?xf32>, %arg1: memref<?x?x?xf32>, %arg2: memref<?x?x?xf32>) {
+  linalg.conv_3d %arg0, %arg1, %arg2 : (memref<?x?x?xf32>, memref<?x?x?xf32>, memref<?x?x?xf32>)
+  return
+}
+
+func @main() {
+  %c0 = constant 0 : index
+  %c1 = constant 1 : index
+  %c3 = constant 3 : index
+  %c6 = constant 6 : index
+  %c8 = constant 8 : index
+  %f10 = constant 10.00000e+00 : f32
+  %val = constant 2.00000e+00 : f32
+  %zero = constant 0.00000e+00 : f32
+
+  %filter3D = call @alloc_3d_filled_f32(%c3, %c3, %c3, %val) : (index, index, index, f32) -> (memref<?x?x?xf32>)
+  %in3D = call @alloc_3d_filled_f32(%c8, %c8, %c8, %val) : (index, index, index, f32) -> (memref<?x?x?xf32>)
+  %out3D = call @alloc_3d_filled_f32(%c6, %c6, %c6, %zero) : (index, index, index, f32) -> (memref<?x?x?xf32>)
+
+  store %f10, %in3D[%c0, %c0, %c3] : memref<?x?x?xf32>
+  call @conv_3d(%in3D, %filter3D, %out3D) : (memref<?x?x?xf32>, memref<?x?x?xf32>, memref<?x?x?xf32>) -> ()
+  %out3D_ = memref_cast %out3D : memref<?x?x?xf32> to memref<*xf32>
+  call @print_memref_f32(%out3D_): (memref<*xf32>) -> ()
+
+  dealloc %filter3D : memref<?x?x?xf32>
+  dealloc %in3D : memref<?x?x?xf32>
+  dealloc %out3D : memref<?x?x?xf32>
+  return
+}
+
+// CHECK:       Unranked Memref {{.*}}
+// CHECK-NEXT:  [
+// CHECK-SAME:   [
+// CHECK-SAME:    [108,    124,    124,    124,    108,    108],
+// CHECK-COUNT-5: [108,    108,    108,    108,    108,    108]
+// CHECK-SAME:   ],
+// CHECK-NEXT:   [
+// CHECK-COUNT-6: [108,    108,    108,    108,    108,    108]
+// CHECK-SAME:   ],
+// CHECK-NEXT:   [
+// CHECK-COUNT-6: [108,    108,    108,    108,    108,    108]
+// CHECK-SAME:   ],
+// CHECK-NEXT:   [
+// CHECK-COUNT-6: [108,    108,    108,    108,    108,    108]
+// CHECK-SAME:   ],
+// CHECK-NEXT:   [
+// CHECK-COUNT-6: [108,    108,    108,    108,    108,    108]
+// CHECK-SAME:   ],
+// CHECK-NEXT:   [
+// CHECK-COUNT-6: [108,    108,    108,    108,    108,    108]
+// CHECK-SAME:   ]
+// CHECK-SAME:  ]

mlir/integration_test/Dialect/Linalg/Conv/test-conv-3d-ncdhw-call.mlir

+// RUN: mlir-opt %s -convert-linalg-to-loops -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=0,0,5,5,5" -convert-linalg-to-loops \
+// RUN:   -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=1,1,1,1,1" -test-conv-vectorization \
+// RUN:   -convert-linalg-to-loops -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=0,0,5,5,5" -linalg-tile="linalg-tile-sizes=1,1,1,1,1" \
+// RUN:   -test-conv-vectorization -convert-linalg-to-loops \
+// RUN:   -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+func @print_memref_f32(memref<*xf32>)
+
+// Creates and returns 5-D buffer of size (%s1, %s2, %s3, %s4, %s5) filled with the value %f
+func @alloc_5d_filled_f32(%s1 : index, %s2 : index, %s3 : index, %s4 : index, %s5 : index, %f : f32) -> memref<?x?x?x?x?xf32> {
+  %buf = alloc(%s1, %s2, %s3, %s4, %s5) : memref<?x?x?x?x?xf32>
+  linalg.fill(%buf, %f) : memref<?x?x?x?x?xf32>, f32
+  return %buf : memref<?x?x?x?x?xf32>
+}
+
+func @conv_3d_ncdhw(%arg0: memref<?x?x?x?x?xf32>, %arg1: memref<?x?x?x?x?xf32>, %arg2: memref<?x?x?x?x?xf32>) {
+  linalg.conv_3d_ncdhw %arg0, %arg1, %arg2 : (memref<?x?x?x?x?xf32>, memref<?x?x?x?x?xf32>, memref<?x?x?x?x?xf32>)
+  return
+}
+
+func @main() {
+  %c0 = constant 0 : index
+  %c1 = constant 1 : index
+  %c3 = constant 3 : index
+  %c6 = constant 6 : index
+  %c8 = constant 8 : index
+  %f10 = constant 10.00000e+00 : f32
+  %val = constant 2.00000e+00 : f32
+  %zero = constant 0.00000e+00 : f32
+
+  %filter3D_ncdhw = call @alloc_5d_filled_f32(%c1, %c1, %c3, %c3, %c3, %val) : (index, index, index, index, index, f32) -> (memref<?x?x?x?x?xf32>)
+  %in3D_ncdhw = call @alloc_5d_filled_f32(%c1, %c1, %c8, %c8, %c8, %val) : (index, index, index, index, index, f32) -> (memref<?x?x?x?x?xf32>)
+  %out3D_ncdhw = call @alloc_5d_filled_f32(%c1, %c1, %c6, %c6, %c6, %zero) : (index, index, index, index, index, f32) -> (memref<?x?x?x?x?xf32>)
+
+  store %f10, %in3D_ncdhw[%c0, %c0, %c0, %c0, %c3] : memref<?x?x?x?x?xf32>
+  call @conv_3d_ncdhw(%in3D_ncdhw, %filter3D_ncdhw, %out3D_ncdhw) : (memref<?x?x?x?x?xf32>, memref<?x?x?x?x?xf32>, memref<?x?x?x?x?xf32>) -> ()
+  %out3D_ncdhw_ = memref_cast %out3D_ncdhw : memref<?x?x?x?x?xf32> to memref<*xf32>
+  call @print_memref_f32(%out3D_ncdhw_): (memref<*xf32>) -> ()
+
+  dealloc %filter3D_ncdhw : memref<?x?x?x?x?xf32>
+  dealloc %in3D_ncdhw : memref<?x?x?x?x?xf32>
+  dealloc %out3D_ncdhw : memref<?x?x?x?x?xf32>
+  return
+}
+
+// CHECK:       Unranked Memref {{.*}}
+// CHECK-NEXT:  [
+// CHECK-SAME:   [
+// CHECK-SAME:    [
+// CHECK-SAME:     [
+// CHECK-SAME:      [108,      124,      124,      124,      108,      108],
+// CHECK-COUNT-5:   [108,      108,      108,      108,      108,      108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108,      108,      108,      108,      108,      108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108,      108,      108,      108,      108,      108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108,      108,      108,      108,      108,      108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108,      108,      108,      108,      108,      108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108,      108,      108,      108,      108,      108]
+// CHECK-SAME:     ]
+// CHECK-SAME:    ]
+// CHECK-SAME:   ]
+// CHECK-SAME:  ]

mlir/integration_test/Dialect/Linalg/Conv/test-conv-3d-ndhwc-call.mlir

+// RUN: mlir-opt %s -convert-linalg-to-loops -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=0,5,5,5" -convert-linalg-to-loops \
+// RUN:   -convert-linalg-to-llvm -convert-std-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=1,1,1,1,1" -test-conv-vectorization \
+// RUN:   -convert-linalg-to-loops -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+// RUN: mlir-opt %s -linalg-tile="linalg-tile-sizes=0,5,5,5" -linalg-tile="linalg-tile-sizes=1,1,1,1,1" \
+// RUN:   -test-conv-vectorization -convert-linalg-to-loops \
+// RUN:   -test-vector-contraction-conversion=vector-outerproduct=0 \
+// RUN:   -convert-vector-to-scf -convert-linalg-to-llvm | \
+// RUN: mlir-cpu-runner -e main -entry-point-result=void \
+// RUN:   -shared-libs=%mlir_integration_test_dir/libmlir_runner_utils%shlibext \
+// RUN: | FileCheck %s
+
+func @print_memref_f32(memref<*xf32>)
+
+// Creates and returns 5-D buffer of size (%s1, %s2, %s3, %s4, %s5) filled with the value %f
+func @alloc_5d_filled_f32(%s1 : index, %s2 : index, %s3 : index, %s4 : index, %s5 : index, %f : f32) -> memref<?x?x?x?x?xf32> {
+  %buf = alloc(%s1, %s2, %s3, %s4, %s5) : memref<?x?x?x?x?xf32>
+  linalg.fill(%buf, %f) : memref<?x?x?x?x?xf32>, f32
+  return %buf : memref<?x?x?x?x?xf32>
+}
+
+func @conv_3d_ndhwc(%arg0: memref<?x?x?x?x?xf32>, %arg1: memref<?x?x?x?x?xf32>, %arg2: memref<?x?x?x?x?xf32>) {
+  linalg.conv_3d_ndhwc %arg0, %arg1, %arg2 : (memref<?x?x?x?x?xf32>, memref<?x?x?x?x?xf32>, memref<?x?x?x?x?xf32>)
+  return
+}
+
+
+func @main() {
+  %c0 = constant 0 : index
+  %c1 = constant 1 : index
+  %c3 = constant 3 : index
+  %c6 = constant 6 : index
+  %c8 = constant 8 : index
+  %f10 = constant 10.00000e+00 : f32
+  %val = constant 2.00000e+00 : f32
+  %zero = constant 0.00000e+00 : f32
+
+  %filter3D_ndhwc = call @alloc_5d_filled_f32(%c1, %c3, %c3, %c3, %c1, %val) : (index, index, index, index, index, f32) -> (memref<?x?x?x?x?xf32>)
+  %in3D_ndhwc = call @alloc_5d_filled_f32(%c1, %c8, %c8, %c8, %c1, %val) : (index, index, index, index, index, f32) -> (memref<?x?x?x?x?xf32>)
+  %out3D_ndhwc = call @alloc_5d_filled_f32(%c1, %c6, %c6, %c6, %c1, %zero) : (index, index, index, index, index, f32) -> (memref<?x?x?x?x?xf32>)
+
+  store %f10, %in3D_ndhwc[%c0, %c0, %c0, %c3, %c0] : memref<?x?x?x?x?xf32>
+  call @conv_3d_ndhwc(%in3D_ndhwc, %filter3D_ndhwc, %out3D_ndhwc) : (memref<?x?x?x?x?xf32>, memref<?x?x?x?x?xf32>, memref<?x?x?x?x?xf32>) -> ()
+  %out3D_ndhwc_ = memref_cast %out3D_ndhwc : memref<?x?x?x?x?xf32> to memref<*xf32>
+  call @print_memref_f32(%out3D_ndhwc_): (memref<*xf32>) -> ()
+
+  dealloc %filter3D_ndhwc : memref<?x?x?x?x?xf32>
+  dealloc %in3D_ndhwc : memref<?x?x?x?x?xf32>
+  dealloc %out3D_ndhwc : memref<?x?x?x?x?xf32>
+  return
+}
+
+// CHECK:       Unranked Memref {{.*}}
+// CHECK-NEXT:  [
+// CHECK-SAME:   [
+// CHECK-SAME:    [
+// CHECK-SAME:     [
+// CHECK-SAME:      [108],
+// CHECK-COUNT-3:   [124],
+// CHECK-COUNT-2:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-SAME:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-SAME:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-SAME:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-SAME:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ]
+// CHECK-SAME:    ],
+// CHECK-NEXT:    [
+// CHECK-SAME:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ],
+// CHECK-NEXT:     [
+// CHECK-COUNT-6:   [108]
+// CHECK-SAME:     ]
+// CHECK-SAME:    ]
+// CHECK-SAME:   ]
+// CHECK-SAME:  ]

mlir/test/Conversion/LinalgToVector/linalg-to-vector.mlir

+// RUN: mlir-opt %s -test-conv-vectorization --cse | FileCheck %s
+
+// CHECK-DAG:  #[[$map0:.*]] = affine_map<(d0) -> (d0)>
+// CHECK-DAG:  #[[$map1:.*]] = affine_map<(d0) -> ()>
+// CHECK-DAG:  #[[$map2:.*]] = affine_map<(d0, d1, d2) -> (d1, d2)>
+// CHECK-DAG:  #[[$map3:.*]] = affine_map<(d0, d1) -> (d0, d1)>
+// CHECK-DAG:  #[[$map4:.*]] = affine_map<(d0, d1) -> ()>
+// CHECK-DAG:  #[[$map5:.*]] = affine_map<(d0, d1, d2, d3) -> (d1, d2, d3)>
+// CHECK-DAG:  #[[$map6:.*]] = affine_map<(d0, d1, d2) -> (d0, d1, d2)>
+// CHECK-DAG:  #[[$map7:.*]] = affine_map<(d0, d1, d2) -> ()>
+// CHECK-DAG:  #[[$map8:.*]] = affine_map<(d0, d1, d2, d3, d4) -> (d1, d2, d3, d4)>
+// CHECK-DAG:  #[[$map9:.*]] = affine_map<(d0, d1, d2, d3) -> (d0, d1, d2, d3)>
+// CHECK-DAG:  #[[$map10:.*]] = affine_map<(d0, d1, d2, d3) -> ()>
+
+func @conv_1d(%arg0: memref<3xf32>, %arg1: memref<3xf32>, %arg2: memref<?xf32>) {
+  linalg.conv_1d %arg0, %arg1, %arg2 : (memref<3xf32>, memref<3xf32>, memref<?xf32>)
+  return
+}
+
+// CHECK-LABEL: @conv_1d
+//  CHECK-SAME: %[[arg0:[a-zA-Z0-9]+]]: memref<3xf32>
+//  CHECK-SAME: %[[arg1:[a-zA-Z0-9]+]]: memref<3xf32>
+//  CHECK-SAME: %[[arg2:[a-zA-Z0-9]+]]: memref<?xf32
+//       CHECK:   %[[c0:.*]] = constant 0 : index
+//       CHECK:   %[[cst:.*]] = constant 0.000000e+00 : f32
+//       CHECK:   %[[v0:.*]] = vector.transfer_read %[[arg0]][%[[c0]]], %[[cst]] : memref<3xf32>, vector<3xf32>
+//       CHECK:   %[[v1:.*]] = vector.transfer_read %[[arg1]][%[[c0]]], %[[cst]] : memref<3xf32>, vector<3xf32>
+//       CHECK:   %[[v2:.*]] = vector.contract {indexing_maps = [#[[$map0]], #[[$map0]], #[[$map1]]], iterator_types = ["reduction"]} %[[v0]], %[[v1]], %[[cst]] : vector<3xf32>, vector<3xf32> into f32
+//       CHECK:   store %[[v2]], %[[arg2]][%[[c0]]] : memref<?xf32>
+//       CHECK:   return
+
+func @conv_1d_ncw(%arg0: memref<1x3x3xf32>, %arg1: memref<1x3x3xf32>, %arg2: memref<?x?x?xf32>) {
+  linalg.conv_1d_ncw %arg0, %arg1, %arg2 : (memref<1x3x3xf32>, memref<1x3x3xf32>, memref<?x?x?xf32>)
+  return
+}
+
+// CHECK-LABEL: @conv_1d_ncw
+//  CHECK-SAME: %[[arg0:[a-zA-Z0-9]+]]: memref<1x3x3xf32>
+//  CHECK-SAME: %[[arg1:[a-zA-Z0-9]+]]: memref<1x3x3xf32>
+//  CHECK-SAME: %[[arg2:[a-zA-Z0-9]+]]: memref<?x?x?xf32
+//       CHECK:   %[[c0:.*]] = constant 0 : index
+//       CHECK:   %[[cst:.*]] = constant 0.000000e+00 : f32
+//       CHECK:   %[[v0:.*]] = vector.transfer_read %[[arg0]][%[[c0]], %[[c0]], %[[c0]]], %[[cst]] : memref<1x3x3xf32>, vector<3x3xf32>
+//       CHECK:   %[[v1:.*]] = vector.transfer_read %[[arg1]][%[[c0]], %[[c0]], %[[c0]]], %[[cst]] : memref<1x3x3xf32>, vector<3x3xf32>
+//       CHECK:   %[[v2:.*]] = vector.contract {indexing_maps = [#[[$map3]], #[[$map3]], #[[$map4]]], iterator_types = ["reduction", "reduction"]} %[[v0]], %[[v1]], %[[cst]] : vector<3x3xf32>, vector<3x3xf32> into f32
+//       CHECK:   store %[[v2]], %[[arg2]][%[[c0]], %[[c0]], %[[c0]]] : memref<?x?x?xf32>
+//       CHECK:   return
+
+
+func @conv_1d_nwc(%arg0: memref<1x3x3xf32>, %arg1: memref<1x3x3xf32>, %arg2: memref<?x?x?xf32>) {
+  linalg.conv_1d_nwc %arg0, %arg1, %arg2 : (memref<1x3x3xf32>, memref<1x3x3xf32>, memref<?x?x?xf32>)
+  return
+}
+
+// CHECK-LABEL: @conv_1d_nwc
+//  CHECK-SAME: %[[arg0:[a-zA-Z0-9]+]]: memref<1x3x3xf32>
+//  CHECK-SAME: %[[arg1:[a-zA-Z0-9]+]]: memref<1x3x3xf32>
+//  CHECK-SAME: %[[arg2:[a-zA-Z0-9]+]]: memref<?x?x?xf32
+//       CHECK:   %[[c0:.*]] = constant 0 : index
+//       CHECK:   %[[cst:.*]] = constant 0.000000e+00 : f32
+//       CHECK:   %[[v0:.*]] = vector.transfer_read %[[arg0]][%[[c0]], %[[c0]], %[[c0]]], %[[cst]] : memref<1x3x3xf32>, vector<3x3xf32>
+//       CHECK:   %[[v1:.*]] = vector.transfer_read %[[arg1]][%[[c0]], %[[c0]], %[[c0]]], %[[cst]] : memref<1x3x3xf32>, vector<3x3xf32>
+//       CHECK:   %[[v2:.*]] = vector.contract {indexing_maps = [#[[$map3]], #[[$map3]], #[[$map4]]], iterator_types = ["reduction", "reduction"]} %[[v0]], %[[v1]], %[[cst]] : vector<3x3xf32>, vector<3x3xf32> into f32
+//       CHECK:   store %[[v2]], %[[arg2]][%[[c0]], %[[c0]], %[[c0]]] : memref<?x?x?xf32>
+//       CHECK:   return
+
+func @conv_2d(%arg0: memref<3x3xf32>, %arg1: memref<3x3xf32>, %arg2: memref<?x?xf32>) {
+  linalg.conv_2d %arg0, %arg1, %arg2 : (memref<3x3xf32>, memref<3x3xf32>, memref<?x?xf32>)
+  return
+}
+
+// CHECK-LABEL: @conv_2d
+//  CHECK-SAME: %[[arg0:[a-zA-Z0-9]+]]: memref<3x3xf32>
+//  CHECK-SAME: %[[arg1:[a-zA-Z0-9]+]]: memref<3x3xf32>
+//  CHECK-SAME: %[[arg2:[a-zA-Z0-9]+]]: memref<?x?xf32
+//       CHECK:   %[[c0:.*]] = constant 0 : index
+//       CHECK:   %[[cst:.*]] = constant 0.000000e+00 : f32
+//       CHECK:   %[[v0:.*]] = vector.transfer_read %[[arg0]][%[[c0]], %[[c0]]], %[[cst]] : memref<3x3xf32>, vector<3x3xf32>
+//       CHECK:   %[[v1:.*]] = vector.transfer_read %[[arg1]][%[[c0]], %[[c0]]], %[[cst]] : memref<3x3xf32>, vector<3x3xf32>
+//       CHECK:   %[[v2:.*]] = vector.contract {indexing_maps = [#[[$map3]], #[[$map3]], #[[$map4]]], iterator_types = ["reduction", "reduction"]} %[[v0]], %[[v1]], %[[cst]] : vector<3x3xf32>, vector<3x3xf32> into f32
+//       CHECK:   store %[[v2]], %[[arg2]][%[[c0]], %[[c0]]] : memref<?x?xf32>
+//       CHECK:   return
+
+func @conv_2d_nchw(%arg0: memref<1x3x3x3xf32>, %arg1: memref<1x3x3x3xf32>, %arg2: memref<?x?x?x?xf32>) {
+  linalg.conv_2d_nchw %arg0, %arg1, %arg2 : (memref<1x3x3x3xf32>, memref<1x3x3x3xf32>, memref<?x?x?x?xf32>)
+  return
+}
+
+// CHECK-LABEL: @conv_2d_nchw
+//  CHECK-SAME: %[[arg0:[a-zA-Z0-9]+]]: memref<1x3x3x3xf32>
+//  CHECK-SAME: %[[arg1:[a-zA-Z0-9]+]]: memref<1x3x3x3xf32>
+//  CHECK-SAME: %[[arg2:[a-zA-Z0-9]+]]: memref<?x?x?x?xf32
+//       CHECK:   %[[c0:.*]] = constant 0 : index
+//       CHECK:   %[[cst:.*]] = constant 0.000000e+00 : f32
+//       CHECK:   %[[v0:.*]] = vector.transfer_read %[[arg0]][%[[c0]], %[[c0]], %[[c0]], %[[c0]]], %[[cst]] : memref<1x3x3x3xf32>, vector<3x3x3xf32>
+//       CHECK:   %[[v1:.*]] = vector.transfer_read %[[arg1]][%[[c0]], %[[c0]], %[[c0]], %[[c0]]], %[[cst]] : memref<1x3x3x3xf32>, vector<3x3x3xf32>
+//       CHECK:   %[[v2:.*]] = vector.contract {indexing_maps = [#[[$map6]], #[[$map6]], #[[$map7]]], iterator_types = ["reduction", "reduction", "reduction"]} %[[v0]], %[[v1]], %[[cst]] : vector<3x3x3xf32>, vector<3x3x3xf32> into f32
+//       CHECK:   store %[[v2]], %[[arg2]][%[[c0]], %[[c0]], %[[c0]], %[[c0]]] : memref<?x?x?x?xf32>
+//       CHECK:   return
+
+func @conv_2d_nhwc(%arg0: memref<1x3x3x3xf32>, %arg1: memref<1x3x3x3xf32>, %arg2: memref<?x?x?x?xf32>) {
+  linalg.conv_2d_nhwc %arg0, %arg1, %arg2 : (memref<1x3x3x3xf32>, memref<1x3x3x3xf32>, memref<?x?x?x?xf32>)
+  return
+}
+
+// CHECK-LABEL: @conv_2d_nhwc
+//  CHECK-SAME: %[[arg0:[a-zA-Z0-9]+]]: memref<1x3x3x3xf32>
+//  CHECK-SAME: %[[arg1:[a-zA-Z0-9]+]]: memref<1x3x3x3xf32>
+//  CHECK-SAME: %[[arg2:[a-zA-Z0-9]+]]: memref<?x?x?x?xf32
+//       CHECK:   %[[c0:.*]] = constant 0 : index
+//       CHECK:   %[[cst:.*]] = constant 0.000000e+00 : f32
+//       CHECK:   %[[v0:.*]] = vector.transfer_read %[[arg0]][%[[c0]], %[[c0]], %[[c0]], %[[c0]]], %[[cst]] : memref<1x3x3x3xf32>, vector<3x3x3xf32>
+//       CHECK:   %[[v1:.*]] = vector.transfer_read %[[arg1]][%[[c0]], %[[c0]], %[[c0]], %[[c0]]], %[[cst]] : memref<1x3x3x3xf32>, vector<3x3x3xf32>
+//       CHECK:   %[[v2:.*]] = vector.contract {indexing_maps = [#[[$map6]], #[[$map6]], #[[$map7]]], iterator_types = ["reduction", "reduction", "reduction"]} %[[v0]], %[[v1]], %[[cst]] : vector<3x3x3xf32>, vector<3x3x3xf32> into f32
+//       CHECK:   store %[[v2]], %[[arg2]][%[[c0]], %[[c0]], %[[c0]], %[[c0]]] : memref<?x?x?x?xf32>
+//       CHECK:   return
+
+func @conv_3d(%arg0: memref<3x3x3xf32>, %arg1: memref<3x3x3xf32>, %arg2: memref<?x?x?xf32>) {
+  linalg.conv_3d %arg0, %arg1, %arg2 : (memref<3x3x3xf32>, memref<3x3x3xf32>, memref<?x?x?xf32>)
+  return
+}
+
+// CHECK-LABEL: @conv_3d
+//  CHECK-SAME: %[[arg0:[a-zA-Z0-9]+]]: memref<3x3x3xf32>
+//  CHECK-SAME: %[[arg1:[a-zA-Z0-9]+]]: memref<3x3x3xf32>
+//  CHECK-SAME: %[[arg2:[a-zA-Z0-9]+]]: memref<?x?x?xf32
+//       CHECK:   %[[c0:.*]] = constant 0 : index
+//       CHECK:   %[[cst:.*]] = constant 0.000000e+00 : f32
+//       CHECK:   %[[v0:.*]] = vector.transfer_read %[[arg0]][%[[c0]], %[[c0]], %[[c0]]], %[[cst]] : memref<3x3x3xf32>, vector<3x3x3xf32>
+//       CHECK:   %[[v1:.*]] = vector.transfer_read %[[arg1]][%[[c0]], %[[c0]], %[[c0]]], %[[cst]] : memref<3x3x3xf32>, vector<3x3x3xf32>
+//       CHECK:   %[[v2:.*]] = vector.contract {indexing_maps = [#[[$map6]], #[[$map6]], #[[$map7]]], iterator_types = ["reduction", "reduction", "reduction"]} %[[v0]], %[[v1]], %[[cst]] : vector<3x3x3xf32>, vector<3x3x3xf32> into f32
+//       CHECK:   store %[[v2]], %[[arg2]][%[[c0]], %[[c0]], %[[c0]]] : memref<?x?x?xf32>
+//       CHECK:   return
+
+func @conv_3d_ncdhw(%arg0: memref<1x3x3x3x3xf32>, %arg1: memref<1x3x3x3x3xf32>, %arg2: memref<?x?x?x?x?xf32>) {
+  linalg.conv_3d_ncdhw %arg0, %arg1, %arg2 : (memref<1x3x3x3x3xf32>, memref<1x3x3x3x3xf32>, memref<?x?x?x?x?xf32>)
+  return
+}
+
+// CHECK-LABEL: @conv_3d_ncdhw
+//  CHECK-SAME: %[[arg0:[a-zA-Z0-9]+]]: memref<1x3x3x3x3xf32>
+//  CHECK-SAME: %[[arg1:[a-zA-Z0-9]+]]: memref<1x3x3x3x3xf32>
+//  CHECK-SAME: %[[arg2:[a-zA-Z0-9]+]]: memref<?x?x?x?x?xf32
+//       CHECK:   %[[c0:.*]] = constant 0 : index
+//       CHECK:   %[[cst:.*]] = constant 0.000000e+00 : f32
+//       CHECK:   %[[v0:.*]] = vector.transfer_read %[[arg0]][%[[c0]], %[[c0]], %[[c0]], %[[c0]], %[[c0]]], %[[cst]] : memref<1x3x3x3x3xf32>, vector<3x3x3x3xf32>
+//       CHECK:   %[[v1:.*]] = vector.transfer_read %[[arg1]][%[[c0]], %[[c0]], %[[c0]], %[[c0]], %[[c0]]], %[[cst]] : memref<1x3x3x3x3xf32>, vector<3x3x3x3xf32>
+//       CHECK:   %[[v2:.*]] = vector.contract {indexing_maps = [#[[$map9]], #[[$map9]], #[[$map10]]], iterator_types = ["reduction", "reduction", "reduction", "reduction"]} %[[v0]], %[[v1]], %[[cst]] : vector<3x3x3x3xf32>, vector<3x3x3x3xf32> into f32
+//       CHECK:   store %[[v2]], %[[arg2]][%[[c0]], %[[c0]], %[[c0]], %[[c0]], %[[c0]]] : memref<?x?x?x?x?xf32>
+//       CHECK:   return
+
+func @conv_3d_ndhwc(%arg0: memref<1x3x3x3x3xf32>, %arg1: memref<1x3x3x3x3xf32>, %arg2: memref<?x?x?x?x?xf32>) {
+  linalg.conv_3d_ndhwc %arg0, %arg1, %arg2 : (memref<1x3x3x3x3xf32>, memref<1x3x3x3x3xf32>, memref<?x?x?x?x?xf32>)
+  return
+}
+
+// CHECK-LABEL: @conv_3d_ndhwc
+//  CHECK-SAME: %[[arg0:[a-zA-Z0-9]+]]: memref<1x3x3x3x3xf32>
+//  CHECK-SAME: %[[arg1:[a-zA-Z0-9]+]]: memref<1x3x3x3x3xf32>
+//  CHECK-SAME: %[[arg2:[a-zA-Z0-9]+]]: memref<?x?x?x?x?xf32
+//       CHECK:   %[[c0:.*]] = constant 0 : index
+//       CHECK:   %[[cst:.*]] = constant 0.000000e+00 : f32
+//       CHECK:   %[[v0:.*]] = vector.transfer_read %[[arg0]][%[[c0]], %[[c0]], %[[c0]], %[[c0]], %[[c0]]], %[[cst]] : memref<1x3x3x3x3xf32>, vector<3x3x3x3xf32>
+//       CHECK:   %[[v1:.*]] = vector.transfer_read %[[arg1]][%[[c0]], %[[c0]], %[[c0]], %[[c0]], %[[c0]]], %[[cst]] : memref<1x3x3x3x3xf32>, vector<3x3x3x3xf32>
+//       CHECK:   %[[v2:.*]] = vector.contract {indexing_maps = [#[[$map9]], #[[$map9]], #[[$map10]]], iterator_types = ["reduction", "reduction", "reduction", "reduction"]} %[[v0]], %[[v1]], %[[cst]] : vector<3x3x3x3xf32>, vector<3x3x3x3xf32> into f32
+//       CHECK:   store %[[v2]], %[[arg2]][%[[c0]], %[[c0]], %[[c0]], %[[c0]], %[[c0]]] : memref<?x?x?x?x?xf32>
+//       CHECK:   return

mlir/test/lib/Transforms/CMakeLists.txt

 # Exclude tests from libMLIR.so
 add_mlir_library(MLIRTestTransforms
   TestAllReduceLowering.cpp
   TestBufferPlacement.cpp
   TestExpandTanh.cpp
   TestCallGraph.cpp
   TestConstantFold.cpp
+  TestConvVectorization.cpp
   TestConvertCallOp.cpp
   TestConvertGPUKernelToCubin.cpp
   TestConvertGPUKernelToHsaco.cpp
   TestDominance.cpp
   TestLoopFusion.cpp
   TestGpuMemoryPromotion.cpp
   TestGpuParallelLoopMapping.cpp
   TestInlining.cpp

mlir/test/lib/Transforms/TestConvVectorization.cpp

+//===- LinalgToVector.cpp - Linalg to Vector dialect conversion -----------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "mlir/Dialect/Affine/IR/AffineOps.h"
+#include "mlir/Dialect/Linalg/IR/LinalgOps.h"
+#include "mlir/Dialect/Linalg/Utils/Utils.h"
+#include "mlir/Dialect/SCF/SCF.h"
+#include "mlir/Dialect/StandardOps/IR/Ops.h"
+#include "mlir/Dialect/Vector/VectorOps.h"
+#include "mlir/IR/AffineExpr.h"
+#include "mlir/Pass/Pass.h"
+#include "mlir/Transforms/DialectConversion.h"
+
+using namespace mlir;
+
+/// Creates zero constant of specified type.
+static Value getZero(Location loc, Type type, PatternRewriter &rewriter) {
+  Attribute zeroAttr = rewriter.getZeroAttr(type);
+  return rewriter.create<ConstantOp>(loc, type, zeroAttr);
+}
+
+namespace {
+
+/// Converts Convolution op into vector contraction.
+///
+/// Conversion expects ConvOp to have dimensions marked in the *mask* as
+/// false of size 1. This ensures that the ConvOp can be lowered to vector
+/// contraction of dimensions marked in the *mask* as true.
+///
+/// A good example is ConvNHWCOp which is 2D Conv op with channels as the last
+/// dimension. For this op we contract last 3 dimensions.
+/// The initial op definition looks like this:
+/// ```
+/// linalg.conv_2d_nhwc  %arg0, %arg1, %arg2 :
+///   (memref<1x3x3x3xf32>, memref<1x3x3x3xf32>, memref<?x?x?x?xf32>)
+/// ```
+/// This op can be expressed as a dot product between %arg0 (input) and
+/// %arg1 (kernel) which is written into first entry of %arg2 (output). This is
+/// the ConvOp this pass expects and converts into:
+/// ```
+/// #map0 = affine_map<(d0, d1, d2) -> (d0, d1, d2)>
+/// #map1 = affine_map<(d0, d1, d2) -> ()>
+/// .....
+/// %0 = vector.transfer_read %arg0[%c0, %c0, %c0, %c0], %c0_f32
+///   : memref<1x3x3x3xf32>, vector<3x3x3xf32>
+/// %1 = vector.transfer_read %arg1[%c0, %c0, %c0, %c0], %c0_f32
+///   : memref<1x3x3x3xf32>, vector<3x3x3xf32>
+/// %2 = vector.contract {indexing_maps = [#map0, #map0, #map1],
+///   iterator_types = ["reduction", "reduction", "reduction"]} %0, %1,
+///   %c0_f32 : vector<3x3x3xf32>, vector<3x3x3xf32> into f32
+/// store %2, %arg2[%c0, %c0, %c0, %c0] : memref<?x?x?x?xf32>
+/// ```
+/// where first 2 operations read input and kernel memory buffers into vectors.
+/// Subsequently, they are contracted together and the result is written to
+/// the first entry of the output buffer.
+template <typename ConvOp, int N>
+struct ConvOpConversion : public OpRewritePattern<ConvOp> {
+  SmallVector<bool, 4> mask;
+  ConvOpConversion(MLIRContext *context, SmallVector<bool, 4> msk)
+      : OpRewritePattern<ConvOp>(context) {
+    assert(msk.size() == N && "Mask size does not match rank");
+    this->mask = msk;
+  }
+
+  using OpRewritePattern<ConvOp>::OpRewritePattern;
+
+  LogicalResult matchAndRewrite(ConvOp op,
+                                PatternRewriter &rewriter) const override {
+    const uint dimSize = 3;
+    Location loc = op.getLoc();
+    MLIRContext *context = op.getContext();
+
+    ShapedType inShapeType = op.getInputShapedType(0);
+    ShapedType kShapeType = op.getInputShapedType(1);
+
+    ArrayRef<int64_t> inShape = inShapeType.getShape();
+    ArrayRef<int64_t> kShape = kShapeType.getShape();
+
+    if (!inShapeType.hasStaticShape() || !kShapeType.hasStaticShape())
+      return failure();
+
+    SmallVector<AffineExpr, 4> mapping;
+    // Fail to apply when the size of not vectorized dimension is not 1 or
+    // when the size of vectorized dimension is not dimSize.
+    for (unsigned i = 0; i < N; i++) {
+      if (!mask[i] && (inShape[i] != 1 || kShape[i] != 1))
+        return failure();
+      if (mask[i] && (inShape[i] != dimSize || kShape[i] != dimSize))
+        return failure();
+
+      if (mask[i])
+        mapping.push_back(getAffineDimExpr(i, context));
+    }
+
+    Value input = op.getInput(0);
+    Value kernel = op.getInput(1);
+    Value output = op.getOutputBuffer(0);
+
+    uint rank = inShapeType.getRank();
+    uint numDims = mapping.size();
+    Type elemType = inShapeType.getElementType();
+    Type indexType = rewriter.getIndexType();
+
+    auto map = AffineMap::get(rank, 0, mapping, context);
+    SmallVector<Value, 4> zeros(rank, getZero(loc, indexType, rewriter));
+    auto vecType =
+        VectorType::get(SmallVector<int64_t, 4>(numDims, dimSize), elemType);
+
+    auto inputVec = rewriter.create<vector::TransferReadOp>(loc, vecType, input,
+                                                            zeros, map);
+
+    auto kernelVec = rewriter.create<vector::TransferReadOp>(
+        loc, vecType, kernel, zeros, map);
+
+    auto acc = getZero(loc, elemType, rewriter);
+
+    std::array<AffineMap, 3> indexingMaps{
+        AffineMap::getMultiDimIdentityMap(numDims, context),
+        AffineMap::getMultiDimIdentityMap(numDims, context),
+        AffineMap::get(numDims, 0, {}, context)};
+
+    std::vector<StringRef> iteratorTypes(numDims, "reduction");
+
+    auto result = rewriter.create<vector::ContractionOp>(
+        loc, inputVec, kernelVec, acc,
+        rewriter.getAffineMapArrayAttr(indexingMaps),
+        rewriter.getStrArrayAttr(iteratorTypes));
+
+    rewriter.create<StoreOp>(loc, result, output, ValueRange(zeros));
+    rewriter.eraseOp(op);
+    return success();
+  }
+};
+
+void populateLinalgToVectorPatterns(MLIRContext *context,
+                                    OwningRewritePatternList &patterns) {
+  patterns.insert<ConvOpConversion<linalg::ConvWOp, 1>>(
+      context, SmallVector<bool, 4>{true});
+
+  patterns.insert<ConvOpConversion<linalg::ConvNWCOp, 3>>(
+      context, SmallVector<bool, 4>{false, true, true});
+
+  patterns.insert<ConvOpConversion<linalg::ConvNCWOp, 3>>(
+      context, SmallVector<bool, 4>{false, true, true});
+
+  patterns.insert<ConvOpConversion<linalg::ConvHWOp, 2>>(
+      context, SmallVector<bool, 4>{true, true});
+
+  patterns.insert<ConvOpConversion<linalg::ConvNHWCOp, 4>>(
+      context, SmallVector<bool, 4>{false, true, true, true});
+
+  patterns.insert<ConvOpConversion<linalg::ConvNCHWOp, 4>>(
+      context, SmallVector<bool, 4>{false, true, true, true});
+
+  patterns.insert<ConvOpConversion<linalg::ConvDHWOp, 3>>(
+      context, SmallVector<bool, 4>{true, true, true});
+
+  patterns.insert<ConvOpConversion<linalg::ConvNDHWCOp, 5>>(
+      context, SmallVector<bool, 4>{false, true, true, true, true});
+
+  patterns.insert<ConvOpConversion<linalg::ConvNCDHWOp, 5>>(
+      context, SmallVector<bool, 4>{false, true, true, true, true});
+}
+
+/// A pass converting MLIR Linalg ops into Vector ops.
+class TestConvVectorization
+    : public PassWrapper<TestConvVectorization, OperationPass<ModuleOp>> {
+  void runOnOperation() override;
+
+  void getDependentDialects(DialectRegistry &registry) const override {
+    registry.insert<vector::VectorDialect>();
+    registry.insert<linalg::LinalgDialect>();
+    registry.insert<StandardOpsDialect>();
+  }
+};
+} // namespace
+
+void TestConvVectorization::runOnOperation() {
+  MLIRContext *context = &getContext();
+  ModuleOp module = getOperation();
+
+  ConversionTarget target(*context);
+  target.addLegalDialect<AffineDialect, scf::SCFDialect, StandardOpsDialect,
+                         vector::VectorDialect>();
+  target.addLegalOp<ModuleOp, FuncOp, ModuleTerminatorOp, ReturnOp>();
+  target.addLegalOp<linalg::FillOp, linalg::YieldOp>();
+
+  OwningRewritePatternList patterns;
+  populateLinalgToVectorPatterns(context, patterns);
+
+  if (failed(applyPartialConversion(module, target, patterns)))
+    return signalPassFailure();
+}
+
+namespace mlir {
+void registerTestConvVectorization() {
+  PassRegistration<TestConvVectorization> testTransformPatternsPass(
+      "test-conv-vectorization", "Test vectorization of convolutions");
+}
+} // namespace mlir

mlir/tools/mlir-opt/mlir-opt.cpp

 void registerSimpleParametricTilingPass();
 void registerSymbolTestPasses();
 void registerTestAffineDataCopyPass();
 void registerTestAffineLoopUnswitchingPass();
 void registerTestAllReduceLoweringPass();
 void registerTestBufferPlacementPreparationPass();
 void registerTestCallGraphPass();
 void registerTestConstantFold();
+void registerTestConvVectorization();
 void registerTestConvertGPUKernelToCubinPass();
 void registerTestConvertGPUKernelToHsacoPass();
 void registerTestDominancePass();
 void registerTestDialect(DialectRegistry &);
 void registerTestExpandTanhPass();
 void registerTestFunc();
 void registerTestGpuMemoryPromotionPass();
 void registerTestGpuParallelLoopMappingPass();
void registerTestPasses() {
   registerSideEffectTestPasses();
   registerSimpleParametricTilingPass();
   registerSymbolTestPasses();
   registerTestAffineDataCopyPass();
   registerTestAllReduceLoweringPass();
   registerTestAffineLoopUnswitchingPass();
   registerTestLoopPermutationPass();
   registerTestCallGraphPass();
+  registerTestConvVectorization();
   registerTestConstantFold();
 #if MLIR_CUDA_CONVERSIONS_ENABLED
   registerTestConvertGPUKernelToCubinPass();
 #endif
 #if MLIR_ROCM_CONVERSIONS_ENABLED
   registerTestConvertGPUKernelToHsacoPass();
 #endif
   registerTestBufferPlacementPreparationPass();