AMDGPUPerfHintAnalysis: don't treat constant loads as large stride

[foad]

Summary

In the "large stride" heuristic ignore loads from the constant address
space (as well as local address space). K$ behavior is very different
from L0$ so it doesn't make much sense to use the same heuristic for
them.

[arsenm]

Testcase?

[rampitec]

LGTM, but needs a test.

[foad]

Add a test case.

[rampitec]

This is LGTM, but needs test fix first of course.

[arsenm]

Typo Perh in commit message

[arsenm]

llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp

345–346

This isn't really a good implementation. We use scalar loads in more cases and constant address space isn't a guarantee of SMEM loads

[foad]

This is LGTM, but needs test fix first of course.

I think the test is OK now I have rebased on D122804?

[arsenm]

LGTM I guess, but isConstantAddr really should be fixed. CONSTANT_ADDRESS isn't sufficient or even that helpful for knowing if this will use scalar loads

llvm/lib/Target/AMDGPU/AMDGPUPerfHintAnalysis.cpp

 AMDGPUPerfHint::makeMemAccessInfo(Instruction *Inst) const {
   MemAccessInfo MAI;
   const Value *MO = getMemoryInstrPtr(Inst);
 
   LLVM_DEBUG(dbgs() << "[isLargeStride] MO: " << *MO << '\n');
   // Do not treat local-addr memory access as large stride.
   if (isLocalAddr(MO))
     return MAI;
+  // Do not treat constant-addr memory access as large stride because K$
+  // behavior is very different from L0$.
+  if (isConstantAddr(MO))
+    return MAI;
 
   MAI.V = MO;
   MAI.Base = GetPointerBaseWithConstantOffset(MO, MAI.Offset, *DL);
   return MAI;
 }
 
 bool AMDGPUPerfHint::isConstantAddr(const Value *V) const {
   if (auto PT = dyn_cast<PointerType>(V->getType())) {
     unsigned As = PT->getAddressSpace();
     return As == AMDGPUAS::CONSTANT_ADDRESS ||
            As == AMDGPUAS::CONSTANT_ADDRESS_32BIT;
   }
   return false;
 }
 
 bool AMDGPUPerfHint::MemAccessInfo::isLargeStride(
     MemAccessInfo &Reference) const {
 
   if (!Base || !Reference.Base || Base != Reference.Base)

llvm/test/CodeGen/AMDGPU/perfhint.ll

bb:
   store i32 %tmp4, i32 addrspace(1)* %tmp5, align 4
   %tmp6 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 12288
   %tmp7 = load i32, i32 addrspace(1)* %tmp6, align 4
   %tmp8 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 3
   store i32 %tmp7, i32 addrspace(1)* %tmp8, align 4
   ret void
 }
 
+; GCN-LABEL: {{^}}test_constant_not_large_stride:
+; GCN: MemoryBound: 0
+; GCN: WaveLimiterHint : 0
+define amdgpu_kernel void @test_constant_not_large_stride(i32 addrspace(4)* nocapture %arg, i32 addrspace(1)* nocapture %arg1) {
+bb:
+  %tmp = getelementptr inbounds i32, i32 addrspace(4)* %arg, i64 4096
+  %tmp1 = load i32, i32 addrspace(4)* %tmp, align 4
+  %tmp3 = getelementptr inbounds i32, i32 addrspace(4)* %arg, i64 8192
+  %tmp4 = load i32, i32 addrspace(4)* %tmp3, align 4
+  %tmp6 = getelementptr inbounds i32, i32 addrspace(4)* %arg, i64 12288
+  %tmp7 = load i32, i32 addrspace(4)* %tmp6, align 4
+  %tmp2 = getelementptr inbounds i32, i32 addrspace(1)* %arg1, i64 1
+  store i32 %tmp1, i32 addrspace(1)* %tmp2, align 4
+  %tmp5 = getelementptr inbounds i32, i32 addrspace(1)* %arg1, i64 2
+  store i32 %tmp4, i32 addrspace(1)* %tmp5, align 4
+  %tmp8 = getelementptr inbounds i32, i32 addrspace(1)* %arg1, i64 3
+  store i32 %tmp7, i32 addrspace(1)* %tmp8, align 4
+  ret void
+}
+
 ; GCN-LABEL: {{^}}test_indirect:
 ; GCN: MemoryBound: 0
 ; GCN: WaveLimiterHint : 1
 define amdgpu_kernel void @test_indirect(i32 addrspace(1)* nocapture %arg) {
 bb:
   %tmp = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 1
   %tmp1 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 2
   %tmp2 = getelementptr inbounds i32, i32 addrspace(1)* %arg, i64 3