[PowerPC] Support lowering int-to-fp on ppc_fp128

[qiucf]

Summary

D70867 introduced support for expanding most ppc_fp128 operations. But sitofp/uitofp is missing. This patch adds that after D81669.

Note: There's still issue about chain for ppc_fp128 on SPE subtargets. But I'm not sure if the type is fully supported on SPE.

[uweigand]

For unsigned conversion, the input is treated as signed here, and the result fixed up by adding 2^N; something along the lines of

(signed)N >= 0 ? signed_to_FP((signed)N) : signed_to_FP(N - 2^N) + (FP)2^N

For strict operation, we need to verify that the result is correct with any setting of the current rounding mode, and that the overall exception status after the two operations (signed_to_FP and the FADD) matches the intended semantics of the unsigned_to_FP operation. I believe in general this is not the case; specifically, there may be problems if the input (interpreted as signed) is not exactly representable as FP number,

If the input type is i32 or i64, that's probably not a problem, given that all such numbers are exactly representable as ppc_f128. However, if the input type is i128, this is no longer the case.

If you look at SelectionDAGLegalize::ExpandLegalINT_TO_FP, which uses a similar algorithm, you'll see that it switches to a different one in the case where not all inputs may be representable. I think we'll have to do something similar here for full correctness.

(OTOH given that this affects only the i128->ppc_f128 case, which should be relatively rare, and I think isn't even fully correct in all cases in non-strict mode even today, maybe this can be done later. But at least there should be a FIXME.)

[qiucf]

Add FIXME for i128->ppc_fp128 strict semantics fix.

[qiucf]

This comment was removed by qiucf.

[qiucf]

Revert last update. Put the right revision back...

[uweigand]

See inline comments about chain handling.

llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

1681

This looks like the wrong input Chain if we already performed an operation above -- it should use the output chain of that operation as input here.

1685

OK, well, even if we keep the existing algorithm with the FIXME, this still isn't correct as it loses the Chain after the FADD. I think in the strict case we'll need to use a strict version of SelectCC (passing in the Chain from the FADD) and the use the resulting output Chain for the overall output (via ReplaceValueWith as above -- in fact, if we fall through down here, we actually should *not* do the ReplaceValueWith above, since that would be the wrong chain).

[qiucf]

llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

1685

Seems we don't have strict select_cc. Here Src is integer type, not suitable for fsetcc+select?

And yes, I should replace original chain of N with newest chain, both here and inside isSigned if block.

[uweigand]

llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

1685

Ah, you're right -- this is an integer select, so there is no (need for a) strict version.

So the only change needed is to do the chain replacement here, and inside the isSigned block (as you said).

[qiucf]

Adjust expanded chain

[uweigand]

LGTM now. Thanks!

llvm/lib/CodeGen/SelectionDAG/LegalizeFloatTypes.cpp

   case ISD::FSIN:       ExpandFloatRes_FSIN(N, Lo, Hi); break;
   case ISD::STRICT_FSQRT:
   case ISD::FSQRT:      ExpandFloatRes_FSQRT(N, Lo, Hi); break;
   case ISD::STRICT_FSUB:
   case ISD::FSUB:       ExpandFloatRes_FSUB(N, Lo, Hi); break;
   case ISD::STRICT_FTRUNC:
   case ISD::FTRUNC:     ExpandFloatRes_FTRUNC(N, Lo, Hi); break;
   case ISD::LOAD:       ExpandFloatRes_LOAD(N, Lo, Hi); break;
+  case ISD::STRICT_SINT_TO_FP:
+  case ISD::STRICT_UINT_TO_FP:
   case ISD::SINT_TO_FP:
   case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break;
   case ISD::STRICT_FREM:
   case ISD::FREM:       ExpandFloatRes_FREM(N, Lo, Hi); break;
   }
 
   // If Lo/Hi is null, the sub-method took care of registering results etc.
   if (Lo.getNode())

   ReplaceValueWith(SDValue(LD, 1), Chain);
 }
 
 void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo,
                                                  SDValue &Hi) {
   assert(N->getValueType(0) == MVT::ppcf128 && "Unsupported XINT_TO_FP!");
   EVT VT = N->getValueType(0);
   EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
-  SDValue Src = N->getOperand(0);
+  bool Strict = N->isStrictFPOpcode();
+  SDValue Src = N->getOperand(Strict ? 1 : 0);
   EVT SrcVT = Src.getValueType();
-  bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
+  bool isSigned = N->getOpcode() == ISD::SINT_TO_FP ||
+                  N->getOpcode() == ISD::STRICT_SINT_TO_FP;
   SDLoc dl(N);
+  SDValue Chain = Strict ? N->getOperand(0) : DAG.getEntryNode();
 
   // First do an SINT_TO_FP, whether the original was signed or unsigned.
   // When promoting partial word types to i32 we must honor the signedness,
   // though.
   if (SrcVT.bitsLE(MVT::i32)) {
     // The integer can be represented exactly in an f64.
     Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
                       MVT::i32, Src);
     Lo = DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(NVT),
                                    APInt(NVT.getSizeInBits(), 0)), dl, NVT);
-    Hi = DAG.getNode(ISD::SINT_TO_FP, dl, NVT, Src);
+    if (Strict) {
+      Hi = DAG.getNode(ISD::STRICT_SINT_TO_FP, dl, {NVT, MVT::Other},
+                       {Chain, Src});
+      Chain = Hi.getValue(1);
+    } else
+      Hi = DAG.getNode(ISD::SINT_TO_FP, dl, NVT, Src);
   } else {
     RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
     if (SrcVT.bitsLE(MVT::i64)) {
       Src = DAG.getNode(isSigned ? ISD::SIGN_EXTEND : ISD::ZERO_EXTEND, dl,
                         MVT::i64, Src);
       LC = RTLIB::SINTTOFP_I64_PPCF128;
     } else if (SrcVT.bitsLE(MVT::i128)) {
       Src = DAG.getNode(ISD::SIGN_EXTEND, dl, MVT::i128, Src);
       LC = RTLIB::SINTTOFP_I128_PPCF128;
     }
     assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
 
     TargetLowering::MakeLibCallOptions CallOptions;
     CallOptions.setSExt(true);
-    Hi = TLI.makeLibCall(DAG, LC, VT, Src, CallOptions, dl).first;
-    GetPairElements(Hi, Lo, Hi);
+    std::pair<SDValue, SDValue> Tmp =
+        TLI.makeLibCall(DAG, LC, VT, Src, CallOptions, dl, Chain);
+    if (Strict)
+      Chain = Tmp.second;
+    GetPairElements(Tmp.first, Lo, Hi);
   }
 
-  if (isSigned)
+  if (isSigned) {
+    if (Strict)
+      ReplaceValueWith(SDValue(N, 1), Chain);
+
     return;
+  }
 
   // Unsigned - fix up the SINT_TO_FP value just calculated.
+  // FIXME: For unsigned i128 to ppc_fp128 conversion, we need to carefully
+  // keep semantics correctness if the integer is not exactly representable
+  // here. See ExpandLegalINT_TO_FP.
   Hi = DAG.getNode(ISD::BUILD_PAIR, dl, VT, Lo, Hi);
   SrcVT = Src.getValueType();
 
   // x>=0 ? (ppcf128)(iN)x : (ppcf128)(iN)x + 2^N; N=32,64,128.
   static const uint64_t TwoE32[]  = { 0x41f0000000000000LL, 0 };
   static const uint64_t TwoE64[]  = { 0x43f0000000000000LL, 0 };
   static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 };
   ArrayRef<uint64_t> Parts;
 
   switch (SrcVT.getSimpleVT().SimpleTy) {
   default:
     llvm_unreachable("Unsupported UINT_TO_FP!");
   case MVT::i32:
     Parts = TwoE32;
     break;
   case MVT::i64:
     Parts = TwoE64;
     break;
   case MVT::i128:
     Parts = TwoE128;
     break;
   }
 
   // TODO: Are there fast-math-flags to propagate to this FADD?
-  Lo = DAG.getNode(ISD::FADD, dl, VT, Hi,
-                   DAG.getConstantFP(APFloat(APFloat::PPCDoubleDouble(),
-                                             APInt(128, Parts)),
-                                     dl, MVT::ppcf128));
+  SDValue NewLo = DAG.getConstantFP(
+      APFloat(APFloat::PPCDoubleDouble(), APInt(128, Parts)), dl, MVT::ppcf128);
+  if (Strict) {
+    Lo = DAG.getNode(ISD::STRICT_FADD, dl, {VT, MVT::Other},
+                     {Chain, Hi, NewLo});
+    Chain = Lo.getValue(1);
+    ReplaceValueWith(SDValue(N, 1), Chain);
+  } else
+    Lo = DAG.getNode(ISD::FADD, dl, VT, Hi, NewLo);
   Lo = DAG.getSelectCC(dl, Src, DAG.getConstant(0, dl, SrcVT),
                        Lo, Hi, ISD::SETLT);
   GetPairElements(Lo, Lo, Hi);
 }
 
 
 //===----------------------------------------------------------------------===//
 //  Float Operand Expansion

llvm/test/CodeGen/PowerPC/ppcf128-constrained-fp-intrinsics.ll

                     metadata !"round.dynamic",
                     metadata !"fpexcept.strict") #1
   store float %tinypow, float* %firstptr
   %stridxn1 = getelementptr ppc_fp128, ppc_fp128* %result, i32 -1
   store ppc_fp128 %powi, ppc_fp128* %stridxn1
   ret void
 }
 
+define ppc_fp128 @i32_to_ppcq(i32 signext %m) #0 {
+; PC64LE-LABEL: i32_to_ppcq:
+; PC64LE:       # %bb.0: # %entry
+; PC64LE-NEXT:    mtfprwa 0, 3
+; PC64LE-NEXT:    xxlxor 2, 2, 2
+; PC64LE-NEXT:    xscvsxddp 1, 0
+; PC64LE-NEXT:    blr
+;
+; PC64LE9-LABEL: i32_to_ppcq:
+; PC64LE9:       # %bb.0: # %entry
+; PC64LE9-NEXT:    mtfprwa 0, 3
+; PC64LE9-NEXT:    xxlxor 2, 2, 2
+; PC64LE9-NEXT:    xscvsxddp 1, 0
+; PC64LE9-NEXT:    blr
+;
+; PC64-LABEL: i32_to_ppcq:
+; PC64:       # %bb.0: # %entry
+; PC64-NEXT:    std 3, -8(1)
+; PC64-NEXT:    addis 3, 2, .LCPI33_0@toc@ha
+; PC64-NEXT:    lfd 0, -8(1)
+; PC64-NEXT:    lfs 2, .LCPI33_0@toc@l(3)
+; PC64-NEXT:    fcfid 1, 0
+; PC64-NEXT:    blr
+entry:
+  %conv = tail call ppc_fp128 @llvm.experimental.constrained.sitofp.ppcf128.i32(i32 %m, metadata !"round.dynamic", metadata !"fpexcept.strict") #1
+  ret ppc_fp128 %conv
+}
+
+define ppc_fp128 @i64_to_ppcq(i64 %m) #0 {
+; PC64LE-LABEL: i64_to_ppcq:
+; PC64LE:       # %bb.0: # %entry
+; PC64LE-NEXT:    mflr 0
+; PC64LE-NEXT:    std 0, 16(1)
+; PC64LE-NEXT:    stdu 1, -32(1)
+; PC64LE-NEXT:    bl __floatditf
+; PC64LE-NEXT:    nop
+; PC64LE-NEXT:    addi 1, 1, 32
+; PC64LE-NEXT:    ld 0, 16(1)
+; PC64LE-NEXT:    mtlr 0
+; PC64LE-NEXT:    blr
+;
+; PC64LE9-LABEL: i64_to_ppcq:
+; PC64LE9:       # %bb.0: # %entry
+; PC64LE9-NEXT:    mflr 0
+; PC64LE9-NEXT:    std 0, 16(1)
+; PC64LE9-NEXT:    stdu 1, -32(1)
+; PC64LE9-NEXT:    bl __floatditf
+; PC64LE9-NEXT:    nop
+; PC64LE9-NEXT:    addi 1, 1, 32
+; PC64LE9-NEXT:    ld 0, 16(1)
+; PC64LE9-NEXT:    mtlr 0
+; PC64LE9-NEXT:    blr
+;
+; PC64-LABEL: i64_to_ppcq:
+; PC64:       # %bb.0: # %entry
+; PC64-NEXT:    mflr 0
+; PC64-NEXT:    std 0, 16(1)
+; PC64-NEXT:    stdu 1, -112(1)
+; PC64-NEXT:    bl __floatditf
+; PC64-NEXT:    nop
+; PC64-NEXT:    addi 1, 1, 112
+; PC64-NEXT:    ld 0, 16(1)
+; PC64-NEXT:    mtlr 0
+; PC64-NEXT:    blr
+entry:
+  %conv = tail call ppc_fp128 @llvm.experimental.constrained.sitofp.ppcf128.i64(i64 %m, metadata !"round.dynamic", metadata !"fpexcept.strict") #1
+  ret ppc_fp128 %conv
+}
+
+define ppc_fp128 @u32_to_ppcq(i32 zeroext %m) #0 {
+; PC64LE-LABEL: u32_to_ppcq:
+; PC64LE:       # %bb.0: # %entry
+; PC64LE-NEXT:    mflr 0
+; PC64LE-NEXT:    std 30, -24(1) # 8-byte Folded Spill
+; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
+; PC64LE-NEXT:    std 0, 16(1)
+; PC64LE-NEXT:    stdu 1, -64(1)
+; PC64LE-NEXT:    mr 30, 3
+; PC64LE-NEXT:    addis 3, 2, .LCPI35_0@toc@ha
+; PC64LE-NEXT:    xxlxor 2, 2, 2
+; PC64LE-NEXT:    mtfprwa 0, 30
+; PC64LE-NEXT:    lfs 3, .LCPI35_0@toc@l(3)
+; PC64LE-NEXT:    xxlxor 4, 4, 4
+; PC64LE-NEXT:    xscvsxddp 31, 0
+; PC64LE-NEXT:    fmr 1, 31
+; PC64LE-NEXT:    bl __gcc_qadd
+; PC64LE-NEXT:    nop
+; PC64LE-NEXT:    cmpwi 30, 0
+; PC64LE-NEXT:    blt 0, .LBB35_2
+; PC64LE-NEXT:  # %bb.1: # %entry
+; PC64LE-NEXT:    fmr 1, 31
+; PC64LE-NEXT:  .LBB35_2: # %entry
+; PC64LE-NEXT:    blt 0, .LBB35_4
+; PC64LE-NEXT:  # %bb.3: # %entry
+; PC64LE-NEXT:    xxlxor 2, 2, 2
+; PC64LE-NEXT:  .LBB35_4: # %entry
+; PC64LE-NEXT:    addi 1, 1, 64
+; PC64LE-NEXT:    ld 0, 16(1)
+; PC64LE-NEXT:    lfd 31, -8(1) # 8-byte Folded Reload
+; PC64LE-NEXT:    ld 30, -24(1) # 8-byte Folded Reload
+; PC64LE-NEXT:    mtlr 0
+; PC64LE-NEXT:    blr
+;
+; PC64LE9-LABEL: u32_to_ppcq:
+; PC64LE9:       # %bb.0: # %entry
+; PC64LE9-NEXT:    mflr 0
+; PC64LE9-NEXT:    std 30, -24(1) # 8-byte Folded Spill
+; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
+; PC64LE9-NEXT:    std 0, 16(1)
+; PC64LE9-NEXT:    stdu 1, -64(1)
+; PC64LE9-NEXT:    mr 30, 3
+; PC64LE9-NEXT:    addis 3, 2, .LCPI35_0@toc@ha
+; PC64LE9-NEXT:    xxlxor 2, 2, 2
+; PC64LE9-NEXT:    mtfprwa 0, 30
+; PC64LE9-NEXT:    lfs 3, .LCPI35_0@toc@l(3)
+; PC64LE9-NEXT:    xscvsxddp 31, 0
+; PC64LE9-NEXT:    xxlxor 4, 4, 4
+; PC64LE9-NEXT:    fmr 1, 31
+; PC64LE9-NEXT:    bl __gcc_qadd
+; PC64LE9-NEXT:    nop
+; PC64LE9-NEXT:    cmpwi 30, 0
+; PC64LE9-NEXT:    blt 0, .LBB35_2
+; PC64LE9-NEXT:  # %bb.1: # %entry
+; PC64LE9-NEXT:    fmr 1, 31
+; PC64LE9-NEXT:  .LBB35_2: # %entry
+; PC64LE9-NEXT:    blt 0, .LBB35_4
+; PC64LE9-NEXT:  # %bb.3: # %entry
+; PC64LE9-NEXT:    xxlxor 2, 2, 2
+; PC64LE9-NEXT:  .LBB35_4: # %entry
+; PC64LE9-NEXT:    addi 1, 1, 64
+; PC64LE9-NEXT:    ld 0, 16(1)
+; PC64LE9-NEXT:    lfd 31, -8(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    ld 30, -24(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    mtlr 0
+; PC64LE9-NEXT:    blr
+;
+; PC64-LABEL: u32_to_ppcq:
+; PC64:       # %bb.0: # %entry
+; PC64-NEXT:    mflr 0
+; PC64-NEXT:    std 0, 16(1)
+; PC64-NEXT:    stdu 1, -160(1)
+; PC64-NEXT:    std 30, 128(1) # 8-byte Folded Spill
+; PC64-NEXT:    mr 30, 3
+; PC64-NEXT:    extsw 3, 3
+; PC64-NEXT:    std 3, 120(1)
+; PC64-NEXT:    addis 3, 2, .LCPI35_0@toc@ha
+; PC64-NEXT:    stfd 31, 152(1) # 8-byte Folded Spill
+; PC64-NEXT:    lfd 0, 120(1)
+; PC64-NEXT:    lfs 3, .LCPI35_0@toc@l(3)
+; PC64-NEXT:    addis 3, 2, .LCPI35_1@toc@ha
+; PC64-NEXT:    lfs 31, .LCPI35_1@toc@l(3)
+; PC64-NEXT:    stfd 30, 144(1) # 8-byte Folded Spill
+; PC64-NEXT:    fcfid 30, 0
+; PC64-NEXT:    fmr 1, 30
+; PC64-NEXT:    fmr 2, 31
+; PC64-NEXT:    fmr 4, 31
+; PC64-NEXT:    bl __gcc_qadd
+; PC64-NEXT:    nop
+; PC64-NEXT:    cmpwi 30, 0
+; PC64-NEXT:    blt 0, .LBB35_2
+; PC64-NEXT:  # %bb.1: # %entry
+; PC64-NEXT:    fmr 1, 30
+; PC64-NEXT:  .LBB35_2: # %entry
+; PC64-NEXT:    blt 0, .LBB35_4
+; PC64-NEXT:  # %bb.3: # %entry
+; PC64-NEXT:    fmr 2, 31
+; PC64-NEXT:  .LBB35_4: # %entry
+; PC64-NEXT:    lfd 31, 152(1) # 8-byte Folded Reload
+; PC64-NEXT:    ld 30, 128(1) # 8-byte Folded Reload
+; PC64-NEXT:    lfd 30, 144(1) # 8-byte Folded Reload
+; PC64-NEXT:    addi 1, 1, 160
+; PC64-NEXT:    ld 0, 16(1)
+; PC64-NEXT:    mtlr 0
+; PC64-NEXT:    blr
+entry:
+  %conv = tail call ppc_fp128 @llvm.experimental.constrained.uitofp.ppcf128.i32(i32 %m, metadata !"round.dynamic", metadata !"fpexcept.strict") #1
+  ret ppc_fp128 %conv
+}
+
+define ppc_fp128 @u64_to_ppcq(i64 %m) #0 {
+; PC64LE-LABEL: u64_to_ppcq:
+; PC64LE:       # %bb.0: # %entry
+; PC64LE-NEXT:    mflr 0
+; PC64LE-NEXT:    std 30, -32(1) # 8-byte Folded Spill
+; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
+; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
+; PC64LE-NEXT:    std 0, 16(1)
+; PC64LE-NEXT:    stdu 1, -64(1)
+; PC64LE-NEXT:    mr 30, 3
+; PC64LE-NEXT:    bl __floatditf
+; PC64LE-NEXT:    nop
+; PC64LE-NEXT:    addis 3, 2, .LCPI36_0@toc@ha
+; PC64LE-NEXT:    xxlxor 4, 4, 4
+; PC64LE-NEXT:    fmr 30, 1
+; PC64LE-NEXT:    fmr 31, 2
+; PC64LE-NEXT:    lfs 3, .LCPI36_0@toc@l(3)
+; PC64LE-NEXT:    bl __gcc_qadd
+; PC64LE-NEXT:    nop
+; PC64LE-NEXT:    cmpdi 30, 0
+; PC64LE-NEXT:    blt 0, .LBB36_2
+; PC64LE-NEXT:  # %bb.1: # %entry
+; PC64LE-NEXT:    fmr 1, 30
+; PC64LE-NEXT:  .LBB36_2: # %entry
+; PC64LE-NEXT:    blt 0, .LBB36_4
+; PC64LE-NEXT:  # %bb.3: # %entry
+; PC64LE-NEXT:    fmr 2, 31
+; PC64LE-NEXT:  .LBB36_4: # %entry
+; PC64LE-NEXT:    addi 1, 1, 64
+; PC64LE-NEXT:    ld 0, 16(1)
+; PC64LE-NEXT:    lfd 31, -8(1) # 8-byte Folded Reload
+; PC64LE-NEXT:    lfd 30, -16(1) # 8-byte Folded Reload
+; PC64LE-NEXT:    ld 30, -32(1) # 8-byte Folded Reload
+; PC64LE-NEXT:    mtlr 0
+; PC64LE-NEXT:    blr
+;
+; PC64LE9-LABEL: u64_to_ppcq:
+; PC64LE9:       # %bb.0: # %entry
+; PC64LE9-NEXT:    mflr 0
+; PC64LE9-NEXT:    std 30, -32(1) # 8-byte Folded Spill
+; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
+; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
+; PC64LE9-NEXT:    std 0, 16(1)
+; PC64LE9-NEXT:    stdu 1, -64(1)
+; PC64LE9-NEXT:    mr 30, 3
+; PC64LE9-NEXT:    bl __floatditf
+; PC64LE9-NEXT:    nop
+; PC64LE9-NEXT:    addis 3, 2, .LCPI36_0@toc@ha
+; PC64LE9-NEXT:    xxlxor 4, 4, 4
+; PC64LE9-NEXT:    fmr 30, 1
+; PC64LE9-NEXT:    fmr 31, 2
+; PC64LE9-NEXT:    lfs 3, .LCPI36_0@toc@l(3)
+; PC64LE9-NEXT:    bl __gcc_qadd
+; PC64LE9-NEXT:    nop
+; PC64LE9-NEXT:    cmpdi 30, 0
+; PC64LE9-NEXT:    blt 0, .LBB36_2
+; PC64LE9-NEXT:  # %bb.1: # %entry
+; PC64LE9-NEXT:    fmr 1, 30
+; PC64LE9-NEXT:  .LBB36_2: # %entry
+; PC64LE9-NEXT:    blt 0, .LBB36_4
+; PC64LE9-NEXT:  # %bb.3: # %entry
+; PC64LE9-NEXT:    fmr 2, 31
+; PC64LE9-NEXT:  .LBB36_4: # %entry
+; PC64LE9-NEXT:    addi 1, 1, 64
+; PC64LE9-NEXT:    ld 0, 16(1)
+; PC64LE9-NEXT:    lfd 31, -8(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    lfd 30, -16(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    ld 30, -32(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    mtlr 0
+; PC64LE9-NEXT:    blr
+;
+; PC64-LABEL: u64_to_ppcq:
+; PC64:       # %bb.0: # %entry
+; PC64-NEXT:    mflr 0
+; PC64-NEXT:    std 0, 16(1)
+; PC64-NEXT:    stdu 1, -144(1)
+; PC64-NEXT:    std 30, 112(1) # 8-byte Folded Spill
+; PC64-NEXT:    stfd 30, 128(1) # 8-byte Folded Spill
+; PC64-NEXT:    mr 30, 3
+; PC64-NEXT:    stfd 31, 136(1) # 8-byte Folded Spill
+; PC64-NEXT:    bl __floatditf
+; PC64-NEXT:    nop
+; PC64-NEXT:    addis 3, 2, .LCPI36_0@toc@ha
+; PC64-NEXT:    fmr 31, 2
+; PC64-NEXT:    lfs 3, .LCPI36_0@toc@l(3)
+; PC64-NEXT:    addis 3, 2, .LCPI36_1@toc@ha
+; PC64-NEXT:    fmr 30, 1
+; PC64-NEXT:    lfs 4, .LCPI36_1@toc@l(3)
+; PC64-NEXT:    bl __gcc_qadd
+; PC64-NEXT:    nop
+; PC64-NEXT:    cmpdi 30, 0
+; PC64-NEXT:    blt 0, .LBB36_2
+; PC64-NEXT:  # %bb.1: # %entry
+; PC64-NEXT:    fmr 1, 30
+; PC64-NEXT:  .LBB36_2: # %entry
+; PC64-NEXT:    blt 0, .LBB36_4
+; PC64-NEXT:  # %bb.3: # %entry
+; PC64-NEXT:    fmr 2, 31
+; PC64-NEXT:  .LBB36_4: # %entry
+; PC64-NEXT:    lfd 31, 136(1) # 8-byte Folded Reload
+; PC64-NEXT:    ld 30, 112(1) # 8-byte Folded Reload
+; PC64-NEXT:    lfd 30, 128(1) # 8-byte Folded Reload
+; PC64-NEXT:    addi 1, 1, 144
+; PC64-NEXT:    ld 0, 16(1)
+; PC64-NEXT:    mtlr 0
+; PC64-NEXT:    blr
+entry:
+  %conv = tail call ppc_fp128 @llvm.experimental.constrained.uitofp.ppcf128.i64(i64 %m, metadata !"round.dynamic", metadata !"fpexcept.strict") #1
+  ret ppc_fp128 %conv
+}
+
+define ppc_fp128 @i128_to_ppcq(i128 %m) #0 {
+; PC64LE-LABEL: i128_to_ppcq:
+; PC64LE:       # %bb.0: # %entry
+; PC64LE-NEXT:    mflr 0
+; PC64LE-NEXT:    std 0, 16(1)
+; PC64LE-NEXT:    stdu 1, -32(1)
+; PC64LE-NEXT:    bl __floattitf
+; PC64LE-NEXT:    nop
+; PC64LE-NEXT:    addi 1, 1, 32
+; PC64LE-NEXT:    ld 0, 16(1)
+; PC64LE-NEXT:    mtlr 0
+; PC64LE-NEXT:    blr
+;
+; PC64LE9-LABEL: i128_to_ppcq:
+; PC64LE9:       # %bb.0: # %entry
+; PC64LE9-NEXT:    mflr 0
+; PC64LE9-NEXT:    std 0, 16(1)
+; PC64LE9-NEXT:    stdu 1, -32(1)
+; PC64LE9-NEXT:    bl __floattitf
+; PC64LE9-NEXT:    nop
+; PC64LE9-NEXT:    addi 1, 1, 32
+; PC64LE9-NEXT:    ld 0, 16(1)
+; PC64LE9-NEXT:    mtlr 0
+; PC64LE9-NEXT:    blr
+;
+; PC64-LABEL: i128_to_ppcq:
+; PC64:       # %bb.0: # %entry
+; PC64-NEXT:    mflr 0
+; PC64-NEXT:    std 0, 16(1)
+; PC64-NEXT:    stdu 1, -112(1)
+; PC64-NEXT:    bl __floattitf
+; PC64-NEXT:    nop
+; PC64-NEXT:    addi 1, 1, 112
+; PC64-NEXT:    ld 0, 16(1)
+; PC64-NEXT:    mtlr 0
+; PC64-NEXT:    blr
+entry:
+  %conv = tail call ppc_fp128 @llvm.experimental.constrained.sitofp.ppcf128.i128(i128 %m, metadata !"round.dynamic", metadata !"fpexcept.strict") #1
+  ret ppc_fp128 %conv
+}
+
+define ppc_fp128 @u128_to_ppcq(i128 %m) #0 {
+; PC64LE-LABEL: u128_to_ppcq:
+; PC64LE:       # %bb.0: # %entry
+; PC64LE-NEXT:    mflr 0
+; PC64LE-NEXT:    std 30, -32(1) # 8-byte Folded Spill
+; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
+; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
+; PC64LE-NEXT:    std 0, 16(1)
+; PC64LE-NEXT:    stdu 1, -64(1)
+; PC64LE-NEXT:    mr 30, 4
+; PC64LE-NEXT:    bl __floattitf
+; PC64LE-NEXT:    nop
+; PC64LE-NEXT:    addis 3, 2, .LCPI38_0@toc@ha
+; PC64LE-NEXT:    xxlxor 4, 4, 4
+; PC64LE-NEXT:    fmr 30, 1
+; PC64LE-NEXT:    fmr 31, 2
+; PC64LE-NEXT:    lfd 3, .LCPI38_0@toc@l(3)
+; PC64LE-NEXT:    bl __gcc_qadd
+; PC64LE-NEXT:    nop
+; PC64LE-NEXT:    cmpdi 30, 0
+; PC64LE-NEXT:    blt 0, .LBB38_2
+; PC64LE-NEXT:  # %bb.1: # %entry
+; PC64LE-NEXT:    fmr 1, 30
+; PC64LE-NEXT:  .LBB38_2: # %entry
+; PC64LE-NEXT:    blt 0, .LBB38_4
+; PC64LE-NEXT:  # %bb.3: # %entry
+; PC64LE-NEXT:    fmr 2, 31
+; PC64LE-NEXT:  .LBB38_4: # %entry
+; PC64LE-NEXT:    addi 1, 1, 64
+; PC64LE-NEXT:    ld 0, 16(1)
+; PC64LE-NEXT:    lfd 31, -8(1) # 8-byte Folded Reload
+; PC64LE-NEXT:    lfd 30, -16(1) # 8-byte Folded Reload
+; PC64LE-NEXT:    ld 30, -32(1) # 8-byte Folded Reload
+; PC64LE-NEXT:    mtlr 0
+; PC64LE-NEXT:    blr
+;
+; PC64LE9-LABEL: u128_to_ppcq:
+; PC64LE9:       # %bb.0: # %entry
+; PC64LE9-NEXT:    mflr 0
+; PC64LE9-NEXT:    std 30, -32(1) # 8-byte Folded Spill
+; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
+; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
+; PC64LE9-NEXT:    std 0, 16(1)
+; PC64LE9-NEXT:    stdu 1, -64(1)
+; PC64LE9-NEXT:    mr 30, 4
+; PC64LE9-NEXT:    bl __floattitf
+; PC64LE9-NEXT:    nop
+; PC64LE9-NEXT:    addis 3, 2, .LCPI38_0@toc@ha
+; PC64LE9-NEXT:    xxlxor 4, 4, 4
+; PC64LE9-NEXT:    fmr 30, 1
+; PC64LE9-NEXT:    lfd 3, .LCPI38_0@toc@l(3)
+; PC64LE9-NEXT:    fmr 31, 2
+; PC64LE9-NEXT:    bl __gcc_qadd
+; PC64LE9-NEXT:    nop
+; PC64LE9-NEXT:    cmpdi 30, 0
+; PC64LE9-NEXT:    blt 0, .LBB38_2
+; PC64LE9-NEXT:  # %bb.1: # %entry
+; PC64LE9-NEXT:    fmr 1, 30
+; PC64LE9-NEXT:  .LBB38_2: # %entry
+; PC64LE9-NEXT:    blt 0, .LBB38_4
+; PC64LE9-NEXT:  # %bb.3: # %entry
+; PC64LE9-NEXT:    fmr 2, 31
+; PC64LE9-NEXT:  .LBB38_4: # %entry
+; PC64LE9-NEXT:    addi 1, 1, 64
+; PC64LE9-NEXT:    ld 0, 16(1)
+; PC64LE9-NEXT:    lfd 31, -8(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    lfd 30, -16(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    ld 30, -32(1) # 8-byte Folded Reload
+; PC64LE9-NEXT:    mtlr 0
+; PC64LE9-NEXT:    blr
+;
+; PC64-LABEL: u128_to_ppcq:
+; PC64:       # %bb.0: # %entry
+; PC64-NEXT:    mflr 0
+; PC64-NEXT:    std 0, 16(1)
+; PC64-NEXT:    stdu 1, -144(1)
+; PC64-NEXT:    std 30, 112(1) # 8-byte Folded Spill
+; PC64-NEXT:    stfd 30, 128(1) # 8-byte Folded Spill
+; PC64-NEXT:    mr 30, 3
+; PC64-NEXT:    stfd 31, 136(1) # 8-byte Folded Spill
+; PC64-NEXT:    bl __floattitf
+; PC64-NEXT:    nop
+; PC64-NEXT:    addis 3, 2, .LCPI38_0@toc@ha
+; PC64-NEXT:    fmr 31, 2
+; PC64-NEXT:    lfd 3, .LCPI38_0@toc@l(3)
+; PC64-NEXT:    addis 3, 2, .LCPI38_1@toc@ha
+; PC64-NEXT:    fmr 30, 1
+; PC64-NEXT:    lfs 4, .LCPI38_1@toc@l(3)
+; PC64-NEXT:    bl __gcc_qadd
+; PC64-NEXT:    nop
+; PC64-NEXT:    cmpdi 30, 0
+; PC64-NEXT:    blt 0, .LBB38_2
+; PC64-NEXT:  # %bb.1: # %entry
+; PC64-NEXT:    fmr 1, 30
+; PC64-NEXT:  .LBB38_2: # %entry
+; PC64-NEXT:    blt 0, .LBB38_4
+; PC64-NEXT:  # %bb.3: # %entry
+; PC64-NEXT:    fmr 2, 31
+; PC64-NEXT:  .LBB38_4: # %entry
+; PC64-NEXT:    lfd 31, 136(1) # 8-byte Folded Reload
+; PC64-NEXT:    ld 30, 112(1) # 8-byte Folded Reload
+; PC64-NEXT:    lfd 30, 128(1) # 8-byte Folded Reload
+; PC64-NEXT:    addi 1, 1, 144
+; PC64-NEXT:    ld 0, 16(1)
+; PC64-NEXT:    mtlr 0
+; PC64-NEXT:    blr
+entry:
+  %conv = tail call ppc_fp128 @llvm.experimental.constrained.uitofp.ppcf128.i128(i128 %m, metadata !"round.dynamic", metadata !"fpexcept.strict") #1
+  ret ppc_fp128 %conv
+}
+
 attributes #0 = { nounwind strictfp }
 attributes #1 = { strictfp }
 
 declare ppc_fp128 @llvm.experimental.constrained.fadd.ppcf128(ppc_fp128, ppc_fp128, metadata, metadata)
 declare ppc_fp128 @llvm.experimental.constrained.ceil.ppcf128(ppc_fp128, metadata)
 declare ppc_fp128 @llvm.experimental.constrained.cos.ppcf128(ppc_fp128, metadata, metadata)
 declare ppc_fp128 @llvm.experimental.constrained.fdiv.ppcf128(ppc_fp128, ppc_fp128, metadata, metadata)
 declare ppc_fp128 @llvm.experimental.constrained.exp.ppcf128(ppc_fp128, metadata, metadata)

 declare ppc_fp128 @llvm.experimental.constrained.sin.ppcf128(ppc_fp128, metadata, metadata)
 declare ppc_fp128 @llvm.experimental.constrained.sqrt.ppcf128(ppc_fp128, metadata, metadata)
 declare ppc_fp128 @llvm.experimental.constrained.fsub.ppcf128(ppc_fp128, ppc_fp128, metadata, metadata)
 declare ppc_fp128 @llvm.experimental.constrained.trunc.ppcf128(ppc_fp128, metadata)
 declare i64 @llvm.experimental.constrained.fptosi.i64.ppcf128(ppc_fp128, metadata)
 declare i32 @llvm.experimental.constrained.fptosi.i32.ppcf128(ppc_fp128, metadata)
 declare i64 @llvm.experimental.constrained.fptoui.i64.ppcf128(ppc_fp128, metadata)
 declare i32 @llvm.experimental.constrained.fptoui.i32.ppcf128(ppc_fp128, metadata)
+declare ppc_fp128 @llvm.experimental.constrained.sitofp.ppcf128.i32(i32, metadata, metadata)
+declare ppc_fp128 @llvm.experimental.constrained.uitofp.ppcf128.i32(i32, metadata, metadata)
+declare ppc_fp128 @llvm.experimental.constrained.sitofp.ppcf128.i64(i64, metadata, metadata)
+declare ppc_fp128 @llvm.experimental.constrained.uitofp.ppcf128.i64(i64, metadata, metadata)
+declare ppc_fp128 @llvm.experimental.constrained.sitofp.ppcf128.i128(i128, metadata, metadata)
+declare ppc_fp128 @llvm.experimental.constrained.uitofp.ppcf128.i128(i128, metadata, metadata)