Implement them on top of sdiv/udiv, similar to what we do for integer types.
Potential future work: implementing i8/i16 srem/urem, optimizations for constant divisors, optimizing the mul+sub to mls.
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[AArch64][SVE] Add legalization support for i32/i64 vector srem/urem ClosedPublic Authored by efriedma on Jun 9 2020, 3:09 PM.
Details Summary Implement them on top of sdiv/udiv, similar to what we do for integer types. Potential future work: implementing i8/i16 srem/urem, optimizations for constant divisors, optimizing the mul+sub to mls.
Diff Detail
Event TimelineComment Actions Please can you regenerate/commit llvm-ir-to-intrinsic.ll against trunk first to reduce the diffs? This revision is now accepted and ready to land.Jun 16 2020, 1:55 PM
Closed by commit rGe9d4e34ab8a4: [AArch64][SVE] Add legalization support for i32/i64 vector srem/urem (authored by efriedma). · Explain WhyJun 23 2020, 4:44 PM This revision was automatically updated to reflect the committed changes. efriedma marked an inline comment as done.
Revision Contents
Diff 272869 llvm/include/llvm/CodeGen/TargetLowering.h
llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
llvm/lib/CodeGen/SelectionDAG/LegalizeVectorOps.cpp
llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
llvm/lib/Target/ARM/ARMISelLowering.cpp
llvm/test/CodeGen/AArch64/llvm-ir-to-intrinsic.ll
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nit: missing whitespace above this line.