[HIP][AMDGPU] Enable structurizer workarounds

[sameerds]

Summary

The StrucurizeCFG pass has two known limitations that are addressed by
the FixIrreducible pass and the UnifyLoopExits pass. These passes are
invoked by the AMDGPU backend, but currently hidden behind a
command-line option which is disabled by default.

This change enables the workaround when compiling a HIP program. The
option can now be specified multiple times. The user can thus
override the HIP default using:

clang -mllvm --amdgpu-enable-structurizer-workarounds=false

The HIP toolchain passes all "-mllvm" options to both opt and
llc. But this particular option has no effect on the opt invocation
since it is only used by the AMDGPU target during code generation.

[arsenm]

clang/lib/Driver/ToolChains/HIP.cpp

158

We should just flip this in the backend. llc flags are not intended for frontends to set options

[sameerds]

clang/lib/Driver/ToolChains/HIP.cpp

158

Admittedly, this is a broken workflow. I am not even sure if Clang should be invoking llc at all. Ideally, we would want to eliminate this flag entirely. But flipping it is okay too if graphics workloads are sensitive to it. The priority right now is to enable the workarounds officially only for HIP and this seems to be most concise way to do it. We can flip the flag once other users of the AMDGPU are on board.

[sameerds]

clang/lib/Driver/ToolChains/HIP.cpp

158

To clarify, we can flip it in the backend if graphcis workloads are not sensitive to it. But HIP needs this earlier.

[sameerds]

Abandoned in favour of enabling the workarounds in the AMDGPU backend: https://reviews.llvm.org/D81211

clang/lib/Driver/ToolChains/HIP.cpp

const char *AMDGCN::Linker::constructLlcCommand(
   // The input to llc is the output from opt.
   LlcArgs.push_back(InputFileName);
   // Pass optimization arg to llc.
   addOptLevelArgs(Args, LlcArgs, /*IsLlc=*/true);
   LlcArgs.push_back("-mtriple=amdgcn-amd-amdhsa");
   LlcArgs.push_back(Args.MakeArgString("-mcpu=" + SubArchName));
   LlcArgs.push_back(
       Args.MakeArgString(Twine("-filetype=") + (OutputIsAsm ? "asm" : "obj")));
+  LlcArgs.push_back("--amdgpu-enable-structurizer-workarounds");
 
   // Extract all the -m options
   std::vector<llvm::StringRef> Features;
   handleTargetFeaturesGroup(
     Args, Features, options::OPT_m_amdgpu_Features_Group);
 
   // Add features to mattr such as xnack
   std::string MAttrString = "-mattr=";

clang/test/Driver/hip-structurizer-workarounds.hip

+// REQUIRES: clang-driver
+// REQUIRES: x86-registered-target
+// REQUIRES: amdgpu-registered-target
+
+// RUN: %clang -### -x hip %s 2>&1 | FileCheck %s -check-prefix=CHECK
+// RUN: %clang -### -x hip -mllvm --amdgpu-enable-structurizer-workarounds=false %s 2>&1 | FileCheck %s -check-prefix=CHECK -check-prefix=MLLVM
+
+// CHECK: "{{.*llc}}"
+// CHECK-SAME: "-mtriple=amdgcn-amd-amdhsa"
+// CHECK-SAME: "--amdgpu-enable-structurizer-workarounds"
+// MLLVM-SAME: "--amdgpu-enable-structurizer-workarounds=false"

llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

static cl::opt<bool> EnableScalarIRPasses(
   "amdgpu-scalar-ir-passes",
   cl::desc("Enable scalar IR passes"),
   cl::init(true),
   cl::Hidden);
 
 static cl::opt<bool> EnableStructurizerWorkarounds(
     "amdgpu-enable-structurizer-workarounds",
     cl::desc("Enable workarounds for the StructurizeCFG pass"), cl::init(false),
-    cl::Hidden);
+    cl::Hidden, cl::ZeroOrMore);
 
 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAMDGPUTarget() {
   // Register the target
   RegisterTargetMachine<R600TargetMachine> X(getTheAMDGPUTarget());
   RegisterTargetMachine<GCNTargetMachine> Y(getTheGCNTarget());
 
   PassRegistry *PR = PassRegistry::getPassRegistry();
   initializeR600ClauseMergePassPass(*PR);