[builtins] Support architectures with 16-bit int

[aykevl]

Summary

This is the first patch in a series to add support for the AVR target. This patch includes changes to make compiler-rt more target independent by not relying on the width of an int or long.

---

Some notes:

• I changed the integer types used in many builtins (si_int, du_int, etc) to specific integer widths. My rationale is that even though the libgcc documentation uses types such as int / long / long long, I believe their bit width is actually much more strictly defined. For example: LLVM has a file RuntimeLibcalls.def where it uses very specific bit widths for all these builtins.
• I changed some parameters and return types from si_int to just int when they are used for a number of bits (such as in shift instructions). Affected functions: __ashldi3, __ashrdi3, __ctzdi2, __ffsdi2, __ffssi2, __lshrdi3, __popcountdi2.
• I changed some bare int/unsigned int types to a more specific si_int/su_int. I think this has always been an issue but nobody noticed because they used to be the same. Affected functions: __floatsidf, __floatunsidf.
• I changed a few zero-counting builtin calls (__builtin_clz, __builtin_ctzl, etc) to use a bigger integer width. This seems to work, but perhaps it's better to define macros for these in int_lib.h: this change may have performance implications.

For context: I have a branch here where I collect all the patches needed to add support for AVR in the compiler-rt builtins. Some commits are already upstream, some are still in review, and some need some cleanup before I can post them on Phabricator.

[efriedma]

Is making all shift amounts "int" consistent with what LLVM does?

Maybe it would make sense to stick macros in int_types.h to call the right __builtin_clz/__builtin_ctz variant for si_int?

compiler-rt/lib/builtins/floatdisf.c

29

si_int?

compiler-rt/lib/builtins/floatundisf.c

27

si_int?

compiler-rt/lib/builtins/fp_extend.h

24

Maybe #if UINT_MAX < 0xFFFFFFFF, since that's what we actually care about.

[aykevl]

In D78662#1997884, @efriedma wrote:

Is making all shift amounts "int" consistent with what LLVM does?

So I've been looking into it a bit and found that LLVM appears to truncate these numbers to i8 before calling the function. Which makes sense, because with that you can still shift large numbers with just an i8. I think it doesn't matter which integer width it is in most calling conventions, especially as it is the last parameter to be passed.
Source code for test: https://llvm.godbolt.org/z/xDaNQk
As you can see, only shifts of type i16 or i8 lack mov instructions to get the shift amount in the right place. And you can see that these are mov instructions (for 8-bit moves), not movw instructions (for 16-bit moves).
EDIT: also note that the AVR calling convention aligns values passed in registers to two bytes, so it will use a register pair even for an i8. That's why an i16 works.

I have also compiled LLVM with the following patch:

diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 453500aa9e5..2ff67feb99d 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -3528,6 +3528,8 @@ void DAGTypeLegalizer::ExpandIntRes_Shift(SDNode *N,
   }
 
   if (LC != RTLIB::UNKNOWN_LIBCALL && TLI.getLibcallName(LC)) {
+    printf("shift libcall operand 1:\n");
+    N->getOperand(1).dump();
     SDValue Ops[2] = { N->getOperand(0), N->getOperand(1) };
     TargetLowering::MakeLibCallOptions CallOptions;
     CallOptions.setSExt(isSigned);

For the above example I get the following output on AVR:

shift libcall operand 1:
t23: i8 = truncate t6
shift libcall operand 1:
t9: i8 = truncate t6
shift libcall operand 1:
t6: i8,ch = CopyFromReg t0, Register:i8 %2
shift libcall operand 1:
t45: i8 = truncate t10
shift libcall operand 1:
t38: i8 = truncate t10
shift libcall operand 1:
t15: i8 = truncate t10
shift libcall operand 1:
t10: i8,ch = CopyFromReg t0, Register:i8 %4

Notice that all shift widths are of type i8.
Unfortunately I don't have any other architectures compiled in that need such shifts (such as msp430).

In summary: I think using int is fine as LLVM internally passes an i8. It might even make sense to use unsigned char (to more closely match LLVM), but I don't think it's needed for the currently supported architecutres.

[aykevl]

• defined two macros clzsi and ctzsi for counting bits in si_int and su_int
• changed int32_t to si_int in two places

I believe this addresses all review comments.
I'm not entirely sure about the clzsi/ctzsi macros. The name seems clear enough, but perhaps they are too close to __clzsi2/__ctzsi2.

[efriedma]

In summary: I think using int is fine as LLVM internally passes an i8

That doesn't seem quite right. Consider, for example, long long a(long long a, int b) { return a << (char)(b); }. To generate correct code, you need to clear the high bits of b. If we just model the argument as an anyext i8, we'll skip clearing those bits, and the compiler-rt C implementations will have undefined behavior. It looks like LLVM does actually extend the value to "int", though. (It doesn't choose between sign/zero extend consistently, but it doesn't actually matter here).

I tried to gather some other relevant evidence from building some examples with gcc. Apparently popcount and count leading/trailing zeros do actually return "int", always. This change is consistent with that; we probably should fix LLVM. (LLVM doesn't usually use the libcalls for those, but it can in some cases, I think.)

[efriedma]

As for this patch itself, LGTM, but I'd like a second set of eyes on it.

[MaskRay]

This passed our internal tests, so I am also fine with the change.

[aykevl]

In D78662#2000428, @efriedma wrote:

In summary: I think using int is fine as LLVM internally passes an i8

That doesn't seem quite right. Consider, for example, long long a(long long a, int b) { return a << (char)(b); }. To generate correct code, you need to clear the high bits of b. If we just model the argument as an anyext i8, we'll skip clearing those bits, and the compiler-rt C implementations will have undefined behavior. It looks like LLVM does actually extend the value to "int", though. (It doesn't choose between sign/zero extend consistently, but it doesn't actually matter here).

Interesting, where did you find this?
I tried what would happen on AVR, and it doesn't seem to extend the integer. This could be a backend bug, though.
https://llvm.godbolt.org/z/6RgqVi

define i32 @shift8(i32 %a, i8 %b) {
  %b32 = zext i8 %b to i32
  %result = lshr i32 %a, %b32
  ret i32 %result
}

shift8:
        call    __lshrsi3
        ret

In any case, this patch shouldn't have changed any of that as there was only a change from si_int to int, and they were equivalent before.

[efriedma]

Interesting, where did you find this?

I was trying with msp430; I had trouble getting a testcase to build with AVR (I forget why). I guess AVR actually behaves differently: it doesn't respect "zeroext" markings on arguments, unlike most targets.

Given that, there's probably a bug we need to fix, in either the AVR backend or type legalization.

[uabelho]

compiler-rt/lib/builtins/udivmoddi4.c

85

Did you consider changing this call into the new macro ctzsi?

Our downstream target also has ints that are 16 bits wide and we've had some downstream changes somewhat similar to this patch, but then we also changed this call (and another one to builtin_ctz in this file) to builtin_ctzl.

[aykevl]

In D78662#2006405, @efriedma wrote:

I was trying with msp430; I had trouble getting a testcase to build with AVR (I forget why). I guess AVR actually behaves differently: it doesn't respect "zeroext" markings on arguments, unlike most targets.

Given that, there's probably a bug we need to fix, in either the AVR backend or type legalization.

I see. There is definitely a chance that AVR doesn't respect zeroext. I know there are still bugs in the backend that haven't been fixed yet. So far, ABI compatibility bugs haven't been high on my priority list, as long as LLVM-compiled code works with other LLVM-compiled code.

compiler-rt/lib/builtins/udivmoddi4.c

85

I only changed the places that needed changes to get the tests to pass. This file should have been tested together with all other builtins so I think it works on AVR. Of course, if it needs to be changed for your target feel free to send a patch :)

[atrosinenko]

I changed the integer types used in many builtins (si_int, du_int, etc) to specific integer widths. My rationale is that even though the libgcc documentation uses types such as int / long / long long, I believe their bit width is actually much more strictly defined.

When porting compiler-rt builtins to MSP430 and wondering why my locally built clang_rt turns out to differ from libgcc in ABI, I finally read an introduction comment one level above explicitly mentioning:

These routines take arguments and return values of a specific machine mode, not a specific C type. See Machine Modes, for an explanation of this concept. For illustrative purposes, in this chapter the floating point type float is assumed to correspond to SFmode; double to DFmode; and long double to both TFmode and XFmode. Similarly, the integer types int and unsigned int correspond to SImode; long and unsigned long to DImode; and long long and unsigned long long to TImode.

compiler-rt/lib/builtins/absvsi2.c

 #include "int_lib.h"
 
 // Returns: absolute value
 
 // Effects: aborts if abs(x) < 0
 
 COMPILER_RT_ABI si_int __absvsi2(si_int a) {
   const int N = (int)(sizeof(si_int) * CHAR_BIT);
-  if (a == (1 << (N - 1)))
+  if (a == ((si_int)1 << (N - 1)))
     compilerrt_abort();
   const si_int t = a >> (N - 1);
   return (a ^ t) - t;
 }

compiler-rt/lib/builtins/ashldi3.c

 //===----------------------------------------------------------------------===//
 
 #include "int_lib.h"
 
 // Returns: a << b
 
 // Precondition:  0 <= b < bits_in_dword
 
-COMPILER_RT_ABI di_int __ashldi3(di_int a, si_int b) {
+COMPILER_RT_ABI di_int __ashldi3(di_int a, int b) {
   const int bits_in_word = (int)(sizeof(si_int) * CHAR_BIT);
   dwords input;
   dwords result;
   input.all = a;
   if (b & bits_in_word) /* bits_in_word <= b < bits_in_dword */ {
     result.s.low = 0;
     result.s.high = input.s.low << (b - bits_in_word);
   } else /* 0 <= b < bits_in_word */ {

compiler-rt/lib/builtins/ashrdi3.c

 //===----------------------------------------------------------------------===//
 
 #include "int_lib.h"
 
 // Returns: arithmetic a >> b
 
 // Precondition:  0 <= b < bits_in_dword
 
-COMPILER_RT_ABI di_int __ashrdi3(di_int a, si_int b) {
+COMPILER_RT_ABI di_int __ashrdi3(di_int a, int b) {
   const int bits_in_word = (int)(sizeof(si_int) * CHAR_BIT);
   dwords input;
   dwords result;
   input.all = a;
   if (b & bits_in_word) /* bits_in_word <= b < bits_in_dword */ {
     // result.s.high = input.s.high < 0 ? -1 : 0
     result.s.high = input.s.high >> (bits_in_word - 1);
     result.s.low = input.s.high >> (b - bits_in_word);

compiler-rt/lib/builtins/clzdi2.c

 #endif
 
 // Precondition: a != 0
 
 COMPILER_RT_ABI si_int __clzdi2(di_int a) {
   dwords x;
   x.all = a;
   const si_int f = -(x.s.high == 0);
-  return __builtin_clz((x.s.high & ~f) | (x.s.low & f)) +
+  return clzsi((x.s.high & ~f) | (x.s.low & f)) +
          (f & ((si_int)(sizeof(si_int) * CHAR_BIT)));
 }

compiler-rt/lib/builtins/ctzdi2.c

 // ctz instruction, gcc resolves __builtin_ctz to __ctzdi2 rather than
 // __ctzsi2, leading to infinite recursion.
 #define __builtin_ctz(a) __ctzsi2(a)
 extern si_int __ctzsi2(si_int);
 #endif
 
 // Precondition: a != 0
 
-COMPILER_RT_ABI si_int __ctzdi2(di_int a) {
+COMPILER_RT_ABI int __ctzdi2(di_int a) {
   dwords x;
   x.all = a;
   const si_int f = -(x.s.low == 0);
-  return __builtin_ctz((x.s.high & f) | (x.s.low & ~f)) +
+  return ctzsi((x.s.high & f) | (x.s.low & ~f)) +
          (f & ((si_int)(sizeof(si_int) * CHAR_BIT)));
 }

compiler-rt/lib/builtins/ffsdi2.c

 //
 //===----------------------------------------------------------------------===//
 
 #include "int_lib.h"
 
 // Returns: the index of the least significant 1-bit in a, or
 // the value zero if a is zero. The least significant bit is index one.
 
-COMPILER_RT_ABI si_int __ffsdi2(di_int a) {
+COMPILER_RT_ABI int __ffsdi2(di_int a) {
   dwords x;
   x.all = a;
   if (x.s.low == 0) {
     if (x.s.high == 0)
       return 0;
-    return __builtin_ctz(x.s.high) + (1 + sizeof(si_int) * CHAR_BIT);
+    return ctzsi(x.s.high) + (1 + sizeof(si_int) * CHAR_BIT);
   }
-  return __builtin_ctz(x.s.low) + 1;
+  return ctzsi(x.s.low) + 1;
 }

compiler-rt/lib/builtins/ffssi2.c

 //
 //===----------------------------------------------------------------------===//
 
 #include "int_lib.h"
 
 // Returns: the index of the least significant 1-bit in a, or
 // the value zero if a is zero. The least significant bit is index one.
 
-COMPILER_RT_ABI si_int __ffssi2(si_int a) {
+COMPILER_RT_ABI int __ffssi2(si_int a) {
   if (a == 0) {
     return 0;
   }
-  return __builtin_ctz(a) + 1;
+  return ctzsi(a) + 1;
 }

compiler-rt/lib/builtins/floatdisf.c

 
 COMPILER_RT_ABI float __floatdisf(di_int a) {
   if (a == 0)
     return 0.0F;
   const unsigned N = sizeof(di_int) * CHAR_BIT;
   const di_int s = a >> (N - 1);
   a = (a ^ s) - s;
   int sd = N - __builtin_clzll(a); // number of significant digits
-  int e = sd - 1;                  // exponent
+  si_int e = sd - 1;               // exponent
   if (sd > FLT_MANT_DIG) {
     //  start:  0000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQxxxxxxxxxxxxxxxxxx
     //  finish: 000000000000000000000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQR
     //                                                12345678901234567890123456
     //  1 = msb 1 bit
     //  P = bit FLT_MANT_DIG-1 bits to the right of 1
     //  Q = bit FLT_MANT_DIG bits to the right of 1
     //  R = "or" of all bits to the right of Q

compiler-rt/lib/builtins/floatsidf.c

 //
 //===----------------------------------------------------------------------===//
 
 #define DOUBLE_PRECISION
 #include "fp_lib.h"
 
 #include "int_lib.h"
 
-COMPILER_RT_ABI fp_t __floatsidf(int a) {
+COMPILER_RT_ABI fp_t __floatsidf(si_int a) {
 
   const int aWidth = sizeof a * CHAR_BIT;
 
   // Handle zero as a special case to protect clz
   if (a == 0)
     return fromRep(0);
 
   // All other cases begin by extracting the sign and absolute value of a
   rep_t sign = 0;
   if (a < 0) {
     sign = signBit;
     a = -a;
   }
 
   // Exponent of (fp_t)a is the width of abs(a).
-  const int exponent = (aWidth - 1) - __builtin_clz(a);
+  const int exponent = (aWidth - 1) - clzsi(a);
   rep_t result;
 
   // Shift a into the significand field and clear the implicit bit.  Extra
   // cast to unsigned int is necessary to get the correct behavior for
   // the input INT_MIN.
   const int shift = significandBits - exponent;
-  result = (rep_t)(unsigned int)a << shift ^ implicitBit;
+  result = (rep_t)(su_int)a << shift ^ implicitBit;
 
   // Insert the exponent
   result += (rep_t)(exponent + exponentBias) << significandBits;
   // Insert the sign bit and return
   return fromRep(result | sign);
 }
 
 #if defined(__ARM_EABI__)
 #if defined(COMPILER_RT_ARMHF_TARGET)
-AEABI_RTABI fp_t __aeabi_i2d(int a) { return __floatsidf(a); }
+AEABI_RTABI fp_t __aeabi_i2d(si_int a) { return __floatsidf(a); }
 #else
 COMPILER_RT_ALIAS(__floatsidf, __aeabi_i2d)
 #endif
 #endif

compiler-rt/lib/builtins/floatundisf.c

 
 #include "int_lib.h"
 
 COMPILER_RT_ABI float __floatundisf(du_int a) {
   if (a == 0)
     return 0.0F;
   const unsigned N = sizeof(du_int) * CHAR_BIT;
   int sd = N - __builtin_clzll(a); // number of significant digits
-  int e = sd - 1;                  // 8 exponent
+  si_int e = sd - 1;               // 8 exponent
   if (sd > FLT_MANT_DIG) {
     //  start:  0000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQxxxxxxxxxxxxxxxxxx
     //  finish: 000000000000000000000000000000000000001xxxxxxxxxxxxxxxxxxxxxxPQR
     //                                                12345678901234567890123456
     //  1 = msb 1 bit
     //  P = bit FLT_MANT_DIG-1 bits to the right of 1
     //  Q = bit FLT_MANT_DIG bits to the right of 1
     //  R = "or" of all bits to the right of Q

compiler-rt/lib/builtins/floatunsidf.c

 //
 //===----------------------------------------------------------------------===//
 
 #define DOUBLE_PRECISION
 #include "fp_lib.h"
 
 #include "int_lib.h"
 
-COMPILER_RT_ABI fp_t __floatunsidf(unsigned int a) {
+COMPILER_RT_ABI fp_t __floatunsidf(su_int a) {
 
   const int aWidth = sizeof a * CHAR_BIT;
 
   // Handle zero as a special case to protect clz
   if (a == 0)
     return fromRep(0);
 
   // Exponent of (fp_t)a is the width of abs(a).
-  const int exponent = (aWidth - 1) - __builtin_clz(a);
+  const int exponent = (aWidth - 1) - clzsi(a);
   rep_t result;
 
   // Shift a into the significand field and clear the implicit bit.
   const int shift = significandBits - exponent;
   result = (rep_t)a << shift ^ implicitBit;
 
   // Insert the exponent
   result += (rep_t)(exponent + exponentBias) << significandBits;
   return fromRep(result);
 }
 
 #if defined(__ARM_EABI__)
 #if defined(COMPILER_RT_ARMHF_TARGET)
-AEABI_RTABI fp_t __aeabi_ui2d(unsigned int a) { return __floatunsidf(a); }
+AEABI_RTABI fp_t __aeabi_ui2d(su_int a) { return __floatunsidf(a); }
 #else
 COMPILER_RT_ALIAS(__floatunsidf, __aeabi_ui2d)
 #endif
 #endif

compiler-rt/lib/builtins/fp_extend.h

 
 #include "int_lib.h"
 
 #if defined SRC_SINGLE
 typedef float src_t;
 typedef uint32_t src_rep_t;
 #define SRC_REP_C UINT32_C
 static const int srcSigBits = 23;
-#define src_rep_t_clz __builtin_clz
+#define src_rep_t_clz clzsi
 
 #elif defined SRC_DOUBLE
 typedef double src_t;
 typedef uint64_t src_rep_t;
 #define SRC_REP_C UINT64_C
 static const int srcSigBits = 52;
 static __inline int src_rep_t_clz(src_rep_t a) {
 #if defined __LP64__

compiler-rt/lib/builtins/fp_lib.h

 #define REP_C UINT64_C
 #define significandBits 52
 
 static __inline int rep_clz(rep_t a) {
 #if defined __LP64__
   return __builtin_clzl(a);
 #else
   if (a & REP_C(0xffffffff00000000))
-    return __builtin_clz(a >> 32);
+    return clzsi(a >> 32);
   else
-    return 32 + __builtin_clz(a & REP_C(0xffffffff));
+    return 32 + clzsi(a & REP_C(0xffffffff));
 #endif
 }
 
 #define loWord(a) (a & 0xffffffffU)
 #define hiWord(a) (a >> 32)
 
 // 64x64 -> 128 wide multiply for platforms that don't have such an operation;
 // many 64-bit platforms have this operation, but they tend to have hardware

compiler-rt/lib/builtins/int_div_impl.inc

 //===-- int_div_impl.inc - Integer division ---------------------*- C++ -*-===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // Helpers used by __udivsi3, __umodsi3, __udivdi3, and __umodsi3.
 //
 //===----------------------------------------------------------------------===//
 
-#define clz(a) (sizeof(a) == sizeof(unsigned long long) ? __builtin_clzll(a) : __builtin_clz(a))
+#define clz(a) (sizeof(a) == sizeof(unsigned long long) ? __builtin_clzll(a) : clzsi(a))
 
 // Adapted from Figure 3-40 of The PowerPC Compiler Writer's Guide
 static __inline fixuint_t __udivXi3(fixuint_t n, fixuint_t d) {
   const unsigned N = sizeof(fixuint_t) * CHAR_BIT;
   // d == 0 cases are unspecified.
   unsigned sr = (d ? clz(d) : N) - (n ? clz(n) : N);
   // 0 <= sr <= N - 1 or sr is very large.
   if (sr > N - 1) // n < d

compiler-rt/lib/builtins/int_types.h

 #define INT_TYPES_H
 
 #include "int_endianness.h"
 
 // si_int is defined in Linux sysroot's asm-generic/siginfo.h
 #ifdef si_int
 #undef si_int
 #endif
-typedef int si_int;
-typedef unsigned su_int;
+typedef int32_t si_int;
+typedef uint32_t su_int;
+#if UINT_MAX == 0xFFFFFFFF
+#define clzsi __builtin_clz
+#define ctzsi __builtin_ctz
+#elif ULONG_MAX == 0xFFFFFFFF
+#define clzsi __builtin_clzl
+#define ctzsi __builtin_ctzl
+#else
+#error could not determine appropriate clzsi macro for this system
+#endif
 
-typedef long long di_int;
-typedef unsigned long long du_int;
+typedef int64_t di_int;
+typedef uint64_t du_int;
 
 typedef union {
   di_int all;
   struct {
 #if _YUGA_LITTLE_ENDIAN
     su_int low;
     si_int high;
 #else

compiler-rt/lib/builtins/lshrdi3.c

 //===----------------------------------------------------------------------===//
 
 #include "int_lib.h"
 
 // Returns: logical a >> b
 
 // Precondition:  0 <= b < bits_in_dword
 
-COMPILER_RT_ABI di_int __lshrdi3(di_int a, si_int b) {
+COMPILER_RT_ABI di_int __lshrdi3(di_int a, int b) {
   const int bits_in_word = (int)(sizeof(si_int) * CHAR_BIT);
   udwords input;
   udwords result;
   input.all = a;
   if (b & bits_in_word) /* bits_in_word <= b < bits_in_dword */ {
     result.s.high = 0;
     result.s.low = input.s.high >> (b - bits_in_word);
   } else /* 0 <= b < bits_in_word */ {

compiler-rt/lib/builtins/popcountdi2.c

 //===-- popcountdi2.c - Implement __popcountdi2 ---------------------------===//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 //
 // This file implements __popcountdi2 for the compiler_rt library.
 //
 //===----------------------------------------------------------------------===//
 
 #include "int_lib.h"
 
 // Returns: count of 1 bits
 
-COMPILER_RT_ABI si_int __popcountdi2(di_int a) {
+COMPILER_RT_ABI int __popcountdi2(di_int a) {
   du_int x2 = (du_int)a;
   x2 = x2 - ((x2 >> 1) & 0x5555555555555555uLL);
   // Every 2 bits holds the sum of every pair of bits (32)
   x2 = ((x2 >> 2) & 0x3333333333333333uLL) + (x2 & 0x3333333333333333uLL);
   // Every 4 bits holds the sum of every 4-set of bits (3 significant bits) (16)
   x2 = (x2 + (x2 >> 4)) & 0x0F0F0F0F0F0F0F0FuLL;
   // Every 8 bits holds the sum of every 8-set of bits (4 significant bits) (8)
   su_int x = (su_int)(x2 + (x2 >> 32));
   // The lower 32 bits hold four 16 bit sums (5 significant bits).
   //   Upper 32 bits are garbage
   x = x + (x >> 16);
   // The lower 16 bits hold two 32 bit sums (6 significant bits).
   //   Upper 16 bits are garbage
   return (x + (x >> 8)) & 0x0000007F; // (7 significant bits)
 }

compiler-rt/lib/builtins/udivmoddi4.c

if (d.s.low == 0) {
     // ---
     // K 0
     if ((d.s.high & (d.s.high - 1)) == 0) /* if d is a power of 2 */ {
       if (rem) {
         r.s.low = n.s.low;
         r.s.high = n.s.high & (d.s.high - 1);
         *rem = r.all;
       }
       return n.s.high >> __builtin_ctz(d.s.high);
     }
     // K K
     // ---
     // K 0
-    sr = __builtin_clz(d.s.high) - __builtin_clz(n.s.high);
+    sr = clzsi(d.s.high) - clzsi(n.s.high);
     // 0 <= sr <= n_uword_bits - 2 or sr large
     if (sr > n_uword_bits - 2) {
       if (rem)
         *rem = n.all;
       return 0;
     }
     ++sr;
     // 1 <= sr <= n_uword_bits - 1
if (d.s.high == 0) {
         sr = __builtin_ctz(d.s.low);
         q.s.high = n.s.high >> sr;
         q.s.low = (n.s.high << (n_uword_bits - sr)) | (n.s.low >> sr);
         return q.all;
       }
       // K X
       // ---
       // 0 K
-      sr = 1 + n_uword_bits + __builtin_clz(d.s.low) - __builtin_clz(n.s.high);
+      sr = 1 + n_uword_bits + clzsi(d.s.low) - clzsi(n.s.high);
       // 2 <= sr <= n_udword_bits - 1
       // q.all = n.all << (n_udword_bits - sr);
       // r.all = n.all >> sr;
       if (sr == n_uword_bits) {
         q.s.low = 0;
         q.s.high = n.s.low;
         r.s.high = 0;
         r.s.low = n.s.high;
       } else if (sr < n_uword_bits) /* 2 <= sr <= n_uword_bits - 1 */ {
         q.s.low = 0;
         q.s.high = n.s.low << (n_uword_bits - sr);
         r.s.high = n.s.high >> sr;
         r.s.low = (n.s.high << (n_uword_bits - sr)) | (n.s.low >> sr);
       } else /* n_uword_bits + 1 <= sr <= n_udword_bits - 1 */ {
         q.s.low = n.s.low << (n_udword_bits - sr);
         q.s.high = (n.s.high << (n_udword_bits - sr)) |
                    (n.s.low >> (sr - n_uword_bits));
         r.s.high = 0;
         r.s.low = n.s.high >> (sr - n_uword_bits);
       }
     } else {
       // K X
       // ---
       // K K
-      sr = __builtin_clz(d.s.high) - __builtin_clz(n.s.high);
+      sr = clzsi(d.s.high) - clzsi(n.s.high);
       // 0 <= sr <= n_uword_bits - 1 or sr large
       if (sr > n_uword_bits - 1) {
         if (rem)
           *rem = n.all;
         return 0;
       }
       ++sr;
       // 1 <= sr <= n_uword_bits

compiler-rt/test/builtins/Unit/ashldi3_test.c

 
 #include "int_lib.h"
 #include <stdio.h>
 
 // Returns: a << b
 
 // Precondition:  0 <= b < bits_in_dword
 
-COMPILER_RT_ABI di_int __ashldi3(di_int a, si_int b);
+COMPILER_RT_ABI di_int __ashldi3(di_int a, int b);
 
-int test__ashldi3(di_int a, si_int b, di_int expected)
+int test__ashldi3(di_int a, int b, di_int expected)
 {
     di_int x = __ashldi3(a, b);
     if (x != expected)
         printf("error in __ashldi3: %llX << %d = %llX, expected %llX\n",
                a, b, __ashldi3(a, b), expected);
     return x != expected;
 }
 

compiler-rt/test/builtins/Unit/ashrdi3_test.c

 
 #include "int_lib.h"
 #include <stdio.h>
 
 // Returns: arithmetic a >> b
 
 // Precondition:  0 <= b < bits_in_dword
 
-COMPILER_RT_ABI di_int __ashrdi3(di_int a, si_int b);
+COMPILER_RT_ABI di_int __ashrdi3(di_int a, int b);
 
-int test__ashrdi3(di_int a, si_int b, di_int expected)
+int test__ashrdi3(di_int a, int b, di_int expected)
 {
     di_int x = __ashrdi3(a, b);
     if (x != expected)
         printf("error in __ashrdi3: %llX >> %d = %llX, expected %llX\n",
                a, b, __ashrdi3(a, b), expected);
     return x != expected;
 }
 

compiler-rt/test/builtins/Unit/ctzdi2_test.c

 
 #include "int_lib.h"
 #include <stdio.h>
 
 // Returns: the number of trailing 0-bits
 
 // Precondition: a != 0
 
-COMPILER_RT_ABI si_int __ctzdi2(di_int a);
+COMPILER_RT_ABI int __ctzdi2(di_int a);
 
-int test__ctzdi2(di_int a, si_int expected)
+int test__ctzdi2(di_int a, int expected)
 {
-    si_int x = __ctzdi2(a);
+    int x = __ctzdi2(a);
     if (x != expected)
         printf("error in __ctzdi2(0x%llX) = %d, expected %d\n", a, x, expected);
     return x != expected;
 }
 
 char assumption_1[sizeof(di_int) == 2*sizeof(si_int)] = {0};
 
 int main()

compiler-rt/test/builtins/Unit/ffsdi2_test.c

 //===----------------------------------------------------------------------===//
 
 #include "int_lib.h"
 #include <stdio.h>
 
 // Returns: the index of the least significant 1-bit in a, or
 // the value zero if a is zero. The least significant bit is index one.
 
-COMPILER_RT_ABI si_int __ffsdi2(di_int a);
+COMPILER_RT_ABI int __ffsdi2(di_int a);
 
-int test__ffsdi2(di_int a, si_int expected)
+int test__ffsdi2(di_int a, int expected)
 {
-    si_int x = __ffsdi2(a);
+    int x = __ffsdi2(a);
     if (x != expected)
         printf("error in __ffsdi2(0x%llX) = %d, expected %d\n", a, x, expected);
     return x != expected;
 }
 
 char assumption_1[sizeof(di_int) == 2*sizeof(si_int)] = {0};
 
 int main()

compiler-rt/test/builtins/Unit/ffssi2_test.c

 //===----------------------------------------------------------------------===//
 
 #include "int_lib.h"
 #include <stdio.h>
 
 // Returns: the index of the least significant 1-bit in a, or
 // the value zero if a is zero. The least significant bit is index one.
 
-COMPILER_RT_ABI si_int __ffssi2(si_int a);
+COMPILER_RT_ABI int __ffssi2(si_int a);
 
-int test__ffssi2(si_int a, si_int expected)
+int test__ffssi2(si_int a, int expected)
 {
-    si_int x = __ffssi2(a);
+    int x = __ffssi2(a);
     if (x != expected)
         printf("error in __ffssi2(0x%X) = %d, expected %d\n", a, x, expected);
     return x != expected;
 }
 
 int main()
 {
     if (test__ffssi2(0x00000000, 0))

compiler-rt/test/builtins/Unit/lshrdi3_test.c

 
 #include "int_lib.h"
 #include <stdio.h>
 
 // Returns: logical a >> b
 
 // Precondition:  0 <= b < bits_in_dword
 
-COMPILER_RT_ABI di_int __lshrdi3(di_int a, si_int b);
+COMPILER_RT_ABI di_int __lshrdi3(di_int a, int b);
 
-int test__lshrdi3(di_int a, si_int b, di_int expected)
+int test__lshrdi3(di_int a, int b, di_int expected)
 {
     di_int x = __lshrdi3(a, b);
     if (x != expected)
         printf("error in __lshrdi3: %llX >> %d = %llX, expected %llX\n",
                a, b, __lshrdi3(a, b), expected);
     return x != expected;
 }
 

compiler-rt/test/builtins/Unit/popcountdi2_test.c

 //===----------------------------------------------------------------------===//
 
 #include "int_lib.h"
 #include <stdio.h>
 #include <stdlib.h>
 
 // Returns: count of 1 bits
 
-COMPILER_RT_ABI si_int __popcountdi2(di_int a);
+COMPILER_RT_ABI int __popcountdi2(di_int a);
 
 int naive_popcount(di_int a)
 {
     int r = 0;
     for (; a; a = (du_int)a >> 1)
         r += a & 1;
     return r;
 }
 
 int test__popcountdi2(di_int a)
 {
-    si_int x = __popcountdi2(a);
-    si_int expected = naive_popcount(a);
+    int x = __popcountdi2(a);
+    int expected = naive_popcount(a);
     if (x != expected)
         printf("error in __popcountdi2(0x%llX) = %d, expected %d\n",
                a, x, expected);
     return x != expected;
 }
 
 char assumption_1[sizeof(di_int) == 2*sizeof(si_int)] = {0};
 char assumption_2[sizeof(si_int)*CHAR_BIT == 32] = {0};