[mlir][spirv] Use symbolize functions in enum attribute predicates

[antiagainst]

Summary

By default, for an enum attribute, we will generate a list of equality
comparisons for all supported cases inside it's predicate. This list
can be fairly large for certain SPIR-V enum attributes. Instead, we
already have such a list generated by EnumsGen in the symbolize
functions. Leverage that to simplify the generated C++ code.

[merge_guards_bot]

Unit tests: pass. 61884 tests passed, 0 failed and 782 were skipped.

clang-tidy: unknown.

clang-format: pass.

Build artifacts: diff.json, clang-format.patch, CMakeCache.txt, console-log.txt, test-results.xml

[benvanik]

sybmolize is a typo in the description :)

mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td

2894

optional: it would make this file more readable if this was instead a class; let predicate = I32EnumAttrIsSymbolizable<"SelectionControl"> etc

[antiagainst]

Address comment

[antiagainst]

mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td

2894

Good point! This stuff can indeed be deduplicated. I created new wrapper classes to set this there to avoid have each enum to have it.

[merge_guards_bot]

Unit tests: pass. 61912 tests passed, 0 failed and 783 were skipped.

clang-tidy: unknown.

clang-format: pass.

Build artifacts: diff.json, clang-format.patch, CMakeCache.txt, console-log.txt, test-results.xml

[antiagainst]

Address comment

[merge_guards_bot]

Unit tests: pass. 61912 tests passed, 0 failed and 783 were skipped.

clang-tidy: unknown.

clang-format: pass.

Build artifacts: diff.json, clang-format.patch, CMakeCache.txt, console-log.txt, test-results.xml

[benvanik]

Awesome! I may use that predicate/class in some of my dialects too :)

mlir/include/mlir/Dialect/SPIRV/SPIRVBase.td

let description = [{
     See https://mlir.llvm.org/docs/Dialects/SPIR-V/ for more details regarding
     high-level designs and implementation structures of the SPIR-V dialect.
   }];
 
   let cppNamespace = "spirv";
 }
 
 //===----------------------------------------------------------------------===//
+// Utility definitions
+//===----------------------------------------------------------------------===//
+
+// A predicate that checks whether `$_self` is a known enum case for the
+// enum class with `name`.
+class SPV_IsKnownEnumCaseFor<string name> :
+    CPred<"::mlir::spirv::symbolize" # name # "("
+          "$_self.cast<IntegerAttr>().getValue().getZExtValue()).hasValue()">;
+
+// Wrapper over base BitEnumAttr to set common fields.
+class SPV_BitEnumAttr<string name, string description,
+                      list<BitEnumAttrCase> cases> :
+    BitEnumAttr<name, description, cases> {
+  let predicate = And<[
+    IntegerAttrBase<I32, "">.predicate,
+    SPV_IsKnownEnumCaseFor<name>,
+  ]>;
+  let cppNamespace = "::mlir::spirv";
+}
+
+// Wrapper over base I32EnumAttr to set common fields.
+class SPV_I32EnumAttr<string name, string description,
+                      list<I32EnumAttrCase> cases> :
+    I32EnumAttr<name, description, cases> {
+  let predicate = And<[
+    IntegerAttrBase<I32, "">.predicate,
+    SPV_IsKnownEnumCaseFor<name>,
+  ]>;
+  let cppNamespace = "::mlir::spirv";
+}
+
+// Wrapper over base StrEnumAttr to set common fields.
+class SPV_StrEnumAttr<string name, string description,
+                      list<StrEnumAttrCase> cases> :
+    StrEnumAttr<name, description, cases> {
+  let predicate = And<[
+    StrAttr.predicate,
+    CPred<"::mlir::spirv::symbolize" # name # "("
+          "$_self.cast<StringAttr>().getValue()).hasValue()">,
+  ]>;
+  let cppNamespace = "::mlir::spirv";
+}
+
+//===----------------------------------------------------------------------===//
 // SPIR-V availability definitions
 //===----------------------------------------------------------------------===//
 
 def SPV_V_1_0 : I32EnumAttrCase<"V_1_0", 0>;
 def SPV_V_1_1 : I32EnumAttrCase<"V_1_1", 1>;
 def SPV_V_1_2 : I32EnumAttrCase<"V_1_2", 2>;
 def SPV_V_1_3 : I32EnumAttrCase<"V_1_3", 3>;
 def SPV_V_1_4 : I32EnumAttrCase<"V_1_4", 4>;
 def SPV_V_1_5 : I32EnumAttrCase<"V_1_5", 5>;
 
-def SPV_VersionAttr : I32EnumAttr<"Version", "valid SPIR-V version", [
-    SPV_V_1_0, SPV_V_1_1, SPV_V_1_2, SPV_V_1_3, SPV_V_1_4, SPV_V_1_5]> {
-  let cppNamespace = "::mlir::spirv";
-}
+def SPV_VersionAttr : SPV_I32EnumAttr<"Version", "valid SPIR-V version", [
+    SPV_V_1_0, SPV_V_1_1, SPV_V_1_2, SPV_V_1_3, SPV_V_1_4, SPV_V_1_5]>;
 
 class MinVersion<I32EnumAttrCase min> : MinVersionBase<
     "QueryMinVersionInterface", SPV_VersionAttr, min> {
   let interfaceDescription = [{
     Querying interface for minimal required SPIR-V version.
 
     This interface provides a `getMinVersion()` method to query the minimal
     required version for the implementing SPIR-V operation. The returned value

 def SPV_NV_shader_subgroup_partitioned   : StrEnumAttrCase<"SPV_NV_shader_subgroup_partitioned">;
 def SPV_NV_shading_rate                  : StrEnumAttrCase<"SPV_NV_shading_rate">;
 def SPV_NV_stereo_view_rendering         : StrEnumAttrCase<"SPV_NV_stereo_view_rendering">;
 def SPV_NV_viewport_array2               : StrEnumAttrCase<"SPV_NV_viewport_array2">;
 
 def SPV_NVX_multiview_per_view_attributes : StrEnumAttrCase<"SPV_NVX_multiview_per_view_attributes">;
 
 def SPV_ExtensionAttr :
-    StrEnumAttr<"Extension", "supported SPIR-V extensions", [
+    SPV_StrEnumAttr<"Extension", "supported SPIR-V extensions", [
       SPV_KHR_16bit_storage, SPV_KHR_8bit_storage, SPV_KHR_device_group,
       SPV_KHR_float_controls, SPV_KHR_physical_storage_buffer, SPV_KHR_multiview,
       SPV_KHR_no_integer_wrap_decoration, SPV_KHR_post_depth_coverage,
       SPV_KHR_shader_atomic_counter_ops, SPV_KHR_shader_ballot,
       SPV_KHR_shader_clock, SPV_KHR_shader_draw_parameters,
       SPV_KHR_storage_buffer_storage_class, SPV_KHR_subgroup_vote,
       SPV_KHR_variable_pointers, SPV_KHR_vulkan_memory_model,
       SPV_EXT_demote_to_helper_invocation, SPV_EXT_descriptor_indexing,
       SPV_EXT_fragment_fully_covered, SPV_EXT_fragment_invocation_density,
       SPV_EXT_fragment_shader_interlock, SPV_EXT_physical_storage_buffer,
       SPV_EXT_shader_stencil_export, SPV_EXT_shader_viewport_index_layer,
       SPV_AMD_gpu_shader_half_float_fetch, SPV_AMD_shader_ballot,
       SPV_AMD_shader_explicit_vertex_parameter, SPV_AMD_shader_fragment_mask,
       SPV_AMD_shader_image_load_store_lod, SPV_AMD_texture_gather_bias_lod,
       SPV_GOOGLE_decorate_string, SPV_GOOGLE_hlsl_functionality1, SPV_GOOGLE_user_type,
       SPV_INTEL_device_side_avc_motion_estimation, SPV_INTEL_media_block_io,
       SPV_INTEL_shader_integer_functions2, SPV_INTEL_subgroups,
       SPV_NV_compute_shader_derivatives, SPV_NV_cooperative_matrix,
       SPV_NV_fragment_shader_barycentric, SPV_NV_geometry_shader_passthrough,
       SPV_NV_mesh_shader, SPV_NV_ray_tracing, SPV_NV_sample_mask_override_coverage,
       SPV_NV_shader_image_footprint, SPV_NV_shader_sm_builtins,
       SPV_NV_shader_subgroup_partitioned, SPV_NV_shading_rate,
       SPV_NV_stereo_view_rendering, SPV_NV_viewport_array2,
       SPV_NVX_multiview_per_view_attributes
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 //===----------------------------------------------------------------------===//
 // SPIR-V enum definitions
 //===----------------------------------------------------------------------===//
 
 // Begin enum section. Generated from SPIR-V spec; DO NOT MODIFY!
 
 def SPV_C_Matrix                                    : I32EnumAttrCase<"Matrix", 0>;

 def SPV_C_ShaderStereoViewNV                        : I32EnumAttrCase<"ShaderStereoViewNV", 5259> {
   list<I32EnumAttrCase> implies = [SPV_C_ShaderViewportMaskNV];
   list<Availability> availability = [
     Extension<[SPV_NV_stereo_view_rendering]>
   ];
 }
 
 def SPV_CapabilityAttr :
-    I32EnumAttr<"Capability", "valid SPIR-V Capability", [
+    SPV_I32EnumAttr<"Capability", "valid SPIR-V Capability", [
       SPV_C_Matrix, SPV_C_Addresses, SPV_C_Linkage, SPV_C_Kernel, SPV_C_Float16,
       SPV_C_Float64, SPV_C_Int64, SPV_C_Groups, SPV_C_Int16, SPV_C_Int8,
       SPV_C_Sampled1D, SPV_C_SampledBuffer, SPV_C_GroupNonUniform, SPV_C_ShaderLayer,
       SPV_C_ShaderViewportIndex, SPV_C_SubgroupBallotKHR, SPV_C_SubgroupVoteKHR,
       SPV_C_StorageBuffer16BitAccess, SPV_C_StoragePushConstant16,
       SPV_C_StorageInputOutput16, SPV_C_DeviceGroup, SPV_C_AtomicStorageOps,
       SPV_C_SampleMaskPostDepthCoverage, SPV_C_StorageBuffer8BitAccess,
       SPV_C_StoragePushConstant8, SPV_C_DenormPreserve, SPV_C_DenormFlushToZero,
SPV_I32EnumAttr<"Capability", "valid SPIR-V Capability", [
       SPV_C_SampledImageArrayNonUniformIndexing,
       SPV_C_StorageBufferArrayNonUniformIndexing,
       SPV_C_StorageImageArrayNonUniformIndexing,
       SPV_C_InputAttachmentArrayNonUniformIndexing,
       SPV_C_UniformTexelBufferArrayNonUniformIndexing,
       SPV_C_StorageTexelBufferArrayNonUniformIndexing,
       SPV_C_ShaderViewportIndexLayerEXT, SPV_C_ShaderViewportMaskNV,
       SPV_C_ShaderStereoViewNV
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_AM_Logical                 : I32EnumAttrCase<"Logical", 0>;
 def SPV_AM_Physical32              : I32EnumAttrCase<"Physical32", 1> {
   list<Availability> availability = [
     Capability<[SPV_C_Addresses]>
   ];
 }
 def SPV_AM_Physical64              : I32EnumAttrCase<"Physical64", 2> {
   list<Availability> availability = [
     Capability<[SPV_C_Addresses]>
   ];
 }
 def SPV_AM_PhysicalStorageBuffer64 : I32EnumAttrCase<"PhysicalStorageBuffer64", 5348> {
   list<Availability> availability = [
     MinVersion<SPV_V_1_5>,
     Extension<[SPV_EXT_physical_storage_buffer, SPV_KHR_physical_storage_buffer]>,
     Capability<[SPV_C_PhysicalStorageBufferAddresses]>
   ];
 }
 
 def SPV_AddressingModelAttr :
-    I32EnumAttr<"AddressingModel", "valid SPIR-V AddressingModel", [
+    SPV_I32EnumAttr<"AddressingModel", "valid SPIR-V AddressingModel", [
       SPV_AM_Logical, SPV_AM_Physical32, SPV_AM_Physical64,
       SPV_AM_PhysicalStorageBuffer64
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_BI_Position                    : I32EnumAttrCase<"Position", 0> {
   list<Availability> availability = [
     Capability<[SPV_C_Shader]>
   ];
 }
 def SPV_BI_PointSize                   : I32EnumAttrCase<"PointSize", 1> {
   list<Availability> availability = [

 def SPV_BI_SMIDNV                      : I32EnumAttrCase<"SMIDNV", 5377> {
   list<Availability> availability = [
     Extension<[SPV_NV_shader_sm_builtins]>,
     Capability<[SPV_C_ShaderSMBuiltinsNV]>
   ];
 }
 
 def SPV_BuiltInAttr :
-    I32EnumAttr<"BuiltIn", "valid SPIR-V BuiltIn", [
+    SPV_I32EnumAttr<"BuiltIn", "valid SPIR-V BuiltIn", [
       SPV_BI_Position, SPV_BI_PointSize, SPV_BI_ClipDistance, SPV_BI_CullDistance,
       SPV_BI_VertexId, SPV_BI_InstanceId, SPV_BI_PrimitiveId, SPV_BI_InvocationId,
       SPV_BI_Layer, SPV_BI_ViewportIndex, SPV_BI_TessLevelOuter,
       SPV_BI_TessLevelInner, SPV_BI_TessCoord, SPV_BI_PatchVertices,
       SPV_BI_FragCoord, SPV_BI_PointCoord, SPV_BI_FrontFacing, SPV_BI_SampleId,
       SPV_BI_SamplePosition, SPV_BI_SampleMask, SPV_BI_FragDepth,
       SPV_BI_HelperInvocation, SPV_BI_NumWorkgroups, SPV_BI_WorkgroupSize,
       SPV_BI_WorkgroupId, SPV_BI_LocalInvocationId, SPV_BI_GlobalInvocationId,
SPV_I32EnumAttr<"BuiltIn", "valid SPIR-V BuiltIn", [
       SPV_BI_LayerPerViewNV, SPV_BI_MeshViewCountNV, SPV_BI_MeshViewIndicesNV,
       SPV_BI_BaryCoordNV, SPV_BI_BaryCoordNoPerspNV, SPV_BI_FragSizeEXT,
       SPV_BI_FragInvocationCountEXT, SPV_BI_LaunchIdNV, SPV_BI_LaunchSizeNV,
       SPV_BI_WorldRayOriginNV, SPV_BI_WorldRayDirectionNV, SPV_BI_ObjectRayOriginNV,
       SPV_BI_ObjectRayDirectionNV, SPV_BI_RayTminNV, SPV_BI_RayTmaxNV,
       SPV_BI_InstanceCustomIndexNV, SPV_BI_ObjectToWorldNV, SPV_BI_WorldToObjectNV,
       SPV_BI_HitTNV, SPV_BI_HitKindNV, SPV_BI_IncomingRayFlagsNV,
       SPV_BI_WarpsPerSMNV, SPV_BI_SMCountNV, SPV_BI_WarpIDNV, SPV_BI_SMIDNV
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_D_RelaxedPrecision            : I32EnumAttrCase<"RelaxedPrecision", 0> {
   list<Availability> availability = [
     Capability<[SPV_C_Shader]>
   ];
 }
 def SPV_D_SpecId                      : I32EnumAttrCase<"SpecId", 1> {
   list<Availability> availability = [

 }
 def SPV_D_UserTypeGOOGLE              : I32EnumAttrCase<"UserTypeGOOGLE", 5636> {
   list<Availability> availability = [
     Extension<[SPV_GOOGLE_user_type]>
   ];
 }
 
 def SPV_DecorationAttr :
-    I32EnumAttr<"Decoration", "valid SPIR-V Decoration", [
+    SPV_I32EnumAttr<"Decoration", "valid SPIR-V Decoration", [
       SPV_D_RelaxedPrecision, SPV_D_SpecId, SPV_D_Block, SPV_D_BufferBlock,
       SPV_D_RowMajor, SPV_D_ColMajor, SPV_D_ArrayStride, SPV_D_MatrixStride,
       SPV_D_GLSLShared, SPV_D_GLSLPacked, SPV_D_CPacked, SPV_D_BuiltIn,
       SPV_D_NoPerspective, SPV_D_Flat, SPV_D_Patch, SPV_D_Centroid, SPV_D_Sample,
       SPV_D_Invariant, SPV_D_Restrict, SPV_D_Aliased, SPV_D_Volatile, SPV_D_Constant,
       SPV_D_Coherent, SPV_D_NonWritable, SPV_D_NonReadable, SPV_D_Uniform,
       SPV_D_UniformId, SPV_D_SaturatedConversion, SPV_D_Stream, SPV_D_Location,
       SPV_D_Component, SPV_D_Index, SPV_D_Binding, SPV_D_DescriptorSet, SPV_D_Offset,
       SPV_D_XfbBuffer, SPV_D_XfbStride, SPV_D_FuncParamAttr, SPV_D_FPRoundingMode,
       SPV_D_FPFastMathMode, SPV_D_LinkageAttributes, SPV_D_NoContraction,
       SPV_D_InputAttachmentIndex, SPV_D_Alignment, SPV_D_MaxByteOffset,
       SPV_D_AlignmentId, SPV_D_MaxByteOffsetId, SPV_D_NoSignedWrap,
       SPV_D_NoUnsignedWrap, SPV_D_ExplicitInterpAMD, SPV_D_OverrideCoverageNV,
       SPV_D_PassthroughNV, SPV_D_ViewportRelativeNV,
       SPV_D_SecondaryViewportRelativeNV, SPV_D_PerPrimitiveNV, SPV_D_PerViewNV,
       SPV_D_PerTaskNV, SPV_D_PerVertexNV, SPV_D_NonUniform, SPV_D_RestrictPointer,
       SPV_D_AliasedPointer, SPV_D_CounterBuffer, SPV_D_UserSemantic,
       SPV_D_UserTypeGOOGLE
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_D_1D          : I32EnumAttrCase<"Dim1D", 0> {
   list<Availability> availability = [
     Capability<[SPV_C_Image1D, SPV_C_Sampled1D]>
   ];
 }
 def SPV_D_2D          : I32EnumAttrCase<"Dim2D", 1> {
   list<Availability> availability = [

 }
 def SPV_D_SubpassData : I32EnumAttrCase<"SubpassData", 6> {
   list<Availability> availability = [
     Capability<[SPV_C_InputAttachment]>
   ];
 }
 
 def SPV_DimAttr :
-    I32EnumAttr<"Dim", "valid SPIR-V Dim", [
+    SPV_I32EnumAttr<"Dim", "valid SPIR-V Dim", [
       SPV_D_1D, SPV_D_2D, SPV_D_3D, SPV_D_Cube, SPV_D_Rect, SPV_D_Buffer,
       SPV_D_SubpassData
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_EM_Invocations                      : I32EnumAttrCase<"Invocations", 0> {
   list<Availability> availability = [
     Capability<[SPV_C_Geometry]>
   ];
 }
 def SPV_EM_SpacingEqual                     : I32EnumAttrCase<"SpacingEqual", 1> {
   list<Availability> availability = [

 def SPV_EM_ShadingRateInterlockUnorderedEXT : I32EnumAttrCase<"ShadingRateInterlockUnorderedEXT", 5371> {
   list<Availability> availability = [
     Extension<[SPV_EXT_fragment_shader_interlock]>,
     Capability<[SPV_C_FragmentShaderShadingRateInterlockEXT]>
   ];
 }
 
 def SPV_ExecutionModeAttr :
-    I32EnumAttr<"ExecutionMode", "valid SPIR-V ExecutionMode", [
+    SPV_I32EnumAttr<"ExecutionMode", "valid SPIR-V ExecutionMode", [
       SPV_EM_Invocations, SPV_EM_SpacingEqual, SPV_EM_SpacingFractionalEven,
       SPV_EM_SpacingFractionalOdd, SPV_EM_VertexOrderCw, SPV_EM_VertexOrderCcw,
       SPV_EM_PixelCenterInteger, SPV_EM_OriginUpperLeft, SPV_EM_OriginLowerLeft,
       SPV_EM_EarlyFragmentTests, SPV_EM_PointMode, SPV_EM_Xfb, SPV_EM_DepthReplacing,
       SPV_EM_DepthGreater, SPV_EM_DepthLess, SPV_EM_DepthUnchanged, SPV_EM_LocalSize,
       SPV_EM_LocalSizeHint, SPV_EM_InputPoints, SPV_EM_InputLines,
       SPV_EM_InputLinesAdjacency, SPV_EM_Triangles, SPV_EM_InputTrianglesAdjacency,
       SPV_EM_Quads, SPV_EM_Isolines, SPV_EM_OutputVertices, SPV_EM_OutputPoints,
       SPV_EM_OutputLineStrip, SPV_EM_OutputTriangleStrip, SPV_EM_VecTypeHint,
       SPV_EM_ContractionOff, SPV_EM_Initializer, SPV_EM_Finalizer,
       SPV_EM_SubgroupSize, SPV_EM_SubgroupsPerWorkgroup,
       SPV_EM_SubgroupsPerWorkgroupId, SPV_EM_LocalSizeId, SPV_EM_LocalSizeHintId,
       SPV_EM_PostDepthCoverage, SPV_EM_DenormPreserve, SPV_EM_DenormFlushToZero,
       SPV_EM_SignedZeroInfNanPreserve, SPV_EM_RoundingModeRTE,
       SPV_EM_RoundingModeRTZ, SPV_EM_StencilRefReplacingEXT, SPV_EM_OutputLinesNV,
       SPV_EM_OutputPrimitivesNV, SPV_EM_DerivativeGroupQuadsNV,
       SPV_EM_DerivativeGroupLinearNV, SPV_EM_OutputTrianglesNV,
       SPV_EM_PixelInterlockOrderedEXT, SPV_EM_PixelInterlockUnorderedEXT,
       SPV_EM_SampleInterlockOrderedEXT, SPV_EM_SampleInterlockUnorderedEXT,
       SPV_EM_ShadingRateInterlockOrderedEXT, SPV_EM_ShadingRateInterlockUnorderedEXT
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_EM_Vertex                 : I32EnumAttrCase<"Vertex", 0> {
   list<Availability> availability = [
     Capability<[SPV_C_Shader]>
   ];
 }
 def SPV_EM_TessellationControl    : I32EnumAttrCase<"TessellationControl", 1> {
   list<Availability> availability = [

 }
 def SPV_EM_CallableNV             : I32EnumAttrCase<"CallableNV", 5318> {
   list<Availability> availability = [
     Capability<[SPV_C_RayTracingNV]>
   ];
 }
 
 def SPV_ExecutionModelAttr :
-    I32EnumAttr<"ExecutionModel", "valid SPIR-V ExecutionModel", [
+    SPV_I32EnumAttr<"ExecutionModel", "valid SPIR-V ExecutionModel", [
       SPV_EM_Vertex, SPV_EM_TessellationControl, SPV_EM_TessellationEvaluation,
       SPV_EM_Geometry, SPV_EM_Fragment, SPV_EM_GLCompute, SPV_EM_Kernel,
       SPV_EM_TaskNV, SPV_EM_MeshNV, SPV_EM_RayGenerationNV, SPV_EM_IntersectionNV,
       SPV_EM_AnyHitNV, SPV_EM_ClosestHitNV, SPV_EM_MissNV, SPV_EM_CallableNV
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_FC_None       : BitEnumAttrCase<"None", 0x0000>;
 def SPV_FC_Inline     : BitEnumAttrCase<"Inline", 0x0001>;
 def SPV_FC_DontInline : BitEnumAttrCase<"DontInline", 0x0002>;
 def SPV_FC_Pure       : BitEnumAttrCase<"Pure", 0x0004>;
 def SPV_FC_Const      : BitEnumAttrCase<"Const", 0x0008>;
 
 def SPV_FunctionControlAttr :
-    BitEnumAttr<"FunctionControl", "valid SPIR-V FunctionControl", [
+    SPV_BitEnumAttr<"FunctionControl", "valid SPIR-V FunctionControl", [
       SPV_FC_None, SPV_FC_Inline, SPV_FC_DontInline, SPV_FC_Pure, SPV_FC_Const
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_IF_Unknown      : I32EnumAttrCase<"Unknown", 0>;
 def SPV_IF_Rgba32f      : I32EnumAttrCase<"Rgba32f", 1> {
   list<Availability> availability = [
     Capability<[SPV_C_Shader]>
   ];
 }
 def SPV_IF_Rgba16f      : I32EnumAttrCase<"Rgba16f", 2> {

 }
 def SPV_IF_R8ui         : I32EnumAttrCase<"R8ui", 39> {
   list<Availability> availability = [
     Capability<[SPV_C_StorageImageExtendedFormats]>
   ];
 }
 
 def SPV_ImageFormatAttr :
-    I32EnumAttr<"ImageFormat", "valid SPIR-V ImageFormat", [
+    SPV_I32EnumAttr<"ImageFormat", "valid SPIR-V ImageFormat", [
       SPV_IF_Unknown, SPV_IF_Rgba32f, SPV_IF_Rgba16f, SPV_IF_R32f, SPV_IF_Rgba8,
       SPV_IF_Rgba8Snorm, SPV_IF_Rg32f, SPV_IF_Rg16f, SPV_IF_R11fG11fB10f,
       SPV_IF_R16f, SPV_IF_Rgba16, SPV_IF_Rgb10A2, SPV_IF_Rg16, SPV_IF_Rg8,
       SPV_IF_R16, SPV_IF_R8, SPV_IF_Rgba16Snorm, SPV_IF_Rg16Snorm, SPV_IF_Rg8Snorm,
       SPV_IF_R16Snorm, SPV_IF_R8Snorm, SPV_IF_Rgba32i, SPV_IF_Rgba16i, SPV_IF_Rgba8i,
       SPV_IF_R32i, SPV_IF_Rg32i, SPV_IF_Rg16i, SPV_IF_Rg8i, SPV_IF_R16i, SPV_IF_R8i,
       SPV_IF_Rgba32ui, SPV_IF_Rgba16ui, SPV_IF_Rgba8ui, SPV_IF_R32ui,
       SPV_IF_Rgb10a2ui, SPV_IF_Rg32ui, SPV_IF_Rg16ui, SPV_IF_Rg8ui, SPV_IF_R16ui,
       SPV_IF_R8ui
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_LT_Export : I32EnumAttrCase<"Export", 0> {
   list<Availability> availability = [
     Capability<[SPV_C_Linkage]>
   ];
 }
 def SPV_LT_Import : I32EnumAttrCase<"Import", 1> {
   list<Availability> availability = [
     Capability<[SPV_C_Linkage]>
   ];
 }
 
 def SPV_LinkageTypeAttr :
-    I32EnumAttr<"LinkageType", "valid SPIR-V LinkageType", [
+    SPV_I32EnumAttr<"LinkageType", "valid SPIR-V LinkageType", [
       SPV_LT_Export, SPV_LT_Import
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_LC_None               : BitEnumAttrCase<"None", 0x0000>;
 def SPV_LC_Unroll             : BitEnumAttrCase<"Unroll", 0x0001>;
 def SPV_LC_DontUnroll         : BitEnumAttrCase<"DontUnroll", 0x0002>;
 def SPV_LC_DependencyInfinite : BitEnumAttrCase<"DependencyInfinite", 0x0004> {
   list<Availability> availability = [
     MinVersion<SPV_V_1_1>
   ];

 }
 def SPV_LC_PartialCount       : BitEnumAttrCase<"PartialCount", 0x0100> {
   list<Availability> availability = [
     MinVersion<SPV_V_1_4>
   ];
 }
 
 def SPV_LoopControlAttr :
-    BitEnumAttr<"LoopControl", "valid SPIR-V LoopControl", [
+    SPV_BitEnumAttr<"LoopControl", "valid SPIR-V LoopControl", [
       SPV_LC_None, SPV_LC_Unroll, SPV_LC_DontUnroll, SPV_LC_DependencyInfinite,
       SPV_LC_DependencyLength, SPV_LC_MinIterations, SPV_LC_MaxIterations,
       SPV_LC_IterationMultiple, SPV_LC_PeelCount, SPV_LC_PartialCount
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_MA_None                 : BitEnumAttrCase<"None", 0x0000>;
 def SPV_MA_Volatile             : BitEnumAttrCase<"Volatile", 0x0001>;
 def SPV_MA_Aligned              : BitEnumAttrCase<"Aligned", 0x0002>;
 def SPV_MA_Nontemporal          : BitEnumAttrCase<"Nontemporal", 0x0004>;
 def SPV_MA_MakePointerAvailable : BitEnumAttrCase<"MakePointerAvailable", 0x0008> {
   list<Availability> availability = [
     MinVersion<SPV_V_1_5>,

 def SPV_MA_NonPrivatePointer    : BitEnumAttrCase<"NonPrivatePointer", 0x0020> {
   list<Availability> availability = [
     MinVersion<SPV_V_1_5>,
     Capability<[SPV_C_VulkanMemoryModel]>
   ];
 }
 
 def SPV_MemoryAccessAttr :
-    BitEnumAttr<"MemoryAccess", "valid SPIR-V MemoryAccess", [
+    SPV_BitEnumAttr<"MemoryAccess", "valid SPIR-V MemoryAccess", [
       SPV_MA_None, SPV_MA_Volatile, SPV_MA_Aligned, SPV_MA_Nontemporal,
       SPV_MA_MakePointerAvailable, SPV_MA_MakePointerVisible,
       SPV_MA_NonPrivatePointer
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_MM_Simple  : I32EnumAttrCase<"Simple", 0> {
   list<Availability> availability = [
     Capability<[SPV_C_Shader]>
   ];
 }
 def SPV_MM_GLSL450 : I32EnumAttrCase<"GLSL450", 1> {
   list<Availability> availability = [
     Capability<[SPV_C_Shader]>
   ];
 }
 def SPV_MM_OpenCL  : I32EnumAttrCase<"OpenCL", 2> {
   list<Availability> availability = [
     Capability<[SPV_C_Kernel]>
   ];
 }
 def SPV_MM_Vulkan  : I32EnumAttrCase<"Vulkan", 3> {
   list<Availability> availability = [
     MinVersion<SPV_V_1_5>,
     Capability<[SPV_C_VulkanMemoryModel]>
   ];
 }
 
 def SPV_MemoryModelAttr :
-    I32EnumAttr<"MemoryModel", "valid SPIR-V MemoryModel", [
+    SPV_I32EnumAttr<"MemoryModel", "valid SPIR-V MemoryModel", [
       SPV_MM_Simple, SPV_MM_GLSL450, SPV_MM_OpenCL, SPV_MM_Vulkan
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_MS_None                   : BitEnumAttrCase<"None", 0x0000>;
 def SPV_MS_Acquire                : BitEnumAttrCase<"Acquire", 0x0002>;
 def SPV_MS_Release                : BitEnumAttrCase<"Release", 0x0004>;
 def SPV_MS_AcquireRelease         : BitEnumAttrCase<"AcquireRelease", 0x0008>;
 def SPV_MS_SequentiallyConsistent : BitEnumAttrCase<"SequentiallyConsistent", 0x0010>;
 def SPV_MS_UniformMemory          : BitEnumAttrCase<"UniformMemory", 0x0040> {
   list<Availability> availability = [
def SPV_MS_Volatile               : BitEnumAttrCase<"Volatile", 0x8000> {
   list<Availability> availability = [
     MinVersion<SPV_V_1_5>,
     Extension<[SPV_KHR_vulkan_memory_model]>,
     Capability<[SPV_C_VulkanMemoryModel]>
   ];
 }
 
 def SPV_MemorySemanticsAttr :
-    BitEnumAttr<"MemorySemantics", "valid SPIR-V MemorySemantics", [
+    SPV_BitEnumAttr<"MemorySemantics", "valid SPIR-V MemorySemantics", [
       SPV_MS_None, SPV_MS_Acquire, SPV_MS_Release, SPV_MS_AcquireRelease,
       SPV_MS_SequentiallyConsistent, SPV_MS_UniformMemory, SPV_MS_SubgroupMemory,
       SPV_MS_WorkgroupMemory, SPV_MS_CrossWorkgroupMemory,
       SPV_MS_AtomicCounterMemory, SPV_MS_ImageMemory, SPV_MS_OutputMemory,
       SPV_MS_MakeAvailable, SPV_MS_MakeVisible, SPV_MS_Volatile
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_S_CrossDevice : I32EnumAttrCase<"CrossDevice", 0>;
 def SPV_S_Device      : I32EnumAttrCase<"Device", 1>;
 def SPV_S_Workgroup   : I32EnumAttrCase<"Workgroup", 2>;
 def SPV_S_Subgroup    : I32EnumAttrCase<"Subgroup", 3>;
 def SPV_S_Invocation  : I32EnumAttrCase<"Invocation", 4>;
 def SPV_S_QueueFamily : I32EnumAttrCase<"QueueFamily", 5> {
   list<Availability> availability = [
     MinVersion<SPV_V_1_5>,
     Capability<[SPV_C_VulkanMemoryModel]>
   ];
 }
 
 def SPV_ScopeAttr :
-    I32EnumAttr<"Scope", "valid SPIR-V Scope", [
+    SPV_I32EnumAttr<"Scope", "valid SPIR-V Scope", [
       SPV_S_CrossDevice, SPV_S_Device, SPV_S_Workgroup, SPV_S_Subgroup,
       SPV_S_Invocation, SPV_S_QueueFamily
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_SC_None        : BitEnumAttrCase<"None", 0x0000>;
 def SPV_SC_Flatten     : BitEnumAttrCase<"Flatten", 0x0001>;
 def SPV_SC_DontFlatten : BitEnumAttrCase<"DontFlatten", 0x0002>;
 
 def SPV_SelectionControlAttr :
-    BitEnumAttr<"SelectionControl", "valid SPIR-V SelectionControl", [
+    SPV_BitEnumAttr<"SelectionControl", "valid SPIR-V SelectionControl", [
       SPV_SC_None, SPV_SC_Flatten, SPV_SC_DontFlatten
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 def SPV_SC_UniformConstant        : I32EnumAttrCase<"UniformConstant", 0>;
 def SPV_SC_Input                  : I32EnumAttrCase<"Input", 1>;
 def SPV_SC_Uniform                : I32EnumAttrCase<"Uniform", 2> {
   list<Availability> availability = [
     Capability<[SPV_C_Shader]>
   ];
 }
def SPV_SC_PhysicalStorageBuffer  : I32EnumAttrCase<"PhysicalStorageBuffer", 5349> {
   list<Availability> availability = [
     MinVersion<SPV_V_1_5>,
     Extension<[SPV_EXT_physical_storage_buffer, SPV_KHR_physical_storage_buffer]>,
     Capability<[SPV_C_PhysicalStorageBufferAddresses]>
   ];
 }
 
 def SPV_StorageClassAttr :
-    I32EnumAttr<"StorageClass", "valid SPIR-V StorageClass", [
+    SPV_I32EnumAttr<"StorageClass", "valid SPIR-V StorageClass", [
       SPV_SC_UniformConstant, SPV_SC_Input, SPV_SC_Uniform, SPV_SC_Output,
       SPV_SC_Workgroup, SPV_SC_CrossWorkgroup, SPV_SC_Private, SPV_SC_Function,
       SPV_SC_Generic, SPV_SC_PushConstant, SPV_SC_AtomicCounter, SPV_SC_Image,
       SPV_SC_StorageBuffer, SPV_SC_CallableDataNV, SPV_SC_IncomingCallableDataNV,
       SPV_SC_RayPayloadNV, SPV_SC_HitAttributeNV, SPV_SC_IncomingRayPayloadNV,
       SPV_SC_ShaderRecordBufferNV, SPV_SC_PhysicalStorageBuffer
-    ]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 // End enum section. Generated from SPIR-V spec; DO NOT MODIFY!
 
 // Enums added manually that are not part of SPIR-V spec
 
 def SPV_IDI_NoDepth      : I32EnumAttrCase<"NoDepth", 0>;
 def SPV_IDI_IsDepth      : I32EnumAttrCase<"IsDepth", 1>;
 def SPV_IDI_DepthUnknown : I32EnumAttrCase<"DepthUnknown", 2>;
 
 def SPV_DepthAttr :
-    I32EnumAttr<"ImageDepthInfo", "valid SPIR-V Image Depth specification",
-      [SPV_IDI_NoDepth, SPV_IDI_IsDepth, SPV_IDI_DepthUnknown]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    SPV_I32EnumAttr<"ImageDepthInfo", "valid SPIR-V Image Depth specification",
+      [SPV_IDI_NoDepth, SPV_IDI_IsDepth, SPV_IDI_DepthUnknown]>;
 
 def SPV_IAI_NonArrayed : I32EnumAttrCase<"NonArrayed", 0>;
 def SPV_IAI_Arrayed    : I32EnumAttrCase<"Arrayed", 1>;
 
 def SPV_ArrayedAttr :
-    I32EnumAttr<"ImageArrayedInfo", "valid SPIR-V Image Arrayed specification",
-      [SPV_IAI_NonArrayed, SPV_IAI_Arrayed]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    SPV_I32EnumAttr<
+      "ImageArrayedInfo", "valid SPIR-V Image Arrayed specification",
+      [SPV_IAI_NonArrayed, SPV_IAI_Arrayed]>;
 
 def SPV_ISI_SingleSampled : I32EnumAttrCase<"SingleSampled", 0>;
 def SPV_ISI_MultiSampled  : I32EnumAttrCase<"MultiSampled", 1>;
 
 def SPV_SamplingAttr:
-    I32EnumAttr<"ImageSamplingInfo", "valid SPIR-V Image Sampling specification",
-      [SPV_ISI_SingleSampled, SPV_ISI_MultiSampled]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    SPV_I32EnumAttr<
+      "ImageSamplingInfo", "valid SPIR-V Image Sampling specification",
+      [SPV_ISI_SingleSampled, SPV_ISI_MultiSampled]>;
 
 def SPV_ISUI_SamplerUnknown : I32EnumAttrCase<"SamplerUnknown", 0>;
 def SPV_ISUI_NeedSampler    : I32EnumAttrCase<"NeedSampler", 1>;
 def SPV_ISUI_NoSampler      : I32EnumAttrCase<"NoSampler", 2>;
 
 def SPV_SamplerUseAttr:
-    I32EnumAttr<"ImageSamplerUseInfo", "valid SPIR-V Sampler Use specification",
-      [SPV_ISUI_SamplerUnknown, SPV_ISUI_NeedSampler, SPV_ISUI_NoSampler]> {
-  let cppNamespace = "::mlir::spirv";
-}
+    SPV_I32EnumAttr<
+      "ImageSamplerUseInfo", "valid SPIR-V Sampler Use specification",
+      [SPV_ISUI_SamplerUnknown, SPV_ISUI_NeedSampler, SPV_ISUI_NoSampler]>;
 
 //===----------------------------------------------------------------------===//
 // SPIR-V type definitions
 //===----------------------------------------------------------------------===//
 
 def SPV_IsPtrType : CPred<"$_self.isa<::mlir::spirv::PointerType>()">;
 def SPV_IsArrayType : CPred<"$_self.isa<::mlir::spirv::ArrayType>()">;
 def SPV_IsRTArrayType : CPred<"$_self.isa<::mlir::spirv::RuntimeArrayType>()">;

 def SPV_OC_OpReturn                    : I32EnumAttrCase<"OpReturn", 253>;
 def SPV_OC_OpReturnValue               : I32EnumAttrCase<"OpReturnValue", 254>;
 def SPV_OC_OpUnreachable               : I32EnumAttrCase<"OpUnreachable", 255>;
 def SPV_OC_OpModuleProcessed           : I32EnumAttrCase<"OpModuleProcessed", 330>;
 def SPV_OC_OpGroupNonUniformBallot     : I32EnumAttrCase<"OpGroupNonUniformBallot", 339>;
 def SPV_OC_OpSubgroupBallotKHR         : I32EnumAttrCase<"OpSubgroupBallotKHR", 4421>;
 
 def SPV_OpcodeAttr :
-    I32EnumAttr<"Opcode", "valid SPIR-V instructions", [
+    SPV_I32EnumAttr<"Opcode", "valid SPIR-V instructions", [
       SPV_OC_OpNop, SPV_OC_OpUndef, SPV_OC_OpSourceContinued, SPV_OC_OpSource,
       SPV_OC_OpSourceExtension, SPV_OC_OpName, SPV_OC_OpMemberName, SPV_OC_OpString,
       SPV_OC_OpExtension, SPV_OC_OpExtInstImport, SPV_OC_OpExtInst,
       SPV_OC_OpMemoryModel, SPV_OC_OpEntryPoint, SPV_OC_OpExecutionMode,
       SPV_OC_OpCapability, SPV_OC_OpTypeVoid, SPV_OC_OpTypeBool, SPV_OC_OpTypeInt,
       SPV_OC_OpTypeFloat, SPV_OC_OpTypeVector, SPV_OC_OpTypeArray,
       SPV_OC_OpTypeRuntimeArray, SPV_OC_OpTypeStruct, SPV_OC_OpTypePointer,
       SPV_OC_OpTypeFunction, SPV_OC_OpConstantTrue, SPV_OC_OpConstantFalse,
SPV_I32EnumAttr<"Opcode", "valid SPIR-V instructions", [
       SPV_OC_OpAtomicCompareExchangeWeak, SPV_OC_OpAtomicIIncrement,
       SPV_OC_OpAtomicIDecrement, SPV_OC_OpAtomicIAdd, SPV_OC_OpAtomicISub,
       SPV_OC_OpAtomicSMin, SPV_OC_OpAtomicUMin, SPV_OC_OpAtomicSMax,
       SPV_OC_OpAtomicUMax, SPV_OC_OpAtomicAnd, SPV_OC_OpAtomicOr, SPV_OC_OpAtomicXor,
       SPV_OC_OpPhi, SPV_OC_OpLoopMerge, SPV_OC_OpSelectionMerge, SPV_OC_OpLabel,
       SPV_OC_OpBranch, SPV_OC_OpBranchConditional, SPV_OC_OpReturn,
       SPV_OC_OpReturnValue, SPV_OC_OpUnreachable, SPV_OC_OpModuleProcessed,
       SPV_OC_OpGroupNonUniformBallot, SPV_OC_OpSubgroupBallotKHR
-      ]> {
-    let cppNamespace = "::mlir::spirv";
-}
+    ]>;
 
 // End opcode section. Generated from SPIR-V spec; DO NOT MODIFY!
 
 //===----------------------------------------------------------------------===//
 // SPIR-V op definitions
 //===----------------------------------------------------------------------===//
 
 // Base class for all SPIR-V ops.

mlir/utils/spirv/gen_spirv_dialect.py

def gen_operand_kind_enum_attr(operand_kind, capability_mapping):
 
   # Split them into sublists and concatenate into multiple lines
   case_names = split_list_into_sublists(case_names, 6)
   case_names = ['{:6}'.format('') + ', '.join(sublist)
                 for sublist in case_names]
   case_names = ',\n'.join(case_names)
 
   # Generate the enum attribute definition
-  enum_attr = 'def SPV_{name}Attr :\n    '\
-      '{category}EnumAttr<"{name}", "valid SPIR-V {name}", [\n{cases}\n'\
-      '    ]> {{\n'\
-      '  let cppNamespace = "::mlir::spirv";\n}}'.format(
+  enum_attr = '''def SPV_{name}Attr :
+    SPV_{category}EnumAttr<"{name}", "valid SPIR-V {name}", [
+{cases}
+    ]>;'''.format(
           name=kind_name, category=kind_category, cases=case_names)
   return kind_name, case_defs + '\n\n' + enum_attr
 
 
 def gen_opcode(instructions):
   """ Generates the TableGen definition to map opname to opcode
 
   Returns:
opcode_list = [
       decl_fmt_str.format(name=inst['opname']) for inst in instructions
   ]
   opcode_list = split_list_into_sublists(opcode_list, 6)
   opcode_list = [
       '{:6}'.format('') + ', '.join(sublist) for sublist in opcode_list
   ]
   opcode_list = ',\n'.join(opcode_list)
   enum_attr = 'def SPV_OpcodeAttr :\n'\
-              '    I32EnumAttr<"{name}", "valid SPIR-V instructions", [\n'\
+              '    SPV_I32EnumAttr<"{name}", "valid SPIR-V instructions", [\n'\
               '{lst}\n'\
-              '      ]> {{\n'\
-              '    let cppNamespace = "::mlir::spirv";\n}}'.format(
-                  name='Opcode', lst=opcode_list)
+              '    ]>;'.format(name='Opcode', lst=opcode_list)
   return opcode_str + '\n\n' + enum_attr
 
 
 def update_td_opcodes(path, instructions, filter_list):
   """Updates SPIRBase.td with new generated opcode cases.
 
   Arguments:
     - path: the path to SPIRBase.td