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mravishankar (Mahesh Ravishankar)
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Jan 6 2015, 1:11 PM (298 w, 2 d)

Recent Activity

Yesterday

mravishankar committed rGb62f9f4407a5: [mlir][Linalg] Add pattern to fold linalg.tensor_reshape that add unit extent… (authored by mravishankar).
[mlir][Linalg] Add pattern to fold linalg.tensor_reshape that add unit extent…
Wed, Sep 23, 12:02 AM
mravishankar closed D88057: [mlir][Linalg] Add pattern to fold linalg.tensor_reshape that add unit extent dims..
Wed, Sep 23, 12:02 AM · Restricted Project
mravishankar updated the diff for D88057: [mlir][Linalg] Add pattern to fold linalg.tensor_reshape that add unit extent dims..

Addressing comments

Wed, Sep 23, 12:01 AM · Restricted Project

Mon, Sep 21

mravishankar accepted D88040: [mlir] NFC: fix trivial typos under include directory.

Thanks!

Mon, Sep 21, 5:00 PM · Restricted Project
mravishankar updated the diff for D88057: [mlir][Linalg] Add pattern to fold linalg.tensor_reshape that add unit extent dims..

Removing errant changes and formatting

Mon, Sep 21, 4:45 PM · Restricted Project
mravishankar added a reviewer for D88057: [mlir][Linalg] Add pattern to fold linalg.tensor_reshape that add unit extent dims.: hanchung.
Mon, Sep 21, 4:41 PM · Restricted Project
mravishankar requested review of D88057: [mlir][Linalg] Add pattern to fold linalg.tensor_reshape that add unit extent dims..
Mon, Sep 21, 4:40 PM · Restricted Project

Fri, Sep 18

mravishankar accepted D87911: [spirv] Move device info from resource limit into target env.

Nice. Just a few nits.

Fri, Sep 18, 2:24 PM · Restricted Project
mravishankar added a comment to D87781: Reorder linalg.conv indexing_maps loop order.

Putting a blocker to get some discussion here.

The original definition was following TF, it is not anymore.
Do we consider this to not be a problem ?

Putting the loops in the "right" order is independent from the op spec.
You should be able to just use tiling without any op definition change (tile by 1-1-1-1-1 + perm for scalar loop-level).

More generally, the way I am approaching this longer term is that this magic "embed the world op" would disappear in favor of more, smaller named ops.
Transformations would look like: named_op1 -> generic form -> named_op2 and I think a lot of these things can be automated from the TC form.
My overall concern is whether we are going towards relying more and more on an op with very fat one-off semantics.

I won't oppose it strongly for now but the conv op will most likely be a prime candidate for deletion when the infra is more mature, so I'd be cautious on putting a lot of effort on transformations / optimizations / perf results if they don't generalize to linalg.generic.

Also, the doc would need to be updated too.

Fri, Sep 18, 7:26 AM · Restricted Project
mravishankar accepted D87887: [mlir][StandardToSPIRV] Handle vector of i1 case for lowering zexti to SPIR-V..
Fri, Sep 18, 6:33 AM · Restricted Project
mravishankar accepted D87692: [MLIR][SPIRV] Create new ctx for deserialization in roundtrips..

Thanks! It looks good to me, but I am not super familiar with the registration stuff, but looks fine overall.

Fri, Sep 18, 6:31 AM · Restricted Project
mravishankar accepted D87781: Reorder linalg.conv indexing_maps loop order.

Looks good after comment is addressed.

Fri, Sep 18, 6:29 AM · Restricted Project
mravishankar accepted D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors..

Looks good to me for a first draft.

Fri, Sep 18, 6:24 AM · Restricted Project

Thu, Sep 17

mravishankar added inline comments to D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors..
Thu, Sep 17, 11:57 AM · Restricted Project
mravishankar added a comment to D87767: [mlir][Linalg] Evolve named ops to use assembly form and support linalg on tensors..

Adding some comments. Looking through this right now.

Thu, Sep 17, 11:10 AM · Restricted Project

Fri, Sep 11

mravishankar committed rGd380b582f7f0: [mlir][Linalg] Make LinalgBaseTilingPattern not delete the original operation. (authored by mravishankar).
[mlir][Linalg] Make LinalgBaseTilingPattern not delete the original operation.
Fri, Sep 11, 12:40 AM
mravishankar closed D87308: [mlir][Linalg] Make LinalgBaseTilingPattern not delete the original operation..
Fri, Sep 11, 12:39 AM · Restricted Project

Thu, Sep 10

mravishankar retitled D87308: [mlir][Linalg] Make LinalgBaseTilingPattern not delete the original operation. from [mlir][Linalg] Add option to LinalgTilingOptions to not delete the operation after tiling. to [mlir][Linalg] Make LinalgBaseTilingPattern not delete the original operation..
Thu, Sep 10, 9:53 PM · Restricted Project
mravishankar committed rG0a391c60793b: [mlir][Analysis] Allow Slice Analysis to work with linalg::LinalgOp (authored by mravishankar).
[mlir][Analysis] Allow Slice Analysis to work with linalg::LinalgOp
Thu, Sep 10, 6:55 PM
mravishankar closed D87307: [mlir][Analysis] Allow Slice Analysis to work with linalg::LinalgOp.
Thu, Sep 10, 6:55 PM · Restricted Project
mravishankar added a comment to D87308: [mlir][Linalg] Make LinalgBaseTilingPattern not delete the original operation..
The alternative would be that I copy the guts of the matchAndRewrite method of LinalgBaseTilingPattern

Right so my suggestion here would be to make LinalgBaseTilingPattern to *never* erase the op and the existing derived LinalgTilingPattern override matchAndRewrite to call the base and then eraseOp.
Then your patterns can do the same: override matchAndRewrite, call the parent matchAndRewrite, do X and eraseOp.

It seems we can do that without adding a new option.
The reason I'd prefer to avoid new options is that any new knob is more complexity to precondition/search.

Thu, Sep 10, 4:55 PM · Restricted Project
mravishankar updated the diff for D87308: [mlir][Linalg] Make LinalgBaseTilingPattern not delete the original operation..

Addressing comments

Thu, Sep 10, 4:53 PM · Restricted Project
mravishankar updated the diff for D87307: [mlir][Analysis] Allow Slice Analysis to work with linalg::LinalgOp.

rebase

Thu, Sep 10, 4:47 PM · Restricted Project
mravishankar updated the diff for D87307: [mlir][Analysis] Allow Slice Analysis to work with linalg::LinalgOp.

Adding test for backward slice of Linalg operation.

Thu, Sep 10, 1:23 PM · Restricted Project

Wed, Sep 9

mravishankar committed rGa7b2977aa613: [mlir][Linalg] Add Utility method to get loop ranges for a LinalgOp. (authored by mravishankar).
[mlir][Linalg] Add Utility method to get loop ranges for a LinalgOp.
Wed, Sep 9, 10:58 PM
mravishankar closed D87303: [mlir][Linalg] Add Utility method to get loop ranges for a LinalgOp..
Wed, Sep 9, 10:58 PM · Restricted Project
mravishankar added reviewers for D87307: [mlir][Analysis] Allow Slice Analysis to work with linalg::LinalgOp: ThomasRaoux, aartbik.
Wed, Sep 9, 1:52 PM · Restricted Project
mravishankar added reviewers for D87303: [mlir][Linalg] Add Utility method to get loop ranges for a LinalgOp.: ThomasRaoux, aartbik.
Wed, Sep 9, 1:52 PM · Restricted Project
mravishankar accepted D87292: Introduce linalg.vecmat.

@burmako This makes sense. I suspected this is what you were planning for, but as I said, it is not specific to this patch. I understand why you need this.
FWIW

Wed, Sep 9, 1:51 PM · Restricted Project

Tue, Sep 8

mravishankar added a comment to D87308: [mlir][Linalg] Make LinalgBaseTilingPattern not delete the original operation..

The specific IREEs use case might not be very relevant here (though this is part of this PR). Without going into those details, I think the expectation is that any user of Linalg tiling must be able to just use the LinalgTilingPattern. In IREE, I have a pattern class that inherits from this class. After tile (and distribute), I need the original operation to generate some IREE specific information, but the op is deleted. The alternative would be that I copy the guts of the matchAndRewrite method of LinalgBaseTilingPattern and use that directly, so that I can generate the information I need from the op before deleting it. I would prefer not to do that. My thought here is that this option is an opt-in for use cases where the original op is still needed after the tiling transformation. So a flag that allows you to opt-in to this made sense to me.

Tue, Sep 8, 2:50 PM · Restricted Project
mravishankar requested review of D87308: [mlir][Linalg] Make LinalgBaseTilingPattern not delete the original operation..
Tue, Sep 8, 11:28 AM · Restricted Project
mravishankar added a reviewer for D87307: [mlir][Analysis] Allow Slice Analysis to work with linalg::LinalgOp: rriddle.
Tue, Sep 8, 11:28 AM · Restricted Project
mravishankar requested review of D87307: [mlir][Analysis] Allow Slice Analysis to work with linalg::LinalgOp.
Tue, Sep 8, 11:27 AM · Restricted Project
mravishankar abandoned D87305: [mlir][Analysis] Allow Slice Analysis to work with linalg::LinalgOp.

Wrong patch sent for review.

Tue, Sep 8, 11:20 AM · Restricted Project
mravishankar requested review of D87305: [mlir][Analysis] Allow Slice Analysis to work with linalg::LinalgOp.
Tue, Sep 8, 11:19 AM · Restricted Project
mravishankar requested review of D87303: [mlir][Linalg] Add Utility method to get loop ranges for a LinalgOp..
Tue, Sep 8, 11:14 AM · Restricted Project
mravishankar requested changes to D87292: Introduce linalg.vecmat.

Not specific to the patch itself, but I am really concerned about the ballooning surface area of named ops in Linalg. I mentioned it before with the autogeneration from TC language approach to begin with, that one of the great things about Linalg is that many of the ops from dialects like MHLO (which have more justification for wide surface area of ops) can be boiled down to a "few" ops in Linalg. Adding more such operations here seems to be going away from that really useful feature. For example in this patch itself

Tue, Sep 8, 10:21 AM · Restricted Project

Thu, Sep 3

mravishankar accepted D87106: [spirv] Add more target and resource limit fields.

Nice! THanks!
Is there a way to add tests for these (do we need to)? Some roundtrip tests will serve as good reference.

Thu, Sep 3, 12:19 PM · Restricted Project

Wed, Sep 2

mravishankar accepted D86929: [mlir] Add Acos, Asin, Atan, Sinh, Cosh, Pow to SPIRVGLSLOps.
Wed, Sep 2, 9:18 AM · Restricted Project
mravishankar accepted D86914: add SPIR-V GLSL extended Round op.
Wed, Sep 2, 9:16 AM · Restricted Project
mravishankar accepted D86638: [mlir][Linalg] Wrong tile size for convolutions fixed.

Thanks!

Wed, Sep 2, 9:16 AM · Restricted Project

Tue, Sep 1

mravishankar requested changes to D86929: [mlir] Add Acos, Asin, Atan, Sinh, Cosh, Pow to SPIRVGLSLOps.

Thanks! Can we also add some tests for the operation here and serialization roundtrip tests here. This is in keeping with the procedure to add new op here

Tue, Sep 1, 10:31 AM · Restricted Project
mravishankar requested changes to D86914: add SPIR-V GLSL extended Round op.

Thanks! Can we also add some tests for the operation here and serialization roundtrip tests here. This is in keeping with the procedure to add new op here

Tue, Sep 1, 10:30 AM · Restricted Project

Thu, Aug 27

mravishankar added a comment to D86108: [MLIR][mlir-spirv-cpu-runner] A SPIR-V cpu runner prototype.

Latest patch works, but I still need the fixes to the builds (actually the fixes to GPUTransforms/CMakeLists.txt above is for the patch earlier in the stack).

Thu, Aug 27, 11:24 AM · Restricted Project
mravishankar added a comment to D86108: [MLIR][mlir-spirv-cpu-runner] A SPIR-V cpu runner prototype.

Trying this change out, I needed the following changes to get this to build locally. Can you verify this is needed?

index 560dcae8200..41f5c8a9ce5 100644
--- a/mlir/lib/Conversion/GPUCommon/CMakeLists.txt
+++ b/mlir/lib/Conversion/GPUCommon/CMakeLists.txt
@@ -34,6 +34,8 @@ add_mlir_conversion_library(MLIRGPUToGPURuntimeTransforms
   MLIRIR
   MLIRLLVMIR
   MLIRPass
+  MLIRSPIRV
   MLIRSupport
   MLIRStandardToLLVM
+  MLIRSPIRVToLLVM
 )
diff --git a/mlir/tools/mlir-spirv-cpu-runner/CMakeLists.txt b/mlir/tools/mlir-spirv-cpu-runner/CMakeLists.txt
index 69080ae66dc..8e0c2a6ad67 100644
--- a/mlir/tools/mlir-spirv-cpu-runner/CMakeLists.txt
+++ b/mlir/tools/mlir-spirv-cpu-runner/CMakeLists.txt
@@ -15,6 +15,7 @@ if (MLIR_SPIRV_CPU_RUNNER_ENABLED)
   get_property(dialect_libs GLOBAL PROPERTY MLIR_DIALECT_LIBS)
 
   target_link_libraries(mlir-spirv-cpu-runner PRIVATE
+    LLVMLinker
     ${conversion_libs}
     ${dialect_libs}
     MLIRAnalysis

I am building locally without these changes and it is working for me?

Thu, Aug 27, 10:53 AM · Restricted Project
mravishankar accepted D86314: [mlir][Linalg] Enhance Linalg fusion on generic op and tensor_reshape op..

Looks good. Few minor comments. Please address before submitting.

Thu, Aug 27, 10:51 AM · Restricted Project
mravishankar added a comment to D86638: [mlir][Linalg] Wrong tile size for convolutions fixed.

Could we start a discourse post on this. Its more easy to document issues and discuss solutions there rather than on the patch.

Thu, Aug 27, 9:24 AM · Restricted Project
mravishankar added a comment to D86108: [MLIR][mlir-spirv-cpu-runner] A SPIR-V cpu runner prototype.

Trying this change out, I needed the following changes to get this to build locally. Can you verify this is needed?

Thu, Aug 27, 12:45 AM · Restricted Project

Wed, Aug 26

mravishankar accepted D86567: [mlir] NFC: fix trivial typos under docs directory.

THanks again!

Wed, Aug 26, 9:51 PM · Restricted Project
mravishankar requested changes to D86108: [MLIR][mlir-spirv-cpu-runner] A SPIR-V cpu runner prototype.

Looking at the stack here, I think only the change below this one in the stack (which is good to go) and this would probably need me to submit this. It would be good to commit the other two dependent changes and then I could try these two out locally.

Wed, Aug 26, 9:50 PM · Restricted Project
mravishankar requested changes to D86112: [MLIR][mlir-spirv-cpu-runner] A pass to emulate a call to kernel in LLVM.

This looks good! I just have a few final nits.

Wed, Aug 26, 9:46 PM · Restricted Project
mravishankar accepted D86674: [MLIR][SPIRVToLLVM] Updated the documentation for type conversion.
Wed, Aug 26, 9:29 PM · Restricted Project
mravishankar requested changes to D86638: [mlir][Linalg] Wrong tile size for convolutions fixed.

@limo1996 This is really nice find! I have been struggling with figuring out why convolutions are giving me errors in some cases, and I suspected something like, but wasnt able to nail this down.

Wed, Aug 26, 10:14 AM · Restricted Project

Tue, Aug 25

mravishankar accepted D86563: [mlir] NFC: fix trivial typos in documents.

Thanks for the edits!

Tue, Aug 25, 10:05 PM · Restricted Project
mravishankar accepted D86580: [mlir][vector] Add vector.bitcast operation.

Looks good to me, but maybe wait for @aartbik to review.

Tue, Aug 25, 9:45 PM · Restricted Project
mravishankar accepted D86582: [mlir][spirv] Infer converted type of scf.for from the init value.
Tue, Aug 25, 9:43 PM · Restricted Project
mravishankar accepted D86386: [MLIR][SPIRV] Added optional name to SPIR-V module.

Thanks George! Please fix the clang-tidy errors before submitting if possible.

Tue, Aug 25, 9:38 PM · Restricted Project
mravishankar added a reviewer for D86580: [mlir][vector] Add vector.bitcast operation: mravishankar.
Tue, Aug 25, 4:47 PM · Restricted Project
mravishankar added inline comments to D86580: [mlir][vector] Add vector.bitcast operation.
Tue, Aug 25, 4:47 PM · Restricted Project

Aug 25 2020

mravishankar accepted D86384: [MLIR][GPUToSPIRV] Passing gpu module name to SPIR-V module.
Aug 25 2020, 3:01 PM · Restricted Project
mravishankar accepted D86515: [MLIR][SPIRVToLLVM] Added a hook for descriptor set / binding encoding.
Aug 25 2020, 2:59 PM · Restricted Project
mravishankar requested changes to D86386: [MLIR][SPIRV] Added optional name to SPIR-V module.

Making this request changes. I think after addressing comments this is ready to land.

Aug 25 2020, 2:28 PM · Restricted Project

Aug 24 2020

mravishankar added a comment to D86386: [MLIR][SPIRV] Added optional name to SPIR-V module.

I am not totally opposed to it though. Its one way of making the name optional, but still using the symbol table traits.

Aug 24 2020, 10:17 PM · Restricted Project
mravishankar requested changes to D86314: [mlir][Linalg] Enhance Linalg fusion on generic op and tensor_reshape op..
Aug 24 2020, 12:58 PM · Restricted Project
mravishankar added inline comments to D86112: [MLIR][mlir-spirv-cpu-runner] A pass to emulate a call to kernel in LLVM.
Aug 24 2020, 12:09 PM · Restricted Project

Aug 21 2020

mravishankar accepted D86328: [mlir][GPUToVulkan] Fix signature of bindMemRef function for f16.
Aug 21 2020, 9:45 AM · Restricted Project
mravishankar accepted D86288: [MLIR][SPIRVToLLVM] Updated the documentation for the conversion.
Aug 21 2020, 9:43 AM · Restricted Project

Aug 20 2020

mravishankar requested changes to D86314: [mlir][Linalg] Enhance Linalg fusion on generic op and tensor_reshape op..
Aug 20 2020, 11:32 PM · Restricted Project
mravishankar requested changes to D86112: [MLIR][mlir-spirv-cpu-runner] A pass to emulate a call to kernel in LLVM.
Aug 20 2020, 10:59 PM · Restricted Project
mravishankar requested changes to D86288: [MLIR][SPIRVToLLVM] Updated the documentation for the conversion.
Aug 20 2020, 9:44 AM · Restricted Project
mravishankar accepted D86285: [MLIR][SPIRVToLLVM] Removed std to llvm patterns from the conversion.
Aug 20 2020, 9:41 AM · Restricted Project

Aug 18 2020

mravishankar added inline comments to D86108: [MLIR][mlir-spirv-cpu-runner] A SPIR-V cpu runner prototype.
Aug 18 2020, 11:22 PM · Restricted Project
mravishankar committed rG5ccac05d433c: [mlir][Linalg] Modify callback for getting id/nprocs in (authored by mravishankar).
[mlir][Linalg] Modify callback for getting id/nprocs in
Aug 18 2020, 2:05 PM
mravishankar closed D86095: [mlir][Linalg] Modify callback for getting id/nprocs in LinalgDistribution options to allow more general distributions..
Aug 18 2020, 2:05 PM · Restricted Project
mravishankar updated the diff for D86095: [mlir][Linalg] Modify callback for getting id/nprocs in LinalgDistribution options to allow more general distributions..

Addressing comments and rebase.

Aug 18 2020, 1:26 PM · Restricted Project
mravishankar added inline comments to D86095: [mlir][Linalg] Modify callback for getting id/nprocs in LinalgDistribution options to allow more general distributions..
Aug 18 2020, 1:24 PM · Restricted Project
mravishankar committed rGa65a50540e3b: [mlir][Linalg] Canonicalize tensor_reshape(splat-constant) -> splat-constant. (authored by mravishankar).
[mlir][Linalg] Canonicalize tensor_reshape(splat-constant) -> splat-constant.
Aug 18 2020, 8:18 AM
mravishankar closed D86117: [mlir][Linalg] Canonicalize tensor_reshape(splat-constant) -> splat-constant..
Aug 18 2020, 8:17 AM · Restricted Project
mravishankar accepted D86109: [MLIR][SPIRVToLLVM] Additional conversions for spirv-runner.
Aug 18 2020, 8:06 AM · Restricted Project

Aug 17 2020

mravishankar requested changes to D86109: [MLIR][SPIRVToLLVM] Additional conversions for spirv-runner.

Thanks George! Just some minor comments.

Aug 17 2020, 11:44 PM · Restricted Project
mravishankar requested changes to D86112: [MLIR][mlir-spirv-cpu-runner] A pass to emulate a call to kernel in LLVM.

I did an initial pass on this. Will come back and look in more detail, but have some high-level comments.

Aug 17 2020, 11:37 PM · Restricted Project
mravishankar requested changes to D86108: [MLIR][mlir-spirv-cpu-runner] A SPIR-V cpu runner prototype.

Thanks George!

Aug 17 2020, 11:16 PM · Restricted Project
mravishankar added a reviewer for D86117: [mlir][Linalg] Canonicalize tensor_reshape(splat-constant) -> splat-constant.: asaadaldien.
Aug 17 2020, 3:57 PM · Restricted Project
mravishankar requested review of D86117: [mlir][Linalg] Canonicalize tensor_reshape(splat-constant) -> splat-constant..
Aug 17 2020, 3:57 PM · Restricted Project
mravishankar requested review of D86095: [mlir][Linalg] Modify callback for getting id/nprocs in LinalgDistribution options to allow more general distributions..
Aug 17 2020, 11:20 AM · Restricted Project

Aug 13 2020

mravishankar updated the diff for D85780: [mlir][Linalg] Fix subview size used within Linalg Tiling pass..

Updating the patch with some changes to make sure that the allocation size bound computation works with addition of the affine.min operation

Aug 13 2020, 11:44 AM · Restricted Project

Aug 11 2020

mravishankar requested review of D85780: [mlir][Linalg] Fix subview size used within Linalg Tiling pass..
Aug 11 2020, 2:04 PM · Restricted Project

Aug 10 2020

mravishankar committed rG41d4120017f9: [mlir][Linalg] Allow distribution `scf.parallel` loops generated in (authored by mravishankar).
[mlir][Linalg] Allow distribution `scf.parallel` loops generated in
Aug 10 2020, 2:53 PM
mravishankar closed D85147: [mlir][Linalg] Allow distribution `scf.parallel` loops generated in Linalg to processors..
Aug 10 2020, 2:52 PM · Restricted Project
mravishankar added inline comments to D85147: [mlir][Linalg] Allow distribution `scf.parallel` loops generated in Linalg to processors..
Aug 10 2020, 2:41 PM · Restricted Project
mravishankar updated the diff for D85147: [mlir][Linalg] Allow distribution `scf.parallel` loops generated in Linalg to processors..

Removing errant tabs

Aug 10 2020, 2:36 PM · Restricted Project
mravishankar updated the diff for D85147: [mlir][Linalg] Allow distribution `scf.parallel` loops generated in Linalg to processors..

Using affine maps for bounds/step update.

Aug 10 2020, 2:32 PM · Restricted Project

Aug 7 2020

mravishankar added inline comments to D85435: [mlir][spirv] Add OpGroupBroadcast.
Aug 7 2020, 3:16 PM · Restricted Project
mravishankar accepted D85435: [mlir][spirv] Add OpGroupBroadcast.
Aug 7 2020, 3:13 PM · Restricted Project
mravishankar committed rG9414a71aaab8: [mlir][spirv] Add correct handling of Kernel and Addresses capabilities (authored by kdobros).
[mlir][spirv] Add correct handling of Kernel and Addresses capabilities
Aug 7 2020, 12:30 PM
mravishankar closed D85196: [mlir][spirv] Add correct handling of Kernel and Addresses capabilities.
Aug 7 2020, 12:30 PM · Restricted Project
mravishankar added a comment to D85196: [mlir][spirv] Add correct handling of Kernel and Addresses capabilities.

Will commit this. THanks!

Aug 7 2020, 8:54 AM · Restricted Project

Aug 6 2020

mravishankar added inline comments to D85196: [mlir][spirv] Add correct handling of Kernel and Addresses capabilities.
Aug 6 2020, 3:01 PM · Restricted Project
mravishankar accepted D85196: [mlir][spirv] Add correct handling of Kernel and Addresses capabilities.

THanks! Looks good to me!

Aug 6 2020, 12:18 PM · Restricted Project
mravishankar committed rG25e8668e88bb: [mlir][SPIR-V] Fix wrongly placed Rationale section. (authored by mravishankar).
[mlir][SPIR-V] Fix wrongly placed Rationale section.
Aug 6 2020, 11:52 AM