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Differential D72524

[X86] Try to avoid casts around logical vector ops recursively.
ClosedPublic

Authored by fhahn on Jan 10 2020, 10:29 AM.

Details

Reviewers
craig.topper
RKSimon
spatel
Commits
rG03f50152d301: [X86] Try to avoid casts around logical vector ops recursively.
rG0ee1db2d1d7a: [X86] Try to avoid casts around logical vector ops recursively.
Summary

Currently PromoteMaskArithemtic only looks at a single operation to
skip casts. This means we miss cases where we combine multiple masks.

This patch updates PromoteMaskArithemtic to try to recursively promote
AND/XOR/AND nodes that terminate in truncates of the right size or
constant vectors.

Diff Detail

Event Timeline

fhahn created this revision.Jan 10 2020, 10:29 AM
Herald added a project: Restricted Project. · View Herald TranscriptJan 10 2020, 10:29 AM
Herald added a subscriber: hiraditya. · View Herald Transcript
merge_guards_bot added a subscriber: merge_guards_bot.Jan 10 2020, 10:32 AM

Unit tests: unknown.

clang-tidy: unknown.

clang-format: unknown.

Build artifacts: diff.json, console-log.txt

Harbormaster failed remote builds in B43700: Diff 237385!Jan 10 2020, 10:33 AM
fhahn added a comment.Jan 10 2020, 10:51 AM

The diff just includes the changes for the newly added tests (which I'll pre-commit before landing this)

RKSimon added a comment.Jan 10 2020, 11:57 AM

Not sure if its reusable but we already have signExtendBitcastSrcVector which we use for the (i16 bitcast (v16i1 x)) combine

llvm/lib/Target/X86/X86ISelLowering.cpp
39815

Very minor, but in most depth search cases we start at Depth = 0 and bail once it reaches at maximum.

39881

Does max depth have to be 8 or would we be better using SelectionDAG::MaxRecursionDepth = 6?

fhahn mentioned this in rG5d069f4314a0: [X86] Add more complex tests for vector masks used with AND/OR/XOR..Jan 11 2020, 4:18 AM
fhahn updated this revision to Diff 237489.Jan 11 2020, 4:33 AM

Use SelectionDAG::MaxRecursionDepth, add example to comment.

fhahn marked 2 inline comments as done.Jan 11 2020, 4:47 AM
In D72524#1814826, @RKSimon wrote:

Not sure if its reusable but we already have signExtendBitcastSrcVector which we use for the (i16 bitcast (v16i1 x)) combine

It looks like signExtendBitcastSrcVector does something similar, pushing extends down through AND/OR/XOR.

However they seem to be specialized for different cases, signExtendBitcastSrcVector focuses on SETCC defs, while in this patch we only consider truncates where we can use the operand without extending it (and constant vectors which are zero-extended). I think we could generalize and combine them, but I am not sure if either use case would benefit from matching more general patterns. I think that would be best evaluated in a potential follow up, what do you think?

llvm/lib/Target/X86/X86ISelLowering.cpp
39815

Thanks, I've changed the code to be in line with what we do in SelectionDAG, including using SelectionDAG::MaxRecursionLimit, which is conveniently exposed.

39881

8 was arbitrarily chosen, but I agree it makes more sense to re-used SelectionDAG::MaxRecursionDepth

merge_guards_bot added a comment.Jan 11 2020, 4:50 AM

Unit tests: pass. 61771 tests passed, 0 failed and 780 were skipped.

clang-tidy: fail. Please fix clang-tidy findings.

clang-format: pass.

Build artifacts: diff.json, clang-tidy.txt, clang-format.patch, CMakeCache.txt, console-log.txt, test-results.xml

Harbormaster failed remote builds in B43757: Diff 237489!Jan 11 2020, 4:56 AM
fhahn added a comment.Jan 13 2020, 4:43 PM
In D72524#1815499, @merge_guards_bot wrote:

clang-tidy: fail. Please fix clang-tidy findings.

clang-tidy is unhappy about the uppercase function names PromoteMaskArithmetic. I'm happy to change them both to lowercase if that's preferred.

RKSimon accepted this revision.Jan 17 2020, 9:09 AM

LGTM - I don't have a problem with keeping PromoteMaskArithmetic tbh

This revision is now accepted and ready to land.Jan 17 2020, 9:09 AM
Closed by commit rG0ee1db2d1d7a: [X86] Try to avoid casts around logical vector ops recursively. (authored by fhahn). · Explain WhyJan 19 2020, 5:41 PM
This revision was automatically updated to reflect the committed changes.
fhahn mentioned this in rGd2f7e135e45e: [X86] Add more complex tests for vector masks used with AND/OR/XOR..Jul 14 2020, 4:14 PM

Revision Contents

PathSize
llvm/
lib/
Target/
X86/
103 lines
test/
CodeGen/
X86/
774 lines

Diff 239014

llvm/lib/Target/X86/X86ISelLowering.cpp

  • This file is larger than 256 KB, so syntax highlighting is disabled by default.
Show First 20 Lines • Show All 39,806 Lines • ▼ Show 20 Lines if (VT == MVT::f32 || VT == MVT::f64) {
case ISD::CopyToReg: case ISD::CopyToReg:
case ISD::SIGN_EXTEND: case ISD::SIGN_EXTEND:
case ISD::ZERO_EXTEND: case ISD::ZERO_EXTEND:
case ISD::ANY_EXTEND: case ISD::ANY_EXTEND:
break; break;
} }
if (!ExpectingFlags) { if (!ExpectingFlags) {
enum X86::CondCode cc0 = (enum X86::CondCode)N0.getConstantOperandVal(0); enum X86::CondCode cc0 = (enum X86::CondCode)N0.getConstantOperandVal(0);
RKSimonUnsubmitted
Not Done
ReplyInline Actions

Very minor, but in most depth search cases we start at Depth = 0 and bail once it reaches at maximum.

RKSimon: Very minor, but in most depth search cases we start at Depth = 0 and bail once it reaches at…
fhahnAuthorUnsubmitted
Done
ReplyInline Actions

Thanks, I've changed the code to be in line with what we do in SelectionDAG, including using SelectionDAG::MaxRecursionLimit, which is conveniently exposed.

fhahn: Thanks, I've changed the code to be in line with what we do in SelectionDAG, including using…
enum X86::CondCode cc1 = (enum X86::CondCode)N1.getConstantOperandVal(0); enum X86::CondCode cc1 = (enum X86::CondCode)N1.getConstantOperandVal(0);
if (cc1 == X86::COND_E || cc1 == X86::COND_NE) { if (cc1 == X86::COND_E || cc1 == X86::COND_NE) {
X86::CondCode tmp = cc0; X86::CondCode tmp = cc0;
cc0 = cc1; cc0 = cc1;
cc1 = tmp; cc1 = tmp;
} }
▲ Show 20 Lines • Show All 49 Lines • ▼ Show 20 Lines
} }
/// Try to fold: (and (xor X, -1), Y) -> (andnp X, Y). /// Try to fold: (and (xor X, -1), Y) -> (andnp X, Y).
static SDValue combineANDXORWithAllOnesIntoANDNP(SDNode *N, SelectionDAG &DAG) { static SDValue combineANDXORWithAllOnesIntoANDNP(SDNode *N, SelectionDAG &DAG) {
assert(N->getOpcode() == ISD::AND); assert(N->getOpcode() == ISD::AND);
MVT VT = N->getSimpleValueType(0); MVT VT = N->getSimpleValueType(0);
if (!VT.is128BitVector() && !VT.is256BitVector() && !VT.is512BitVector()) if (!VT.is128BitVector() && !VT.is256BitVector() && !VT.is512BitVector())
return SDValue(); return SDValue();
RKSimonUnsubmitted
Not Done
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Does max depth have to be 8 or would we be better using SelectionDAG::MaxRecursionDepth = 6?

RKSimon: Does max depth have to be 8 or would we be better using SelectionDAG::MaxRecursionDepth = 6?
fhahnAuthorUnsubmitted
Done
ReplyInline Actions

8 was arbitrarily chosen, but I agree it makes more sense to re-used SelectionDAG::MaxRecursionDepth

fhahn: 8 was arbitrarily chosen, but I agree it makes more sense to re-used SelectionDAG…
SDValue X, Y; SDValue X, Y;
SDValue N0 = N->getOperand(0); SDValue N0 = N->getOperand(0);
SDValue N1 = N->getOperand(1); SDValue N1 = N->getOperand(1);
if (SDValue Not = IsNOT(N0, DAG)) { if (SDValue Not = IsNOT(N0, DAG)) {
X = Not; X = Not;
Y = N1; Y = N1;
} else if (SDValue Not = IsNOT(N1, DAG)) { } else if (SDValue Not = IsNOT(N1, DAG)) {
X = Not; X = Not;
Y = N0; Y = N0;
} else } else
return SDValue(); return SDValue();
X = DAG.getBitcast(VT, X); X = DAG.getBitcast(VT, X);
Y = DAG.getBitcast(VT, Y); Y = DAG.getBitcast(VT, Y);
return DAG.getNode(X86ISD::ANDNP, SDLoc(N), VT, X, Y); return DAG.getNode(X86ISD::ANDNP, SDLoc(N), VT, X, Y);
} }
// On AVX/AVX2 the type v8i1 is legalized to v8i16, which is an XMM sized // Try to widen AND, OR and XOR nodes to VT in order to remove casts around
// register. In most cases we actually compare or select YMM-sized registers // logical operations, like in the example below.
// and mixing the two types creates horrible code. This method optimizes // or (and (truncate x, truncate y)),
// some of the transition sequences. // (xor (truncate z, build_vector (constants)))
// Even with AVX-512 this is still useful for removing casts around logical // Given a target type \p VT, we generate
// operations on vXi1 mask types. // or (and x, y), (xor z, zext(build_vector (constants)))
static SDValue PromoteMaskArithmetic(SDNode *N, SelectionDAG &DAG, // given x, y and z are of type \p VT. We can do so, if operands are either
const X86Subtarget &Subtarget) { // truncates from VT types, the second operand is a vector of constants or can
EVT VT = N->getValueType(0); // be recursively promoted.
assert(VT.isVector() && "Expected vector type"); static SDValue PromoteMaskArithmetic(SDNode *N, EVT VT, SelectionDAG &DAG,
unsigned Depth) {
// Limit recursion to avoid excessive compile times.
if (Depth >= SelectionDAG::MaxRecursionDepth)
return SDValue();
assert((N->getOpcode() == ISD::ANY_EXTEND || if (N->getOpcode() != ISD::XOR && N->getOpcode() != ISD::AND &&
N->getOpcode() == ISD::ZERO_EXTEND || N->getOpcode() != ISD::OR)
N->getOpcode() == ISD::SIGN_EXTEND) && "Invalid Node"); return SDValue();
SDValue Narrow = N->getOperand(0); SDValue N0 = N->getOperand(0);
EVT NarrowVT = Narrow.getValueType(); SDValue N1 = N->getOperand(1);
SDLoc DL(N);
if (Narrow->getOpcode() != ISD::XOR && const TargetLowering &TLI = DAG.getTargetLoweringInfo();
Narrow->getOpcode() != ISD::AND && if (!TLI.isOperationLegalOrPromote(N->getOpcode(), VT))
Narrow->getOpcode() != ISD::OR)
return SDValue(); return SDValue();
SDValue N0 = Narrow->getOperand(0); if (SDValue NN0 = PromoteMaskArithmetic(N0.getNode(), VT, DAG, Depth + 1))
SDValue N1 = Narrow->getOperand(1); N0 = NN0;
SDLoc DL(Narrow); else {
// The Left side has to be a trunc. // The Left side has to be a trunc.
if (N0.getOpcode() != ISD::TRUNCATE) if (N0.getOpcode() != ISD::TRUNCATE)
return SDValue(); return SDValue();
// The type of the truncated inputs. // The type of the truncated inputs.
if (N0.getOperand(0).getValueType() != VT) if (N0.getOperand(0).getValueType() != VT)
return SDValue(); return SDValue();
N0 = N0.getOperand(0);
}
if (SDValue NN1 = PromoteMaskArithmetic(N1.getNode(), VT, DAG, Depth + 1))
N1 = NN1;
else {
// The right side has to be a 'trunc' or a constant vector. // The right side has to be a 'trunc' or a constant vector.
bool RHSTrunc = N1.getOpcode() == ISD::TRUNCATE && bool RHSTrunc = N1.getOpcode() == ISD::TRUNCATE &&
N1.getOperand(0).getValueType() == VT; N1.getOperand(0).getValueType() == VT;
if (!RHSTrunc && if (!RHSTrunc && !ISD::isBuildVectorOfConstantSDNodes(N1.getNode()))
!ISD::isBuildVectorOfConstantSDNodes(N1.getNode()))
return SDValue(); return SDValue();
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
if (!TLI.isOperationLegalOrPromote(Narrow->getOpcode(), VT))
return SDValue();
// Set N0 and N1 to hold the inputs to the new wide operation.
N0 = N0.getOperand(0);
if (RHSTrunc) if (RHSTrunc)
N1 = N1.getOperand(0); N1 = N1.getOperand(0);
else else
N1 = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N1); N1 = DAG.getNode(ISD::ZERO_EXTEND, DL, VT, N1);
}
return DAG.getNode(N->getOpcode(), DL, VT, N0, N1);
}
// On AVX/AVX2 the type v8i1 is legalized to v8i16, which is an XMM sized
// register. In most cases we actually compare or select YMM-sized registers
// and mixing the two types creates horrible code. This method optimizes
// some of the transition sequences.
// Even with AVX-512 this is still useful for removing casts around logical
// operations on vXi1 mask types.
static SDValue PromoteMaskArithmetic(SDNode *N, SelectionDAG &DAG,
const X86Subtarget &Subtarget) {
EVT VT = N->getValueType(0);
assert(VT.isVector() && "Expected vector type");
SDLoc DL(N);
assert((N->getOpcode() == ISD::ANY_EXTEND ||
N->getOpcode() == ISD::ZERO_EXTEND ||
N->getOpcode() == ISD::SIGN_EXTEND) && "Invalid Node");
SDValue Narrow = N->getOperand(0);
EVT NarrowVT = Narrow.getValueType();
// Generate the wide operation. // Generate the wide operation.
SDValue Op = DAG.getNode(Narrow->getOpcode(), DL, VT, N0, N1); SDValue Op = PromoteMaskArithmetic(Narrow.getNode(), VT, DAG, 0);
unsigned Opcode = N->getOpcode(); if (!Op)
switch (Opcode) { return SDValue();
switch (N->getOpcode()) {
default: llvm_unreachable("Unexpected opcode"); default: llvm_unreachable("Unexpected opcode");
case ISD::ANY_EXTEND: case ISD::ANY_EXTEND:
return Op; return Op;
case ISD::ZERO_EXTEND: case ISD::ZERO_EXTEND:
return DAG.getZeroExtendInReg(Op, DL, NarrowVT.getScalarType()); return DAG.getZeroExtendInReg(Op, DL, NarrowVT.getScalarType());
case ISD::SIGN_EXTEND: case ISD::SIGN_EXTEND:
return DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT, return DAG.getNode(ISD::SIGN_EXTEND_INREG, DL, VT,
Op, DAG.getValueType(NarrowVT)); Op, DAG.getValueType(NarrowVT));
▲ Show 20 Lines • Show All 7,375 Lines • Show Last 20 Lines

llvm/test/CodeGen/X86/v8i1-masks.ll

Show First 20 Lines • Show All 206 Lines • ▼ Show 20 Lines
} }
define <8 x i32> @three_ands(<8 x float> %x) { define <8 x i32> @three_ands(<8 x float> %x) {
; X32-LABEL: three_ands: ; X32-LABEL: three_ands:
; X32: ## %bb.0: ## %entry ; X32: ## %bb.0: ## %entry
; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-NEXT: vcmpltps LCPI4_1, %ymm0, %ymm2 ; X32-NEXT: vcmpltps LCPI4_1, %ymm0, %ymm2
; X32-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X32-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X32-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X32-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X32-NEXT: vandps %ymm0, %ymm2, %ymm0
; X32-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; X32-NEXT: vandps %ymm0, %ymm1, %ymm0
; X32-NEXT: vcmpneqps %ymm2, %ymm0, %ymm0
; X32-NEXT: vextractf128 $1, %ymm0, %xmm2
; X32-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X32-NEXT: vpand %xmm0, %xmm1, %xmm0
; X32-NEXT: vpmovsxwd %xmm0, %xmm1
; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X32-NEXT: vpmovsxwd %xmm0, %xmm0
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: three_ands: ; X64-LABEL: three_ands:
; X64: ## %bb.0: ## %entry ; X64: ## %bb.0: ## %entry
; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2 ; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2
; X64-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X64-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X64-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X64-NEXT: vandps %ymm0, %ymm2, %ymm0
; X64-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; X64-NEXT: vandps %ymm0, %ymm1, %ymm0
; X64-NEXT: vcmpneqps %ymm2, %ymm0, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm2
; X64-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X64-NEXT: vpand %xmm0, %xmm1, %xmm0
; X64-NEXT: vpmovsxwd %xmm0, %xmm1
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X64-NEXT: vpmovsxwd %xmm0, %xmm0
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X32-AVX2-LABEL: three_ands: ; X32-AVX2-LABEL: three_ands:
; X32-AVX2: ## %bb.0: ## %entry ; X32-AVX2: ## %bb.0: ## %entry
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X32-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X32-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0
; X32-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2 ; X32-AVX2-NEXT: vandps %ymm0, %ymm1, %ymm0
; X32-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm0
; X32-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm2
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X32-AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0
; X32-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X32-AVX2-NEXT: retl ; X32-AVX2-NEXT: retl
; ;
; X64-AVX2-LABEL: three_ands: ; X64-AVX2-LABEL: three_ands:
; X64-AVX2: ## %bb.0: ## %entry ; X64-AVX2: ## %bb.0: ## %entry
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X64-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X64-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0
; X64-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2 ; X64-AVX2-NEXT: vandps %ymm0, %ymm1, %ymm0
; X64-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm0
; X64-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm2
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X64-AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0
; X64-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X64-AVX2-NEXT: retq ; X64-AVX2-NEXT: retq
entry: entry:
%cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01> %cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01>
%cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> %cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
%and8 = and <8 x i1> %cmp, %cmp1 %and8 = and <8 x i1> %cmp, %cmp1
%cmp3 = fcmp une <8 x float> %x, zeroinitializer %cmp3 = fcmp une <8 x float> %x, zeroinitializer
%and59 = and <8 x i1> %and8, %cmp3 %and59 = and <8 x i1> %and8, %cmp3
%and5 = sext <8 x i1> %and59 to <8 x i32> %and5 = sext <8 x i1> %and59 to <8 x i32>
ret <8 x i32> %and5 ret <8 x i32> %and5
} }
define <8 x i32> @four_ands(<8 x float> %x) { define <8 x i32> @four_ands(<8 x float> %x) {
; X32-LABEL: four_ands: ; X32-LABEL: four_ands:
; X32: ## %bb.0: ## %entry ; X32: ## %bb.0: ## %entry
; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-NEXT: vcmpltps LCPI5_1, %ymm0, %ymm2 ; X32-NEXT: vcmpltps LCPI5_1, %ymm0, %ymm2
; X32-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X32-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X32-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X32-NEXT: vandps %ymm3, %ymm2, %ymm2
; X32-NEXT: vpxor %xmm2, %xmm2, %xmm2
; X32-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X32-NEXT: vextractf128 $1, %ymm2, %xmm3
; X32-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X32-NEXT: vcmpneqps LCPI5_2, %ymm0, %ymm0 ; X32-NEXT: vcmpneqps LCPI5_2, %ymm0, %ymm0
; X32-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X32-NEXT: vandps %ymm0, %ymm2, %ymm0
; X32-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X32-NEXT: vandps %ymm0, %ymm1, %ymm0
; X32-NEXT: vpand %xmm0, %xmm2, %xmm0
; X32-NEXT: vpand %xmm0, %xmm1, %xmm0
; X32-NEXT: vpmovsxwd %xmm0, %xmm1
; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X32-NEXT: vpmovsxwd %xmm0, %xmm0
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: four_ands: ; X64-LABEL: four_ands:
; X64: ## %bb.0: ## %entry ; X64: ## %bb.0: ## %entry
; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2 ; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2
; X64-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X64-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X64-NEXT: vandps %ymm3, %ymm2, %ymm2
; X64-NEXT: vpxor %xmm2, %xmm2, %xmm2
; X64-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X64-NEXT: vextractf128 $1, %ymm2, %xmm3
; X64-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0 ; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X64-NEXT: vandps %ymm0, %ymm2, %ymm0
; X64-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X64-NEXT: vandps %ymm0, %ymm1, %ymm0
; X64-NEXT: vpand %xmm0, %xmm2, %xmm0
; X64-NEXT: vpand %xmm0, %xmm1, %xmm0
; X64-NEXT: vpmovsxwd %xmm0, %xmm1
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X64-NEXT: vpmovsxwd %xmm0, %xmm0
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X32-AVX2-LABEL: four_ands: ; X32-AVX2-LABEL: four_ands:
; X32-AVX2: ## %bb.0: ## %entry ; X32-AVX2: ## %bb.0: ## %entry
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X32-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X32-AVX2-NEXT: vandps %ymm3, %ymm2, %ymm2
; X32-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X32-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vextractf128 $1, %ymm2, %xmm3
; X32-AVX2-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X32-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X32-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0
; X32-AVX2-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X32-AVX2-NEXT: vandps %ymm0, %ymm1, %ymm0
; X32-AVX2-NEXT: vpand %xmm0, %xmm2, %xmm0
; X32-AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0
; X32-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X32-AVX2-NEXT: retl ; X32-AVX2-NEXT: retl
; ;
; X64-AVX2-LABEL: four_ands: ; X64-AVX2-LABEL: four_ands:
; X64-AVX2: ## %bb.0: ## %entry ; X64-AVX2: ## %bb.0: ## %entry
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X64-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X64-AVX2-NEXT: vandps %ymm3, %ymm2, %ymm2
; X64-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X64-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vextractf128 $1, %ymm2, %xmm3
; X64-AVX2-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X64-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X64-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0
; X64-AVX2-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X64-AVX2-NEXT: vandps %ymm0, %ymm1, %ymm0
; X64-AVX2-NEXT: vpand %xmm0, %xmm2, %xmm0
; X64-AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0
; X64-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X64-AVX2-NEXT: retq ; X64-AVX2-NEXT: retq
entry: entry:
%cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01> %cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01>
%cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> %cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
%and12 = and <8 x i1> %cmp, %cmp1 %and12 = and <8 x i1> %cmp, %cmp1
%cmp3 = fcmp une <8 x float> %x, zeroinitializer %cmp3 = fcmp une <8 x float> %x, zeroinitializer
%and513 = and <8 x i1> %and12, %cmp3 %and513 = and <8 x i1> %and12, %cmp3
%cmp6 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000> %cmp6 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>
%and814 = and <8 x i1> %and513, %cmp6 %and814 = and <8 x i1> %and513, %cmp6
%and8 = sext <8 x i1> %and814 to <8 x i32> %and8 = sext <8 x i1> %and814 to <8 x i32>
ret <8 x i32> %and8 ret <8 x i32> %and8
} }
define <8 x i32> @five_ands(<8 x float> %x) { define <8 x i32> @five_ands(<8 x float> %x) {
; X32-LABEL: five_ands: ; X32-LABEL: five_ands:
; X32: ## %bb.0: ## %entry ; X32: ## %bb.0: ## %entry
; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-NEXT: vcmpltps LCPI6_1, %ymm0, %ymm2 ; X32-NEXT: vcmpltps LCPI6_1, %ymm0, %ymm2
; X32-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X32-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X32-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X32-NEXT: vandps %ymm3, %ymm2, %ymm2
; X32-NEXT: vpxor %xmm2, %xmm2, %xmm2
; X32-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X32-NEXT: vextractf128 $1, %ymm2, %xmm3
; X32-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X32-NEXT: vcmpneqps LCPI6_2, %ymm0, %ymm3 ; X32-NEXT: vcmpneqps LCPI6_2, %ymm0, %ymm3
; X32-NEXT: vextractf128 $1, %ymm3, %xmm4 ; X32-NEXT: vandps %ymm3, %ymm2, %ymm2
; X32-NEXT: vpackssdw %xmm4, %xmm3, %xmm3
; X32-NEXT: vpand %xmm3, %xmm2, %xmm2
; X32-NEXT: vcmpneqps LCPI6_3, %ymm0, %ymm0 ; X32-NEXT: vcmpneqps LCPI6_3, %ymm0, %ymm0
; X32-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X32-NEXT: vandps %ymm0, %ymm2, %ymm0
; X32-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X32-NEXT: vandps %ymm0, %ymm1, %ymm0
; X32-NEXT: vpand %xmm0, %xmm2, %xmm0
; X32-NEXT: vpand %xmm0, %xmm1, %xmm0
; X32-NEXT: vpmovsxwd %xmm0, %xmm1
; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X32-NEXT: vpmovsxwd %xmm0, %xmm0
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: five_ands: ; X64-LABEL: five_ands:
; X64: ## %bb.0: ## %entry ; X64: ## %bb.0: ## %entry
; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2 ; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2
; X64-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X64-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X64-NEXT: vandps %ymm3, %ymm2, %ymm2
; X64-NEXT: vpxor %xmm2, %xmm2, %xmm2
; X64-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X64-NEXT: vextractf128 $1, %ymm2, %xmm3
; X64-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm3 ; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm3
; X64-NEXT: vextractf128 $1, %ymm3, %xmm4 ; X64-NEXT: vandps %ymm3, %ymm2, %ymm2
; X64-NEXT: vpackssdw %xmm4, %xmm3, %xmm3
; X64-NEXT: vpand %xmm3, %xmm2, %xmm2
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0 ; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X64-NEXT: vandps %ymm0, %ymm2, %ymm0
; X64-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X64-NEXT: vandps %ymm0, %ymm1, %ymm0
; X64-NEXT: vpand %xmm0, %xmm2, %xmm0
; X64-NEXT: vpand %xmm0, %xmm1, %xmm0
; X64-NEXT: vpmovsxwd %xmm0, %xmm1
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X64-NEXT: vpmovsxwd %xmm0, %xmm0
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X32-AVX2-LABEL: five_ands: ; X32-AVX2-LABEL: five_ands:
; X32-AVX2: ## %bb.0: ## %entry ; X32-AVX2: ## %bb.0: ## %entry
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X32-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X32-AVX2-NEXT: vandps %ymm3, %ymm2, %ymm2
; X32-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X32-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vextractf128 $1, %ymm2, %xmm3
; X32-AVX2-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-AVX2-NEXT: vextractf128 $1, %ymm3, %xmm4 ; X32-AVX2-NEXT: vandps %ymm3, %ymm2, %ymm2
; X32-AVX2-NEXT: vpackssdw %xmm4, %xmm3, %xmm3
; X32-AVX2-NEXT: vpand %xmm3, %xmm2, %xmm2
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X32-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X32-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0
; X32-AVX2-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X32-AVX2-NEXT: vandps %ymm0, %ymm1, %ymm0
; X32-AVX2-NEXT: vpand %xmm0, %xmm2, %xmm0
; X32-AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0
; X32-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X32-AVX2-NEXT: retl ; X32-AVX2-NEXT: retl
; ;
; X64-AVX2-LABEL: five_ands: ; X64-AVX2-LABEL: five_ands:
; X64-AVX2: ## %bb.0: ## %entry ; X64-AVX2: ## %bb.0: ## %entry
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X64-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X64-AVX2-NEXT: vandps %ymm3, %ymm2, %ymm2
; X64-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X64-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vextractf128 $1, %ymm2, %xmm3
; X64-AVX2-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-AVX2-NEXT: vextractf128 $1, %ymm3, %xmm4 ; X64-AVX2-NEXT: vandps %ymm3, %ymm2, %ymm2
; X64-AVX2-NEXT: vpackssdw %xmm4, %xmm3, %xmm3
; X64-AVX2-NEXT: vpand %xmm3, %xmm2, %xmm2
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X64-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X64-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0
; X64-AVX2-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X64-AVX2-NEXT: vandps %ymm0, %ymm1, %ymm0
; X64-AVX2-NEXT: vpand %xmm0, %xmm2, %xmm0
; X64-AVX2-NEXT: vpand %xmm0, %xmm1, %xmm0
; X64-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X64-AVX2-NEXT: retq ; X64-AVX2-NEXT: retq
entry: entry:
%cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01> %cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01>
%cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> %cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
%and16 = and <8 x i1> %cmp, %cmp1 %and16 = and <8 x i1> %cmp, %cmp1
%cmp3 = fcmp une <8 x float> %x, zeroinitializer %cmp3 = fcmp une <8 x float> %x, zeroinitializer
%and517 = and <8 x i1> %and16, %cmp3 %and517 = and <8 x i1> %and16, %cmp3
%cmp6 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000> %cmp6 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>
▲ Show 20 Lines • Show All 47 Lines • ▼ Show 20 Lines
} }
define <8 x i32> @three_or(<8 x float> %x) { define <8 x i32> @three_or(<8 x float> %x) {
; X32-LABEL: three_or: ; X32-LABEL: three_or:
; X32: ## %bb.0: ## %entry ; X32: ## %bb.0: ## %entry
; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-NEXT: vcmpltps LCPI8_1, %ymm0, %ymm2 ; X32-NEXT: vcmpltps LCPI8_1, %ymm0, %ymm2
; X32-NEXT: vorps %ymm2, %ymm1, %ymm1 ; X32-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X32-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X32-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X32-NEXT: vorps %ymm0, %ymm2, %ymm0
; X32-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; X32-NEXT: vorps %ymm0, %ymm1, %ymm0
; X32-NEXT: vcmpneqps %ymm2, %ymm0, %ymm0
; X32-NEXT: vextractf128 $1, %ymm0, %xmm2
; X32-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X32-NEXT: vpor %xmm0, %xmm1, %xmm0
; X32-NEXT: vpmovsxwd %xmm0, %xmm1
; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X32-NEXT: vpmovsxwd %xmm0, %xmm0
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: three_or: ; X64-LABEL: three_or:
; X64: ## %bb.0: ## %entry ; X64: ## %bb.0: ## %entry
; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2 ; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2
; X64-NEXT: vorps %ymm2, %ymm1, %ymm1 ; X64-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X64-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X64-NEXT: vorps %ymm0, %ymm2, %ymm0
; X64-NEXT: vpxor %xmm2, %xmm2, %xmm2 ; X64-NEXT: vorps %ymm0, %ymm1, %ymm0
; X64-NEXT: vcmpneqps %ymm2, %ymm0, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm2
; X64-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X64-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-NEXT: vpmovsxwd %xmm0, %xmm1
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X64-NEXT: vpmovsxwd %xmm0, %xmm0
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X32-AVX2-LABEL: three_or: ; X32-AVX2-LABEL: three_or:
; X32-AVX2: ## %bb.0: ## %entry ; X32-AVX2: ## %bb.0: ## %entry
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vorps %ymm2, %ymm1, %ymm1 ; X32-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X32-AVX2-NEXT: vorps %ymm0, %ymm2, %ymm0
; X32-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2 ; X32-AVX2-NEXT: vorps %ymm0, %ymm1, %ymm0
; X32-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm0
; X32-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm2
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X32-AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
; X32-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X32-AVX2-NEXT: retl ; X32-AVX2-NEXT: retl
; ;
; X64-AVX2-LABEL: three_or: ; X64-AVX2-LABEL: three_or:
; X64-AVX2: ## %bb.0: ## %entry ; X64-AVX2: ## %bb.0: ## %entry
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vorps %ymm2, %ymm1, %ymm1 ; X64-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X64-AVX2-NEXT: vorps %ymm0, %ymm2, %ymm0
; X64-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2 ; X64-AVX2-NEXT: vorps %ymm0, %ymm1, %ymm0
; X64-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm0
; X64-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm2
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X64-AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X64-AVX2-NEXT: retq ; X64-AVX2-NEXT: retq
entry: entry:
%cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01> %cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01>
%cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> %cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
%or8 = or <8 x i1> %cmp, %cmp1 %or8 = or <8 x i1> %cmp, %cmp1
%cmp3 = fcmp une <8 x float> %x, zeroinitializer %cmp3 = fcmp une <8 x float> %x, zeroinitializer
%or59 = or <8 x i1> %or8, %cmp3 %or59 = or <8 x i1> %or8, %cmp3
%or5 = sext <8 x i1> %or59 to <8 x i32> %or5 = sext <8 x i1> %or59 to <8 x i32>
ret <8 x i32> %or5 ret <8 x i32> %or5
} }
; Function Attrs: norecurse nounwind readnone ssp uwtable ; Function Attrs: norecurse nounwind readnone ssp uwtable
define <8 x i32> @four_or(<8 x float> %x) { define <8 x i32> @four_or(<8 x float> %x) {
; X32-LABEL: four_or: ; X32-LABEL: four_or:
; X32: ## %bb.0: ## %entry ; X32: ## %bb.0: ## %entry
; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-NEXT: vcmpltps LCPI9_1, %ymm0, %ymm2 ; X32-NEXT: vcmpltps LCPI9_1, %ymm0, %ymm2
; X32-NEXT: vorps %ymm2, %ymm1, %ymm1 ; X32-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X32-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X32-NEXT: vorps %ymm3, %ymm2, %ymm2
; X32-NEXT: vpxor %xmm2, %xmm2, %xmm2
; X32-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X32-NEXT: vextractf128 $1, %ymm2, %xmm3
; X32-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X32-NEXT: vcmpneqps LCPI9_2, %ymm0, %ymm0 ; X32-NEXT: vcmpneqps LCPI9_2, %ymm0, %ymm0
; X32-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X32-NEXT: vorps %ymm0, %ymm2, %ymm0
; X32-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X32-NEXT: vorps %ymm0, %ymm1, %ymm0
; X32-NEXT: vpor %xmm0, %xmm2, %xmm0
; X32-NEXT: vpor %xmm0, %xmm1, %xmm0
; X32-NEXT: vpmovsxwd %xmm0, %xmm1
; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X32-NEXT: vpmovsxwd %xmm0, %xmm0
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: four_or: ; X64-LABEL: four_or:
; X64: ## %bb.0: ## %entry ; X64: ## %bb.0: ## %entry
; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2 ; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2
; X64-NEXT: vorps %ymm2, %ymm1, %ymm1 ; X64-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X64-NEXT: vorps %ymm3, %ymm2, %ymm2
; X64-NEXT: vpxor %xmm2, %xmm2, %xmm2
; X64-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X64-NEXT: vextractf128 $1, %ymm2, %xmm3
; X64-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0 ; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X64-NEXT: vorps %ymm0, %ymm2, %ymm0
; X64-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X64-NEXT: vorps %ymm0, %ymm1, %ymm0
; X64-NEXT: vpor %xmm0, %xmm2, %xmm0
; X64-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-NEXT: vpmovsxwd %xmm0, %xmm1
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X64-NEXT: vpmovsxwd %xmm0, %xmm0
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X32-AVX2-LABEL: four_or: ; X32-AVX2-LABEL: four_or:
; X32-AVX2: ## %bb.0: ## %entry ; X32-AVX2: ## %bb.0: ## %entry
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vorps %ymm2, %ymm1, %ymm1 ; X32-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X32-AVX2-NEXT: vorps %ymm3, %ymm2, %ymm2
; X32-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X32-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vextractf128 $1, %ymm2, %xmm3
; X32-AVX2-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X32-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X32-AVX2-NEXT: vorps %ymm0, %ymm2, %ymm0
; X32-AVX2-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X32-AVX2-NEXT: vorps %ymm0, %ymm1, %ymm0
; X32-AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
; X32-AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
; X32-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X32-AVX2-NEXT: retl ; X32-AVX2-NEXT: retl
; ;
; X64-AVX2-LABEL: four_or: ; X64-AVX2-LABEL: four_or:
; X64-AVX2: ## %bb.0: ## %entry ; X64-AVX2: ## %bb.0: ## %entry
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vorps %ymm2, %ymm1, %ymm1 ; X64-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X64-AVX2-NEXT: vorps %ymm3, %ymm2, %ymm2
; X64-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X64-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vextractf128 $1, %ymm2, %xmm3
; X64-AVX2-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X64-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X64-AVX2-NEXT: vorps %ymm0, %ymm2, %ymm0
; X64-AVX2-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X64-AVX2-NEXT: vorps %ymm0, %ymm1, %ymm0
; X64-AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
; X64-AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X64-AVX2-NEXT: retq ; X64-AVX2-NEXT: retq
entry: entry:
%cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01> %cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01>
%cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> %cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
%or12 = or <8 x i1> %cmp, %cmp1 %or12 = or <8 x i1> %cmp, %cmp1
%cmp3 = fcmp une <8 x float> %x, zeroinitializer %cmp3 = fcmp une <8 x float> %x, zeroinitializer
%or513 = or <8 x i1> %or12, %cmp3 %or513 = or <8 x i1> %or12, %cmp3
%cmp6 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000> %cmp6 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>
%or814 = or <8 x i1> %or513, %cmp6 %or814 = or <8 x i1> %or513, %cmp6
%or8 = sext <8 x i1> %or814 to <8 x i32> %or8 = sext <8 x i1> %or814 to <8 x i32>
ret <8 x i32> %or8 ret <8 x i32> %or8
} }
; Function Attrs: norecurse nounwind readnone ssp uwtable ; Function Attrs: norecurse nounwind readnone ssp uwtable
define <8 x i32> @five_or(<8 x float> %x) { define <8 x i32> @five_or(<8 x float> %x) {
; X32-LABEL: five_or: ; X32-LABEL: five_or:
; X32: ## %bb.0: ## %entry ; X32: ## %bb.0: ## %entry
; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-NEXT: vcmpltps LCPI10_1, %ymm0, %ymm2 ; X32-NEXT: vcmpltps LCPI10_1, %ymm0, %ymm2
; X32-NEXT: vorps %ymm2, %ymm1, %ymm1 ; X32-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X32-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X32-NEXT: vorps %ymm3, %ymm2, %ymm2
; X32-NEXT: vpxor %xmm2, %xmm2, %xmm2
; X32-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X32-NEXT: vextractf128 $1, %ymm2, %xmm3
; X32-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X32-NEXT: vcmpneqps LCPI10_2, %ymm0, %ymm3 ; X32-NEXT: vcmpneqps LCPI10_2, %ymm0, %ymm3
; X32-NEXT: vextractf128 $1, %ymm3, %xmm4 ; X32-NEXT: vorps %ymm3, %ymm2, %ymm2
; X32-NEXT: vpackssdw %xmm4, %xmm3, %xmm3
; X32-NEXT: vpor %xmm3, %xmm2, %xmm2
; X32-NEXT: vcmpneqps LCPI10_3, %ymm0, %ymm0 ; X32-NEXT: vcmpneqps LCPI10_3, %ymm0, %ymm0
; X32-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X32-NEXT: vorps %ymm0, %ymm2, %ymm0
; X32-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X32-NEXT: vorps %ymm0, %ymm1, %ymm0
; X32-NEXT: vpor %xmm0, %xmm2, %xmm0
; X32-NEXT: vpor %xmm0, %xmm1, %xmm0
; X32-NEXT: vpmovsxwd %xmm0, %xmm1
; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X32-NEXT: vpmovsxwd %xmm0, %xmm0
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: five_or: ; X64-LABEL: five_or:
; X64: ## %bb.0: ## %entry ; X64: ## %bb.0: ## %entry
; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2 ; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2
; X64-NEXT: vorps %ymm2, %ymm1, %ymm1 ; X64-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X64-NEXT: vorps %ymm3, %ymm2, %ymm2
; X64-NEXT: vpxor %xmm2, %xmm2, %xmm2
; X64-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X64-NEXT: vextractf128 $1, %ymm2, %xmm3
; X64-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm3 ; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm3
; X64-NEXT: vextractf128 $1, %ymm3, %xmm4 ; X64-NEXT: vorps %ymm3, %ymm2, %ymm2
; X64-NEXT: vpackssdw %xmm4, %xmm3, %xmm3
; X64-NEXT: vpor %xmm3, %xmm2, %xmm2
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0 ; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X64-NEXT: vorps %ymm0, %ymm2, %ymm0
; X64-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X64-NEXT: vorps %ymm0, %ymm1, %ymm0
; X64-NEXT: vpor %xmm0, %xmm2, %xmm0
; X64-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-NEXT: vpmovsxwd %xmm0, %xmm1
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X64-NEXT: vpmovsxwd %xmm0, %xmm0
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X32-AVX2-LABEL: five_or: ; X32-AVX2-LABEL: five_or:
; X32-AVX2: ## %bb.0: ## %entry ; X32-AVX2: ## %bb.0: ## %entry
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vorps %ymm2, %ymm1, %ymm1 ; X32-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X32-AVX2-NEXT: vorps %ymm3, %ymm2, %ymm2
; X32-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X32-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vextractf128 $1, %ymm2, %xmm3
; X32-AVX2-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-AVX2-NEXT: vextractf128 $1, %ymm3, %xmm4 ; X32-AVX2-NEXT: vorps %ymm3, %ymm2, %ymm2
; X32-AVX2-NEXT: vpackssdw %xmm4, %xmm3, %xmm3
; X32-AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X32-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X32-AVX2-NEXT: vorps %ymm0, %ymm2, %ymm0
; X32-AVX2-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X32-AVX2-NEXT: vorps %ymm0, %ymm1, %ymm0
; X32-AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
; X32-AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
; X32-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X32-AVX2-NEXT: retl ; X32-AVX2-NEXT: retl
; ;
; X64-AVX2-LABEL: five_or: ; X64-AVX2-LABEL: five_or:
; X64-AVX2: ## %bb.0: ## %entry ; X64-AVX2: ## %bb.0: ## %entry
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vorps %ymm2, %ymm1, %ymm1 ; X64-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X64-AVX2-NEXT: vorps %ymm3, %ymm2, %ymm2
; X64-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X64-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vextractf128 $1, %ymm2, %xmm3
; X64-AVX2-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-AVX2-NEXT: vextractf128 $1, %ymm3, %xmm4 ; X64-AVX2-NEXT: vorps %ymm3, %ymm2, %ymm2
; X64-AVX2-NEXT: vpackssdw %xmm4, %xmm3, %xmm3
; X64-AVX2-NEXT: vpor %xmm3, %xmm2, %xmm2
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X64-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X64-AVX2-NEXT: vorps %ymm0, %ymm2, %ymm0
; X64-AVX2-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X64-AVX2-NEXT: vorps %ymm0, %ymm1, %ymm0
; X64-AVX2-NEXT: vpor %xmm0, %xmm2, %xmm0
; X64-AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X64-AVX2-NEXT: retq ; X64-AVX2-NEXT: retq
entry: entry:
%cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01> %cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01>
%cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> %cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
%or16 = or <8 x i1> %cmp, %cmp1 %or16 = or <8 x i1> %cmp, %cmp1
%cmp3 = fcmp une <8 x float> %x, zeroinitializer %cmp3 = fcmp une <8 x float> %x, zeroinitializer
%or517 = or <8 x i1> %or16, %cmp3 %or517 = or <8 x i1> %or16, %cmp3
%cmp6 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000> %cmp6 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>
▲ Show 20 Lines • Show All 62 Lines • ▼ Show 20 Lines
define <8 x i32> @four_or_and(<8 x float> %x) { define <8 x i32> @four_or_and(<8 x float> %x) {
; X32-LABEL: four_or_and: ; X32-LABEL: four_or_and:
; X32: ## %bb.0: ## %entry ; X32: ## %bb.0: ## %entry
; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-NEXT: vcmpltps LCPI12_1, %ymm0, %ymm2 ; X32-NEXT: vcmpltps LCPI12_1, %ymm0, %ymm2
; X32-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X32-NEXT: vandps %ymm2, %ymm1, %ymm1
; X32-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X32-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X32-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; X32-NEXT: vpxor %xmm2, %xmm2, %xmm2
; X32-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2 ; X32-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X32-NEXT: vcmpneqps LCPI12_2, %ymm0, %ymm0 ; X32-NEXT: vcmpneqps LCPI12_2, %ymm0, %ymm0
; X32-NEXT: vandps %ymm0, %ymm2, %ymm0 ; X32-NEXT: vandps %ymm0, %ymm2, %ymm0
; X32-NEXT: vextractf128 $1, %ymm0, %xmm2 ; X32-NEXT: vorps %ymm0, %ymm1, %ymm0
; X32-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X32-NEXT: vpor %xmm0, %xmm1, %xmm0
; X32-NEXT: vpmovsxwd %xmm0, %xmm1
; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X32-NEXT: vpmovsxwd %xmm0, %xmm0
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: four_or_and: ; X64-LABEL: four_or_and:
; X64: ## %bb.0: ## %entry ; X64: ## %bb.0: ## %entry
; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2 ; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2
; X64-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X64-NEXT: vandps %ymm2, %ymm1, %ymm1
; X64-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X64-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; X64-NEXT: vpxor %xmm2, %xmm2, %xmm2
; X64-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2 ; X64-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0 ; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0
; X64-NEXT: vandps %ymm0, %ymm2, %ymm0 ; X64-NEXT: vandps %ymm0, %ymm2, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm2 ; X64-NEXT: vorps %ymm0, %ymm1, %ymm0
; X64-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X64-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-NEXT: vpmovsxwd %xmm0, %xmm1
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X64-NEXT: vpmovsxwd %xmm0, %xmm0
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X32-AVX2-LABEL: four_or_and: ; X32-AVX2-LABEL: four_or_and:
; X32-AVX2: ## %bb.0: ## %entry ; X32-AVX2: ## %bb.0: ## %entry
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X32-AVX2-NEXT: vandps %ymm2, %ymm1, %ymm1
; X32-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; X32-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2 ; X32-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X32-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2 ; X32-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X32-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0 ; X32-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0
; X32-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm2 ; X32-AVX2-NEXT: vorps %ymm0, %ymm1, %ymm0
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X32-AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
; X32-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X32-AVX2-NEXT: retl ; X32-AVX2-NEXT: retl
; ;
; X64-AVX2-LABEL: four_or_and: ; X64-AVX2-LABEL: four_or_and:
; X64-AVX2: ## %bb.0: ## %entry ; X64-AVX2: ## %bb.0: ## %entry
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X64-AVX2-NEXT: vandps %ymm2, %ymm1, %ymm1
; X64-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; X64-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2 ; X64-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X64-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2 ; X64-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X64-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0 ; X64-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0
; X64-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm2 ; X64-AVX2-NEXT: vorps %ymm0, %ymm1, %ymm0
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X64-AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X64-AVX2-NEXT: retq ; X64-AVX2-NEXT: retq
entry: entry:
%cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01> %cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01>
%cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> %cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
%and11 = and <8 x i1> %cmp, %cmp1 %and11 = and <8 x i1> %cmp, %cmp1
%cmp3 = fcmp une <8 x float> %x, zeroinitializer %cmp3 = fcmp une <8 x float> %x, zeroinitializer
%cmp5 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000> %cmp5 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>
%and712 = and <8 x i1> %cmp3, %cmp5 %and712 = and <8 x i1> %cmp3, %cmp5
%or13 = or <8 x i1> %and11, %and712 %or13 = or <8 x i1> %and11, %and712
%or = sext <8 x i1> %or13 to <8 x i32> %or = sext <8 x i1> %or13 to <8 x i32>
ret <8 x i32> %or ret <8 x i32> %or
} }
define <8 x i32> @five_or_and(<8 x float> %x) { define <8 x i32> @five_or_and(<8 x float> %x) {
; X32-LABEL: five_or_and: ; X32-LABEL: five_or_and:
; X32: ## %bb.0: ## %entry ; X32: ## %bb.0: ## %entry
; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-NEXT: vcmpltps LCPI13_1, %ymm0, %ymm2 ; X32-NEXT: vcmpltps LCPI13_1, %ymm0, %ymm2
; X32-NEXT: vxorps %xmm3, %xmm3, %xmm3 ; X32-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X32-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-NEXT: vandps %ymm3, %ymm2, %ymm2 ; X32-NEXT: vandps %ymm3, %ymm2, %ymm2
; X32-NEXT: vorps %ymm1, %ymm2, %ymm1 ; X32-NEXT: vcmpneqps LCPI13_2, %ymm0, %ymm3
; X32-NEXT: vextractf128 $1, %ymm1, %xmm2
; X32-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; X32-NEXT: vcmpneqps LCPI13_2, %ymm0, %ymm2
; X32-NEXT: vcmpneqps LCPI13_3, %ymm0, %ymm0 ; X32-NEXT: vcmpneqps LCPI13_3, %ymm0, %ymm0
; X32-NEXT: vandps %ymm0, %ymm2, %ymm0 ; X32-NEXT: vandps %ymm0, %ymm3, %ymm0
; X32-NEXT: vextractf128 $1, %ymm0, %xmm2 ; X32-NEXT: vorps %ymm0, %ymm1, %ymm0
; X32-NEXT: vpackssdw %xmm2, %xmm0, %xmm0 ; X32-NEXT: vorps %ymm0, %ymm2, %ymm0
; X32-NEXT: vpor %xmm0, %xmm1, %xmm0
; X32-NEXT: vpmovsxwd %xmm0, %xmm1
; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X32-NEXT: vpmovsxwd %xmm0, %xmm0
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: five_or_and: ; X64-LABEL: five_or_and:
; X64: ## %bb.0: ## %entry ; X64: ## %bb.0: ## %entry
; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2 ; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2
; X64-NEXT: vxorps %xmm3, %xmm3, %xmm3 ; X64-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X64-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-NEXT: vandps %ymm3, %ymm2, %ymm2 ; X64-NEXT: vandps %ymm3, %ymm2, %ymm2
; X64-NEXT: vorps %ymm1, %ymm2, %ymm1 ; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm3
; X64-NEXT: vextractf128 $1, %ymm1, %xmm2
; X64-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm2
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0 ; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0
; X64-NEXT: vandps %ymm0, %ymm2, %ymm0 ; X64-NEXT: vandps %ymm0, %ymm3, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm2 ; X64-NEXT: vorps %ymm0, %ymm1, %ymm0
; X64-NEXT: vpackssdw %xmm2, %xmm0, %xmm0 ; X64-NEXT: vorps %ymm0, %ymm2, %ymm0
; X64-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-NEXT: vpmovsxwd %xmm0, %xmm1
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X64-NEXT: vpmovsxwd %xmm0, %xmm0
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X32-AVX2-LABEL: five_or_and: ; X32-AVX2-LABEL: five_or_and:
; X32-AVX2: ## %bb.0: ## %entry ; X32-AVX2: ## %bb.0: ## %entry
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3 ; X32-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-AVX2-NEXT: vandps %ymm3, %ymm2, %ymm2 ; X32-AVX2-NEXT: vandps %ymm3, %ymm2, %ymm2
; X32-AVX2-NEXT: vorps %ymm1, %ymm2, %ymm1 ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X32-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm4 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X32-AVX2-NEXT: vcmpneqps %ymm4, %ymm0, %ymm0
; X32-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2 ; X32-AVX2-NEXT: vandps %ymm0, %ymm3, %ymm0
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1] ; X32-AVX2-NEXT: vorps %ymm0, %ymm1, %ymm0
; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0 ; X32-AVX2-NEXT: vorps %ymm0, %ymm2, %ymm0
; X32-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0
; X32-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm2
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X32-AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
; X32-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X32-AVX2-NEXT: retl ; X32-AVX2-NEXT: retl
; ;
; X64-AVX2-LABEL: five_or_and: ; X64-AVX2-LABEL: five_or_and:
; X64-AVX2: ## %bb.0: ## %entry ; X64-AVX2: ## %bb.0: ## %entry
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3 ; X64-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-AVX2-NEXT: vandps %ymm3, %ymm2, %ymm2 ; X64-AVX2-NEXT: vandps %ymm3, %ymm2, %ymm2
; X64-AVX2-NEXT: vorps %ymm1, %ymm2, %ymm1 ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X64-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1 ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm4 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X64-AVX2-NEXT: vcmpneqps %ymm4, %ymm0, %ymm0
; X64-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2 ; X64-AVX2-NEXT: vandps %ymm0, %ymm3, %ymm0
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1] ; X64-AVX2-NEXT: vorps %ymm0, %ymm1, %ymm0
; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0 ; X64-AVX2-NEXT: vorps %ymm0, %ymm2, %ymm0
; X64-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0
; X64-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm2
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X64-AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X64-AVX2-NEXT: retq ; X64-AVX2-NEXT: retq
entry: entry:
%cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01> %cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01>
%cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> %cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
%cmp3 = fcmp une <8 x float> %x, zeroinitializer %cmp3 = fcmp une <8 x float> %x, zeroinitializer
%and15 = and <8 x i1> %cmp1, %cmp3 %and15 = and <8 x i1> %cmp1, %cmp3
%or16 = or <8 x i1> %and15, %cmp %or16 = or <8 x i1> %and15, %cmp
%cmp5 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000> %cmp5 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>
%cmp7 = fcmp une <8 x float> %x, <float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000> %cmp7 = fcmp une <8 x float> %x, <float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000>
%and917 = and <8 x i1> %cmp5, %cmp7 %and917 = and <8 x i1> %cmp5, %cmp7
%or1018 = or <8 x i1> %or16, %and917 %or1018 = or <8 x i1> %or16, %and917
%or10 = sext <8 x i1> %or1018 to <8 x i32> %or10 = sext <8 x i1> %or1018 to <8 x i32>
ret <8 x i32> %or10 ret <8 x i32> %or10
} }
define <8 x i32> @four_or_and_xor(<8 x float> %x) { define <8 x i32> @four_or_and_xor(<8 x float> %x) {
; X32-LABEL: four_or_and_xor: ; X32-LABEL: four_or_and_xor:
; X32: ## %bb.0: ## %entry ; X32: ## %bb.0: ## %entry
; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-NEXT: vcmpltps LCPI14_1, %ymm0, %ymm2 ; X32-NEXT: vcmpltps LCPI14_1, %ymm0, %ymm2
; X32-NEXT: vxorps %ymm2, %ymm1, %ymm1 ; X32-NEXT: vxorps %ymm2, %ymm1, %ymm1
; X32-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X32-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X32-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; X32-NEXT: vpxor %xmm2, %xmm2, %xmm2
; X32-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2 ; X32-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X32-NEXT: vcmpneqps LCPI14_2, %ymm0, %ymm0 ; X32-NEXT: vcmpneqps LCPI14_2, %ymm0, %ymm0
; X32-NEXT: vandps %ymm0, %ymm2, %ymm0 ; X32-NEXT: vandps %ymm0, %ymm2, %ymm0
; X32-NEXT: vextractf128 $1, %ymm0, %xmm2 ; X32-NEXT: vorps %ymm0, %ymm1, %ymm0
; X32-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X32-NEXT: vpor %xmm0, %xmm1, %xmm0
; X32-NEXT: vpmovsxwd %xmm0, %xmm1
; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X32-NEXT: vpmovsxwd %xmm0, %xmm0
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: four_or_and_xor: ; X64-LABEL: four_or_and_xor:
; X64: ## %bb.0: ## %entry ; X64: ## %bb.0: ## %entry
; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2 ; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2
; X64-NEXT: vxorps %ymm2, %ymm1, %ymm1 ; X64-NEXT: vxorps %ymm2, %ymm1, %ymm1
; X64-NEXT: vextractf128 $1, %ymm1, %xmm2 ; X64-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X64-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; X64-NEXT: vpxor %xmm2, %xmm2, %xmm2
; X64-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2 ; X64-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0 ; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0
; X64-NEXT: vandps %ymm0, %ymm2, %ymm0 ; X64-NEXT: vandps %ymm0, %ymm2, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm2 ; X64-NEXT: vorps %ymm0, %ymm1, %ymm0
; X64-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X64-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-NEXT: vpmovsxwd %xmm0, %xmm1
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X64-NEXT: vpmovsxwd %xmm0, %xmm0
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X32-AVX2-LABEL: four_or_and_xor: ; X32-AVX2-LABEL: four_or_and_xor:
; X32-AVX2: ## %bb.0: ## %entry ; X32-AVX2: ## %bb.0: ## %entry
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vxorps %ymm2, %ymm1, %ymm1 ; X32-AVX2-NEXT: vxorps %ymm2, %ymm1, %ymm1
; X32-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; X32-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2 ; X32-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X32-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2 ; X32-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X32-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0 ; X32-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0
; X32-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm2 ; X32-AVX2-NEXT: vorps %ymm0, %ymm1, %ymm0
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X32-AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
; X32-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X32-AVX2-NEXT: retl ; X32-AVX2-NEXT: retl
; ;
; X64-AVX2-LABEL: four_or_and_xor: ; X64-AVX2-LABEL: four_or_and_xor:
; X64-AVX2: ## %bb.0: ## %entry ; X64-AVX2: ## %bb.0: ## %entry
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vxorps %ymm2, %ymm1, %ymm1 ; X64-AVX2-NEXT: vxorps %ymm2, %ymm1, %ymm1
; X64-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; X64-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2 ; X64-AVX2-NEXT: vxorps %xmm2, %xmm2, %xmm2
; X64-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2 ; X64-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm0
; X64-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0 ; X64-AVX2-NEXT: vandps %ymm0, %ymm2, %ymm0
; X64-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm2 ; X64-AVX2-NEXT: vorps %ymm0, %ymm1, %ymm0
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X64-AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X64-AVX2-NEXT: retq ; X64-AVX2-NEXT: retq
entry: entry:
%cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01> %cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01>
%cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> %cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
%xor10 = xor <8 x i1> %cmp, %cmp1 %xor10 = xor <8 x i1> %cmp, %cmp1
%cmp3 = fcmp une <8 x float> %x, zeroinitializer %cmp3 = fcmp une <8 x float> %x, zeroinitializer
%cmp5 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000> %cmp5 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>
%and11 = and <8 x i1> %cmp3, %cmp5 %and11 = and <8 x i1> %cmp3, %cmp5
%or12 = or <8 x i1> %xor10, %and11 %or12 = or <8 x i1> %xor10, %and11
%or = sext <8 x i1> %or12 to <8 x i32> %or = sext <8 x i1> %or12 to <8 x i32>
ret <8 x i32> %or ret <8 x i32> %or
} }
; Function Attrs: norecurse nounwind readnone ssp uwtable ; Function Attrs: norecurse nounwind readnone ssp uwtable
define <8 x i32> @five_or_and_xor(<8 x float> %x) { define <8 x i32> @five_or_and_xor(<8 x float> %x) {
; X32-LABEL: five_or_and_xor: ; X32-LABEL: five_or_and_xor:
; X32: ## %bb.0: ## %entry ; X32: ## %bb.0: ## %entry
; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-NEXT: vextractf128 $1, %ymm1, %xmm2
; X32-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; X32-NEXT: vcmpltps LCPI15_1, %ymm0, %ymm2 ; X32-NEXT: vcmpltps LCPI15_1, %ymm0, %ymm2
; X32-NEXT: vxorps %xmm3, %xmm3, %xmm3 ; X32-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X32-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-NEXT: vxorps %ymm3, %ymm2, %ymm2 ; X32-NEXT: vcmpneqps LCPI15_2, %ymm0, %ymm4
; X32-NEXT: vextractf128 $1, %ymm2, %xmm3
; X32-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X32-NEXT: vcmpneqps LCPI15_2, %ymm0, %ymm3
; X32-NEXT: vcmpneqps LCPI15_3, %ymm0, %ymm0 ; X32-NEXT: vcmpneqps LCPI15_3, %ymm0, %ymm0
; X32-NEXT: vandps %ymm0, %ymm3, %ymm0 ; X32-NEXT: vandps %ymm0, %ymm4, %ymm0
; X32-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X32-NEXT: vxorps %ymm0, %ymm3, %ymm0
; X32-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X32-NEXT: vxorps %ymm0, %ymm2, %ymm0
; X32-NEXT: vpxor %xmm0, %xmm2, %xmm0 ; X32-NEXT: vorps %ymm1, %ymm0, %ymm0
; X32-NEXT: vpor %xmm1, %xmm0, %xmm0
; X32-NEXT: vpmovsxwd %xmm0, %xmm1
; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X32-NEXT: vpmovsxwd %xmm0, %xmm0
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: five_or_and_xor: ; X64-LABEL: five_or_and_xor:
; X64: ## %bb.0: ## %entry ; X64: ## %bb.0: ## %entry
; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-NEXT: vextractf128 $1, %ymm1, %xmm2
; X64-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2 ; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2
; X64-NEXT: vxorps %xmm3, %xmm3, %xmm3 ; X64-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X64-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-NEXT: vxorps %ymm3, %ymm2, %ymm2 ; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm4
; X64-NEXT: vextractf128 $1, %ymm2, %xmm3
; X64-NEXT: vpackssdw %xmm3, %xmm2, %xmm2
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm3
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0 ; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0
; X64-NEXT: vandps %ymm0, %ymm3, %ymm0 ; X64-NEXT: vandps %ymm0, %ymm4, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm3 ; X64-NEXT: vxorps %ymm0, %ymm3, %ymm0
; X64-NEXT: vpackssdw %xmm3, %xmm0, %xmm0 ; X64-NEXT: vxorps %ymm0, %ymm2, %ymm0
; X64-NEXT: vpxor %xmm0, %xmm2, %xmm0 ; X64-NEXT: vorps %ymm1, %ymm0, %ymm0
; X64-NEXT: vpor %xmm1, %xmm0, %xmm0
; X64-NEXT: vpmovsxwd %xmm0, %xmm1
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X64-NEXT: vpmovsxwd %xmm0, %xmm0
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X32-AVX2-LABEL: five_or_and_xor: ; X32-AVX2-LABEL: five_or_and_xor:
; X32-AVX2: ## %bb.0: ## %entry ; X32-AVX2: ## %bb.0: ## %entry
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3 ; X32-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-AVX2-NEXT: vxorps %ymm3, %ymm2, %ymm2 ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm4 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X32-AVX2-NEXT: vextractf128 $1, %ymm2, %xmm3 ; X32-AVX2-NEXT: vcmpneqps %ymm4, %ymm0, %ymm4
; X32-AVX2-NEXT: vpackssdw %xmm3, %xmm2, %xmm2 ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm5 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X32-AVX2-NEXT: vcmpneqps %ymm5, %ymm0, %ymm0
; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X32-AVX2-NEXT: vandps %ymm0, %ymm4, %ymm0
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm4 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1] ; X32-AVX2-NEXT: vxorps %ymm0, %ymm3, %ymm0
; X32-AVX2-NEXT: vcmpneqps %ymm4, %ymm0, %ymm0 ; X32-AVX2-NEXT: vxorps %ymm0, %ymm2, %ymm0
; X32-AVX2-NEXT: vandps %ymm0, %ymm3, %ymm0 ; X32-AVX2-NEXT: vorps %ymm1, %ymm0, %ymm0
; X32-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm3
; X32-AVX2-NEXT: vpackssdw %xmm3, %xmm0, %xmm0
; X32-AVX2-NEXT: vpxor %xmm0, %xmm2, %xmm0
; X32-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
; X32-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X32-AVX2-NEXT: retl ; X32-AVX2-NEXT: retl
; ;
; X64-AVX2-LABEL: five_or_and_xor: ; X64-AVX2-LABEL: five_or_and_xor:
; X64-AVX2: ## %bb.0: ## %entry ; X64-AVX2: ## %bb.0: ## %entry
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm2
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm1, %xmm1
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3 ; X64-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-AVX2-NEXT: vxorps %ymm3, %ymm2, %ymm2 ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm4 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X64-AVX2-NEXT: vextractf128 $1, %ymm2, %xmm3 ; X64-AVX2-NEXT: vcmpneqps %ymm4, %ymm0, %ymm4
; X64-AVX2-NEXT: vpackssdw %xmm3, %xmm2, %xmm2 ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm5 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X64-AVX2-NEXT: vcmpneqps %ymm5, %ymm0, %ymm0
; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X64-AVX2-NEXT: vandps %ymm0, %ymm4, %ymm0
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm4 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1] ; X64-AVX2-NEXT: vxorps %ymm0, %ymm3, %ymm0
; X64-AVX2-NEXT: vcmpneqps %ymm4, %ymm0, %ymm0 ; X64-AVX2-NEXT: vxorps %ymm0, %ymm2, %ymm0
; X64-AVX2-NEXT: vandps %ymm0, %ymm3, %ymm0 ; X64-AVX2-NEXT: vorps %ymm1, %ymm0, %ymm0
; X64-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm3
; X64-AVX2-NEXT: vpackssdw %xmm3, %xmm0, %xmm0
; X64-AVX2-NEXT: vpxor %xmm0, %xmm2, %xmm0
; X64-AVX2-NEXT: vpor %xmm1, %xmm0, %xmm0
; X64-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X64-AVX2-NEXT: retq ; X64-AVX2-NEXT: retq
entry: entry:
%cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01> %cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01>
%cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> %cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
%cmp3 = fcmp une <8 x float> %x, zeroinitializer %cmp3 = fcmp une <8 x float> %x, zeroinitializer
%xor14 = xor <8 x i1> %cmp1, %cmp3 %xor14 = xor <8 x i1> %cmp1, %cmp3
%cmp5 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000> %cmp5 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>
%cmp7 = fcmp une <8 x float> %x, <float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000> %cmp7 = fcmp une <8 x float> %x, <float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000>
%and15 = and <8 x i1> %cmp5, %cmp7 %and15 = and <8 x i1> %cmp5, %cmp7
%xor916 = xor <8 x i1> %xor14, %and15 %xor916 = xor <8 x i1> %xor14, %and15
%or17 = or <8 x i1> %xor916, %cmp %or17 = or <8 x i1> %xor916, %cmp
%or = sext <8 x i1> %or17 to <8 x i32> %or = sext <8 x i1> %or17 to <8 x i32>
ret <8 x i32> %or ret <8 x i32> %or
} }
define <8 x i32> @six_or_and_xor(<8 x float> %x) { define <8 x i32> @six_or_and_xor(<8 x float> %x) {
; X32-LABEL: six_or_and_xor: ; X32-LABEL: six_or_and_xor:
; X32: ## %bb.0: ## %entry ; X32: ## %bb.0: ## %entry
; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-NEXT: vcmpltps LCPI16_1, %ymm0, %ymm2 ; X32-NEXT: vcmpltps LCPI16_1, %ymm0, %ymm2
; X32-NEXT: vxorps %xmm3, %xmm3, %xmm3 ; X32-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X32-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-NEXT: vcmpneqps LCPI16_2, %ymm0, %ymm4
; X32-NEXT: vandps %ymm4, %ymm3, %ymm3
; X32-NEXT: vandps %ymm3, %ymm2, %ymm2 ; X32-NEXT: vandps %ymm3, %ymm2, %ymm2
; X32-NEXT: vextractf128 $1, %ymm2, %xmm3 ; X32-NEXT: vxorps %ymm2, %ymm1, %ymm1
; X32-NEXT: vpackssdw %xmm3, %xmm2, %xmm2 ; X32-NEXT: vcmpneqps LCPI16_3, %ymm0, %ymm2
; X32-NEXT: vcmpneqps LCPI16_2, %ymm0, %ymm3 ; X32-NEXT: vxorps %ymm1, %ymm2, %ymm1
; X32-NEXT: vextractf128 $1, %ymm3, %xmm4
; X32-NEXT: vpackssdw %xmm4, %xmm3, %xmm3
; X32-NEXT: vpand %xmm3, %xmm2, %xmm2
; X32-NEXT: vcmpneqps LCPI16_3, %ymm0, %ymm3
; X32-NEXT: vxorps %ymm1, %ymm3, %ymm1
; X32-NEXT: vextractf128 $1, %ymm1, %xmm3
; X32-NEXT: vpackssdw %xmm3, %xmm1, %xmm1
; X32-NEXT: vpxor %xmm2, %xmm1, %xmm1
; X32-NEXT: vcmpneqps LCPI16_4, %ymm0, %ymm0 ; X32-NEXT: vcmpneqps LCPI16_4, %ymm0, %ymm0
; X32-NEXT: vextractf128 $1, %ymm0, %xmm2 ; X32-NEXT: vorps %ymm0, %ymm1, %ymm0
; X32-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X32-NEXT: vpor %xmm0, %xmm1, %xmm0
; X32-NEXT: vpmovsxwd %xmm0, %xmm1
; X32-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X32-NEXT: vpmovsxwd %xmm0, %xmm0
; X32-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X32-NEXT: retl ; X32-NEXT: retl
; ;
; X64-LABEL: six_or_and_xor: ; X64-LABEL: six_or_and_xor:
; X64: ## %bb.0: ## %entry ; X64: ## %bb.0: ## %entry
; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-NEXT: vmovaps {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2 ; X64-NEXT: vcmpltps {{.*}}(%rip), %ymm0, %ymm2
; X64-NEXT: vxorps %xmm3, %xmm3, %xmm3 ; X64-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X64-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm4
; X64-NEXT: vandps %ymm4, %ymm3, %ymm3
; X64-NEXT: vandps %ymm3, %ymm2, %ymm2 ; X64-NEXT: vandps %ymm3, %ymm2, %ymm2
; X64-NEXT: vextractf128 $1, %ymm2, %xmm3 ; X64-NEXT: vxorps %ymm2, %ymm1, %ymm1
; X64-NEXT: vpackssdw %xmm3, %xmm2, %xmm2 ; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm2
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm3 ; X64-NEXT: vxorps %ymm1, %ymm2, %ymm1
; X64-NEXT: vextractf128 $1, %ymm3, %xmm4
; X64-NEXT: vpackssdw %xmm4, %xmm3, %xmm3
; X64-NEXT: vpand %xmm3, %xmm2, %xmm2
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm3
; X64-NEXT: vxorps %ymm1, %ymm3, %ymm1
; X64-NEXT: vextractf128 $1, %ymm1, %xmm3
; X64-NEXT: vpackssdw %xmm3, %xmm1, %xmm1
; X64-NEXT: vpxor %xmm2, %xmm1, %xmm1
; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0 ; X64-NEXT: vcmpneqps {{.*}}(%rip), %ymm0, %ymm0
; X64-NEXT: vextractf128 $1, %ymm0, %xmm2 ; X64-NEXT: vorps %ymm0, %ymm1, %ymm0
; X64-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X64-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-NEXT: vpmovsxwd %xmm0, %xmm1
; X64-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[2,3,0,1]
; X64-NEXT: vpmovsxwd %xmm0, %xmm0
; X64-NEXT: vinsertf128 $1, %xmm0, %ymm1, %ymm0
; X64-NEXT: retq ; X64-NEXT: retq
; ;
; X32-AVX2-LABEL: six_or_and_xor: ; X32-AVX2-LABEL: six_or_and_xor:
; X32-AVX2: ## %bb.0: ## %entry ; X32-AVX2: ## %bb.0: ## %entry
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X32-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X32-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3 ; X32-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm4 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X32-AVX2-NEXT: vcmpneqps %ymm4, %ymm0, %ymm4
; X32-AVX2-NEXT: vandps %ymm4, %ymm3, %ymm3
; X32-AVX2-NEXT: vandps %ymm3, %ymm2, %ymm2 ; X32-AVX2-NEXT: vandps %ymm3, %ymm2, %ymm2
; X32-AVX2-NEXT: vextractf128 $1, %ymm2, %xmm3 ; X32-AVX2-NEXT: vxorps %ymm2, %ymm1, %ymm1
; X32-AVX2-NEXT: vpackssdw %xmm3, %xmm2, %xmm2 ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X32-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X32-AVX2-NEXT: vxorps %ymm1, %ymm2, %ymm1
; X32-AVX2-NEXT: vextractf128 $1, %ymm3, %xmm4
; X32-AVX2-NEXT: vpackssdw %xmm4, %xmm3, %xmm3
; X32-AVX2-NEXT: vpand %xmm3, %xmm2, %xmm2
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
; X32-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X32-AVX2-NEXT: vxorps %ymm1, %ymm3, %ymm1
; X32-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm3
; X32-AVX2-NEXT: vpackssdw %xmm3, %xmm1, %xmm1
; X32-AVX2-NEXT: vpxor %xmm2, %xmm1, %xmm1
; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1] ; X32-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1]
; X32-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm0 ; X32-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm0
; X32-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm2 ; X32-AVX2-NEXT: vorps %ymm0, %ymm1, %ymm0
; X32-AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X32-AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
; X32-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X32-AVX2-NEXT: retl ; X32-AVX2-NEXT: retl
; ;
; X64-AVX2-LABEL: six_or_and_xor: ; X64-AVX2-LABEL: six_or_and_xor:
; X64-AVX2: ## %bb.0: ## %entry ; X64-AVX2: ## %bb.0: ## %entry
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm1 = [-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1,-5.0E-1]
; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1 ; X64-AVX2-NEXT: vcmpleps %ymm0, %ymm1, %ymm1
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0,1.0E+0]
; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2 ; X64-AVX2-NEXT: vcmpltps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3 ; X64-AVX2-NEXT: vxorps %xmm3, %xmm3, %xmm3
; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm4 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1]
; X64-AVX2-NEXT: vcmpneqps %ymm4, %ymm0, %ymm4
; X64-AVX2-NEXT: vandps %ymm4, %ymm3, %ymm3
; X64-AVX2-NEXT: vandps %ymm3, %ymm2, %ymm2 ; X64-AVX2-NEXT: vandps %ymm3, %ymm2, %ymm2
; X64-AVX2-NEXT: vextractf128 $1, %ymm2, %xmm3 ; X64-AVX2-NEXT: vxorps %ymm2, %ymm1, %ymm1
; X64-AVX2-NEXT: vpackssdw %xmm3, %xmm2, %xmm2 ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1,1.00000001E-1] ; X64-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm2
; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3 ; X64-AVX2-NEXT: vxorps %ymm1, %ymm2, %ymm1
; X64-AVX2-NEXT: vextractf128 $1, %ymm3, %xmm4
; X64-AVX2-NEXT: vpackssdw %xmm4, %xmm3, %xmm3
; X64-AVX2-NEXT: vpand %xmm3, %xmm2, %xmm2
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm3 = [2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1,2.00000003E-1]
; X64-AVX2-NEXT: vcmpneqps %ymm3, %ymm0, %ymm3
; X64-AVX2-NEXT: vxorps %ymm1, %ymm3, %ymm1
; X64-AVX2-NEXT: vextractf128 $1, %ymm1, %xmm3
; X64-AVX2-NEXT: vpackssdw %xmm3, %xmm1, %xmm1
; X64-AVX2-NEXT: vpxor %xmm2, %xmm1, %xmm1
; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1] ; X64-AVX2-NEXT: vbroadcastss {{.*#+}} ymm2 = [4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1,4.00000006E-1]
; X64-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm0 ; X64-AVX2-NEXT: vcmpneqps %ymm2, %ymm0, %ymm0
; X64-AVX2-NEXT: vextractf128 $1, %ymm0, %xmm2 ; X64-AVX2-NEXT: vorps %ymm0, %ymm1, %ymm0
; X64-AVX2-NEXT: vpackssdw %xmm2, %xmm0, %xmm0
; X64-AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
; X64-AVX2-NEXT: vpmovsxwd %xmm0, %ymm0
; X64-AVX2-NEXT: retq ; X64-AVX2-NEXT: retq
entry: entry:
%cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01> %cmp = fcmp oge <8 x float> %x, <float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01, float -5.000000e-01>
%cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00> %cmp1 = fcmp olt <8 x float> %x, <float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00, float 1.000000e+00>
%cmp3 = fcmp une <8 x float> %x, zeroinitializer %cmp3 = fcmp une <8 x float> %x, zeroinitializer
%and18 = and <8 x i1> %cmp1, %cmp3 %and18 = and <8 x i1> %cmp1, %cmp3
%cmp5 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000> %cmp5 = fcmp une <8 x float> %x, <float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000, float 0x3FB99999A0000000>
%and719 = and <8 x i1> %and18, %cmp5 %and719 = and <8 x i1> %and18, %cmp5
%cmp8 = fcmp une <8 x float> %x, <float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000> %cmp8 = fcmp une <8 x float> %x, <float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000, float 0x3FC99999A0000000>
%xor20 = xor <8 x i1> %cmp8, %cmp %xor20 = xor <8 x i1> %cmp8, %cmp
%xor1021 = xor <8 x i1> %xor20, %and719 %xor1021 = xor <8 x i1> %xor20, %and719
%cmp11 = fcmp une <8 x float> %x, <float 0x3FD99999A0000000, float 0x3FD99999A0000000, float 0x3FD99999A0000000, float 0x3FD99999A0000000, float 0x3FD99999A0000000, float 0x3FD99999A0000000, float 0x3FD99999A0000000, float 0x3FD99999A0000000> %cmp11 = fcmp une <8 x float> %x, <float 0x3FD99999A0000000, float 0x3FD99999A0000000, float 0x3FD99999A0000000, float 0x3FD99999A0000000, float 0x3FD99999A0000000, float 0x3FD99999A0000000, float 0x3FD99999A0000000, float 0x3FD99999A0000000>
%or22 = or <8 x i1> %xor1021, %cmp11 %or22 = or <8 x i1> %xor1021, %cmp11
%or = sext <8 x i1> %or22 to <8 x i32> %or = sext <8 x i1> %or22 to <8 x i32>
ret <8 x i32> %or ret <8 x i32> %or
} }