[ms] [X86] Use "P" modifier on operands to call instructions in inline X86 assembly.

[epastor]

Summary

This is documented as the appropriate template modifier for call operands.
Fixes PR44272, and adds a regression test.

Also adds support for operand modifiers in Intel-style inline assembly.

[merge_guards_bot]

Unit tests: pass. 60853 tests passed, 0 failed and 726 were skipped.

clang-tidy: fail. Please fix clang-tidy findings.

clang-format: fail. Please format your changes with clang-format by running git-clang-format HEAD^ or applying this patch.

Build artifacts: diff.json, clang-tidy.txt, clang-format.patch, CMakeCache.txt, console-log.txt, test-results.xml

[rnk]

Where is {0:P} actually documented? I don't see it in LangRef, but I do see it in the code.

llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp

2871

I'm trying to think of other edge cases where we'd want the same treatment. In theory, we'd want to do this for every control flow instruction that takes a PC-relative operand, jmp, jcc, jecxz, that might be all. You know, it actually seems reasonable to set up a naked function that contains an asm blob which conditionally branches to another function, so I guess we should support it. In that case, maybe this should be named something like "isBranchTarget" instead of isCallTarget.

[epastor]

In D71677#1790458, @rnk wrote:

Where is {0:P} actually documented? I don't see it in LangRef, but I do see it in the code.

https://llvm.org/docs/LangRef.html#asm-template-argument-modifiers, under X86; specifically documented to be used on the operands of call instructions.

llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp

2871

That would be a valid option, but currently the "P" modifier is documented for LLVM as to-be-used on the operands of call instructions. GNU as) adds it more generally to be applied to functions - and occasionally constants, if you need a constant to avoid all syntax-specific prefixes.

We could use this for any branch target operand... but we'd need to restrict it to apply only to the specific PC-relative operand, which I think means augmenting the X86 target tables to annotate which operands of which instructions are PC-relative? Also, I'm not sure if that would break pre-existing code in enough cases to be worrying.

[rnk]

lgtm

llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp

2871

I see, so LLVM inherited P from GCC, and it mostly relates to sym@PLT suffixes, but it also suppresses sym(%rip) suffixes, and it is specific to calls. In that case, this all makes sense, let's not overgeneralize to all branch targets.

llvm/test/CodeGen/X86/ms-inline-asm-PR44272.ll

16

I'd suggest matching for {{call(l|q) func$}} so that you don't accidentally match callq func(%rip). Which makes me wonder, does @PLT appear here? The test uses no OS in the triple, which probably means ELF, so we probably use a PLT.

[epastor]

llvm/test/CodeGen/X86/ms-inline-asm-PR44272.ll

16

Thanks for that catch - completely missed that it'd match with (%rip) on the end.

Interestingly... no, no @PLT in this test. Not sure what's up with that.

[epastor]

Fix test; missing anchor meant the previous version would not catch a regression.

[merge_guards_bot]

Unit tests: pass. 61087 tests passed, 0 failed and 728 were skipped.

clang-tidy: fail. Please fix clang-tidy findings.

clang-format: fail. Please format your changes with clang-format by running git-clang-format HEAD^ or applying this patch.

Build artifacts: diff.json, clang-tidy.txt, clang-format.patch, CMakeCache.txt, console-log.txt, test-results.xml

clang/lib/CodeGen/TargetInfo.cpp

while (Pos < AsmString.size()) {
     if (DollarEnd == std::string::npos)
       DollarEnd = AsmString.size();
     OS << StringRef(&AsmString[Pos], DollarEnd - Pos);
     Pos = DollarEnd;
     size_t NumDollars = DollarEnd - DollarStart;
     if (NumDollars % 2 != 0 && Pos < AsmString.size()) {
       // We have an operand reference.
       size_t DigitStart = Pos;
+      if (AsmString[DigitStart] == '{') {
+        OS << '{';
+        ++DigitStart;
+      }
       size_t DigitEnd = AsmString.find_first_not_of("0123456789", DigitStart);
       if (DigitEnd == std::string::npos)
         DigitEnd = AsmString.size();
       StringRef OperandStr(&AsmString[DigitStart], DigitEnd - DigitStart);
       unsigned OperandIndex;
       if (!OperandStr.getAsInteger(10, OperandIndex)) {
         if (OperandIndex >= FirstIn)
           OperandIndex += NumNewOuts;

clang/test/CodeGen/mozilla-ms-inline-asm.c

 // REQUIRES: x86-registered-target
 // RUN: %clang_cc1 %s -triple i386-apple-darwin10 -fasm-blocks -emit-llvm -o - | opt -strip -S | FileCheck %s
 
 // Some test cases for MS inline asm support from Mozilla code base.
 
 void invoke_copy_to_stack() {}
 
 void invoke(void* that, unsigned methodIndex,
             unsigned paramCount, void* params)
 {
 // CHECK: @invoke
 // CHECK: %5 = alloca i8*, align 4
 // CHECK: %6 = alloca i32, align 4
 // CHECK: %7 = alloca i32, align 4
 // CHECK: %8 = alloca i8*, align 4
 // CHECK: store i8* %0, i8** %5, align 4
 // CHECK: store i32 %1, i32* %6, align 4
 // CHECK: store i32 %2, i32* %7, align 4
 // CHECK: store i8* %3, i8** %8, align 4
 // CHECK: call void asm sideeffect inteldialect
 // CHECK-SAME: mov edx,$1
 // CHECK-SAME: test edx,edx
 // CHECK-SAME: jz {{[^_]*}}__MSASMLABEL_.${:uid}__noparams
 //                ^ Can't use {{.*}} here because the matching is greedy.
 // CHECK-SAME: mov eax,edx
 // CHECK-SAME: shl eax,$$3
 // CHECK-SAME: sub esp,eax
 // CHECK-SAME: mov ecx,esp
 // CHECK-SAME: push $0
-// CHECK-SAME: call dword ptr $2
+// CHECK-SAME: call dword ptr ${2:P}
 // CHECK-SAME: {{.*}}__MSASMLABEL_.${:uid}__noparams:
 // CHECK-SAME: mov ecx,$3
 // CHECK-SAME: push ecx
 // CHECK-SAME: mov edx,[ecx]
 // CHECK-SAME: mov eax,$4
 // CHECK-SAME: call dword ptr[edx + eax * $$4]
 // CHECK-SAME: mov esp,ebp
 // CHECK-SAME: pop ebp
 // CHECK-SAME: ret
 // CHECK: "=*m,*m,*m,*m,*m,~{eax},~{ebp},~{ecx},~{edx},~{flags},~{esp},~{dirflag},~{fpsr},~{flags}"
 // CHECK: (i8** %8, i32* %7, void (...)* bitcast (void ()* @invoke_copy_to_stack to void (...)*), i8** %5, i32* %6)
 // CHECK: ret void
     __asm {
         mov     edx,paramCount
         test    edx,edx
         jz      noparams
         mov     eax,edx
         shl     eax,3
         sub     esp,eax
         mov     ecx,esp
         push    params
         call    invoke_copy_to_stack
 noparams:
         mov     ecx,that
         push    ecx
         mov     edx,[ecx]
         mov     eax,methodIndex
         call    dword ptr[edx+eax*4]
         mov     esp,ebp
         pop     ebp
         ret
     }
 }
 

clang/test/CodeGen/ms-inline-asm.c

 // REQUIRES: x86-registered-target
 // RUN: %clang_cc1 %s -triple i386-apple-darwin10 -fasm-blocks -emit-llvm -o - | FileCheck %s
 
 void t1() {
 // CHECK: @t1
 // CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"()
 // CHECK: ret void
   __asm {}
 }
 
 void t2() {
 // CHECK: @t2
 // CHECK: call void asm sideeffect inteldialect "nop\0A\09nop\0A\09nop", "~{dirflag},~{fpsr},~{flags}"()
 // CHECK: ret void
   __asm nop
   __asm nop
   __asm nop
 }
 
 void t3() {
 // CHECK: @t3
 // CHECK: call void asm sideeffect inteldialect "nop\0A\09nop\0A\09nop", "~{dirflag},~{fpsr},~{flags}"()
 // CHECK: ret void
   __asm nop __asm nop __asm nop
 }
 
 void t4(void) {
 // CHECK: @t4
 // CHECK: call void asm sideeffect inteldialect "mov ebx, eax\0A\09mov ecx, ebx", "~{ebx},~{ecx},~{dirflag},~{fpsr},~{flags}"()
 // CHECK: ret void
   __asm mov ebx, eax
   __asm mov ecx, ebx
 }
 
 void t5(void) {
 // CHECK: @t5
 // CHECK: call void asm sideeffect inteldialect "mov ebx, eax\0A\09mov ecx, ebx", "~{ebx},~{ecx},~{dirflag},~{fpsr},~{flags}"()
 // CHECK: ret void
   __asm mov ebx, eax __asm mov ecx, ebx
 }
 
 void t6(void) {
   __asm int 0x2c
 // CHECK: t6
 // CHECK: call void asm sideeffect inteldialect "int $$44", "~{dirflag},~{fpsr},~{flags}"()
 }
 
 void t7() {
   __asm {
     int 0x2cU ; } asm comments are fun! }{
   }
   __asm {
     {
       int 0x2c ; } asm comments are fun! }{
     }
   }
   __asm {}
   __asm {
     ;
     ; label
     mov eax, ebx
   }
 // CHECK: t7
 // CHECK: call void asm sideeffect inteldialect "int $$44", "~{dirflag},~{fpsr},~{flags}"()
 // CHECK: call void asm sideeffect inteldialect "", "~{dirflag},~{fpsr},~{flags}"()
 // CHECK: call void asm sideeffect inteldialect "mov eax, ebx", "~{eax},~{dirflag},~{fpsr},~{flags}"()
 }
 
 int t8() {
   __asm int 4 ; } comments for single-line asm
   __asm {}
   __asm { int 5}
   __asm int 6
   __asm int 7
   __asm { 
void t23() {
   }
 // CHECK: t23
 // CHECK: call void asm sideeffect inteldialect "{{.*}}__MSASMLABEL_.${:uid}__the_label:", "~{dirflag},~{fpsr},~{flags}"()
 }
 
 void t24_helper(void) {}
 void t24() {
   __asm call t24_helper
 // CHECK: t24
-// CHECK: call void asm sideeffect inteldialect "call dword ptr $0", "*m,~{dirflag},~{fpsr},~{flags}"(void ()* @t24_helper)
+// CHECK: call void asm sideeffect inteldialect "call dword ptr ${0:P}", "*m,~{dirflag},~{fpsr},~{flags}"(void ()* @t24_helper)
 }
 
 void t25() {
 // CHECK: t25
   __asm mov eax, 0ffffffffh
 // CHECK: mov eax, $$4294967295
   __asm mov eax, 0fhU
 // CHECK: mov eax, $$15
void dot_operator(){
   // CHECK-LABEL: define void @dot_operator
   __asm { mov eax, 3[ebx]A.b}
   // CHECK: call void asm sideeffect inteldialect "mov eax, [ebx + $$7]", "~{eax},~{dirflag},~{fpsr},~{flags}"
 }
 
 void call_clobber() {
   __asm call t41
   // CHECK-LABEL: define void @call_clobber
-  // CHECK: call void asm sideeffect inteldialect "call dword ptr $0", "*m,~{dirflag},~{fpsr},~{flags}"(void (i16)* @t41)
+  // CHECK: call void asm sideeffect inteldialect "call dword ptr ${0:P}", "*m,~{dirflag},~{fpsr},~{flags}"(void (i16)* @t41)
 }
 
 void xgetbv() {
   __asm xgetbv
 }
 // CHECK-LABEL: define void @xgetbv()
 // CHECK: call void asm sideeffect inteldialect "xgetbv", "~{eax},~{edx},~{dirflag},~{fpsr},~{flags}"()
 

clang/test/CodeGen/ms-inline-asm.cpp

// CHECK-LABEL: define void @_Z2t1v()
   Foo::Bar::ptr = (int *)0xDEADBEEF;
 // CHECK: call void asm sideeffect inteldialect
 // CHECK-SAME: mov eax, $0
 // CHECK-SAME: mov eax, $1
 // CHECK-SAME: mov eax, $2
 // CHECK-SAME: mov eax, dword ptr $3
 // CHECK-SAME: mov eax, dword ptr $4
 // CHECK-SAME: "*m,*m,*m,*m,*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32** @_ZN3Foo3ptrE, i32** @_ZN3Foo3Bar3ptrE, i32** @_ZN3Foo3ptrE, i32** @_ZN3Foo3ptrE, i32** @_ZN3Foo3ptrE)
   __asm mov eax, Foo ::ptr
   __asm mov eax, Foo :: Bar :: ptr
   __asm mov eax, [Foo:: ptr]
   __asm mov eax, dword ptr [Foo :: ptr]
   __asm mov eax, dword ptr [Foo :: ptr]
 }
 
 int gvar = 10;
 void t2() {
   int lvar = 10;
   __asm mov eax, offset Foo::ptr
   __asm mov eax, offset Foo::Bar::ptr
 // CHECK-LABEL: define void @_Z2t2v()
 // CHECK: call void asm sideeffect inteldialect
 // CHECK-SAME: mov eax, $0
 // CHECK-SAME: mov eax, $1
 // CHECK-SAME: "r,r,~{eax},~{dirflag},~{fpsr},~{flags}"(i32** @_ZN3Foo3ptrE, i32** @_ZN3Foo3Bar3ptrE)
 }
 
 // CHECK-LABEL: define void @_Z2t3v()
 void t3() {
   __asm mov eax, LENGTH Foo::ptr
   __asm mov eax, LENGTH Foo::Bar::ptr
   __asm mov eax, LENGTH Foo::arr
   __asm mov eax, LENGTH Foo::Bar::arr
 
   __asm mov eax, TYPE Foo::ptr
   __asm mov eax, TYPE Foo::Bar::ptr
   __asm mov eax, TYPE Foo::arr
   __asm mov eax, TYPE Foo::Bar::arr
struct T4 {
   void test();
 };
 
 // CHECK-LABEL: define void @_ZN2T44testEv(
 void T4::test() {
 // CHECK: [[T0:%.*]] = alloca [[T4:%.*]]*,
 // CHECK: [[THIS:%.*]] = load [[T4]]*, [[T4]]** [[T0]]
 // CHECK: [[X:%.*]] = getelementptr inbounds [[T4]], [[T4]]* [[THIS]], i32 0, i32 0
   __asm mov eax, x;
   __asm mov y, eax;
 // CHECK: call void asm sideeffect inteldialect
 // CHECK-SAME: mov eax, $1
 // CHECK-SAME: mov $0, eax
 // CHECK-SAME: "=*m,*m,~{eax},~{dirflag},~{fpsr},~{flags}"(i32* @_ZN2T41yE, i32* {{.*}})
 }
 
 template <class T> struct T5 {
   template <class U> static T create(U);
   void run();
 };
 // CHECK-LABEL: define void @_Z5test5v()
 void test5() {
   // CHECK: [[X:%.*]] = alloca i32
   // CHECK: [[Y:%.*]] = alloca i32
   int x, y;
   __asm push y
   __asm call T5<int>::create<float>
   __asm mov x, eax
   // CHECK: call void asm sideeffect inteldialect
   // CHECK-SAME: push $0
-  // CHECK-SAME: call dword ptr $2
+  // CHECK-SAME: call dword ptr ${2:P}
   // CHECK-SAME: mov $1, eax
   // CHECK-SAME: "=*m,=*m,*m,~{esp},~{dirflag},~{fpsr},~{flags}"(i32* %y, i32* %x, i32 (float)* @_ZN2T5IiE6createIfEEiT_)
 }
 
 // Just verify this doesn't emit an error.
 void test6() {
   __asm {
    a:
    jmp a
   }
 }
 
 void t7_struct() {
   struct A {
     int a;
     int b;
   };
   __asm mov eax, [eax].A.b
   // CHECK-LABEL: define void @_Z9t7_structv
   // CHECK: call void asm sideeffect inteldialect
   // CHECK-SAME: mov eax, [eax + $$4]
   // CHECK-SAME: "~{eax},~{dirflag},~{fpsr},~{flags}"()
 }
 
 void t7_typedef() {
   typedef struct {
     int a;
     int b;
   } A;
   __asm mov eax, [eax].A.b
   // CHECK-LABEL: define void @_Z10t7_typedefv
   // CHECK: call void asm sideeffect inteldialect
   // CHECK-SAME: mov eax, [eax + $$4]
   // CHECK-SAME: "~{eax},~{dirflag},~{fpsr},~{flags}"()
 }
 
 void t7_using() {
   using A = struct {
     int a;
     int b;
   };
   __asm mov eax, [eax].A.b
   // CHECK-LABEL: define void @_Z8t7_usingv
   // CHECK: call void asm sideeffect inteldialect
   // CHECK-SAME: mov eax, [eax + $$4]
   // CHECK-SAME: "~{eax},~{dirflag},~{fpsr},~{flags}"()
 }
 
 void t8() {
   __asm some_label:
   // CHECK-LABEL: define void @_Z2t8v()
   // CHECK: call void asm sideeffect inteldialect
   // CHECK-SAME: L__MSASMLABEL_.${:uid}__some_label:
   // CHECK-SAME: "~{dirflag},~{fpsr},~{flags}"()
   struct A {
     static void g() {
       __asm jmp some_label ; This should jump forwards
       __asm some_label:
       __asm nop
       // CHECK-LABEL: define internal void @_ZZ2t8vEN1A1gEv()
       // CHECK: call void asm sideeffect inteldialect
       // CHECK-SAME: jmp L__MSASMLABEL_.${:uid}__some_label
       // CHECK-SAME: L__MSASMLABEL_.${:uid}__some_label:
       // CHECK-SAME: nop
       // CHECK-SAME: "~{dirflag},~{fpsr},~{flags}"()
     }
   };
   A::g();
 }
 
 void t9() {
   // CHECK-LABEL: define void @_Z2t9v()
   struct A {
     int a;
     int b;
     void g() {
       __asm mov eax, dword ptr [eax]this.b
       // CHECK: call void asm sideeffect inteldialect
       // CHECK-SAME: mov eax, dword ptr [eax + $$4]
       // CHECK-SAME: "~{eax},~{dirflag},~{fpsr},~{flags}"()
     }
   };
   A AA;
   AA.g();
 }
 

llvm/include/llvm/MC/MCParser/MCParsedAsmOperand.h

public:
   virtual SMLoc getStartLoc() const = 0;
   /// getEndLoc - Get the location of the last token of this operand.
   virtual SMLoc getEndLoc() const = 0;
 
   /// needAddressOf - Do we need to emit code to get the address of the
   /// variable/label?   Only valid when parsing MS-style inline assembly.
   virtual bool needAddressOf() const { return false; }
 
+  /// isCallOperand - Is this an operand of an inline-assembly call instruction?
+  /// Only valid when parsing MS-style inline assembly.
+  virtual bool isCallOperand() const { return false; }
+
   /// isOffsetOf - Do we need to emit code to get the offset of the variable,
   /// rather then the value of the variable?   Only valid when parsing MS-style
   /// inline assembly.
   virtual bool isOffsetOf() const { return false; }
 
   /// getOffsetOfLoc - Get the location of the offset operator.
   virtual SMLoc getOffsetOfLoc() const { return SMLoc(); }
 

llvm/include/llvm/MC/MCParser/MCTargetAsmParser.h

 template <typename T> class SmallVectorImpl;
 
 using OperandVector = SmallVectorImpl<std::unique_ptr<MCParsedAsmOperand>>;
 
 enum AsmRewriteKind {
   AOK_Align,          // Rewrite align as .align.
   AOK_EVEN,           // Rewrite even as .even.
   AOK_Emit,           // Rewrite _emit as .byte.
+  AOK_CallInput,      // Rewrite in terms of ${N:P}.
   AOK_Input,          // Rewrite in terms of $N.
   AOK_Output,         // Rewrite in terms of $N.
   AOK_SizeDirective,  // Add a sizing directive (e.g., dword ptr).
   AOK_Label,          // Rewrite local labels.
   AOK_EndOfStatement, // Add EndOfStatement (e.g., "\n\t").
   AOK_Skip,           // Skip emission (e.g., offset/type operators).
   AOK_IntelExpr       // SizeDirective SymDisp [BaseReg + IndexReg * Scale + ImmDisp]
 };
 
 const char AsmRewritePrecedence [] = {
   2, // AOK_Align
   2, // AOK_EVEN
   2, // AOK_Emit
   3, // AOK_Input
+  3, // AOK_CallInput
   3, // AOK_Output
   5, // AOK_SizeDirective
   1, // AOK_Label
   5, // AOK_EndOfStatement
   2, // AOK_Skip
   2  // AOK_IntelExpr
 };
 

llvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp

case '$': {
       switch (*LastEmitted) {
       default: Done = false; break;
       case '$':
         ++LastEmitted;  // Consume second '$' character.
         break;
       }
       if (Done) break;
 
+      bool HasCurlyBraces = false;
+      if (*LastEmitted == '{') {     // ${variable}
+        ++LastEmitted;               // Consume '{' character.
+        HasCurlyBraces = true;
+      }
+
       // If we have ${:foo}, then this is not a real operand reference, it is a
       // "magic" string reference, just like in .td files.  Arrange to call
       // PrintSpecial.
-      if (LastEmitted[0] == '{' && LastEmitted[1] == ':') {
-        LastEmitted += 2;
+      if (HasCurlyBraces && LastEmitted[0] == ':') {
+        ++LastEmitted;
         const char *StrStart = LastEmitted;
         const char *StrEnd = strchr(StrStart, '}');
         if (!StrEnd)
           report_fatal_error("Unterminated ${:foo} operand in inline asm"
                              " string: '" + Twine(AsmStr) + "'");
 
         std::string Val(StrStart, StrEnd);
         AP->PrintSpecial(MI, OS, Val.c_str());
case '$': {
         report_fatal_error("Bad $ operand number in inline asm string: '" +
                            Twine(AsmStr) + "'");
       LastEmitted = IDEnd;
 
       if (Val >= NumOperands-1)
         report_fatal_error("Invalid $ operand number in inline asm string: '" +
                            Twine(AsmStr) + "'");
 
+      char Modifier[2] = { 0, 0 };
+
+      if (HasCurlyBraces) {
+        // If we have curly braces, check for a modifier character.  This
+        // supports syntax like ${0:u}, which correspond to "%u0" in GCC asm.
+        if (*LastEmitted == ':') {
+          ++LastEmitted;    // Consume ':' character.
+          if (*LastEmitted == 0)
+            report_fatal_error("Bad ${:} expression in inline asm string: '" +
+                               Twine(AsmStr) + "'");
+
+          Modifier[0] = *LastEmitted;
+          ++LastEmitted;    // Consume modifier character.
+        }
+
+        if (*LastEmitted != '}')
+          report_fatal_error("Bad ${} expression in inline asm string: '" +
+                             Twine(AsmStr) + "'");
+        ++LastEmitted;    // Consume '}' character.
+      }
+
       // Okay, we finally have a value number.  Ask the target to print this
       // operand!
       unsigned OpNo = InlineAsm::MIOp_FirstOperand;
 
       bool Error = false;
 
       // Scan to find the machine operand number for the operand.
       for (; Val; --Val) {
         if (OpNo >= MI->getNumOperands()) break;
         unsigned OpFlags = MI->getOperand(OpNo).getImm();
         OpNo += InlineAsm::getNumOperandRegisters(OpFlags) + 1;
       }
 
       // We may have a location metadata attached to the end of the
       // instruction, and at no point should see metadata at any
       // other point while processing. It's an error if so.
       if (OpNo >= MI->getNumOperands() ||
           MI->getOperand(OpNo).isMetadata()) {
         Error = true;
       } else {
         unsigned OpFlags = MI->getOperand(OpNo).getImm();
         ++OpNo;  // Skip over the ID number.
 
         if (InlineAsm::isMemKind(OpFlags)) {
-          Error = AP->PrintAsmMemoryOperand(MI, OpNo, /*Modifier*/ nullptr, OS);
+          Error = AP->PrintAsmMemoryOperand(
+              MI, OpNo, Modifier[0] ? Modifier : nullptr, OS);
         } else {
-          Error = AP->PrintAsmOperand(MI, OpNo, /*Modifier*/ nullptr, OS);
+          Error = AP->PrintAsmOperand(MI, OpNo,
+                                      Modifier[0] ? Modifier : nullptr, OS);
         }
       }
       if (Error) {
         std::string msg;
         raw_string_ostream Msg(msg);
         Msg << "invalid operand in inline asm: '" << AsmStr << "'";
         MMI->getModule()->getContext().emitError(LocCookie, Msg.str());
       }

llvm/lib/MC/MCParser/AsmParser.cpp

for (unsigned i = 1, e = Info.ParsedOperands.size(); i != e; ++i) {
         OutputDecls.push_back(OpDecl);
         OutputDeclsAddressOf.push_back(Operand.needAddressOf());
         OutputConstraints.push_back(("=" + Operand.getConstraint()).str());
         AsmStrRewrites.emplace_back(AOK_Output, Start, SymName.size());
       } else {
         InputDecls.push_back(OpDecl);
         InputDeclsAddressOf.push_back(Operand.needAddressOf());
         InputConstraints.push_back(Operand.getConstraint().str());
+        if (Operand.isCallOperand())
+          AsmStrRewrites.emplace_back(AOK_CallInput, Start, SymName.size());
+        else
           AsmStrRewrites.emplace_back(AOK_Input, Start, SymName.size());
       }
     }
 
     // Consider implicit defs to be clobbers.  Think of cpuid and push.
     ArrayRef<MCPhysReg> ImpDefs(Desc.getImplicitDefs(),
                                 Desc.getNumImplicitDefs());
     ClobberRegs.insert(ClobberRegs.end(), ImpDefs.begin(), ImpDefs.end());
   }
case AOK_IntelExpr:
         OS << "]";
       break;
     case AOK_Label:
       OS << Ctx.getAsmInfo()->getPrivateLabelPrefix() << AR.Label;
       break;
     case AOK_Input:
       OS << '$' << InputIdx++;
       break;
+    case AOK_CallInput:
+      OS << "${" << InputIdx++ << ":P}";
+      break;
     case AOK_Output:
       OS << '$' << OutputIdx++;
       break;
     case AOK_SizeDirective:
       switch (AR.Val) {
       default: break;
       case 8:  OS << "byte ptr "; break;
       case 16: OS << "word ptr "; break;

llvm/lib/Target/X86/AsmParser/X86AsmParser.cpp

if ((Name == "xlat" || Name == "xlatb") && Operands.size() == 2) {
     if (Op1.isMem8()) {
       Warning(Op1.getStartLoc(), "memory operand is only for determining the "
                                  "size, (R|E)BX will be used for the location");
       Operands.pop_back();
       static_cast<X86Operand &>(*Operands[0]).setTokenValue("xlatb");
     }
   }
 
+  // Mark the operands of a call instruction.  These need to be handled
+  // differently when referenced in MS-style inline assembly.
+  if (Name.startswith("call") || Name.startswith("lcall")) {
+    for (size_t i = 1; i < Operands.size(); ++i) {
+      X86Operand &Op = static_cast<X86Operand &>(*Operands[i]);
+      Op.setCallOperand(true);
+    }
+  }
+
   if (Flags)
     Operands.push_back(X86Operand::CreatePrefix(Flags, NameLoc, NameLoc));
   return false;
 }
 
 bool X86AsmParser::processInstruction(MCInst &Inst, const OperandVector &Ops) {
   const MCRegisterInfo *MRI = getContext().getRegisterInfo();
 

llvm/lib/Target/X86/AsmParser/X86Operand.h

 struct X86Operand final : public MCParsedAsmOperand {
   enum KindTy { Token, Register, Immediate, Memory, Prefix, DXRegister } Kind;
 
   SMLoc StartLoc, EndLoc;
   SMLoc OffsetOfLoc;
   StringRef SymName;
   void *OpDecl;
   bool AddressOf;
+  bool CallOperand;
 
   struct TokOp {
     const char *Data;
     unsigned Length;
   };
 
   struct RegOp {
     unsigned RegNo;
union {
     struct TokOp Tok;
     struct RegOp Reg;
     struct ImmOp Imm;
     struct MemOp Mem;
     struct PrefOp Pref;
   };
 
   X86Operand(KindTy K, SMLoc Start, SMLoc End)
-      : Kind(K), StartLoc(Start), EndLoc(End) {}
+      : Kind(K), StartLoc(Start), EndLoc(End), CallOperand(false) {}
 
   StringRef getSymName() override { return SymName; }
   void *getOpDecl() override { return OpDecl; }
 
   /// getStartLoc - Get the location of the first token of this operand.
   SMLoc getStartLoc() const override { return StartLoc; }
 
   /// getEndLoc - Get the location of the last token of this operand.
struct X86Operand final : public MCParsedAsmOperand {
   bool isOffsetOf() const override {
     return OffsetOfLoc.getPointer();
   }
 
   bool needAddressOf() const override {
     return AddressOf;
   }
 
+  bool isCallOperand() const override { return CallOperand; }
+  void setCallOperand(bool IsCallOperand) { CallOperand = IsCallOperand; }
+
   bool isMem() const override { return Kind == Memory; }
   bool isMemUnsized() const {
     return Kind == Memory && Mem.Size == 0;
   }
   bool isMem8() const {
     return Kind == Memory && (!Mem.Size || Mem.Size == 8);
   }
   bool isMem16() const {

llvm/lib/Target/X86/X86AsmPrinter.h

class LLVM_LIBRARY_VISIBILITY X86AsmPrinter : public AsmPrinter {
 
   void PrintSymbolOperand(const MachineOperand &MO, raw_ostream &O) override;
   void PrintOperand(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
   void PrintModifiedOperand(const MachineInstr *MI, unsigned OpNo,
                             raw_ostream &O, const char *Modifier);
   void PrintPCRelImm(const MachineInstr *MI, unsigned OpNo, raw_ostream &O);
   void PrintLeaMemReference(const MachineInstr *MI, unsigned OpNo,
                             raw_ostream &O, const char *Modifier);
   void PrintMemReference(const MachineInstr *MI, unsigned OpNo, raw_ostream &O,
                          const char *Modifier);
   void PrintIntelMemReference(const MachineInstr *MI, unsigned OpNo,
-                              raw_ostream &O);
+                              raw_ostream &O, const char *Modifier);
 
 public:
   X86AsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer);
 
   StringRef getPassName() const override {
     return "X86 Assembly Printer";
   }
 

llvm/lib/Target/X86/X86AsmPrinter.cpp

void X86AsmPrinter::PrintMemReference(const MachineInstr *MI, unsigned OpNo,
   const MachineOperand &Segment = MI->getOperand(OpNo + X86::AddrSegmentReg);
   if (Segment.getReg()) {
     PrintModifiedOperand(MI, OpNo + X86::AddrSegmentReg, O, Modifier);
     O << ':';
   }
   PrintLeaMemReference(MI, OpNo, O, Modifier);
 }
 
+
 void X86AsmPrinter::PrintIntelMemReference(const MachineInstr *MI,
-                                           unsigned OpNo, raw_ostream &O) {
+                                           unsigned OpNo, raw_ostream &O,
+                                           const char *Modifier) {
   const MachineOperand &BaseReg = MI->getOperand(OpNo + X86::AddrBaseReg);
   unsigned ScaleVal = MI->getOperand(OpNo + X86::AddrScaleAmt).getImm();
   const MachineOperand &IndexReg = MI->getOperand(OpNo + X86::AddrIndexReg);
   const MachineOperand &DispSpec = MI->getOperand(OpNo + X86::AddrDisp);
   const MachineOperand &SegReg = MI->getOperand(OpNo + X86::AddrSegmentReg);
 
+  // If we really don't want to print out (rip), don't.
+  bool HasBaseReg = BaseReg.getReg() != 0;
+  if (HasBaseReg && Modifier && !strcmp(Modifier, "no-rip") &&
+      BaseReg.getReg() == X86::RIP)
+    HasBaseReg = false;
+
   // If this has a segment register, print it.
   if (SegReg.getReg()) {
     PrintOperand(MI, OpNo + X86::AddrSegmentReg, O);
     O << ':';
   }
 
   O << '[';
 
   bool NeedPlus = false;
-  if (BaseReg.getReg()) {
+  if (HasBaseReg) {
     PrintOperand(MI, OpNo + X86::AddrBaseReg, O);
     NeedPlus = true;
   }
 
   if (IndexReg.getReg()) {
     if (NeedPlus) O << " + ";
     if (ScaleVal != 1)
       O << ScaleVal << '*';
     PrintOperand(MI, OpNo + X86::AddrIndexReg, O);
     NeedPlus = true;
   }
 
   if (!DispSpec.isImm()) {
     if (NeedPlus) O << " + ";
     PrintOperand(MI, OpNo + X86::AddrDisp, O);
   } else {
     int64_t DispVal = DispSpec.getImm();
-    if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg())) {
+    if (DispVal || (!IndexReg.getReg() && !HasBaseReg)) {
       if (NeedPlus) {
         if (DispVal > 0)
           O << " + ";
         else {
           O << " - ";
           DispVal = -DispVal;
         }
       }
bool X86AsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
 
   PrintOperand(MI, OpNo, O);
   return false;
 }
 
 bool X86AsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
                                           const char *ExtraCode,
                                           raw_ostream &O) {
-  if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
-    PrintIntelMemReference(MI, OpNo, O);
-    return false;
-  }
-
   if (ExtraCode && ExtraCode[0]) {
     if (ExtraCode[1] != 0) return true; // Unknown modifier.
 
     switch (ExtraCode[0]) {
     default: return true;  // Unknown modifier.
     case 'b': // Print QImode register
     case 'h': // Print QImode high register
     case 'w': // Print HImode register
     case 'k': // Print SImode register
     case 'q': // Print SImode register
       // These only apply to registers, ignore on mem.
       break;
     case 'H':
+      if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
+        return true;  // Unsupported modifier in Intel inline assembly.
+      } else {
         PrintMemReference(MI, OpNo, O, "H");
+      }
       return false;
     case 'P': // Don't print @PLT, but do print as memory.
+      if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
+        PrintIntelMemReference(MI, OpNo, O, "no-rip");
+      } else {
         PrintMemReference(MI, OpNo, O, "no-rip");
+      }
       return false;
     }
   }
+  if (MI->getInlineAsmDialect() == InlineAsm::AD_Intel) {
+    PrintIntelMemReference(MI, OpNo, O, nullptr);
+  } else {
     PrintMemReference(MI, OpNo, O, nullptr);
+  }
   return false;
 }
 
 void X86AsmPrinter::EmitStartOfAsmFile(Module &M) {
   const Triple &TT = TM.getTargetTriple();
 
   if (TT.isOSBinFormatELF()) {
     // Assemble feature flags that may require creation of a note section.

llvm/test/CodeGen/X86/ms-inline-asm-PR44272.ll

+; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-- | FileCheck %s
+
+define void @func() {
+entry:
+  ret void
+}
+
+define void @main() {
+entry:
+  call void asm sideeffect inteldialect "call ${0:P}", "*m,~{dirflag},~{fpsr},~{flags}"(void ()* @func)
+  ret void
+; CHECK-LABEL: main:
+; CHECK: {{## InlineAsm Start|#APP}}
+; CHECK: {{call(l|q) func$}}
+; CHECK: {{## InlineAsm End|#NO_APP}}
+; CHECK: ret{{l|q}}
+}