[AArch64] [FrameLowering] Allow conditional insertion of CFI instruction

[tellenbach]

Summary

The insertion of most CFI instructions during AArch64 frame lowering can
be disabled (e.g. using the function attribute nounwind).

This patch enables conditional insertion for one more CFI instruction.

[tellenbach]

@ostannard The CFI instruction that can be omitted using this patch is the reason for D69097 (Return address signing for outlined functions) to be buggy, hence I've added you as a reviewer.

[tellenbach]

Ping.

[ostannard]

llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

941–946

This can be folded into the surrounding if statement, i.e. if (!NeedsWinCFI && needsFrameMoves)

llvm/test/CodeGen/AArch64/no_cfi.ll

2

s/fnu/gnu/

[tellenbach]

Address review comments.

The unrelated test arm64-blockaddress.ll had to be changed since one
temporary symbol less is generated due to the patch (if nounwind is set). So
Ltmp1 is now Ltmp0.

[ostannard]

LGTM

llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

if (!AFI->hasStackFrame() && !windowsRequiresStackProbe(MF, NumBytes)) {
     // to actually allocate.
     if (canUseRedZone(MF)) {
       AFI->setHasRedZone(true);
       ++NumRedZoneFunctions;
     } else {
       emitFrameOffset(MBB, MBBI, DL, AArch64::SP, AArch64::SP,
                       {-NumBytes, MVT::i8}, TII, MachineInstr::FrameSetup,
                       false, NeedsWinCFI, &HasWinCFI);
-      if (!NeedsWinCFI) {
+      if (!NeedsWinCFI && needsFrameMoves) {
         // Label used to tie together the PROLOG_LABEL and the MachineMoves.
         MCSymbol *FrameLabel = MMI.getContext().createTempSymbol();
           // Encode the stack size of the leaf function.
           unsigned CFIIndex = MF.addFrameInst(
               MCCFIInstruction::createDefCfaOffset(FrameLabel, -NumBytes));
           BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
               .addCFIIndex(CFIIndex)
               .setMIFlags(MachineInstr::FrameSetup);
       }
     }
 
     if (NeedsWinCFI) {
       HasWinCFI = true;
       BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_PrologEnd))
           .setMIFlag(MachineInstr::FrameSetup);
     }

llvm/test/CodeGen/AArch64/arm64-blockaddress.ll

 ; RUN: llc < %s -mtriple=arm64-apple-ios | FileCheck %s
 ; RUN: llc < %s -mtriple=arm64-linux-gnu | FileCheck %s --check-prefix=CHECK-LINUX
 ; RUN: llc < %s -mtriple=arm64-linux-gnu -code-model=large| FileCheck %s --check-prefix=CHECK-LARGE
 
 ; rdar://9188695
 
 define i64 @t() nounwind ssp {
 entry:
 ; CHECK-LABEL: t:
-; CHECK: adrp [[REG:x[0-9]+]], Ltmp1@PAGE
-; CHECK: add {{x[0-9]+}}, [[REG]], Ltmp1@PAGEOFF
+; CHECK: adrp [[REG:x[0-9]+]], Ltmp0@PAGE
+; CHECK: add {{x[0-9]+}}, [[REG]], Ltmp0@PAGEOFF
 
 ; CHECK-LINUX-LABEL: t:
-; CHECK-LINUX: adrp [[REG:x[0-9]+]], .Ltmp1
-; CHECK-LINUX: add {{x[0-9]+}}, [[REG]], :lo12:.Ltmp1
+; CHECK-LINUX: adrp [[REG:x[0-9]+]], .Ltmp0
+; CHECK-LINUX: add {{x[0-9]+}}, [[REG]], :lo12:.Ltmp0
 
 ; CHECK-LARGE-LABEL: t:
 ; CHECK-LARGE: movz [[ADDR_REG:x[0-9]+]], #:abs_g0_nc:[[DEST_LBL:.Ltmp[0-9]+]]
 ; CHECK-LARGE: movk [[ADDR_REG]], #:abs_g1_nc:[[DEST_LBL]]
 ; CHECK-LARGE: movk [[ADDR_REG]], #:abs_g2_nc:[[DEST_LBL]]
 ; CHECK-LARGE: movk [[ADDR_REG]], #:abs_g3:[[DEST_LBL]]
 
   %recover = alloca i64, align 8
   store volatile i64 ptrtoint (i8* blockaddress(@t, %mylabel) to i64), i64* %recover, align 8
   br label %mylabel
 
 mylabel:
   %tmp = load volatile i64, i64* %recover, align 8
   ret i64 %tmp
 }

llvm/test/CodeGen/AArch64/no_cfi.ll

+; RUN: llc -mtriple aarch64-arm-linux-gnu -o - %s | FileCheck %s
+
+; CHECK:        a:                                      // @a
+; CHECK-NEXT:   // %bb.0:
+; CHECK-NEXT:           sub     sp, sp, #16
+; CHECK-NOT:            .cfi{{.*}}
+; CHECK:                ret
+define void @a() nounwind {
+  %1 = alloca i32, align 4
+  store i32 1, i32* %1, align 4
+  ret void
+}
+