[AArch64] [FrameLowering] Allow conditional insertion of CFI instruction

[tellenbach]

Summary

The insertion of most CFI instructions during AArch64 frame lowering can
be disabled (e.g. using the function attribute nounwind).

This patch enables conditional insertion for one more CFI instruction.

[tellenbach]

@ostannard The CFI instruction that can be omitted using this patch is the reason for D69097 (Return address signing for outlined functions) to be buggy, hence I've added you as a reviewer.

[tellenbach]

Ping.

[ostannard]

llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

936

This can be folded into the surrounding if statement, i.e. if (!NeedsWinCFI && needsFrameMoves)

llvm/test/CodeGen/AArch64/no_cfi.ll

1

s/fnu/gnu/

[tellenbach]

Address review comments.

The unrelated test arm64-blockaddress.ll had to be changed since one
temporary symbol less is generated due to the patch (if nounwind is set). So
Ltmp1 is now Ltmp0.

[ostannard]

LGTM

llvm/lib/Target/AArch64/AArch64FrameLowering.cpp

if (canUseRedZone(MF)) {
       ++NumRedZoneFunctions;
     } else {
       emitFrameOffset(MBB, MBBI, DL, AArch64::SP, AArch64::SP,
                       {-NumBytes, MVT::i8}, TII, MachineInstr::FrameSetup,
                       false, NeedsWinCFI, &HasWinCFI);
       if (!NeedsWinCFI) {
         // Label used to tie together the PROLOG_LABEL and the MachineMoves.
         MCSymbol *FrameLabel = MMI.getContext().createTempSymbol();
+        if (needsFrameMoves) {
           // Encode the stack size of the leaf function.
           unsigned CFIIndex = MF.addFrameInst(
               MCCFIInstruction::createDefCfaOffset(FrameLabel, -NumBytes));
           BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
               .addCFIIndex(CFIIndex)
               .setMIFlags(MachineInstr::FrameSetup);
         }
       }
+    }
 
     if (NeedsWinCFI) {
       HasWinCFI = true;
       BuildMI(MBB, MBBI, DL, TII->get(AArch64::SEH_PrologEnd))
           .setMIFlag(MachineInstr::FrameSetup);
     }
 
     return;

llvm/test/CodeGen/AArch64/no_cfi.ll

+; RUN: llc -mtriple aarch64-arm-linux-fnu -o - %s | FileCheck %s
+
+; CHECK:        a:                                      // @a
+; CHECK-NEXT:   // %bb.0:
+; CHECK-NEXT:           sub     sp, sp, #16
+; CHECK-NOT:            .cfi{{.*}}
+; CHECK:                ret
+define void @a() nounwind {
+  %1 = alloca i32, align 4
+  store i32 1, i32* %1, align 4
+  ret void
+}
+