AMDGPU: Refactor treatment of denormal mode

[arsenm]

Summary

Start moving towards treating this as a property of the calling
convention, and not the subtarget. The default denormal mode should
not be part of the subtarget, and be moved into a separate function
attribute.

This patch is still NFC. The denormal mode remains as a subtarget
feature for now, but make the necessary changes to switch to using an
attribute.

[rampitec]

LGTM

[arsenm]

Rebase and fix bug in inline compatibility. Also fix test which will be temporarily broken in GlobalISel after previous commit, and fixed here

[arsenm]

Drop accidental changes

[rampitec]

LGTM

[arsenm]

db0ed3e429b55d1730d1ecc253b0643de7fca099

llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp

 //
 // FIXME: It seems some instructions do not support single precision denormals
 // regardless of the mode (exp_*_f32, rcp_*_f32, rsq_*_f32, rsq_*f32, sqrt_f32,
 // and sin_f32, cos_f32 on most parts).
 
 // We want to use these instructions, and using fp32 denormals also causes
 // instructions to run at the double precision rate for the device so it's
 // probably best to just report no single precision denormals.
-static uint32_t getFPMode(const MachineFunction &F) {
-  const GCNSubtarget& ST = F.getSubtarget<GCNSubtarget>();
-  // TODO: Is there any real use for the flush in only / flush out only modes?
+static uint32_t getFPMode(AMDGPU::SIModeRegisterDefaults Mode) {
 
+  // TODO: Is there any real use for the flush in only / flush out only modes?
   uint32_t FP32Denormals =
-    ST.hasFP32Denormals() ? FP_DENORM_FLUSH_NONE : FP_DENORM_FLUSH_IN_FLUSH_OUT;
+    Mode.FP32Denormals ? FP_DENORM_FLUSH_NONE : FP_DENORM_FLUSH_IN_FLUSH_OUT;
 
   uint32_t FP64Denormals =
-    ST.hasFP64Denormals() ? FP_DENORM_FLUSH_NONE : FP_DENORM_FLUSH_IN_FLUSH_OUT;
+    Mode.FP64FP16Denormals ? FP_DENORM_FLUSH_NONE : FP_DENORM_FLUSH_IN_FLUSH_OUT;
 
   return FP_ROUND_MODE_SP(FP_ROUND_ROUND_TO_NEAREST) |
          FP_ROUND_MODE_DP(FP_ROUND_ROUND_TO_NEAREST) |
          FP_DENORM_MODE_SP(FP32Denormals) |
          FP_DENORM_MODE_DP(FP64Denormals);
 }
 
 static AsmPrinter *
if (MFI->getLDSSize() > static_cast<unsigned>(STM.getLocalMemorySize())) {
     Ctx.diagnose(Diag);
   }
 
   ProgInfo.SGPRBlocks = IsaInfo::getNumSGPRBlocks(
       &STM, ProgInfo.NumSGPRsForWavesPerEU);
   ProgInfo.VGPRBlocks = IsaInfo::getNumVGPRBlocks(
       &STM, ProgInfo.NumVGPRsForWavesPerEU);
 
+  const SIModeRegisterDefaults Mode = MFI->getMode();
+
   // Set the value to initialize FP_ROUND and FP_DENORM parts of the mode
   // register.
-  ProgInfo.FloatMode = getFPMode(MF);
+  ProgInfo.FloatMode = getFPMode(Mode);
 
-  const SIModeRegisterDefaults Mode = MFI->getMode();
   ProgInfo.IEEEMode = Mode.IEEE;
 
   // Make clamp modifier on NaN input returns 0.
   ProgInfo.DX10Clamp = Mode.DX10Clamp;
 
   unsigned LDSAlignShift;
   if (STM.getGeneration() < AMDGPUSubtarget::SEA_ISLANDS) {
     // LDS is allocated in 64 dword blocks.

llvm/lib/Target/AMDGPU/AMDGPUCodeGenPrepare.cpp

 class AMDGPUCodeGenPrepare : public FunctionPass,
                              public InstVisitor<AMDGPUCodeGenPrepare, bool> {
   const GCNSubtarget *ST = nullptr;
   AssumptionCache *AC = nullptr;
   LegacyDivergenceAnalysis *DA = nullptr;
   Module *Mod = nullptr;
   const DataLayout *DL = nullptr;
   bool HasUnsafeFPMath = false;
+  bool HasFP32Denormals = false;
 
   /// Copies exact/nsw/nuw flags (if any) from binary operation \p I to
   /// binary operation \p V.
   ///
   /// \returns Binary operation \p V.
   /// \returns \p T's base element bit width.
   unsigned getBaseElementBitWidth(const Type *T) const;
 
bool AMDGPUCodeGenPrepare::visitFDiv(BinaryOperator &FDiv) {
 
   Function *Decl = Intrinsic::getDeclaration(Mod, Intrinsic::amdgcn_fdiv_fast);
 
   Value *Num = FDiv.getOperand(0);
   Value *Den = FDiv.getOperand(1);
 
   Value *NewFDiv = nullptr;
 
-  bool HasDenormals = ST->hasFP32Denormals();
   if (VectorType *VT = dyn_cast<VectorType>(Ty)) {
     NewFDiv = UndefValue::get(VT);
 
     // FIXME: Doesn't do the right thing for cases where the vector is partially
     // constant. This works when the scalarizer pass is run first.
     for (unsigned I = 0, E = VT->getNumElements(); I != E; ++I) {
       Value *NumEltI = Builder.CreateExtractElement(Num, I);
       Value *DenEltI = Builder.CreateExtractElement(Den, I);
       Value *NewElt;
 
-      if (shouldKeepFDivF32(NumEltI, UnsafeDiv, HasDenormals)) {
+      if (shouldKeepFDivF32(NumEltI, UnsafeDiv, HasFP32Denormals)) {
         NewElt = Builder.CreateFDiv(NumEltI, DenEltI);
       } else {
         NewElt = Builder.CreateCall(Decl, { NumEltI, DenEltI });
       }
 
       NewFDiv = Builder.CreateInsertElement(NewFDiv, NewElt, I);
     }
   } else {
-    if (!shouldKeepFDivF32(Num, UnsafeDiv, HasDenormals))
+    if (!shouldKeepFDivF32(Num, UnsafeDiv, HasFP32Denormals))
       NewFDiv = Builder.CreateCall(Decl, { Num, Den });
   }
 
   if (NewFDiv) {
     FDiv.replaceAllUsesWith(NewFDiv);
     NewFDiv->takeName(&FDiv);
     FDiv.eraseFromParent();
   }
bool AMDGPUCodeGenPrepare::runOnFunction(Function &F) {
   if (!TPC)
     return false;
 
   const AMDGPUTargetMachine &TM = TPC->getTM<AMDGPUTargetMachine>();
   ST = &TM.getSubtarget<GCNSubtarget>(F);
   AC = &getAnalysis<AssumptionCacheTracker>().getAssumptionCache(F);
   DA = &getAnalysis<LegacyDivergenceAnalysis>();
   HasUnsafeFPMath = hasUnsafeFPMath(F);
+  HasFP32Denormals = ST->hasFP32Denormals(F);
 
   bool MadeChange = false;
 
   for (BasicBlock &BB : F) {
     BasicBlock::iterator Next;
     for (BasicBlock::iterator I = BB.begin(), E = BB.end(); I != E; I = Next) {
       Next = std::next(I);
       MadeChange |= visit(*I);

llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp

 }
 
 /// AMDGPU specific code to select AMDGPU machine instructions for
 /// SelectionDAG operations.
 class AMDGPUDAGToDAGISel : public SelectionDAGISel {
   // Subtarget - Keep a pointer to the AMDGPU Subtarget around so that we can
   // make the right decision when generating code for different targets.
   const GCNSubtarget *Subtarget;
+
+  // Default FP mode for the current function.
+  AMDGPU::SIModeRegisterDefaults Mode;
+
   bool EnableLateStructurizeCFG;
 
 public:
   explicit AMDGPUDAGToDAGISel(TargetMachine *TM = nullptr,
                               CodeGenOpt::Level OptLevel = CodeGenOpt::Default)
     : SelectionDAGISel(*TM, OptLevel) {
     EnableLateStructurizeCFG = AMDGPUTargetMachine::EnableLateStructurizeCFG;
   }

 #ifdef EXPENSIVE_CHECKS
   DominatorTree & DT = getAnalysis<DominatorTreeWrapperPass>().getDomTree();
   LoopInfo * LI = &getAnalysis<LoopInfoWrapperPass>().getLoopInfo();
   for (auto &L : LI->getLoopsInPreorder()) {
     assert(L->isLCSSAForm(DT));
   }
 #endif
   Subtarget = &MF.getSubtarget<GCNSubtarget>();
+  Mode = AMDGPU::SIModeRegisterDefaults(MF.getFunction(), *Subtarget);
   return SelectionDAGISel::runOnMachineFunction(MF);
 }
 
 bool AMDGPUDAGToDAGISel::matchLoadD16FromBuildVector(SDNode *N) const {
   assert(Subtarget->d16PreservesUnusedBits());
   MVT VT = N->getValueType(0).getSimpleVT();
   if (VT != MVT::v2i16 && VT != MVT::v2f16)
     return false;
void AMDGPUDAGToDAGISel::SelectFMAD_FMA(SDNode *N) {
   unsigned Src0Mods, Src1Mods, Src2Mods;
 
   // Avoid using v_mad_mix_f32/v_fma_mix_f32 unless there is actually an operand
   // using the conversion from f16.
   bool Sel0 = SelectVOP3PMadMixModsImpl(Src0, Src0, Src0Mods);
   bool Sel1 = SelectVOP3PMadMixModsImpl(Src1, Src1, Src1Mods);
   bool Sel2 = SelectVOP3PMadMixModsImpl(Src2, Src2, Src2Mods);
 
-  assert((IsFMA || !Subtarget->hasFP32Denormals()) &&
+  assert((IsFMA || !Mode.FP32Denormals) &&
          "fmad selected with denormals enabled");
   // TODO: We can select this with f32 denormals enabled if all the sources are
   // converted from f16 (in which case fmad isn't legal).
 
   if (Sel0 || Sel1 || Sel2) {
     // For dummy operands.
     SDValue Zero = CurDAG->getTargetConstant(0, SDLoc(), MVT::i32);
     SDValue Ops[] = {

llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp

SDValue fq = DAG.getNode(ISD::FMUL, DL, FltVT,
                            fa, DAG.getNode(AMDGPUISD::RCP, DL, FltVT, fb));
 
   // fq = trunc(fq);
   fq = DAG.getNode(ISD::FTRUNC, DL, FltVT, fq);
 
   // float fqneg = -fq;
   SDValue fqneg = DAG.getNode(ISD::FNEG, DL, FltVT, fq);
 
+  MachineFunction &MF = DAG.getMachineFunction();
+  const AMDGPUMachineFunction *MFI = MF.getInfo<AMDGPUMachineFunction>();
+
   // float fr = mad(fqneg, fb, fa);
-  unsigned OpCode = Subtarget->hasFP32Denormals() ?
+  unsigned OpCode = MFI->getMode().FP32Denormals ?
                     (unsigned)AMDGPUISD::FMAD_FTZ :
                     (unsigned)ISD::FMAD;
   SDValue fr = DAG.getNode(OpCode, DL, FltVT, fqneg, fb, fa);
 
   // int iq = (int)fq;
   SDValue iq = DAG.getNode(ToInt, DL, IntVT, fq);
 
   // fr = fabs(fr);
if (DAG.MaskedValueIsZero(RHS, APInt::getHighBitsSet(64, 32)) &&
     SDValue REM = DAG.getBuildVector(MVT::v2i32, DL, {Res.getValue(1), Zero});
 
     Results.push_back(DAG.getNode(ISD::BITCAST, DL, MVT::i64, DIV));
     Results.push_back(DAG.getNode(ISD::BITCAST, DL, MVT::i64, REM));
     return;
   }
 
   if (isTypeLegal(MVT::i64)) {
+    MachineFunction &MF = DAG.getMachineFunction();
+    const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
+
     // Compute denominator reciprocal.
-    unsigned FMAD = Subtarget->hasFP32Denormals() ?
+    unsigned FMAD = MFI->getMode().FP32Denormals ?
                     (unsigned)AMDGPUISD::FMAD_FTZ :
                     (unsigned)ISD::FMAD;
 
     SDValue Cvt_Lo = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, RHS_Lo);
     SDValue Cvt_Hi = DAG.getNode(ISD::UINT_TO_FP, DL, MVT::f32, RHS_Hi);
     SDValue Mad1 = DAG.getNode(FMAD, DL, MVT::f32, Cvt_Hi,
       DAG.getConstantFP(APInt(32, 0x4f800000).bitsToFloat(), DL, MVT::f32),
       Cvt_Lo);

llvm/lib/Target/AMDGPU/AMDGPUInstructions.td

list<Predicate> Predicates = !listconcat([SubtargetPredicate,
                                             AssemblerPredicate,
                                             WaveSizePredicate],
                                             AssemblerPredicates,
                                             OtherPredicates);
 }
 class AMDGPUPat<dag pattern, dag result> : Pat<pattern, result>,
       PredicateControl;
 
-def FP16Denormals : Predicate<"Subtarget->hasFP16Denormals()">;
-def FP32Denormals : Predicate<"Subtarget->hasFP32Denormals()">;
-def FP64Denormals : Predicate<"Subtarget->hasFP64Denormals()">;
-def NoFP16Denormals : Predicate<"!Subtarget->hasFP16Denormals()">;
-def NoFP32Denormals : Predicate<"!Subtarget->hasFP32Denormals()">;
-def NoFP64Denormals : Predicate<"!Subtarget->hasFP64Denormals()">;
+let RecomputePerFunction = 1 in {
+def FP16Denormals : Predicate<"MF->getInfo<SIMachineFunctionInfo>()->getMode().FP64FP16Denormals">;
+def FP32Denormals : Predicate<"MF->getInfo<SIMachineFunctionInfo>()->getMode().FP32Denormals">;
+def FP64Denormals : Predicate<"MF->getInfo<SIMachineFunctionInfo>()->getMode().FP64FP16Denormals">;
+def NoFP16Denormals : Predicate<"!MF->getInfo<SIMachineFunctionInfo>()->getMode().FP64FP16Denormals">;
+def NoFP32Denormals : Predicate<"!MF->getInfo<SIMachineFunctionInfo>()->getMode().FP32Denormals">;
+def NoFP64Denormals : Predicate<"!MF->getInfo<SIMachineFunctionInfo>()->getMode().FP64FP16Denormals">;
 def UnsafeFPMath : Predicate<"TM.Options.UnsafeFPMath">;
+}
+
 def FMA : Predicate<"Subtarget->hasFMA()">;
 
 def InstFlag : OperandWithDefaultOps <i32, (ops (i32 0))>;
 
 def u16ImmTarget : AsmOperandClass {
   let Name = "U16Imm";
   let RenderMethod = "addImmOperands";
 }

llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h

 //===-- AMDGPUMachineFunctionInfo.h -------------------------------*- C++ -*-=//
 //
 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
 // See https://llvm.org/LICENSE.txt for license information.
 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
 //
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINEFUNCTION_H
 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUMACHINEFUNCTION_H
 
 #include "llvm/ADT/DenseMap.h"
 #include "llvm/CodeGen/MachineFunction.h"
+#include "Utils/AMDGPUBaseInfo.h"
 
 namespace llvm {
 
 class GCNSubtarget;
 
 class AMDGPUMachineFunction : public MachineFunctionInfo {
   /// A map to keep track of local memory objects and their offsets within the
   /// local memory space.
   SmallDenseMap<const GlobalValue *, unsigned, 4> LocalMemoryObjects;
 
 protected:
   uint64_t ExplicitKernArgSize; // Cache for this.
   Align MaxKernArgAlign;        // Cache for this.
 
   /// Number of bytes in the LDS that are being used.
   unsigned LDSSize;
 
+  // State of MODE register, assumed FP mode.
+  AMDGPU::SIModeRegisterDefaults Mode;
+
   // Kernels + shaders. i.e. functions called by the driver and not called
   // by other functions.
   bool IsEntryFunction;
 
   bool NoSignedZerosFPMath;
 
   // Function may be memory bound.
   bool MemoryBound;
public:
   }
 
   unsigned getMaxKernArgAlign() const { return MaxKernArgAlign.value(); }
 
   unsigned getLDSSize() const {
     return LDSSize;
   }
 
+  AMDGPU::SIModeRegisterDefaults getMode() const {
+    return Mode;
+  }
+
   bool isEntryFunction() const {
     return IsEntryFunction;
   }
 
   bool hasNoSignedZerosFPMath() const {
     return NoSignedZerosFPMath;
   }
 

llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp

 
 using namespace llvm;
 
 AMDGPUMachineFunction::AMDGPUMachineFunction(const MachineFunction &MF) :
   MachineFunctionInfo(),
   LocalMemoryObjects(),
   ExplicitKernArgSize(0),
   LDSSize(0),
+  Mode(MF.getFunction(), MF.getSubtarget<GCNSubtarget>()),
   IsEntryFunction(AMDGPU::isEntryFunctionCC(MF.getFunction().getCallingConv())),
   NoSignedZerosFPMath(MF.getTarget().Options.NoSignedZerosFPMath),
   MemoryBound(false),
   WaveLimiter(false) {
   const AMDGPUSubtarget &ST = AMDGPUSubtarget::get(MF);
 
   // FIXME: Should initialize KernArgSize based on ExplicitKernelArgOffset,
   // except reserved size is not correctly aligned.

llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h

public:
   bool has16BitInsts() const {
     return Has16BitInsts;
   }
 
   bool hasMadMixInsts() const {
     return HasMadMixInsts;
   }
 
-  bool hasFP32Denormals() const {
+  bool hasFP32Denormals(const Function &F) const {
+    // FIXME: This should not be a property of the subtarget. This should be a
+    // property with a default set by the calling convention which can be
+    // overridden by attributes. For now, use the subtarget feature as a
+    // placeholder attribute. The function arguments only purpose is to
+    // discourage use without a function context until this is removed.
     return FP32Denormals;
   }
 
   bool hasFPExceptions() const {
     return FPExceptions;
   }
 
   bool hasSDWA() const {
bool dumpCode() const {
     return DumpCode;
   }
 
   /// Return the amount of LDS that can be used that will not restrict the
   /// occupancy lower than WaveCount.
   unsigned getMaxLocalMemSizeWithWaveCount(unsigned WaveCount,
                                            const Function &) const;
 
-  bool hasFP16Denormals() const {
+  /// Alias for hasFP64FP16Denormals
+  bool hasFP16Denormals(const Function &F) const {
     return FP64FP16Denormals;
   }
 
-  bool hasFP64Denormals() const {
+  /// Alias for hasFP64FP16Denormals
+  bool hasFP64Denormals(const Function &F) const {
+    return FP64FP16Denormals;
+  }
+
+  bool hasFP64FP16Denormals(const Function &F) const {
     return FP64FP16Denormals;
   }
 
   bool supportsMinMaxDenormModes() const {
     return getGeneration() >= AMDGPUSubtarget::GFX9;
   }
 
   /// \returns If target supports S_DENORM_MODE.

llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h

 class AMDGPUTTIImpl final : public BasicTTIImplBase<AMDGPUTTIImpl> {
   using BaseT = BasicTTIImplBase<AMDGPUTTIImpl>;
   using TTI = TargetTransformInfo;
 
   friend BaseT;
 
   Triple TargetTriple;
 
-  const TargetSubtargetInfo *ST;
+  const GCNSubtarget *ST;
   const TargetLoweringBase *TLI;
 
   const TargetSubtargetInfo *getST() const { return ST; }
   const TargetLoweringBase *getTLI() const { return TLI; }
 
 public:
   explicit AMDGPUTTIImpl(const AMDGPUTargetMachine *TM, const Function &F)
       : BaseT(TM, F.getParent()->getDataLayout()),
class GCNTTIImpl final : public BasicTTIImplBase<GCNTTIImpl> {
   using TTI = TargetTransformInfo;
 
   friend BaseT;
 
   const GCNSubtarget *ST;
   const AMDGPUTargetLowering *TLI;
   AMDGPUTTIImpl CommonTTI;
   bool IsGraphicsShader;
+  bool HasFP32Denormals;
 
   const FeatureBitset InlineFeatureIgnoreList = {
     // Codegen control options which don't matter.
     AMDGPU::FeatureEnableLoadStoreOpt,
     AMDGPU::FeatureEnableSIScheduler,
     AMDGPU::FeatureEnableUnsafeDSOffsetFolding,
     AMDGPU::FeatureFlatForGlobal,
     AMDGPU::FeaturePromoteAlloca,
class GCNTTIImpl final : public BasicTTIImplBase<GCNTTIImpl> {
   }
 
 public:
   explicit GCNTTIImpl(const AMDGPUTargetMachine *TM, const Function &F)
     : BaseT(TM, F.getParent()->getDataLayout()),
       ST(static_cast<const GCNSubtarget*>(TM->getSubtargetImpl(F))),
       TLI(ST->getTargetLowering()),
       CommonTTI(TM, F),
-      IsGraphicsShader(AMDGPU::isShader(F.getCallingConv())) {}
+      IsGraphicsShader(AMDGPU::isShader(F.getCallingConv())),
+      HasFP32Denormals(ST->hasFP32Denormals(F)) { }
 
   bool hasBranchDivergence() { return true; }
 
   void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
                                TTI::UnrollingPreferences &UP);
 
   TTI::PopcntSupportKind getPopcntSupport(unsigned TyWidth) {
     assert(isPowerOf2_32(TyWidth) && "Ty width must be power of 2");

llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp

if (SLT == MVT::f64) {
       if (!ST->hasUsableDivScaleConditionOutput())
         Cost += 3 * getFullRateInstrCost();
 
       return LT.first * Cost * NElts;
     }
 
     if (!Args.empty() && match(Args[0], PatternMatch::m_FPOne())) {
       // TODO: This is more complicated, unsafe flags etc.
-      if ((SLT == MVT::f32 && !ST->hasFP32Denormals()) ||
+      if ((SLT == MVT::f32 && !HasFP32Denormals) ||
           (SLT == MVT::f16 && ST->has16BitInsts())) {
         return LT.first * getQuarterRateInstrCost() * NElts;
       }
     }
 
     if (SLT == MVT::f16 && ST->has16BitInsts()) {
       // 2 x v_cvt_f32_f16
       // f32 rcp
       // f32 fmul
       // v_cvt_f16_f32
       // f16 div_fixup
       int Cost = 4 * getFullRateInstrCost() + 2 * getQuarterRateInstrCost();
       return LT.first * Cost * NElts;
     }
 
     if (SLT == MVT::f32 || SLT == MVT::f16) {
       int Cost = 7 * getFullRateInstrCost() + 1 * getQuarterRateInstrCost();
 
-      if (!ST->hasFP32Denormals()) {
+      if (!HasFP32Denormals) {
         // FP mode switches.
         Cost += 2 * getFullRateInstrCost();
       }
 
       return LT.first * NElts * Cost;
     }
     break;
   default:
unsigned GCNTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Index,
   }
 
   return BaseT::getShuffleCost(Kind, Tp, Index, SubTp);
 }
 
 bool GCNTTIImpl::areInlineCompatible(const Function *Caller,
                                      const Function *Callee) const {
   const TargetMachine &TM = getTLI()->getTargetMachine();
-  const FeatureBitset &CallerBits =
-    TM.getSubtargetImpl(*Caller)->getFeatureBits();
-  const FeatureBitset &CalleeBits =
-    TM.getSubtargetImpl(*Callee)->getFeatureBits();
+  const GCNSubtarget *CallerST
+    = static_cast<const GCNSubtarget *>(TM.getSubtargetImpl(*Caller));
+  const GCNSubtarget *CalleeST
+    = static_cast<const GCNSubtarget *>(TM.getSubtargetImpl(*Callee));
+
+  const FeatureBitset &CallerBits = CallerST->getFeatureBits();
+  const FeatureBitset &CalleeBits = CalleeST->getFeatureBits();
 
   FeatureBitset RealCallerBits = CallerBits & ~InlineFeatureIgnoreList;
   FeatureBitset RealCalleeBits = CalleeBits & ~InlineFeatureIgnoreList;
   if ((RealCallerBits & RealCalleeBits) != RealCalleeBits)
     return false;
 
   // FIXME: dx10_clamp can just take the caller setting, but there seems to be
   // no way to support merge for backend defined attributes.
-  AMDGPU::SIModeRegisterDefaults CallerMode(*Caller);
-  AMDGPU::SIModeRegisterDefaults CalleeMode(*Callee);
+  AMDGPU::SIModeRegisterDefaults CallerMode(*Caller, *CallerST);
+  AMDGPU::SIModeRegisterDefaults CalleeMode(*Callee, *CalleeST);
   return CallerMode.isInlineCompatible(CalleeMode);
 }
 
 void GCNTTIImpl::getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
                                          TTI::UnrollingPreferences &UP) {
   CommonTTI.getUnrollingPreferences(L, SE, UP);
 }
 

llvm/lib/Target/AMDGPU/R600ISelLowering.cpp

R600TargetLowering::R600TargetLowering(const TargetMachine &TM,
   setOperationAction(ISD::SRL_PARTS, MVT::i32, Custom);
   setOperationAction(ISD::SRA_PARTS, MVT::i32, Custom);
 
   if (!Subtarget->hasFMA()) {
     setOperationAction(ISD::FMA, MVT::f32, Expand);
     setOperationAction(ISD::FMA, MVT::f64, Expand);
   }
 
-  // FIXME: This was moved from AMDGPUTargetLowering, I'm not sure if we
-  // need it for R600.
-  if (!Subtarget->hasFP32Denormals())
-    setOperationAction(ISD::FMAD, MVT::f32, Legal);
+  // FIXME: May need no denormals check
 
   if (!Subtarget->hasBFI()) {
     // fcopysign can be done in a single instruction with BFI.
     setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand);
     setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand);
   }
 
   if (!Subtarget->hasBCNT(32))

llvm/lib/Target/AMDGPU/SIFoldOperands.cpp

 // handled, so will anything other than that break?
 std::pair<const MachineOperand *, int>
 SIFoldOperands::isOMod(const MachineInstr &MI) const {
   unsigned Op = MI.getOpcode();
   switch (Op) {
   case AMDGPU::V_MUL_F32_e64:
   case AMDGPU::V_MUL_F16_e64: {
     // If output denormals are enabled, omod is ignored.
-    if ((Op == AMDGPU::V_MUL_F32_e64 && ST->hasFP32Denormals()) ||
-        (Op == AMDGPU::V_MUL_F16_e64 && ST->hasFP16Denormals()))
+    if ((Op == AMDGPU::V_MUL_F32_e64 && MFI->getMode().FP32Denormals) ||
+        (Op == AMDGPU::V_MUL_F16_e64 && MFI->getMode().FP64FP16Denormals))
       return std::make_pair(nullptr, SIOutMods::NONE);
 
     const MachineOperand *RegOp = nullptr;
     const MachineOperand *ImmOp = nullptr;
     const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
     const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
     if (Src0->isImm()) {
       ImmOp = Src0;
if (OMod == SIOutMods::NONE ||
         TII->hasModifiersSet(MI, AMDGPU::OpName::clamp))
       return std::make_pair(nullptr, SIOutMods::NONE);
 
     return std::make_pair(RegOp, OMod);
   }
   case AMDGPU::V_ADD_F32_e64:
   case AMDGPU::V_ADD_F16_e64: {
     // If output denormals are enabled, omod is ignored.
-    if ((Op == AMDGPU::V_ADD_F32_e64 && ST->hasFP32Denormals()) ||
-        (Op == AMDGPU::V_ADD_F16_e64 && ST->hasFP16Denormals()))
+    if ((Op == AMDGPU::V_ADD_F32_e64 && MFI->getMode().FP32Denormals) ||
+        (Op == AMDGPU::V_ADD_F16_e64 && MFI->getMode().FP64FP16Denormals))
       return std::make_pair(nullptr, SIOutMods::NONE);
 
     // Look through the DAGCombiner canonicalization fmul x, 2 -> fadd x, x
     const MachineOperand *Src0 = TII->getNamedOperand(MI, AMDGPU::OpName::src0);
     const MachineOperand *Src1 = TII->getNamedOperand(MI, AMDGPU::OpName::src1);
 
     if (Src0->isReg() && Src1->isReg() && Src0->getReg() == Src1->getReg() &&
         Src0->getSubReg() == Src1->getSubReg() &&

llvm/lib/Target/AMDGPU/SIISelLowering.h

void computeKnownBitsForFrameIndex(const SDValue Op,
                                      const SelectionDAG &DAG,
                                      unsigned Depth = 0) const override;
 
   bool isSDNodeSourceOfDivergence(const SDNode *N,
     FunctionLoweringInfo *FLI, LegacyDivergenceAnalysis *DA) const override;
 
   bool isCanonicalized(SelectionDAG &DAG, SDValue Op,
                        unsigned MaxDepth = 5) const;
-  bool denormalsEnabledForType(EVT VT) const;
+  bool denormalsEnabledForType(const SelectionDAG &DAG, EVT VT) const;
 
   bool isKnownNeverNaNForTargetNode(SDValue Op,
                                     const SelectionDAG &DAG,
                                     bool SNaN = false,
                                     unsigned Depth = 0) const override;
   AtomicExpansionKind shouldExpandAtomicRMWInIR(AtomicRMWInst *) const override;
 
   virtual const TargetRegisterClass *

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

static cl::opt<bool> EnableVGPRIndexMode(
   cl::desc("Use GPR indexing mode instead of movrel for vector indexing"),
   cl::init(false));
 
 static cl::opt<bool> DisableLoopAlignment(
   "amdgpu-disable-loop-alignment",
   cl::desc("Do not align and prefetch loops"),
   cl::init(false));
 
+static bool hasFP32Denormals(const MachineFunction &MF) {
+  const SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
+  return Info->getMode().FP32Denormals;
+}
+
+static bool hasFP64FP16Denormals(const MachineFunction &MF) {
+  const SIMachineFunctionInfo *Info = MF.getInfo<SIMachineFunctionInfo>();
+  return Info->getMode().FP64FP16Denormals;
+}
+
 static unsigned findFirstFreeSGPR(CCState &CCInfo) {
   unsigned NumSGPRs = AMDGPU::SGPR_32RegClass.getNumRegs();
   for (unsigned Reg = 0; Reg < NumSGPRs; ++Reg) {
     if (!CCInfo.isAllocated(AMDGPU::SGPR0 + Reg)) {
       return AMDGPU::SGPR0 + Reg;
     }
   }
   llvm_unreachable("Cannot allocate sgpr");
#endif
   setOperationAction(ISD::DEBUGTRAP, MVT::Other, Custom);
 
   if (Subtarget->has16BitInsts()) {
     setOperationAction(ISD::FLOG, MVT::f16, Custom);
     setOperationAction(ISD::FEXP, MVT::f16, Custom);
     setOperationAction(ISD::FLOG10, MVT::f16, Custom);
   }
 
-  // v_mad_f32 does not support denormals according to some sources.
-  if (!Subtarget->hasFP32Denormals())
-    setOperationAction(ISD::FMAD, MVT::f32, Legal);
+  // v_mad_f32 does not support denormals. We report it as unconditionally
+  // legal, and the context where it is formed will disallow it when fp32
+  // denormals are enabled.
 
   if (!Subtarget->hasBFI()) {
     // fcopysign can be done in a single instruction with BFI.
     setOperationAction(ISD::FCOPYSIGN, MVT::f32, Expand);
     setOperationAction(ISD::FCOPYSIGN, MVT::f64, Expand);
   }
 
   if (!Subtarget->hasBCNT(32))
if (Subtarget->has16BitInsts()) {
     // F16 - VOP2 Actions.
     setOperationAction(ISD::BR_CC, MVT::f16, Expand);
     setOperationAction(ISD::SELECT_CC, MVT::f16, Expand);
 
     setOperationAction(ISD::FDIV, MVT::f16, Custom);
 
     // F16 - VOP3 Actions.
     setOperationAction(ISD::FMA, MVT::f16, Legal);
-    if (!Subtarget->hasFP16Denormals() && STI.hasMadF16())
+    if (STI.hasMadF16())
       setOperationAction(ISD::FMAD, MVT::f16, Legal);
 
     for (MVT VT : {MVT::v2i16, MVT::v2f16, MVT::v4i16, MVT::v4f16}) {
       for (unsigned Op = 0; Op < ISD::BUILTIN_OP_END; ++Op) {
         switch (Op) {
         case ISD::LOAD:
         case ISD::STORE:
         case ISD::BUILD_VECTOR:

 // v_mad_mix* support a conversion from f16 to f32.
 //
 // There is only one special case when denormals are enabled we don't currently,
 // where this is OK to use.
 bool SITargetLowering::isFPExtFoldable(const SelectionDAG &DAG, unsigned Opcode,
                                        EVT DestVT, EVT SrcVT) const {
   return ((Opcode == ISD::FMAD && Subtarget->hasMadMixInsts()) ||
           (Opcode == ISD::FMA && Subtarget->hasFmaMixInsts())) &&
-         DestVT.getScalarType() == MVT::f32 && !Subtarget->hasFP32Denormals() &&
-         SrcVT.getScalarType() == MVT::f16;
+    DestVT.getScalarType() == MVT::f32 &&
+    SrcVT.getScalarType() == MVT::f16 &&
+    !hasFP32Denormals(DAG.getMachineFunction());
 }
 
 bool SITargetLowering::isShuffleMaskLegal(ArrayRef<int>, EVT) const {
   // SI has some legal vector types, but no legal vector operations. Say no
   // shuffles are legal in order to prefer scalarizing some vector operations.
   return false;
 }
 
bool SITargetLowering::isFMAFasterThanFMulAndFAdd(const MachineFunction &MF,
   VT = VT.getScalarType();
 
   switch (VT.getSimpleVT().SimpleTy) {
   case MVT::f32: {
     // This is as fast on some subtargets. However, we always have full rate f32
     // mad available which returns the same result as the separate operations
     // which we should prefer over fma. We can't use this if we want to support
     // denormals, so only report this in these cases.
-    if (Subtarget->hasFP32Denormals())
+    if (hasFP32Denormals(MF))
       return Subtarget->hasFastFMAF32() || Subtarget->hasDLInsts();
 
     // If the subtarget has v_fmac_f32, that's just as good as v_mac_f32.
     return Subtarget->hasFastFMAF32() && Subtarget->hasDLInsts();
   }
   case MVT::f64:
     return true;
   case MVT::f16:
-    return Subtarget->has16BitInsts() && Subtarget->hasFP16Denormals();
+    return Subtarget->has16BitInsts() && hasFP64FP16Denormals(MF);
   default:
     break;
   }
 
   return false;
 }
 
 bool SITargetLowering::isFMADLegalForFAddFSub(const SelectionDAG &DAG,
                                               const SDNode *N) const {
   // TODO: Check future ftz flag
   // v_mad_f32/v_mac_f32 do not support denormals.
   EVT VT = N->getValueType(0);
   if (VT == MVT::f32)
-    return !Subtarget->hasFP32Denormals();
-  if (VT == MVT::f16)
-    return !Subtarget->hasFP16Denormals() && Subtarget->hasMadF16();
+    return !hasFP32Denormals(DAG.getMachineFunction());
+  if (VT == MVT::f16) {
+    return Subtarget->hasMadF16() &&
+           !hasFP64FP16Denormals(DAG.getMachineFunction());
+  }
 
   return false;
 }
 
 //===----------------------------------------------------------------------===//
 // Custom DAG Lowering Operations
 //===----------------------------------------------------------------------===//
 
SDValue SITargetLowering::lowerFastUnsafeFDIV(SDValue Op,
                                               SelectionDAG &DAG) const {
   SDLoc SL(Op);
   SDValue LHS = Op.getOperand(0);
   SDValue RHS = Op.getOperand(1);
   EVT VT = Op.getValueType();
   const SDNodeFlags Flags = Op->getFlags();
   bool Unsafe = DAG.getTarget().Options.UnsafeFPMath || Flags.hasAllowReciprocal();
 
-  if (!Unsafe && VT == MVT::f32 && Subtarget->hasFP32Denormals())
+  if (!Unsafe && VT == MVT::f32 && hasFP32Denormals(DAG.getMachineFunction()))
     return SDValue();
 
   if (const ConstantFPSDNode *CLHS = dyn_cast<ConstantFPSDNode>(LHS)) {
     if (Unsafe || VT == MVT::f32 || VT == MVT::f16) {
       if (CLHS->isExactlyValue(1.0)) {
         // v_rcp_f32 and v_rsq_f32 do not support denormals, and according to
         // the CI documentation has a worst case error of 1 ulp.
         // OpenCL requires <= 2.5 ulp for 1.0 / x, so it should always be OK to
SDValue SITargetLowering::lowerFDIV_FAST(SDValue Op, SelectionDAG &DAG) const {
   return DAG.getNode(ISD::FMUL, SL, MVT::f32, r3, Mul);
 }
 
 // Returns immediate value for setting the F32 denorm mode when using the
 // S_DENORM_MODE instruction.
 static const SDValue getSPDenormModeValue(int SPDenormMode, SelectionDAG &DAG,
                                           const SDLoc &SL, const GCNSubtarget *ST) {
   assert(ST->hasDenormModeInst() && "Requires S_DENORM_MODE");
-  int DPDenormModeDefault = ST->hasFP64Denormals()
+  int DPDenormModeDefault = hasFP64FP16Denormals(DAG.getMachineFunction())
                                 ? FP_DENORM_FLUSH_NONE
                                 : FP_DENORM_FLUSH_IN_FLUSH_OUT;
 
   int Mode = SPDenormMode | (DPDenormModeDefault << 2);
   return DAG.getTargetConstant(Mode, SL, MVT::i32);
 }
 
 SDValue SITargetLowering::LowerFDIV32(SDValue Op, SelectionDAG &DAG) const {
SDValue SITargetLowering::LowerFDIV32(SDValue Op, SelectionDAG &DAG) const {
   SDValue NegDivScale0 = DAG.getNode(ISD::FNEG, SL, MVT::f32,
                                      DenominatorScaled);
 
   const unsigned Denorm32Reg = AMDGPU::Hwreg::ID_MODE |
                                (4 << AMDGPU::Hwreg::OFFSET_SHIFT_) |
                                (1 << AMDGPU::Hwreg::WIDTH_M1_SHIFT_);
   const SDValue BitField = DAG.getTargetConstant(Denorm32Reg, SL, MVT::i16);
 
-  if (!Subtarget->hasFP32Denormals()) {
+  const bool HasFP32Denormals = hasFP32Denormals(DAG.getMachineFunction());
+
+  if (!HasFP32Denormals) {
     SDVTList BindParamVTs = DAG.getVTList(MVT::Other, MVT::Glue);
 
     SDValue EnableDenorm;
     if (Subtarget->hasDenormModeInst()) {
       const SDValue EnableDenormValue =
           getSPDenormModeValue(FP_DENORM_FLUSH_NONE, DAG, SL, Subtarget);
 
       EnableDenorm = DAG.getNode(AMDGPUISD::DENORM_MODE, SL, BindParamVTs,
SDValue SITargetLowering::LowerFDIV32(SDValue Op, SelectionDAG &DAG) const {
   SDValue Fma2 = getFPTernOp(DAG, ISD::FMA, SL, MVT::f32, NegDivScale0, Mul,
                              NumeratorScaled, Mul);
 
   SDValue Fma3 = getFPTernOp(DAG, ISD::FMA, SL, MVT::f32, Fma2, Fma1, Mul, Fma2);
 
   SDValue Fma4 = getFPTernOp(DAG, ISD::FMA, SL, MVT::f32, NegDivScale0, Fma3,
                              NumeratorScaled, Fma3);
 
-  if (!Subtarget->hasFP32Denormals()) {
-
+  if (!HasFP32Denormals) {
     SDValue DisableDenorm;
     if (Subtarget->hasDenormModeInst()) {
       const SDValue DisableDenormValue =
           getSPDenormModeValue(FP_DENORM_FLUSH_IN_FLUSH_OUT, DAG, SL, Subtarget);
 
       DisableDenorm = DAG.getNode(AMDGPUISD::DENORM_MODE, SL, MVT::Other,
                                   Fma4.getValue(1), DisableDenormValue,
                                   Fma4.getValue(2));
bool SITargetLowering::isCanonicalized(SelectionDAG &DAG, SDValue Op,
   unsigned Opcode = Op.getOpcode();
   if (Opcode == ISD::FCANONICALIZE)
     return true;
 
   if (auto *CFP = dyn_cast<ConstantFPSDNode>(Op)) {
     auto F = CFP->getValueAPF();
     if (F.isNaN() && F.isSignaling())
       return false;
-    return !F.isDenormal() || denormalsEnabledForType(Op.getValueType());
+    return !F.isDenormal() || denormalsEnabledForType(DAG, Op.getValueType());
   }
 
   // If source is a result of another standard FP operation it is already in
   // canonical form.
   if (MaxDepth == 0)
     return false;
 
   switch (Opcode) {
bool SITargetLowering::isCanonicalized(SelectionDAG &DAG, SDValue Op,
   case AMDGPUISD::FMAX3:
   case AMDGPUISD::FMIN3: {
     // FIXME: Shouldn't treat the generic operations different based these.
     // However, we aren't really required to flush the result from
     // minnum/maxnum..
 
     // snans will be quieted, so we only need to worry about denormals.
     if (Subtarget->supportsMinMaxDenormModes() ||
-        denormalsEnabledForType(Op.getValueType()))
+        denormalsEnabledForType(DAG, Op.getValueType()))
       return true;
 
     // Flushing may be required.
     // In pre-GFX9 targets V_MIN_F32 and others do not flush denorms. For such
     // targets need to check their input recursively.
 
     // FIXME: Does this apply with clamp? It's implemented with max.
     for (unsigned I = 0, E = Op.getNumOperands(); I != E; ++I) {
case Intrinsic::amdgcn_fdot2:
       return true;
     default:
       break;
     }
 
     LLVM_FALLTHROUGH;
   }
   default:
-    return denormalsEnabledForType(Op.getValueType()) &&
+    return denormalsEnabledForType(DAG, Op.getValueType()) &&
            DAG.isKnownNeverSNaN(Op);
   }
 
   llvm_unreachable("invalid operation");
 }
 
 // Constant fold canonicalize.
 SDValue SITargetLowering::getCanonicalConstantFP(
   SelectionDAG &DAG, const SDLoc &SL, EVT VT, const APFloat &C) const {
   // Flush denormals to 0 if not enabled.
-  if (C.isDenormal() && !denormalsEnabledForType(VT))
+  if (C.isDenormal() && !denormalsEnabledForType(DAG, VT))
     return DAG.getConstantFP(0.0, SL, VT);
 
   if (C.isNaN()) {
     APFloat CanonicalQNaN = APFloat::getQNaN(C.getSemantics());
     if (C.isSignaling()) {
       // Quiet a signaling NaN.
       // FIXME: Is this supposed to preserve payload bits?
       return DAG.getConstantFP(CanonicalQNaN, SL, VT);

 
 unsigned SITargetLowering::getFusedOpcode(const SelectionDAG &DAG,
                                           const SDNode *N0,
                                           const SDNode *N1) const {
   EVT VT = N0->getValueType(0);
 
   // Only do this if we are not trying to support denormals. v_mad_f32 does not
   // support denormals ever.
-  if (((VT == MVT::f32 && !Subtarget->hasFP32Denormals()) ||
-       (VT == MVT::f16 && !Subtarget->hasFP16Denormals() &&
+  if (((VT == MVT::f32 && !hasFP32Denormals(DAG.getMachineFunction())) ||
+       (VT == MVT::f16 && !hasFP64FP16Denormals(DAG.getMachineFunction()) &&
         getSubtarget()->hasMadF16())) &&
        isOperationLegal(ISD::FMAD, VT))
     return ISD::FMAD;
 
   const TargetOptions &Options = DAG.getTarget().Options;
   if ((Options.AllowFPOpFusion == FPOpFusion::Fast || Options.UnsafeFPMath ||
        (N0->getFlags().hasAllowContract() &&
         N1->getFlags().hasAllowContract())) &&
case ISD::INTRINSIC_WO_CHAIN:
       cast<ConstantSDNode>(N->getOperand(0))->getZExtValue());
     case ISD::INTRINSIC_W_CHAIN:
       return AMDGPU::isIntrinsicSourceOfDivergence(
       cast<ConstantSDNode>(N->getOperand(1))->getZExtValue());
   }
   return false;
 }
 
-bool SITargetLowering::denormalsEnabledForType(EVT VT) const {
+bool SITargetLowering::denormalsEnabledForType(const SelectionDAG &DAG,
+                                               EVT VT) const {
   switch (VT.getScalarType().getSimpleVT().SimpleTy) {
   case MVT::f32:
-    return Subtarget->hasFP32Denormals();
+    return hasFP32Denormals(DAG.getMachineFunction());
   case MVT::f64:
-    return Subtarget->hasFP64Denormals();
   case MVT::f16:
-    return Subtarget->hasFP16Denormals();
+    return hasFP64FP16Denormals(DAG.getMachineFunction());
   default:
     return false;
   }
 }
 
 bool SITargetLowering::isKnownNeverNaNForTargetNode(SDValue Op,
                                                     const SelectionDAG &DAG,
                                                     bool SNaN,

llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h

class SIMachineFunctionInfo final : public AMDGPUMachineFunction {
   // the ScratchWaveOffsetReg.
   unsigned FrameOffsetReg = AMDGPU::FP_REG;
 
   // Top of the stack SGPR offset derived from the ScratchWaveOffsetReg.
   unsigned StackPtrOffsetReg = AMDGPU::SP_REG;
 
   AMDGPUFunctionArgInfo ArgInfo;
 
-  // State of MODE register, assumed FP mode.
-  AMDGPU::SIModeRegisterDefaults Mode;
-
   // Graphics info.
   unsigned PSInputAddr = 0;
   unsigned PSInputEnable = 0;
 
   /// Number of bytes of arguments this function has on the stack. If the callee
   /// is expected to restore the argument stack this should be a multiple of 16,
   /// all usable during a tail call.
   ///
public:
   }
 
   MCPhysReg getVGPRToAGPRSpill(int FrameIndex, unsigned Lane) const {
     auto I = VGPRToAGPRSpills.find(FrameIndex);
     return (I == VGPRToAGPRSpills.end()) ? (MCPhysReg)AMDGPU::NoRegister
                                          : I->second.Lanes[Lane];
   }
 
-  AMDGPU::SIModeRegisterDefaults getMode() const {
-    return Mode;
-  }
-
   bool haveFreeLanesForSGPRSpill(const MachineFunction &MF,
                                  unsigned NumLane) const;
   bool allocateSGPRSpillToVGPR(MachineFunction &MF, int FI);
   bool allocateVGPRSpillToAGPR(MachineFunction &MF, int FI, bool isAGPRtoVGPR);
   void removeDeadFrameIndices(MachineFrameInfo &MFI);
 
   bool hasCalculatedTID() const { return TIDReg != 0; };
   unsigned getTIDReg() const { return TIDReg; };

llvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp

 #include <vector>
 
 #define MAX_LANES 64
 
 using namespace llvm;
 
 SIMachineFunctionInfo::SIMachineFunctionInfo(const MachineFunction &MF)
   : AMDGPUMachineFunction(MF),
-    Mode(MF.getFunction()),
     PrivateSegmentBuffer(false),
     DispatchPtr(false),
     QueuePtr(false),
     KernargSegmentPtr(false),
     DispatchID(false),
     FlatScratchInit(false),
     WorkGroupIDX(false),
     WorkGroupIDY(false),

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h

struct SIModeRegisterDefaults {
   bool FP64FP16Denormals : 1;
 
   SIModeRegisterDefaults() :
     IEEE(true),
     DX10Clamp(true),
     FP32Denormals(true),
     FP64FP16Denormals(true) {}
 
-  SIModeRegisterDefaults(const Function &F);
+  // FIXME: Should not depend on the subtarget
+  SIModeRegisterDefaults(const Function &F, const GCNSubtarget &ST);
 
   static SIModeRegisterDefaults getDefaultForCallingConv(CallingConv::ID CC) {
     const bool IsCompute = AMDGPU::isCompute(CC);
 
     SIModeRegisterDefaults Mode;
     Mode.DX10Clamp = true;
     Mode.IEEE = IsCompute;
     Mode.FP32Denormals = false; // FIXME: Should be on by default.
     Mode.FP64FP16Denormals = true;
     return Mode;
   }
 
   bool operator ==(const SIModeRegisterDefaults Other) const {
     return IEEE == Other.IEEE && DX10Clamp == Other.DX10Clamp &&
            FP32Denormals == Other.FP32Denormals &&
            FP64FP16Denormals == Other.FP64FP16Denormals;
   }
 
+  /// Returns true if a flag is compatible if it's enabled in the callee, but
+  /// disabled in the caller.
+  static bool oneWayCompatible(bool CallerMode, bool CalleeMode) {
+    return CallerMode == CalleeMode || (CallerMode && !CalleeMode);
+  }
+
   // FIXME: Inlining should be OK for dx10-clamp, since the caller's mode should
   // be able to override.
   bool isInlineCompatible(SIModeRegisterDefaults CalleeMode) const {
-    return *this == CalleeMode;
+    if (DX10Clamp != CalleeMode.DX10Clamp)
+      return false;
+    if (IEEE != CalleeMode.IEEE)
+      return false;
+
+    // Allow inlining denormals enabled into denormals flushed functions.
+    return oneWayCompatible(FP64FP16Denormals, CalleeMode.FP64FP16Denormals) &&
+           oneWayCompatible(FP32Denormals, CalleeMode.FP32Denormals);
   }
 };
 
 } // end namespace AMDGPU
 } // end namespace llvm
 
 #endif // LLVM_LIB_TARGET_AMDGPU_UTILS_AMDGPUBASEINFO_H

llvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp

if (Overflow > 0 &&
       Subtarget->getGeneration() <= AMDGPUSubtarget::SEA_ISLANDS)
     return false;
 
   ImmOffset = Imm;
   SOffset = Overflow;
   return true;
 }
 
-SIModeRegisterDefaults::SIModeRegisterDefaults(const Function &F) {
+SIModeRegisterDefaults::SIModeRegisterDefaults(const Function &F,
+                                               const GCNSubtarget &ST) {
   *this = getDefaultForCallingConv(F.getCallingConv());
 
   StringRef IEEEAttr = F.getFnAttribute("amdgpu-ieee").getValueAsString();
   if (!IEEEAttr.empty())
     IEEE = IEEEAttr == "true";
 
   StringRef DX10ClampAttr
     = F.getFnAttribute("amdgpu-dx10-clamp").getValueAsString();
   if (!DX10ClampAttr.empty())
     DX10Clamp = DX10ClampAttr == "true";
+
+  FP32Denormals = ST.hasFP32Denormals(F);
+  FP64FP16Denormals = ST.hasFP64FP16Denormals(F);
 }
 
 namespace {
 
 struct SourceOfDivergence {
   unsigned Intr;
 };
 const SourceOfDivergence *lookupSourceOfDivergence(unsigned Intr);

llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir

machineFunctionInfo:
   mode:
     fp64-fp16-denormals: false
 
 body: |
   bb.0:
     liveins: $vgpr0
     ; GFX9-LABEL: name: fcanonicalize_f16_flush
     ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
-    ; GFX9: [[V_MAX_F16_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F16_e64 0, [[COPY]], 0, [[COPY]], 0, 0, implicit $exec
-    ; GFX9: S_ENDPGM 0, implicit [[V_MAX_F16_e64_]]
+    ; GFX9: [[V_MUL_F16_e64_:%[0-9]+]]:vgpr_32 = V_MUL_F16_e64 0, 15360, 0, [[COPY]], 0, 0, implicit $exec
+    ; GFX9: S_ENDPGM 0, implicit [[V_MUL_F16_e64_]]
     %0:vgpr(s32) = COPY $vgpr0
     %1:vgpr(s16) = G_TRUNC %0
     %2:vgpr(s16) = G_FCANONICALIZE %1
     S_ENDPGM 0, implicit %2
 ...
 
 ---
 
 name:            fcanonicalize_f32_denorm
 legalized:       true
 regBankSelected: true
 machineFunctionInfo:
   mode:
     fp32-denormals: true
 
 body: |
   bb.0:
     liveins: $vgpr0
 
     ; GFX9-LABEL: name: fcanonicalize_f32_denorm
     ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
-    ; GFX9: [[V_MUL_F32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_F32_e64 0, 1065353216, 0, [[COPY]], 0, 0, implicit $exec
-    ; GFX9: S_ENDPGM 0, implicit [[V_MUL_F32_e64_]]
+    ; GFX9: [[V_MAX_F32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 0, [[COPY]], 0, [[COPY]], 0, 0, implicit $exec
+    ; GFX9: S_ENDPGM 0, implicit [[V_MAX_F32_e64_]]
     %0:vgpr(s32) = COPY $vgpr0
     %1:vgpr(s32) = G_FCANONICALIZE %0
     S_ENDPGM 0, implicit %1
 ...
 
 ---
 
 name:            fcanonicalize_f32_flush
mode:
     fp64-fp16-denormals: false
 
 body: |
   bb.0:
     liveins: $vgpr0_vgpr1
 
     ; GFX9-LABEL: name: fcanonicalize_f64_flush
     ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
-    ; GFX9: [[V_MAX_F64_:%[0-9]+]]:vreg_64 = V_MAX_F64 0, [[COPY]], 0, [[COPY]], 0, 0, implicit $exec
-    ; GFX9: S_ENDPGM 0, implicit [[V_MAX_F64_]]
+    ; GFX9: [[V_MUL_F64_:%[0-9]+]]:vreg_64 = V_MUL_F64 0, 4607182418800017408, 0, [[COPY]], 0, 0, implicit $exec
+    ; GFX9: S_ENDPGM 0, implicit [[V_MUL_F64_]]
     %0:vgpr(s64) = COPY $vgpr0_vgpr1
     %1:vgpr(s64) = G_FCANONICALIZE %0
     S_ENDPGM 0, implicit %1
 ...
 
 ---
 
 name:            fcanonicalize_fabs_f32_denorm
 legalized:       true
 regBankSelected: true
 machineFunctionInfo:
   mode:
     fp32-denormals: true
 
 body: |
   bb.0:
     liveins: $vgpr0
     ; GFX9-LABEL: name: fcanonicalize_fabs_f32_denorm
     ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
-    ; GFX9: [[V_MUL_F32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_F32_e64 0, 1065353216, 2, [[COPY]], 0, 0, implicit $exec
-    ; GFX9: S_ENDPGM 0, implicit [[V_MUL_F32_e64_]]
+    ; GFX9: [[V_MAX_F32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 2, [[COPY]], 2, [[COPY]], 0, 0, implicit $exec
+    ; GFX9: S_ENDPGM 0, implicit [[V_MAX_F32_e64_]]
     %0:vgpr(s32) = COPY $vgpr0
     %1:vgpr(s32) = G_FABS %0
     %2:vgpr(s32) = G_FCANONICALIZE %1
     S_ENDPGM 0, implicit %2
 ...
 
 
 ---
machineFunctionInfo:
   mode:
     fp32-denormals: true
 
 body: |
   bb.0:
     liveins: $vgpr0
     ; GFX9-LABEL: name: fcanonicalize_fneg_f32_denorm
     ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
-    ; GFX9: [[V_MUL_F32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_F32_e64 0, 3212836864, 0, [[COPY]], 0, 0, implicit $exec
-    ; GFX9: S_ENDPGM 0, implicit [[V_MUL_F32_e64_]]
+    ; GFX9: [[V_MAX_F32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 1, [[COPY]], 1, [[COPY]], 0, 0, implicit $exec
+    ; GFX9: S_ENDPGM 0, implicit [[V_MAX_F32_e64_]]
     %0:vgpr(s32) = COPY $vgpr0
     %1:vgpr(s32) = G_FNEG %0
     %2:vgpr(s32) = G_FCANONICALIZE %1
     S_ENDPGM 0, implicit %2
 ...
 
 ---
 

 
 body: |
   bb.0:
     liveins: $vgpr0
     ; GFX9-LABEL: name: fcanonicalize_fneg_fabs_f32_denorm
     ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
     ; GFX9: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2147483648
     ; GFX9: [[V_XOR_B32_e32_:%[0-9]+]]:vgpr_32 = V_XOR_B32_e32 [[S_MOV_B32_]], [[COPY]], implicit $exec
-    ; GFX9: [[V_MUL_F32_e64_:%[0-9]+]]:vgpr_32 = V_MUL_F32_e64 0, 1065353216, 2, [[V_XOR_B32_e32_]], 0, 0, implicit $exec
-    ; GFX9: S_ENDPGM 0, implicit [[V_MUL_F32_e64_]]
+    ; GFX9: [[V_MAX_F32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_F32_e64 2, [[V_XOR_B32_e32_]], 2, [[V_XOR_B32_e32_]], 0, 0, implicit $exec
+    ; GFX9: S_ENDPGM 0, implicit [[V_MAX_F32_e64_]]
     %0:vgpr(s32) = COPY $vgpr0
     %1:vgpr(s32) = G_FNEG %0
     %2:vgpr(s32) = G_FABS %1
     %3:vgpr(s32) = G_FCANONICALIZE %2
     S_ENDPGM 0, implicit %3
 ...
 
 ---

llvm/utils/UpdateTestChecks/asm.py

if triple.startswith(prefix) and len(prefix) > len(best_prefix):
       best_prefix = prefix
 
   if handler is None:
     raise KeyError('Triple %r is not supported' % (triple))
 
   scrubber, function_re = handler
   common.build_function_body_dictionary(
           function_re, scrubber, [args], raw_tool_output, prefixes,
-          func_dict, args.verbose, False)
+          func_dict, args.verbose)
 
 ##### Generator of assembly CHECK lines
 
 def add_asm_checks(output_lines, comment_marker, prefix_list, func_dict, func_name):
   # Label format is based on ASM string.
-  check_label_format = '{} %s-LABEL: %s%s:'.format(comment_marker)
+  check_label_format = '{} %s-LABEL: %s:'.format(comment_marker)
   common.add_checks(output_lines, comment_marker, prefix_list, func_dict, func_name, check_label_format, True, False)

llvm/utils/UpdateTestChecks/common.py

def invoke_tool(exe, cmd_args, ir):
   # Fix line endings to unix CR style.
   return stdout.replace('\r\n', '\n')
 
 ##### LLVM IR parser
 
 RUN_LINE_RE = re.compile(r'^\s*[;#]\s*RUN:\s*(.*)$')
 CHECK_PREFIX_RE = re.compile(r'--?check-prefix(?:es)?[= ](\S+)')
 PREFIX_RE = re.compile('^[a-zA-Z0-9_-]+$')
-CHECK_RE = re.compile(r'^\s*[;#]\s*([^:]+?)(?:-NEXT|-NOT|-DAG|-LABEL|-SAME)?:')
+CHECK_RE = re.compile(r'^\s*[;#]\s*([^:]+?)(?:-NEXT|-NOT|-DAG|-LABEL)?:')
 
 OPT_FUNCTION_RE = re.compile(
-    r'^\s*define\s+(?:internal\s+)?[^@]*@(?P<func>[\w-]+?)\s*'
-    r'(?P<args_and_sig>\((\)|(.*?[\w\.\-]+?)\))[^{]*)\{\n(?P<body>.*?)^\}$',
+    r'^\s*define\s+(?:internal\s+)?[^@]*@(?P<func>[\w-]+?)\s*\('
+    r'(\s+)?[^)]*[^{]*\{\n(?P<body>.*?)^\}$',
     flags=(re.M | re.S))
 
 ANALYZE_FUNCTION_RE = re.compile(
     r'^\s*\'(?P<analysis>[\w\s-]+?)\'\s+for\s+function\s+\'(?P<func>[\w-]+?)\':'
     r'\s*\n(?P<body>.*)$',
     flags=(re.X | re.S))
 
 IR_FUNCTION_RE = re.compile(r'^\s*define\s+(?:internal\s+)?[^@]*@(\w+)\s*\(')
def do_scrub(body, scrubber, scrubber_args, extra):
   if scrubber_args:
     local_args = copy.deepcopy(scrubber_args)
     local_args[0].extra_scrub = extra
     return scrubber(body, *local_args)
   return scrubber(body, *scrubber_args)
 
 # Build up a dictionary of all the function bodies.
 class function_body(object):
-  def __init__(self, string, extra, args_and_sig):
+  def __init__(self, string, extra):
     self.scrub = string
     self.extrascrub = extra
-    self.args_and_sig = args_and_sig
-  def is_same_except_arg_names(self, extrascrub, args_and_sig):
-    arg_names = set()
-    def drop_arg_names(match):
-        arg_names.add(match.group(2))
-        return match.group(1) + match.group(3)
-    def repl_arg_names(match):
-        if match.group(2) in arg_names:
-            return match.group(1) + match.group(3)
-        return match.group(1) + match.group(2) + match.group(3)
-    ans0 = IR_VALUE_RE.sub(drop_arg_names, self.args_and_sig)
-    ans1 = IR_VALUE_RE.sub(drop_arg_names, args_and_sig)
-    if ans0 != ans1:
-        return False
-    es0 = IR_VALUE_RE.sub(repl_arg_names, self.extrascrub)
-    es1 = IR_VALUE_RE.sub(repl_arg_names, extrascrub)
-    es0 = SCRUB_IR_COMMENT_RE.sub(r'', es0)
-    es1 = SCRUB_IR_COMMENT_RE.sub(r'', es1)
-    return es0 == es1
-
   def __str__(self):
     return self.scrub
 
-def build_function_body_dictionary(function_re, scrubber, scrubber_args, raw_tool_output, prefixes, func_dict, verbose, record_args):
+def build_function_body_dictionary(function_re, scrubber, scrubber_args, raw_tool_output, prefixes, func_dict, verbose):
   for m in function_re.finditer(raw_tool_output):
     if not m:
       continue
     func = m.group('func')
     body = m.group('body')
-    # Determine if we print arguments, the opening brace, or nothing after the function name
-    if record_args and 'args_and_sig' in m.groupdict():
-        args_and_sig = scrub_body(m.group('args_and_sig').strip())
-    elif 'args_and_sig' in m.groupdict():
-        args_and_sig = '('
-    else:
-        args_and_sig = ''
     scrubbed_body = do_scrub(body, scrubber, scrubber_args, extra = False)
     scrubbed_extra = do_scrub(body, scrubber, scrubber_args, extra = True)
     if 'analysis' in m.groupdict():
       analysis = m.group('analysis')
       if analysis.lower() != 'cost model analysis':
         warn('Unsupported analysis mode: %r!' % (analysis,))
     if func.startswith('stress'):
       # We only use the last line of the function body for stress tests.
       scrubbed_body = '\n'.join(scrubbed_body.splitlines()[-1:])
     if verbose:
       print('Processing function: ' + func, file=sys.stderr)
       for l in scrubbed_body.splitlines():
         print('  ' + l, file=sys.stderr)
     for prefix in prefixes:
-      if func in func_dict[prefix] and (str(func_dict[prefix][func]) != scrubbed_body or (func_dict[prefix][func] and func_dict[prefix][func].args_and_sig != args_and_sig)):
-        if func_dict[prefix][func] and func_dict[prefix][func].is_same_except_arg_names(scrubbed_extra, args_and_sig):
+      if func in func_dict[prefix] and str(func_dict[prefix][func]) != scrubbed_body:
+        if func_dict[prefix][func] and func_dict[prefix][func].extrascrub == scrubbed_extra:
           func_dict[prefix][func].scrub = scrubbed_extra
-          func_dict[prefix][func].args_and_sig = args_and_sig
           continue
         else:
           if prefix == prefixes[-1]:
             warn('Found conflicting asm under the same prefix: %r!' % (prefix,))
           else:
             func_dict[prefix][func] = None
             continue
 
-      func_dict[prefix][func] = function_body(scrubbed_body, scrubbed_extra, args_and_sig)
+      func_dict[prefix][func] = function_body(scrubbed_body, scrubbed_extra)
 
 ##### Generator of LLVM IR CHECK lines
 
 SCRUB_IR_COMMENT_RE = re.compile(r'\s*;.*')
 
 # Match things that look at identifiers, but only if they are followed by
 # spaces, commas, paren, or end of the string
 IR_VALUE_RE = re.compile(r'(\s+)%([\w\.\-]+?)([,\s\(\)]|\Z)')
for checkprefix in checkprefixes:
 
       # Add some space between different check prefixes, but not after the last
       # check line (before the test code).
       if is_asm:
         if len(printed_prefixes) != 0:
           output_lines.append(comment_marker)
 
       printed_prefixes.append(checkprefix)
-      args_and_sig = str(func_dict[checkprefix][func_name].args_and_sig)
-      args_and_sig = genericize_check_lines([args_and_sig], is_analyze)[0]
-      if '[[' in args_and_sig:
-        output_lines.append(check_label_format % (checkprefix, func_name, ''))
-        output_lines.append('%s %s-SAME: %s' % (comment_marker, checkprefix, args_and_sig))
-      else:
-        output_lines.append(check_label_format % (checkprefix, func_name, args_and_sig))
+      output_lines.append(check_label_format % (checkprefix, func_name))
       func_body = str(func_dict[checkprefix][func_name]).splitlines()
 
       # For ASM output, just emit the check lines.
       if is_asm:
         output_lines.append('%s %s:       %s' % (comment_marker, checkprefix, func_body[0]))
         for func_line in func_body[1:]:
           if func_line.strip() == '':
             output_lines.append('%s %s-EMPTY:' % (comment_marker, checkprefix))
for checkprefix in checkprefixes:
       # Add space between different check prefixes and also before the first
       # line of code in the test function.
       output_lines.append(comment_marker)
       break
 
 def add_ir_checks(output_lines, comment_marker, prefix_list, func_dict,
                   func_name, preserve_names):
   # Label format is based on IR string.
-  function_def_regex = 'define {{[^@]+}}'
-  check_label_format = '{} %s-LABEL: {}@%s%s'.format(comment_marker, function_def_regex)
+  check_label_format = '{} %s-LABEL: @%s('.format(comment_marker)
   add_checks(output_lines, comment_marker, prefix_list, func_dict, func_name,
              check_label_format, False, preserve_names)
 
 def add_analyze_checks(output_lines, comment_marker, prefix_list, func_dict, func_name):
-  check_label_format = '{} %s-LABEL: \'%s%s\''.format(comment_marker)
+  check_label_format = '{} %s-LABEL: \'%s\''.format(comment_marker)
   add_checks(output_lines, comment_marker, prefix_list, func_dict, func_name, check_label_format, False, True)
 
 
 def check_prefix(prefix):
   if not PREFIX_RE.match(prefix):
         hint = ""
         if ',' in prefix:
           hint = " Did you mean '--check-prefixes=" + prefix + "'?"

llvm/utils/gn/build/toolchain/BUILD.gn

if (android_ndk_path != "") {
   stage2_unix_toolchain("stage2_android_aarch64") {
     toolchain_args = {
       current_os = "android"
       current_cpu = "arm64"
       is_clang = true
       use_lld = true
     }
   }
-
-  stage2_unix_toolchain("stage2_android_arm") {
-    toolchain_args = {
-      current_os = "android"
-      current_cpu = "arm"
-      is_clang = true
-      use_lld = true
-    }
-  }
 }
 
 toolchain("win") {
   cl = "cl"
   link = "link"
 
   if (clang_base_path != "") {
     cl = "$clang_base_path/bin/clang-cl"

llvm/utils/gn/build/toolchain/target_flags.gni

 import("//llvm/triples.gni")
 import("//llvm/utils/gn/build/toolchain/compiler.gni")
 
 target_flags = []
 target_ldflags = []
 
 if (current_os == "android") {
   target_flags += [
     "--target=$llvm_current_triple",
     "--sysroot=$android_ndk_path/toolchains/llvm/prebuilt/linux-x86_64/sysroot",
     "-B$android_ndk_path/toolchains/llvm/prebuilt/linux-x86_64",
   ]
   target_ldflags += [ "-static-libstdc++" ]
-  if (current_cpu == "arm") {
-    target_flags += [ "-march=armv7-a" ]
-  }
 }
 
 if (current_cpu == "x86") {
   target_flags = [ "-m32" ]
 }

llvm/utils/gn/secondary/compiler-rt/BUILD.gn

-import("//llvm/utils/gn/build/toolchain/compiler.gni")
-
+group("compiler-rt") {
   # In the GN build, compiler-rt is always built by just-built clang and lld.
   # FIXME: For macOS and iOS builds, depend on lib in all needed target arch
   # toolchains and then lipo them together for the final output.
-supported_toolchains = [ "//llvm/utils/gn/build/toolchain:stage2_unix" ]
-if (android_ndk_path != "") {
-  supported_toolchains += [
-    "//llvm/utils/gn/build/toolchain:stage2_android_aarch64",
-    "//llvm/utils/gn/build/toolchain:stage2_android_arm",
+  deps = [
+    "//compiler-rt/lib(//llvm/utils/gn/build/toolchain:stage2_unix)",
   ]
 }
-
-group("compiler-rt") {
-  deps = []
-  foreach(toolchain, supported_toolchains) {
-    deps += [ "//compiler-rt/lib($toolchain)" ]
-  }
-}

llvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn

static_library("builtins") {
 
   complete_static_lib = true
   configs -= [ "//llvm/utils/gn/build:thin_archive" ]
 
   cflags = [
     "-fPIC",
     "-fno-builtin",
   ]
-  if (current_os != "android") {
+  if (target_os != "android") {
     cflags += [ "-fvisibility=hidden" ]
   }
   if (!is_debug) {
     cflags += [ "-fomit-frame-pointer" ]
   }
   cflags_c = [ "-std=c11" ]
 
   sources = [
sources = [
     "umodti3.c",
 
     # This depends on unwind.h which is present in Clang headers. We should
     # reconsider this if we ever decide to support building builtins with
     # other compilers.
     "gcc_personality_v0.c",
   ]
 
-  if (current_os != "fuchsia") {
+  if (target_os != "fuchsia") {
     sources += [
       "emutls.c",
       "enable_execute_stack.c",
       "eprintf.c",
     ]
   }
 
-  if (current_os != "fuchsia" && !compiler_rt_baremetal_build) {
+  if (target_os != "fuchsia" && !compiler_rt_baremetal_build) {
     sources += [
       # This comment prevents `gn format` from putting the file on the same line
       # as `sources +=`, for sync_source_lists_from_cmake.py.
       "clear_cache.c",
     ]
   }
 
-  if (current_os == "mac") {
+  if (target_os == "mac") {
     sources += [
       "atomic_flag_clear.c",
       "atomic_flag_clear_explicit.c",
       "atomic_flag_test_and_set.c",
       "atomic_flag_test_and_set_explicit.c",
       "atomic_signal_fence.c",
       "atomic_thread_fence.c",
     ]
   }
 
-  if ((current_cpu == "x64" && current_os != "win") || current_cpu == "arm64") {
+  if ((target_cpu == "x64" && target_os != "win") || target_cpu == "arm64") {
     # GENERIC_TF_SOURCES
     sources += [
       "comparetf2.c",
       "extenddftf2.c",
       "extendsftf2.c",
       "fixtfdi.c",
       "fixtfsi.c",
       "fixtfti.c",
       "fixunstfdi.c",
       "fixunstfsi.c",
       "fixunstfti.c",
       "floatditf.c",
       "floatsitf.c",
       "floattitf.c",
       "floatunditf.c",
       "floatunsitf.c",
       "floatuntitf.c",
       "multc3.c",
       "trunctfdf2.c",
       "trunctfsf2.c",
     ]
   }
 
-  if (current_cpu == "x86" || current_cpu == "x64") {
+  if (target_cpu == "x86" || target_cpu == "x64") {
     sources += [
       "cpu_model.c",
       "divxc3.c",
       "fixunsxfdi.c",
       "fixunsxfsi.c",
       "fixunsxfti.c",
       "fixxfdi.c",
       "fixxfti.c",
       "floatdixf.c",
       "floattixf.c",
       "floatundixf.c",
       "floatuntixf.c",
       "mulxc3.c",
       "powixf2.c",
     ]
   }
-  if (current_cpu == "x86") {
+  if (target_cpu == "x86") {
     sources -= [
       "ashldi3.c",
       "ashrdi3.c",
       "divdi3.c",
       "floatdidf.c",
       "floatdisf.c",
       "floatdixf.c",
       "floatundidf.c",
sources += [
       "i386/floatundisf.S",
       "i386/floatundixf.S",
       "i386/lshrdi3.S",
       "i386/moddi3.S",
       "i386/muldi3.S",
       "i386/udivdi3.S",
       "i386/umoddi3.S",
     ]
-    if (current_os == "win") {
+    if (target_os == "win") {
       sources += [
         "i386/chkstk.S",
         "i386/chkstk2.S",
       ]
     }
-  } else if (current_cpu == "x64") {
+  } else if (target_cpu == "x64") {
     sources -= [
       "floatdidf.c",
       "floatdisf.c",
       "floatdixf.c",
       "floatundidf.c",
       "floatundisf.c",
       "floatundixf.c",
     ]
     sources += [
       "x86_64/floatdidf.c",
       "x86_64/floatdisf.c",
       "x86_64/floatdixf.c",
       "x86_64/floatundidf.S",
       "x86_64/floatundisf.S",
       "x86_64/floatundixf.S",
     ]
-    if (current_os == "win") {
+    if (target_os == "win") {
       sources += [
         "x86_64/chkstk.S",
         "x86_64/chkstk2.S",
       ]
     }
   }
 
-  if (current_cpu == "arm") {
-    if (current_os != "mingw") {
+  if (target_cpu == "arm") {
+    if (target_os != "mingw") {
       sources -= [
         "bswapdi2.c",
         "bswapsi2.c",
         "clzdi2.c",
         "clzsi2.c",
         "comparesf2.c",
         "divmodsi4.c",
         "divsi3.c",
-        "fp_mode.c",
         "modsi3.c",
         "udivmodsi4.c",
         "udivsi3.c",
         "umodsi3.c",
       ]
       sources += [
-        "arm/aeabi_cdcmp.S",
-        "arm/aeabi_cdcmpeq_check_nan.c",
-        "arm/aeabi_cfcmp.S",
-        "arm/aeabi_cfcmpeq_check_nan.c",
-        "arm/aeabi_dcmp.S",
-        "arm/aeabi_div0.c",
-        "arm/aeabi_drsub.c",
-        "arm/aeabi_fcmp.S",
-        "arm/aeabi_frsub.c",
-        "arm/aeabi_idivmod.S",
-        "arm/aeabi_ldivmod.S",
-        "arm/aeabi_memcmp.S",
-        "arm/aeabi_memcpy.S",
-        "arm/aeabi_memmove.S",
-        "arm/aeabi_memset.S",
-        "arm/aeabi_uidivmod.S",
-        "arm/aeabi_uldivmod.S",
         "arm/bswapdi2.S",
         "arm/bswapsi2.S",
         "arm/clzdi2.S",
         "arm/clzsi2.S",
         "arm/comparesf2.S",
         "arm/divmodsi4.S",
         "arm/divsi3.S",
         "arm/fp_mode.c",
         "arm/modsi3.S",
-        "arm/switch16.S",
-        "arm/switch32.S",
-        "arm/switch8.S",
-        "arm/switchu8.S",
         "arm/sync_fetch_and_add_4.S",
         "arm/sync_fetch_and_add_8.S",
         "arm/sync_fetch_and_and_4.S",
         "arm/sync_fetch_and_and_8.S",
         "arm/sync_fetch_and_max_4.S",
         "arm/sync_fetch_and_max_8.S",
         "arm/sync_fetch_and_min_4.S",
         "arm/sync_fetch_and_min_8.S",
         "arm/sync_fetch_and_nand_4.S",
         "arm/sync_fetch_and_nand_8.S",
         "arm/sync_fetch_and_or_4.S",
         "arm/sync_fetch_and_or_8.S",
         "arm/sync_fetch_and_sub_4.S",
         "arm/sync_fetch_and_sub_8.S",
         "arm/sync_fetch_and_umax_4.S",
         "arm/sync_fetch_and_umax_8.S",
         "arm/sync_fetch_and_umin_4.S",
         "arm/sync_fetch_and_umin_8.S",
         "arm/sync_fetch_and_xor_4.S",
         "arm/sync_fetch_and_xor_8.S",
-        "arm/sync_synchronize.S",
         "arm/udivmodsi4.S",
         "arm/udivsi3.S",
         "arm/umodsi3.S",
       ]
-
-      if (current_os == "android") {
-        sources += [
-          "arm/adddf3vfp.S",
-          "arm/addsf3vfp.S",
-          "arm/divdf3vfp.S",
-          "arm/divsf3vfp.S",
-          "arm/eqdf2vfp.S",
-          "arm/eqsf2vfp.S",
-          "arm/extendsfdf2vfp.S",
-          "arm/fixdfsivfp.S",
-          "arm/fixsfsivfp.S",
-          "arm/fixunsdfsivfp.S",
-          "arm/fixunssfsivfp.S",
-          "arm/floatsidfvfp.S",
-          "arm/floatsisfvfp.S",
-          "arm/floatunssidfvfp.S",
-          "arm/floatunssisfvfp.S",
-          "arm/gedf2vfp.S",
-          "arm/gesf2vfp.S",
-          "arm/gtdf2vfp.S",
-          "arm/gtsf2vfp.S",
-          "arm/ledf2vfp.S",
-          "arm/lesf2vfp.S",
-          "arm/ltdf2vfp.S",
-          "arm/ltsf2vfp.S",
-          "arm/muldf3vfp.S",
-          "arm/mulsf3vfp.S",
-          "arm/nedf2vfp.S",
-          "arm/negdf2vfp.S",
-          "arm/negsf2vfp.S",
-          "arm/nesf2vfp.S",
-          "arm/restore_vfp_d8_d15_regs.S",
-          "arm/save_vfp_d8_d15_regs.S",
-          "arm/subdf3vfp.S",
-          "arm/subsf3vfp.S",
-          "arm/truncdfsf2vfp.S",
-          "arm/unorddf2vfp.S",
-          "arm/unordsf2vfp.S",
-        ]
-      }
     } else {
       sources += [
         "arm/aeabi_idivmod.S",
         "arm/aeabi_ldivmod.S",
         "arm/aeabi_uidivmod.S",
         "arm/aeabi_uldivmod.S",
         "arm/chkstk.S",
         "mingw_fixfloat.c",
       ]
     }
   }
 
-  if (current_cpu == "arm64") {
+  if (target_cpu == "arm64") {
     sources += [
       # This comment prevents `gn format` from putting the file on the same line
       # as `sources +=`, for sync_source_lists_from_cmake.py.
       "aarch64/fp_mode.c",
     ]
-    if (current_os == "mingw") {
+    if (target_os == "mingw") {
       sources += [
         # This comment prevents `gn format` from putting the file on the same
         # line as `sources +=`, for sync_source_lists_from_cmake.py.
         "aarch64/chkstk.S",
       ]
     }
   }
 
-  if (current_cpu == "hexagon") {
+  if (target_cpu == "hexagon") {
     sources += [
       "hexagon/common_entry_exit_abi1.S",
       "hexagon/common_entry_exit_abi2.S",
       "hexagon/common_entry_exit_legacy.S",
       "hexagon/dfaddsub.S",
       "hexagon/dfdiv.S",
       "hexagon/dffma.S",
       "hexagon/dfminmax.S",
sources += [
       "hexagon/udivmoddi4.S",
       "hexagon/udivmodsi4.S",
       "hexagon/udivsi3.S",
       "hexagon/umoddi3.S",
       "hexagon/umodsi3.S",
     ]
   }
 
-  if (current_cpu == "ppc64") {
+  if (target_cpu == "ppc64") {
     sources += [
       "ppc/divtc3.c",
       "ppc/fixtfdi.c",
       "ppc/fixunstfdi.c",
       "ppc/fixunstfti.c",
       "ppc/floatditf.c",
       "ppc/floattitf.c",
       "ppc/floatunditf.c",
       "ppc/gcc_qadd.c",
       "ppc/gcc_qdiv.c",
       "ppc/gcc_qmul.c",
       "ppc/gcc_qsub.c",
       "ppc/multc3.c",
     ]
   }
 
-  if (current_cpu == "riscv") {
+  if (target_cpu == "riscv") {
     sources += [
       # This comment prevents `gn format` from putting the file on the same line
       # as `sources +=`, for sync_source_lists_from_cmake.py.
       "riscv/mulsi3.S",
     ]
   }
 
   if (!compiler_rt_exclude_atomic_builtin) {

 # happy.
 source_set("_unused") {
   sources = [
     # Thumb1
     "arm/addsf3.S",
     "arm/comparesf2.S",
     "arm/divsi3.S",
     "arm/udivsi3.S",
+
+    # EABI
+    "arm/aeabi_cdcmp.S",
+    "arm/aeabi_cdcmpeq_check_nan.c",
+    "arm/aeabi_cfcmp.S",
+    "arm/aeabi_cfcmpeq_check_nan.c",
+    "arm/aeabi_dcmp.S",
+    "arm/aeabi_div0.c",
+    "arm/aeabi_drsub.c",
+    "arm/aeabi_fcmp.S",
+    "arm/aeabi_frsub.c",
+    "arm/aeabi_idivmod.S",
+    "arm/aeabi_ldivmod.S",
+    "arm/aeabi_memcmp.S",
+    "arm/aeabi_memcpy.S",
+    "arm/aeabi_memmove.S",
+    "arm/aeabi_memset.S",
+    "arm/aeabi_uidivmod.S",
+    "arm/aeabi_uldivmod.S",
+
+    # Thumb1 JT
+    "arm/switch16.S",
+    "arm/switch32.S",
+    "arm/switch8.S",
+    "arm/switchu8.S",
+
+    # Thumb1 SjLj
+    "arm/restore_vfp_d8_d15_regs.S",
+    "arm/save_vfp_d8_d15_regs.S",
+
+    # Thumb1 VFPv2
+    "arm/adddf3vfp.S",
+    "arm/addsf3vfp.S",
+    "arm/divdf3vfp.S",
+    "arm/divsf3vfp.S",
+    "arm/eqdf2vfp.S",
+    "arm/eqsf2vfp.S",
+    "arm/extendsfdf2vfp.S",
+    "arm/fixdfsivfp.S",
+    "arm/fixsfsivfp.S",
+    "arm/fixunsdfsivfp.S",
+    "arm/fixunssfsivfp.S",
+    "arm/floatsidfvfp.S",
+    "arm/floatsisfvfp.S",
+    "arm/floatunssidfvfp.S",
+    "arm/floatunssisfvfp.S",
+    "arm/gedf2vfp.S",
+    "arm/gesf2vfp.S",
+    "arm/gtdf2vfp.S",
+    "arm/gtsf2vfp.S",
+    "arm/ledf2vfp.S",
+    "arm/lesf2vfp.S",
+    "arm/ltdf2vfp.S",
+    "arm/ltsf2vfp.S",
+    "arm/muldf3vfp.S",
+    "arm/mulsf3vfp.S",
+    "arm/nedf2vfp.S",
+    "arm/negdf2vfp.S",
+    "arm/negsf2vfp.S",
+    "arm/nesf2vfp.S",
+    "arm/subdf3vfp.S",
+    "arm/subsf3vfp.S",
+    "arm/truncdfsf2vfp.S",
+    "arm/unorddf2vfp.S",
+    "arm/unordsf2vfp.S",
+
+    # Thumb1 icache
+    "arm/sync_synchronize.S",
   ]
 }

llvm/utils/gn/secondary/compiler-rt/lib/profile/BUILD.gn

 import("//compiler-rt/target.gni")
 
 static_library("profile") {
   output_dir = crt_current_out_dir
   if (current_os == "mac") {
     output_name = "clang_rt.profile_osx"
   } else {
     output_name = "clang_rt.profile$crt_current_target_suffix"
   }
 
   complete_static_lib = true
   configs -= [ "//llvm/utils/gn/build:thin_archive" ]
 
   cflags = []
-  if (current_os != "win") {
+  if (target_os != "win") {
     cflags = [
       "-fPIC",
       "-Wno-pedantic",
     ]
   } else {
     # This appears to be a C-only warning banning the use of locals in
     # aggregate initializers. All other compilers accept this, though.
     #     nonstandard extension used : 'identifier' :
sources = [
     "InstrProfilingPlatformWindows.c",
     "InstrProfilingPort.h",
     "InstrProfilingRuntime.cpp",
     "InstrProfilingUtil.c",
     "InstrProfilingUtil.h",
     "InstrProfilingValue.c",
     "InstrProfilingWriter.c",
   ]
-  if (current_os == "win") {
+  if (target_os == "win") {
     sources += [
       "WindowsMMap.c",
       "WindowsMMap.h",
     ]
   }
 
-  if (current_os != "win") {
+  if (target_os != "win") {
     defines = [
       "COMPILER_RT_TARGET_HAS_ATOMICS",
       "COMPILER_RT_TARGET_HAS_FCNTL_LCK",
       "COMPILER_RT_TARGET_HAS_UNAME",
     ]
   }
 }

llvm/utils/gn/secondary/compiler-rt/target.gni

 import("//clang/resource_dir.gni")
 import("//clang/runtimes.gni")
 
 if (current_cpu == "x86") {
   crt_current_target_arch = "i386"
 } else if (current_cpu == "x64") {
   crt_current_target_arch = "x86_64"
-} else if (current_cpu == "arm") {
-  crt_current_target_arch = "arm"
 } else if (current_cpu == "arm64") {
   crt_current_target_arch = "aarch64"
 } else if (current_cpu == "ppc64") {
   crt_current_target_arch = "powerpc64le"
 } else {
   assert(false, "unimplemented current_cpu " + current_cpu)
 }
 

llvm/utils/gn/secondary/llvm/lib/Remarks/BUILD.gn

 static_library("Remarks") {
   output_name = "LLVMRemarks"
   deps = [
     "//llvm/lib/Bitstream/Reader",
     "//llvm/lib/Support",
   ]
 
   sources = [
     "BitstreamRemarkParser.cpp",
     "BitstreamRemarkSerializer.cpp",
     "Remark.cpp",
     "RemarkFormat.cpp",
-    "RemarkLinker.cpp",
     "RemarkParser.cpp",
     "RemarkSerializer.cpp",
     "RemarkStringTable.cpp",
     "YAMLRemarkParser.cpp",
     "YAMLRemarkSerializer.cpp",
   ]
 }

llvm/utils/gn/secondary/llvm/triples.gni

 if (current_cpu == "x86") {
   if (current_os == "linux") {
     llvm_current_triple = "i386-unknown-linux-gnu"
   }
 } else if (current_cpu == "x64") {
   if (current_os == "freebsd") {
     llvm_current_triple = "x86_64-unknown-freebsd"
   } else if (current_os == "linux") {
     llvm_current_triple = "x86_64-unknown-linux-gnu"
   } else if (current_os == "mac") {
     llvm_current_triple = "x86_64-apple-darwin"
   } else if (current_os == "win") {
     llvm_current_triple = "x86_64-pc-windows-msvc"
   }
-} else if (current_cpu == "arm") {
-  if (current_os == "android") {
-    llvm_current_triple = "arm-linux-androideabi"
-  }
 } else if (current_cpu == "arm64") {
   if (current_os == "android") {
     llvm_current_triple = "aarch64-linux-android21"
   }
 } else if (current_cpu == "ppc64") {
   if (current_os == "linux") {
     llvm_current_triple = "powerpc64le-unknown-linux-gnu"
   }

llvm/utils/gn/secondary/llvm/unittests/ExecutionEngine/JITLink/BUILD.gn

 import("//llvm/utils/unittest/unittest.gni")
 
 unittest("JITLinkTests") {
   deps = [
     "//llvm/lib/ExecutionEngine/JITLink",
     "//llvm/lib/ExecutionEngine/RuntimeDyld",
+    "//llvm/lib/MC",
+    "//llvm/lib/MC/MCDisassembler",
+    "//llvm/lib/MC/MCParser",
     "//llvm/lib/Object",
     "//llvm/lib/Support",
+    "//llvm/lib/Target",
     "//llvm/lib/Target:TargetsToBuild",
     "//llvm/lib/Testing/Support",
   ]
   sources = [
     "LinkGraphTests.cpp",
   ]
 }

llvm/utils/gn/secondary/llvm/unittests/Remarks/BUILD.gn

 import("//llvm/utils/unittest/unittest.gni")
 
 unittest("RemarksTests") {
   deps = [
     "//llvm/lib/Bitcode/Reader",
     "//llvm/lib/Remarks",
     "//llvm/lib/Support",
   ]
   sources = [
     "BitstreamRemarksFormatTest.cpp",
     "BitstreamRemarksParsingTest.cpp",
     "BitstreamRemarksSerializerTest.cpp",
     "RemarksAPITest.cpp",
-    "RemarksLinkingTest.cpp",
     "RemarksStrTabParsingTest.cpp",
     "YAMLRemarksParsingTest.cpp",
     "YAMLRemarksSerializerTest.cpp",
   ]
 }

llvm/utils/gn/secondary/llvm/unittests/Transforms/Scalar/BUILD.gn

 import("//llvm/utils/unittest/unittest.gni")
 
 unittest("ScalarTests") {
   deps = [
     "//llvm/lib/Analysis",
     "//llvm/lib/AsmParser",
     "//llvm/lib/IR",
-    "//llvm/lib/Passes",
     "//llvm/lib/Support",
-    "//llvm/lib/Testing/Support",
     "//llvm/lib/Transforms/Scalar",
     "//llvm/lib/Transforms/Utils",
   ]
   sources = [
-    "LICMTest.cpp",
     "LoopPassManagerTest.cpp",
   ]
 }

llvm/utils/lit/lit/ProgressBar.py

def __init__(self, term, header, useETA=True):
         else:
             self.width = 75
         self.barColor = 'GREEN'
         self.header = self.term.render(self.HEADER % header.center(self.width))
         self.cleared = 1 #: true if we haven't drawn the bar yet.
         self.useETA = useETA
         if self.useETA:
             self.startTime = time.time()
-        # self.update(0, '')
+        self.update(0, '')
 
     def update(self, percent, message):
         if self.cleared:
             sys.stdout.write(self.header)
             self.cleared = 0
         prefix = '%3d%% ' % (percent*100,)
         suffix = ''
         if self.useETA:

llvm/utils/lit/lit/TestRunner.py

for arg_idx, arg in enumerate(args[1:]):
         key, eq, val = arg.partition('=')
         # Stop if there was no equals.
         if eq == '':
             arg_idx_next = arg_idx + 1
             break
         env.env[key] = val
     return args[arg_idx_next:]
 
-def executeBuiltinCd(cmd, shenv):
-    """executeBuiltinCd - Change the current directory."""
-    if len(cmd.args) != 2:
-        raise InternalShellError("'cd' supports only one argument")
-    newdir = cmd.args[1]
-    # Update the cwd in the parent environment.
-    if os.path.isabs(newdir):
-        shenv.cwd = newdir
-    else:
-        shenv.cwd = os.path.realpath(os.path.join(shenv.cwd, newdir))
-    # The cd builtin always succeeds. If the directory does not exist, the
-    # following Popen calls will fail instead.
-    return ShellCommandResult(cmd, "", "", 0, False)
-
-def executeBuiltinExport(cmd, shenv):
-    """executeBuiltinExport - Set an environment variable."""
-    if len(cmd.args) != 2:
-        raise InternalShellError("'export' supports only one argument")
-    updateEnv(shenv, cmd.args)
-    return ShellCommandResult(cmd, "", "", 0, False)
-
 def executeBuiltinEcho(cmd, shenv):
     """Interpret a redirected echo command"""
     opened_files = []
     stdin, stdout, stderr = processRedirects(cmd, subprocess.PIPE, shenv,
                                              opened_files)
     if stdin != subprocess.PIPE or stderr != subprocess.PIPE:
         raise InternalShellError(
                 cmd, "stdin and stderr redirects not supported for echo")
if args:
             stdout.write(encode(' '))
         stdout.write(encode(maybeUnescape(args[-1])))
     if write_newline:
         stdout.write(encode('\n'))
 
     for (name, mode, f, path) in opened_files:
         f.close()
 
-    output = "" if is_redirected else stdout.getvalue()
-    return ShellCommandResult(cmd, output, "", 0, False)
+    if not is_redirected:
+        return stdout.getvalue()
+    return ""
 
 def executeBuiltinMkdir(cmd, cmd_shenv):
     """executeBuiltinMkdir - Create new directories."""
     args = expand_glob_expressions(cmd.args, cmd_shenv.cwd)[1:]
     try:
         opts, args = getopt.gnu_getopt(args, 'p')
     except getopt.GetoptError as err:
         raise InternalShellError(cmd, "Unsupported: 'mkdir':  %s" % str(err))
for path in args:
                     os.chmod(path,
                              stat.S_IMODE(os.stat(path).st_mode) | stat.S_IWRITE)
                 os.remove(path)
         except OSError as err:
             stderr.write("Error: 'rm' command failed, %s" % str(err))
             exitCode = 1
     return ShellCommandResult(cmd, "", stderr.getvalue(), exitCode, False)
 
-def executeBuiltinColon(cmd, cmd_shenv):
-    """executeBuiltinColon - Discard arguments and exit with status 0."""
-    return ShellCommandResult(cmd, "", "", 0, False)
-
 def processRedirects(cmd, stdin_source, cmd_shenv, opened_files):
     """Return the standard fds for cmd after applying redirects
 
     Returns the three standard file descriptors for the new child process.  Each
     fd may be an open, writable file object or a sentinel value from the
     subprocess module.
     """
 
if isinstance(cmd, ShUtil.Seq):
 
             if res == 0:
                 res = _executeShCmd(cmd.rhs, shenv, results, timeoutHelper)
             return res
 
         raise ValueError('Unknown shell command: %r' % cmd.op)
     assert isinstance(cmd, ShUtil.Pipeline)
 
+    # Handle shell builtins first.
+    if cmd.commands[0].args[0] == 'cd':
+        if len(cmd.commands) != 1:
+            raise ValueError("'cd' cannot be part of a pipeline")
+        if len(cmd.commands[0].args) != 2:
+            raise ValueError("'cd' supports only one argument")
+        newdir = cmd.commands[0].args[1]
+        # Update the cwd in the parent environment.
+        if os.path.isabs(newdir):
+            shenv.cwd = newdir
+        else:
+            shenv.cwd = os.path.realpath(os.path.join(shenv.cwd, newdir))
+        # The cd builtin always succeeds. If the directory does not exist, the
+        # following Popen calls will fail instead.
+        return 0
+
+    # Handle "echo" as a builtin if it is not part of a pipeline. This greatly
+    # speeds up tests that construct input files by repeatedly echo-appending to
+    # a file.
+    # FIXME: Standardize on the builtin echo implementation. We can use a
+    # temporary file to sidestep blocking pipe write issues.
+    if cmd.commands[0].args[0] == 'echo' and len(cmd.commands) == 1:
+        output = executeBuiltinEcho(cmd.commands[0], shenv)
+        results.append(ShellCommandResult(cmd.commands[0], output, "", 0,
+                                          False))
+        return 0
+
+    if cmd.commands[0].args[0] == 'export':
+        if len(cmd.commands) != 1:
+            raise ValueError("'export' cannot be part of a pipeline")
+        if len(cmd.commands[0].args) != 2:
+            raise ValueError("'export' supports only one argument")
+        updateEnv(shenv, cmd.commands[0].args)
+        return 0
+
+    if cmd.commands[0].args[0] == 'mkdir':
+        if len(cmd.commands) != 1:
+            raise InternalShellError(cmd.commands[0], "Unsupported: 'mkdir' "
+                                     "cannot be part of a pipeline")
+        cmdResult = executeBuiltinMkdir(cmd.commands[0], shenv)
+        results.append(cmdResult)
+        return cmdResult.exitCode
+
+    if cmd.commands[0].args[0] == 'rm':
+        if len(cmd.commands) != 1:
+            raise InternalShellError(cmd.commands[0], "Unsupported: 'rm' "
+                                     "cannot be part of a pipeline")
+        cmdResult = executeBuiltinRm(cmd.commands[0], shenv)
+        results.append(cmdResult)
+        return cmdResult.exitCode
+
+    if cmd.commands[0].args[0] == ':':
+        if len(cmd.commands) != 1:
+            raise InternalShellError(cmd.commands[0], "Unsupported: ':' "
+                                     "cannot be part of a pipeline")
+        results.append(ShellCommandResult(cmd.commands[0], '', '', 0, False))
+        return 0;
+
     procs = []
     default_stdin = subprocess.PIPE
     stderrTempFiles = []
     opened_files = []
     named_temp_files = []
     builtin_commands = set(['cat', 'diff'])
     builtin_commands_dir = os.path.join(os.path.dirname(os.path.abspath(__file__)), "builtin_commands")
-    inproc_builtins = {'cd': executeBuiltinCd,
-                       'export': executeBuiltinExport,
-                       'echo': executeBuiltinEcho,
-                       'mkdir': executeBuiltinMkdir,
-                       'rm': executeBuiltinRm,
-                       ':': executeBuiltinColon}
     # To avoid deadlock, we use a single stderr stream for piped
     # output. This is null until we have seen some output using
     # stderr.
     for i,j in enumerate(cmd.commands):
         # Reference the global environment by default.
         cmd_shenv = shenv
         args = list(j.args)
         if j.args[0] == 'env':
             # Create a copy of the global environment and modify it for this one
             # command. There might be multiple envs in a pipeline:
             #   env FOO=1 llc < %s | env BAR=2 llvm-mc | FileCheck %s
             cmd_shenv = ShellEnvironment(shenv.cwd, shenv.env)
             args = updateEnv(cmd_shenv, j.args)
             if not args:
                 raise InternalShellError(j,
                                          "Error: 'env' requires a subcommand")
 
-        # Handle in-process builtins.
-        #
-        # Handle "echo" as a builtin if it is not part of a pipeline. This
-        # greatly speeds up tests that construct input files by repeatedly
-        # echo-appending to a file.
-        # FIXME: Standardize on the builtin echo implementation. We can use a
-        # temporary file to sidestep blocking pipe write issues.
-        inproc_builtin = inproc_builtins.get(args[0], None)
-        if inproc_builtin and (args[0] != 'echo' or len(cmd.commands) == 1):
-            # env calling an in-process builtin is useless, so we take the safe
-            # approach of complaining.
-            if not cmd_shenv is shenv:
-                raise InternalShellError(j, "Error: 'env' cannot call '{}'"
-                                            .format(args[0]))
-            if len(cmd.commands) != 1:
-                raise InternalShellError(j, "Unsupported: '{}' cannot be part"
-                                            " of a pipeline".format(args[0]))
-            result = inproc_builtin(j, cmd_shenv)
-            results.append(result)
-            return result.exitCode
-
         stdin, stdout, stderr = processRedirects(j, default_stdin, cmd_shenv,
                                                  opened_files)
 
         # If stderr wants to come from stdout, but stdout isn't a pipe, then put
         # stderr on a pipe and treat it as stdout.
         if (stderr == subprocess.STDOUT and stdout != subprocess.PIPE):
             stderr = subprocess.PIPE
             stderrIsStdout = True

llvm/utils/lit/lit/display.py

 import sys
 
+import lit.ProgressBar
 
 def create_display(opts, tests, total_tests, workers):
     if opts.quiet:
-        return NopDisplay()
+        return NopProgressDisplay()
 
     of_total = (' of %d' % total_tests) if (tests != total_tests) else ''
     header = '-- Testing: %d%s tests, %d workers --' % (tests, of_total, workers)
 
     progress_bar = None
     if opts.succinct and opts.useProgressBar:
-        import lit.ProgressBar
         try:
             tc = lit.ProgressBar.TerminalController()
             progress_bar = lit.ProgressBar.ProgressBar(tc, header)
-            header = None
         except ValueError:
+            print(header)
             progress_bar = lit.ProgressBar.SimpleProgressBar('Testing: ')
+    else:
+        print(header)
 
-    return Display(opts, tests, header, progress_bar)
+    if progress_bar:
+        progress_bar.update(0, '')
 
+    return ProgressDisplay(opts, tests, progress_bar)
 
-class NopDisplay(object):
-    def print_header(self): pass
+class NopProgressDisplay(object):
     def update(self, test): pass
-    def clear(self): pass
-
+    def finish(self): pass
 
-class Display(object):
-    def __init__(self, opts, tests, header, progress_bar):
+class ProgressDisplay(object):
+    def __init__(self, opts, numTests, progressBar):
         self.opts = opts
-        self.tests = tests
-        self.header = header
-        self.progress_bar = progress_bar
+        self.numTests = numTests
+        self.progressBar = progressBar
         self.completed = 0
 
-    def print_header(self):
-        if self.header:
-            print(self.header)
-        if self.progress_bar:
-            self.progress_bar.update(0.0, '')
+    def finish(self):
+        if self.progressBar:
+            self.progressBar.clear()
+        elif self.opts.succinct:
+            sys.stdout.write('\n')
 
     def update(self, test):
         self.completed += 1
 
         show_result = test.isFailure() or \
                 self.opts.showAllOutput or \
                 (not self.opts.quiet and not self.opts.succinct)
         if show_result:
-            if self.progress_bar:
-                self.progress_bar.clear()
             self.print_result(test)
 
-        if self.progress_bar:
+        if self.progressBar:
             if test.isFailure():
-                self.progress_bar.barColor = 'RED'
-            percent = float(self.completed) / self.tests
-            self.progress_bar.update(percent, test.getFullName())
-
-    def clear(self):
-        if self.progress_bar:
-            self.progress_bar.clear()
-        sys.stdout.write('\n')
+                self.progressBar.barColor = 'RED'
+            percent = float(self.completed) / self.numTests
+            self.progressBar.update(percent, test.getFullName())
 
     def print_result(self, test):
+        if self.progressBar:
+            self.progressBar.clear()
+
         # Show the test result line.
         test_name = test.getFullName()
         print('%s: %s (%d of %d)' % (test.result.code.name, test_name,
-                                     self.completed, self.tests))
+                                     self.completed, self.numTests))
 
         # Show the test failure output, if requested.
         if (test.isFailure() and self.opts.showOutput) or \
            self.opts.showAllOutput:
             if test.isFailure():
                 print("%s TEST '%s' FAILED %s" % ('*'*20, test.getFullName(),
                                                   '*'*20))
             out = test.result.output

llvm/utils/lit/lit/main.py

def run_tests(tests, litConfig, opts, numTotalTests):
     def progress_callback(test):
         display.update(test)
         if opts.order == 'failing-first':
             touch_file(test)
 
     run = lit.run.create_run(tests, litConfig, opts.numWorkers,
                              progress_callback, opts.timeout)
 
-    display.print_header()
     try:
         elapsed = execute_in_tmp_dir(run, litConfig)
     except KeyboardInterrupt:
         #TODO(yln): should we attempt to cleanup the progress bar here?
         sys.exit(2)
     # TODO(yln): display.finish_interrupted(), which shows the most recently started test
     # TODO(yln): change display to update when test starts, not when test completes
     # Ensure everything still works with SimpleProgressBar as well
     # finally:
-    #     display.clear()
+    #     display.finish()
 
-    display.clear()
+    display.finish()
     return elapsed
 
 def execute_in_tmp_dir(run, litConfig):
     # Create a temp directory inside the normal temp directory so that we can
     # try to avoid temporary test file leaks. The user can avoid this behavior
     # by setting LIT_PRESERVES_TMP in the environment, so they can easily use
     # their own temp directory to monitor temporary file leaks or handle them at
     # the buildbot level.

llvm/utils/lit/tests/shtest-env.py

 # Check the env command
 #
 # RUN: not %{lit} -j 1 -a -v %{inputs}/shtest-env \
 # RUN: | FileCheck -match-full-lines %s
 #
 # END.
 
 # Make sure env commands are included in printed commands.
 
-# CHECK: -- Testing: 13 tests{{.*}}
+# CHECK: -- Testing: 7 tests{{.*}}
 
 # CHECK: FAIL: shtest-env :: env-args-last-is-assign.txt ({{[^)]*}})
 # CHECK: Error: 'env' requires a subcommand
 # CHECK: error: command failed with exit status: {{.*}}
 
 # CHECK: FAIL: shtest-env :: env-args-last-is-u-arg.txt ({{[^)]*}})
 # CHECK: Error: 'env' requires a subcommand
 # CHECK: error: command failed with exit status: {{.*}}
 
 # CHECK: FAIL: shtest-env :: env-args-last-is-u.txt ({{[^)]*}})
 # CHECK: Error: 'env' requires a subcommand
 # CHECK: error: command failed with exit status: {{.*}}
 
 # CHECK: FAIL: shtest-env :: env-args-none.txt ({{[^)]*}})
 # CHECK: Error: 'env' requires a subcommand
 # CHECK: error: command failed with exit status: {{.*}}
 
-# CHECK: FAIL: shtest-env :: env-calls-cd.txt ({{[^)]*}})
-# CHECK: $ "env" "-u" "FOO" "BAR=3" "cd" "foobar"
-# CHECK: Error: 'env' cannot call 'cd'
-# CHECK: error: command failed with exit status: {{.*}}
-
-# CHECK: FAIL: shtest-env :: env-calls-colon.txt ({{[^)]*}})
-# CHECK: $ "env" "-u" "FOO" "BAR=3" ":"
-# CHECK: Error: 'env' cannot call ':'
-# CHECK: error: command failed with exit status: {{.*}}
-
-# CHECK: FAIL: shtest-env :: env-calls-echo.txt ({{[^)]*}})
-# CHECK: $ "env" "-u" "FOO" "BAR=3" "echo" "hello" "world"
-# CHECK: Error: 'env' cannot call 'echo'
-# CHECK: error: command failed with exit status: {{.*}}
-
-# CHECK: FAIL: shtest-env :: env-calls-export.txt ({{[^)]*}})
-# CHECK: $ "env" "-u" "FOO" "BAR=3" "export" "BAZ=3"
-# CHECK: Error: 'env' cannot call 'export'
-# CHECK: error: command failed with exit status: {{.*}}
-
-# CHECK: FAIL: shtest-env :: env-calls-mkdir.txt ({{[^)]*}})
-# CHECK: $ "env" "-u" "FOO" "BAR=3" "mkdir" "foobar"
-# CHECK: Error: 'env' cannot call 'mkdir'
-# CHECK: error: command failed with exit status: {{.*}}
-
-# CHECK: FAIL: shtest-env :: env-calls-rm.txt ({{[^)]*}})
-# CHECK: $ "env" "-u" "FOO" "BAR=3" "rm" "foobar"
-# CHECK: Error: 'env' cannot call 'rm'
-# CHECK: error: command failed with exit status: {{.*}}
-
 # CHECK: PASS: shtest-env :: env-u.txt ({{[^)]*}})
 # CHECK: $ "{{[^"]*}}" "print_environment.py"
 # CHECK: $ "env" "-u" "FOO" "{{[^"]*}}" "print_environment.py"
 # CHECK: $ "env" "-u" "FOO" "-u" "BAR" "{{[^"]*}}" "print_environment.py"
-# CHECK-NOT: ${{.*}}print_environment.py
 
 # CHECK: PASS: shtest-env :: env.txt ({{[^)]*}})
 # CHECK: $ "env" "A_FOO=999" "{{[^"]*}}" "print_environment.py"
 # CHECK: $ "env" "A_FOO=1" "B_BAR=2" "C_OOF=3" "{{[^"]*}}" "print_environment.py"
-# CHECK-NOT: ${{.*}}print_environment.py
 
 # CHECK: PASS: shtest-env :: mixed.txt ({{[^)]*}})
 # CHECK: $ "env" "A_FOO=999" "-u" "FOO" "{{[^"]*}}" "print_environment.py"
 # CHECK: $ "env" "A_FOO=1" "-u" "FOO" "B_BAR=2" "-u" "BAR" "C_OOF=3" "{{[^"]*}}" "print_environment.py"
-# CHECK-NOT: ${{.*}}print_environment.py
 
 # CHECK: Expected Passes : 3
-# CHECK: Unexpected Failures: 10
+# CHECK: Unexpected Failures: 4
 # CHECK-NOT: {{.}}

llvm/utils/update_analyze_test_checks.py

for prefixes, opt_args in prefix_list:
         print('Extracted FileCheck prefixes: ' + str(prefixes), file=sys.stderr)
 
       raw_tool_outputs = common.invoke_tool(args.opt_binary, opt_args, test)
 
       # Split analysis outputs by "Printing analysis " declarations.
       for raw_tool_output in re.split(r'Printing analysis ', raw_tool_outputs):
         common.build_function_body_dictionary(
           common.ANALYZE_FUNCTION_RE, common.scrub_body, [],
-          raw_tool_output, prefixes, func_dict, args.verbose, False)
+          raw_tool_output, prefixes, func_dict, args.verbose)
 
     is_in_function = False
     is_in_function_start = False
     prefix_set = set([prefix for prefixes, _ in prefix_list for prefix in prefixes])
     if args.verbose:
       print('Rewriting FileCheck prefixes: %s' % (prefix_set,), file=sys.stderr)
     output_lines = []
     output_lines.append(autogenerated_note)

llvm/utils/update_cc_test_checks.py

if args.clang is None:
     if args.llvm_bin is None:
       args.clang = 'clang'
     else:
       args.clang = os.path.join(args.llvm_bin, 'clang')
   if not distutils.spawn.find_executable(args.clang):
     print('Please specify --llvm-bin or --clang', file=sys.stderr)
     sys.exit(1)
 
-  # Determine the builtin includes directory so that we can update tests that
-  # depend on the builtin headers. See get_clang_builtin_include_dir() and
-  # use_clang() in llvm/utils/lit/lit/llvm/config.py.
-  try:
-    builtin_include_dir = subprocess.check_output(
-      [args.clang, '-print-file-name=include']).decode().strip()
-    SUBST['%clang_cc1'] = ['-cc1', '-internal-isystem', builtin_include_dir,
-                           '-nostdsysteminc']
-  except subprocess.CalledProcessError:
-    common.warn('Could not determine clang builtins directory, some tests '
-                'might not update correctly.')
-
   if args.opt is None:
     if args.llvm_bin is None:
       args.opt = 'opt'
     else:
       args.opt = os.path.join(args.llvm_bin, 'opt')
   if not distutils.spawn.find_executable(args.opt):
     # Many uses of this tool will not need an opt binary, because it's only
     # needed for updating a test that runs clang | opt | FileCheck. So we
with tempfile.NamedTemporaryFile() as f:
                 'Please specify --llvm-bin or --opt', file=sys.stderr)
           sys.exit(1)
         extra_args[0] = args.opt
       raw_tool_output = common.invoke_tool(extra_args[0],
                                            extra_args[1:], f.name)
   if '-emit-llvm' in clang_args:
     common.build_function_body_dictionary(
             common.OPT_FUNCTION_RE, common.scrub_body, [],
-            raw_tool_output, prefixes, func_dict, args.verbose, False)
+            raw_tool_output, prefixes, func_dict, args.verbose)
   else:
     print('The clang command line should include -emit-llvm as asm tests '
           'are discouraged in Clang testsuite.', file=sys.stderr)
     sys.exit(1)
 
 
 def main():
   args = config()

llvm/utils/update_test_checks.py

def main():
   parser.add_argument('--opt-binary', default='opt',
                       help='The opt binary used to generate the test case')
   parser.add_argument(
       '--function', help='The function in the test file to update')
   parser.add_argument('-u', '--update-only', action='store_true',
                       help='Only update test if it was already autogened')
   parser.add_argument('-p', '--preserve-names', action='store_true',
                       help='Do not scrub IR names')
-  parser.add_argument('--function-signature', action='store_true',
-                      help='Keep function signature information around for the check line')
   parser.add_argument('tests', nargs='+')
   args = parser.parse_args()
 
   script_name = os.path.basename(__file__)
   autogenerated_note = (ADVERT + 'utils/' + script_name)
 
   opt_basename = os.path.basename(args.opt_binary)
   if not re.match(r'^opt(-\d+)?$', opt_basename):
for test in test_paths:
     for prefixes, opt_args in prefix_list:
       if args.verbose:
         print('Extracted opt cmd: ' + opt_basename + ' ' + opt_args, file=sys.stderr)
         print('Extracted FileCheck prefixes: ' + str(prefixes), file=sys.stderr)
 
       raw_tool_output = common.invoke_tool(args.opt_binary, opt_args, test)
       common.build_function_body_dictionary(
               common.OPT_FUNCTION_RE, common.scrub_body, [],
-              raw_tool_output, prefixes, func_dict, args.verbose,
-              args.function_signature)
+              raw_tool_output, prefixes, func_dict, args.verbose)
 
     is_in_function = False
     is_in_function_start = False
     prefix_set = set([prefix for prefixes, _ in prefix_list for prefix in prefixes])
     if args.verbose:
       print('Rewriting FileCheck prefixes: %s' % (prefix_set,), file=sys.stderr)
     output_lines = []
     output_lines.append(autogenerated_note)