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[ARM] Better OR's for MVE compares
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Authored by dmgreen on Jul 21 2019, 10:32 AM.

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Summary

This adds a DeMorgan combine for OR's of compares to turn them into AND's, helping prevent them from going into and out of gpr registers. It also fills in the VCLE and VCLT nodes that MVE can select, allowing it to invert more compares.

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rL LLVM

Event Timeline

dmgreen created this revision.Jul 21 2019, 10:32 AM
SjoerdMeijer added inline comments.Jul 22 2019, 12:57 AM
llvm/lib/Target/ARM/ARMISelLowering.cpp
11850 ↗(On Diff #211004)

I am wondering if a map is easier as a data structure here so that you can just do a lookup and don't need the for-loop here?

dmgreen marked 2 inline comments as done.Jul 22 2019, 4:57 AM
dmgreen added inline comments.
llvm/lib/Target/ARM/ARMISelLowering.cpp
11850 ↗(On Diff #211004)

I think it may be simpler to just deal with condition codes directly, as in D65072. It allows us to just use the existing methods for getting inverse nodes, for example.

This revision is now accepted and ready to land.Jul 22 2019, 5:01 AM
dmgreen updated this revision to Diff 211117.Jul 22 2019, 8:55 AM

Changed std::vector to SmallVector

This revision was automatically updated to reflect the committed changes.