push LR before mcount on ARM

[t.p.northover]

What a horrible function. AAPCS? Who cares about that?

llvm/lib/Target/ARM/CMakeLists.txt

54

This filename is too generic. It handles a single GNU-specific profiling function.

llvm/lib/Target/ARM/CustomCallLoweringPass.cpp

1

This needs a comment header, with the usual licensing info and a brief description of what this pass does.

33

Can this be initialized from the call instruction?

45

What happens if a function calling the counter gets inlined?

For pure stack correctness you probably need to ensure all calls to mcount get a push before them; the counts may be screwy but that's probably better than a segfault.

[jcai19]

In D65037#1594477, @t.p.northover wrote:

What a horrible function. AAPCS? Who cares about that?

Thanks for the comments. I think I accidentally created two redundant code reviews. Please take a look at https://reviews.llvm.org/D65019. There has already been suggestion for a more formal solution by introducing an ARM intinriscs that hopefully should address these concerns.

[jcai19]

A front test of mcount was broken since we renamed gnu_mcount_nc to an intrinsic. Needs to fix the test before reapplying the changes.

[jcai19]

Fix frontend unit tests for __gnu_mcount_nc.

llvm/lib/Target/ARM/ARM.h

 FunctionPass *createARMCodeGenPreparePass();
 FunctionPass *createARMConstantIslandPass();
 FunctionPass *createMLxExpansionPass();
 FunctionPass *createThumb2ITBlockPass();
 FunctionPass *createMVEVPTBlockPass();
 FunctionPass *createARMOptimizeBarriersPass();
 FunctionPass *createThumb2SizeReductionPass(
     std::function<bool(const Function &)> Ftor = nullptr);
+FunctionPass *createMcountLoweringPass();
 InstructionSelector *
 createARMInstructionSelector(const ARMBaseTargetMachine &TM, const ARMSubtarget &STI,
                              const ARMRegisterBankInfo &RBI);
 
 void LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
                                   ARMAsmPrinter &AP);
 
 void initializeARMParallelDSPPass(PassRegistry &);

llvm/lib/Target/ARM/ARMTargetMachine.cpp

addPass(createIfConverter([](const MachineFunction &MF) {
       return !MF.getSubtarget<ARMSubtarget>().isThumb1Only();
     }));
   }
   addPass(createMVEVPTBlockPass());
   addPass(createThumb2ITBlockPass());
 }
 
 void ARMPassConfig::addPreEmitPass() {
+  addPass(createMcountLoweringPass());
   addPass(createThumb2SizeReductionPass());
 
   // Constant island pass work on unbundled instructions.
   addPass(createUnpackMachineBundles([](const MachineFunction &MF) {
     return MF.getSubtarget<ARMSubtarget>().isThumb2();
   }));
 
   // Don't optimize barriers at -O0.
   if (getOptLevel() != CodeGenOpt::None)
     addPass(createARMOptimizeBarriersPass());
 
   addPass(createARMConstantIslandPass());
   addPass(createARMLowOverheadLoopsPass());
 }

llvm/lib/Target/ARM/CMakeLists.txt

add_llvm_target(ARMCodeGen
   ARMRegisterInfo.cpp
   ARMOptimizeBarriersPass.cpp
   ARMRegisterBankInfo.cpp
   ARMSelectionDAGInfo.cpp
   ARMSubtarget.cpp
   ARMTargetMachine.cpp
   ARMTargetObjectFile.cpp
   ARMTargetTransformInfo.cpp
+  CustomCallLoweringPass.cpp
   MLxExpansionPass.cpp
   Thumb1FrameLowering.cpp
   Thumb1InstrInfo.cpp
   ThumbRegisterInfo.cpp
   Thumb2ITBlockPass.cpp
   Thumb2InstrInfo.cpp
   Thumb2SizeReduction.cpp
   )
 
 add_subdirectory(AsmParser)
 add_subdirectory(Disassembler)
 add_subdirectory(MCTargetDesc)
 add_subdirectory(TargetInfo)
 add_subdirectory(Utils)

llvm/lib/Target/ARM/CustomCallLoweringPass.cpp

+#include "ARM.h"
+#include "ARMBaseInstrInfo.h"
+#include "ARMSubtarget.h"
+#include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineFunctionPass.h"
+#include "llvm/Pass.h"
+#include "llvm/Support/raw_ostream.h"
+
+#define DEBUG_TYPE "arm-custom-call-lowering"
+
+using namespace llvm;
+
+namespace {
+class McountLoweringPass : public MachineFunctionPass {
+public:
+  static char ID;
+
+  McountLoweringPass() : MachineFunctionPass(ID) {}
+
+  virtual bool runOnMachineFunction(MachineFunction &MF) override {
+    LLVM_DEBUG(dbgs() << MF.getName() << "\n");
+    for (MachineBasicBlock &MBB : MF) {
+      for (MachineInstr &MI : MBB) {
+        if (MI.isCall()) {
+          for (MachineOperand &MOP : MI.operands()) {
+            if (MOP.isGlobal()) {
+              if (const GlobalValue *GV = MOP.getGlobal()) {
+                if (GV->getName() == "\01__gnu_mcount_nc") {
+                  LLVM_DEBUG(dbgs() << MI << "\n");
+                  const ARMSubtarget &ST = MF.getSubtarget<ARMSubtarget>();
+                  const ARMBaseInstrInfo &TII = *ST.getInstrInfo();
+                  DebugLoc DL;
+                  if (ST.isThumb()) {
+                    BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH))
+                        .add(predOps(ARMCC::AL))
+                        .addReg(ARM::LR);
+                  } else {
+                    BuildMI(MBB, MI, DL, TII.get(ARM::STMDB_UPD))
+                        .addReg(ARM::SP, RegState::Define)
+                        .addReg(ARM::SP)
+                        .add(predOps(ARMCC::AL))
+                        .addReg(ARM::LR);
+                  }
+                  return true;
+                }
+              }
+            }
+          }
+        }
+      }
+    }
+    return false;
+  }
+};
+} // namespace
+
+FunctionPass *llvm::createMcountLoweringPass() {
+  return new McountLoweringPass();
+}
+
+char McountLoweringPass::ID = 0;
+static RegisterPass<McountLoweringPass> X("arm-mcount-lowering",
+                                          "ARM mcount Call Lowering Pass");

llvm/test/CodeGen/ARM/gnu_mcount_nc.ll

+; RUN: llc -mtriple=armv7a-linux-gnueabihf %s -o - | FileCheck %s --check-prefix=CHECK-ARM
+; RUN: llc -mtriple=thumbv7a-linux-gnueabihf %s -o - | FileCheck %s --check-prefix=CHECK-THUMB
+
+define dso_local i32 @foo(i64) local_unnamed_addr #0 {
+; CHECK-ARM:        stmdb   sp!, {lr}
+; CHECK-ARM-NOT:    stmdb   sp!, {lr}
+; CHECK-ARM-NEXT:   bl      __gnu_mcount_nc
+; CHECK-THUMB:      push    {lr}
+; CHECK-THUMB-NOT:  push    {lr}
+; CHECK-THUMB-NEXT: bl      __gnu_mcount_nc
+  %2 = mul nsw i64 %0, %0
+  %3 = trunc i64 %2 to i32
+  ret i32 %3
+}
+
+attributes #0 = { nofree nounwind "instrument-function-entry-inlined"="\01__gnu_mcount_nc" }