[ELF][ARM][AARCH64][MIPS][PPC] Simplify the logic to create R_*_RELATIVE for absolute relocation types in writable sections

[MaskRay]

Summary

Our rule to create R_*_RELATIVE for absolute relocation types were
loose. D63121 made it stricter but it failed to create R_*_RELATIVE for
R_ARM_TARGET1 and R_PPC64_TOC. The original behavior of ARM and PPC64 is
restored by rLLD363236.

This patch is an attempt to simplify the logic.

Note, in ld.bfd, R_ARM_TARGET2 --target2=abs also creates
R_ARM_RELATIVE. This seems a very uncommon scenario (moreover,
--target2=got-rel is the default), so I do not implement any logic
related to it.

Also, delete R_AARCH64_ABS32 from AArch64::getDynRel. We don't have
working ILP32 support yet. Allowing it would create an incorrect
R_AARCH64_RELATIVE.

For MIPS, the (if SymbolRel, then RelativeRel) code is to keep its
behavior unchanged.

Note, in ppc64-abs64-dyn.s, R_PPC64_TOC gets an incorrect addend because
computeAddend() doesn't compute the correct address. We seem to have the
wrong behavior for a long time. The important thing seems that we should
not create a dynamic relocation R_PPC64_TOC as that the dynamic loader
will error that relocation type is not supported.

[MaskRay]

Forgot to add aarch64-abs32-dyn.s

[MaskRay]

Fix *-abs32-dyn.s

[peter.smith]

From the Arm and AArch64 side this looks good to me, probably best if the Mips and PPC experts confirm their parts.

test/ELF/arm-abs32-dyn.s

17

R_ARM_32 should be R_ARM_ABS32.

[atanasyan]

The MIPS part of changes looks good.

[sfertile]

PowerPC64 changes LGTM.

[MaskRay]

Fix a comment in arm-abs32-dyn.s: R_ARM_32 -> R_ARM_ABS32

[MaskRay]

This looks good from Arm/AArch64/MIPS/PPC sides. @ruiu What's your opinion?

[ruiu]

LGTM

ELF/Arch/AArch64.cpp

bool AArch64::usesOnlyLowPageBits(RelType Type) const {
   case R_AARCH64_TLSDESC_ADD_LO12:
   case R_AARCH64_TLSDESC_LD64_LO12:
   case R_AARCH64_TLSIE_LD64_GOTTPREL_LO12_NC:
     return true;
   }
 }
 
 RelType AArch64::getDynRel(RelType Type) const {
-  if (Type == R_AARCH64_ABS32 || Type == R_AARCH64_ABS64)
+  if (Type == R_AARCH64_ABS64)
     return Type;
   return R_AARCH64_NONE;
 }
 
 void AArch64::writeGotPlt(uint8_t *Buf, const Symbol &) const {
   write64le(Buf, In.Plt->getVA());
 }
 

ELF/Arch/AMDGPU.cpp

 namespace {
 class AMDGPU final : public TargetInfo {
 public:
   AMDGPU();
   uint32_t calcEFlags() const override;
   void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
   RelExpr getRelExpr(RelType Type, const Symbol &S,
                      const uint8_t *Loc) const override;
+  RelType getDynRel(RelType Type) const override;
 };
 } // namespace
 
 AMDGPU::AMDGPU() {
   RelativeRel = R_AMDGPU_RELATIVE64;
   GotRel = R_AMDGPU_ABS64;
   NoneRel = R_AMDGPU_NONE;
   SymbolicRel = R_AMDGPU_ABS64;
case R_AMDGPU_GOTPCREL32_HI:
     return R_GOT_PC;
   default:
     error(getErrorLocation(Loc) + "unknown relocation (" + Twine(Type) +
           ") against symbol " + toString(S));
     return R_NONE;
   }
 }
 
+RelType AMDGPU::getDynRel(RelType Type) const {
+  if (Type == R_AMDGPU_ABS64)
+    return Type;
+  return R_AMDGPU_NONE;
+}
+
 TargetInfo *elf::getAMDGPUTargetInfo() {
   static AMDGPU Target;
   return &Target;
 }

ELF/Arch/Mips.cpp

RelExpr MIPS<ELFT>::getRelExpr(RelType Type, const Symbol &S,
   default:
     error(getErrorLocation(Loc) + "unknown relocation (" + Twine(Type) +
           ") against symbol " + toString(S));
     return R_NONE;
   }
 }
 
 template <class ELFT> RelType MIPS<ELFT>::getDynRel(RelType Type) const {
-  if (Type == R_MIPS_32 || Type == R_MIPS_64)
-    return RelativeRel;
+  if (Type == SymbolicRel)
+    return Type;
   return R_MIPS_NONE;
 }
 
 template <class ELFT>
 void MIPS<ELFT>::writeGotPlt(uint8_t *Buf, const Symbol &) const {
   uint64_t VA = In.Plt->getVA();
   if (isMicroMips())
     VA |= 1;

ELF/Arch/PPC.cpp

 using namespace llvm::ELF;
 using namespace lld;
 using namespace lld::elf;
 
 namespace {
 class PPC final : public TargetInfo {
 public:
   PPC();
+  RelExpr getRelExpr(RelType Type, const Symbol &S,
+                     const uint8_t *Loc) const override;
+  RelType getDynRel(RelType Type) const override;
   void writeGotHeader(uint8_t *Buf) const override;
   void writePltHeader(uint8_t *Buf) const override {
     llvm_unreachable("should call writePPC32GlinkSection() instead");
   }
   void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
     int32_t Index, unsigned RelOff) const override {
     llvm_unreachable("should call writePPC32GlinkSection() instead");
   }
   void writeGotPlt(uint8_t *Buf, const Symbol &S) const override;
   bool needsThunk(RelExpr Expr, RelType RelocType, const InputFile *File,
                   uint64_t BranchAddr, const Symbol &S) const override;
   uint32_t getThunkSectionSpacing() const override;
   bool inBranchRange(RelType Type, uint64_t Src, uint64_t Dst) const override;
-  RelExpr getRelExpr(RelType Type, const Symbol &S,
-                     const uint8_t *Loc) const override;
   void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
   RelExpr adjustRelaxExpr(RelType Type, const uint8_t *Data,
                           RelExpr Expr) const override;
   int getTlsGdRelaxSkip(RelType Type) const override;
   void relaxTlsGdToIe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
   void relaxTlsGdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
   void relaxTlsLdToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
   void relaxTlsIeToLe(uint8_t *Loc, RelType Type, uint64_t Val) const override;
RelExpr PPC::getRelExpr(RelType Type, const Symbol &S,
   case R_PPC_TPREL16_LO:
   case R_PPC_TPREL16_HI:
     return R_TLS;
   default:
     return R_ABS;
   }
 }
 
+RelType PPC::getDynRel(RelType Type) const {
+  if (Type == R_PPC_ADDR32)
+    return Type;
+  return R_PPC_NONE;
+}
+
 static std::pair<RelType, uint64_t> fromDTPREL(RelType Type, uint64_t Val) {
   uint64_t DTPBiasedVal = Val - 0x8000;
   switch (Type) {
   case R_PPC_DTPREL16:
     return {R_PPC64_ADDR16, DTPBiasedVal};
   case R_PPC_DTPREL16_HA:
     return {R_PPC_ADDR16_HA, DTPBiasedVal};
   case R_PPC_DTPREL16_HI:

ELF/Arch/PPC64.cpp

 namespace {
 class PPC64 final : public TargetInfo {
 public:
   PPC64();
   int getTlsGdRelaxSkip(RelType Type) const override;
   uint32_t calcEFlags() const override;
   RelExpr getRelExpr(RelType Type, const Symbol &S,
                      const uint8_t *Loc) const override;
+  RelType getDynRel(RelType Type) const override;
   void writePltHeader(uint8_t *Buf) const override;
   void writePlt(uint8_t *Buf, uint64_t GotPltEntryAddr, uint64_t PltEntryAddr,
                 int32_t Index, unsigned RelOff) const override;
   void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const override;
   void writeGotHeader(uint8_t *Buf) const override;
   bool needsThunk(RelExpr Expr, RelType Type, const InputFile *File,
                   uint64_t BranchAddr, const Symbol &S) const override;
   uint32_t getThunkSectionSpacing() const override;
case R_PPC64_TLSLD:
     return R_TLSLD_HINT;
   case R_PPC64_TLS:
     return R_TLSIE_HINT;
   default:
     return R_ABS;
   }
 }
 
+RelType PPC64::getDynRel(RelType Type) const {
+  if (Type == R_PPC64_ADDR64 || Type == R_PPC64_TOC)
+    return R_PPC64_ADDR64;
+  return R_PPC64_NONE;
+}
+
 void PPC64::writeGotHeader(uint8_t *Buf) const {
   write64(Buf, getPPC64TocBase());
 }
 
 void PPC64::writePltHeader(uint8_t *Buf) const {
   // The generic resolver stub goes first.
   write32(Buf +  0, 0x7c0802a6); // mflr r0
   write32(Buf +  4, 0x429f0005); // bcl  20,4*cr7+so,8 <_glink+0x8>

ELF/Relocations.cpp

static void processRelocAux(InputSectionBase &Sec, RelExpr Expr, RelType Type,
   if (isStaticLinkTimeConstant(Expr, Type, Sym, Sec, Offset) ||
       (!Config->Shared && Sym.isUndefWeak())) {
     Sec.Relocations.push_back({Expr, Type, Offset, Addend, &Sym});
     return;
   }
 
   bool CanWrite = (Sec.Flags & SHF_WRITE) || !Config->ZText;
   if (CanWrite) {
-    // FIXME Improve the way we handle absolute relocation types that will
-    // change to relative relocations. ARM has a relocation type R_ARM_TARGET1
-    // that is similar to SymbolicRel. PPC64 may have similar relocation types.
-    if ((!Sym.IsPreemptible &&
-         (Config->EMachine == EM_ARM || Config->EMachine == EM_PPC64 ||
-          Type == Target->SymbolicRel)) ||
-        Expr == R_GOT) {
-      // If this is a symbolic relocation to a non-preemptable symbol, or an
-      // R_GOT, its address is its link-time value plus load address. Represent
-      // it with a relative relocation.
+    RelType Rel = Target->getDynRel(Type);
+    if (Expr == R_GOT || (Rel == Target->SymbolicRel && !Sym.IsPreemptible)) {
       addRelativeReloc(&Sec, Offset, &Sym, Addend, Expr, Type);
       return;
-    } else if (RelType Rel = Target->getDynRel(Type)) {
+    } else if (Rel != 0) {
+      if (Config->EMachine == EM_MIPS && Rel == Target->SymbolicRel)
+        Rel = Target->RelativeRel;
       Sec.getPartition().RelaDyn->addReloc(Rel, &Sec, Offset, &Sym, Addend,
                                            R_ADDEND, Type);
 
       // MIPS ABI turns using of GOT and dynamic relocations inside out.
       // While regular ABI uses dynamic relocations to fill up GOT entries
       // MIPS ABI requires dynamic linker to fills up GOT entries using
       // specially sorted dynamic symbol table. This affects even dynamic
       // relocations against symbols which do not require GOT entries

ELF/Target.h

 namespace elf {
 class Defined;
 class InputFile;
 class Symbol;
 
 class TargetInfo {
 public:
   virtual uint32_t calcEFlags() const { return 0; }
-  virtual RelType getDynRel(RelType Type) const { return Type; }
+  virtual RelExpr getRelExpr(RelType Type, const Symbol &S,
+                             const uint8_t *Loc) const = 0;
+  virtual RelType getDynRel(RelType Type) const { return 0; }
   virtual void writeGotPltHeader(uint8_t *Buf) const {}
   virtual void writeGotHeader(uint8_t *Buf) const {}
   virtual void writeGotPlt(uint8_t *Buf, const Symbol &S) const {};
   virtual void writeIgotPlt(uint8_t *Buf, const Symbol &S) const;
   virtual int64_t getImplicitAddend(const uint8_t *Buf, RelType Type) const;
   virtual int getTlsGdRelaxSkip(RelType Type) const { return 1; }
 
   // If lazy binding is supported, the first entry of the PLT has code
public:
   // The symbols st_other flags are needed on PowerPC64 for determining the
   // offset to the split-stack prologue.
   virtual bool adjustPrologueForCrossSplitStack(uint8_t *Loc, uint8_t *End,
                                                 uint8_t StOther) const;
 
   // Return true if we can reach Dst from Src with Relocation RelocType
   virtual bool inBranchRange(RelType Type, uint64_t Src,
                              uint64_t Dst) const;
-  virtual RelExpr getRelExpr(RelType Type, const Symbol &S,
-                             const uint8_t *Loc) const = 0;
 
   virtual void relocateOne(uint8_t *Loc, RelType Type, uint64_t Val) const = 0;
 
   virtual ~TargetInfo();
 
   unsigned DefaultCommonPageSize = 4096;
   unsigned DefaultMaxPageSize = 4096;
 

test/ELF/aarch64-abs32-dyn.s

+# REQUIRES: aarch64
+# RUN: llvm-mc -filetype=obj -triple=aarch64 %s -o %t.o
+# RUN: not ld.lld -shared %t.o -o /dev/null 2>&1 | FileCheck %s
+
+# CHECK: error: relocation R_AARCH64_ABS32 cannot be used against symbol external; recompile with -fPIC
+
+.data
+.long external

test/ELF/arm-abs32-dyn.s

 // REQUIRES: arm
 // RUN: llvm-mc -filetype=obj -triple=armv7a-none-linux %s -o %t.o
 
 // Creates a R_ARM_ABS32 relocation against foo and bar, bar has hidden
 // visibility so we expect a R_ARM_RELATIVE
  .syntax unified
  .globl foo
 foo:
  .globl bar
  .hidden bar
 bar:
 
  .data
  .word foo
  .word bar
 
+// In PIC mode, if R_ARM_TARGET1 represents R_ARM_32 (the default), an
+// R_ARM_TARGET1 to a non-preemptable symbol also creates an R_ARM_RELATIVE in
+// a writable section.
+ .word bar(target1)
+
 // RUN: ld.lld -shared -o %t.so %t.o
 // RUN: llvm-readobj --symbols --dyn-relocations %t.so | FileCheck %s
+// RUN: llvm-readelf -x .data %t.so | FileCheck --check-prefix=HEX %s
 
 // CHECK:      Dynamic Relocations {
 // CHECK-NEXT:   0x2004 R_ARM_RELATIVE
+// CHECK-NEXT:   0x2008 R_ARM_RELATIVE
 // CHECK-NEXT:   0x2000 R_ARM_ABS32 foo 0x0
 // CHECK-NEXT: }
 
 // CHECK:      Symbols [
 // CHECK:        Symbol {
 // CHECK:          Name: bar
 // CHECK-NEXT:     Value: 0x1000
 
 // CHECK:        Symbol {
 // CHECK:          Name: foo
 // CHECK-NEXT:     Value: 0x1000
+
+// HEX: 0x00002000 00000000 00100000 00100000

test/ELF/ppc64-abs32-dyn.s

+# REQUIRES: ppc
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le %s -o %t.o
+# RUN: not ld.lld -shared %t.o -o /dev/null 2>&1 | FileCheck %s
+
+# CHECK: error: relocation R_PPC64_ADDR32 cannot be used against symbol external; recompile with -fPIC
+
+.data
+.long external

test/ELF/ppc64-abs64-dyn.s

+# REQUIRES: ppc
+# RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
+# RUN: ld.lld -shared %t.o -o %t.so
+# RUN: llvm-readobj -r %t.so | FileCheck %s
+
+# RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
+# RUN: ld.lld -shared %t.o -o %t.so
+# RUN: llvm-readobj -r %t.so | FileCheck %s
+
+## Test that we create R_PPC64_RELATIVE for R_PPC64_ADDR64 to non-preemptable
+## symbols and R_PPC64_TOC in writable sections.
+
+## FIXME the addend for offset 0x20000 should be TOC base+0x8000+1, not 0x80001.
+# CHECK:      .rela.dyn {
+# CHECK-NEXT:   0x20000 R_PPC64_RELATIVE - 0x8001
+# CHECK-NEXT:   0x20008 R_PPC64_RELATIVE - 0x20001
+# CHECK-NEXT:   0x20010 R_PPC64_ADDR64 external 0x1
+# CHECK-NEXT:   0x20018 R_PPC64_ADDR64 global 0x1
+# CHECK-NEXT: }
+
+.data
+.globl global
+global:
+local:
+
+.quad .TOC.@tocbase + 1
+.quad local + 1
+.quad external + 1
+.quad global + 1

test/ELF/relative-dynamic-reloc-ppc64.s

-// REQUIRES: ppc
-// RUN: llvm-mc -filetype=obj -triple=powerpc64le-unknown-linux %s -o %t.o
-// RUN: ld.lld -shared %t.o -o %t.so
-// RUN: llvm-readobj --symbols -r --dyn-syms %t.so | FileCheck %s
-
-// RUN: llvm-mc -filetype=obj -triple=powerpc64-unknown-linux %s -o %t.o
-// RUN: ld.lld -shared %t.o -o %t.so
-// RUN: llvm-readobj --symbols -r --dyn-syms %t.so | FileCheck %s
-
-// Test that we create R_PPC64_RELATIVE relocations but don't put any
-// symbols in the dynamic symbol table.
-
-// CHECK:      Relocations [
-// CHECK-NEXT:   Section ({{.*}}) .rela.dyn {
-// CHECK-NEXT:     0x[[FOO_ADDR:.*]] R_PPC64_RELATIVE - 0x[[FOO_ADDR]]
-// CHECK-NEXT:     0x[[BAR_ADDR:.*]] R_PPC64_RELATIVE - 0x[[BAR_ADDR]]
-// CHECK-NEXT:     0x20010 R_PPC64_RELATIVE - 0x20009
-// CHECK-NEXT:     0x{{.*}} R_PPC64_RELATIVE - 0x[[ZED_ADDR:.*]]
-// CHECK-NEXT:     0x{{.*}} R_PPC64_RELATIVE - 0x[[FOO_ADDR]]
-// CHECK-NEXT:     0x20028 R_PPC64_ADDR64 external 0x0
-// CHECK-NEXT:   }
-// CHECK-NEXT: ]
-
-// CHECK:      Symbols [
-// CHECK:        Name: foo
-// CHECK-NEXT:   Value: 0x[[FOO_ADDR]]
-// CHECK:        Name: bar
-// CHECK-NEXT:   Value: 0x[[BAR_ADDR]]
-// CHECK:        Name: zed
-// CHECK-NEXT:   Value: 0x[[ZED_ADDR]]
-// CHECK:      ]
-
-// CHECK:      DynamicSymbols [
-// CHECK-NEXT:   Symbol {
-// CHECK-NEXT:     Name:
-// CHECK-NEXT:     Value: 0x0
-// CHECK-NEXT:     Size: 0
-// CHECK-NEXT:     Binding: Local
-// CHECK-NEXT:     Type: None
-// CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: Undefined
-// CHECK-NEXT:   }
-// CHECK-NEXT:   Symbol {
-// CHECK-NEXT:     Name: external
-// CHECK-NEXT:     Value: 0x0
-// CHECK-NEXT:     Size: 0
-// CHECK-NEXT:     Binding: Global
-// CHECK-NEXT:     Type: None
-// CHECK-NEXT:     Other: 0
-// CHECK-NEXT:     Section: Undefined
-// CHECK-NEXT:   }
-// CHECK-NEXT: ]
-
-        .data
-foo:
-        .quad foo
-
-        .hidden bar
-        .global bar
-bar:
-        .quad bar
-        .quad bar + 1
-
-        .hidden zed
-        .comm zed,1
-        .quad zed
-
-        .section abc,"aw"
-        .quad foo
-
-        .quad external

test/ELF/shared-ppc64.s

 // CHECK-NEXT:   0x0000000000000008 RELASZ               [[RELSIZE]] (bytes)
 // CHECK-NEXT:   0x0000000000000009 RELAENT              [[RELENT]] (bytes)
 // CHECK:        0x0000000000000000 NULL                 0x0
 // CHECK-NEXT: ]
 
 .global _start
 _start:
 .data
-.long bar
-.long zed
+.quad bar
+.quad zed