[MachineFunction] Base support for call site info tracking

[djtodoro]

Summary

Add an attribute into MachineFunction that tracks call site info.

Authors: @asowda, @NikolaPrica, @djtodoro, @ivanbaev

[aprantl]

Do we ever see ourselves supporting anything except registers here?

include/llvm/CodeGen/MIRYamlMapping.h

346 ↗

(On Diff #196426)

We only have an unsigned : 16 for this in DILocalVariable, and realistically there won't be more than 256 arguments passed in *registers* on any architecture, so this could be an unsigned char.

StringValue Reg;
unsigned char / uint16_t ArgNo;

oh wait.. this is only for YAML? I don't care then :-)

include/llvm/CodeGen/MachineFunction.h

380 ↗

(On Diff #196426)

... but here I do!

struct ArgRegPair {
  unsigned Reg;
  unsigned ArgNo : 16;
}

[bjope]

include/llvm/CodeGen/MachineFunction.h

379 ↗

(On Diff #196426)

My experience is that argument numbers are tricky. The source function on C level could have X arguments, which becomes Y arguments in LLVM IR, and then after lowering we get Z arguments. Since this is in MachineFunction I would assume that this counts the lowered formal arguments or something like that (even though I have no idea how that will be mapped back to source level arguments later in debug info)?

Maybe we want to explain what ArgNo is (how is it counted). Or is that explained somewhere else (then perhaps some kind of reference could be helpful)?

[aprantl]

include/llvm/CodeGen/MachineFunction.h

379 ↗

(On Diff #196426)

That is a very good point. How does this behave for

struct pair { int a; int b; };

struct pair foo(struct pair p) {}

on x86_64, where a and b are passed in argument registers 0 and 1, respectively?

[NikolaPrica]

include/llvm/CodeGen/MachineFunction.h

379 ↗

(On Diff #196426)

@bjope You are right, ArgNo represents the "ID" of lower argument. For now we cover cases when argument is passed through one register. But in the future ArgNo should be used to cover cases when argument transferring is split to two registers and then we would have:

ArgNo: 1 : Reg0
ArgNo: 1 : Reg1

But if we want to preserve mappings between source-IR-MachineIR I guess that we would just need to adjust those ArgNos to match them.
We will make a comment about this.

[djtodoro]

-Update ArgRegPair struct
-Rebase

[bjope]

lib/CodeGen/MIRParser/MIRParser.cpp

440 ↗

(On Diff #199216)

I guess it is OK to silently ignore the CallSitesInfo if the support isn't enabled (although I do not know if we have solved similar compatibility problems differently before). Another alternative is ofcourse to give an error if we find CallSiteInfo in the MIR and it isn't enabled. Maybe the latter is easier for the user to understand (no risk for a surpise that it just is silently ignored).

Right now we do not even parse and validate the named reigster references in the CallSiteInfo when EnableDebugEntryValues is false. So we also have the option of checking the EnableDebugEntryValues late (guarding the addCallArgsForwardingRegs call) to not ignore, but simply don't use the info when EnableDebugEntryValues is false.

Is the "silent ignore" option carefully chosen here? Either way, I think some code comments could elaborate a little bit about the choice.

441 ↗

(On Diff #199216)

I suggest creating a helper function for this (similar to setupRegisterInfo etc. above) instead of inlining it here in initializeMachineFunction. Maybe it should include the check for EnableDebugEntryValues (might depend on the above questions about the behavior when there is call site info and EnableDebugEntryValues is false).

[aprantl]

include/llvm/CodeGen/MIRYamlMapping.h

354 ↗

(On Diff #199216)

///

[thegameg]

I think this is the first type of entry in MIR that references instructions directly, and it seems quite easy to forget to update the offset in the block when adding/removing instructions, but I guess checking for ranges and if the instruction is a call might help.

@qcolombet, did anything like this come up in the past?

lib/CodeGen/MIRParser/MIRParser.cpp

440 ↗

(On Diff #199216)

I agree with @bjope. We should at least validate all parts of the MIR, and I would prefer having an error if it's not enabled than just silently ignore it (and have a test for both cases). Either way, also agree with adding comments regardless of the direction this takes.

442 ↗

(On Diff #199216)

Should this be somehow validated too? We should at least check if the block is in range and if the instruction is in range, and at least a test for each case.

445 ↗

(On Diff #199216)

Should this be an error?

[qcolombet]

did anything like this come up in the past?

Not that I know of and I agree this seems very fragile.

Side question, I thought the right way to fix that was to provide better APIs to query ABI lowering information for debugger and other tools. Adding this information here seems a step in a wrong direction.

[djtodoro]

-Add a helper function for initialization of call site info
-Add tests for error checking of call site initialization

[NikolaPrica]

Maybe it would be better to use a call instruction number? For example, use {id: 1} for first call instruction in MIR stream instead of {bb: 0 , offset: 3}? Or use {bb:0 , ID: 1} for the first instruction in basic block 0?

Side question, I thought the right way to fix that was to provide better APIs to query ABI lowering information for debugger and other tools. Adding this information here seems a step in a wrong direction.

@qcolombet Thanks for participating in this! Call ABI lowering happens at ISEL stage so we thought that it is the right place to collect information about it and preserve it inside MF. We are open for suggestions to try out. Please provide us with more details about your idea.

[qcolombet]

Please provide us with more details about your idea.

When we lower a call we invoke some method to do the lowering to register, frame index etc. The idea would be to extract this code (easier said than done) into its own library and use this API to produce the debug info instead of carrying this information in the MachineFunction.

[djtodoro]

-Rebase

[NikolaPrica]

In D61061#1505375, @qcolombet wrote:

Please provide us with more details about your idea.

When we lower a call we invoke some method to do the lowering to register, frame index etc. The idea would be to extract this code (easier said than done) into its own library and use this API to produce the debug info instead of carrying this information in the MachineFunction.

Thanks for the suggestion. Sorry for the late response. This would indeed be very useful.

We think that there are too many difficulties for bringing such API. In order to provide such API, we would need to know what function is called with the MIR call instruction in order to invoke APIs lowering process for that function. This should be easy for direct calls, (i.e. we have pointer to global function and we could somehow invoke lowering process for it, yet there is the question: how we should handle variadic function calls). However, for indirect calls we cannot think of any good way. Some kind of mapping between an IR call instruction and the MIR call instruction is needed for that (but this again requires carrying additional information and it is not suitable for other tools I suppose). Different mapping could possibly be achieved by debug/source location of the MIR call instruction. Basically, that is extracting information from the source code. That does not sound good at all! If we ignore the fact that we significantly raise the complexity of this feature with such approach, calling fronted procedures in order to reconstruct the calling context smells like significant overhead at least.

Currently we are inserting additional code in call lowering methods to collect call arguments forwarding information. If someone comes up with good solution, the only thing that needs to be changed is the place where we store collected information and to remove all code that updates MachineFunction’s call site info through the backend.

[aprantl]

minor nitpick inside.

include/llvm/CodeGen/MachineFunction.h

387 ↗

(On Diff #201509)

even better:

unsigned Reg;
uint16_t ArgNo;

(in that order)

[djtodoro]

-Addressing suggestions

[djtodoro]

-Remove an unwanted code refactor change

llvm/trunk/docs/MIRLangRef.rst

 
 .. code-block:: text
 
      ---
      name:            inc
      tracksRegLiveness: true
      liveins:
        - { reg: '$rdi' }
+     callSites:
+       - { bb: 0, offset: 3, fwdArgRegs:
+           - { arg: 0, reg: '$edi' } }
      body: |
        bb.0.entry:
          liveins: $rdi
 
          $eax = MOV32rm $rdi, 1, _, 0, _
          $eax = INC32r killed $eax, implicit-def dead $eflags
          MOV32mr killed $rdi, 1, _, 0, _, $eax
+         CALL64pcrel32 @foo <regmask...>
          RETQ $eax
      ...
 
 The document above consists of attributes that represent the various
 properties and data structures in a machine function.
 
 The attribute ``name`` is required, and its value should be identical to the
 name of a function that this machine function is based on.
 
 The attribute ``body`` is a `YAML block literal string`_. Its value represents
 the function's machine basic blocks and their machine instructions.
 
+The attribute ``callSites`` is a representation of call site information which
+keeps track of call instructions and registers used to transfer call arguments.
+
 Machine Instructions Format Reference
 =====================================
 
 The machine basic blocks and their instructions are represented using a custom,
 human readable serialization language. This language is used in the
 `YAML block literal string`_ that corresponds to the machine function's body.
 
 A source string that uses this language contains a list of machine basic

llvm/trunk/include/llvm/CodeGen/MIRYamlMapping.h

YamlIO.mapOptional("debug-info-expression", Object.DebugExpr,
                        StringValue()); // Don't print it out when it's empty.
     YamlIO.mapOptional("debug-info-location", Object.DebugLoc,
                        StringValue()); // Don't print it out when it's empty.
   }
 
   static const bool flow = true;
 };
 
+
+/// Serializable representation of CallSiteInfo.
+struct CallSiteInfo {
+  // Representation of call argument and register which is used to
+  // transfer it.
+  struct ArgRegPair {
+    StringValue Reg;
+    uint16_t ArgNo;
+
+    bool operator==(const ArgRegPair &Other) const {
+      return Reg == Other.Reg && ArgNo == Other.ArgNo;
+    }
+  };
+
+  /// Identifies call instruction location in machine function.
+  struct MachineInstrLoc {
+    unsigned BlockNum;
+    unsigned Offset;
+
+    bool operator==(const MachineInstrLoc &Other) const {
+      return BlockNum == Other.BlockNum && Offset == Other.Offset;
+    }
+  };
+
+  MachineInstrLoc CallLocation;
+  std::vector<ArgRegPair> ArgForwardingRegs;
+
+  bool operator==(const CallSiteInfo &Other) const {
+    return CallLocation.BlockNum == Other.CallLocation.BlockNum &&
+           CallLocation.Offset == Other.CallLocation.Offset;
+  }
+};
+
+template <> struct MappingTraits<CallSiteInfo::ArgRegPair> {
+  static void mapping(IO &YamlIO, CallSiteInfo::ArgRegPair &ArgReg) {
+    YamlIO.mapRequired("arg", ArgReg.ArgNo);
+    YamlIO.mapRequired("reg", ArgReg.Reg);
+  }
+
+  static const bool flow = true;
+};
+}
+}
+
+LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::CallSiteInfo::ArgRegPair)
+
+namespace llvm {
+namespace yaml {
+
+template <> struct MappingTraits<CallSiteInfo> {
+  static void mapping(IO &YamlIO, CallSiteInfo &CSInfo) {
+    YamlIO.mapRequired("bb", CSInfo.CallLocation.BlockNum);
+    YamlIO.mapRequired("offset", CSInfo.CallLocation.Offset);
+    YamlIO.mapOptional("fwdArgRegs", CSInfo.ArgForwardingRegs,
+                       std::vector<CallSiteInfo::ArgRegPair>());
+  }
+
+  static const bool flow = true;
+};
+
 struct MachineConstantPoolValue {
   UnsignedValue ID;
   StringValue Value;
   unsigned Alignment = 0;
   bool IsTargetSpecific = false;
 
   bool operator==(const MachineConstantPoolValue &Other) const {
     return ID == Other.ID && Value == Other.Value &&

 
 } // end namespace yaml
 } // end namespace llvm
 
 LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::MachineFunctionLiveIn)
 LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::VirtualRegisterDefinition)
 LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::MachineStackObject)
 LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::FixedMachineStackObject)
+LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::CallSiteInfo)
 LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::MachineConstantPoolValue)
 LLVM_YAML_IS_SEQUENCE_VECTOR(llvm::yaml::MachineJumpTable::Entry)
 
 namespace llvm {
 namespace yaml {
 
 template <> struct MappingTraits<MachineJumpTable> {
   static void mapping(IO &YamlIO, MachineJumpTable &JT) {
struct MachineFunction {
   Optional<std::vector<FlowStringValue>> CalleeSavedRegisters;
   // TODO: Serialize the various register masks.
   // Frame information
   MachineFrameInfo FrameInfo;
   std::vector<FixedMachineStackObject> FixedStackObjects;
   std::vector<MachineStackObject> StackObjects;
   std::vector<MachineConstantPoolValue> Constants; /// Constant pool.
   std::unique_ptr<MachineFunctionInfo> MachineFuncInfo;
+  std::vector<CallSiteInfo> CallSitesInfo;
   MachineJumpTable JumpTableInfo;
   BlockStringValue Body;
 };
 
 template <> struct MappingTraits<MachineFunction> {
   static void mapping(IO &YamlIO, MachineFunction &MF) {
     YamlIO.mapRequired("name", MF.Name);
     YamlIO.mapOptional("alignment", MF.Alignment, (unsigned)0);
YamlIO.mapOptional("liveins", MF.LiveIns,
                        std::vector<MachineFunctionLiveIn>());
     YamlIO.mapOptional("calleeSavedRegisters", MF.CalleeSavedRegisters,
                        Optional<std::vector<FlowStringValue>>());
     YamlIO.mapOptional("frameInfo", MF.FrameInfo, MachineFrameInfo());
     YamlIO.mapOptional("fixedStack", MF.FixedStackObjects,
                        std::vector<FixedMachineStackObject>());
     YamlIO.mapOptional("stack", MF.StackObjects,
                        std::vector<MachineStackObject>());
+    YamlIO.mapOptional("callSites", MF.CallSitesInfo,
+                       std::vector<CallSiteInfo>());
     YamlIO.mapOptional("constants", MF.Constants,
                        std::vector<MachineConstantPoolValue>());
     YamlIO.mapOptional("machineFunctionInfo", MF.MachineFuncInfo);
     if (!YamlIO.outputting() || !MF.JumpTableInfo.Entries.empty())
       YamlIO.mapOptional("jumpTable", MF.JumpTableInfo, MachineJumpTable());
     YamlIO.mapOptional("body", MF.Body, BlockStringValue());
   }
 };
 
 } // end namespace yaml
 } // end namespace llvm
 
 #endif // LLVM_CODEGEN_MIRYAMLMAPPING_H

llvm/trunk/include/llvm/CodeGen/MachineFunction.h

public:
   public:
     virtual ~Delegate() = default;
     /// Callback after an insertion. This should not modify the MI directly.
     virtual void MF_HandleInsertion(MachineInstr &MI) = 0;
     /// Callback before a removal. This should not modify the MI directly.
     virtual void MF_HandleRemoval(MachineInstr &MI) = 0;
   };
 
+  /// Structure used to represent pair of argument number after call lowering
+  /// and register used to transfer that argument.
+  /// For now we support only cases when argument is transferred through one
+  /// register.
+  struct ArgRegPair {
+    unsigned Reg;
+    uint16_t ArgNo;
+    ArgRegPair(unsigned R, unsigned Arg) : Reg(R), ArgNo(Arg) {
+      assert(Arg < (1 << 16) && "Arg out of range");
+    }
+  };
+  /// Vector of call argument and its forwarding register.
+  using CallSiteInfo = SmallVector<ArgRegPair, 1>;
+  using CallSiteInfoImpl = SmallVectorImpl<ArgRegPair>;
+
 private:
   Delegate *TheDelegate = nullptr;
 
+  using CallSiteInfoMap = DenseMap<const MachineInstr *, CallSiteInfo>;
+  /// Map a call instruction to call site arguments forwarding info.
+  CallSiteInfoMap CallSitesInfo;
+
   // Callbacks for insertion and removal.
   void handleInsertion(MachineInstr &MI);
   void handleRemoval(MachineInstr &MI);
   friend struct ilist_traits<MachineInstr>;
 
 public:
   using VariableDbgInfoMapTy = SmallVector<VariableDbgInfo, 4>;
   VariableDbgInfoMapTy VariableDbgInfos;
void setVariableDbgInfo(const DILocalVariable *Var, const DIExpression *Expr,
                           int Slot, const DILocation *Loc) {
     VariableDbgInfos.emplace_back(Var, Expr, Slot, Loc);
   }
 
   VariableDbgInfoMapTy &getVariableDbgInfo() { return VariableDbgInfos; }
   const VariableDbgInfoMapTy &getVariableDbgInfo() const {
     return VariableDbgInfos;
   }
+
+  void addCallArgsForwardingRegs(const MachineInstr *CallI,
+                                 CallSiteInfoImpl &&CallInfo) {
+    assert(CallI->isCall());
+    CallSitesInfo[CallI] = std::move(CallInfo);
+  }
+
+  const CallSiteInfoMap &getCallSitesInfo() const {
+    return CallSitesInfo;
+  }
+
 };
 
 //===--------------------------------------------------------------------===//
 // GraphTraits specializations for function basic block graphs (CFGs)
 //===--------------------------------------------------------------------===//
 
 // Provide specializations of GraphTraits to be able to treat a
 // machine function as a graph of machine basic blocks... these are

llvm/trunk/lib/CodeGen/MIRParser/MIRParser.cpp

bool parseRegisterInfo(PerFunctionMIParsingState &PFS,
                          const yaml::MachineFunction &YamlMF);
 
   bool setupRegisterInfo(const PerFunctionMIParsingState &PFS,
                          const yaml::MachineFunction &YamlMF);
 
   bool initializeFrameInfo(PerFunctionMIParsingState &PFS,
                            const yaml::MachineFunction &YamlMF);
 
+  bool initializeCallSiteInfo(PerFunctionMIParsingState &PFS,
+                              const yaml::MachineFunction &YamlMF);
+
   bool parseCalleeSavedRegister(PerFunctionMIParsingState &PFS,
                                 std::vector<CalleeSavedInfo> &CSIInfo,
                                 const yaml::StringValue &RegisterSource,
                                 bool IsRestored, int FrameIdx);
 
   template <typename T>
   bool parseStackObjectsDebugInfo(PerFunctionMIParsingState &PFS,
                                   const T &Object,
void MIRParserImpl::computeFunctionProperties(MachineFunction &MF) {
   else
     Properties.reset(MachineFunctionProperties::Property::IsSSA);
 
   const MachineRegisterInfo &MRI = MF.getRegInfo();
   if (MRI.getNumVirtRegs() == 0)
     Properties.set(MachineFunctionProperties::Property::NoVRegs);
 }
 
+bool MIRParserImpl::initializeCallSiteInfo(
+    PerFunctionMIParsingState &PFS, const yaml::MachineFunction &YamlMF) {
+  MachineFunction &MF = PFS.MF;
+  SMDiagnostic Error;
+  const LLVMTargetMachine &TM = MF.getTarget();
+  for (auto YamlCSInfo : YamlMF.CallSitesInfo) {
+    yaml::CallSiteInfo::MachineInstrLoc MILoc = YamlCSInfo.CallLocation;
+    if (MILoc.BlockNum >= MF.size())
+      return error(Twine(MF.getName()) +
+                   Twine(" call instruction block out of range.") +
+                   " Unable to reference bb:" + Twine(MILoc.BlockNum));
+    auto CallB = std::next(MF.begin(), MILoc.BlockNum);
+    if (MILoc.Offset >= CallB->size())
+      return error(Twine(MF.getName()) +
+                   Twine(" call instruction offset out of range.") +
+                   "Unable to reference instruction at bb: " +
+                   Twine(MILoc.BlockNum) + " at offset:" + Twine(MILoc.Offset));
+    auto CallI = std::next(CallB->begin(), MILoc.Offset);
+    if (!CallI->isCall())
+      return error(Twine(MF.getName()) +
+                   Twine(" call site info should reference call "
+                         "instruction. Instruction at bb:") +
+                   Twine(MILoc.BlockNum) + " at offset:" + Twine(MILoc.Offset) +
+                   " is not a call instruction");
+    MachineFunction::CallSiteInfo CSInfo;
+    for (auto ArgRegPair : YamlCSInfo.ArgForwardingRegs) {
+      unsigned Reg = 0;
+      if (parseNamedRegisterReference(PFS, Reg, ArgRegPair.Reg.Value, Error))
+        return error(Error, ArgRegPair.Reg.SourceRange);
+      CSInfo.emplace_back(Reg, ArgRegPair.ArgNo);
+    }
+
+    if (TM.Options.EnableDebugEntryValues)
+      MF.addCallArgsForwardingRegs(&*CallI, std::move(CSInfo));
+  }
+
+  if (YamlMF.CallSitesInfo.size() && !TM.Options.EnableDebugEntryValues)
+    return error(Twine("Call site info provided but not used"));
+  return false;
+}
+
 bool
 MIRParserImpl::initializeMachineFunction(const yaml::MachineFunction &YamlMF,
                                          MachineFunction &MF) {
   // TODO: Recreate the machine function.
   if (Target) {
     // Avoid clearing state if we're using the same subtarget again.
     Target->setTarget(MF.getSubtarget());
   } else {
MIRParserImpl::initializeMachineFunction(const yaml::MachineFunction &YamlMF,
   // there.
   // FIXME: This is a temporary workaround until the reserved registers can be
   // serialized.
   MachineRegisterInfo &MRI = MF.getRegInfo();
   MRI.freezeReservedRegs(MF);
 
   computeFunctionProperties(MF);
 
+  if (initializeCallSiteInfo(PFS, YamlMF))
+    return false;
+
   MF.getSubtarget().mirFileLoaded(MF);
 
   MF.verify();
   return false;
 }
 
 bool MIRParserImpl::parseRegisterInfo(PerFunctionMIParsingState &PFS,
                                       const yaml::MachineFunction &YamlMF) {

llvm/trunk/lib/CodeGen/MIRPrinter.cpp

public:
   void convert(ModuleSlotTracker &MST, yaml::MachineFrameInfo &YamlMFI,
                const MachineFrameInfo &MFI);
   void convert(yaml::MachineFunction &MF,
                const MachineConstantPool &ConstantPool);
   void convert(ModuleSlotTracker &MST, yaml::MachineJumpTable &YamlJTI,
                const MachineJumpTableInfo &JTI);
   void convertStackObjects(yaml::MachineFunction &YMF,
                            const MachineFunction &MF, ModuleSlotTracker &MST);
+  void convertCallSiteObjects(yaml::MachineFunction &YMF,
+                              const MachineFunction &MF,
+                              ModuleSlotTracker &MST);
 
 private:
   void initRegisterMaskIds(const MachineFunction &MF);
 };
 
 /// This class prints out the machine instructions using the MIR serialization
 /// format.
 class MIPrinter {
void MIRPrinter::print(const MachineFunction &MF) {
   YamlMF.FailedISel = MF.getProperties().hasProperty(
       MachineFunctionProperties::Property::FailedISel);
 
   convert(YamlMF, MF.getRegInfo(), MF.getSubtarget().getRegisterInfo());
   ModuleSlotTracker MST(MF.getFunction().getParent());
   MST.incorporateFunction(MF.getFunction());
   convert(MST, YamlMF.FrameInfo, MF.getFrameInfo());
   convertStackObjects(YamlMF, MF, MST);
+  convertCallSiteObjects(YamlMF, MF, MST);
   if (const auto *ConstantPool = MF.getConstantPool())
     convert(YamlMF, *ConstantPool);
   if (const auto *JumpTableInfo = MF.getJumpTableInfo())
     convert(MST, YamlMF.JumpTableInfo, *JumpTableInfo);
 
   const TargetMachine &TM = MF.getTarget();
   YamlMF.MachineFuncInfo =
       std::unique_ptr<yaml::MachineFunctionInfo>(TM.convertFuncInfoToYAML(MF));
if (StackObject.IsFixed) {
       printStackObjectDbgInfo(DebugVar, Object, MST);
     } else {
       auto &Object = YMF.StackObjects[StackObject.ID];
       printStackObjectDbgInfo(DebugVar, Object, MST);
     }
   }
 }
 
+void MIRPrinter::convertCallSiteObjects(yaml::MachineFunction &YMF,
+                                        const MachineFunction &MF,
+                                        ModuleSlotTracker &MST) {
+  const auto *TRI = MF.getSubtarget().getRegisterInfo();
+  for (auto CSInfo : MF.getCallSitesInfo()) {
+    yaml::CallSiteInfo YmlCS;
+    yaml::CallSiteInfo::MachineInstrLoc CallLocation;
+
+    // Prepare instruction position.
+    MachineBasicBlock::const_iterator CallI = CSInfo.first->getIterator();
+    CallLocation.BlockNum = CallI->getParent()->getNumber();
+    // Get call instruction offset from the beginning of block.
+    CallLocation.Offset = std::distance(CallI->getParent()->begin(), CallI);
+    YmlCS.CallLocation = CallLocation;
+    // Construct call arguments and theirs forwarding register info.
+    for (auto ArgReg : CSInfo.second) {
+      yaml::CallSiteInfo::ArgRegPair YmlArgReg;
+      YmlArgReg.ArgNo = ArgReg.ArgNo;
+      printRegMIR(ArgReg.Reg, YmlArgReg.Reg, TRI);
+      YmlCS.ArgForwardingRegs.emplace_back(YmlArgReg);
+    }
+    YMF.CallSitesInfo.push_back(YmlCS);
+  }
+
+  // Sort call info by position of call instructions.
+  llvm::sort(YMF.CallSitesInfo.begin(), YMF.CallSitesInfo.end(),
+             [](yaml::CallSiteInfo A, yaml::CallSiteInfo B) {
+               if (A.CallLocation.BlockNum == B.CallLocation.BlockNum)
+                 return A.CallLocation.Offset < B.CallLocation.Offset;
+               return A.CallLocation.BlockNum < B.CallLocation.BlockNum;
+             });
+}
+
 void MIRPrinter::convert(yaml::MachineFunction &MF,
                          const MachineConstantPool &ConstantPool) {
   unsigned ID = 0;
   for (const MachineConstantPoolEntry &Constant : ConstantPool.getConstants()) {
     std::string Str;
     raw_string_ostream StrOS(Str);
     if (Constant.isMachineConstantPoolEntry()) {
       Constant.Val.MachineCPVal->print(StrOS);

llvm/trunk/lib/CodeGen/MachineVerifier.cpp

for (RegSet::iterator
       report_context_vreg(*I);
     }
   }
 
   if (LiveVars)
     verifyLiveVariables();
   if (LiveInts)
     verifyLiveIntervals();
+
+  for (auto CSInfo : MF->getCallSitesInfo())
+    if (!CSInfo.first->isCall())
+      report("Call site info referencing instruction that is not call", MF);
 }
 
 void MachineVerifier::verifyLiveVariables() {
   assert(LiveVars && "Don't call verifyLiveVariables without LiveVars");
   for (unsigned i = 0, e = MRI->getNumVirtRegs(); i != e; ++i) {
     unsigned Reg = TargetRegisterInfo::index2VirtReg(i);
     LiveVariables::VarInfo &VI = LiveVars->getVarInfo(Reg);
     for (const auto &MBB : *MF) {

llvm/trunk/test/CodeGen/MIR/X86/call-site-info-error1.mir

+# RUN: not llc -mtriple=x86_64-- -run-pass none -debug-entry-values %s -o - 2>&1 | FileCheck %s
+# CHECK: baa call instruction block out of range. Unable to reference bb:1
+--- |
+  define dso_local i32 @baa(i32 %a) local_unnamed_addr {
+  entry:
+    %call = tail call i32 @foo(i32 %a)
+    ret i32 %call
+  }
+
+  declare dso_local i32 @foo(i32) local_unnamed_addr
+...
+---
+name: baa
+callSites:
+  - {bb: 1, offset: 0, fwdArgRegs:
+    - { arg: 0, reg: '$edi' } }
+body: |
+  bb.0:
+  liveins: $edi
+
+  TAILJMPd64 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rsp, implicit $ssp, implicit $edi
+
+...

llvm/trunk/test/CodeGen/MIR/X86/call-site-info-error2.mir

+# RUN: not llc -mtriple=x86_64-- -run-pass none -debug-entry-values %s -o - 2>&1 | FileCheck %s
+# CHECK: baa call instruction offset out of range.Unable to reference instruction at bb: 0 at offset:1
+--- |
+  define dso_local i32 @baa(i32 %a) local_unnamed_addr {
+  entry:
+    %call = tail call i32 @foo(i32 %a)
+    ret i32 %call
+  }
+
+  declare dso_local i32 @foo(i32) local_unnamed_addr
+...
+---
+name: baa
+callSites:
+  - {bb: 0, offset: 1, fwdArgRegs:
+    - { arg: 0, reg: '$edi' } }
+body: |
+  bb.0:
+  liveins: $edi
+
+  TAILJMPd64 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rsp, implicit $ssp, implicit $edi
+
+...

llvm/trunk/test/CodeGen/MIR/X86/call-site-info-error3.mir

+# RUN: not llc -mtriple=x86_64-- -run-pass none -debug-entry-values %s -o - 2>&1 | FileCheck %s
+# CHECK: baa call site info should reference call instruction. Instruction at bb:0 at offset:0 is not a call instruction
+--- |
+  define dso_local i32 @baa(i32 %a) local_unnamed_addr {
+  entry:
+    %call = tail call i32 @foo(i32 %a)
+    ret i32 %call
+  }
+
+  declare dso_local i32 @foo(i32) local_unnamed_addr
+...
+---
+name: baa
+callSites:
+  - {bb: 0, offset: 0, fwdArgRegs:
+    - { arg: 0, reg: '$edi' } }
+body: |
+  bb.0:
+  liveins: $edi
+  renamable $edi = nsw ADD32ri8 killed renamable $edi, 4, implicit-def dead $eflags
+  TAILJMPd64 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rsp, implicit $ssp, implicit $edi
+
+...

llvm/trunk/test/CodeGen/MIR/X86/call-site-info-error4.mir

+# RUN: not llc -mtriple=x86_64-- -run-pass none %s -o - 2>&1 | FileCheck %s
+# CHECK: Call site info provided but not used
+--- |
+  define dso_local i32 @baa(i32 %a) local_unnamed_addr {
+  entry:
+    %call = tail call i32 @foo(i32 %a)
+    ret i32 %call
+  }
+
+  declare dso_local i32 @foo(i32) local_unnamed_addr
+...
+---
+name: baa
+callSites:
+  - {bb: 0, offset: 0, fwdArgRegs:
+    - { arg: 0, reg: '$edi' } }
+body: |
+  bb.0:
+  liveins: $edi
+
+  TAILJMPd64 @foo, csr_64, implicit $rsp, implicit $ssp, implicit $rsp, implicit $ssp, implicit $edi
+
+...