[WebAssembly] Use TargetIndex operands in DbgValue to track WebAssembly operands locations

[yurydelendik]

Summary

Extends DWARF expression language to express locals/globals locations. (via
target-index operands atm) (possible variants are: non-virtual registers
or address spaces)

The WebAssemblyExplicitLocals can replace virtual registers to targertindex operand type at the time when WebAssembly backend introduces {get,set,tee}_local instead of
corresponding virtual registers.

[yurydelendik]

Rebase

[yurydelendik]

There was a question about how easy it will be to reuse or modify LLDB to use with such extension (DW_OP_WASM_location). I looked at DWARFExpression::Evaluate and, I think, it will not be a problem to add support for that. It might be even easier than try to emulate registers mapping to some WASM local or stack operand.

I added DWARF data visualization is the wasm file to the https://wasdk.github.io/wasmcodeexplorer/. Here is a comparison of before and after the patch:

[aprantl]

Can you explain how this new operation is meant to work?

include/llvm/BinaryFormat/Dwarf.def

626

0xf6
Did you check against https://sourceware.org/elfutils/DwarfExtensions to see if this is is available?

include/llvm/BinaryFormat/Dwarf.h

62

Is this actually WASM-specific or is LLVM the only implementation and you could use LLVM instead?

[yurydelendik]

Can you explain how this new operation is meant to work?

This particular patch is trying to "save" debug values during the WebAssemblyExplicitLocals pass. Currently they are lost because virtual registers are not replaced. The patch replaces virtual registers with target-index(), that are correspond to the introduced WebAssembly locals, and then with WebAssembly DWARF extensions operators during serialization. (This patch is a first step and it does not fix all WebAssembly passes yet.)

include/llvm/BinaryFormat/Dwarf.h

62

Stack operands, locals and globals are specific to WebAssembly target. (These can be mapped to known primitives such as registers or specific address space, but will require more effort on producer and consumer sides IMHO)

The plan is to make it non-LLVM specific.

[yurydelendik]

Change DW_OP_WASM_location op to 0xED.

0xF6 is taken per https://sourceware.org/elfutils/DwarfExtensions

[yurydelendik]

include/llvm/BinaryFormat/Dwarf.def

626

0xf6 is taken, using 0xed instead

[yurydelendik]

In D52634#1293526, @aprantl wrote:

Can you explain how this new operation is meant to work?

@aprantl, here is some description of what we are trying to achieve: https://github.com/WebAssembly/debugging/issues/1#issuecomment-448237641

In the nutshell, the WebAssembly extensions for the DWARF expression will allow us to express WebAssembly specific locations such as for locals, globals and operands stack. The consumers of this information will be limited to LLVM tools, web browser debuggers and AOT/JIT WebAssembly compilers.

[aprantl]

In D52634#1334438, @yurydelendik wrote:

In D52634#1293526, @aprantl wrote:

Can you explain how this new operation is meant to work?

@aprantl, here is some description of what we are trying to achieve: https://github.com/WebAssembly/debugging/issues/1#issuecomment-448237641

In the nutshell, the WebAssembly extensions for the DWARF expression will allow us to express WebAssembly specific locations such as for locals, globals and operands stack. The consumers of this information will be limited to LLVM tools, web browser debuggers and AOT/JIT WebAssembly compilers.

Does WebAssembly have a concept of registers? You could just define three additional register numbers for WebAssembly and address a stack slot as DW_OP_breg [wasm_stack_register] + 3 etc.. This would need less support in all the involved tools. The link says that it was considered, but rejected, but there is no mention as to why.

[yurydelendik]

In D52634#1334701, @aprantl wrote:

In D52634#1334438, @yurydelendik wrote:

In D52634#1293526, @aprantl wrote:

Can you explain how this new operation is meant to work?

@aprantl, here is some description of what we are trying to achieve: https://github.com/WebAssembly/debugging/issues/1#issuecomment-448237641

In the nutshell, the WebAssembly extensions for the DWARF expression will allow us to express WebAssembly specific locations such as for locals, globals and operands stack. The consumers of this information will be limited to LLVM tools, web browser debuggers and AOT/JIT WebAssembly compilers.

Does WebAssembly have a concept of registers? You could just define three additional register numbers for WebAssembly and address a stack slot as DW_OP_breg [wasm_stack_register] + 3 etc.. This would need less support in all the involved tools. The link says that it was considered, but rejected, but there is no mention as to why.

There is no registers in wasm. There are (somewhat) unlimited numbers of locals and stack depth per function, globals per module. Maybe there will be more types of elements, e.g.table items? Yes, I entertained idea of complex encoding scheme as <register number> = <type>*3 + <index>. IHMO it is to brittle and does not carry any value, except to be decodable by tools that do not know how to handle it, and at the same time adds a burden to the tools that will know how to deal with and decode that. That's just my opinion. I also found that the tools (e.g. LLVM or LLDB) are eager to know about number of registers (which we cannot determine) to allocate internal structures.

[aprantl]

I also found that the tools (e.g. LLVM or LLDB) are eager to know about number of registers (which we cannot determine) to allocate internal structures.

What I was thinking of was to define exactly three WASM DWARF register numbers: wasm_reg_local, wasm_reg_global, wasm_reg_stack and use DW_OP_breg regnum offset like you would use the new special operation introduced by this patch.

[yurydelendik]

In D52634#1334758, @aprantl wrote:

I also found that the tools (e.g. LLVM or LLDB) are eager to know about number of registers (which we cannot determine) to allocate internal structures.

What I was thinking of was to define exactly three WASM DWARF register numbers: wasm_reg_local, wasm_reg_global, wasm_reg_stack and use DW_OP_breg regnum offset like you would use the new special operation introduced by this patch.

Okay, let me try that. It will be sufficient to try it out, since signatures are identical, just spec defined meaning is different (it is not a memory location and offset is not bytes) from what we are trying to achieve, and that's my main concern. I'll make the changes.

[yurydelendik]

Replace DW_OP_wasm_location with DW_OP_breg

[dschuff]

@aprantl Is the advantage of your suggested approach just that we don't have to define a new expression type? Obviously the interpretation is not the same as DW_OP_breg on other targets so as you say, either way there would have to be special logic in all the tools that consume it. Is this kind of repurposing of builtin primitives common?

lib/CodeGen/AsmPrinter/DebugLocEntry.h

24

This is very generic and doesn't really say what it's for, or what any of the fields are for. I get that this is trying to be target-independent but maybe it would be easier to understand if it wasn't. It looks like the index corresponds now to the dwarf register (e.g. to indicate that this is for a local or global), and the offset to indicate which one, but that seems backwards because we use the term "index" to refer to e.g. the index of the global or local.
Really what we have might in LLVM terms is a "kind" (i.e. a kind of location, local or stack or global) and an index (which local). "Index" is still a pretty generic term but it does match the usage of the term "index space" in the spec (and I would expect that our numbering should be the same, e.g. sharing the local index space for arguments and local variables).

[aprantl]

In D52634#1335761, @dschuff wrote:

@aprantl Is the advantage of your suggested approach just that we don't have to define a new expression type? Obviously the interpretation is not the same as DW_OP_breg on other targets so as you say, either way there would have to be special logic in all the tools that consume it. Is this kind of repurposing of builtin primitives common?

DWARF leaves a lot of details to the ABI of a platform so I would say it is not uncommon. But since it was mentioned that the indices aren't really offsets I see how using custom operators would be cleaner. I'm not against this approach, I was just trying to point out that an alternative less invasive encoding could be used that might be less confusing to existing consumers of debug information.

[yurydelendik]

In D52634#1336455, @aprantl wrote:

In D52634#1335761, @dschuff wrote:

@aprantl Is the advantage of your suggested approach just that we don't have to define a new expression type? Obviously the interpretation is not the same as DW_OP_breg on other targets so as you say, either way there would have to be special logic in all the tools that consume it. Is this kind of repurposing of builtin primitives common?

I'm not against this approach, I was just trying to point out that an alternative less invasive encoding could be used that might be less confusing to existing consumers of debug information.

There will no be existing consumers of WebAssembly debug information, except probably llvm-dwarfdump. Investing time into extension of LLDB/GDB is a risk and may not pay off. The new consumers will be web browser debugger and AOT compilers, which will be familiar with the extensions.

[dschuff]

I think there will eventually be more consumers, including traditional-style debuggers (even if just for non-web use cases).
I had initially hoped that we could get away with just using DWARF registers more-or-less directly for locals, but as Yury pointed out, there are a lot of places that assume a fixed number of architectural registers. And of course wasm globals and the wasm value stack don't really have analogs on most architectures. I still hope we'll be able to use DWARF's CFA and other stack stuff for the stack in linear memory. (Although in our case the stack pointer will be a global rather than a register. Hopefully we can make that work.)

We could experiment with the register-based approach for now since it wouldn't require coordinating any global numbers or anything.

[yurydelendik]

lib/CodeGen/AsmPrinter/DebugLocEntry.h

24

Here I was trying to us existing MO_TargetIndex "Target-dependent index+offset operand" as it is defined in LLVM (similar to lib/Target/AMDGPU/AMDGPU.h).

I also pondering the idea of using the Offset as "memory" offset by introducing the imaginary array/layout for e.g. locals with indices 0, 1, 2,.. will have offsets +0, +16, +32, ...

The alternative is to define MachineOperandType (e.g. MO_WasmLocation), but it will be more invasive

[dschuff]

Come to think of it, might we actually want the possibility of constant offset in addition to the "kind" and index field, e.g. for cases where the value is actually a pointer?

[yurydelendik]

In D52634#1336518, @dschuff wrote:

Come to think of it, might we actually want the possibility of constant offset in addition to the "kind" and index field, e.g. for cases where the value is actually a pointer?

The idea was target-index() will define the (virtual?) location for the local/global/operand, so it is a reference, and it can further participate in DWARF expression calculations using the plus and deref operations if needed. Having target-index() as location/ref may pay-off when structure is stored in a local (e.g. flags) (not sure if it is the case in clang/llvm).

[yurydelendik]

• revert breg use due to incompatibility with DWARF definition
• rebase to git llvm-project

[yurydelendik]

Add simple test

[yurydelendik]

Minor changes to comment; move #include

[yurydelendik]

Rebase

[dschuff]

Let's work toward getting this landed!
@yurydelendik Your note mentioned that you reverted the breg version based on some kind of incompatibility, can you say more about that?

[yurydelendik]

In D52634#1584117, @dschuff wrote:

Let's work toward getting this landed!
@yurydelendik Your note mentioned that you reverted the breg version based on some kind of incompatibility, can you say more about that?

breg<i> n literally means to read register i content and add n offset (and that will be used as location address of value). What the above "breg" encoding does is it assigns reg 0 as an "virtual array" location of locals, reg 1 as a "virtual array" location of globals, etc., which makes it looks like a workaround since locals, globals or operand stack are not always stored in continues memory segments.

Incompatibilities or conflicts with the DWARF spec definitions:

1. unclear what offset n means - is it an index or byte offset (e.g. 8 can mean 8th local or low byte of 1th local)?
2. whole encoding scheme expresses a location address rather than a location (we can append extra DW_OP_deref (?) operation thus increasing size of encoding and risking that tools might break/optimize it)

So far there no benefits to us to choose breg encoding: it is not extensible and we cannot further extend it (e.g. beyond the single n offset parameter). Also generic DWARF (optimization?) tools has to track that they are in a WebAssembly context to choose different logic for breg.

[yurydelendik]

Rebase D52634: [WebAssembly] Add DBG_VALUE with local operands location in WebAssemblyExplicitLocals pass

[dschuff]

OK, I think we have enough out-of-tree experience now with this and the lldb side to expect that it will work, so we should really get it upstream (in this form or whatever form is acceptable).
So there are really 3 different elements to this patch.
1 is the DWARF expression type. I think we've found that this is preferable to repurposing DW_OP_breg as mentioned above. There was a question previously about whether this should be LLVM-specific or not. @yurydelendik I'm guessing that Mozilla's Rust DWARF library will be using this too, and LLVM won't be the only consumer, correct?
@aprantl Do you want to push back further or offer any other suggestions about this?

2 (the bulk of the patch) is all the target-independent infrastructure for using TargetIndex operands in DbgValue-typed MachineInstrs and using that instead of a MachineLocation to express the location. Mechanically this seems straightforward to me; @aprantl do you have any opinions on that, or on my comment on lvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp?

3 is just the straightforward application of the previous 2 to the wasm backend.

This patch should perhaps be split into a target-independent part and a wasm-specific part; or at the very least it should be renamed, since the bit about WebAssemblyExplicitLocals is really the least consequential and most-straightforward part.

llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp

583 ↗

(On Diff #227720)

It's a bit odd that this is a target-independent extension but we directly encode the wasm-specific expression type here. Not sure if there's a better way or not.

llvm/lib/CodeGen/AsmPrinter/DwarfExpression.h

342 ↗

(On Diff #227720)

Since this is a generic extension and TargetIndex are usable by any target, how about saying something like "currently this is only used for WebAssembly locals..." etc

[dschuff]

@yurydelendik can you split and/or rename this patch?
@aprantl do you have any more feedback on the above, or any suggestions about who else might be interested?

[yurydelendik]

Use TargetIndex operands in DbgValue to track WebAssembly operands locations

[dschuff]

Ping. Any other opinions? Perhaps @dblaikie ?

[dschuff]

Ping. The target-independent portion of this patch is very small now.

[aprantl]

llvm/include/llvm/BinaryFormat/Dwarf.def

651 ↗

(On Diff #229875)

LLVM's list of vendor extensions is unfortunately not complete. (Pathces very welcome!) Have you checked that this enumerator is actually available? You might want to check libdwarf and the list of GNU extensions. Generally I would recommend using an enumerator that isn't close to the other GNU values, unless you also plan to add this to binutils etc.

[yurydelendik]

llvm/include/llvm/BinaryFormat/Dwarf.def

651 ↗

(On Diff #229875)

Have you checked that this enumerator is actually available?

There is no codes specified for range between 0xe1 - 0xef per https://sourceware.org/elfutils/DwarfExtensions. The 0xed was chosen to be far from edges of that range. I also checked libdwarf/dwarf.h for availability.

[aprantl]

Can you add a test that runs the output through llvm-dwarfdump, too, so that part of the patch is tested as well?

[yurydelendik]

add llvm-dwarfdump test

[aprantl]

LGTM with minor nits.

llvm/lib/CodeGen/AsmPrinter/DebugLocEntry.h

23 ↗

(On Diff #234093)

Can you add a doxygen comment here?

59 ↗

(On Diff #234093)

///

llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp

580 ↗

(On Diff #234093)

It's also odd to generalize something for which only a single implementation exists...

[dschuff]

llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp

580 ↗

(On Diff #234093)

I think this is called what it is because TargetIndex is already a general operand type. But maybe at the DWARF layer it really just just be something like DwarfExpression::addWasmLocation, and then in asmPrinter/DwarfDebug.cpp we just call addWasmLocation instead. If it's possible to assert there that the target is wasm, so much the better.

[dschuff]

llvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp

580 ↗

(On Diff #234093)

The downside to that would be that if and when there are other places we want to use a TargetIndex instead of a Register (e.g. for the frame base) then we'd have to do that check in those places too.

[yurydelendik]

Fix comments

[dschuff]

After thinking a bit more, I'd like to rename DwarfExpression::addTargetIndexLocation to DwarfExpression::addWasmLocation because basically all of the methods on DarfExpression correspond to DW_OP_foo operands, so a method for adding DW_OP_wasm_location should probably just be called addWasmLocation. If we want to later have a utility function to extract some other functionality like converting a TargetIndex, we can always do that in the future when we have another caller.
With that suggestion, this change LGTM

[yurydelendik]

rename addWasmLocation

[dschuff]

LGTM!

include/llvm/BinaryFormat/Dwarf.h

enum LLVMConstants : uint32_t {
   DW_ARANGES_VERSION = 2,  // Section version number for .debug_aranges.
   // Identifiers we use to distinguish vendor extensions.
   DWARF_VENDOR_DWARF = 0, // Defined in v2 or later of the DWARF standard.
   DWARF_VENDOR_APPLE = 1,
   DWARF_VENDOR_BORLAND = 2,
   DWARF_VENDOR_GNU = 3,
   DWARF_VENDOR_GOOGLE = 4,
   DWARF_VENDOR_LLVM = 5,
-  DWARF_VENDOR_MIPS = 6
+  DWARF_VENDOR_MIPS = 6,
+  DWARF_VENDOR_WASM = 7
 };
 
 /// Constants that define the DWARF format as 32 or 64 bit.
 enum DwarfFormat : uint8_t { DWARF32, DWARF64 };
 
 /// Special ID values that distinguish a CIE from a FDE in DWARF CFI.
 /// Not inside an enum because a 64-bit value is needed.
 /// @{

include/llvm/BinaryFormat/Dwarf.def

 HANDLE_DW_OP(0xa5, regval_type, 5, DWARF)
 HANDLE_DW_OP(0xa6, deref_type, 5, DWARF)
 HANDLE_DW_OP(0xa7, xderef_type, 5, DWARF)
 HANDLE_DW_OP(0xa8, convert, 5, DWARF)
 HANDLE_DW_OP(0xa9, reinterpret, 5, DWARF)
 // Vendor extensions:
 // Extensions for GNU-style thread-local storage.
 HANDLE_DW_OP(0xe0, GNU_push_tls_address, 0, GNU)
+// Extensions for WebAssembly.
+HANDLE_DW_OP(0xed, WASM_location, 0, WASM)
 // Extensions for Fission proposal.
 HANDLE_DW_OP(0xfb, GNU_addr_index, 0, GNU)
 HANDLE_DW_OP(0xfc, GNU_const_index, 0, GNU)
 
 // DWARF languages.
 HANDLE_DW_LANG(0x0001, C89, 2, DWARF)
 HANDLE_DW_LANG(0x0002, C, 2, DWARF)
 HANDLE_DW_LANG(0x0003, Ada83, 2, DWARF)

lib/CodeGen/AsmPrinter/AsmPrinter.cpp

if (MI->getOperand(0).getFPImm()->getType()->isFloatTy()) {
       APF.convert(APFloat::IEEEdouble(), APFloat::rmNearestTiesToEven,
                   &ignored);
       OS << "(long double) " << APF.convertToDouble();
     }
   } else if (MI->getOperand(0).isImm()) {
     OS << MI->getOperand(0).getImm();
   } else if (MI->getOperand(0).isCImm()) {
     MI->getOperand(0).getCImm()->getValue().print(OS, false /*isSigned*/);
+  } else if (MI->getOperand(0).isTargetIndex()) {
+    auto Op = MI->getOperand(0);
+    OS << "!target-index(" << Op.getIndex() << "," << Op.getOffset() << ")";
+    return true;
   } else {
     unsigned Reg;
     if (MI->getOperand(0).isReg()) {
       Reg = MI->getOperand(0).getReg();
     } else {
       assert(MI->getOperand(0).isFI() && "Unknown operand type");
       const TargetFrameLowering *TFI = AP.MF->getSubtarget().getFrameLowering();
       Offset += TFI->getFrameIndexReference(*AP.MF,

lib/CodeGen/AsmPrinter/DebugLocEntry.h

 #include "llvm/IR/DebugInfo.h"
 #include "llvm/MC/MCSymbol.h"
 #include "llvm/MC/MachineLocation.h"
 #include "llvm/Support/Debug.h"
 
 namespace llvm {
 class AsmPrinter;
 
+struct TargetIndexLocation {
+  int Index;
+  int Offset;
+
+  TargetIndexLocation() = default;
+  TargetIndexLocation(unsigned Idx, int64_t Offset)
+      : Index(Idx), Offset(Offset) {}
+
+  bool operator==(const TargetIndexLocation &Other) const {
+    return Index == Other.Index && Offset == Other.Offset;
+  }
+};
+
 /// This struct describes location entries emitted in the .debug_loc
 /// section.
 class DebugLocEntry {
   /// Begin and end symbols for the address range that this location is valid.
   const MCSymbol *Begin;
   const MCSymbol *End;
 
 public:
struct Value {
     Value(const DIExpression *Expr, const ConstantInt *CIP)
         : Expression(Expr), EntryKind(E_ConstantInt) {
       Constant.CIP = CIP;
     }
     Value(const DIExpression *Expr, MachineLocation Loc)
         : Expression(Expr), EntryKind(E_Location), Loc(Loc) {
       assert(cast<DIExpression>(Expr)->isValid());
     }
+    Value(const DIExpression *Expr, TargetIndexLocation Loc)
+        : Expression(Expr), EntryKind(E_TargetIndexLocation), TIL(Loc) {}
 
     /// Any complex address location expression for this Value.
     const DIExpression *Expression;
 
     /// Type of entry that this represents.
-    enum EntryType { E_Location, E_Integer, E_ConstantFP, E_ConstantInt };
+    enum EntryType {
+      E_Location,
+      E_Integer,
+      E_ConstantFP,
+      E_ConstantInt,
+      E_TargetIndexLocation
+    };
     enum EntryType EntryKind;
 
     /// Either a constant,
     union {
       int64_t Int;
       const ConstantFP *CFP;
       const ConstantInt *CIP;
     } Constant;
 
+    union {
       // Or a location in the machine frame.
       MachineLocation Loc;
+      // Or a location from target specific location.
+      TargetIndexLocation TIL;
+    };
 
     bool isLocation() const { return EntryKind == E_Location; }
+    bool isTargetIndexLocation() const {
+      return EntryKind == E_TargetIndexLocation;
+    }
     bool isInt() const { return EntryKind == E_Integer; }
     bool isConstantFP() const { return EntryKind == E_ConstantFP; }
     bool isConstantInt() const { return EntryKind == E_ConstantInt; }
     int64_t getInt() const { return Constant.Int; }
     const ConstantFP *getConstantFP() const { return Constant.CFP; }
     const ConstantInt *getConstantInt() const { return Constant.CIP; }
     MachineLocation getLoc() const { return Loc; }
+    TargetIndexLocation getTargetIndexLocation() const { return TIL; }
     bool isFragment() const { return getExpression()->isFragment(); }
     const DIExpression *getExpression() const { return Expression; }
     friend bool operator==(const Value &, const Value &);
     friend bool operator<(const Value &, const Value &);
 #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
     LLVM_DUMP_METHOD void dump() const {
       if (isLocation()) {
         llvm::dbgs() << "Loc = { reg=" << Loc.getReg() << " ";
if (A.EntryKind != B.EntryKind)
     return false;
 
   if (A.Expression != B.Expression)
     return false;
 
   switch (A.EntryKind) {
   case DebugLocEntry::Value::E_Location:
     return A.Loc == B.Loc;
+  case DebugLocEntry::Value::E_TargetIndexLocation:
+    return A.TIL == B.TIL;
   case DebugLocEntry::Value::E_Integer:
     return A.Constant.Int == B.Constant.Int;
   case DebugLocEntry::Value::E_ConstantFP:
     return A.Constant.CFP == B.Constant.CFP;
   case DebugLocEntry::Value::E_ConstantInt:
     return A.Constant.CIP == B.Constant.CIP;
   }
   llvm_unreachable("unhandled EntryKind");

lib/CodeGen/AsmPrinter/DwarfDebug.cpp

if (MI->getOperand(0).isReg()) {
     auto RegOp = MI->getOperand(0);
     auto Op1 = MI->getOperand(1);
     // If the second operand is an immediate, this is a
     // register-indirect address.
     assert((!Op1.isImm() || (Op1.getImm() == 0)) && "unexpected offset");
     MachineLocation MLoc(RegOp.getReg(), Op1.isImm());
     return DebugLocEntry::Value(Expr, MLoc);
   }
+  if (MI->getOperand(0).isTargetIndex()) {
+    auto Op = MI->getOperand(0);
+    return DebugLocEntry::Value(
+        Expr, TargetIndexLocation(Op.getIndex(), Op.getOffset()));
+  }
   if (MI->getOperand(0).isImm())
     return DebugLocEntry::Value(Expr, MI->getOperand(0).getImm());
   if (MI->getOperand(0).isFPImm())
     return DebugLocEntry::Value(Expr, MI->getOperand(0).getFPImm());
   if (MI->getOperand(0).isCImm())
     return DebugLocEntry::Value(Expr, MI->getOperand(0).getCImm());
 
   llvm_unreachable("Unexpected 4-operand DBG_VALUE instruction!");
if (Value.isInt()) {
     DIExpressionCursor Cursor(DIExpr);
     const TargetRegisterInfo &TRI = *AP.MF->getSubtarget().getRegisterInfo();
     if (!DwarfExpr.addMachineRegExpression(TRI, Cursor, Location.getReg()))
       return;
     return DwarfExpr.addExpression(std::move(Cursor));
   } else if (Value.isConstantFP()) {
     APInt RawBytes = Value.getConstantFP()->getValueAPF().bitcastToAPInt();
     DwarfExpr.addUnsignedConstant(RawBytes);
+  } else if (Value.isTargetIndexLocation()) {
+    TargetIndexLocation Loc = Value.getTargetIndexLocation();
+    DwarfExpr.addTargetIndexLocation(Loc.Index, Loc.Offset);
   }
   DwarfExpr.addExpression(std::move(ExprCursor));
 }
 
 void DebugLocEntry::finalize(const AsmPrinter &AP,
                              DebugLocStream::ListBuilder &List,
                              const DIBasicType *BT) {
   DebugLocStream::EntryBuilder Entry(List, Begin, End);

lib/CodeGen/AsmPrinter/DwarfExpression.h

public:
   ///                                 locations, this is the offset of the
   ///                                 fragment inside the entire variable.
   void addExpression(DIExpressionCursor &&Expr,
                      unsigned FragmentOffsetInBits = 0);
 
   /// If applicable, emit an empty DW_OP_piece / DW_OP_bit_piece to advance to
   /// the fragment described by \c Expr.
   void addFragmentOffset(const DIExpression *Expr);
+
+  /// Emit location information expressed via target's index + offset
+  /// It is an extension for WebAssembly locals, globals and operand stack.
+  void addTargetIndexLocation(unsigned Index, int64_t Offset);
 };
 
 /// DwarfExpression implementation for .debug_loc entries.
 class DebugLocDwarfExpression final : public DwarfExpression {
   ByteStreamer &BS;
 
   void emitOp(uint8_t Op, const char *Comment = nullptr) override;
   void emitSigned(int64_t Value) override;

lib/CodeGen/AsmPrinter/DwarfExpression.cpp

void DwarfExpression::addFragmentOffset(const DIExpression *Expr) {
 
   uint64_t FragmentOffset = Expr->getFragmentInfo()->OffsetInBits;
   assert(FragmentOffset >= OffsetInBits &&
          "overlapping or duplicate fragments");
   if (FragmentOffset > OffsetInBits)
     addOpPiece(FragmentOffset - OffsetInBits);
   OffsetInBits = FragmentOffset;
 }
+
+void DwarfExpression::addTargetIndexLocation(unsigned Index, int64_t Offset) {
+  assert(LocationKind == Implicit || LocationKind == Unknown);
+  LocationKind = Implicit;
+  emitOp(dwarf::DW_OP_WASM_location);
+  emitUnsigned(Index);
+  emitSigned(Offset);
+}

lib/DebugInfo/DWARF/DWARFExpression.cpp

static DescVector getDescriptions() {
   Descriptions[DW_OP_call4] = Desc(Op::Dwarf3, Op::Size4);
   Descriptions[DW_OP_call_ref] = Desc(Op::Dwarf3, Op::SizeRefAddr);
   Descriptions[DW_OP_form_tls_address] = Desc(Op::Dwarf3);
   Descriptions[DW_OP_call_frame_cfa] = Desc(Op::Dwarf3);
   Descriptions[DW_OP_bit_piece] = Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeLEB);
   Descriptions[DW_OP_implicit_value] =
       Desc(Op::Dwarf3, Op::SizeLEB, Op::SizeBlock);
   Descriptions[DW_OP_stack_value] = Desc(Op::Dwarf3);
+  Descriptions[DW_OP_WASM_location] =
+      Desc(Op::Dwarf4, Op::SizeLEB, Op::SignedSizeLEB);
   Descriptions[DW_OP_GNU_push_tls_address] = Desc(Op::Dwarf3);
   Descriptions[DW_OP_addrx] = Desc(Op::Dwarf4, Op::SizeLEB);
   Descriptions[DW_OP_GNU_addr_index] = Desc(Op::Dwarf4, Op::SizeLEB);
   Descriptions[DW_OP_GNU_const_index] = Desc(Op::Dwarf4, Op::SizeLEB);
   return Descriptions;
 }
 
 static DWARFExpression::Operation::Description getOpDesc(unsigned OpCode) {

lib/Target/WebAssembly/WebAssembly.h

 void initializeWebAssemblyExceptionInfoPass(PassRegistry &);
 void initializeWebAssemblyCFGSortPass(PassRegistry &);
 void initializeWebAssemblyCFGStackifyPass(PassRegistry &);
 void initializeWebAssemblyLowerBrUnlessPass(PassRegistry &);
 void initializeWebAssemblyRegNumberingPass(PassRegistry &);
 void initializeWebAssemblyPeepholePass(PassRegistry &);
 void initializeWebAssemblyCallIndirectFixupPass(PassRegistry &);
 
+namespace WebAssembly {
+enum TargetIndex { TI_LOCAL_START, TI_GLOBAL_START, TI_OPERAND_STACK_START };
+} // end namespace WebAssembly
+
 } // end namespace llvm
 
 #endif

lib/Target/WebAssembly/WebAssemblyExplicitLocals.cpp

if (RC == &WebAssembly::F64RegClass)
     return MVT::f64;
   if (RC == &WebAssembly::V128RegClass)
     return MVT::v16i8;
   if (RC == &WebAssembly::EXCEPT_REFRegClass)
     return MVT::ExceptRef;
   llvm_unreachable("unrecognized register class");
 }
 
+static void fixupFollowingDebugValues(DenseMap<unsigned, unsigned> &Reg2Local,
+                                      MachineRegisterInfo &MRI,
+                                      MachineBasicBlock::iterator B,
+                                      MachineBasicBlock::iterator E) {
+  // Scan DBG_VALUE and modify virtual registers with known locals.
+  // Stop at first non-DBG_VALUE instruction.
+  for (auto I = B; I != E && I->isDebugInstr();) {
+    MachineInstr &MI = *I++;
+    for (MachineOperand &MO : reverse(MI.uses())) {
+      if (!MO.isReg())
+        continue;
+
+      unsigned OldReg = MO.getReg();
+      auto I = Reg2Local.find(OldReg);
+      if (I == Reg2Local.end())
+        continue;
+
+      unsigned LocalId = I->second;
+      MO.ChangeToTargetIndex(llvm::WebAssembly::TI_LOCAL_START, LocalId);
+    }
+  }
+}
+
+static void fixupFollowingDebugValues(unsigned Reg, unsigned LocalId,
+                                      MachineRegisterInfo &MRI,
+                                      MachineBasicBlock::iterator B,
+                                      MachineBasicBlock::iterator E) {
+  // Scan DBG_VALUE and modify the specified virtual registers with the local.
+  // Stop at first non-DBG_VALUE instruction.
+  for (auto I = B; I != E && I->isDebugInstr();) {
+    MachineInstr &MI = *I++;
+    for (MachineOperand &MO : reverse(MI.uses())) {
+      if (!MO.isReg() || MO.getReg() != Reg)
+        continue;
+      MO.ChangeToTargetIndex(llvm::WebAssembly::TI_LOCAL_START, LocalId);
+    }
+  }
+}
+
 /// Given a MachineOperand of a stackified vreg, return the instruction at the
 /// start of the expression tree.
 static MachineInstr *findStartOfTree(MachineOperand &MO,
                                      MachineRegisterInfo &MRI,
                                      WebAssemblyFunctionInfo &MFI) {
   unsigned Reg = MO.getReg();
   assert(MFI.isVRegStackified(Reg));
   MachineInstr *Def = MRI.getVRegDef(Reg);
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) {
         unsigned LocalId =
             getLocalId(Reg2Local, CurLocal, MI.getOperand(1).getReg());
         unsigned Opc = getTeeLocalOpcode(RC);
         BuildMI(MBB, &MI, MI.getDebugLoc(), TII->get(Opc),
                 MI.getOperand(0).getReg())
             .addImm(LocalId)
             .addReg(MI.getOperand(2).getReg());
 
+        auto Next = std::next(MachineBasicBlock::iterator(&MI));
+        fixupFollowingDebugValues(Reg2Local, MRI, Next, MBB.end());
+        fixupFollowingDebugValues(MI.getOperand(0).getReg(), LocalId, MRI, Next,
+                                  MBB.end());
+
         MI.eraseFromParent();
         Changed = true;
         continue;
       }
 
       // Insert set_locals for any defs that aren't stackified yet. Currently
       // we handle at most one def.
       assert(MI.getDesc().getNumDefs() <= 1);
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) {
             // After the drop instruction, this reg operand will not be used
             Drop->getOperand(0).setIsKill();
           } else {
             unsigned LocalId = getLocalId(Reg2Local, CurLocal, OldReg);
             unsigned Opc = getSetLocalOpcode(RC);
             BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc))
                 .addImm(LocalId)
                 .addReg(NewReg);
+            fixupFollowingDebugValues(NewReg, LocalId, MRI, InsertPt,
+                                      MBB.end());
           }
           MI.getOperand(0).setReg(NewReg);
           // This register operand is now being used by the inserted drop
           // instruction, so make it undead.
           MI.getOperand(0).setIsDead(false);
           MFI.stackifyVReg(NewReg);
+
+          fixupFollowingDebugValues(Reg2Local, MRI, InsertPt, MBB.end());
+
           Changed = true;
         }
       }
 
       // Insert get_locals for any uses that aren't stackified yet.
       MachineInstr *InsertPt = &MI;
       for (MachineOperand &MO : reverse(MI.explicit_uses())) {
         if (!MO.isReg())
for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end(); I != E;) {
         const TargetRegisterClass *RC = MRI.getRegClass(OldReg);
         unsigned NewReg = MRI.createVirtualRegister(RC);
         unsigned Opc = getGetLocalOpcode(RC);
         InsertPt =
             BuildMI(MBB, InsertPt, MI.getDebugLoc(), TII->get(Opc), NewReg)
                 .addImm(LocalId);
         MO.setReg(NewReg);
         MFI.stackifyVReg(NewReg);
+
+        fixupFollowingDebugValues(OldReg, LocalId, MRI, InsertPt, MBB.end());
         Changed = true;
       }
 
       // Coalesce and eliminate COPY instructions.
       if (WebAssembly::isCopy(MI)) {
         MRI.replaceRegWith(MI.getOperand(1).getReg(),
                            MI.getOperand(0).getReg());
         MI.eraseFromParent();

lib/Target/WebAssembly/WebAssemblyInstrInfo.h

 /// This file contains the WebAssembly implementation of the
 /// TargetInstrInfo class.
 ///
 //===----------------------------------------------------------------------===//
 
 #ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
 #define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYINSTRINFO_H
 
+#include "WebAssembly.h"
 #include "WebAssemblyRegisterInfo.h"
+#include "llvm/ADT/ArrayRef.h"
 #include "llvm/CodeGen/TargetInstrInfo.h"
 
 #define GET_INSTRINFO_HEADER
 #include "WebAssemblyGenInstrInfo.inc"
 
 namespace llvm {
 
 class WebAssemblySubtarget;
public:
   unsigned removeBranch(MachineBasicBlock &MBB,
                         int *BytesRemoved = nullptr) const override;
   unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
                         MachineBasicBlock *FBB, ArrayRef<MachineOperand> Cond,
                         const DebugLoc &DL,
                         int *BytesAdded = nullptr) const override;
   bool
   reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const override;
+
+  ArrayRef<std::pair<int, const char *>>
+  getSerializableTargetIndices() const override;
 };
 
 } // end namespace llvm
 
 #endif

lib/Target/WebAssembly/WebAssemblyInstrInfo.cpp

 }
 
 bool WebAssemblyInstrInfo::reverseBranchCondition(
     SmallVectorImpl<MachineOperand> &Cond) const {
   assert(Cond.size() == 2 && "Expected a flag and a successor block");
   Cond.front() = MachineOperand::CreateImm(!Cond.front().getImm());
   return false;
 }
+
+ArrayRef<std::pair<int, const char *>>
+WebAssemblyInstrInfo::getSerializableTargetIndices() const {
+  static const std::pair<int, const char *> TargetIndices[] = {
+      {WebAssembly::TI_LOCAL_START, "wasm-local-start"},
+      {WebAssembly::TI_GLOBAL_START, "wasm-global-start"},
+      {WebAssembly::TI_OPERAND_STACK_START, "wasm-operator-stack-start"}};
+  return makeArrayRef(TargetIndices);
+}