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[AArch64] Support "S" inline assembler constraint
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Authored by peter.smith on May 11 2018, 3:35 AM.

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Summary

This patch re-introduces the "S" inline assembler constraint. This matches an absolute symbolic address or a label reference [3]. My understanding is that its primary use case is in a code sequence like:

asm("adrp %0, %1\n\t"
        "add %0, %0, :lo12:%1" : "=r"(addr) : "S"(&var));

I say re-introduces because it seems like "S" was implemented by Tim in the original AArch64 backend, but looks like it wasn't carried forward to the merge with the ARM64 backend. I couldn't find any commit message or mail thread mentioning why, I'm hoping that it wasn't for a fundamental flaw. I've put links to an old git repository that happens to have the old files there.

The implementation is heavily based on the original implementation. I haven't implemented the A and L modifiers that were in the original implementation as these don't appear to be supported by GCC, or at least the version of GCC that I was using. For reference the A is ignored for an ADRP, but the L generates the ":lo12:" string. I think the expectation is that users will write the ":lo12:" in the inline asm string as in the example above.

The "S" modifier is already supported in Clang. I haven't needed to change that, there is a test case in aarch64-inline-asm.c that should be updated to not use the A and L modifiers. For reference it looks like:

asm("adrp %0, %A1\n\t"
        "add %0, %0, %L1" : "=r"(addr) : "S"(&var));

I can submit a follow up patch to do that.

My understanding is that "S" modifier is used in the Linux kernel and there isn't a clang/gcc compatible alternative.

Fixes PR37180

References:
[1] PR37180 https://bugs.llvm.org/show_bug.cgi?id=37180
[2] Linux kernel commit containing use of "S" https://github.com/torvalds/linux/commit/44a497abd621a71c645f06d3d545ae2f46448830
[3] GCC documentation for machine specific constraints https://gcc.gnu.org/onlinedocs/gcc/Machine-Constraints.html#Machine-Constraints
[4] Links to old AArch64 backend.
https://chromium.googlesource.com/native_client/pnacl-llvm/+/upstream/master/test/CodeGen/AArch64/inline-asm-constraints.ll
https://chromium.googlesource.com/native_client/pnacl-llvm/+/upstream/master/lib/Target/AArch64/AArch64AsmPrinter.cpp
https://chromium.googlesource.com/native_client/pnacl-llvm/+/upstream/master/lib/Target/AArch64/AArch64ISelLowering.cpp

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Event Timeline

peter.smith created this revision.May 11 2018, 3:35 AM
manojgupta accepted this revision.May 15 2018, 8:46 AM

Marking as approved since no comments/concerns have been raised, and change is pretty simple.

This revision is now accepted and ready to land.May 15 2018, 8:46 AM
This revision was automatically updated to reflect the committed changes.