niravd (Nirav Dave)
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Nov 23 2015, 1:58 PM (151 w, 5 d)

Recent Activity

Wed, Oct 17

niravd updated the diff for D31068: [SDAG] Expand MergedConsecutiveStores to better handle Giving up in Chain Analysis.

Rebase to head. Some changes to alias make this require a much longer chain of stores. The need is clearly less than when I wrote this patch a year ago, but still has a minor positive effect.

Wed, Oct 17, 1:01 PM

Tue, Oct 16

niravd updated the summary of D53106: [SelectionDAG] Fix behavior topological ordering with regards to glued nodes..
Tue, Oct 16, 11:48 AM
niravd updated the summary of D53106: [SelectionDAG] Fix behavior topological ordering with regards to glued nodes..
Tue, Oct 16, 11:47 AM
niravd updated the diff for D53106: [SelectionDAG] Fix behavior topological ordering with regards to glued nodes..

Fix topological ordering construction to prevent premature pruning.

Tue, Oct 16, 11:47 AM

Mon, Oct 15

niravd added a comment to D53289: [DAGCombiner] Limit the number of chains in findBetterChains()..
Mon, Oct 15, 9:16 AM
niravd added a comment to D53289: [DAGCombiner] Limit the number of chains in findBetterChains()..

Oh good catch. This is O(N^3) for long chains because we try every prefix of the chain, and because the chain is so long our chain improvements gives up and noops, so we just redo the same computation over and over. Cutting the length to any reasonable size makes it O(N^2). I suspect your observed merge size requirement is to deal with our incomplete handling of chain SubDAG in store merge (just a children of a single TF potentially skipping some loads), because it shouldn't matter otherwise (See (1)).

Mon, Oct 15, 9:16 AM
niravd removed a dependency for D53289: [DAGCombiner] Limit the number of chains in findBetterChains().: D31068: [SDAG] Expand MergedConsecutiveStores to better handle Giving up in Chain Analysis.
Mon, Oct 15, 9:06 AM
niravd removed a dependent revision for D31068: [SDAG] Expand MergedConsecutiveStores to better handle Giving up in Chain Analysis: D53289: [DAGCombiner] Limit the number of chains in findBetterChains()..
Mon, Oct 15, 9:06 AM
niravd added a dependency for D53289: [DAGCombiner] Limit the number of chains in findBetterChains().: D31068: [SDAG] Expand MergedConsecutiveStores to better handle Giving up in Chain Analysis.
Mon, Oct 15, 8:49 AM
niravd added a dependent revision for D31068: [SDAG] Expand MergedConsecutiveStores to better handle Giving up in Chain Analysis: D53289: [DAGCombiner] Limit the number of chains in findBetterChains()..
Mon, Oct 15, 8:49 AM
niravd added a reviewer for D31068: [SDAG] Expand MergedConsecutiveStores to better handle Giving up in Chain Analysis: courbet.
Mon, Oct 15, 8:32 AM

Thu, Oct 11

niravd committed rL344272: [DAG] Fix Big Endian in Load-Store forwarding.
[DAG] Fix Big Endian in Load-Store forwarding
Thu, Oct 11, 11:31 AM
niravd closed D53147: [DAG] Fix Big Endian in Load-Store forwarding.
Thu, Oct 11, 11:30 AM
niravd added a comment to D53106: [SelectionDAG] Fix behavior topological ordering with regards to glued nodes..

Good point. Scenario 1 may happen if we have nodes A, B, C, GlueOp, and GlueUser such that there's uses (A-> GlueUse, GlueOp->GlueUser, GlueOp->B, B-> C) and the node id ordering is GOp < B < A < GU < C then checking if A is a predecessor to C would stop searching at B and fail to see the remaining. I am unsure if this is possible currently given our id scheme, but I'll take a look. I believe it will always bias towards selecting A before B.

Thu, Oct 11, 10:44 AM
niravd created D53147: [DAG] Fix Big Endian in Load-Store forwarding.
Thu, Oct 11, 10:22 AM
niravd added a comment to D46423: [RISCV] Support .option relax and .option norelax.
In D46423#1261724, @asb wrote:

Shiva and Kito didn't seem to have any concerns so I was just re-checking prior to committing. I had a closer look at getAssemblerPtr and see this method was introduced by @niravd in rL331218. Nirav - are you happy for this patch to change getAssemblerPtr so it doesn't just return nullptr in MCStreamer.h? I don't think gating on UseAssemblerInfoForParsing makes sense in our case.

Thu, Oct 11, 7:49 AM

Wed, Oct 10

niravd created D53106: [SelectionDAG] Fix behavior topological ordering with regards to glued nodes..
Wed, Oct 10, 1:21 PM
niravd updated the diff for D49691: [DAGCombine] Allow alias analysis with inline asm calls and GluedNodes..

Add comments.

Wed, Oct 10, 7:44 AM
niravd committed rL344142: [DAGCombine] Improve Load-Store Forwarding.
[DAGCombine] Improve Load-Store Forwarding
Wed, Oct 10, 7:18 AM
niravd closed D49200: [DAGCombine] Improve Load-Store Forwarding.
Wed, Oct 10, 7:17 AM

Tue, Oct 9

niravd updated the diff for D49691: [DAGCombine] Allow alias analysis with inline asm calls and GluedNodes..

Rebase to tip.

Tue, Oct 9, 11:49 AM
niravd updated the diff for D49200: [DAGCombine] Improve Load-Store Forwarding.

Rebase to tip and address rksimon's renaming suggestion.

Tue, Oct 9, 11:32 AM
niravd accepted D53026: [TargetLowering] Add root node back to work list after successful SimplifyDemandedBits/SimplifyDemandedVectorElts.

LGTM.

Tue, Oct 9, 10:17 AM
niravd added a comment to D49200: [DAGCombine] Improve Load-Store Forwarding.

Ping again.

Tue, Oct 9, 8:21 AM

Wed, Oct 3

niravd committed rL343689: [X86] Correctly use SSE registers if no-x87 is selected..
[X86] Correctly use SSE registers if no-x87 is selected.
Wed, Oct 3, 7:15 AM
niravd closed D52555: [X86] Fix use SSE registers if no-x87 is selected..
Wed, Oct 3, 7:15 AM

Tue, Oct 2

niravd updated the diff for D52555: [X86] Fix use SSE registers if no-x87 is selected..

Simplify tests. Add comment.

Tue, Oct 2, 1:41 PM
niravd added inline comments to D52555: [X86] Fix use SSE registers if no-x87 is selected..
Tue, Oct 2, 9:34 AM
niravd updated the diff for D52555: [X86] Fix use SSE registers if no-x87 is selected..

Address comments.

Tue, Oct 2, 9:30 AM

Mon, Oct 1

niravd added inline comments to D52555: [X86] Fix use SSE registers if no-x87 is selected..
Mon, Oct 1, 1:22 PM
niravd added a comment to D52555: [X86] Fix use SSE registers if no-x87 is selected..
Mon, Oct 1, 1:22 PM
niravd updated the diff for D52555: [X86] Fix use SSE registers if no-x87 is selected..

Fix typo.

Mon, Oct 1, 1:10 PM
niravd added a comment to D49200: [DAGCombine] Improve Load-Store Forwarding.

Ping.

Mon, Oct 1, 8:49 AM
niravd accepted D52681: DAGCombiner: StoreMerging: Fix bad index calculating when adjusting mismatching vector types.

LGTM.

Mon, Oct 1, 7:23 AM

Fri, Sep 28

niravd updated the diff for D52555: [X86] Fix use SSE registers if no-x87 is selected..

Update to better match GCC's behavior. Not as aggressive as we can be.

Fri, Sep 28, 10:22 AM

Wed, Sep 26

niravd updated the diff for D52555: [X86] Fix use SSE registers if no-x87 is selected..

Update tests

Wed, Sep 26, 12:57 PM
niravd created D52555: [X86] Fix use SSE registers if no-x87 is selected..
Wed, Sep 26, 8:04 AM

Tue, Sep 25

niravd accepted D52515: [MCAsmParser] Move AltMacroMode tracking out of MCAsmLexer.

LGTM.

Tue, Sep 25, 1:19 PM
niravd committed rL342987: [ARM] Share predecessor bookkeeping in CombineBaseUpdate. NFCI..
[ARM] Share predecessor bookkeeping in CombineBaseUpdate. NFCI.
Tue, Sep 25, 8:33 AM
niravd committed rL342986: [AArch64] Share search bookkeeping in combines. NFCI..
[AArch64] Share search bookkeeping in combines. NFCI.
Tue, Sep 25, 8:33 AM
niravd committed rL342985: [LegalizeDAG] Prune Predecessor check in ExpandExtractFromVectorThroughStack..
[LegalizeDAG] Prune Predecessor check in ExpandExtractFromVectorThroughStack.
Tue, Sep 25, 8:33 AM
niravd committed rL342984: [DAGCombine] Improve Predecessor check in SimplifySelectOps. NFCI..
[DAGCombine] Improve Predecessor check in SimplifySelectOps. NFCI.
Tue, Sep 25, 8:33 AM
niravd committed rL342983: [DAGCombine] Share predecessor bookkeeping in CombineToPostIndexedLoadStore..
[DAGCombine] Share predecessor bookkeeping in CombineToPostIndexedLoadStore.
Tue, Sep 25, 8:33 AM
niravd committed rL342980: [DAGCombine] Don't fold dependent loads across SELECT_CC..
[DAGCombine] Don't fold dependent loads across SELECT_CC.
Tue, Sep 25, 7:44 AM

Mon, Sep 24

niravd added a comment to D52306: [DAGCombine] Don't fold dependent loads across SELECT_CC..

It looks like you may not have commit access. Would you like me to commit this for you?

Mon, Sep 24, 10:56 AM
niravd added a comment to D49200: [DAGCombine] Improve Load-Store Forwarding.

Ping.

Mon, Sep 24, 9:04 AM

Sep 20 2018

niravd accepted D52277: [RegAllocGreedy] Fix crash in tryLocalSplit.

LGTM

Sep 20 2018, 12:50 PM
niravd accepted D52306: [DAGCombine] Don't fold dependent loads across SELECT_CC..

Sadly, no clever ideas on my part. If it's not repeatable on any of the in-tree backend let's just commit this now; it's a fixes a clear oversight.

Sep 20 2018, 11:07 AM
niravd added a comment to D52306: [DAGCombine] Don't fold dependent loads across SELECT_CC..

Do you have a test case?

Sep 20 2018, 8:19 AM

Sep 19 2018

niravd updated subscribers of D52277: [RegAllocGreedy] Fix crash in tryLocalSplit.
Sep 19 2018, 12:34 PM
niravd created D52277: [RegAllocGreedy] Fix crash in tryLocalSplit.
Sep 19 2018, 12:34 PM
niravd accepted D52140: [X86] Add initial SimplifyDemandedVectorEltsForTargetNode support.

LGTM.

Sep 19 2018, 9:18 AM
niravd added a comment to D38128: Handle COPYs of physregs better (regalloc hints).

I've gone through and marked all the places.

Sep 19 2018, 8:30 AM

Sep 18 2018

niravd added a comment to D38128: Handle COPYs of physregs better (regalloc hints).

The codesize issues are minor and shouldn't hold this patch up. The only blocker I see is the unnecessary data shuffling for SSE41 codegen which someone else should decide on.

Sep 18 2018, 1:46 PM
niravd added a comment to D52140: [X86] Add initial SimplifyDemandedVectorEltsForTargetNode support.

Looks google fine modulo the noted issues with load.

Sep 18 2018, 10:28 AM

Sep 17 2018

niravd committed rL342412: [MC] Avoid inlining constant symbols with variants..
[MC] Avoid inlining constant symbols with variants.
Sep 17 2018, 1:35 PM
niravd closed D52188: [MC] Avoid inlining constant symbols with variants..
Sep 17 2018, 1:35 PM
niravd updated subscribers of D51502: [X86] Fix register resizings for inline assembly register operands..

Yes, this is a fix to match GCC's register assignment for a 64-bit in
32-bit mode to pairs of registers.

Sep 17 2018, 1:27 PM
niravd created D52188: [MC] Avoid inlining constant symbols with variants..
Sep 17 2018, 1:07 PM

Sep 14 2018

niravd added inline comments to D49200: [DAGCombine] Improve Load-Store Forwarding.
Sep 14 2018, 9:04 AM
niravd updated the diff for D49200: [DAGCombine] Improve Load-Store Forwarding.

Resolve comments

Sep 14 2018, 8:58 AM

Sep 13 2018

niravd committed rL342175: [X86] Fix register resizings for inline assembly register operands..
[X86] Fix register resizings for inline assembly register operands.
Sep 13 2018, 1:36 PM
niravd closed D51502: [X86] Fix register resizings for inline assembly register operands..
Sep 13 2018, 1:35 PM
niravd committed rL342174: [X86] Cleanup pair returns. NFCI..
[X86] Cleanup pair returns. NFCI.
Sep 13 2018, 1:35 PM
niravd updated the diff for D51502: [X86] Fix register resizings for inline assembly register operands..

Huh. It looks like I commited a partial patch change. The uploaded patch has only some of my change to remove the remove breaks from the switch. The EAX, EDX, and ECX cases should have also be returns (or at least have breaks). Corrected patch here.

Sep 13 2018, 10:49 AM
niravd accepted D51831: [DAGCombine] Fix crash when store merging created an extract_subvector with invalid index.

We should make sure to do the multiplication as (unsigned long long) to give us 64-bits because vectors on the order of 2^16 are potentially reasonable and would cause an overflow at 32-bits.

Sep 13 2018, 8:09 AM

Sep 12 2018

niravd added a comment to D49200: [DAGCombine] Improve Load-Store Forwarding.

Ping.

Sep 12 2018, 1:01 PM
niravd added inline comments to D51831: [DAGCombine] Fix crash when store merging created an extract_subvector with invalid index.
Sep 12 2018, 9:45 AM

Sep 10 2018

niravd updated the diff for D51502: [X86] Fix register resizings for inline assembly register operands..

Match GCC's register assignment behavior. This causes some minor test case reordering from the introduced register classes. Interestingly unfold-masked-merge-vector-variablemask.ll has slightly fewer spills.

Sep 10 2018, 7:46 AM

Aug 30 2018

niravd added a comment to D49200: [DAGCombine] Improve Load-Store Forwarding.

Ping

Aug 30 2018, 12:15 PM
niravd created D51502: [X86] Fix register resizings for inline assembly register operands..
Aug 30 2018, 12:14 PM

Aug 28 2018

niravd committed rL340853: [DAGCombine] Rework MERGE_VALUES to inline in single pass. NFCI..
[DAGCombine] Rework MERGE_VALUES to inline in single pass. NFCI.
Aug 28 2018, 11:15 AM
niravd committed rL340852: [DAG] Avoid recomputing Divergence checks. NFCI..
[DAG] Avoid recomputing Divergence checks. NFCI.
Aug 28 2018, 11:14 AM
niravd committed rL340851: [DAG] Fix updateDivergence calculation.
[DAG] Fix updateDivergence calculation
Aug 28 2018, 11:14 AM

Aug 23 2018

niravd updated the diff for D49200: [DAGCombine] Improve Load-Store Forwarding.

Resolve comments.

Aug 23 2018, 12:53 PM

Aug 22 2018

niravd accepted D48789: [X86] Replace (32/64 - n) shift amounts with (neg n) since the shift amount is masked in hardware.

LGTM.

Aug 22 2018, 12:27 PM
niravd added a comment to D48789: [X86] Replace (32/64 - n) shift amounts with (neg n) since the shift amount is masked in hardware.

I think you should just return immediately and let it get replaced the next time.

Aug 22 2018, 9:07 AM

Aug 21 2018

niravd added a comment to D48789: [X86] Replace (32/64 - n) shift amounts with (neg n) since the shift amount is masked in hardware.

I’m pretty sure the case where UpdateNodeOperands returns an existing node instead of updating N doesn’t work. But I haven’t been able to trigger it with a test.

Aug 21 2018, 1:01 PM

Aug 16 2018

niravd committed rL339906: [MC] Cleanup noop default case spelling. NFC..
[MC] Cleanup noop default case spelling. NFC.
Aug 16 2018, 10:23 AM
niravd committed rL339895: [MC][X86] Enhance X86 Register expression handling to more closely match GCC..
[MC][X86] Enhance X86 Register expression handling to more closely match GCC.
Aug 16 2018, 9:32 AM
niravd closed D50795: [MC][X86] Enhance X86 Register expression handling to more closely match GCC..
Aug 16 2018, 9:32 AM

Aug 15 2018

niravd retitled D50795: [MC][X86] Enhance X86 Register expression handling to more closely match GCC. from [DAG] Enhance X86 Register expression handling to more closely match GCC. to [MC][X86] Enhance X86 Register expression handling to more closely match GCC..
Aug 15 2018, 11:51 AM
niravd added a comment to D49200: [DAGCombine] Improve Load-Store Forwarding.

Ping?

Aug 15 2018, 11:14 AM
niravd created D50795: [MC][X86] Enhance X86 Register expression handling to more closely match GCC..
Aug 15 2018, 11:13 AM

Aug 14 2018

niravd committed rL339688: [DAG] Avoid redundant chain transversal in store merge cycle check. NFCI..
[DAG] Avoid redundant chain transversal in store merge cycle check. NFCI.
Aug 14 2018, 9:21 AM

Jul 23 2018

niravd added a dependent revision for D49200: [DAGCombine] Improve Load-Store Forwarding: D49691: [DAGCombine] Allow alias analysis with inline asm calls and GluedNodes..
Jul 23 2018, 1:22 PM
niravd added a dependency for D49691: [DAGCombine] Allow alias analysis with inline asm calls and GluedNodes.: D49200: [DAGCombine] Improve Load-Store Forwarding.
Jul 23 2018, 1:22 PM
niravd created D49691: [DAGCombine] Allow alias analysis with inline asm calls and GluedNodes..
Jul 23 2018, 1:22 PM
niravd committed rL337734: Add inline asm aliasing test..
Add inline asm aliasing test.
Jul 23 2018, 1:19 PM
niravd committed rL337708: [Legalize] Elide MERGE_VALUES created by scalarizeVectorLoad..
[Legalize] Elide MERGE_VALUES created by scalarizeVectorLoad.
Jul 23 2018, 9:44 AM

Jul 20 2018

niravd committed rL337563: [DAG] Avoid Node Update assertion due to AND simplification.
[DAG] Avoid Node Update assertion due to AND simplification
Jul 20 2018, 8:32 AM
niravd closed D49444: [DAG] Avoid Node Update assertion due to AND simplification.
Jul 20 2018, 8:32 AM
niravd committed rL337560: [DAG] Fix Memory ordering check in ReduceLoadOpStore..
[DAG] Fix Memory ordering check in ReduceLoadOpStore.
Jul 20 2018, 8:26 AM
niravd closed D49388: [DAG] Fix Memory ordering check in ReduceLoadOpStore..
Jul 20 2018, 8:26 AM

Jul 18 2018

niravd updated the diff for D49388: [DAG] Fix Memory ordering check in ReduceLoadOpStore..

Remove the expensive check in favor of more conservative check that LD's chain has one use.

Jul 18 2018, 11:45 AM
niravd committed rL337414: [DAG] Add testcase..
[DAG] Add testcase.
Jul 18 2018, 11:40 AM
niravd committed rL337409: [ScheduleDAG] Fix unfolding of SUnits to already existent nodes..
[ScheduleDAG] Fix unfolding of SUnits to already existent nodes.
Jul 18 2018, 11:06 AM
niravd closed D48666: [ScheduleDAG] Fix unfolding of SUnits to already existent nodes..
Jul 18 2018, 11:06 AM
niravd updated the diff for D49444: [DAG] Avoid Node Update assertion due to AND simplification.

Using a temporary node avoids the intermediate loop issue, though a better temp node structure would be preferable.
But you're correct that any simplification to the AND obviates the need for fixup so let's us that.

Jul 18 2018, 9:43 AM
niravd committed rL337398: [MC] Fix nested macro body parsing.
[MC] Fix nested macro body parsing
Jul 18 2018, 9:22 AM