This patch enables the code generation of vector function names that are
described by attaching a "#pragma omp declare simd" directive to the
scalar function definition/declaration, for the Advanced SIMD (NEON)
vector extension of the A64 instruction set for the AArch64 execution
state of the ARMv8 architecture.
As it is done for other targets, the available vector functions are
stored as string attributes attached to the scalar function in the IR,
and are made available for further processing in the middle
end (e.g. exposure to the loop vectorizer).
The mangling function of the vector names is compatible with
the Itanium-standard names that are being generated for X86.
The value of the token that specifies the architecture extension is 'n',
as for NEON.
- The SimdDefaultAlign value of the AArch64TargetInfo class has been set to 128-bit - the size of a quad-word register "Q" for NEON.
- The name mangling function for X86 has been merged into a generic one that is shared with AArch64, as emitTargetDeclareSimdFunction.
- The CodeGen test has been split into X86 and AArch64 runs.
- To improve readability and maintainability, the actual FileCheck checks (both for X86 and AArch64) have been moved right after the respective function declarations.
The patch does not introduce any functional change for the X86 target.